shao ziyang / mbed-src-kl05

mbed library sources

Dependents:   frdm_kl05z_gpio_test

Fork of mbed-src by mbed official

targets/cmsis/TARGET_STM/TARGET_NUCLEO_F401RE/stm32f4xx_hal_i2s.c@226:b062af740e40, 2014-06-11 (annotated)

Committer:
mbed_official
Date:
Wed Jun 11 09:45:09 2014 +0100
Revision:
226:b062af740e40
Parent:
106:ced8cbb51063 
Synchronized with git revision 42deb9ac55f9bdf9835e9c41dc757117d344ffda



Full URL: https://github.com/mbedmicro/mbed/commit/42deb9ac55f9bdf9835e9c41dc757117d344ffda/



[NUCLEO_F401RE] Remove call to Systick + bug fixes

Who changed what in which revision?

UserRevisionLine numberNew contents of line
mbed_official 87:085cde657901 1 /**
mbed_official 87:085cde657901 2 ******************************************************************************
mbed_official 87:085cde657901 3 * @file stm32f4xx_hal_i2s.c
mbed_official 87:085cde657901 4 * @author MCD Application Team
mbed_official 226:b062af740e40 5 * @version V1.1.0RC2
mbed_official 226:b062af740e40 6 * @date 14-May-2014
mbed_official 87:085cde657901 7 * @brief I2S HAL module driver.
mbed_official 87:085cde657901 8 * This file provides firmware functions to manage the following
mbed_official 87:085cde657901 9 * functionalities of the Integrated Interchip Sound (I2S) peripheral:
mbed_official 87:085cde657901 10 * + Initialization and de-initialization functions
mbed_official 87:085cde657901 11 * + IO operation functions
mbed_official 87:085cde657901 12 * + Peripheral State and Errors functions
mbed_official 87:085cde657901 13 @verbatim
mbed_official 87:085cde657901 14 ===============================================================================
mbed_official 87:085cde657901 15 ##### How to use this driver #####
mbed_official 87:085cde657901 16 ===============================================================================
mbed_official 87:085cde657901 17 [..]
mbed_official 87:085cde657901 18 The I2S HAL driver can be used as follow:
mbed_official 87:085cde657901 19
mbed_official 87:085cde657901 20 (#) Declare a I2S_HandleTypeDef handle structure.
mbed_official 87:085cde657901 21 (#) Initialize the I2S low level resources by implement the HAL_I2S_MspInit() API:
mbed_official 87:085cde657901 22 (##) Enable the SPIx interface clock.
mbed_official 87:085cde657901 23 (##) I2S pins configuration:
mbed_official 87:085cde657901 24 (+++) Enable the clock for the I2S GPIOs.
mbed_official 87:085cde657901 25 (+++) Configure these I2S pins as alternate function pull-up.
mbed_official 87:085cde657901 26 (##) NVIC configuration if you need to use interrupt process (HAL_I2S_Transmit_IT()
mbed_official 87:085cde657901 27 and HAL_I2S_Receive_IT() APIs).
mbed_official 87:085cde657901 28 (+++) Configure the I2Sx interrupt priority.
mbed_official 87:085cde657901 29 (+++) Enable the NVIC I2S IRQ handle.
mbed_official 87:085cde657901 30 (##) DMA Configuration if you need to use DMA process (HAL_I2S_Transmit_DMA()
mbed_official 87:085cde657901 31 and HAL_I2S_Receive_DMA() APIs:
mbed_official 87:085cde657901 32 (+++) Declare a DMA handle structure for the Tx/Rx stream.
mbed_official 87:085cde657901 33 (+++) Enable the DMAx interface clock.
mbed_official 226:b062af740e40 34 (+++) Configure the declared DMA handle structure with the required Tx/Rx parameters.
mbed_official 87:085cde657901 35 (+++) Configure the DMA Tx/Rx Stream.
mbed_official 87:085cde657901 36 (+++) Associate the initilalized DMA handle to the I2S DMA Tx/Rx handle.
mbed_official 87:085cde657901 37 (+++) Configure the priority and enable the NVIC for the transfer complete interrupt on the
mbed_official 87:085cde657901 38 DMA Tx/Rx Stream.
mbed_official 87:085cde657901 39
mbed_official 87:085cde657901 40 (#) Program the Mode, Standard, Data Format, MCLK Output, Audio frequency and Polarity
mbed_official 87:085cde657901 41 using HAL_I2S_Init() function.
mbed_official 87:085cde657901 42
mbed_official 87:085cde657901 43 -@- The specific I2S interrupts (Transmission complete interrupt,
mbed_official 87:085cde657901 44 RXNE interrupt and Error Interrupts) will be managed using the macros
mbed_official 87:085cde657901 45 __I2S_ENABLE_IT() and __I2S_DISABLE_IT() inside the transmit and receive process.
mbed_official 87:085cde657901 46 -@- Make sure that either:
mbed_official 87:085cde657901 47 (+@) I2S PLL is configured or
mbed_official 87:085cde657901 48 (+@) External clock source is configured after setting correctly
mbed_official 87:085cde657901 49 the define constant EXTERNAL_CLOCK_VALUE in the stm32f4xx_hal_conf.h file.
mbed_official 87:085cde657901 50
mbed_official 226:b062af740e40 51 (#) Three operation modes are available within this driver :
mbed_official 87:085cde657901 52
mbed_official 87:085cde657901 53 *** Polling mode IO operation ***
mbed_official 87:085cde657901 54 =================================
mbed_official 87:085cde657901 55 [..]
mbed_official 87:085cde657901 56 (+) Send an amount of data in blocking mode using HAL_I2S_Transmit()
mbed_official 87:085cde657901 57 (+) Receive an amount of data in blocking mode using HAL_I2S_Receive()
mbed_official 87:085cde657901 58
mbed_official 226:b062af740e40 59 *** Interrupt mode IO operation ***
mbed_official 87:085cde657901 60 ===================================
mbed_official 87:085cde657901 61 [..]
mbed_official 87:085cde657901 62 (+) Send an amount of data in non blocking mode using HAL_I2S_Transmit_IT()
mbed_official 87:085cde657901 63 (+) At transmission end of half transfer HAL_I2S_TxHalfCpltCallback is executed and user can
mbed_official 87:085cde657901 64 add his own code by customization of function pointer HAL_I2S_TxHalfCpltCallback
mbed_official 87:085cde657901 65 (+) At transmission end of transfer HAL_I2S_TxCpltCallback is executed and user can
mbed_official 87:085cde657901 66 add his own code by customization of function pointer HAL_I2S_TxCpltCallback
mbed_official 87:085cde657901 67 (+) Receive an amount of data in non blocking mode using HAL_I2S_Receive_IT()
mbed_official 87:085cde657901 68 (+) At reception end of half transfer HAL_I2S_RxHalfCpltCallback is executed and user can
mbed_official 87:085cde657901 69 add his own code by customization of function pointer HAL_I2S_RxHalfCpltCallback
mbed_official 87:085cde657901 70 (+) At reception end of transfer HAL_I2S_RxCpltCallback is executed and user can
mbed_official 226:b062af740e40 71 add his own code by customization of function pointer HAL_I2S_RxCpltCallback
mbed_official 87:085cde657901 72 (+) In case of transfer Error, HAL_I2S_ErrorCallback() function is executed and user can
mbed_official 87:085cde657901 73 add his own code by customization of function pointer HAL_I2S_ErrorCallback
mbed_official 87:085cde657901 74
mbed_official 226:b062af740e40 75 *** DMA mode IO operation ***
mbed_official 87:085cde657901 76 ==============================
mbed_official 87:085cde657901 77 [..]
mbed_official 87:085cde657901 78 (+) Send an amount of data in non blocking mode (DMA) using HAL_I2S_Transmit_DMA()
mbed_official 87:085cde657901 79 (+) At transmission end of half transfer HAL_I2S_TxHalfCpltCallback is executed and user can
mbed_official 87:085cde657901 80 add his own code by customization of function pointer HAL_I2S_TxHalfCpltCallback
mbed_official 87:085cde657901 81 (+) At transmission end of transfer HAL_I2S_TxCpltCallback is executed and user can
mbed_official 87:085cde657901 82 add his own code by customization of function pointer HAL_I2S_TxCpltCallback
mbed_official 87:085cde657901 83 (+) Receive an amount of data in non blocking mode (DMA) using HAL_I2S_Receive_DMA()
mbed_official 87:085cde657901 84 (+) At reception end of half transfer HAL_I2S_RxHalfCpltCallback is executed and user can
mbed_official 87:085cde657901 85 add his own code by customization of function pointer HAL_I2S_RxHalfCpltCallback
mbed_official 87:085cde657901 86 (+) At reception end of transfer HAL_I2S_RxCpltCallback is executed and user can
mbed_official 226:b062af740e40 87 add his own code by customization of function pointer HAL_I2S_RxCpltCallback
mbed_official 87:085cde657901 88 (+) In case of transfer Error, HAL_I2S_ErrorCallback() function is executed and user can
mbed_official 87:085cde657901 89 add his own code by customization of function pointer HAL_I2S_ErrorCallback
mbed_official 226:b062af740e40 90 (+) Pause the DMA Transfer using HAL_I2S_DMAPause()
mbed_official 226:b062af740e40 91 (+) Resume the DMA Transfer using HAL_I2S_DMAResume()
mbed_official 226:b062af740e40 92 (+) Stop the DMA Transfer using HAL_I2S_DMAStop()
mbed_official 226:b062af740e40 93
mbed_official 87:085cde657901 94 *** I2S HAL driver macros list ***
mbed_official 226:b062af740e40 95 =============================================
mbed_official 87:085cde657901 96 [..]
mbed_official 87:085cde657901 97 Below the list of most used macros in USART HAL driver.
mbed_official 87:085cde657901 98
mbed_official 87:085cde657901 99 (+) __HAL_I2S_ENABLE: Enable the specified SPI peripheral (in I2S mode)
mbed_official 226:b062af740e40 100 (+) __HAL_I2S_DISABLE: Disable the specified SPI peripheral (in I2S mode)
mbed_official 87:085cde657901 101 (+) __HAL_I2S_ENABLE_IT : Enable the specified I2S interrupts
mbed_official 87:085cde657901 102 (+) __HAL_I2S_DISABLE_IT : Disable the specified I2S interrupts
mbed_official 87:085cde657901 103 (+) __HAL_I2S_GET_FLAG: Check whether the specified I2S flag is set or not
mbed_official 226:b062af740e40 104
mbed_official 226:b062af740e40 105 [..]
mbed_official 87:085cde657901 106 (@) You can refer to the I2S HAL driver header file for more useful macros
mbed_official 87:085cde657901 107
mbed_official 87:085cde657901 108 @endverbatim
mbed_official 87:085cde657901 109 ******************************************************************************
mbed_official 87:085cde657901 110 * @attention
mbed_official 87:085cde657901 111 *
mbed_official 87:085cde657901 112 * <h2><center>&copy; COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
mbed_official 87:085cde657901 113 *
mbed_official 87:085cde657901 114 * Redistribution and use in source and binary forms, with or without modification,
mbed_official 87:085cde657901 115 * are permitted provided that the following conditions are met:
mbed_official 87:085cde657901 116 * 1. Redistributions of source code must retain the above copyright notice,
mbed_official 87:085cde657901 117 * this list of conditions and the following disclaimer.
mbed_official 87:085cde657901 118 * 2. Redistributions in binary form must reproduce the above copyright notice,
mbed_official 87:085cde657901 119 * this list of conditions and the following disclaimer in the documentation
mbed_official 87:085cde657901 120 * and/or other materials provided with the distribution.
mbed_official 87:085cde657901 121 * 3. Neither the name of STMicroelectronics nor the names of its contributors
mbed_official 87:085cde657901 122 * may be used to endorse or promote products derived from this software
mbed_official 87:085cde657901 123 * without specific prior written permission.
mbed_official 87:085cde657901 124 *
mbed_official 87:085cde657901 125 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
mbed_official 87:085cde657901 126 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
mbed_official 87:085cde657901 127 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
mbed_official 87:085cde657901 128 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
mbed_official 87:085cde657901 129 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
mbed_official 87:085cde657901 130 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
mbed_official 87:085cde657901 131 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
mbed_official 87:085cde657901 132 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
mbed_official 87:085cde657901 133 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
mbed_official 87:085cde657901 134 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
mbed_official 87:085cde657901 135 *
mbed_official 87:085cde657901 136 ******************************************************************************
mbed_official 87:085cde657901 137 */
mbed_official 87:085cde657901 138
mbed_official 87:085cde657901 139 /* Includes ------------------------------------------------------------------*/
mbed_official 87:085cde657901 140 #include "stm32f4xx_hal.h"
mbed_official 87:085cde657901 141
mbed_official 87:085cde657901 142 /** @addtogroup STM32F4xx_HAL_Driver
mbed_official 87:085cde657901 143 * @{
mbed_official 87:085cde657901 144 */
mbed_official 87:085cde657901 145
mbed_official 87:085cde657901 146 /** @defgroup I2S
mbed_official 87:085cde657901 147 * @brief I2S HAL module driver
mbed_official 87:085cde657901 148 * @{
mbed_official 87:085cde657901 149 */
mbed_official 87:085cde657901 150
mbed_official 87:085cde657901 151 #ifdef HAL_I2S_MODULE_ENABLED
mbed_official 87:085cde657901 152
mbed_official 87:085cde657901 153 /* Private typedef -----------------------------------------------------------*/
mbed_official 87:085cde657901 154 /* Private define ------------------------------------------------------------*/
mbed_official 87:085cde657901 155 /* Private macro -------------------------------------------------------------*/
mbed_official 87:085cde657901 156 /* Private variables ---------------------------------------------------------*/
mbed_official 87:085cde657901 157 /* Private function prototypes -----------------------------------------------*/
mbed_official 87:085cde657901 158 static HAL_StatusTypeDef I2S_Transmit_IT(I2S_HandleTypeDef *hi2s);
mbed_official 87:085cde657901 159 static HAL_StatusTypeDef I2S_Receive_IT(I2S_HandleTypeDef *hi2s);
mbed_official 87:085cde657901 160 /* Private functions ---------------------------------------------------------*/
mbed_official 87:085cde657901 161
mbed_official 87:085cde657901 162 /** @defgroup I2S_Private_Functions
mbed_official 87:085cde657901 163 * @{
mbed_official 87:085cde657901 164 */
mbed_official 87:085cde657901 165
mbed_official 87:085cde657901 166 /** @defgroup I2S_Group1 Initialization and de-initialization functions
mbed_official 87:085cde657901 167 * @brief Initialization and Configuration functions
mbed_official 87:085cde657901 168 *
mbed_official 87:085cde657901 169 @verbatim
mbed_official 87:085cde657901 170 ===============================================================================
mbed_official 87:085cde657901 171 ##### Initialization and de-initialization functions #####
mbed_official 87:085cde657901 172 ===============================================================================
mbed_official 87:085cde657901 173 [..] This subsection provides a set of functions allowing to initialize and
mbed_official 87:085cde657901 174 de-initialiaze the I2Sx peripheral in simplex mode:
mbed_official 87:085cde657901 175
mbed_official 87:085cde657901 176 (+) User must Implement HAL_I2S_MspInit() function in which he configures
mbed_official 87:085cde657901 177 all related peripherals resources (CLOCK, GPIO, DMA, IT and NVIC ).
mbed_official 87:085cde657901 178
mbed_official 87:085cde657901 179 (+) Call the function HAL_I2S_Init() to configure the selected device with
mbed_official 87:085cde657901 180 the selected configuration:
mbed_official 87:085cde657901 181 (++) Mode
mbed_official 87:085cde657901 182 (++) Standard
mbed_official 87:085cde657901 183 (++) Data Format
mbed_official 87:085cde657901 184 (++) MCLK Output
mbed_official 87:085cde657901 185 (++) Audio frequency
mbed_official 87:085cde657901 186 (++) Polarity
mbed_official 87:085cde657901 187 (++) Full duplex mode
mbed_official 87:085cde657901 188
mbed_official 87:085cde657901 189 (+) Call the function HAL_I2S_DeInit() to restore the default configuration
mbed_official 87:085cde657901 190 of the selected I2Sx periperal.
mbed_official 87:085cde657901 191 @endverbatim
mbed_official 87:085cde657901 192 * @{
mbed_official 87:085cde657901 193 */
mbed_official 87:085cde657901 194
mbed_official 87:085cde657901 195 /**
mbed_official 87:085cde657901 196 * @brief Initializes the I2S according to the specified parameters
mbed_official 87:085cde657901 197 * in the I2S_InitTypeDef and create the associated handle.
mbed_official 226:b062af740e40 198 * @param hi2s: pointer to a I2S_HandleTypeDef structure that contains
mbed_official 226:b062af740e40 199 * the configuration information for I2S module
mbed_official 87:085cde657901 200 * @retval HAL status
mbed_official 87:085cde657901 201 */
mbed_official 87:085cde657901 202 HAL_StatusTypeDef HAL_I2S_Init(I2S_HandleTypeDef *hi2s)
mbed_official 87:085cde657901 203 {
mbed_official 87:085cde657901 204 uint32_t tmpreg = 0, i2sdiv = 2, i2sodd = 0, packetlength = 1;
mbed_official 87:085cde657901 205 uint32_t tmp = 0, i2sclk = 0;
mbed_official 87:085cde657901 206
mbed_official 87:085cde657901 207 /* Check the I2S handle allocation */
mbed_official 87:085cde657901 208 if(hi2s == NULL)
mbed_official 87:085cde657901 209 {
mbed_official 87:085cde657901 210 return HAL_ERROR;
mbed_official 87:085cde657901 211 }
mbed_official 87:085cde657901 212
mbed_official 87:085cde657901 213 /* Check the I2S parameters */
mbed_official 87:085cde657901 214 assert_param(IS_I2S_MODE(hi2s->Init.Mode));
mbed_official 87:085cde657901 215 assert_param(IS_I2S_STANDARD(hi2s->Init.Standard));
mbed_official 87:085cde657901 216 assert_param(IS_I2S_DATA_FORMAT(hi2s->Init.DataFormat));
mbed_official 87:085cde657901 217 assert_param(IS_I2S_MCLK_OUTPUT(hi2s->Init.MCLKOutput));
mbed_official 87:085cde657901 218 assert_param(IS_I2S_AUDIO_FREQ(hi2s->Init.AudioFreq));
mbed_official 87:085cde657901 219 assert_param(IS_I2S_CPOL(hi2s->Init.CPOL));
mbed_official 87:085cde657901 220 assert_param(IS_I2S_CLOCKSOURCE(hi2s->Init.ClockSource));
mbed_official 87:085cde657901 221 assert_param(IS_I2S_FULLDUPLEX_MODE(hi2s->Init.FullDuplexMode));
mbed_official 87:085cde657901 222
mbed_official 87:085cde657901 223 if(hi2s->State == HAL_I2S_STATE_RESET)
mbed_official 87:085cde657901 224 {
mbed_official 87:085cde657901 225 /* Init the low level hardware : GPIO, CLOCK, CORTEX...etc */
mbed_official 87:085cde657901 226 HAL_I2S_MspInit(hi2s);
mbed_official 87:085cde657901 227 }
mbed_official 87:085cde657901 228
mbed_official 87:085cde657901 229 hi2s->State = HAL_I2S_STATE_BUSY;
mbed_official 87:085cde657901 230
mbed_official 87:085cde657901 231 /*----------------------- SPIx I2SCFGR & I2SPR Configuration ---------------*/
mbed_official 87:085cde657901 232 /* Clear I2SMOD, I2SE, I2SCFG, PCMSYNC, I2SSTD, CKPOL, DATLEN and CHLEN bits */
mbed_official 87:085cde657901 233 hi2s->Instance->I2SCFGR &= ~(SPI_I2SCFGR_CHLEN | SPI_I2SCFGR_DATLEN | SPI_I2SCFGR_CKPOL | \
mbed_official 87:085cde657901 234 SPI_I2SCFGR_I2SSTD | SPI_I2SCFGR_PCMSYNC | SPI_I2SCFGR_I2SCFG | \
mbed_official 87:085cde657901 235 SPI_I2SCFGR_I2SE | SPI_I2SCFGR_I2SMOD);
mbed_official 87:085cde657901 236 hi2s->Instance->I2SPR = 0x0002;
mbed_official 87:085cde657901 237
mbed_official 87:085cde657901 238 /* Get the I2SCFGR register value */
mbed_official 87:085cde657901 239 tmpreg = hi2s->Instance->I2SCFGR;
mbed_official 87:085cde657901 240
mbed_official 87:085cde657901 241 /* If the default frequency value has to be written, reinitialize i2sdiv and i2sodd */
mbed_official 87:085cde657901 242 /* If the requested audio frequency is not the default, compute the prescaler */
mbed_official 87:085cde657901 243 if(hi2s->Init.AudioFreq != I2S_AUDIOFREQ_DEFAULT)
mbed_official 87:085cde657901 244 {
mbed_official 87:085cde657901 245 /* Check the frame length (For the Prescaler computing) *******************/
mbed_official 87:085cde657901 246 if(hi2s->Init.DataFormat != I2S_DATAFORMAT_16B)
mbed_official 87:085cde657901 247 {
mbed_official 87:085cde657901 248 /* Packet length is 32 bits */
mbed_official 87:085cde657901 249 packetlength = 2;
mbed_official 87:085cde657901 250 }
mbed_official 87:085cde657901 251
mbed_official 87:085cde657901 252 /* Get I2S source Clock frequency ****************************************/
mbed_official 87:085cde657901 253 /* If an external I2S clock has to be used, the specific define should be set
mbed_official 87:085cde657901 254 in the project configuration or in the stm32f4xx_conf.h file */
mbed_official 87:085cde657901 255 if(hi2s->Init.ClockSource == I2S_CLOCK_EXTERNAL)
mbed_official 87:085cde657901 256 {
mbed_official 87:085cde657901 257 /* Set external clock as I2S clock source */
mbed_official 87:085cde657901 258 if((RCC->CFGR & RCC_CFGR_I2SSRC) == 0)
mbed_official 87:085cde657901 259 {
mbed_official 87:085cde657901 260 RCC->CFGR |= (uint32_t)RCC_CFGR_I2SSRC;
mbed_official 87:085cde657901 261 }
mbed_official 87:085cde657901 262
mbed_official 87:085cde657901 263 /* Set the I2S clock to the external clock value */
mbed_official 87:085cde657901 264 i2sclk = EXTERNAL_CLOCK_VALUE;
mbed_official 87:085cde657901 265 }
mbed_official 87:085cde657901 266 else
mbed_official 87:085cde657901 267 {
mbed_official 87:085cde657901 268 /* Check if PLLI2S is enabled or Not */
mbed_official 87:085cde657901 269 if((RCC->CR & RCC_CR_PLLI2SON) != RCC_CR_PLLI2SON)
mbed_official 87:085cde657901 270 {
mbed_official 87:085cde657901 271 hi2s->State= HAL_I2S_STATE_READY;
mbed_official 87:085cde657901 272
mbed_official 87:085cde657901 273 return HAL_ERROR;
mbed_official 87:085cde657901 274 }
mbed_official 87:085cde657901 275
mbed_official 87:085cde657901 276 /* Set PLLI2S as I2S clock source */
mbed_official 87:085cde657901 277 if((RCC->CFGR & RCC_CFGR_I2SSRC) != 0)
mbed_official 87:085cde657901 278 {
mbed_official 87:085cde657901 279 RCC->CFGR &= ~(uint32_t)RCC_CFGR_I2SSRC;
mbed_official 87:085cde657901 280 }
mbed_official 87:085cde657901 281
mbed_official 87:085cde657901 282 /* Get the PLLM value */
mbed_official 87:085cde657901 283 if((RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC) == RCC_PLLSOURCE_HSE)
mbed_official 87:085cde657901 284 {
mbed_official 87:085cde657901 285 /* Get the I2S source clock value */
mbed_official 87:085cde657901 286 i2sclk = (uint32_t)(HSE_VALUE / (uint32_t)(RCC->PLLCFGR & RCC_PLLCFGR_PLLM));
mbed_official 87:085cde657901 287 }
mbed_official 87:085cde657901 288 else
mbed_official 87:085cde657901 289 {
mbed_official 87:085cde657901 290 /* Get the I2S source clock value */
mbed_official 87:085cde657901 291 i2sclk = (uint32_t)(HSI_VALUE / (uint32_t)(RCC->PLLCFGR & RCC_PLLCFGR_PLLM));
mbed_official 87:085cde657901 292 }
mbed_official 87:085cde657901 293 i2sclk *= (uint32_t)(((RCC->PLLI2SCFGR & RCC_PLLI2SCFGR_PLLI2SN) >> 6) & (RCC_PLLI2SCFGR_PLLI2SN >> 6));
mbed_official 87:085cde657901 294 i2sclk /= (uint32_t)(((RCC->PLLI2SCFGR & RCC_PLLI2SCFGR_PLLI2SR) >> 28) & (RCC_PLLI2SCFGR_PLLI2SR >> 28));
mbed_official 87:085cde657901 295 }
mbed_official 87:085cde657901 296
mbed_official 87:085cde657901 297 /* Compute the Real divider depending on the MCLK output state, with a floating point */
mbed_official 87:085cde657901 298 if(hi2s->Init.MCLKOutput == I2S_MCLKOUTPUT_ENABLE)
mbed_official 87:085cde657901 299 {
mbed_official 87:085cde657901 300 /* MCLK output is enabled */
mbed_official 87:085cde657901 301 tmp = (uint32_t)(((((i2sclk / 256) * 10) / hi2s->Init.AudioFreq)) + 5);
mbed_official 87:085cde657901 302 }
mbed_official 87:085cde657901 303 else
mbed_official 87:085cde657901 304 {
mbed_official 87:085cde657901 305 /* MCLK output is disabled */
mbed_official 87:085cde657901 306 tmp = (uint32_t)(((((i2sclk / (32 * packetlength)) *10 ) / hi2s->Init.AudioFreq)) + 5);
mbed_official 87:085cde657901 307 }
mbed_official 87:085cde657901 308
mbed_official 87:085cde657901 309 /* Remove the flatting point */
mbed_official 87:085cde657901 310 tmp = tmp / 10;
mbed_official 87:085cde657901 311
mbed_official 87:085cde657901 312 /* Check the parity of the divider */
mbed_official 87:085cde657901 313 i2sodd = (uint32_t)(tmp & (uint32_t)1);
mbed_official 87:085cde657901 314
mbed_official 87:085cde657901 315 /* Compute the i2sdiv prescaler */
mbed_official 87:085cde657901 316 i2sdiv = (uint32_t)((tmp - i2sodd) / 2);
mbed_official 87:085cde657901 317
mbed_official 87:085cde657901 318 /* Get the Mask for the Odd bit (SPI_I2SPR[8]) register */
mbed_official 87:085cde657901 319 i2sodd = (uint32_t) (i2sodd << 8);
mbed_official 87:085cde657901 320 }
mbed_official 87:085cde657901 321
mbed_official 87:085cde657901 322 /* Test if the divider is 1 or 0 or greater than 0xFF */
mbed_official 87:085cde657901 323 if((i2sdiv < 2) || (i2sdiv > 0xFF))
mbed_official 87:085cde657901 324 {
mbed_official 87:085cde657901 325 /* Set the default values */
mbed_official 87:085cde657901 326 i2sdiv = 2;
mbed_official 87:085cde657901 327 i2sodd = 0;
mbed_official 87:085cde657901 328 }
mbed_official 87:085cde657901 329
mbed_official 87:085cde657901 330 /* Write to SPIx I2SPR register the computed value */
mbed_official 87:085cde657901 331 hi2s->Instance->I2SPR = (uint32_t)((uint32_t)i2sdiv | (uint32_t)(i2sodd | (uint32_t)hi2s->Init.MCLKOutput));
mbed_official 87:085cde657901 332
mbed_official 87:085cde657901 333 /* Configure the I2S with the I2S_InitStruct values */
mbed_official 87:085cde657901 334 tmpreg |= (uint32_t)(SPI_I2SCFGR_I2SMOD | hi2s->Init.Mode | hi2s->Init.Standard | hi2s->Init.DataFormat | hi2s->Init.CPOL);
mbed_official 87:085cde657901 335
mbed_official 87:085cde657901 336 /* Write to SPIx I2SCFGR */
mbed_official 87:085cde657901 337 hi2s->Instance->I2SCFGR = tmpreg;
mbed_official 87:085cde657901 338
mbed_official 87:085cde657901 339 /* Configure the I2S extended if the full duplex mode is enabled */
mbed_official 87:085cde657901 340 if(hi2s->Init.FullDuplexMode == I2S_FULLDUPLEXMODE_ENABLE)
mbed_official 87:085cde657901 341 {
mbed_official 87:085cde657901 342 /* Clear I2SMOD, I2SE, I2SCFG, PCMSYNC, I2SSTD, CKPOL, DATLEN and CHLEN bits */
mbed_official 87:085cde657901 343 I2SxEXT(hi2s->Instance)->I2SCFGR &= ~(SPI_I2SCFGR_CHLEN | SPI_I2SCFGR_DATLEN | SPI_I2SCFGR_CKPOL | \
mbed_official 87:085cde657901 344 SPI_I2SCFGR_I2SSTD | SPI_I2SCFGR_PCMSYNC | SPI_I2SCFGR_I2SCFG | \
mbed_official 87:085cde657901 345 SPI_I2SCFGR_I2SE | SPI_I2SCFGR_I2SMOD);
mbed_official 87:085cde657901 346 I2SxEXT(hi2s->Instance)->I2SPR = 2;
mbed_official 87:085cde657901 347
mbed_official 87:085cde657901 348 /* Get the I2SCFGR register value */
mbed_official 87:085cde657901 349 tmpreg = I2SxEXT(hi2s->Instance)->I2SCFGR;
mbed_official 87:085cde657901 350
mbed_official 87:085cde657901 351 /* Get the mode to be configured for the extended I2S */
mbed_official 87:085cde657901 352 if((hi2s->Init.Mode == I2S_MODE_MASTER_TX) || (hi2s->Init.Mode == I2S_MODE_SLAVE_TX))
mbed_official 87:085cde657901 353 {
mbed_official 87:085cde657901 354 tmp = I2S_MODE_SLAVE_RX;
mbed_official 87:085cde657901 355 }
mbed_official 87:085cde657901 356 else
mbed_official 87:085cde657901 357 {
mbed_official 87:085cde657901 358 if((hi2s->Init.Mode == I2S_MODE_MASTER_RX) || (hi2s->Init.Mode == I2S_MODE_SLAVE_RX))
mbed_official 87:085cde657901 359 {
mbed_official 87:085cde657901 360 tmp = I2S_MODE_SLAVE_TX;
mbed_official 87:085cde657901 361 }
mbed_official 87:085cde657901 362 }
mbed_official 87:085cde657901 363
mbed_official 87:085cde657901 364 /* Configure the I2S Slave with the I2S Master parameter values */
mbed_official 87:085cde657901 365 tmpreg |= (uint32_t)(SPI_I2SCFGR_I2SMOD | tmp | hi2s->Init.Standard | hi2s->Init.DataFormat | hi2s->Init.CPOL);
mbed_official 87:085cde657901 366
mbed_official 87:085cde657901 367 /* Write to SPIx I2SCFGR */
mbed_official 87:085cde657901 368 I2SxEXT(hi2s->Instance)->I2SCFGR = tmpreg;
mbed_official 87:085cde657901 369 }
mbed_official 87:085cde657901 370
mbed_official 87:085cde657901 371 hi2s->ErrorCode = HAL_I2S_ERROR_NONE;
mbed_official 87:085cde657901 372 hi2s->State= HAL_I2S_STATE_READY;
mbed_official 87:085cde657901 373
mbed_official 87:085cde657901 374 return HAL_OK;
mbed_official 87:085cde657901 375 }
mbed_official 87:085cde657901 376
mbed_official 87:085cde657901 377 /**
mbed_official 87:085cde657901 378 * @brief DeInitializes the I2S peripheral
mbed_official 226:b062af740e40 379 * @param hi2s: pointer to a I2S_HandleTypeDef structure that contains
mbed_official 226:b062af740e40 380 * the configuration information for I2S module
mbed_official 87:085cde657901 381 * @retval HAL status
mbed_official 87:085cde657901 382 */
mbed_official 87:085cde657901 383 HAL_StatusTypeDef HAL_I2S_DeInit(I2S_HandleTypeDef *hi2s)
mbed_official 87:085cde657901 384 {
mbed_official 87:085cde657901 385 /* Check the I2S handle allocation */
mbed_official 87:085cde657901 386 if(hi2s == NULL)
mbed_official 87:085cde657901 387 {
mbed_official 87:085cde657901 388 return HAL_ERROR;
mbed_official 87:085cde657901 389 }
mbed_official 87:085cde657901 390
mbed_official 87:085cde657901 391 hi2s->State = HAL_I2S_STATE_BUSY;
mbed_official 87:085cde657901 392
mbed_official 87:085cde657901 393 /* DeInit the low level hardware: GPIO, CLOCK, NVIC... */
mbed_official 87:085cde657901 394 HAL_I2S_MspDeInit(hi2s);
mbed_official 226:b062af740e40 395
mbed_official 226:b062af740e40 396 hi2s->ErrorCode = HAL_I2S_ERROR_NONE;
mbed_official 87:085cde657901 397 hi2s->State = HAL_I2S_STATE_RESET;
mbed_official 106:ced8cbb51063 398
mbed_official 106:ced8cbb51063 399 /* Release Lock */
mbed_official 106:ced8cbb51063 400 __HAL_UNLOCK(hi2s);
mbed_official 106:ced8cbb51063 401
mbed_official 87:085cde657901 402 return HAL_OK;
mbed_official 87:085cde657901 403 }
mbed_official 87:085cde657901 404
mbed_official 87:085cde657901 405 /**
mbed_official 87:085cde657901 406 * @brief I2S MSP Init
mbed_official 226:b062af740e40 407 * @param hi2s: pointer to a I2S_HandleTypeDef structure that contains
mbed_official 226:b062af740e40 408 * the configuration information for I2S module
mbed_official 87:085cde657901 409 * @retval None
mbed_official 87:085cde657901 410 */
mbed_official 87:085cde657901 411 __weak void HAL_I2S_MspInit(I2S_HandleTypeDef *hi2s)
mbed_official 87:085cde657901 412 {
mbed_official 87:085cde657901 413 /* NOTE : This function Should not be modified, when the callback is needed,
mbed_official 87:085cde657901 414 the HAL_I2S_MspInit could be implenetd in the user file
mbed_official 87:085cde657901 415 */
mbed_official 87:085cde657901 416 }
mbed_official 87:085cde657901 417
mbed_official 87:085cde657901 418 /**
mbed_official 87:085cde657901 419 * @brief I2S MSP DeInit
mbed_official 226:b062af740e40 420 * @param hi2s: pointer to a I2S_HandleTypeDef structure that contains
mbed_official 226:b062af740e40 421 * the configuration information for I2S module
mbed_official 87:085cde657901 422 * @retval None
mbed_official 87:085cde657901 423 */
mbed_official 87:085cde657901 424 __weak void HAL_I2S_MspDeInit(I2S_HandleTypeDef *hi2s)
mbed_official 87:085cde657901 425 {
mbed_official 87:085cde657901 426 /* NOTE : This function Should not be modified, when the callback is needed,
mbed_official 87:085cde657901 427 the HAL_I2S_MspDeInit could be implenetd in the user file
mbed_official 87:085cde657901 428 */
mbed_official 87:085cde657901 429 }
mbed_official 87:085cde657901 430
mbed_official 87:085cde657901 431 /**
mbed_official 87:085cde657901 432 * @}
mbed_official 87:085cde657901 433 */
mbed_official 87:085cde657901 434
mbed_official 87:085cde657901 435 /** @defgroup I2S_Group2 IO operation functions
mbed_official 87:085cde657901 436 * @brief Data transfers functions
mbed_official 87:085cde657901 437 *
mbed_official 87:085cde657901 438 @verbatim
mbed_official 87:085cde657901 439 ===============================================================================
mbed_official 87:085cde657901 440 ##### IO operation functions #####
mbed_official 87:085cde657901 441 ===============================================================================
mbed_official 87:085cde657901 442 [..]
mbed_official 87:085cde657901 443 This subsection provides a set of functions allowing to manage the I2S data
mbed_official 87:085cde657901 444 transfers.
mbed_official 87:085cde657901 445
mbed_official 226:b062af740e40 446 (#) There are two modes of transfer:
mbed_official 87:085cde657901 447 (++) Blocking mode : The communication is performed in the polling mode.
mbed_official 87:085cde657901 448 The status of all data processing is returned by the same function
mbed_official 87:085cde657901 449 after finishing transfer.
mbed_official 87:085cde657901 450 (++) No-Blocking mode : The communication is performed using Interrupts
mbed_official 87:085cde657901 451 or DMA. These functions return the status of the transfer startup.
mbed_official 87:085cde657901 452 The end of the data processing will be indicated through the
mbed_official 87:085cde657901 453 dedicated I2S IRQ when using Interrupt mode or the DMA IRQ when
mbed_official 87:085cde657901 454 using DMA mode.
mbed_official 87:085cde657901 455
mbed_official 87:085cde657901 456 (#) Blocking mode functions are :
mbed_official 87:085cde657901 457 (++) HAL_I2S_Transmit()
mbed_official 87:085cde657901 458 (++) HAL_I2S_Receive()
mbed_official 87:085cde657901 459
mbed_official 87:085cde657901 460 (#) No-Blocking mode functions with Interrupt are :
mbed_official 87:085cde657901 461 (++) HAL_I2S_Transmit_IT()
mbed_official 87:085cde657901 462 (++) HAL_I2S_Receive_IT()
mbed_official 87:085cde657901 463
mbed_official 87:085cde657901 464 (#) No-Blocking mode functions with DMA are :
mbed_official 87:085cde657901 465 (++) HAL_I2S_Transmit_DMA()
mbed_official 87:085cde657901 466 (++) HAL_I2S_Receive_DMA()
mbed_official 87:085cde657901 467
mbed_official 226:b062af740e40 468 (#) A set of Transfer Complete Callbacks are provided in non Blocking mode:
mbed_official 87:085cde657901 469 (++) HAL_I2S_TxCpltCallback()
mbed_official 87:085cde657901 470 (++) HAL_I2S_RxCpltCallback()
mbed_official 87:085cde657901 471 (++) HAL_I2S_ErrorCallback()
mbed_official 87:085cde657901 472
mbed_official 87:085cde657901 473 @endverbatim
mbed_official 87:085cde657901 474 * @{
mbed_official 87:085cde657901 475 */
mbed_official 87:085cde657901 476
mbed_official 87:085cde657901 477 /**
mbed_official 87:085cde657901 478 * @brief Transmit an amount of data in blocking mode
mbed_official 226:b062af740e40 479 * @param hi2s: pointer to a I2S_HandleTypeDef structure that contains
mbed_official 226:b062af740e40 480 * the configuration information for I2S module
mbed_official 87:085cde657901 481 * @param pData: a 16-bit pointer to data buffer.
mbed_official 87:085cde657901 482 * @param Size: number of data sample to be sent:
mbed_official 87:085cde657901 483 * @note When a 16-bit data frame or a 16-bit data frame extended is selected during the I2S
mbed_official 87:085cde657901 484 * configuration phase, the Size parameter means the number of 16-bit data length
mbed_official 87:085cde657901 485 * in the transaction and when a 24-bit data frame or a 32-bit data frame is selected
mbed_official 87:085cde657901 486 * the Size parameter means the number of 16-bit data length.
mbed_official 87:085cde657901 487 * @param Timeout: Timeout duration
mbed_official 87:085cde657901 488 * @note The I2S is kept enabled at the end of transaction to avoid the clock de-synchronization
mbed_official 87:085cde657901 489 * between Master and Slave(example: audio streaming).
mbed_official 87:085cde657901 490 * @retval HAL status
mbed_official 87:085cde657901 491 */
mbed_official 87:085cde657901 492 HAL_StatusTypeDef HAL_I2S_Transmit(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint16_t Size, uint32_t Timeout)
mbed_official 87:085cde657901 493 {
mbed_official 87:085cde657901 494 uint32_t tmp1 = 0, tmp2 = 0;
mbed_official 87:085cde657901 495 if((pData == NULL ) || (Size == 0))
mbed_official 87:085cde657901 496 {
mbed_official 87:085cde657901 497 return HAL_ERROR;
mbed_official 87:085cde657901 498 }
mbed_official 87:085cde657901 499
mbed_official 87:085cde657901 500 if(hi2s->State == HAL_I2S_STATE_READY)
mbed_official 87:085cde657901 501 {
mbed_official 87:085cde657901 502 tmp1 = hi2s->Instance->I2SCFGR & (SPI_I2SCFGR_DATLEN | SPI_I2SCFGR_CHLEN);
mbed_official 87:085cde657901 503 tmp2 = hi2s->Instance->I2SCFGR & (SPI_I2SCFGR_DATLEN | SPI_I2SCFGR_CHLEN);
mbed_official 87:085cde657901 504 if((tmp1 == I2S_DATAFORMAT_24B)|| \
mbed_official 87:085cde657901 505 (tmp2 == I2S_DATAFORMAT_32B))
mbed_official 87:085cde657901 506 {
mbed_official 87:085cde657901 507 hi2s->TxXferSize = Size*2;
mbed_official 87:085cde657901 508 hi2s->TxXferCount = Size*2;
mbed_official 87:085cde657901 509 }
mbed_official 87:085cde657901 510 else
mbed_official 87:085cde657901 511 {
mbed_official 87:085cde657901 512 hi2s->TxXferSize = Size;
mbed_official 87:085cde657901 513 hi2s->TxXferCount = Size;
mbed_official 87:085cde657901 514 }
mbed_official 87:085cde657901 515
mbed_official 87:085cde657901 516 /* Process Locked */
mbed_official 87:085cde657901 517 __HAL_LOCK(hi2s);
mbed_official 87:085cde657901 518
mbed_official 87:085cde657901 519 hi2s->State = HAL_I2S_STATE_BUSY_TX;
mbed_official 87:085cde657901 520
mbed_official 87:085cde657901 521 /* Check if the I2S is already enabled */
mbed_official 87:085cde657901 522 if((hi2s->Instance->I2SCFGR &SPI_I2SCFGR_I2SE) != SPI_I2SCFGR_I2SE)
mbed_official 87:085cde657901 523 {
mbed_official 87:085cde657901 524 /* Enable I2S peripheral */
mbed_official 87:085cde657901 525 __HAL_I2S_ENABLE(hi2s);
mbed_official 87:085cde657901 526 }
mbed_official 87:085cde657901 527
mbed_official 87:085cde657901 528 while(hi2s->TxXferCount > 0)
mbed_official 87:085cde657901 529 {
mbed_official 87:085cde657901 530 hi2s->Instance->DR = (*pData++);
mbed_official 87:085cde657901 531 hi2s->TxXferCount--;
mbed_official 87:085cde657901 532 /* Wait until TXE flag is set */
mbed_official 87:085cde657901 533 if (I2S_WaitFlagStateUntilTimeout(hi2s, I2S_FLAG_TXE, RESET, Timeout) != HAL_OK)
mbed_official 87:085cde657901 534 {
mbed_official 87:085cde657901 535 return HAL_TIMEOUT;
mbed_official 87:085cde657901 536 }
mbed_official 87:085cde657901 537 }
mbed_official 87:085cde657901 538 /* Wait until Busy flag is reset */
mbed_official 87:085cde657901 539 if (I2S_WaitFlagStateUntilTimeout(hi2s, I2S_FLAG_BSY, SET, Timeout) != HAL_OK)
mbed_official 87:085cde657901 540 {
mbed_official 87:085cde657901 541 return HAL_TIMEOUT;
mbed_official 106:ced8cbb51063 542 }
mbed_official 87:085cde657901 543
mbed_official 87:085cde657901 544 hi2s->State = HAL_I2S_STATE_READY;
mbed_official 87:085cde657901 545
mbed_official 87:085cde657901 546 /* Process Unlocked */
mbed_official 87:085cde657901 547 __HAL_UNLOCK(hi2s);
mbed_official 87:085cde657901 548
mbed_official 87:085cde657901 549 return HAL_OK;
mbed_official 87:085cde657901 550 }
mbed_official 87:085cde657901 551 else
mbed_official 87:085cde657901 552 {
mbed_official 87:085cde657901 553 return HAL_BUSY;
mbed_official 87:085cde657901 554 }
mbed_official 87:085cde657901 555 }
mbed_official 87:085cde657901 556
mbed_official 87:085cde657901 557 /**
mbed_official 87:085cde657901 558 * @brief Receive an amount of data in blocking mode
mbed_official 226:b062af740e40 559 * @param hi2s: pointer to a I2S_HandleTypeDef structure that contains
mbed_official 226:b062af740e40 560 * the configuration information for I2S module
mbed_official 87:085cde657901 561 * @param pData: a 16-bit pointer to data buffer.
mbed_official 87:085cde657901 562 * @param Size: number of data sample to be sent:
mbed_official 87:085cde657901 563 * @note When a 16-bit data frame or a 16-bit data frame extended is selected during the I2S
mbed_official 87:085cde657901 564 * configuration phase, the Size parameter means the number of 16-bit data length
mbed_official 87:085cde657901 565 * in the transaction and when a 24-bit data frame or a 32-bit data frame is selected
mbed_official 87:085cde657901 566 * the Size parameter means the number of 16-bit data length.
mbed_official 87:085cde657901 567 * @param Timeout: Timeout duration
mbed_official 87:085cde657901 568 * @note The I2S is kept enabled at the end of transaction to avoid the clock de-synchronization
mbed_official 87:085cde657901 569 * between Master and Slave(example: audio streaming).
mbed_official 87:085cde657901 570 * @note In I2S Master Receiver mode, just after enabling the peripheral the clock will be generate
mbed_official 87:085cde657901 571 * in continouse way and as the I2S is not disabled at the end of the I2S transaction.
mbed_official 87:085cde657901 572 * @retval HAL status
mbed_official 87:085cde657901 573 */
mbed_official 87:085cde657901 574 HAL_StatusTypeDef HAL_I2S_Receive(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint16_t Size, uint32_t Timeout)
mbed_official 87:085cde657901 575 {
mbed_official 87:085cde657901 576 uint32_t tmp1 = 0, tmp2 = 0;
mbed_official 87:085cde657901 577 if((pData == NULL ) || (Size == 0))
mbed_official 87:085cde657901 578 {
mbed_official 87:085cde657901 579 return HAL_ERROR;
mbed_official 87:085cde657901 580 }
mbed_official 87:085cde657901 581
mbed_official 87:085cde657901 582 if(hi2s->State == HAL_I2S_STATE_READY)
mbed_official 87:085cde657901 583 {
mbed_official 87:085cde657901 584 tmp1 = hi2s->Instance->I2SCFGR & (SPI_I2SCFGR_DATLEN | SPI_I2SCFGR_CHLEN);
mbed_official 87:085cde657901 585 tmp2 = hi2s->Instance->I2SCFGR & (SPI_I2SCFGR_DATLEN | SPI_I2SCFGR_CHLEN);
mbed_official 87:085cde657901 586 if((tmp1 == I2S_DATAFORMAT_24B)|| \
mbed_official 87:085cde657901 587 (tmp2 == I2S_DATAFORMAT_32B))
mbed_official 87:085cde657901 588 {
mbed_official 87:085cde657901 589 hi2s->RxXferSize = Size*2;
mbed_official 87:085cde657901 590 hi2s->RxXferCount = Size*2;
mbed_official 87:085cde657901 591 }
mbed_official 87:085cde657901 592 else
mbed_official 87:085cde657901 593 {
mbed_official 87:085cde657901 594 hi2s->RxXferSize = Size;
mbed_official 87:085cde657901 595 hi2s->RxXferCount = Size;
mbed_official 87:085cde657901 596 }
mbed_official 87:085cde657901 597 /* Process Locked */
mbed_official 87:085cde657901 598 __HAL_LOCK(hi2s);
mbed_official 87:085cde657901 599
mbed_official 87:085cde657901 600 hi2s->State = HAL_I2S_STATE_BUSY_RX;
mbed_official 87:085cde657901 601
mbed_official 87:085cde657901 602 /* Check if the I2S is already enabled */
mbed_official 87:085cde657901 603 if((hi2s->Instance->I2SCFGR & SPI_I2SCFGR_I2SE) != SPI_I2SCFGR_I2SE)
mbed_official 87:085cde657901 604 {
mbed_official 87:085cde657901 605 /* Enable I2S peripheral */
mbed_official 87:085cde657901 606 __HAL_I2S_ENABLE(hi2s);
mbed_official 87:085cde657901 607 }
mbed_official 87:085cde657901 608
mbed_official 87:085cde657901 609 /* Check if Master Receiver mode is selected */
mbed_official 87:085cde657901 610 if((hi2s->Instance->I2SCFGR & SPI_I2SCFGR_I2SCFG) == I2S_MODE_MASTER_RX)
mbed_official 87:085cde657901 611 {
mbed_official 87:085cde657901 612 /* Clear the Overrun Flag by a read operation on the SPI_DR register followed by a read
mbed_official 87:085cde657901 613 access to the SPI_SR register. */
mbed_official 87:085cde657901 614 __HAL_I2S_CLEAR_OVRFLAG(hi2s);
mbed_official 87:085cde657901 615 }
mbed_official 87:085cde657901 616
mbed_official 87:085cde657901 617 /* Receive data */
mbed_official 87:085cde657901 618 while(hi2s->RxXferCount > 0)
mbed_official 87:085cde657901 619 {
mbed_official 87:085cde657901 620 /* Wait until RXNE flag is set */
mbed_official 87:085cde657901 621 if (I2S_WaitFlagStateUntilTimeout(hi2s, I2S_FLAG_RXNE, RESET, Timeout) != HAL_OK)
mbed_official 87:085cde657901 622 {
mbed_official 87:085cde657901 623 return HAL_TIMEOUT;
mbed_official 87:085cde657901 624 }
mbed_official 87:085cde657901 625
mbed_official 87:085cde657901 626 (*pData++) = hi2s->Instance->DR;
mbed_official 87:085cde657901 627 hi2s->RxXferCount--;
mbed_official 87:085cde657901 628 }
mbed_official 87:085cde657901 629
mbed_official 87:085cde657901 630 hi2s->State = HAL_I2S_STATE_READY;
mbed_official 87:085cde657901 631
mbed_official 87:085cde657901 632 /* Process Unlocked */
mbed_official 87:085cde657901 633 __HAL_UNLOCK(hi2s);
mbed_official 87:085cde657901 634
mbed_official 87:085cde657901 635 return HAL_OK;
mbed_official 87:085cde657901 636 }
mbed_official 87:085cde657901 637 else
mbed_official 87:085cde657901 638 {
mbed_official 87:085cde657901 639 return HAL_BUSY;
mbed_official 87:085cde657901 640 }
mbed_official 87:085cde657901 641 }
mbed_official 87:085cde657901 642
mbed_official 87:085cde657901 643 /**
mbed_official 87:085cde657901 644 * @brief Transmit an amount of data in non-blocking mode with Interrupt
mbed_official 226:b062af740e40 645 * @param hi2s: pointer to a I2S_HandleTypeDef structure that contains
mbed_official 226:b062af740e40 646 * the configuration information for I2S module
mbed_official 87:085cde657901 647 * @param pData: a 16-bit pointer to data buffer.
mbed_official 87:085cde657901 648 * @param Size: number of data sample to be sent:
mbed_official 87:085cde657901 649 * @note When a 16-bit data frame or a 16-bit data frame extended is selected during the I2S
mbed_official 87:085cde657901 650 * configuration phase, the Size parameter means the number of 16-bit data length
mbed_official 87:085cde657901 651 * in the transaction and when a 24-bit data frame or a 32-bit data frame is selected
mbed_official 87:085cde657901 652 * the Size parameter means the number of 16-bit data length.
mbed_official 87:085cde657901 653 * @note The I2S is kept enabled at the end of transaction to avoid the clock de-synchronization
mbed_official 87:085cde657901 654 * between Master and Slave(example: audio streaming).
mbed_official 87:085cde657901 655 * @retval HAL status
mbed_official 87:085cde657901 656 */
mbed_official 87:085cde657901 657 HAL_StatusTypeDef HAL_I2S_Transmit_IT(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint16_t Size)
mbed_official 87:085cde657901 658 {
mbed_official 87:085cde657901 659 uint32_t tmp1 = 0, tmp2 = 0;
mbed_official 87:085cde657901 660 if(hi2s->State == HAL_I2S_STATE_READY)
mbed_official 87:085cde657901 661 {
mbed_official 87:085cde657901 662 if((pData == NULL) || (Size == 0))
mbed_official 87:085cde657901 663 {
mbed_official 87:085cde657901 664 return HAL_ERROR;
mbed_official 87:085cde657901 665 }
mbed_official 87:085cde657901 666
mbed_official 87:085cde657901 667 hi2s->pTxBuffPtr = pData;
mbed_official 87:085cde657901 668 tmp1 = hi2s->Instance->I2SCFGR & (SPI_I2SCFGR_DATLEN | SPI_I2SCFGR_CHLEN);
mbed_official 87:085cde657901 669 tmp2 = hi2s->Instance->I2SCFGR & (SPI_I2SCFGR_DATLEN | SPI_I2SCFGR_CHLEN);
mbed_official 87:085cde657901 670 if((tmp1 == I2S_DATAFORMAT_24B)|| \
mbed_official 87:085cde657901 671 (tmp2 == I2S_DATAFORMAT_32B))
mbed_official 87:085cde657901 672 {
mbed_official 87:085cde657901 673 hi2s->TxXferSize = Size*2;
mbed_official 87:085cde657901 674 hi2s->TxXferCount = Size*2;
mbed_official 87:085cde657901 675 }
mbed_official 87:085cde657901 676 else
mbed_official 87:085cde657901 677 {
mbed_official 87:085cde657901 678 hi2s->TxXferSize = Size;
mbed_official 87:085cde657901 679 hi2s->TxXferCount = Size;
mbed_official 87:085cde657901 680 }
mbed_official 87:085cde657901 681
mbed_official 87:085cde657901 682 /* Process Locked */
mbed_official 87:085cde657901 683 __HAL_LOCK(hi2s);
mbed_official 87:085cde657901 684
mbed_official 87:085cde657901 685 hi2s->State = HAL_I2S_STATE_BUSY_TX;
mbed_official 87:085cde657901 686 hi2s->ErrorCode = HAL_I2S_ERROR_NONE;
mbed_official 87:085cde657901 687
mbed_official 87:085cde657901 688 /* Enable TXE and ERR interrupt */
mbed_official 87:085cde657901 689 __HAL_I2S_ENABLE_IT(hi2s, (I2S_IT_TXE | I2S_IT_ERR));
mbed_official 87:085cde657901 690
mbed_official 87:085cde657901 691 /* Check if the I2S is already enabled */
mbed_official 87:085cde657901 692 if((hi2s->Instance->I2SCFGR &SPI_I2SCFGR_I2SE) != SPI_I2SCFGR_I2SE)
mbed_official 87:085cde657901 693 {
mbed_official 87:085cde657901 694 /* Enable I2S peripheral */
mbed_official 87:085cde657901 695 __HAL_I2S_ENABLE(hi2s);
mbed_official 87:085cde657901 696 }
mbed_official 87:085cde657901 697
mbed_official 87:085cde657901 698 /* Process Unlocked */
mbed_official 87:085cde657901 699 __HAL_UNLOCK(hi2s);
mbed_official 87:085cde657901 700
mbed_official 87:085cde657901 701 return HAL_OK;
mbed_official 87:085cde657901 702 }
mbed_official 87:085cde657901 703 else
mbed_official 87:085cde657901 704 {
mbed_official 87:085cde657901 705 return HAL_BUSY;
mbed_official 87:085cde657901 706 }
mbed_official 87:085cde657901 707 }
mbed_official 87:085cde657901 708
mbed_official 87:085cde657901 709 /**
mbed_official 87:085cde657901 710 * @brief Receive an amount of data in non-blocking mode with Interrupt
mbed_official 226:b062af740e40 711 * @param hi2s: pointer to a I2S_HandleTypeDef structure that contains
mbed_official 226:b062af740e40 712 * the configuration information for I2S module
mbed_official 87:085cde657901 713 * @param pData: a 16-bit pointer to the Receive data buffer.
mbed_official 87:085cde657901 714 * @param Size: number of data sample to be sent:
mbed_official 87:085cde657901 715 * @note When a 16-bit data frame or a 16-bit data frame extended is selected during the I2S
mbed_official 87:085cde657901 716 * configuration phase, the Size parameter means the number of 16-bit data length
mbed_official 87:085cde657901 717 * in the transaction and when a 24-bit data frame or a 32-bit data frame is selected
mbed_official 87:085cde657901 718 * the Size parameter means the number of 16-bit data length.
mbed_official 87:085cde657901 719 * @note The I2S is kept enabled at the end of transaction to avoid the clock de-synchronization
mbed_official 87:085cde657901 720 * between Master and Slave(example: audio streaming).
mbed_official 87:085cde657901 721 * @note It is recommended to use DMA for the I2S receiver to avoid de-synchronisation
mbed_official 87:085cde657901 722 * between Master and Slave otherwise the I2S interrupt should be optimized.
mbed_official 87:085cde657901 723 * @retval HAL status
mbed_official 87:085cde657901 724 */
mbed_official 87:085cde657901 725 HAL_StatusTypeDef HAL_I2S_Receive_IT(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint16_t Size)
mbed_official 87:085cde657901 726 {
mbed_official 87:085cde657901 727 uint32_t tmp1 = 0, tmp2 = 0;
mbed_official 87:085cde657901 728 if(hi2s->State == HAL_I2S_STATE_READY)
mbed_official 87:085cde657901 729 {
mbed_official 87:085cde657901 730 if((pData == NULL) || (Size == 0))
mbed_official 87:085cde657901 731 {
mbed_official 87:085cde657901 732 return HAL_ERROR;
mbed_official 87:085cde657901 733 }
mbed_official 87:085cde657901 734
mbed_official 87:085cde657901 735 hi2s->pRxBuffPtr = pData;
mbed_official 87:085cde657901 736 tmp1 = hi2s->Instance->I2SCFGR & (SPI_I2SCFGR_DATLEN | SPI_I2SCFGR_CHLEN);
mbed_official 87:085cde657901 737 tmp2 = hi2s->Instance->I2SCFGR & (SPI_I2SCFGR_DATLEN | SPI_I2SCFGR_CHLEN);
mbed_official 87:085cde657901 738 if((tmp1 == I2S_DATAFORMAT_24B)||\
mbed_official 87:085cde657901 739 (tmp2 == I2S_DATAFORMAT_32B))
mbed_official 87:085cde657901 740 {
mbed_official 87:085cde657901 741 hi2s->RxXferSize = Size*2;
mbed_official 87:085cde657901 742 hi2s->RxXferCount = Size*2;
mbed_official 87:085cde657901 743 }
mbed_official 87:085cde657901 744 else
mbed_official 87:085cde657901 745 {
mbed_official 87:085cde657901 746 hi2s->RxXferSize = Size;
mbed_official 87:085cde657901 747 hi2s->RxXferCount = Size;
mbed_official 87:085cde657901 748 }
mbed_official 87:085cde657901 749 /* Process Locked */
mbed_official 87:085cde657901 750 __HAL_LOCK(hi2s);
mbed_official 87:085cde657901 751
mbed_official 87:085cde657901 752 hi2s->State = HAL_I2S_STATE_BUSY_RX;
mbed_official 87:085cde657901 753 hi2s->ErrorCode = HAL_I2S_ERROR_NONE;
mbed_official 87:085cde657901 754
mbed_official 87:085cde657901 755 /* Enable TXE and ERR interrupt */
mbed_official 87:085cde657901 756 __HAL_I2S_ENABLE_IT(hi2s, (I2S_IT_RXNE | I2S_IT_ERR));
mbed_official 87:085cde657901 757
mbed_official 87:085cde657901 758 /* Check if the I2S is already enabled */
mbed_official 87:085cde657901 759 if((hi2s->Instance->I2SCFGR &SPI_I2SCFGR_I2SE) != SPI_I2SCFGR_I2SE)
mbed_official 87:085cde657901 760 {
mbed_official 87:085cde657901 761 /* Enable I2S peripheral */
mbed_official 87:085cde657901 762 __HAL_I2S_ENABLE(hi2s);
mbed_official 87:085cde657901 763 }
mbed_official 87:085cde657901 764
mbed_official 87:085cde657901 765 /* Process Unlocked */
mbed_official 87:085cde657901 766 __HAL_UNLOCK(hi2s);
mbed_official 87:085cde657901 767
mbed_official 87:085cde657901 768 return HAL_OK;
mbed_official 87:085cde657901 769 }
mbed_official 87:085cde657901 770
mbed_official 87:085cde657901 771 else
mbed_official 87:085cde657901 772 {
mbed_official 87:085cde657901 773 return HAL_BUSY;
mbed_official 87:085cde657901 774 }
mbed_official 87:085cde657901 775 }
mbed_official 87:085cde657901 776
mbed_official 87:085cde657901 777 /**
mbed_official 87:085cde657901 778 * @brief Transmit an amount of data in non-blocking mode with DMA
mbed_official 226:b062af740e40 779 * @param hi2s: pointer to a I2S_HandleTypeDef structure that contains
mbed_official 226:b062af740e40 780 * the configuration information for I2S module
mbed_official 87:085cde657901 781 * @param pData: a 16-bit pointer to the Transmit data buffer.
mbed_official 87:085cde657901 782 * @param Size: number of data sample to be sent:
mbed_official 87:085cde657901 783 * @note When a 16-bit data frame or a 16-bit data frame extended is selected during the I2S
mbed_official 87:085cde657901 784 * configuration phase, the Size parameter means the number of 16-bit data length
mbed_official 87:085cde657901 785 * in the transaction and when a 24-bit data frame or a 32-bit data frame is selected
mbed_official 87:085cde657901 786 * the Size parameter means the number of 16-bit data length.
mbed_official 87:085cde657901 787 * @note The I2S is kept enabled at the end of transaction to avoid the clock de-synchronization
mbed_official 87:085cde657901 788 * between Master and Slave(example: audio streaming).
mbed_official 87:085cde657901 789 * @retval HAL status
mbed_official 87:085cde657901 790 */
mbed_official 87:085cde657901 791 HAL_StatusTypeDef HAL_I2S_Transmit_DMA(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint16_t Size)
mbed_official 87:085cde657901 792 {
mbed_official 87:085cde657901 793 uint32_t *tmp;
mbed_official 87:085cde657901 794 uint32_t tmp1 = 0, tmp2 = 0;
mbed_official 87:085cde657901 795
mbed_official 87:085cde657901 796 if((pData == NULL) || (Size == 0))
mbed_official 87:085cde657901 797 {
mbed_official 87:085cde657901 798 return HAL_ERROR;
mbed_official 87:085cde657901 799 }
mbed_official 87:085cde657901 800
mbed_official 87:085cde657901 801 if(hi2s->State == HAL_I2S_STATE_READY)
mbed_official 87:085cde657901 802 {
mbed_official 87:085cde657901 803 hi2s->pTxBuffPtr = pData;
mbed_official 87:085cde657901 804 tmp1 = hi2s->Instance->I2SCFGR & (SPI_I2SCFGR_DATLEN | SPI_I2SCFGR_CHLEN);
mbed_official 87:085cde657901 805 tmp2 = hi2s->Instance->I2SCFGR & (SPI_I2SCFGR_DATLEN | SPI_I2SCFGR_CHLEN);
mbed_official 87:085cde657901 806 if((tmp1 == I2S_DATAFORMAT_24B)|| \
mbed_official 87:085cde657901 807 (tmp2 == I2S_DATAFORMAT_32B))
mbed_official 87:085cde657901 808 {
mbed_official 87:085cde657901 809 hi2s->TxXferSize = Size*2;
mbed_official 87:085cde657901 810 hi2s->TxXferCount = Size*2;
mbed_official 87:085cde657901 811 }
mbed_official 87:085cde657901 812 else
mbed_official 87:085cde657901 813 {
mbed_official 87:085cde657901 814 hi2s->TxXferSize = Size;
mbed_official 87:085cde657901 815 hi2s->TxXferCount = Size;
mbed_official 87:085cde657901 816 }
mbed_official 87:085cde657901 817
mbed_official 87:085cde657901 818 /* Process Locked */
mbed_official 87:085cde657901 819 __HAL_LOCK(hi2s);
mbed_official 87:085cde657901 820
mbed_official 87:085cde657901 821 hi2s->State = HAL_I2S_STATE_BUSY_TX;
mbed_official 87:085cde657901 822 hi2s->ErrorCode = HAL_I2S_ERROR_NONE;
mbed_official 87:085cde657901 823
mbed_official 87:085cde657901 824 /* Set the I2S Tx DMA Half transfert complete callback */
mbed_official 87:085cde657901 825 hi2s->hdmatx->XferHalfCpltCallback = I2S_DMATxHalfCplt;
mbed_official 87:085cde657901 826
mbed_official 87:085cde657901 827 /* Set the I2S Tx DMA transfert complete callback */
mbed_official 87:085cde657901 828 hi2s->hdmatx->XferCpltCallback = I2S_DMATxCplt;
mbed_official 87:085cde657901 829
mbed_official 87:085cde657901 830 /* Set the DMA error callback */
mbed_official 87:085cde657901 831 hi2s->hdmatx->XferErrorCallback = I2S_DMAError;
mbed_official 87:085cde657901 832
mbed_official 87:085cde657901 833 /* Enable the Tx DMA Stream */
mbed_official 87:085cde657901 834 tmp = (uint32_t*)&pData;
mbed_official 87:085cde657901 835 HAL_DMA_Start_IT(hi2s->hdmatx, *(uint32_t*)tmp, (uint32_t)&hi2s->Instance->DR, hi2s->TxXferSize);
mbed_official 87:085cde657901 836
mbed_official 87:085cde657901 837 /* Check if the I2S is already enabled */
mbed_official 87:085cde657901 838 if((hi2s->Instance->I2SCFGR &SPI_I2SCFGR_I2SE) != SPI_I2SCFGR_I2SE)
mbed_official 87:085cde657901 839 {
mbed_official 87:085cde657901 840 /* Enable I2S peripheral */
mbed_official 87:085cde657901 841 __HAL_I2S_ENABLE(hi2s);
mbed_official 87:085cde657901 842 }
mbed_official 87:085cde657901 843
mbed_official 87:085cde657901 844 /* Check if the I2S Tx request is already enabled */
mbed_official 87:085cde657901 845 if((hi2s->Instance->CR2 & SPI_CR2_TXDMAEN) != SPI_CR2_TXDMAEN)
mbed_official 87:085cde657901 846 {
mbed_official 87:085cde657901 847 /* Enable Tx DMA Request */
mbed_official 87:085cde657901 848 hi2s->Instance->CR2 |= SPI_CR2_TXDMAEN;
mbed_official 87:085cde657901 849 }
mbed_official 87:085cde657901 850
mbed_official 87:085cde657901 851 /* Process Unlocked */
mbed_official 87:085cde657901 852 __HAL_UNLOCK(hi2s);
mbed_official 87:085cde657901 853
mbed_official 87:085cde657901 854 return HAL_OK;
mbed_official 87:085cde657901 855 }
mbed_official 87:085cde657901 856 else
mbed_official 87:085cde657901 857 {
mbed_official 87:085cde657901 858 return HAL_BUSY;
mbed_official 87:085cde657901 859 }
mbed_official 87:085cde657901 860 }
mbed_official 87:085cde657901 861
mbed_official 87:085cde657901 862 /**
mbed_official 87:085cde657901 863 * @brief Receive an amount of data in non-blocking mode with DMA
mbed_official 226:b062af740e40 864 * @param hi2s: pointer to a I2S_HandleTypeDef structure that contains
mbed_official 226:b062af740e40 865 * the configuration information for I2S module
mbed_official 87:085cde657901 866 * @param pData: a 16-bit pointer to the Receive data buffer.
mbed_official 87:085cde657901 867 * @param Size: number of data sample to be sent:
mbed_official 87:085cde657901 868 * @note When a 16-bit data frame or a 16-bit data frame extended is selected during the I2S
mbed_official 87:085cde657901 869 * configuration phase, the Size parameter means the number of 16-bit data length
mbed_official 87:085cde657901 870 * in the transaction and when a 24-bit data frame or a 32-bit data frame is selected
mbed_official 87:085cde657901 871 * the Size parameter means the number of 16-bit data length.
mbed_official 87:085cde657901 872 * @note The I2S is kept enabled at the end of transaction to avoid the clock de-synchronization
mbed_official 87:085cde657901 873 * between Master and Slave(example: audio streaming).
mbed_official 87:085cde657901 874 * @retval HAL status
mbed_official 87:085cde657901 875 */
mbed_official 87:085cde657901 876 HAL_StatusTypeDef HAL_I2S_Receive_DMA(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint16_t Size)
mbed_official 87:085cde657901 877 {
mbed_official 87:085cde657901 878 uint32_t *tmp;
mbed_official 87:085cde657901 879 uint32_t tmp1 = 0, tmp2 = 0;
mbed_official 87:085cde657901 880
mbed_official 87:085cde657901 881 if((pData == NULL) || (Size == 0))
mbed_official 87:085cde657901 882 {
mbed_official 87:085cde657901 883 return HAL_ERROR;
mbed_official 87:085cde657901 884 }
mbed_official 87:085cde657901 885
mbed_official 87:085cde657901 886 if(hi2s->State == HAL_I2S_STATE_READY)
mbed_official 87:085cde657901 887 {
mbed_official 87:085cde657901 888 hi2s->pRxBuffPtr = pData;
mbed_official 87:085cde657901 889 tmp1 = hi2s->Instance->I2SCFGR & (SPI_I2SCFGR_DATLEN | SPI_I2SCFGR_CHLEN);
mbed_official 87:085cde657901 890 tmp2 = hi2s->Instance->I2SCFGR & (SPI_I2SCFGR_DATLEN | SPI_I2SCFGR_CHLEN);
mbed_official 87:085cde657901 891 if((tmp1 == I2S_DATAFORMAT_24B)|| \
mbed_official 87:085cde657901 892 (tmp2 == I2S_DATAFORMAT_32B))
mbed_official 87:085cde657901 893 {
mbed_official 87:085cde657901 894 hi2s->RxXferSize = Size*2;
mbed_official 87:085cde657901 895 hi2s->RxXferCount = Size*2;
mbed_official 87:085cde657901 896 }
mbed_official 87:085cde657901 897 else
mbed_official 87:085cde657901 898 {
mbed_official 87:085cde657901 899 hi2s->RxXferSize = Size;
mbed_official 87:085cde657901 900 hi2s->RxXferCount = Size;
mbed_official 87:085cde657901 901 }
mbed_official 87:085cde657901 902 /* Process Locked */
mbed_official 87:085cde657901 903 __HAL_LOCK(hi2s);
mbed_official 87:085cde657901 904
mbed_official 87:085cde657901 905 hi2s->State = HAL_I2S_STATE_BUSY_RX;
mbed_official 87:085cde657901 906 hi2s->ErrorCode = HAL_I2S_ERROR_NONE;
mbed_official 87:085cde657901 907
mbed_official 87:085cde657901 908 /* Set the I2S Rx DMA Half transfert complete callback */
mbed_official 87:085cde657901 909 hi2s->hdmarx->XferHalfCpltCallback = I2S_DMARxHalfCplt;
mbed_official 87:085cde657901 910
mbed_official 87:085cde657901 911 /* Set the I2S Rx DMA transfert complete callback */
mbed_official 87:085cde657901 912 hi2s->hdmarx->XferCpltCallback = I2S_DMARxCplt;
mbed_official 87:085cde657901 913
mbed_official 87:085cde657901 914 /* Set the DMA error callback */
mbed_official 87:085cde657901 915 hi2s->hdmarx->XferErrorCallback = I2S_DMAError;
mbed_official 87:085cde657901 916
mbed_official 87:085cde657901 917 /* Check if Master Receiver mode is selected */
mbed_official 87:085cde657901 918 if((hi2s->Instance->I2SCFGR & SPI_I2SCFGR_I2SCFG) == I2S_MODE_MASTER_RX)
mbed_official 87:085cde657901 919 {
mbed_official 87:085cde657901 920 /* Clear the Overrun Flag by a read operation to the SPI_DR register followed by a read
mbed_official 87:085cde657901 921 access to the SPI_SR register. */
mbed_official 87:085cde657901 922 __HAL_I2S_CLEAR_OVRFLAG(hi2s);
mbed_official 87:085cde657901 923 }
mbed_official 87:085cde657901 924
mbed_official 87:085cde657901 925 /* Enable the Rx DMA Stream */
mbed_official 87:085cde657901 926 tmp = (uint32_t*)&pData;
mbed_official 87:085cde657901 927 HAL_DMA_Start_IT(hi2s->hdmarx, (uint32_t)&hi2s->Instance->DR, *(uint32_t*)tmp, hi2s->RxXferSize);
mbed_official 87:085cde657901 928
mbed_official 87:085cde657901 929 /* Check if the I2S is already enabled */
mbed_official 87:085cde657901 930 if((hi2s->Instance->I2SCFGR &SPI_I2SCFGR_I2SE) != SPI_I2SCFGR_I2SE)
mbed_official 87:085cde657901 931 {
mbed_official 87:085cde657901 932 /* Enable I2S peripheral */
mbed_official 87:085cde657901 933 __HAL_I2S_ENABLE(hi2s);
mbed_official 87:085cde657901 934 }
mbed_official 87:085cde657901 935
mbed_official 87:085cde657901 936 /* Check if the I2S Rx request is already enabled */
mbed_official 87:085cde657901 937 if((hi2s->Instance->CR2 &SPI_CR2_RXDMAEN) != SPI_CR2_RXDMAEN)
mbed_official 87:085cde657901 938 {
mbed_official 87:085cde657901 939 /* Enable Rx DMA Request */
mbed_official 87:085cde657901 940 hi2s->Instance->CR2 |= SPI_CR2_RXDMAEN;
mbed_official 87:085cde657901 941 }
mbed_official 87:085cde657901 942
mbed_official 87:085cde657901 943 /* Process Unlocked */
mbed_official 87:085cde657901 944 __HAL_UNLOCK(hi2s);
mbed_official 87:085cde657901 945
mbed_official 87:085cde657901 946 return HAL_OK;
mbed_official 87:085cde657901 947 }
mbed_official 87:085cde657901 948 else
mbed_official 87:085cde657901 949 {
mbed_official 87:085cde657901 950 return HAL_BUSY;
mbed_official 87:085cde657901 951 }
mbed_official 87:085cde657901 952 }
mbed_official 87:085cde657901 953
mbed_official 87:085cde657901 954 /**
mbed_official 87:085cde657901 955 * @brief Pauses the audio stream playing from the Media.
mbed_official 226:b062af740e40 956 * @param hi2s: pointer to a I2S_HandleTypeDef structure that contains
mbed_official 226:b062af740e40 957 * the configuration information for I2S module
mbed_official 226:b062af740e40 958 * @retval HAL status
mbed_official 87:085cde657901 959 */
mbed_official 87:085cde657901 960 HAL_StatusTypeDef HAL_I2S_DMAPause(I2S_HandleTypeDef *hi2s)
mbed_official 87:085cde657901 961 {
mbed_official 87:085cde657901 962 /* Process Locked */
mbed_official 87:085cde657901 963 __HAL_LOCK(hi2s);
mbed_official 87:085cde657901 964
mbed_official 87:085cde657901 965 if(hi2s->State == HAL_I2S_STATE_BUSY_TX)
mbed_official 87:085cde657901 966 {
mbed_official 87:085cde657901 967 /* Disable the I2S DMA Tx request */
mbed_official 87:085cde657901 968 hi2s->Instance->CR2 &= (uint32_t)(~SPI_CR2_TXDMAEN);
mbed_official 87:085cde657901 969 }
mbed_official 87:085cde657901 970 else if(hi2s->State == HAL_I2S_STATE_BUSY_RX)
mbed_official 87:085cde657901 971 {
mbed_official 87:085cde657901 972 /* Disable the I2S DMA Rx request */
mbed_official 87:085cde657901 973 hi2s->Instance->CR2 &= (uint32_t)(~SPI_CR2_RXDMAEN);
mbed_official 87:085cde657901 974 }
mbed_official 87:085cde657901 975 else if(hi2s->State == HAL_I2S_STATE_BUSY_TX_RX)
mbed_official 87:085cde657901 976 {
mbed_official 87:085cde657901 977 if((hi2s->Init.Mode == I2S_MODE_SLAVE_TX)||(hi2s->Init.Mode == I2S_MODE_MASTER_TX))
mbed_official 87:085cde657901 978 {
mbed_official 87:085cde657901 979 /* Disable the I2S DMA Tx request */
mbed_official 87:085cde657901 980 hi2s->Instance->CR2 &= (uint32_t)(~SPI_CR2_TXDMAEN);
mbed_official 87:085cde657901 981 /* Disable the I2SEx Rx DMA Request */
mbed_official 87:085cde657901 982 I2SxEXT(hi2s->Instance)->CR2 &= (uint32_t)(~SPI_CR2_RXDMAEN);
mbed_official 87:085cde657901 983 }
mbed_official 87:085cde657901 984 else
mbed_official 87:085cde657901 985 {
mbed_official 87:085cde657901 986 /* Disable the I2S DMA Rx request */
mbed_official 87:085cde657901 987 hi2s->Instance->CR2 &= (uint32_t)(~SPI_CR2_RXDMAEN);
mbed_official 87:085cde657901 988 /* Disable the I2SEx Tx DMA Request */
mbed_official 87:085cde657901 989 I2SxEXT(hi2s->Instance)->CR2 &= (uint32_t)(~SPI_CR2_TXDMAEN);
mbed_official 87:085cde657901 990 }
mbed_official 87:085cde657901 991 }
mbed_official 87:085cde657901 992
mbed_official 87:085cde657901 993 /* Process Unlocked */
mbed_official 87:085cde657901 994 __HAL_UNLOCK(hi2s);
mbed_official 87:085cde657901 995
mbed_official 87:085cde657901 996 return HAL_OK;
mbed_official 87:085cde657901 997 }
mbed_official 87:085cde657901 998
mbed_official 87:085cde657901 999 /**
mbed_official 87:085cde657901 1000 * @brief Resumes the audio stream playing from the Media.
mbed_official 226:b062af740e40 1001 * @param hi2s: pointer to a I2S_HandleTypeDef structure that contains
mbed_official 226:b062af740e40 1002 * the configuration information for I2S module
mbed_official 226:b062af740e40 1003 * @retval HAL status
mbed_official 87:085cde657901 1004 */
mbed_official 87:085cde657901 1005 HAL_StatusTypeDef HAL_I2S_DMAResume(I2S_HandleTypeDef *hi2s)
mbed_official 87:085cde657901 1006 {
mbed_official 87:085cde657901 1007 /* Process Locked */
mbed_official 87:085cde657901 1008 __HAL_LOCK(hi2s);
mbed_official 87:085cde657901 1009
mbed_official 87:085cde657901 1010 if(hi2s->State == HAL_I2S_STATE_BUSY_TX)
mbed_official 87:085cde657901 1011 {
mbed_official 87:085cde657901 1012 /* Enable the I2S DMA Tx request */
mbed_official 87:085cde657901 1013 hi2s->Instance->CR2 |= SPI_CR2_TXDMAEN;
mbed_official 87:085cde657901 1014 }
mbed_official 87:085cde657901 1015 else if(hi2s->State == HAL_I2S_STATE_BUSY_RX)
mbed_official 87:085cde657901 1016 {
mbed_official 87:085cde657901 1017 /* Enable the I2S DMA Rx request */
mbed_official 87:085cde657901 1018 hi2s->Instance->CR2 |= SPI_CR2_RXDMAEN;
mbed_official 87:085cde657901 1019 }
mbed_official 87:085cde657901 1020 else if(hi2s->State == HAL_I2S_STATE_BUSY_TX_RX)
mbed_official 87:085cde657901 1021 {
mbed_official 87:085cde657901 1022 if((hi2s->Init.Mode == I2S_MODE_SLAVE_TX)||(hi2s->Init.Mode == I2S_MODE_MASTER_TX))
mbed_official 87:085cde657901 1023 {
mbed_official 87:085cde657901 1024 /* Enable the I2S DMA Tx request */
mbed_official 87:085cde657901 1025 hi2s->Instance->CR2 |= SPI_CR2_TXDMAEN;
mbed_official 87:085cde657901 1026 /* Disable the I2SEx Rx DMA Request */
mbed_official 87:085cde657901 1027 I2SxEXT(hi2s->Instance)->CR2 |= SPI_CR2_RXDMAEN;
mbed_official 87:085cde657901 1028 }
mbed_official 87:085cde657901 1029 else
mbed_official 87:085cde657901 1030 {
mbed_official 87:085cde657901 1031 /* Enable the I2S DMA Rx request */
mbed_official 87:085cde657901 1032 hi2s->Instance->CR2 |= SPI_CR2_RXDMAEN;
mbed_official 87:085cde657901 1033 /* Enable the I2SEx Tx DMA Request */
mbed_official 87:085cde657901 1034 I2SxEXT(hi2s->Instance)->CR2 |= SPI_CR2_TXDMAEN;
mbed_official 87:085cde657901 1035 }
mbed_official 87:085cde657901 1036 }
mbed_official 87:085cde657901 1037
mbed_official 87:085cde657901 1038 /* If the I2S peripheral is still not enabled, enable it */
mbed_official 87:085cde657901 1039 if ((hi2s->Instance->I2SCFGR & SPI_I2SCFGR_I2SE) == 0)
mbed_official 87:085cde657901 1040 {
mbed_official 87:085cde657901 1041 /* Enable I2S peripheral */
mbed_official 87:085cde657901 1042 __HAL_I2S_ENABLE(hi2s);
mbed_official 87:085cde657901 1043 }
mbed_official 87:085cde657901 1044
mbed_official 87:085cde657901 1045 /* Process Unlocked */
mbed_official 87:085cde657901 1046 __HAL_UNLOCK(hi2s);
mbed_official 87:085cde657901 1047
mbed_official 87:085cde657901 1048 return HAL_OK;
mbed_official 87:085cde657901 1049 }
mbed_official 87:085cde657901 1050
mbed_official 87:085cde657901 1051 /**
mbed_official 87:085cde657901 1052 * @brief Resumes the audio stream playing from the Media.
mbed_official 226:b062af740e40 1053 * @param hi2s: pointer to a I2S_HandleTypeDef structure that contains
mbed_official 226:b062af740e40 1054 * the configuration information for I2S module
mbed_official 226:b062af740e40 1055 * @retval HAL status
mbed_official 87:085cde657901 1056 */
mbed_official 87:085cde657901 1057 HAL_StatusTypeDef HAL_I2S_DMAStop(I2S_HandleTypeDef *hi2s)
mbed_official 87:085cde657901 1058 {
mbed_official 87:085cde657901 1059 /* Process Locked */
mbed_official 87:085cde657901 1060 __HAL_LOCK(hi2s);
mbed_official 87:085cde657901 1061
mbed_official 87:085cde657901 1062 /* Disable the I2S Tx/Rx DMA requests */
mbed_official 87:085cde657901 1063 hi2s->Instance->CR2 &= ~SPI_CR2_TXDMAEN;
mbed_official 87:085cde657901 1064 hi2s->Instance->CR2 &= ~SPI_CR2_RXDMAEN;
mbed_official 87:085cde657901 1065
mbed_official 87:085cde657901 1066 if(hi2s->Init.FullDuplexMode == I2S_FULLDUPLEXMODE_ENABLE)
mbed_official 87:085cde657901 1067 {
mbed_official 87:085cde657901 1068 /* Disable the I2S extended Tx/Rx DMA requests */
mbed_official 87:085cde657901 1069 I2SxEXT(hi2s->Instance)->CR2 &= (uint32_t)(~SPI_CR2_TXDMAEN);
mbed_official 87:085cde657901 1070 I2SxEXT(hi2s->Instance)->CR2 &= (uint32_t)(~SPI_CR2_RXDMAEN);
mbed_official 87:085cde657901 1071 }
mbed_official 87:085cde657901 1072
mbed_official 106:ced8cbb51063 1073 /* Abort the I2S DMA Stream tx */
mbed_official 106:ced8cbb51063 1074 if(hi2s->hdmatx != NULL)
mbed_official 106:ced8cbb51063 1075 {
mbed_official 106:ced8cbb51063 1076 HAL_DMA_Abort(hi2s->hdmatx);
mbed_official 106:ced8cbb51063 1077 }
mbed_official 106:ced8cbb51063 1078 /* Abort the I2S DMA Stream rx */
mbed_official 106:ced8cbb51063 1079 if(hi2s->hdmarx != NULL)
mbed_official 106:ced8cbb51063 1080 {
mbed_official 106:ced8cbb51063 1081 HAL_DMA_Abort(hi2s->hdmarx);
mbed_official 106:ced8cbb51063 1082 }
mbed_official 106:ced8cbb51063 1083
mbed_official 87:085cde657901 1084 /* Disable I2S peripheral */
mbed_official 87:085cde657901 1085 __HAL_I2S_DISABLE(hi2s);
mbed_official 87:085cde657901 1086
mbed_official 87:085cde657901 1087 if(hi2s->Init.FullDuplexMode == I2S_FULLDUPLEXMODE_ENABLE)
mbed_official 87:085cde657901 1088 {
mbed_official 87:085cde657901 1089 /* Disable the I2Sext peripheral */
mbed_official 87:085cde657901 1090 I2SxEXT(hi2s->Instance)->I2SCFGR &= ~SPI_I2SCFGR_I2SE;
mbed_official 87:085cde657901 1091 }
mbed_official 87:085cde657901 1092
mbed_official 87:085cde657901 1093 hi2s->State = HAL_I2S_STATE_READY;
mbed_official 87:085cde657901 1094
mbed_official 87:085cde657901 1095 /* Process Unlocked */
mbed_official 87:085cde657901 1096 __HAL_UNLOCK(hi2s);
mbed_official 87:085cde657901 1097
mbed_official 87:085cde657901 1098 return HAL_OK;
mbed_official 87:085cde657901 1099 }
mbed_official 87:085cde657901 1100
mbed_official 87:085cde657901 1101 /**
mbed_official 87:085cde657901 1102 * @brief This function handles I2S interrupt request.
mbed_official 226:b062af740e40 1103 * @param hi2s: pointer to a I2S_HandleTypeDef structure that contains
mbed_official 226:b062af740e40 1104 * the configuration information for I2S module
mbed_official 226:b062af740e40 1105 * @retval None
mbed_official 87:085cde657901 1106 */
mbed_official 87:085cde657901 1107 void HAL_I2S_IRQHandler(I2S_HandleTypeDef *hi2s)
mbed_official 87:085cde657901 1108 {
mbed_official 87:085cde657901 1109 uint32_t tmp1 = 0, tmp2 = 0;
mbed_official 87:085cde657901 1110 if(hi2s->Init.FullDuplexMode != I2S_FULLDUPLEXMODE_ENABLE)
mbed_official 87:085cde657901 1111 {
mbed_official 87:085cde657901 1112 if(hi2s->State == HAL_I2S_STATE_BUSY_RX)
mbed_official 87:085cde657901 1113 {
mbed_official 87:085cde657901 1114 tmp1 = __HAL_I2S_GET_FLAG(hi2s, I2S_FLAG_RXNE);
mbed_official 87:085cde657901 1115 tmp2 = __HAL_I2S_GET_IT_SOURCE(hi2s, I2S_IT_RXNE);
mbed_official 87:085cde657901 1116 /* I2S in mode Receiver ------------------------------------------------*/
mbed_official 87:085cde657901 1117 if((tmp1 != RESET) && (tmp2 != RESET))
mbed_official 87:085cde657901 1118 {
mbed_official 87:085cde657901 1119 I2S_Receive_IT(hi2s);
mbed_official 87:085cde657901 1120 }
mbed_official 87:085cde657901 1121
mbed_official 87:085cde657901 1122 tmp1 = __HAL_I2S_GET_FLAG(hi2s, I2S_FLAG_OVR);
mbed_official 87:085cde657901 1123 tmp2 = __HAL_I2S_GET_IT_SOURCE(hi2s, I2S_IT_ERR);
mbed_official 226:b062af740e40 1124 /* I2S Overrun error interrupt occurred ---------------------------------*/
mbed_official 87:085cde657901 1125 if((tmp1 != RESET) && (tmp2 != RESET))
mbed_official 87:085cde657901 1126 {
mbed_official 87:085cde657901 1127 __HAL_I2S_CLEAR_OVRFLAG(hi2s);
mbed_official 87:085cde657901 1128 hi2s->ErrorCode |= HAL_I2S_ERROR_OVR;
mbed_official 87:085cde657901 1129 }
mbed_official 87:085cde657901 1130 }
mbed_official 87:085cde657901 1131
mbed_official 87:085cde657901 1132 if(hi2s->State == HAL_I2S_STATE_BUSY_TX)
mbed_official 87:085cde657901 1133 {
mbed_official 87:085cde657901 1134 tmp1 = __HAL_I2S_GET_FLAG(hi2s, I2S_FLAG_TXE);
mbed_official 87:085cde657901 1135 tmp2 = __HAL_I2S_GET_IT_SOURCE(hi2s, I2S_IT_TXE);
mbed_official 87:085cde657901 1136 /* I2S in mode Tramitter -----------------------------------------------*/
mbed_official 87:085cde657901 1137 if((tmp1 != RESET) && (tmp2 != RESET))
mbed_official 87:085cde657901 1138 {
mbed_official 87:085cde657901 1139 I2S_Transmit_IT(hi2s);
mbed_official 87:085cde657901 1140 }
mbed_official 87:085cde657901 1141
mbed_official 87:085cde657901 1142 tmp1 = __HAL_I2S_GET_FLAG(hi2s, I2S_FLAG_UDR);
mbed_official 87:085cde657901 1143 tmp2 = __HAL_I2S_GET_IT_SOURCE(hi2s, I2S_IT_ERR);
mbed_official 226:b062af740e40 1144 /* I2S Underrun error interrupt occurred --------------------------------*/
mbed_official 87:085cde657901 1145 if((tmp1 != RESET) && (tmp2 != RESET))
mbed_official 87:085cde657901 1146 {
mbed_official 87:085cde657901 1147 __HAL_I2S_CLEAR_UDRFLAG(hi2s);
mbed_official 87:085cde657901 1148 hi2s->ErrorCode |= HAL_I2S_ERROR_UDR;
mbed_official 87:085cde657901 1149 }
mbed_official 87:085cde657901 1150 }
mbed_official 87:085cde657901 1151 }
mbed_official 87:085cde657901 1152 else
mbed_official 87:085cde657901 1153 {
mbed_official 87:085cde657901 1154 tmp1 = hi2s->Instance->I2SCFGR & SPI_I2SCFGR_I2SCFG;
mbed_official 87:085cde657901 1155 tmp2 = hi2s->Instance->I2SCFGR & SPI_I2SCFGR_I2SCFG;
mbed_official 87:085cde657901 1156 /* Check if the I2S_MODE_MASTER_TX or I2S_MODE_SLAVE_TX Mode is selected */
mbed_official 87:085cde657901 1157 if((tmp1 == I2S_MODE_MASTER_TX) || (tmp2 == I2S_MODE_SLAVE_TX))
mbed_official 87:085cde657901 1158 {
mbed_official 87:085cde657901 1159 tmp1 = I2SxEXT(hi2s->Instance)->SR & SPI_SR_RXNE;
mbed_official 87:085cde657901 1160 tmp2 = I2SxEXT(hi2s->Instance)->CR2 & I2S_IT_RXNE;
mbed_official 87:085cde657901 1161 /* I2Sext in mode Receiver ---------------------------------------------*/
mbed_official 87:085cde657901 1162 if((tmp1 == SPI_SR_RXNE) && (tmp2 == I2S_IT_RXNE))
mbed_official 87:085cde657901 1163 {
mbed_official 87:085cde657901 1164 tmp1 = hi2s->Instance->I2SCFGR & SPI_I2SCFGR_I2SCFG;
mbed_official 87:085cde657901 1165 tmp2 = hi2s->Instance->I2SCFGR & SPI_I2SCFGR_I2SCFG;
mbed_official 87:085cde657901 1166 /* When the I2S mode is configured as I2S_MODE_MASTER_TX or I2S_MODE_SLAVE_TX,
mbed_official 87:085cde657901 1167 the I2Sext RXNE interrupt will be generated to manage the full-duplex receive phase. */
mbed_official 87:085cde657901 1168 if((tmp1 == I2S_MODE_MASTER_TX) || (tmp2 == I2S_MODE_SLAVE_TX))
mbed_official 87:085cde657901 1169 {
mbed_official 87:085cde657901 1170 I2SEx_TransmitReceive_IT(hi2s);
mbed_official 87:085cde657901 1171 }
mbed_official 87:085cde657901 1172 }
mbed_official 87:085cde657901 1173
mbed_official 87:085cde657901 1174 tmp1 = I2SxEXT(hi2s->Instance)->SR & SPI_SR_OVR;
mbed_official 87:085cde657901 1175 tmp2 = I2SxEXT(hi2s->Instance)->CR2 & I2S_IT_ERR;
mbed_official 226:b062af740e40 1176 /* I2Sext Overrun error interrupt occurred ------------------------------*/
mbed_official 87:085cde657901 1177 if((tmp1 == SPI_SR_OVR) && (tmp2 == I2S_IT_ERR))
mbed_official 87:085cde657901 1178 {
mbed_official 87:085cde657901 1179 /* Clear I2Sext OVR Flag */
mbed_official 87:085cde657901 1180 I2SxEXT(hi2s->Instance)->DR;
mbed_official 87:085cde657901 1181 I2SxEXT(hi2s->Instance)->SR;
mbed_official 87:085cde657901 1182 hi2s->ErrorCode |= HAL_I2SEX_ERROR_OVR;
mbed_official 87:085cde657901 1183 }
mbed_official 87:085cde657901 1184
mbed_official 87:085cde657901 1185 tmp1 = __HAL_I2S_GET_FLAG(hi2s, I2S_FLAG_TXE);
mbed_official 87:085cde657901 1186 tmp2 = __HAL_I2S_GET_IT_SOURCE(hi2s, I2S_IT_TXE);
mbed_official 87:085cde657901 1187 /* I2S in mode Tramitter -----------------------------------------------*/
mbed_official 87:085cde657901 1188 if((tmp1 != RESET) && (tmp2 != RESET))
mbed_official 87:085cde657901 1189 {
mbed_official 87:085cde657901 1190 tmp1 = hi2s->Instance->I2SCFGR & SPI_I2SCFGR_I2SCFG;
mbed_official 87:085cde657901 1191 tmp2 = hi2s->Instance->I2SCFGR & SPI_I2SCFGR_I2SCFG;
mbed_official 87:085cde657901 1192 /* When the I2S mode is configured as I2S_MODE_MASTER_TX or I2S_MODE_SLAVE_TX,
mbed_official 87:085cde657901 1193 the I2S TXE interrupt will be generated to manage the full-duplex transmit phase. */
mbed_official 87:085cde657901 1194 if((tmp1 == I2S_MODE_MASTER_TX) || (tmp2 == I2S_MODE_SLAVE_TX))
mbed_official 87:085cde657901 1195 {
mbed_official 87:085cde657901 1196 I2SEx_TransmitReceive_IT(hi2s);
mbed_official 87:085cde657901 1197 }
mbed_official 87:085cde657901 1198 }
mbed_official 87:085cde657901 1199
mbed_official 87:085cde657901 1200 tmp1 = __HAL_I2S_GET_FLAG(hi2s, I2S_FLAG_UDR);
mbed_official 87:085cde657901 1201 tmp2 = __HAL_I2S_GET_IT_SOURCE(hi2s, I2S_IT_ERR);
mbed_official 226:b062af740e40 1202 /* I2S Underrun error interrupt occurred --------------------------------*/
mbed_official 87:085cde657901 1203 if((tmp1 != RESET) && (tmp2 != RESET))
mbed_official 87:085cde657901 1204 {
mbed_official 87:085cde657901 1205 __HAL_I2S_CLEAR_UDRFLAG(hi2s);
mbed_official 87:085cde657901 1206 hi2s->ErrorCode |= HAL_I2S_ERROR_UDR;
mbed_official 87:085cde657901 1207 }
mbed_official 87:085cde657901 1208 }
mbed_official 87:085cde657901 1209 /* The I2S_MODE_MASTER_RX or I2S_MODE_SLAVE_RX Mode is selected */
mbed_official 87:085cde657901 1210 else
mbed_official 87:085cde657901 1211 {
mbed_official 87:085cde657901 1212 tmp1 = __HAL_I2S_GET_FLAG(hi2s, I2S_FLAG_RXNE);
mbed_official 87:085cde657901 1213 tmp2 = __HAL_I2S_GET_IT_SOURCE(hi2s, I2S_IT_RXNE);
mbed_official 87:085cde657901 1214 /* I2S in mode Receiver ------------------------------------------------*/
mbed_official 87:085cde657901 1215 if((tmp1 != RESET) && (tmp2 != RESET))
mbed_official 87:085cde657901 1216 {
mbed_official 87:085cde657901 1217 tmp1 = hi2s->Instance->I2SCFGR & SPI_I2SCFGR_I2SCFG;
mbed_official 87:085cde657901 1218 tmp2 = hi2s->Instance->I2SCFGR & SPI_I2SCFGR_I2SCFG;
mbed_official 87:085cde657901 1219 /* When the I2S mode is configured as I2S_MODE_MASTER_RX or I2S_MODE_SLAVE_RX,
mbed_official 87:085cde657901 1220 the I2S RXNE interrupt will be generated to manage the full-duplex receive phase. */
mbed_official 87:085cde657901 1221 if((tmp1 == I2S_MODE_MASTER_RX) || (tmp2 == I2S_MODE_SLAVE_RX))
mbed_official 87:085cde657901 1222 {
mbed_official 87:085cde657901 1223 I2SEx_TransmitReceive_IT(hi2s);
mbed_official 87:085cde657901 1224 }
mbed_official 87:085cde657901 1225 }
mbed_official 87:085cde657901 1226
mbed_official 87:085cde657901 1227 tmp1 = __HAL_I2S_GET_FLAG(hi2s, I2S_FLAG_OVR);
mbed_official 87:085cde657901 1228 tmp2 = __HAL_I2S_GET_IT_SOURCE(hi2s, I2S_IT_ERR);
mbed_official 226:b062af740e40 1229 /* I2S Overrun error interrupt occurred ---------------------------------*/
mbed_official 87:085cde657901 1230 if((tmp1 != RESET) && (tmp2 != RESET))
mbed_official 87:085cde657901 1231 {
mbed_official 87:085cde657901 1232 __HAL_I2S_CLEAR_OVRFLAG(hi2s);
mbed_official 87:085cde657901 1233 hi2s->ErrorCode |= HAL_I2S_ERROR_OVR;
mbed_official 87:085cde657901 1234 }
mbed_official 87:085cde657901 1235
mbed_official 87:085cde657901 1236 tmp1 = I2SxEXT(hi2s->Instance)->SR & SPI_SR_TXE;
mbed_official 87:085cde657901 1237 tmp2 = I2SxEXT(hi2s->Instance)->CR2 & I2S_IT_TXE;
mbed_official 87:085cde657901 1238 /* I2Sext in mode Tramitter --------------------------------------------*/
mbed_official 87:085cde657901 1239 if((tmp1 == SPI_SR_TXE) && (tmp2 == I2S_IT_TXE))
mbed_official 87:085cde657901 1240 {
mbed_official 87:085cde657901 1241 tmp1 = hi2s->Instance->I2SCFGR & SPI_I2SCFGR_I2SCFG;
mbed_official 87:085cde657901 1242 tmp2 = hi2s->Instance->I2SCFGR & SPI_I2SCFGR_I2SCFG;
mbed_official 87:085cde657901 1243 /* When the I2S mode is configured as I2S_MODE_MASTER_RX or I2S_MODE_SLAVE_RX,
mbed_official 87:085cde657901 1244 the I2Sext TXE interrupt will be generated to manage the full-duplex transmit phase. */
mbed_official 87:085cde657901 1245 if((tmp1 == I2S_MODE_MASTER_RX) || (tmp2 == I2S_MODE_SLAVE_RX))
mbed_official 87:085cde657901 1246 {
mbed_official 87:085cde657901 1247 I2SEx_TransmitReceive_IT(hi2s);
mbed_official 87:085cde657901 1248 }
mbed_official 87:085cde657901 1249 }
mbed_official 87:085cde657901 1250
mbed_official 87:085cde657901 1251 tmp1 = I2SxEXT(hi2s->Instance)->SR & SPI_SR_UDR;
mbed_official 87:085cde657901 1252 tmp2 = I2SxEXT(hi2s->Instance)->CR2 & I2S_IT_ERR;
mbed_official 226:b062af740e40 1253 /* I2Sext Underrun error interrupt occurred -----------------------------*/
mbed_official 87:085cde657901 1254 if((tmp1 == SPI_SR_UDR) && (tmp2 == I2S_IT_ERR))
mbed_official 87:085cde657901 1255 {
mbed_official 87:085cde657901 1256 /* Clear I2Sext UDR Flag */
mbed_official 87:085cde657901 1257 I2SxEXT(hi2s->Instance)->SR;
mbed_official 87:085cde657901 1258 hi2s->ErrorCode |= HAL_I2SEX_ERROR_UDR;
mbed_official 87:085cde657901 1259 }
mbed_official 87:085cde657901 1260 }
mbed_official 87:085cde657901 1261 }
mbed_official 87:085cde657901 1262
mbed_official 87:085cde657901 1263 /* Call the Error call Back in case of Errors */
mbed_official 87:085cde657901 1264 if(hi2s->ErrorCode != HAL_I2S_ERROR_NONE)
mbed_official 87:085cde657901 1265 {
mbed_official 87:085cde657901 1266 /* Set the I2S state ready to be able to start again the process */
mbed_official 87:085cde657901 1267 hi2s->State= HAL_I2S_STATE_READY;
mbed_official 87:085cde657901 1268 HAL_I2S_ErrorCallback(hi2s);
mbed_official 87:085cde657901 1269 }
mbed_official 87:085cde657901 1270 }
mbed_official 87:085cde657901 1271
mbed_official 87:085cde657901 1272 /**
mbed_official 87:085cde657901 1273 * @brief Tx Transfer Half completed callbacks
mbed_official 226:b062af740e40 1274 * @param hi2s: pointer to a I2S_HandleTypeDef structure that contains
mbed_official 226:b062af740e40 1275 * the configuration information for I2S module
mbed_official 87:085cde657901 1276 * @retval None
mbed_official 87:085cde657901 1277 */
mbed_official 87:085cde657901 1278 __weak void HAL_I2S_TxHalfCpltCallback(I2S_HandleTypeDef *hi2s)
mbed_official 87:085cde657901 1279 {
mbed_official 87:085cde657901 1280 /* NOTE : This function Should not be modified, when the callback is needed,
mbed_official 87:085cde657901 1281 the HAL_I2S_TxHalfCpltCallback could be implenetd in the user file
mbed_official 87:085cde657901 1282 */
mbed_official 87:085cde657901 1283 }
mbed_official 87:085cde657901 1284
mbed_official 87:085cde657901 1285 /**
mbed_official 87:085cde657901 1286 * @brief Tx Transfer completed callbacks
mbed_official 226:b062af740e40 1287 * @param hi2s: pointer to a I2S_HandleTypeDef structure that contains
mbed_official 226:b062af740e40 1288 * the configuration information for I2S module
mbed_official 87:085cde657901 1289 * @retval None
mbed_official 87:085cde657901 1290 */
mbed_official 87:085cde657901 1291 __weak void HAL_I2S_TxCpltCallback(I2S_HandleTypeDef *hi2s)
mbed_official 87:085cde657901 1292 {
mbed_official 87:085cde657901 1293 /* NOTE : This function Should not be modified, when the callback is needed,
mbed_official 87:085cde657901 1294 the HAL_I2S_TxCpltCallback could be implenetd in the user file
mbed_official 87:085cde657901 1295 */
mbed_official 87:085cde657901 1296 }
mbed_official 87:085cde657901 1297
mbed_official 87:085cde657901 1298 /**
mbed_official 87:085cde657901 1299 * @brief Rx Transfer half completed callbacks
mbed_official 226:b062af740e40 1300 * @param hi2s: pointer to a I2S_HandleTypeDef structure that contains
mbed_official 226:b062af740e40 1301 * the configuration information for I2S module
mbed_official 87:085cde657901 1302 * @retval None
mbed_official 87:085cde657901 1303 */
mbed_official 87:085cde657901 1304 __weak void HAL_I2S_RxHalfCpltCallback(I2S_HandleTypeDef *hi2s)
mbed_official 87:085cde657901 1305 {
mbed_official 87:085cde657901 1306 /* NOTE : This function Should not be modified, when the callback is needed,
mbed_official 87:085cde657901 1307 the HAL_I2S_RxCpltCallback could be implenetd in the user file
mbed_official 87:085cde657901 1308 */
mbed_official 87:085cde657901 1309 }
mbed_official 87:085cde657901 1310
mbed_official 87:085cde657901 1311 /**
mbed_official 87:085cde657901 1312 * @brief Rx Transfer completed callbacks
mbed_official 226:b062af740e40 1313 * @param hi2s: pointer to a I2S_HandleTypeDef structure that contains
mbed_official 226:b062af740e40 1314 * the configuration information for I2S module
mbed_official 87:085cde657901 1315 * @retval None
mbed_official 87:085cde657901 1316 */
mbed_official 87:085cde657901 1317 __weak void HAL_I2S_RxCpltCallback(I2S_HandleTypeDef *hi2s)
mbed_official 87:085cde657901 1318 {
mbed_official 87:085cde657901 1319 /* NOTE : This function Should not be modified, when the callback is needed,
mbed_official 87:085cde657901 1320 the HAL_I2S_RxCpltCallback could be implenetd in the user file
mbed_official 87:085cde657901 1321 */
mbed_official 87:085cde657901 1322 }
mbed_official 87:085cde657901 1323
mbed_official 87:085cde657901 1324 /**
mbed_official 87:085cde657901 1325 * @brief I2S error callbacks
mbed_official 226:b062af740e40 1326 * @param hi2s: pointer to a I2S_HandleTypeDef structure that contains
mbed_official 226:b062af740e40 1327 * the configuration information for I2S module
mbed_official 87:085cde657901 1328 * @retval None
mbed_official 87:085cde657901 1329 */
mbed_official 87:085cde657901 1330 __weak void HAL_I2S_ErrorCallback(I2S_HandleTypeDef *hi2s)
mbed_official 87:085cde657901 1331 {
mbed_official 87:085cde657901 1332 /* NOTE : This function Should not be modified, when the callback is needed,
mbed_official 87:085cde657901 1333 the HAL_I2S_ErrorCallback could be implenetd in the user file
mbed_official 87:085cde657901 1334 */
mbed_official 87:085cde657901 1335 }
mbed_official 87:085cde657901 1336
mbed_official 87:085cde657901 1337 /**
mbed_official 87:085cde657901 1338 * @}
mbed_official 87:085cde657901 1339 */
mbed_official 87:085cde657901 1340
mbed_official 87:085cde657901 1341 /** @defgroup I2S_Group3 Peripheral State and Errors functions
mbed_official 87:085cde657901 1342 * @brief Peripheral State functions
mbed_official 87:085cde657901 1343 *
mbed_official 87:085cde657901 1344 @verbatim
mbed_official 87:085cde657901 1345 ===============================================================================
mbed_official 87:085cde657901 1346 ##### Peripheral State and Errors functions #####
mbed_official 87:085cde657901 1347 ===============================================================================
mbed_official 87:085cde657901 1348 [..]
mbed_official 226:b062af740e40 1349 This subsection permits to get in run-time the status of the peripheral
mbed_official 87:085cde657901 1350 and the data flow.
mbed_official 87:085cde657901 1351
mbed_official 87:085cde657901 1352 @endverbatim
mbed_official 87:085cde657901 1353 * @{
mbed_official 87:085cde657901 1354 */
mbed_official 87:085cde657901 1355
mbed_official 87:085cde657901 1356 /**
mbed_official 87:085cde657901 1357 * @brief Return the I2S state
mbed_official 226:b062af740e40 1358 * @param hi2s: pointer to a I2S_HandleTypeDef structure that contains
mbed_official 226:b062af740e40 1359 * the configuration information for I2S module
mbed_official 87:085cde657901 1360 * @retval HAL state
mbed_official 87:085cde657901 1361 */
mbed_official 87:085cde657901 1362 HAL_I2S_StateTypeDef HAL_I2S_GetState(I2S_HandleTypeDef *hi2s)
mbed_official 87:085cde657901 1363 {
mbed_official 87:085cde657901 1364 return hi2s->State;
mbed_official 87:085cde657901 1365 }
mbed_official 87:085cde657901 1366
mbed_official 87:085cde657901 1367 /**
mbed_official 87:085cde657901 1368 * @brief Return the I2S error code
mbed_official 226:b062af740e40 1369 * @param hi2s: pointer to a I2S_HandleTypeDef structure that contains
mbed_official 226:b062af740e40 1370 * the configuration information for I2S module
mbed_official 87:085cde657901 1371 * @retval I2S Error Code
mbed_official 87:085cde657901 1372 */
mbed_official 87:085cde657901 1373 HAL_I2S_ErrorTypeDef HAL_I2S_GetError(I2S_HandleTypeDef *hi2s)
mbed_official 87:085cde657901 1374 {
mbed_official 87:085cde657901 1375 return hi2s->ErrorCode;
mbed_official 87:085cde657901 1376 }
mbed_official 87:085cde657901 1377
mbed_official 87:085cde657901 1378 /**
mbed_official 87:085cde657901 1379 * @}
mbed_official 87:085cde657901 1380 */
mbed_official 87:085cde657901 1381
mbed_official 87:085cde657901 1382 /**
mbed_official 87:085cde657901 1383 * @brief DMA I2S transmit process complete callback
mbed_official 226:b062af740e40 1384 * @param hdma: pointer to a DMA_HandleTypeDef structure that contains
mbed_official 226:b062af740e40 1385 * the configuration information for the specified DMA module.
mbed_official 87:085cde657901 1386 * @retval None
mbed_official 87:085cde657901 1387 */
mbed_official 87:085cde657901 1388 void I2S_DMATxCplt(DMA_HandleTypeDef *hdma)
mbed_official 87:085cde657901 1389 {
mbed_official 87:085cde657901 1390 I2S_HandleTypeDef* hi2s = (I2S_HandleTypeDef*)((DMA_HandleTypeDef*)hdma)->Parent;
mbed_official 87:085cde657901 1391
mbed_official 87:085cde657901 1392 if((hdma->Instance->CR & DMA_SxCR_CIRC) == 0)
mbed_official 87:085cde657901 1393 {
mbed_official 87:085cde657901 1394 hi2s->TxXferCount = 0;
mbed_official 87:085cde657901 1395
mbed_official 87:085cde657901 1396 /* Disable Tx DMA Request */
mbed_official 87:085cde657901 1397 hi2s->Instance->CR2 &= (uint32_t)(~SPI_CR2_TXDMAEN);
mbed_official 87:085cde657901 1398
mbed_official 87:085cde657901 1399 if(hi2s->Init.FullDuplexMode == I2S_FULLDUPLEXMODE_ENABLE)
mbed_official 87:085cde657901 1400 {
mbed_official 87:085cde657901 1401 /* Disable Rx DMA Request for the slave*/
mbed_official 87:085cde657901 1402 I2SxEXT(hi2s->Instance)->CR2 &= (uint32_t)(~SPI_CR2_RXDMAEN);
mbed_official 87:085cde657901 1403 }
mbed_official 87:085cde657901 1404
mbed_official 87:085cde657901 1405 if(hi2s->State == HAL_I2S_STATE_BUSY_TX_RX)
mbed_official 87:085cde657901 1406 {
mbed_official 87:085cde657901 1407 if(hi2s->RxXferCount == 0)
mbed_official 87:085cde657901 1408 {
mbed_official 87:085cde657901 1409 hi2s->State = HAL_I2S_STATE_READY;
mbed_official 87:085cde657901 1410 }
mbed_official 87:085cde657901 1411 }
mbed_official 87:085cde657901 1412 else
mbed_official 87:085cde657901 1413 {
mbed_official 87:085cde657901 1414 hi2s->State = HAL_I2S_STATE_READY;
mbed_official 87:085cde657901 1415 }
mbed_official 87:085cde657901 1416 }
mbed_official 87:085cde657901 1417 HAL_I2S_TxCpltCallback(hi2s);
mbed_official 87:085cde657901 1418 }
mbed_official 87:085cde657901 1419
mbed_official 87:085cde657901 1420 /**
mbed_official 87:085cde657901 1421 * @brief DMA I2S transmit process half complete callback
mbed_official 226:b062af740e40 1422 * @param hdma: pointer to a DMA_HandleTypeDef structure that contains
mbed_official 226:b062af740e40 1423 * the configuration information for the specified DMA module.
mbed_official 87:085cde657901 1424 * @retval None
mbed_official 87:085cde657901 1425 */
mbed_official 87:085cde657901 1426 void I2S_DMATxHalfCplt(DMA_HandleTypeDef *hdma)
mbed_official 87:085cde657901 1427 {
mbed_official 87:085cde657901 1428 I2S_HandleTypeDef* hi2s = (I2S_HandleTypeDef*)((DMA_HandleTypeDef*)hdma)->Parent;
mbed_official 87:085cde657901 1429
mbed_official 87:085cde657901 1430 HAL_I2S_TxHalfCpltCallback(hi2s);
mbed_official 87:085cde657901 1431 }
mbed_official 87:085cde657901 1432
mbed_official 87:085cde657901 1433 /**
mbed_official 87:085cde657901 1434 * @brief DMA I2S receive process complete callback
mbed_official 226:b062af740e40 1435 * @param hdma: pointer to a DMA_HandleTypeDef structure that contains
mbed_official 226:b062af740e40 1436 * the configuration information for the specified DMA module.
mbed_official 87:085cde657901 1437 * @retval None
mbed_official 87:085cde657901 1438 */
mbed_official 87:085cde657901 1439 void I2S_DMARxCplt(DMA_HandleTypeDef *hdma)
mbed_official 87:085cde657901 1440 {
mbed_official 87:085cde657901 1441 I2S_HandleTypeDef* hi2s = (I2S_HandleTypeDef*)((DMA_HandleTypeDef*)hdma)->Parent;
mbed_official 87:085cde657901 1442
mbed_official 87:085cde657901 1443 if((hdma->Instance->CR & DMA_SxCR_CIRC) == 0)
mbed_official 87:085cde657901 1444 {
mbed_official 87:085cde657901 1445 /* Disable Rx DMA Request */
mbed_official 87:085cde657901 1446 hi2s->Instance->CR2 &= (uint32_t)(~SPI_CR2_RXDMAEN);
mbed_official 87:085cde657901 1447
mbed_official 87:085cde657901 1448 if(hi2s->Init.FullDuplexMode == I2S_FULLDUPLEXMODE_ENABLE)
mbed_official 87:085cde657901 1449 {
mbed_official 87:085cde657901 1450 /* Disable Tx DMA Request for the slave*/
mbed_official 87:085cde657901 1451 I2SxEXT(hi2s->Instance)->CR2 &= (uint32_t)(~SPI_CR2_TXDMAEN);
mbed_official 87:085cde657901 1452 }
mbed_official 87:085cde657901 1453
mbed_official 87:085cde657901 1454 hi2s->RxXferCount = 0;
mbed_official 87:085cde657901 1455 if(hi2s->State == HAL_I2S_STATE_BUSY_TX_RX)
mbed_official 87:085cde657901 1456 {
mbed_official 87:085cde657901 1457 if(hi2s->TxXferCount == 0)
mbed_official 87:085cde657901 1458 {
mbed_official 87:085cde657901 1459 hi2s->State = HAL_I2S_STATE_READY;
mbed_official 87:085cde657901 1460 }
mbed_official 87:085cde657901 1461 }
mbed_official 87:085cde657901 1462 else
mbed_official 87:085cde657901 1463 {
mbed_official 87:085cde657901 1464 hi2s->State = HAL_I2S_STATE_READY;
mbed_official 87:085cde657901 1465 }
mbed_official 87:085cde657901 1466 }
mbed_official 87:085cde657901 1467 HAL_I2S_RxCpltCallback(hi2s);
mbed_official 87:085cde657901 1468 }
mbed_official 87:085cde657901 1469
mbed_official 87:085cde657901 1470 /**
mbed_official 87:085cde657901 1471 * @brief DMA I2S receive process half complete callback
mbed_official 226:b062af740e40 1472 * @param hdma: pointer to a DMA_HandleTypeDef structure that contains
mbed_official 226:b062af740e40 1473 * the configuration information for the specified DMA module.
mbed_official 87:085cde657901 1474 * @retval None
mbed_official 87:085cde657901 1475 */
mbed_official 87:085cde657901 1476 void I2S_DMARxHalfCplt(DMA_HandleTypeDef *hdma)
mbed_official 87:085cde657901 1477 {
mbed_official 87:085cde657901 1478 I2S_HandleTypeDef* hi2s = (I2S_HandleTypeDef*)((DMA_HandleTypeDef*)hdma)->Parent;
mbed_official 87:085cde657901 1479
mbed_official 87:085cde657901 1480 HAL_I2S_RxHalfCpltCallback(hi2s);
mbed_official 87:085cde657901 1481 }
mbed_official 87:085cde657901 1482
mbed_official 87:085cde657901 1483 /**
mbed_official 87:085cde657901 1484 * @brief DMA I2S communication error callback
mbed_official 226:b062af740e40 1485 * @param hdma: pointer to a DMA_HandleTypeDef structure that contains
mbed_official 226:b062af740e40 1486 * the configuration information for the specified DMA module.
mbed_official 87:085cde657901 1487 * @retval None
mbed_official 87:085cde657901 1488 */
mbed_official 87:085cde657901 1489 void I2S_DMAError(DMA_HandleTypeDef *hdma)
mbed_official 87:085cde657901 1490 {
mbed_official 87:085cde657901 1491 I2S_HandleTypeDef* hi2s = (I2S_HandleTypeDef*)((DMA_HandleTypeDef*)hdma)->Parent;
mbed_official 87:085cde657901 1492
mbed_official 87:085cde657901 1493 hi2s->TxXferCount = 0;
mbed_official 87:085cde657901 1494 hi2s->RxXferCount = 0;
mbed_official 87:085cde657901 1495
mbed_official 87:085cde657901 1496 hi2s->State= HAL_I2S_STATE_READY;
mbed_official 87:085cde657901 1497
mbed_official 87:085cde657901 1498 hi2s->ErrorCode |= HAL_I2S_ERROR_DMA;
mbed_official 87:085cde657901 1499 HAL_I2S_ErrorCallback(hi2s);
mbed_official 87:085cde657901 1500 }
mbed_official 87:085cde657901 1501
mbed_official 87:085cde657901 1502 /**
mbed_official 87:085cde657901 1503 * @brief Transmit an amount of data in non-blocking mode with Interrupt
mbed_official 226:b062af740e40 1504 * @param hi2s: pointer to a I2S_HandleTypeDef structure that contains
mbed_official 226:b062af740e40 1505 * the configuration information for I2S module
mbed_official 87:085cde657901 1506 * @retval HAL status
mbed_official 87:085cde657901 1507 */
mbed_official 87:085cde657901 1508 static HAL_StatusTypeDef I2S_Transmit_IT(I2S_HandleTypeDef *hi2s)
mbed_official 87:085cde657901 1509 {
mbed_official 87:085cde657901 1510 if(hi2s->State == HAL_I2S_STATE_BUSY_TX)
mbed_official 87:085cde657901 1511 {
mbed_official 87:085cde657901 1512 /* Process Locked */
mbed_official 87:085cde657901 1513 __HAL_LOCK(hi2s);
mbed_official 87:085cde657901 1514
mbed_official 87:085cde657901 1515 /* Transmit data */
mbed_official 87:085cde657901 1516 hi2s->Instance->DR = (*hi2s->pTxBuffPtr++);
mbed_official 87:085cde657901 1517
mbed_official 87:085cde657901 1518 hi2s->TxXferCount--;
mbed_official 87:085cde657901 1519
mbed_official 87:085cde657901 1520 if(hi2s->TxXferCount == 0)
mbed_official 87:085cde657901 1521 {
mbed_official 87:085cde657901 1522 /* Disable TXE and ERR interrupt */
mbed_official 87:085cde657901 1523 __HAL_I2S_DISABLE_IT(hi2s, (I2S_IT_TXE | I2S_IT_ERR));
mbed_official 87:085cde657901 1524
mbed_official 87:085cde657901 1525 hi2s->State = HAL_I2S_STATE_READY;
mbed_official 87:085cde657901 1526
mbed_official 87:085cde657901 1527 /* Process Unlocked */
mbed_official 87:085cde657901 1528 __HAL_UNLOCK(hi2s);
mbed_official 87:085cde657901 1529 HAL_I2S_TxCpltCallback(hi2s);
mbed_official 87:085cde657901 1530 }
mbed_official 87:085cde657901 1531 else
mbed_official 87:085cde657901 1532 {
mbed_official 87:085cde657901 1533 /* Process Unlocked */
mbed_official 87:085cde657901 1534 __HAL_UNLOCK(hi2s);
mbed_official 87:085cde657901 1535 }
mbed_official 87:085cde657901 1536
mbed_official 87:085cde657901 1537 return HAL_OK;
mbed_official 87:085cde657901 1538 }
mbed_official 87:085cde657901 1539
mbed_official 87:085cde657901 1540 else
mbed_official 87:085cde657901 1541 {
mbed_official 87:085cde657901 1542 return HAL_BUSY;
mbed_official 87:085cde657901 1543 }
mbed_official 87:085cde657901 1544 }
mbed_official 87:085cde657901 1545
mbed_official 87:085cde657901 1546 /**
mbed_official 87:085cde657901 1547 * @brief Receive an amount of data in non-blocking mode with Interrupt
mbed_official 226:b062af740e40 1548 * @param hi2s: pointer to a I2S_HandleTypeDef structure that contains
mbed_official 226:b062af740e40 1549 * the configuration information for I2S module
mbed_official 87:085cde657901 1550 * @retval HAL status
mbed_official 87:085cde657901 1551 */
mbed_official 87:085cde657901 1552 static HAL_StatusTypeDef I2S_Receive_IT(I2S_HandleTypeDef *hi2s)
mbed_official 87:085cde657901 1553 {
mbed_official 87:085cde657901 1554 if(hi2s->State == HAL_I2S_STATE_BUSY_RX)
mbed_official 87:085cde657901 1555 {
mbed_official 87:085cde657901 1556 /* Process Locked */
mbed_official 87:085cde657901 1557 __HAL_LOCK(hi2s);
mbed_official 87:085cde657901 1558
mbed_official 87:085cde657901 1559 /* Receive data */
mbed_official 87:085cde657901 1560 (*hi2s->pRxBuffPtr++) = hi2s->Instance->DR;
mbed_official 87:085cde657901 1561
mbed_official 87:085cde657901 1562 hi2s->RxXferCount--;
mbed_official 87:085cde657901 1563
mbed_official 87:085cde657901 1564 /* Check if Master Receiver mode is selected */
mbed_official 87:085cde657901 1565 if((hi2s->Instance->I2SCFGR & SPI_I2SCFGR_I2SCFG) == I2S_MODE_MASTER_RX)
mbed_official 87:085cde657901 1566 {
mbed_official 87:085cde657901 1567 /* Clear the Overrun Flag by a read operation on the SPI_DR register followed by a read
mbed_official 87:085cde657901 1568 access to the SPI_SR register. */
mbed_official 87:085cde657901 1569 __HAL_I2S_CLEAR_OVRFLAG(hi2s);
mbed_official 87:085cde657901 1570 }
mbed_official 87:085cde657901 1571
mbed_official 87:085cde657901 1572 if(hi2s->RxXferCount == 0)
mbed_official 87:085cde657901 1573 {
mbed_official 87:085cde657901 1574 /* Disable RXNE and ERR interrupt */
mbed_official 87:085cde657901 1575 __HAL_I2S_DISABLE_IT(hi2s, I2S_IT_RXNE | I2S_IT_ERR);
mbed_official 87:085cde657901 1576
mbed_official 87:085cde657901 1577 hi2s->State = HAL_I2S_STATE_READY;
mbed_official 87:085cde657901 1578
mbed_official 87:085cde657901 1579 /* Process Unlocked */
mbed_official 87:085cde657901 1580 __HAL_UNLOCK(hi2s);
mbed_official 87:085cde657901 1581
mbed_official 87:085cde657901 1582 HAL_I2S_RxCpltCallback(hi2s);
mbed_official 87:085cde657901 1583 }
mbed_official 87:085cde657901 1584 else
mbed_official 87:085cde657901 1585 {
mbed_official 87:085cde657901 1586 /* Process Unlocked */
mbed_official 87:085cde657901 1587 __HAL_UNLOCK(hi2s);
mbed_official 87:085cde657901 1588 }
mbed_official 87:085cde657901 1589
mbed_official 87:085cde657901 1590 return HAL_OK;
mbed_official 87:085cde657901 1591 }
mbed_official 87:085cde657901 1592 else
mbed_official 87:085cde657901 1593 {
mbed_official 87:085cde657901 1594 return HAL_BUSY;
mbed_official 87:085cde657901 1595 }
mbed_official 87:085cde657901 1596 }
mbed_official 87:085cde657901 1597
mbed_official 87:085cde657901 1598 /**
mbed_official 87:085cde657901 1599 * @brief This function handles I2S Communication Timeout.
mbed_official 226:b062af740e40 1600 * @param hi2s: pointer to a I2S_HandleTypeDef structure that contains
mbed_official 226:b062af740e40 1601 * the configuration information for I2S module
mbed_official 87:085cde657901 1602 * @param Flag: Flag checked
mbed_official 87:085cde657901 1603 * @param State: Value of the flag expected
mbed_official 87:085cde657901 1604 * @param Timeout: Duration of the timeout
mbed_official 87:085cde657901 1605 * @retval HAL status
mbed_official 87:085cde657901 1606 */
mbed_official 87:085cde657901 1607 HAL_StatusTypeDef I2S_WaitFlagStateUntilTimeout(I2S_HandleTypeDef *hi2s, uint32_t Flag, uint32_t Status, uint32_t Timeout)
mbed_official 87:085cde657901 1608 {
mbed_official 87:085cde657901 1609 uint32_t timeout = 0;
mbed_official 87:085cde657901 1610
mbed_official 87:085cde657901 1611 timeout = HAL_GetTick() + Timeout;
mbed_official 87:085cde657901 1612
mbed_official 87:085cde657901 1613 /* Wait until flag is set */
mbed_official 87:085cde657901 1614 if(Status == RESET)
mbed_official 87:085cde657901 1615 {
mbed_official 87:085cde657901 1616 while(__HAL_I2S_GET_FLAG(hi2s, Flag) == RESET)
mbed_official 87:085cde657901 1617 {
mbed_official 87:085cde657901 1618 if(Timeout != HAL_MAX_DELAY)
mbed_official 87:085cde657901 1619 {
mbed_official 87:085cde657901 1620 if(HAL_GetTick() >= timeout)
mbed_official 87:085cde657901 1621 {
mbed_official 87:085cde657901 1622 /* Set the I2S State ready */
mbed_official 87:085cde657901 1623 hi2s->State= HAL_I2S_STATE_READY;
mbed_official 87:085cde657901 1624
mbed_official 87:085cde657901 1625 /* Process Unlocked */
mbed_official 87:085cde657901 1626 __HAL_UNLOCK(hi2s);
mbed_official 87:085cde657901 1627
mbed_official 87:085cde657901 1628 return HAL_TIMEOUT;
mbed_official 87:085cde657901 1629 }
mbed_official 87:085cde657901 1630 }
mbed_official 87:085cde657901 1631 }
mbed_official 87:085cde657901 1632 }
mbed_official 87:085cde657901 1633 else
mbed_official 87:085cde657901 1634 {
mbed_official 87:085cde657901 1635 while(__HAL_I2S_GET_FLAG(hi2s, Flag) != RESET)
mbed_official 87:085cde657901 1636 {
mbed_official 87:085cde657901 1637 if(Timeout != HAL_MAX_DELAY)
mbed_official 87:085cde657901 1638 {
mbed_official 87:085cde657901 1639 if(HAL_GetTick() >= timeout)
mbed_official 87:085cde657901 1640 {
mbed_official 87:085cde657901 1641 /* Set the I2S State ready */
mbed_official 87:085cde657901 1642 hi2s->State= HAL_I2S_STATE_READY;
mbed_official 87:085cde657901 1643
mbed_official 87:085cde657901 1644 /* Process Unlocked */
mbed_official 87:085cde657901 1645 __HAL_UNLOCK(hi2s);
mbed_official 87:085cde657901 1646
mbed_official 87:085cde657901 1647 return HAL_TIMEOUT;
mbed_official 87:085cde657901 1648 }
mbed_official 87:085cde657901 1649 }
mbed_official 87:085cde657901 1650 }
mbed_official 87:085cde657901 1651 }
mbed_official 87:085cde657901 1652 return HAL_OK;
mbed_official 87:085cde657901 1653 }
mbed_official 87:085cde657901 1654
mbed_official 87:085cde657901 1655 /**
mbed_official 87:085cde657901 1656 * @}
mbed_official 87:085cde657901 1657 */
mbed_official 87:085cde657901 1658
mbed_official 87:085cde657901 1659 #endif /* HAL_I2S_MODULE_ENABLED */
mbed_official 87:085cde657901 1660 /**
mbed_official 87:085cde657901 1661 * @}
mbed_official 87:085cde657901 1662 */
mbed_official 87:085cde657901 1663
mbed_official 87:085cde657901 1664 /**
mbed_official 87:085cde657901 1665 * @}
mbed_official 87:085cde657901 1666 */
mbed_official 87:085cde657901 1667
mbed_official 87:085cde657901 1668 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/