shao ziyang / mbed-src-kl05

mbed library sources

Dependents:   frdm_kl05z_gpio_test

Fork of mbed-src by mbed official

targets/cmsis/TARGET_STM/TARGET_NUCLEO_F401RE/stm32f4xx_hal_dcmi.h@226:b062af740e40, 2014-06-11 (annotated)

Committer:
mbed_official
Date:
Wed Jun 11 09:45:09 2014 +0100
Revision:
226:b062af740e40
Parent:
106:ced8cbb51063 
Synchronized with git revision 42deb9ac55f9bdf9835e9c41dc757117d344ffda



Full URL: https://github.com/mbedmicro/mbed/commit/42deb9ac55f9bdf9835e9c41dc757117d344ffda/



[NUCLEO_F401RE] Remove call to Systick + bug fixes

Who changed what in which revision?

UserRevisionLine numberNew contents of line
mbed_official 87:085cde657901 1 /**
mbed_official 87:085cde657901 2 ******************************************************************************
mbed_official 87:085cde657901 3 * @file stm32f4xx_hal_dcmi.h
mbed_official 87:085cde657901 4 * @author MCD Application Team
mbed_official 226:b062af740e40 5 * @version V1.1.0RC2
mbed_official 226:b062af740e40 6 * @date 14-May-2014
mbed_official 87:085cde657901 7 * @brief Header file of DCMI HAL module.
mbed_official 87:085cde657901 8 ******************************************************************************
mbed_official 87:085cde657901 9 * @attention
mbed_official 87:085cde657901 10 *
mbed_official 87:085cde657901 11 * <h2><center>&copy; COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
mbed_official 87:085cde657901 12 *
mbed_official 87:085cde657901 13 * Redistribution and use in source and binary forms, with or without modification,
mbed_official 87:085cde657901 14 * are permitted provided that the following conditions are met:
mbed_official 87:085cde657901 15 * 1. Redistributions of source code must retain the above copyright notice,
mbed_official 87:085cde657901 16 * this list of conditions and the following disclaimer.
mbed_official 87:085cde657901 17 * 2. Redistributions in binary form must reproduce the above copyright notice,
mbed_official 87:085cde657901 18 * this list of conditions and the following disclaimer in the documentation
mbed_official 87:085cde657901 19 * and/or other materials provided with the distribution.
mbed_official 87:085cde657901 20 * 3. Neither the name of STMicroelectronics nor the names of its contributors
mbed_official 87:085cde657901 21 * may be used to endorse or promote products derived from this software
mbed_official 87:085cde657901 22 * without specific prior written permission.
mbed_official 87:085cde657901 23 *
mbed_official 87:085cde657901 24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
mbed_official 87:085cde657901 25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
mbed_official 87:085cde657901 26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
mbed_official 87:085cde657901 27 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
mbed_official 87:085cde657901 28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
mbed_official 87:085cde657901 29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
mbed_official 87:085cde657901 30 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
mbed_official 87:085cde657901 31 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
mbed_official 87:085cde657901 32 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
mbed_official 87:085cde657901 33 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
mbed_official 87:085cde657901 34 *
mbed_official 87:085cde657901 35 ******************************************************************************
mbed_official 87:085cde657901 36 */
mbed_official 87:085cde657901 37
mbed_official 87:085cde657901 38 /* Define to prevent recursive inclusion -------------------------------------*/
mbed_official 87:085cde657901 39 #ifndef __STM32F4xx_HAL_DCMI_H
mbed_official 87:085cde657901 40 #define __STM32F4xx_HAL_DCMI_H
mbed_official 87:085cde657901 41
mbed_official 87:085cde657901 42 #ifdef __cplusplus
mbed_official 87:085cde657901 43 extern "C" {
mbed_official 87:085cde657901 44 #endif
mbed_official 87:085cde657901 45
mbed_official 87:085cde657901 46 #if defined(STM32F407xx) || defined(STM32F417xx) || defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx)
mbed_official 87:085cde657901 47 /* Includes ------------------------------------------------------------------*/
mbed_official 87:085cde657901 48 #include "stm32f4xx_hal_def.h"
mbed_official 87:085cde657901 49
mbed_official 87:085cde657901 50
mbed_official 87:085cde657901 51 /** @addtogroup STM32F4xx_HAL_Driver
mbed_official 87:085cde657901 52 * @{
mbed_official 87:085cde657901 53 */
mbed_official 87:085cde657901 54
mbed_official 87:085cde657901 55 /** @addtogroup DCMI
mbed_official 87:085cde657901 56 * @{
mbed_official 87:085cde657901 57 */
mbed_official 87:085cde657901 58
mbed_official 87:085cde657901 59 /* Exported types ------------------------------------------------------------*/
mbed_official 87:085cde657901 60
mbed_official 87:085cde657901 61 /**
mbed_official 226:b062af740e40 62 * @brief DCMI Error source
mbed_official 226:b062af740e40 63 */
mbed_official 87:085cde657901 64 typedef enum
mbed_official 87:085cde657901 65 {
mbed_official 87:085cde657901 66 DCMI_ERROR_SYNC = 1, /*!< Synchronisation error */
mbed_official 87:085cde657901 67 DCMI_OVERRUN = 2, /*!< DCMI Overrun */
mbed_official 226:b062af740e40 68 }DCMI_ErrorTypeDef;
mbed_official 87:085cde657901 69
mbed_official 87:085cde657901 70 /**
mbed_official 226:b062af740e40 71 * @brief DCMI Embedded Synchronisation CODE Init structure definition
mbed_official 87:085cde657901 72 */
mbed_official 87:085cde657901 73 typedef struct
mbed_official 87:085cde657901 74 {
mbed_official 87:085cde657901 75 uint8_t FrameStartCode; /*!< Specifies the code of the frame start delimiter. */
mbed_official 87:085cde657901 76 uint8_t LineStartCode; /*!< Specifies the code of the line start delimiter. */
mbed_official 87:085cde657901 77 uint8_t LineEndCode; /*!< Specifies the code of the line end delimiter. */
mbed_official 87:085cde657901 78 uint8_t FrameEndCode; /*!< Specifies the code of the frame end delimiter. */
mbed_official 87:085cde657901 79 }DCMI_CodesInitTypeDef;
mbed_official 87:085cde657901 80
mbed_official 87:085cde657901 81 /**
mbed_official 226:b062af740e40 82 * @brief DCMI Init structure definition
mbed_official 87:085cde657901 83 */
mbed_official 87:085cde657901 84 typedef struct
mbed_official 87:085cde657901 85 {
mbed_official 87:085cde657901 86 uint32_t SynchroMode; /*!< Specifies the Synchronization Mode: Hardware or Embedded.
mbed_official 87:085cde657901 87 This parameter can be a value of @ref DCMI_Synchronization_Mode */
mbed_official 87:085cde657901 88
mbed_official 87:085cde657901 89 uint32_t PCKPolarity; /*!< Specifies the Pixel clock polarity: Falling or Rising.
mbed_official 87:085cde657901 90 This parameter can be a value of @ref DCMI_PIXCK_Polarity */
mbed_official 87:085cde657901 91
mbed_official 87:085cde657901 92 uint32_t VSPolarity; /*!< Specifies the Vertical synchronization polarity: High or Low.
mbed_official 87:085cde657901 93 This parameter can be a value of @ref DCMI_VSYNC_Polarity */
mbed_official 87:085cde657901 94
mbed_official 87:085cde657901 95 uint32_t HSPolarity; /*!< Specifies the Horizontal synchronization polarity: High or Low.
mbed_official 87:085cde657901 96 This parameter can be a value of @ref DCMI_HSYNC_Polarity */
mbed_official 87:085cde657901 97
mbed_official 87:085cde657901 98 uint32_t CaptureRate; /*!< Specifies the frequency of frame capture: All, 1/2 or 1/4.
mbed_official 87:085cde657901 99 This parameter can be a value of @ref DCMI_Capture_Rate */
mbed_official 87:085cde657901 100
mbed_official 87:085cde657901 101 uint32_t ExtendedDataMode; /*!< Specifies the data width: 8-bit, 10-bit, 12-bit or 14-bit.
mbed_official 87:085cde657901 102 This parameter can be a value of @ref DCMI_Extended_Data_Mode */
mbed_official 226:b062af740e40 103
mbed_official 87:085cde657901 104 DCMI_CodesInitTypeDef SyncroCode; /*!< Specifies the code of the frame start delimiter. */
mbed_official 226:b062af740e40 105
mbed_official 87:085cde657901 106 uint32_t JPEGMode; /*!< Enable or Disable the JPEG mode.
mbed_official 226:b062af740e40 107 This parameter can be a value of @ref DCMI_MODE_JPEG */
mbed_official 226:b062af740e40 108
mbed_official 87:085cde657901 109 }DCMI_InitTypeDef;
mbed_official 87:085cde657901 110
mbed_official 87:085cde657901 111 /**
mbed_official 226:b062af740e40 112 * @brief HAL DCMI State structures definition
mbed_official 87:085cde657901 113 */
mbed_official 87:085cde657901 114 typedef enum
mbed_official 87:085cde657901 115 {
mbed_official 87:085cde657901 116 HAL_DCMI_STATE_RESET = 0x00, /*!< DCMI not yet initialized or disabled */
mbed_official 87:085cde657901 117 HAL_DCMI_STATE_READY = 0x01, /*!< DCMI initialized and ready for use */
mbed_official 87:085cde657901 118 HAL_DCMI_STATE_BUSY = 0x02, /*!< DCMI internal processing is ongoing */
mbed_official 87:085cde657901 119 HAL_DCMI_STATE_TIMEOUT = 0x03, /*!< DCMI timeout state */
mbed_official 87:085cde657901 120 HAL_DCMI_STATE_ERROR = 0x04 /*!< DCMI error state */
mbed_official 87:085cde657901 121 }HAL_DCMI_StateTypeDef;
mbed_official 87:085cde657901 122
mbed_official 87:085cde657901 123 /**
mbed_official 226:b062af740e40 124 * @brief DCMI handle Structure definition
mbed_official 226:b062af740e40 125 */
mbed_official 87:085cde657901 126 typedef struct
mbed_official 226:b062af740e40 127 {
mbed_official 87:085cde657901 128 DCMI_TypeDef *Instance; /*!< DCMI Register base address */
mbed_official 226:b062af740e40 129
mbed_official 87:085cde657901 130 DCMI_InitTypeDef Init; /*!< DCMI parameters */
mbed_official 226:b062af740e40 131
mbed_official 87:085cde657901 132 HAL_LockTypeDef Lock; /*!< DCMI locking object */
mbed_official 226:b062af740e40 133
mbed_official 87:085cde657901 134 __IO HAL_DCMI_StateTypeDef State; /*!< DCMI state */
mbed_official 226:b062af740e40 135
mbed_official 87:085cde657901 136 __IO uint32_t XferCount; /*!< DMA transfer counter */
mbed_official 226:b062af740e40 137
mbed_official 87:085cde657901 138 __IO uint32_t XferSize; /*!< DMA transfer size */
mbed_official 226:b062af740e40 139
mbed_official 226:b062af740e40 140 uint32_t XferTransferNumber; /*!< DMA transfer number */
mbed_official 87:085cde657901 141
mbed_official 226:b062af740e40 142 uint32_t pBuffPtr; /*!< Pointer to DMA output buffer */
mbed_official 226:b062af740e40 143
mbed_official 87:085cde657901 144 DMA_HandleTypeDef *DMA_Handle; /*!< Pointer to the DMA handler */
mbed_official 87:085cde657901 145
mbed_official 226:b062af740e40 146 __IO uint32_t ErrorCode; /*!< DCMI Error code */
mbed_official 226:b062af740e40 147
mbed_official 226:b062af740e40 148 }DCMI_HandleTypeDef;
mbed_official 87:085cde657901 149
mbed_official 87:085cde657901 150 /* Exported constants --------------------------------------------------------*/
mbed_official 87:085cde657901 151
mbed_official 87:085cde657901 152 /** @defgroup DCMI_Exported_Constants
mbed_official 87:085cde657901 153 * @{
mbed_official 87:085cde657901 154 */
mbed_official 87:085cde657901 155
mbed_official 87:085cde657901 156 /** @defgroup DCMI_Error_Code
mbed_official 87:085cde657901 157 * @{
mbed_official 87:085cde657901 158 */
mbed_official 87:085cde657901 159 #define HAL_DCMI_ERROR_NONE ((uint32_t)0x00000000) /*!< No error */
mbed_official 87:085cde657901 160 #define HAL_DCMI_ERROR_OVF ((uint32_t)0x00000001) /*!< Overflow error */
mbed_official 226:b062af740e40 161 #define HAL_DCMI_ERROR_SYNC ((uint32_t)0x00000002) /*!< Synchronization error */
mbed_official 87:085cde657901 162 #define HAL_DCMI_ERROR_TIMEOUT ((uint32_t)0x00000020) /*!< Timeout error */
mbed_official 87:085cde657901 163 /**
mbed_official 87:085cde657901 164 * @}
mbed_official 226:b062af740e40 165 */
mbed_official 87:085cde657901 166
mbed_official 226:b062af740e40 167 /** @defgroup DCMI_Capture_Mode
mbed_official 87:085cde657901 168 * @{
mbed_official 87:085cde657901 169 */
mbed_official 87:085cde657901 170 #define DCMI_MODE_CONTINUOUS ((uint32_t)0x00000000) /*!< The received data are transferred continuously
mbed_official 87:085cde657901 171 into the destination memory through the DMA */
mbed_official 87:085cde657901 172 #define DCMI_MODE_SNAPSHOT ((uint32_t)DCMI_CR_CM) /*!< Once activated, the interface waits for the start of
mbed_official 87:085cde657901 173 frame and then transfers a single frame through the DMA */
mbed_official 87:085cde657901 174
mbed_official 87:085cde657901 175 #define IS_DCMI_CAPTURE_MODE(MODE)(((MODE) == DCMI_MODE_CONTINUOUS) || \
mbed_official 87:085cde657901 176 ((MODE) == DCMI_MODE_SNAPSHOT))
mbed_official 87:085cde657901 177 /**
mbed_official 87:085cde657901 178 * @}
mbed_official 226:b062af740e40 179 */
mbed_official 87:085cde657901 180
mbed_official 87:085cde657901 181 /** @defgroup DCMI_Synchronization_Mode
mbed_official 87:085cde657901 182 * @{
mbed_official 87:085cde657901 183 */
mbed_official 87:085cde657901 184 #define DCMI_SYNCHRO_HARDWARE ((uint32_t)0x00000000) /*!< Hardware synchronization data capture (frame/line start/stop)
mbed_official 87:085cde657901 185 is synchronized with the HSYNC/VSYNC signals */
mbed_official 87:085cde657901 186 #define DCMI_SYNCHRO_EMBEDDED ((uint32_t)DCMI_CR_ESS) /*!< Embedded synchronization data capture is synchronized with
mbed_official 87:085cde657901 187 synchronization codes embedded in the data flow */
mbed_official 226:b062af740e40 188
mbed_official 87:085cde657901 189 #define IS_DCMI_SYNCHRO(MODE)(((MODE) == DCMI_SYNCHRO_HARDWARE) || \
mbed_official 87:085cde657901 190 ((MODE) == DCMI_SYNCHRO_EMBEDDED))
mbed_official 87:085cde657901 191 /**
mbed_official 87:085cde657901 192 * @}
mbed_official 226:b062af740e40 193 */
mbed_official 87:085cde657901 194
mbed_official 226:b062af740e40 195 /** @defgroup DCMI_PIXCK_Polarity
mbed_official 87:085cde657901 196 * @{
mbed_official 226:b062af740e40 197 */
mbed_official 87:085cde657901 198 #define DCMI_PCKPOLARITY_FALLING ((uint32_t)0x00000000) /*!< Pixel clock active on Falling edge */
mbed_official 87:085cde657901 199 #define DCMI_PCKPOLARITY_RISING ((uint32_t)DCMI_CR_PCKPOL) /*!< Pixel clock active on Rising edge */
mbed_official 87:085cde657901 200
mbed_official 87:085cde657901 201 #define IS_DCMI_PCKPOLARITY(POLARITY)(((POLARITY) == DCMI_PCKPOLARITY_FALLING) || \
mbed_official 87:085cde657901 202 ((POLARITY) == DCMI_PCKPOLARITY_RISING))
mbed_official 87:085cde657901 203 /**
mbed_official 87:085cde657901 204 * @}
mbed_official 226:b062af740e40 205 */
mbed_official 87:085cde657901 206
mbed_official 226:b062af740e40 207 /** @defgroup DCMI_VSYNC_Polarity
mbed_official 87:085cde657901 208 * @{
mbed_official 226:b062af740e40 209 */
mbed_official 87:085cde657901 210 #define DCMI_VSPOLARITY_LOW ((uint32_t)0x00000000) /*!< Vertical synchronization active Low */
mbed_official 87:085cde657901 211 #define DCMI_VSPOLARITY_HIGH ((uint32_t)DCMI_CR_VSPOL) /*!< Vertical synchronization active High */
mbed_official 87:085cde657901 212
mbed_official 87:085cde657901 213 #define IS_DCMI_VSPOLARITY(POLARITY)(((POLARITY) == DCMI_VSPOLARITY_LOW) || \
mbed_official 87:085cde657901 214 ((POLARITY) == DCMI_VSPOLARITY_HIGH))
mbed_official 87:085cde657901 215 /**
mbed_official 87:085cde657901 216 * @}
mbed_official 226:b062af740e40 217 */
mbed_official 87:085cde657901 218
mbed_official 226:b062af740e40 219 /** @defgroup DCMI_HSYNC_Polarity
mbed_official 87:085cde657901 220 * @{
mbed_official 87:085cde657901 221 */
mbed_official 87:085cde657901 222 #define DCMI_HSPOLARITY_LOW ((uint32_t)0x00000000) /*!< Horizontal synchronization active Low */
mbed_official 87:085cde657901 223 #define DCMI_HSPOLARITY_HIGH ((uint32_t)DCMI_CR_HSPOL) /*!< Horizontal synchronization active High */
mbed_official 87:085cde657901 224
mbed_official 87:085cde657901 225 #define IS_DCMI_HSPOLARITY(POLARITY)(((POLARITY) == DCMI_HSPOLARITY_LOW) || \
mbed_official 87:085cde657901 226 ((POLARITY) == DCMI_HSPOLARITY_HIGH))
mbed_official 87:085cde657901 227 /**
mbed_official 87:085cde657901 228 * @}
mbed_official 226:b062af740e40 229 */
mbed_official 87:085cde657901 230
mbed_official 87:085cde657901 231 /** @defgroup DCMI_MODE_JPEG
mbed_official 87:085cde657901 232 * @{
mbed_official 226:b062af740e40 233 */
mbed_official 87:085cde657901 234 #define DCMI_JPEG_DISABLE ((uint32_t)0x00000000) /*!< Mode JPEG Disabled */
mbed_official 87:085cde657901 235 #define DCMI_JPEG_ENABLE ((uint32_t)DCMI_CR_JPEG) /*!< Mode JPEG Enabled */
mbed_official 87:085cde657901 236
mbed_official 87:085cde657901 237 #define IS_DCMI_MODE_JPEG(JPEG_MODE)(((JPEG_MODE) == DCMI_JPEG_DISABLE) || \
mbed_official 87:085cde657901 238 ((JPEG_MODE) == DCMI_JPEG_ENABLE))
mbed_official 87:085cde657901 239 /**
mbed_official 87:085cde657901 240 * @}
mbed_official 226:b062af740e40 241 */
mbed_official 87:085cde657901 242
mbed_official 87:085cde657901 243 /** @defgroup DCMI_Capture_Rate
mbed_official 87:085cde657901 244 * @{
mbed_official 226:b062af740e40 245 */
mbed_official 87:085cde657901 246 #define DCMI_CR_ALL_FRAME ((uint32_t)0x00000000) /*!< All frames are captured */
mbed_official 87:085cde657901 247 #define DCMI_CR_ALTERNATE_2_FRAME ((uint32_t)DCMI_CR_FCRC_0) /*!< Every alternate frame captured */
mbed_official 87:085cde657901 248 #define DCMI_CR_ALTERNATE_4_FRAME ((uint32_t)DCMI_CR_FCRC_1) /*!< One frame in 4 frames captured */
mbed_official 87:085cde657901 249
mbed_official 87:085cde657901 250 #define IS_DCMI_CAPTURE_RATE(RATE) (((RATE) == DCMI_CR_ALL_FRAME) || \
mbed_official 87:085cde657901 251 ((RATE) == DCMI_CR_ALTERNATE_2_FRAME) || \
mbed_official 87:085cde657901 252 ((RATE) == DCMI_CR_ALTERNATE_4_FRAME))
mbed_official 87:085cde657901 253 /**
mbed_official 87:085cde657901 254 * @}
mbed_official 226:b062af740e40 255 */
mbed_official 87:085cde657901 256
mbed_official 87:085cde657901 257 /** @defgroup DCMI_Extended_Data_Mode
mbed_official 87:085cde657901 258 * @{
mbed_official 226:b062af740e40 259 */
mbed_official 87:085cde657901 260 #define DCMI_EXTEND_DATA_8B ((uint32_t)0x00000000) /*!< Interface captures 8-bit data on every pixel clock */
mbed_official 87:085cde657901 261 #define DCMI_EXTEND_DATA_10B ((uint32_t)DCMI_CR_EDM_0) /*!< Interface captures 10-bit data on every pixel clock */
mbed_official 87:085cde657901 262 #define DCMI_EXTEND_DATA_12B ((uint32_t)DCMI_CR_EDM_1) /*!< Interface captures 12-bit data on every pixel clock */
mbed_official 87:085cde657901 263 #define DCMI_EXTEND_DATA_14B ((uint32_t)(DCMI_CR_EDM_0 | DCMI_CR_EDM_1)) /*!< Interface captures 14-bit data on every pixel clock */
mbed_official 87:085cde657901 264
mbed_official 87:085cde657901 265 #define IS_DCMI_EXTENDED_DATA(DATA)(((DATA) == DCMI_EXTEND_DATA_8B) || \
mbed_official 87:085cde657901 266 ((DATA) == DCMI_EXTEND_DATA_10B) || \
mbed_official 87:085cde657901 267 ((DATA) == DCMI_EXTEND_DATA_12B) || \
mbed_official 87:085cde657901 268 ((DATA) == DCMI_EXTEND_DATA_14B))
mbed_official 87:085cde657901 269 /**
mbed_official 87:085cde657901 270 * @}
mbed_official 226:b062af740e40 271 */
mbed_official 87:085cde657901 272
mbed_official 87:085cde657901 273 /** @defgroup DCMI_Window_Coordinate
mbed_official 87:085cde657901 274 * @{
mbed_official 226:b062af740e40 275 */
mbed_official 87:085cde657901 276 #define DCMI_WINDOW_COORDINATE ((uint32_t)0x3FFF) /*!< Window coordinate */
mbed_official 87:085cde657901 277
mbed_official 87:085cde657901 278 #define IS_DCMI_WINDOW_COORDINATE(COORDINATE) ((COORDINATE) <= DCMI_WINDOW_COORDINATE)
mbed_official 87:085cde657901 279 /**
mbed_official 87:085cde657901 280 * @}
mbed_official 87:085cde657901 281 */
mbed_official 87:085cde657901 282
mbed_official 87:085cde657901 283 /** @defgroup DCMI_Window_Height
mbed_official 87:085cde657901 284 * @{
mbed_official 87:085cde657901 285 */
mbed_official 87:085cde657901 286 #define DCMI_WINDOW_HEIGHT ((uint32_t)0x1FFF) /*!< Window Height */
mbed_official 87:085cde657901 287
mbed_official 87:085cde657901 288 #define IS_DCMI_WINDOW_HEIGHT(HEIGHT) ((HEIGHT) <= DCMI_WINDOW_HEIGHT)
mbed_official 87:085cde657901 289 /**
mbed_official 87:085cde657901 290 * @}
mbed_official 226:b062af740e40 291 */
mbed_official 87:085cde657901 292
mbed_official 226:b062af740e40 293 /** @defgroup DCMI_interrupt_sources
mbed_official 87:085cde657901 294 * @{
mbed_official 226:b062af740e40 295 */
mbed_official 87:085cde657901 296 #define DCMI_IT_FRAME ((uint32_t)DCMI_IER_FRAME_IE)
mbed_official 87:085cde657901 297 #define DCMI_IT_OVF ((uint32_t)DCMI_IER_OVF_IE)
mbed_official 87:085cde657901 298 #define DCMI_IT_ERR ((uint32_t)DCMI_IER_ERR_IE)
mbed_official 87:085cde657901 299 #define DCMI_IT_VSYNC ((uint32_t)DCMI_IER_VSYNC_IE)
mbed_official 87:085cde657901 300 #define DCMI_IT_LINE ((uint32_t)DCMI_IER_LINE_IE)
mbed_official 87:085cde657901 301
mbed_official 87:085cde657901 302 #define IS_DCMI_CONFIG_IT(IT) ((((IT) & (uint16_t)0xFFE0) == 0x0000) && ((IT) != 0x0000))
mbed_official 87:085cde657901 303
mbed_official 87:085cde657901 304 #define IS_DCMI_GET_IT(IT) (((IT) == DCMI_IT_FRAME) || \
mbed_official 87:085cde657901 305 ((IT) == DCMI_IT_OVF) || \
mbed_official 87:085cde657901 306 ((IT) == DCMI_IT_ERR) || \
mbed_official 87:085cde657901 307 ((IT) == DCMI_IT_VSYNC) || \
mbed_official 87:085cde657901 308 ((IT) == DCMI_IT_LINE))
mbed_official 87:085cde657901 309 /**
mbed_official 87:085cde657901 310 * @}
mbed_official 226:b062af740e40 311 */
mbed_official 87:085cde657901 312
mbed_official 226:b062af740e40 313 /** @defgroup DCMI_Flags
mbed_official 87:085cde657901 314 * @{
mbed_official 226:b062af740e40 315 */
mbed_official 226:b062af740e40 316
mbed_official 87:085cde657901 317 /**
mbed_official 226:b062af740e40 318 * @brief DCMI SR register
mbed_official 87:085cde657901 319 */
mbed_official 87:085cde657901 320 #define DCMI_FLAG_HSYNC ((uint32_t)0x2001)
mbed_official 87:085cde657901 321 #define DCMI_FLAG_VSYNC ((uint32_t)0x2002)
mbed_official 87:085cde657901 322 #define DCMI_FLAG_FNE ((uint32_t)0x2004)
mbed_official 87:085cde657901 323 /**
mbed_official 87:085cde657901 324 * @brief DCMI RISR register
mbed_official 87:085cde657901 325 */
mbed_official 87:085cde657901 326 #define DCMI_FLAG_FRAMERI ((uint32_t)DCMI_RISR_FRAME_RIS)
mbed_official 87:085cde657901 327 #define DCMI_FLAG_OVFRI ((uint32_t)DCMI_RISR_OVF_RIS)
mbed_official 87:085cde657901 328 #define DCMI_FLAG_ERRRI ((uint32_t)DCMI_RISR_ERR_RIS)
mbed_official 87:085cde657901 329 #define DCMI_FLAG_VSYNCRI ((uint32_t)DCMI_RISR_VSYNC_RIS)
mbed_official 87:085cde657901 330 #define DCMI_FLAG_LINERI ((uint32_t)DCMI_RISR_LINE_RIS)
mbed_official 87:085cde657901 331 /**
mbed_official 87:085cde657901 332 * @brief DCMI MISR register
mbed_official 87:085cde657901 333 */
mbed_official 87:085cde657901 334 #define DCMI_FLAG_FRAMEMI ((uint32_t)0x1001)
mbed_official 87:085cde657901 335 #define DCMI_FLAG_OVFMI ((uint32_t)0x1002)
mbed_official 87:085cde657901 336 #define DCMI_FLAG_ERRMI ((uint32_t)0x1004)
mbed_official 87:085cde657901 337 #define DCMI_FLAG_VSYNCMI ((uint32_t)0x1008)
mbed_official 87:085cde657901 338 #define DCMI_FLAG_LINEMI ((uint32_t)0x1010)
mbed_official 87:085cde657901 339 #define IS_DCMI_GET_FLAG(FLAG) (((FLAG) == DCMI_FLAG_HSYNC) || \
mbed_official 87:085cde657901 340 ((FLAG) == DCMI_FLAG_VSYNC) || \
mbed_official 87:085cde657901 341 ((FLAG) == DCMI_FLAG_FNE) || \
mbed_official 87:085cde657901 342 ((FLAG) == DCMI_FLAG_FRAMERI) || \
mbed_official 87:085cde657901 343 ((FLAG) == DCMI_FLAG_OVFRI) || \
mbed_official 87:085cde657901 344 ((FLAG) == DCMI_FLAG_ERRRI) || \
mbed_official 87:085cde657901 345 ((FLAG) == DCMI_FLAG_VSYNCRI) || \
mbed_official 87:085cde657901 346 ((FLAG) == DCMI_FLAG_LINERI) || \
mbed_official 87:085cde657901 347 ((FLAG) == DCMI_FLAG_FRAMEMI) || \
mbed_official 87:085cde657901 348 ((FLAG) == DCMI_FLAG_OVFMI) || \
mbed_official 87:085cde657901 349 ((FLAG) == DCMI_FLAG_ERRMI) || \
mbed_official 87:085cde657901 350 ((FLAG) == DCMI_FLAG_VSYNCMI) || \
mbed_official 87:085cde657901 351 ((FLAG) == DCMI_FLAG_LINEMI))
mbed_official 87:085cde657901 352
mbed_official 87:085cde657901 353 #define IS_DCMI_CLEAR_FLAG(FLAG) ((((FLAG) & (uint32_t)0xFFE0) == 0x0000) && ((FLAG) != 0x0000))
mbed_official 87:085cde657901 354 /**
mbed_official 87:085cde657901 355 * @}
mbed_official 87:085cde657901 356 */
mbed_official 87:085cde657901 357
mbed_official 87:085cde657901 358 /**
mbed_official 87:085cde657901 359 * @}
mbed_official 87:085cde657901 360 */
mbed_official 87:085cde657901 361
mbed_official 87:085cde657901 362 /* Exported macro ------------------------------------------------------------*/
mbed_official 226:b062af740e40 363
mbed_official 226:b062af740e40 364 /** @brief Reset DCMI handle state
mbed_official 226:b062af740e40 365 * @param __HANDLE__: specifies the DCMI handle.
mbed_official 226:b062af740e40 366 * @retval None
mbed_official 226:b062af740e40 367 */
mbed_official 226:b062af740e40 368 #define __HAL_DCMI_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_DCMI_STATE_RESET)
mbed_official 226:b062af740e40 369
mbed_official 87:085cde657901 370 /**
mbed_official 87:085cde657901 371 * @brief Enable the DCMI.
mbed_official 87:085cde657901 372 * @param __HANDLE__: DCMI handle
mbed_official 87:085cde657901 373 * @retval None
mbed_official 87:085cde657901 374 */
mbed_official 87:085cde657901 375 #define __HAL_DCMI_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR |= DCMI_CR_ENABLE)
mbed_official 87:085cde657901 376
mbed_official 87:085cde657901 377 /**
mbed_official 87:085cde657901 378 * @brief Disable the DCMI.
mbed_official 87:085cde657901 379 * @param __HANDLE__: DCMI handle
mbed_official 87:085cde657901 380 * @retval None
mbed_official 87:085cde657901 381 */
mbed_official 87:085cde657901 382 #define __HAL_DCMI_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR &= ~(DCMI_CR_ENABLE))
mbed_official 87:085cde657901 383
mbed_official 87:085cde657901 384 /* Interrupt & Flag management */
mbed_official 87:085cde657901 385 /**
mbed_official 87:085cde657901 386 * @brief Get the DCMI pending flags.
mbed_official 87:085cde657901 387 * @param __HANDLE__: DCMI handle
mbed_official 87:085cde657901 388 * @param __FLAG__: Get the specified flag.
mbed_official 87:085cde657901 389 * This parameter can be any combination of the following values:
mbed_official 87:085cde657901 390 * @arg DCMI_FLAG_FRAMERI: Frame capture complete flag mask
mbed_official 87:085cde657901 391 * @arg DCMI_FLAG_OVFRI: Overflow flag mask
mbed_official 87:085cde657901 392 * @arg DCMI_FLAG_ERRRI: Synchronization error flag mask
mbed_official 87:085cde657901 393 * @arg DCMI_FLAG_VSYNCRI: VSYNC flag mask
mbed_official 87:085cde657901 394 * @arg DCMI_FLAG_LINERI: Line flag mask
mbed_official 87:085cde657901 395 * @retval The state of FLAG.
mbed_official 87:085cde657901 396 */
mbed_official 87:085cde657901 397 #define __HAL_DCMI_GET_FLAG(__HANDLE__, __FLAG__)\
mbed_official 87:085cde657901 398 ((((__FLAG__) & 0x3000) == 0x0)? ((__HANDLE__)->Instance->RISR & (__FLAG__)) :\
mbed_official 87:085cde657901 399 (((__FLAG__) & 0x2000) == 0x0)? ((__HANDLE__)->Instance->MISR & (__FLAG__)) : ((__HANDLE__)->Instance->SR & (__FLAG__)))
mbed_official 87:085cde657901 400
mbed_official 87:085cde657901 401 /**
mbed_official 87:085cde657901 402 * @brief Clear the DCMI pending flags.
mbed_official 87:085cde657901 403 * @param __HANDLE__: DCMI handle
mbed_official 87:085cde657901 404 * @param __FLAG__: specifies the flag to clear.
mbed_official 87:085cde657901 405 * This parameter can be any combination of the following values:
mbed_official 87:085cde657901 406 * @arg DCMI_FLAG_FRAMERI: Frame capture complete flag mask
mbed_official 87:085cde657901 407 * @arg DCMI_FLAG_OVFRI: Overflow flag mask
mbed_official 87:085cde657901 408 * @arg DCMI_FLAG_ERRRI: Synchronization error flag mask
mbed_official 87:085cde657901 409 * @arg DCMI_FLAG_VSYNCRI: VSYNC flag mask
mbed_official 87:085cde657901 410 * @arg DCMI_FLAG_LINERI: Line flag mask
mbed_official 87:085cde657901 411 * @retval None
mbed_official 87:085cde657901 412 */
mbed_official 87:085cde657901 413 #define __HAL_DCMI_CLEAR_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->ICR |= (__FLAG__))
mbed_official 87:085cde657901 414
mbed_official 87:085cde657901 415 /**
mbed_official 87:085cde657901 416 * @brief Enable the specified DCMI interrupts.
mbed_official 87:085cde657901 417 * @param __HANDLE__: DCMI handle
mbed_official 87:085cde657901 418 * @param __INTERRUPT__: specifies the DCMI interrupt sources to be enabled.
mbed_official 87:085cde657901 419 * This parameter can be any combination of the following values:
mbed_official 87:085cde657901 420 * @arg DCMI_IT_FRAME: Frame capture complete interrupt mask
mbed_official 87:085cde657901 421 * @arg DCMI_IT_OVF: Overflow interrupt mask
mbed_official 87:085cde657901 422 * @arg DCMI_IT_ERR: Synchronization error interrupt mask
mbed_official 87:085cde657901 423 * @arg DCMI_IT_VSYNC: VSYNC interrupt mask
mbed_official 87:085cde657901 424 * @arg DCMI_IT_LINE: Line interrupt mask
mbed_official 87:085cde657901 425 * @retval None
mbed_official 87:085cde657901 426 */
mbed_official 87:085cde657901 427 #define __HAL_DCMI_ENABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->IER |= (__INTERRUPT__))
mbed_official 87:085cde657901 428
mbed_official 87:085cde657901 429 /**
mbed_official 87:085cde657901 430 * @brief Disable the specified DCMI interrupts.
mbed_official 87:085cde657901 431 * @param __HANDLE__: DCMI handle
mbed_official 87:085cde657901 432 * @param __INTERRUPT__: specifies the DCMI interrupt sources to be enabled.
mbed_official 87:085cde657901 433 * This parameter can be any combination of the following values:
mbed_official 87:085cde657901 434 * @arg DCMI_IT_FRAME: Frame capture complete interrupt mask
mbed_official 87:085cde657901 435 * @arg DCMI_IT_OVF: Overflow interrupt mask
mbed_official 87:085cde657901 436 * @arg DCMI_IT_ERR: Synchronization error interrupt mask
mbed_official 87:085cde657901 437 * @arg DCMI_IT_VSYNC: VSYNC interrupt mask
mbed_official 87:085cde657901 438 * @arg DCMI_IT_LINE: Line interrupt mask
mbed_official 87:085cde657901 439 * @retval None
mbed_official 87:085cde657901 440 */
mbed_official 87:085cde657901 441 #define __HAL_DCMI_DISABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->IER &= ~(__INTERRUPT__))
mbed_official 87:085cde657901 442
mbed_official 87:085cde657901 443 /**
mbed_official 87:085cde657901 444 * @brief Check whether the specified DCMI interrupt has occurred or not.
mbed_official 87:085cde657901 445 * @param __HANDLE__: DCMI handle
mbed_official 87:085cde657901 446 * @param __INTERRUPT__: specifies the DCMI interrupt source to check.
mbed_official 87:085cde657901 447 * This parameter can be one of the following values:
mbed_official 87:085cde657901 448 * @arg DCMI_IT_FRAME: Frame capture complete interrupt mask
mbed_official 87:085cde657901 449 * @arg DCMI_IT_OVF: Overflow interrupt mask
mbed_official 87:085cde657901 450 * @arg DCMI_IT_ERR: Synchronization error interrupt mask
mbed_official 87:085cde657901 451 * @arg DCMI_IT_VSYNC: VSYNC interrupt mask
mbed_official 87:085cde657901 452 * @arg DCMI_IT_LINE: Line interrupt mask
mbed_official 87:085cde657901 453 * @retval The state of INTERRUPT.
mbed_official 87:085cde657901 454 */
mbed_official 106:ced8cbb51063 455 #define __HAL_DCMI_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->MISR & (__INTERRUPT__))
mbed_official 87:085cde657901 456
mbed_official 226:b062af740e40 457 /* Exported functions --------------------------------------------------------*/
mbed_official 87:085cde657901 458
mbed_official 226:b062af740e40 459 /* Initialization and de-initialization functions *****************************/
mbed_official 87:085cde657901 460 HAL_StatusTypeDef HAL_DCMI_Init(DCMI_HandleTypeDef *hdcmi);
mbed_official 87:085cde657901 461 HAL_StatusTypeDef HAL_DCMI_DeInit(DCMI_HandleTypeDef *hdcmi);
mbed_official 106:ced8cbb51063 462 void HAL_DCMI_MspInit(DCMI_HandleTypeDef* hdcmi);
mbed_official 106:ced8cbb51063 463 void HAL_DCMI_MspDeInit(DCMI_HandleTypeDef* hdcmi);
mbed_official 87:085cde657901 464
mbed_official 226:b062af740e40 465 /* IO operation functions *****************************************************/
mbed_official 87:085cde657901 466 HAL_StatusTypeDef HAL_DCMI_Start_DMA(DCMI_HandleTypeDef* hdcmi, uint32_t DCMI_Mode, uint32_t pData, uint32_t Length);
mbed_official 87:085cde657901 467 HAL_StatusTypeDef HAL_DCMI_Stop(DCMI_HandleTypeDef* hdcmi);
mbed_official 106:ced8cbb51063 468 void HAL_DCMI_ErrorCallback(DCMI_HandleTypeDef *hdcmi);
mbed_official 106:ced8cbb51063 469 void HAL_DCMI_LineEventCallback(DCMI_HandleTypeDef *hdcmi);
mbed_official 106:ced8cbb51063 470 void HAL_DCMI_FrameEventCallback(DCMI_HandleTypeDef *hdcmi);
mbed_official 106:ced8cbb51063 471 void HAL_DCMI_VsyncEventCallback(DCMI_HandleTypeDef *hdcmi);
mbed_official 87:085cde657901 472 void HAL_DCMI_IRQHandler(DCMI_HandleTypeDef *hdcmi);
mbed_official 87:085cde657901 473
mbed_official 226:b062af740e40 474 /* Peripheral Control functions ***********************************************/
mbed_official 87:085cde657901 475 HAL_StatusTypeDef HAL_DCMI_ConfigCROP(DCMI_HandleTypeDef *hdcmi, uint32_t X0, uint32_t Y0, uint32_t XSize, uint32_t YSize);
mbed_official 87:085cde657901 476 HAL_StatusTypeDef HAL_DCMI_EnableCROP(DCMI_HandleTypeDef *hdcmi);
mbed_official 87:085cde657901 477 HAL_StatusTypeDef HAL_DCMI_DisableCROP(DCMI_HandleTypeDef *hdcmi);
mbed_official 87:085cde657901 478
mbed_official 226:b062af740e40 479 /* Peripheral State functions *************************************************/
mbed_official 87:085cde657901 480 HAL_DCMI_StateTypeDef HAL_DCMI_GetState(DCMI_HandleTypeDef *hdcmi);
mbed_official 87:085cde657901 481 uint32_t HAL_DCMI_GetError(DCMI_HandleTypeDef *hdcmi);
mbed_official 87:085cde657901 482
mbed_official 87:085cde657901 483 #endif /* STM32F405xx || STM32F415xx || STM32F407xx || STM32F417xx || STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx */
mbed_official 87:085cde657901 484 /**
mbed_official 87:085cde657901 485 * @}
mbed_official 87:085cde657901 486 */
mbed_official 87:085cde657901 487
mbed_official 87:085cde657901 488 /**
mbed_official 87:085cde657901 489 * @}
mbed_official 87:085cde657901 490 */
mbed_official 87:085cde657901 491
mbed_official 87:085cde657901 492 #ifdef __cplusplus
mbed_official 87:085cde657901 493 }
mbed_official 87:085cde657901 494 #endif
mbed_official 87:085cde657901 495
mbed_official 87:085cde657901 496 #endif /* __STM32F4xx_HAL_DCMI_H */
mbed_official 87:085cde657901 497
mbed_official 87:085cde657901 498 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/