mbed library sources
Dependents: frdm_kl05z_gpio_test
Fork of mbed-src by
targets/cmsis/TARGET_STM/TARGET_NUCLEO_L152RE/stm32l1xx_spi.c@76:aeb1df146756, 2014-01-27 (annotated)
- Committer:
- mbed_official
- Date:
- Mon Jan 27 14:30:07 2014 +0000
- Revision:
- 76:aeb1df146756
- Child:
- 80:66393a7b209d
Synchronized with git revision a31ec9c5f7bcb5c8a1b2eced103f6a1dfa921abd
Full URL: https://github.com/mbedmicro/mbed/commit/a31ec9c5f7bcb5c8a1b2eced103f6a1dfa921abd/
Add NUCLEO_L152RE
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
mbed_official | 76:aeb1df146756 | 1 | /** |
mbed_official | 76:aeb1df146756 | 2 | ****************************************************************************** |
mbed_official | 76:aeb1df146756 | 3 | * @file stm32l1xx_spi.c |
mbed_official | 76:aeb1df146756 | 4 | * @author MCD Application Team |
mbed_official | 76:aeb1df146756 | 5 | * @version V1.2.0 |
mbed_official | 76:aeb1df146756 | 6 | * @date 22-February-2013 |
mbed_official | 76:aeb1df146756 | 7 | * @brief This file provides firmware functions to manage the following |
mbed_official | 76:aeb1df146756 | 8 | * functionalities of the Serial peripheral interface (SPI): |
mbed_official | 76:aeb1df146756 | 9 | * + Initialization and Configuration |
mbed_official | 76:aeb1df146756 | 10 | * + Data transfers functions |
mbed_official | 76:aeb1df146756 | 11 | * + Hardware CRC Calculation |
mbed_official | 76:aeb1df146756 | 12 | * + DMA transfers management |
mbed_official | 76:aeb1df146756 | 13 | * + Interrupts and flags management |
mbed_official | 76:aeb1df146756 | 14 | * |
mbed_official | 76:aeb1df146756 | 15 | * @verbatim |
mbed_official | 76:aeb1df146756 | 16 | [..] The I2S feature is not implemented in STM32L1xx Ultra Low Power |
mbed_official | 76:aeb1df146756 | 17 | Medium-density devices and it's supported only STM32L1xx Ultra Low Power |
mbed_official | 76:aeb1df146756 | 18 | Medium-density Plus and High-density devices. |
mbed_official | 76:aeb1df146756 | 19 | |
mbed_official | 76:aeb1df146756 | 20 | =============================================================================== |
mbed_official | 76:aeb1df146756 | 21 | ##### How to use this driver ##### |
mbed_official | 76:aeb1df146756 | 22 | =============================================================================== |
mbed_official | 76:aeb1df146756 | 23 | [..] |
mbed_official | 76:aeb1df146756 | 24 | (#) Enable peripheral clock using RCC_APB2PeriphClockCmd(RCC_APB2Periph_SPI1, ENABLE) |
mbed_official | 76:aeb1df146756 | 25 | function for SPI1 or using RCC_APB1PeriphClockCmd(RCC_APB1Periph_SPI2, ENABLE) |
mbed_official | 76:aeb1df146756 | 26 | function for SPI2 or using RCC_APB1PeriphResetCmd(RCC_APB1Periph_SPI3, ENABLE) |
mbed_official | 76:aeb1df146756 | 27 | for SPI3. |
mbed_official | 76:aeb1df146756 | 28 | |
mbed_official | 76:aeb1df146756 | 29 | (#) Enable SCK, MOSI, MISO and NSS GPIO clocks using |
mbed_official | 76:aeb1df146756 | 30 | RCC_AHBPeriphClockCmd() function. |
mbed_official | 76:aeb1df146756 | 31 | |
mbed_official | 76:aeb1df146756 | 32 | (#) Peripherals alternate function: |
mbed_official | 76:aeb1df146756 | 33 | (++) Connect the pin to the desired peripherals' Alternate |
mbed_official | 76:aeb1df146756 | 34 | Function (AF) using GPIO_PinAFConfig() function. |
mbed_official | 76:aeb1df146756 | 35 | (++) Configure the desired pin in alternate function by: |
mbed_official | 76:aeb1df146756 | 36 | GPIO_InitStruct->GPIO_Mode = GPIO_Mode_AF. |
mbed_official | 76:aeb1df146756 | 37 | (++) Select the type, pull-up/pull-down and output speed via |
mbed_official | 76:aeb1df146756 | 38 | GPIO_PuPd, GPIO_OType and GPIO_Speed members. |
mbed_official | 76:aeb1df146756 | 39 | (++) Call GPIO_Init() function. |
mbed_official | 76:aeb1df146756 | 40 | |
mbed_official | 76:aeb1df146756 | 41 | (#) Program the Polarity, Phase, First Data, Baud Rate Prescaler, Slave |
mbed_official | 76:aeb1df146756 | 42 | Management, Peripheral Mode and CRC Polynomial values using the SPI_Init() |
mbed_official | 76:aeb1df146756 | 43 | function.In I2S mode, program the Mode, Standard, Data Format, MCLK |
mbed_official | 76:aeb1df146756 | 44 | Output, Audio frequency and Polarity using I2S_Init() function. |
mbed_official | 76:aeb1df146756 | 45 | |
mbed_official | 76:aeb1df146756 | 46 | (#) Enable the NVIC and the corresponding interrupt using the function |
mbed_official | 76:aeb1df146756 | 47 | SPI_ITConfig() if you need to use interrupt mode. |
mbed_official | 76:aeb1df146756 | 48 | |
mbed_official | 76:aeb1df146756 | 49 | (#) When using the DMA mode |
mbed_official | 76:aeb1df146756 | 50 | (++) Configure the DMA using DMA_Init() function. |
mbed_official | 76:aeb1df146756 | 51 | (++) Active the needed channel Request using SPI_I2S_DMACmd() function. |
mbed_official | 76:aeb1df146756 | 52 | |
mbed_official | 76:aeb1df146756 | 53 | (#) Enable the SPI using the SPI_Cmd() function or enable the I2S using |
mbed_official | 76:aeb1df146756 | 54 | I2S_Cmd(). |
mbed_official | 76:aeb1df146756 | 55 | |
mbed_official | 76:aeb1df146756 | 56 | (#) Enable the DMA using the DMA_Cmd() function when using DMA mode. |
mbed_official | 76:aeb1df146756 | 57 | |
mbed_official | 76:aeb1df146756 | 58 | (#) Optionally, you can enable/configure the following parameters without |
mbed_official | 76:aeb1df146756 | 59 | re-initialization (i.e there is no need to call again SPI_Init() function): |
mbed_official | 76:aeb1df146756 | 60 | (++) When bidirectional mode (SPI_Direction_1Line_Rx or SPI_Direction_1Line_Tx) |
mbed_official | 76:aeb1df146756 | 61 | is programmed as Data direction parameter using the SPI_Init() |
mbed_official | 76:aeb1df146756 | 62 | function it can be possible to switch between SPI_Direction_Tx |
mbed_official | 76:aeb1df146756 | 63 | or SPI_Direction_Rx using the SPI_BiDirectionalLineConfig() function. |
mbed_official | 76:aeb1df146756 | 64 | (++) When SPI_NSS_Soft is selected as Slave Select Management parameter |
mbed_official | 76:aeb1df146756 | 65 | using the SPI_Init() function it can be possible to manage the |
mbed_official | 76:aeb1df146756 | 66 | NSS internal signal using the SPI_NSSInternalSoftwareConfig() function. |
mbed_official | 76:aeb1df146756 | 67 | (++) Reconfigure the data size using the SPI_DataSizeConfig() function. |
mbed_official | 76:aeb1df146756 | 68 | (++) Enable or disable the SS output using the SPI_SSOutputCmd() function. |
mbed_official | 76:aeb1df146756 | 69 | |
mbed_official | 76:aeb1df146756 | 70 | (#) To use the CRC Hardware calculation feature refer to the Peripheral |
mbed_official | 76:aeb1df146756 | 71 | CRC hardware Calculation subsection. |
mbed_official | 76:aeb1df146756 | 72 | |
mbed_official | 76:aeb1df146756 | 73 | @endverbatim |
mbed_official | 76:aeb1df146756 | 74 | |
mbed_official | 76:aeb1df146756 | 75 | ****************************************************************************** |
mbed_official | 76:aeb1df146756 | 76 | * @attention |
mbed_official | 76:aeb1df146756 | 77 | * |
mbed_official | 76:aeb1df146756 | 78 | * <h2><center>© COPYRIGHT 2013 STMicroelectronics</center></h2> |
mbed_official | 76:aeb1df146756 | 79 | * |
mbed_official | 76:aeb1df146756 | 80 | * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); |
mbed_official | 76:aeb1df146756 | 81 | * You may not use this file except in compliance with the License. |
mbed_official | 76:aeb1df146756 | 82 | * You may obtain a copy of the License at: |
mbed_official | 76:aeb1df146756 | 83 | * |
mbed_official | 76:aeb1df146756 | 84 | * http://www.st.com/software_license_agreement_liberty_v2 |
mbed_official | 76:aeb1df146756 | 85 | * |
mbed_official | 76:aeb1df146756 | 86 | * Unless required by applicable law or agreed to in writing, software |
mbed_official | 76:aeb1df146756 | 87 | * distributed under the License is distributed on an "AS IS" BASIS, |
mbed_official | 76:aeb1df146756 | 88 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. |
mbed_official | 76:aeb1df146756 | 89 | * See the License for the specific language governing permissions and |
mbed_official | 76:aeb1df146756 | 90 | * limitations under the License. |
mbed_official | 76:aeb1df146756 | 91 | * |
mbed_official | 76:aeb1df146756 | 92 | ****************************************************************************** |
mbed_official | 76:aeb1df146756 | 93 | */ |
mbed_official | 76:aeb1df146756 | 94 | |
mbed_official | 76:aeb1df146756 | 95 | /* Includes ------------------------------------------------------------------*/ |
mbed_official | 76:aeb1df146756 | 96 | #include "stm32l1xx_spi.h" |
mbed_official | 76:aeb1df146756 | 97 | #include "stm32l1xx_rcc.h" |
mbed_official | 76:aeb1df146756 | 98 | |
mbed_official | 76:aeb1df146756 | 99 | /** @addtogroup STM32L1xx_StdPeriph_Driver |
mbed_official | 76:aeb1df146756 | 100 | * @{ |
mbed_official | 76:aeb1df146756 | 101 | */ |
mbed_official | 76:aeb1df146756 | 102 | |
mbed_official | 76:aeb1df146756 | 103 | /** @defgroup SPI |
mbed_official | 76:aeb1df146756 | 104 | * @brief SPI driver modules |
mbed_official | 76:aeb1df146756 | 105 | * @{ |
mbed_official | 76:aeb1df146756 | 106 | */ |
mbed_official | 76:aeb1df146756 | 107 | |
mbed_official | 76:aeb1df146756 | 108 | /* Private typedef -----------------------------------------------------------*/ |
mbed_official | 76:aeb1df146756 | 109 | /* Private define ------------------------------------------------------------*/ |
mbed_official | 76:aeb1df146756 | 110 | /* SPI registers Masks */ |
mbed_official | 76:aeb1df146756 | 111 | #define CR1_CLEAR_MASK ((uint16_t)0x3040) |
mbed_official | 76:aeb1df146756 | 112 | #define I2SCFGR_CLEAR_Mask ((uint16_t)0xF040) |
mbed_official | 76:aeb1df146756 | 113 | |
mbed_official | 76:aeb1df146756 | 114 | /* Private macro -------------------------------------------------------------*/ |
mbed_official | 76:aeb1df146756 | 115 | /* Private variables ---------------------------------------------------------*/ |
mbed_official | 76:aeb1df146756 | 116 | /* Private function prototypes -----------------------------------------------*/ |
mbed_official | 76:aeb1df146756 | 117 | /* Private functions ---------------------------------------------------------*/ |
mbed_official | 76:aeb1df146756 | 118 | |
mbed_official | 76:aeb1df146756 | 119 | /** @defgroup SPI_Private_Functions |
mbed_official | 76:aeb1df146756 | 120 | * @{ |
mbed_official | 76:aeb1df146756 | 121 | */ |
mbed_official | 76:aeb1df146756 | 122 | |
mbed_official | 76:aeb1df146756 | 123 | /** @defgroup SPI_Group1 Initialization and Configuration functions |
mbed_official | 76:aeb1df146756 | 124 | * @brief Initialization and Configuration functions |
mbed_official | 76:aeb1df146756 | 125 | * |
mbed_official | 76:aeb1df146756 | 126 | @verbatim |
mbed_official | 76:aeb1df146756 | 127 | =============================================================================== |
mbed_official | 76:aeb1df146756 | 128 | ##### Initialization and Configuration functions ##### |
mbed_official | 76:aeb1df146756 | 129 | =============================================================================== |
mbed_official | 76:aeb1df146756 | 130 | [..] This section provides a set of functions allowing to initialize the SPI |
mbed_official | 76:aeb1df146756 | 131 | Direction, SPI Mode, SPI Data Size, SPI Polarity, SPI Phase, SPI NSS |
mbed_official | 76:aeb1df146756 | 132 | Management, SPI Baud Rate Prescaler, SPI First Bit and SPI CRC Polynomial. |
mbed_official | 76:aeb1df146756 | 133 | [..] The SPI_Init() function follows the SPI configuration procedures for |
mbed_official | 76:aeb1df146756 | 134 | Master mode and Slave mode (details for these procedures are available |
mbed_official | 76:aeb1df146756 | 135 | in reference manual (RM0038)). |
mbed_official | 76:aeb1df146756 | 136 | |
mbed_official | 76:aeb1df146756 | 137 | @endverbatim |
mbed_official | 76:aeb1df146756 | 138 | * @{ |
mbed_official | 76:aeb1df146756 | 139 | */ |
mbed_official | 76:aeb1df146756 | 140 | |
mbed_official | 76:aeb1df146756 | 141 | /** |
mbed_official | 76:aeb1df146756 | 142 | * @brief Deinitializes the SPIx peripheral registers to their default |
mbed_official | 76:aeb1df146756 | 143 | * reset values. |
mbed_official | 76:aeb1df146756 | 144 | * @param SPIx: To select the SPIx/I2Sx peripheral, where x can be: 1, 2 or 3 |
mbed_official | 76:aeb1df146756 | 145 | * in SPI mode or 2 or 3 in I2S mode. |
mbed_official | 76:aeb1df146756 | 146 | * @retval None |
mbed_official | 76:aeb1df146756 | 147 | */ |
mbed_official | 76:aeb1df146756 | 148 | void SPI_I2S_DeInit(SPI_TypeDef* SPIx) |
mbed_official | 76:aeb1df146756 | 149 | { |
mbed_official | 76:aeb1df146756 | 150 | /* Check the parameters */ |
mbed_official | 76:aeb1df146756 | 151 | assert_param(IS_SPI_ALL_PERIPH(SPIx)); |
mbed_official | 76:aeb1df146756 | 152 | |
mbed_official | 76:aeb1df146756 | 153 | if (SPIx == SPI1) |
mbed_official | 76:aeb1df146756 | 154 | { |
mbed_official | 76:aeb1df146756 | 155 | /* Enable SPI1 reset state */ |
mbed_official | 76:aeb1df146756 | 156 | RCC_APB2PeriphResetCmd(RCC_APB2Periph_SPI1, ENABLE); |
mbed_official | 76:aeb1df146756 | 157 | /* Release SPI1 from reset state */ |
mbed_official | 76:aeb1df146756 | 158 | RCC_APB2PeriphResetCmd(RCC_APB2Periph_SPI1, DISABLE); |
mbed_official | 76:aeb1df146756 | 159 | } |
mbed_official | 76:aeb1df146756 | 160 | else if (SPIx == SPI2) |
mbed_official | 76:aeb1df146756 | 161 | { |
mbed_official | 76:aeb1df146756 | 162 | /* Enable SPI2 reset state */ |
mbed_official | 76:aeb1df146756 | 163 | RCC_APB1PeriphResetCmd(RCC_APB1Periph_SPI2, ENABLE); |
mbed_official | 76:aeb1df146756 | 164 | /* Release SPI2 from reset state */ |
mbed_official | 76:aeb1df146756 | 165 | RCC_APB1PeriphResetCmd(RCC_APB1Periph_SPI2, DISABLE); |
mbed_official | 76:aeb1df146756 | 166 | } |
mbed_official | 76:aeb1df146756 | 167 | else |
mbed_official | 76:aeb1df146756 | 168 | { |
mbed_official | 76:aeb1df146756 | 169 | if (SPIx == SPI3) |
mbed_official | 76:aeb1df146756 | 170 | { |
mbed_official | 76:aeb1df146756 | 171 | /* Enable SPI3 reset state */ |
mbed_official | 76:aeb1df146756 | 172 | RCC_APB1PeriphResetCmd(RCC_APB1Periph_SPI3, ENABLE); |
mbed_official | 76:aeb1df146756 | 173 | /* Release SPI3 from reset state */ |
mbed_official | 76:aeb1df146756 | 174 | RCC_APB1PeriphResetCmd(RCC_APB1Periph_SPI3, DISABLE); |
mbed_official | 76:aeb1df146756 | 175 | } |
mbed_official | 76:aeb1df146756 | 176 | } |
mbed_official | 76:aeb1df146756 | 177 | } |
mbed_official | 76:aeb1df146756 | 178 | |
mbed_official | 76:aeb1df146756 | 179 | /** |
mbed_official | 76:aeb1df146756 | 180 | * @brief Initializes the SPIx peripheral according to the specified |
mbed_official | 76:aeb1df146756 | 181 | * parameters in the SPI_InitStruct. |
mbed_official | 76:aeb1df146756 | 182 | * @param SPIx: where x can be 1, 2 or 3 to select the SPI peripheral. |
mbed_official | 76:aeb1df146756 | 183 | * @param SPI_InitStruct: pointer to a SPI_InitTypeDef structure that |
mbed_official | 76:aeb1df146756 | 184 | * contains the configuration information for the specified SPI peripheral. |
mbed_official | 76:aeb1df146756 | 185 | * @retval None |
mbed_official | 76:aeb1df146756 | 186 | */ |
mbed_official | 76:aeb1df146756 | 187 | void SPI_Init(SPI_TypeDef* SPIx, SPI_InitTypeDef* SPI_InitStruct) |
mbed_official | 76:aeb1df146756 | 188 | { |
mbed_official | 76:aeb1df146756 | 189 | uint16_t tmpreg = 0; |
mbed_official | 76:aeb1df146756 | 190 | |
mbed_official | 76:aeb1df146756 | 191 | /* check the parameters */ |
mbed_official | 76:aeb1df146756 | 192 | assert_param(IS_SPI_ALL_PERIPH(SPIx)); |
mbed_official | 76:aeb1df146756 | 193 | |
mbed_official | 76:aeb1df146756 | 194 | /* Check the SPI parameters */ |
mbed_official | 76:aeb1df146756 | 195 | assert_param(IS_SPI_DIRECTION_MODE(SPI_InitStruct->SPI_Direction)); |
mbed_official | 76:aeb1df146756 | 196 | assert_param(IS_SPI_MODE(SPI_InitStruct->SPI_Mode)); |
mbed_official | 76:aeb1df146756 | 197 | assert_param(IS_SPI_DATASIZE(SPI_InitStruct->SPI_DataSize)); |
mbed_official | 76:aeb1df146756 | 198 | assert_param(IS_SPI_CPOL(SPI_InitStruct->SPI_CPOL)); |
mbed_official | 76:aeb1df146756 | 199 | assert_param(IS_SPI_CPHA(SPI_InitStruct->SPI_CPHA)); |
mbed_official | 76:aeb1df146756 | 200 | assert_param(IS_SPI_NSS(SPI_InitStruct->SPI_NSS)); |
mbed_official | 76:aeb1df146756 | 201 | assert_param(IS_SPI_BAUDRATE_PRESCALER(SPI_InitStruct->SPI_BaudRatePrescaler)); |
mbed_official | 76:aeb1df146756 | 202 | assert_param(IS_SPI_FIRST_BIT(SPI_InitStruct->SPI_FirstBit)); |
mbed_official | 76:aeb1df146756 | 203 | assert_param(IS_SPI_CRC_POLYNOMIAL(SPI_InitStruct->SPI_CRCPolynomial)); |
mbed_official | 76:aeb1df146756 | 204 | |
mbed_official | 76:aeb1df146756 | 205 | /*---------------------------- SPIx CR1 Configuration ------------------------*/ |
mbed_official | 76:aeb1df146756 | 206 | /* Get the SPIx CR1 value */ |
mbed_official | 76:aeb1df146756 | 207 | tmpreg = SPIx->CR1; |
mbed_official | 76:aeb1df146756 | 208 | /* Clear BIDIMode, BIDIOE, RxONLY, SSM, SSI, LSBFirst, BR, MSTR, CPOL and CPHA bits */ |
mbed_official | 76:aeb1df146756 | 209 | tmpreg &= CR1_CLEAR_MASK; |
mbed_official | 76:aeb1df146756 | 210 | /* Configure SPIx: direction, NSS management, first transmitted bit, BaudRate prescaler |
mbed_official | 76:aeb1df146756 | 211 | master/salve mode, CPOL and CPHA */ |
mbed_official | 76:aeb1df146756 | 212 | /* Set BIDImode, BIDIOE and RxONLY bits according to SPI_Direction value */ |
mbed_official | 76:aeb1df146756 | 213 | /* Set SSM, SSI and MSTR bits according to SPI_Mode and SPI_NSS values */ |
mbed_official | 76:aeb1df146756 | 214 | /* Set LSBFirst bit according to SPI_FirstBit value */ |
mbed_official | 76:aeb1df146756 | 215 | /* Set BR bits according to SPI_BaudRatePrescaler value */ |
mbed_official | 76:aeb1df146756 | 216 | /* Set CPOL bit according to SPI_CPOL value */ |
mbed_official | 76:aeb1df146756 | 217 | /* Set CPHA bit according to SPI_CPHA value */ |
mbed_official | 76:aeb1df146756 | 218 | tmpreg |= (uint16_t)((uint32_t)SPI_InitStruct->SPI_Direction | SPI_InitStruct->SPI_Mode | |
mbed_official | 76:aeb1df146756 | 219 | SPI_InitStruct->SPI_DataSize | SPI_InitStruct->SPI_CPOL | |
mbed_official | 76:aeb1df146756 | 220 | SPI_InitStruct->SPI_CPHA | SPI_InitStruct->SPI_NSS | |
mbed_official | 76:aeb1df146756 | 221 | SPI_InitStruct->SPI_BaudRatePrescaler | SPI_InitStruct->SPI_FirstBit); |
mbed_official | 76:aeb1df146756 | 222 | /* Write to SPIx CR1 */ |
mbed_official | 76:aeb1df146756 | 223 | SPIx->CR1 = tmpreg; |
mbed_official | 76:aeb1df146756 | 224 | |
mbed_official | 76:aeb1df146756 | 225 | /* Activate the SPI mode (Reset I2SMOD bit in I2SCFGR register) */ |
mbed_official | 76:aeb1df146756 | 226 | SPIx->I2SCFGR &= (uint16_t)~((uint16_t)SPI_I2SCFGR_I2SMOD); |
mbed_official | 76:aeb1df146756 | 227 | /*---------------------------- SPIx CRCPOLY Configuration --------------------*/ |
mbed_official | 76:aeb1df146756 | 228 | /* Write to SPIx CRCPOLY */ |
mbed_official | 76:aeb1df146756 | 229 | SPIx->CRCPR = SPI_InitStruct->SPI_CRCPolynomial; |
mbed_official | 76:aeb1df146756 | 230 | } |
mbed_official | 76:aeb1df146756 | 231 | |
mbed_official | 76:aeb1df146756 | 232 | /** |
mbed_official | 76:aeb1df146756 | 233 | * @brief Initializes the SPIx peripheral according to the specified |
mbed_official | 76:aeb1df146756 | 234 | * parameters in the I2S_InitStruct. |
mbed_official | 76:aeb1df146756 | 235 | * @param SPIx: where x can be 2 or 3 to select the SPI peripheral |
mbed_official | 76:aeb1df146756 | 236 | * (configured in I2S mode). |
mbed_official | 76:aeb1df146756 | 237 | * @param I2S_InitStruct: pointer to an I2S_InitTypeDef structure that |
mbed_official | 76:aeb1df146756 | 238 | * contains the configuration information for the specified SPI peripheral |
mbed_official | 76:aeb1df146756 | 239 | * configured in I2S mode. |
mbed_official | 76:aeb1df146756 | 240 | * @note |
mbed_official | 76:aeb1df146756 | 241 | * The function calculates the optimal prescaler needed to obtain the most |
mbed_official | 76:aeb1df146756 | 242 | * accurate audio frequency (depending on the I2S clock source, the PLL values |
mbed_official | 76:aeb1df146756 | 243 | * and the product configuration). But in case the prescaler value is greater |
mbed_official | 76:aeb1df146756 | 244 | * than 511, the default value (0x02) will be configured instead. |
mbed_official | 76:aeb1df146756 | 245 | * @retval None |
mbed_official | 76:aeb1df146756 | 246 | */ |
mbed_official | 76:aeb1df146756 | 247 | void I2S_Init(SPI_TypeDef* SPIx, I2S_InitTypeDef* I2S_InitStruct) |
mbed_official | 76:aeb1df146756 | 248 | { |
mbed_official | 76:aeb1df146756 | 249 | uint16_t tmpreg = 0, i2sdiv = 2, i2sodd = 0, packetlength = 1; |
mbed_official | 76:aeb1df146756 | 250 | uint32_t tmp = 0; |
mbed_official | 76:aeb1df146756 | 251 | RCC_ClocksTypeDef RCC_Clocks; |
mbed_official | 76:aeb1df146756 | 252 | uint32_t sourceclock = 0; |
mbed_official | 76:aeb1df146756 | 253 | |
mbed_official | 76:aeb1df146756 | 254 | /* Check the I2S parameters */ |
mbed_official | 76:aeb1df146756 | 255 | assert_param(IS_SPI_23_PERIPH(SPIx)); |
mbed_official | 76:aeb1df146756 | 256 | assert_param(IS_I2S_MODE(I2S_InitStruct->I2S_Mode)); |
mbed_official | 76:aeb1df146756 | 257 | assert_param(IS_I2S_STANDARD(I2S_InitStruct->I2S_Standard)); |
mbed_official | 76:aeb1df146756 | 258 | assert_param(IS_I2S_DATA_FORMAT(I2S_InitStruct->I2S_DataFormat)); |
mbed_official | 76:aeb1df146756 | 259 | assert_param(IS_I2S_MCLK_OUTPUT(I2S_InitStruct->I2S_MCLKOutput)); |
mbed_official | 76:aeb1df146756 | 260 | assert_param(IS_I2S_AUDIO_FREQ(I2S_InitStruct->I2S_AudioFreq)); |
mbed_official | 76:aeb1df146756 | 261 | assert_param(IS_I2S_CPOL(I2S_InitStruct->I2S_CPOL)); |
mbed_official | 76:aeb1df146756 | 262 | |
mbed_official | 76:aeb1df146756 | 263 | /*----------------------- SPIx I2SCFGR & I2SPR Configuration -----------------*/ |
mbed_official | 76:aeb1df146756 | 264 | /* Clear I2SMOD, I2SE, I2SCFG, PCMSYNC, I2SSTD, CKPOL, DATLEN and CHLEN bits */ |
mbed_official | 76:aeb1df146756 | 265 | SPIx->I2SCFGR &= I2SCFGR_CLEAR_Mask; |
mbed_official | 76:aeb1df146756 | 266 | SPIx->I2SPR = 0x0002; |
mbed_official | 76:aeb1df146756 | 267 | |
mbed_official | 76:aeb1df146756 | 268 | /* Get the I2SCFGR register value */ |
mbed_official | 76:aeb1df146756 | 269 | tmpreg = SPIx->I2SCFGR; |
mbed_official | 76:aeb1df146756 | 270 | |
mbed_official | 76:aeb1df146756 | 271 | /* If the default value has to be written, reinitialize i2sdiv and i2sodd*/ |
mbed_official | 76:aeb1df146756 | 272 | if(I2S_InitStruct->I2S_AudioFreq == I2S_AudioFreq_Default) |
mbed_official | 76:aeb1df146756 | 273 | { |
mbed_official | 76:aeb1df146756 | 274 | i2sodd = (uint16_t)0; |
mbed_official | 76:aeb1df146756 | 275 | i2sdiv = (uint16_t)2; |
mbed_official | 76:aeb1df146756 | 276 | } |
mbed_official | 76:aeb1df146756 | 277 | /* If the requested audio frequency is not the default, compute the prescaler */ |
mbed_official | 76:aeb1df146756 | 278 | else |
mbed_official | 76:aeb1df146756 | 279 | { |
mbed_official | 76:aeb1df146756 | 280 | /* Check the frame length (For the Prescaler computing) */ |
mbed_official | 76:aeb1df146756 | 281 | if(I2S_InitStruct->I2S_DataFormat == I2S_DataFormat_16b) |
mbed_official | 76:aeb1df146756 | 282 | { |
mbed_official | 76:aeb1df146756 | 283 | /* Packet length is 16 bits */ |
mbed_official | 76:aeb1df146756 | 284 | packetlength = 1; |
mbed_official | 76:aeb1df146756 | 285 | } |
mbed_official | 76:aeb1df146756 | 286 | else |
mbed_official | 76:aeb1df146756 | 287 | { |
mbed_official | 76:aeb1df146756 | 288 | /* Packet length is 32 bits */ |
mbed_official | 76:aeb1df146756 | 289 | packetlength = 2; |
mbed_official | 76:aeb1df146756 | 290 | } |
mbed_official | 76:aeb1df146756 | 291 | |
mbed_official | 76:aeb1df146756 | 292 | /* I2S Clock source is System clock: Get System Clock frequency */ |
mbed_official | 76:aeb1df146756 | 293 | RCC_GetClocksFreq(&RCC_Clocks); |
mbed_official | 76:aeb1df146756 | 294 | |
mbed_official | 76:aeb1df146756 | 295 | /* Get the source clock value: based on System Clock value */ |
mbed_official | 76:aeb1df146756 | 296 | sourceclock = RCC_Clocks.SYSCLK_Frequency; |
mbed_official | 76:aeb1df146756 | 297 | |
mbed_official | 76:aeb1df146756 | 298 | /* Compute the Real divider depending on the MCLK output state with a flaoting point */ |
mbed_official | 76:aeb1df146756 | 299 | if(I2S_InitStruct->I2S_MCLKOutput == I2S_MCLKOutput_Enable) |
mbed_official | 76:aeb1df146756 | 300 | { |
mbed_official | 76:aeb1df146756 | 301 | /* MCLK output is enabled */ |
mbed_official | 76:aeb1df146756 | 302 | tmp = (uint16_t)(((((sourceclock / 256) * 10) / I2S_InitStruct->I2S_AudioFreq)) + 5); |
mbed_official | 76:aeb1df146756 | 303 | } |
mbed_official | 76:aeb1df146756 | 304 | else |
mbed_official | 76:aeb1df146756 | 305 | { |
mbed_official | 76:aeb1df146756 | 306 | /* MCLK output is disabled */ |
mbed_official | 76:aeb1df146756 | 307 | tmp = (uint16_t)(((((sourceclock / (32 * packetlength)) *10 ) / I2S_InitStruct->I2S_AudioFreq)) + 5); |
mbed_official | 76:aeb1df146756 | 308 | } |
mbed_official | 76:aeb1df146756 | 309 | |
mbed_official | 76:aeb1df146756 | 310 | /* Remove the flaoting point */ |
mbed_official | 76:aeb1df146756 | 311 | tmp = tmp / 10; |
mbed_official | 76:aeb1df146756 | 312 | |
mbed_official | 76:aeb1df146756 | 313 | /* Check the parity of the divider */ |
mbed_official | 76:aeb1df146756 | 314 | i2sodd = (uint16_t)(tmp & (uint16_t)0x0001); |
mbed_official | 76:aeb1df146756 | 315 | |
mbed_official | 76:aeb1df146756 | 316 | /* Compute the i2sdiv prescaler */ |
mbed_official | 76:aeb1df146756 | 317 | i2sdiv = (uint16_t)((tmp - i2sodd) / 2); |
mbed_official | 76:aeb1df146756 | 318 | |
mbed_official | 76:aeb1df146756 | 319 | /* Get the Mask for the Odd bit (SPI_I2SPR[8]) register */ |
mbed_official | 76:aeb1df146756 | 320 | i2sodd = (uint16_t) (i2sodd << 8); |
mbed_official | 76:aeb1df146756 | 321 | } |
mbed_official | 76:aeb1df146756 | 322 | |
mbed_official | 76:aeb1df146756 | 323 | /* Test if the divider is 1 or 0 or greater than 0xFF */ |
mbed_official | 76:aeb1df146756 | 324 | if ((i2sdiv < 2) || (i2sdiv > 0xFF)) |
mbed_official | 76:aeb1df146756 | 325 | { |
mbed_official | 76:aeb1df146756 | 326 | /* Set the default values */ |
mbed_official | 76:aeb1df146756 | 327 | i2sdiv = 2; |
mbed_official | 76:aeb1df146756 | 328 | i2sodd = 0; |
mbed_official | 76:aeb1df146756 | 329 | } |
mbed_official | 76:aeb1df146756 | 330 | |
mbed_official | 76:aeb1df146756 | 331 | /* Write to SPIx I2SPR register the computed value */ |
mbed_official | 76:aeb1df146756 | 332 | SPIx->I2SPR = (uint16_t)(i2sdiv | (uint16_t)(i2sodd | (uint16_t)I2S_InitStruct->I2S_MCLKOutput)); |
mbed_official | 76:aeb1df146756 | 333 | |
mbed_official | 76:aeb1df146756 | 334 | /* Configure the I2S with the SPI_InitStruct values */ |
mbed_official | 76:aeb1df146756 | 335 | tmpreg |= (uint16_t)(SPI_I2SCFGR_I2SMOD | (uint16_t)(I2S_InitStruct->I2S_Mode | \ |
mbed_official | 76:aeb1df146756 | 336 | (uint16_t)(I2S_InitStruct->I2S_Standard | (uint16_t)(I2S_InitStruct->I2S_DataFormat | \ |
mbed_official | 76:aeb1df146756 | 337 | (uint16_t)I2S_InitStruct->I2S_CPOL)))); |
mbed_official | 76:aeb1df146756 | 338 | |
mbed_official | 76:aeb1df146756 | 339 | /* Write to SPIx I2SCFGR */ |
mbed_official | 76:aeb1df146756 | 340 | SPIx->I2SCFGR = tmpreg; |
mbed_official | 76:aeb1df146756 | 341 | } |
mbed_official | 76:aeb1df146756 | 342 | |
mbed_official | 76:aeb1df146756 | 343 | /** |
mbed_official | 76:aeb1df146756 | 344 | * @brief Fills each SPI_InitStruct member with its default value. |
mbed_official | 76:aeb1df146756 | 345 | * @param SPI_InitStruct: pointer to a SPI_InitTypeDef structure which will be initialized. |
mbed_official | 76:aeb1df146756 | 346 | * @retval None |
mbed_official | 76:aeb1df146756 | 347 | */ |
mbed_official | 76:aeb1df146756 | 348 | void SPI_StructInit(SPI_InitTypeDef* SPI_InitStruct) |
mbed_official | 76:aeb1df146756 | 349 | { |
mbed_official | 76:aeb1df146756 | 350 | /*--------------- Reset SPI init structure parameters values -----------------*/ |
mbed_official | 76:aeb1df146756 | 351 | /* Initialize the SPI_Direction member */ |
mbed_official | 76:aeb1df146756 | 352 | SPI_InitStruct->SPI_Direction = SPI_Direction_2Lines_FullDuplex; |
mbed_official | 76:aeb1df146756 | 353 | /* initialize the SPI_Mode member */ |
mbed_official | 76:aeb1df146756 | 354 | SPI_InitStruct->SPI_Mode = SPI_Mode_Slave; |
mbed_official | 76:aeb1df146756 | 355 | /* initialize the SPI_DataSize member */ |
mbed_official | 76:aeb1df146756 | 356 | SPI_InitStruct->SPI_DataSize = SPI_DataSize_8b; |
mbed_official | 76:aeb1df146756 | 357 | /* Initialize the SPI_CPOL member */ |
mbed_official | 76:aeb1df146756 | 358 | SPI_InitStruct->SPI_CPOL = SPI_CPOL_Low; |
mbed_official | 76:aeb1df146756 | 359 | /* Initialize the SPI_CPHA member */ |
mbed_official | 76:aeb1df146756 | 360 | SPI_InitStruct->SPI_CPHA = SPI_CPHA_1Edge; |
mbed_official | 76:aeb1df146756 | 361 | /* Initialize the SPI_NSS member */ |
mbed_official | 76:aeb1df146756 | 362 | SPI_InitStruct->SPI_NSS = SPI_NSS_Hard; |
mbed_official | 76:aeb1df146756 | 363 | /* Initialize the SPI_BaudRatePrescaler member */ |
mbed_official | 76:aeb1df146756 | 364 | SPI_InitStruct->SPI_BaudRatePrescaler = SPI_BaudRatePrescaler_2; |
mbed_official | 76:aeb1df146756 | 365 | /* Initialize the SPI_FirstBit member */ |
mbed_official | 76:aeb1df146756 | 366 | SPI_InitStruct->SPI_FirstBit = SPI_FirstBit_MSB; |
mbed_official | 76:aeb1df146756 | 367 | /* Initialize the SPI_CRCPolynomial member */ |
mbed_official | 76:aeb1df146756 | 368 | SPI_InitStruct->SPI_CRCPolynomial = 7; |
mbed_official | 76:aeb1df146756 | 369 | } |
mbed_official | 76:aeb1df146756 | 370 | |
mbed_official | 76:aeb1df146756 | 371 | /** |
mbed_official | 76:aeb1df146756 | 372 | * @brief Fills each I2S_InitStruct member with its default value. |
mbed_official | 76:aeb1df146756 | 373 | * @param I2S_InitStruct: pointer to a I2S_InitTypeDef structure which will be initialized. |
mbed_official | 76:aeb1df146756 | 374 | * @retval None |
mbed_official | 76:aeb1df146756 | 375 | */ |
mbed_official | 76:aeb1df146756 | 376 | void I2S_StructInit(I2S_InitTypeDef* I2S_InitStruct) |
mbed_official | 76:aeb1df146756 | 377 | { |
mbed_official | 76:aeb1df146756 | 378 | /*--------------- Reset I2S init structure parameters values -----------------*/ |
mbed_official | 76:aeb1df146756 | 379 | /* Initialize the I2S_Mode member */ |
mbed_official | 76:aeb1df146756 | 380 | I2S_InitStruct->I2S_Mode = I2S_Mode_SlaveTx; |
mbed_official | 76:aeb1df146756 | 381 | |
mbed_official | 76:aeb1df146756 | 382 | /* Initialize the I2S_Standard member */ |
mbed_official | 76:aeb1df146756 | 383 | I2S_InitStruct->I2S_Standard = I2S_Standard_Phillips; |
mbed_official | 76:aeb1df146756 | 384 | |
mbed_official | 76:aeb1df146756 | 385 | /* Initialize the I2S_DataFormat member */ |
mbed_official | 76:aeb1df146756 | 386 | I2S_InitStruct->I2S_DataFormat = I2S_DataFormat_16b; |
mbed_official | 76:aeb1df146756 | 387 | |
mbed_official | 76:aeb1df146756 | 388 | /* Initialize the I2S_MCLKOutput member */ |
mbed_official | 76:aeb1df146756 | 389 | I2S_InitStruct->I2S_MCLKOutput = I2S_MCLKOutput_Disable; |
mbed_official | 76:aeb1df146756 | 390 | |
mbed_official | 76:aeb1df146756 | 391 | /* Initialize the I2S_AudioFreq member */ |
mbed_official | 76:aeb1df146756 | 392 | I2S_InitStruct->I2S_AudioFreq = I2S_AudioFreq_Default; |
mbed_official | 76:aeb1df146756 | 393 | |
mbed_official | 76:aeb1df146756 | 394 | /* Initialize the I2S_CPOL member */ |
mbed_official | 76:aeb1df146756 | 395 | I2S_InitStruct->I2S_CPOL = I2S_CPOL_Low; |
mbed_official | 76:aeb1df146756 | 396 | } |
mbed_official | 76:aeb1df146756 | 397 | |
mbed_official | 76:aeb1df146756 | 398 | /** |
mbed_official | 76:aeb1df146756 | 399 | * @brief Enables or disables the specified SPI peripheral. |
mbed_official | 76:aeb1df146756 | 400 | * @param SPIx: where x can be 1, 2 or 3 to select the SPI peripheral. |
mbed_official | 76:aeb1df146756 | 401 | * @param NewState: new state of the SPIx peripheral. |
mbed_official | 76:aeb1df146756 | 402 | * This parameter can be: ENABLE or DISABLE. |
mbed_official | 76:aeb1df146756 | 403 | * @retval None |
mbed_official | 76:aeb1df146756 | 404 | */ |
mbed_official | 76:aeb1df146756 | 405 | void SPI_Cmd(SPI_TypeDef* SPIx, FunctionalState NewState) |
mbed_official | 76:aeb1df146756 | 406 | { |
mbed_official | 76:aeb1df146756 | 407 | /* Check the parameters */ |
mbed_official | 76:aeb1df146756 | 408 | assert_param(IS_SPI_ALL_PERIPH(SPIx)); |
mbed_official | 76:aeb1df146756 | 409 | assert_param(IS_FUNCTIONAL_STATE(NewState)); |
mbed_official | 76:aeb1df146756 | 410 | if (NewState != DISABLE) |
mbed_official | 76:aeb1df146756 | 411 | { |
mbed_official | 76:aeb1df146756 | 412 | /* Enable the selected SPI peripheral */ |
mbed_official | 76:aeb1df146756 | 413 | SPIx->CR1 |= SPI_CR1_SPE; |
mbed_official | 76:aeb1df146756 | 414 | } |
mbed_official | 76:aeb1df146756 | 415 | else |
mbed_official | 76:aeb1df146756 | 416 | { |
mbed_official | 76:aeb1df146756 | 417 | /* Disable the selected SPI peripheral */ |
mbed_official | 76:aeb1df146756 | 418 | SPIx->CR1 &= (uint16_t)~((uint16_t)SPI_CR1_SPE); |
mbed_official | 76:aeb1df146756 | 419 | } |
mbed_official | 76:aeb1df146756 | 420 | } |
mbed_official | 76:aeb1df146756 | 421 | |
mbed_official | 76:aeb1df146756 | 422 | /** |
mbed_official | 76:aeb1df146756 | 423 | * @brief Enables or disables the specified SPI peripheral (in I2S mode). |
mbed_official | 76:aeb1df146756 | 424 | * @param SPIx: where x can be 2 or 3 to select the SPI peripheral. |
mbed_official | 76:aeb1df146756 | 425 | * @param NewState: new state of the SPIx peripheral. |
mbed_official | 76:aeb1df146756 | 426 | * This parameter can be: ENABLE or DISABLE. |
mbed_official | 76:aeb1df146756 | 427 | * @retval None |
mbed_official | 76:aeb1df146756 | 428 | */ |
mbed_official | 76:aeb1df146756 | 429 | void I2S_Cmd(SPI_TypeDef* SPIx, FunctionalState NewState) |
mbed_official | 76:aeb1df146756 | 430 | { |
mbed_official | 76:aeb1df146756 | 431 | /* Check the parameters */ |
mbed_official | 76:aeb1df146756 | 432 | assert_param(IS_SPI_23_PERIPH(SPIx)); |
mbed_official | 76:aeb1df146756 | 433 | assert_param(IS_FUNCTIONAL_STATE(NewState)); |
mbed_official | 76:aeb1df146756 | 434 | |
mbed_official | 76:aeb1df146756 | 435 | if (NewState != DISABLE) |
mbed_official | 76:aeb1df146756 | 436 | { |
mbed_official | 76:aeb1df146756 | 437 | /* Enable the selected SPI peripheral (in I2S mode) */ |
mbed_official | 76:aeb1df146756 | 438 | SPIx->I2SCFGR |= SPI_I2SCFGR_I2SE; |
mbed_official | 76:aeb1df146756 | 439 | } |
mbed_official | 76:aeb1df146756 | 440 | else |
mbed_official | 76:aeb1df146756 | 441 | { |
mbed_official | 76:aeb1df146756 | 442 | /* Disable the selected SPI peripheral in I2S mode */ |
mbed_official | 76:aeb1df146756 | 443 | SPIx->I2SCFGR &= (uint16_t)~((uint16_t)SPI_I2SCFGR_I2SE); |
mbed_official | 76:aeb1df146756 | 444 | } |
mbed_official | 76:aeb1df146756 | 445 | } |
mbed_official | 76:aeb1df146756 | 446 | |
mbed_official | 76:aeb1df146756 | 447 | /** |
mbed_official | 76:aeb1df146756 | 448 | * @brief Configures the data size for the selected SPI. |
mbed_official | 76:aeb1df146756 | 449 | * @param SPIx: where x can be 1, 2 or 3 to select the SPI peripheral. |
mbed_official | 76:aeb1df146756 | 450 | * @param SPI_DataSize: specifies the SPI data size. |
mbed_official | 76:aeb1df146756 | 451 | * This parameter can be one of the following values: |
mbed_official | 76:aeb1df146756 | 452 | * @arg SPI_DataSize_16b: Set data frame format to 16bit. |
mbed_official | 76:aeb1df146756 | 453 | * @arg SPI_DataSize_8b: Set data frame format to 8bit. |
mbed_official | 76:aeb1df146756 | 454 | * @retval None. |
mbed_official | 76:aeb1df146756 | 455 | */ |
mbed_official | 76:aeb1df146756 | 456 | void SPI_DataSizeConfig(SPI_TypeDef* SPIx, uint16_t SPI_DataSize) |
mbed_official | 76:aeb1df146756 | 457 | { |
mbed_official | 76:aeb1df146756 | 458 | /* Check the parameters */ |
mbed_official | 76:aeb1df146756 | 459 | assert_param(IS_SPI_ALL_PERIPH(SPIx)); |
mbed_official | 76:aeb1df146756 | 460 | assert_param(IS_SPI_DATASIZE(SPI_DataSize)); |
mbed_official | 76:aeb1df146756 | 461 | /* Clear DFF bit */ |
mbed_official | 76:aeb1df146756 | 462 | SPIx->CR1 &= (uint16_t)~SPI_DataSize_16b; |
mbed_official | 76:aeb1df146756 | 463 | /* Set new DFF bit value */ |
mbed_official | 76:aeb1df146756 | 464 | SPIx->CR1 |= SPI_DataSize; |
mbed_official | 76:aeb1df146756 | 465 | } |
mbed_official | 76:aeb1df146756 | 466 | |
mbed_official | 76:aeb1df146756 | 467 | /** |
mbed_official | 76:aeb1df146756 | 468 | * @brief Selects the data transfer direction in bidirectional mode for the specified SPI. |
mbed_official | 76:aeb1df146756 | 469 | * @param SPIx: where x can be 1, 2 or 3 to select the SPI peripheral. |
mbed_official | 76:aeb1df146756 | 470 | * @param SPI_Direction: specifies the data transfer direction in bidirectional mode. |
mbed_official | 76:aeb1df146756 | 471 | * This parameter can be one of the following values: |
mbed_official | 76:aeb1df146756 | 472 | * @arg SPI_Direction_Tx: Selects Tx transmission direction. |
mbed_official | 76:aeb1df146756 | 473 | * @arg SPI_Direction_Rx: Selects Rx receive direction. |
mbed_official | 76:aeb1df146756 | 474 | * @retval None |
mbed_official | 76:aeb1df146756 | 475 | */ |
mbed_official | 76:aeb1df146756 | 476 | void SPI_BiDirectionalLineConfig(SPI_TypeDef* SPIx, uint16_t SPI_Direction) |
mbed_official | 76:aeb1df146756 | 477 | { |
mbed_official | 76:aeb1df146756 | 478 | /* Check the parameters */ |
mbed_official | 76:aeb1df146756 | 479 | assert_param(IS_SPI_ALL_PERIPH(SPIx)); |
mbed_official | 76:aeb1df146756 | 480 | assert_param(IS_SPI_DIRECTION(SPI_Direction)); |
mbed_official | 76:aeb1df146756 | 481 | if (SPI_Direction == SPI_Direction_Tx) |
mbed_official | 76:aeb1df146756 | 482 | { |
mbed_official | 76:aeb1df146756 | 483 | /* Set the Tx only mode */ |
mbed_official | 76:aeb1df146756 | 484 | SPIx->CR1 |= SPI_Direction_Tx; |
mbed_official | 76:aeb1df146756 | 485 | } |
mbed_official | 76:aeb1df146756 | 486 | else |
mbed_official | 76:aeb1df146756 | 487 | { |
mbed_official | 76:aeb1df146756 | 488 | /* Set the Rx only mode */ |
mbed_official | 76:aeb1df146756 | 489 | SPIx->CR1 &= SPI_Direction_Rx; |
mbed_official | 76:aeb1df146756 | 490 | } |
mbed_official | 76:aeb1df146756 | 491 | } |
mbed_official | 76:aeb1df146756 | 492 | |
mbed_official | 76:aeb1df146756 | 493 | /** |
mbed_official | 76:aeb1df146756 | 494 | * @brief Configures internally by software the NSS pin for the selected SPI. |
mbed_official | 76:aeb1df146756 | 495 | * @param SPIx: where x can be 1, 2 or 3 to select the SPI peripheral. |
mbed_official | 76:aeb1df146756 | 496 | * @param SPI_NSSInternalSoft: specifies the SPI NSS internal state. |
mbed_official | 76:aeb1df146756 | 497 | * This parameter can be one of the following values: |
mbed_official | 76:aeb1df146756 | 498 | * @arg SPI_NSSInternalSoft_Set: Set NSS pin internally. |
mbed_official | 76:aeb1df146756 | 499 | * @arg SPI_NSSInternalSoft_Reset: Reset NSS pin internally. |
mbed_official | 76:aeb1df146756 | 500 | * @retval None |
mbed_official | 76:aeb1df146756 | 501 | */ |
mbed_official | 76:aeb1df146756 | 502 | void SPI_NSSInternalSoftwareConfig(SPI_TypeDef* SPIx, uint16_t SPI_NSSInternalSoft) |
mbed_official | 76:aeb1df146756 | 503 | { |
mbed_official | 76:aeb1df146756 | 504 | /* Check the parameters */ |
mbed_official | 76:aeb1df146756 | 505 | assert_param(IS_SPI_ALL_PERIPH(SPIx)); |
mbed_official | 76:aeb1df146756 | 506 | assert_param(IS_SPI_NSS_INTERNAL(SPI_NSSInternalSoft)); |
mbed_official | 76:aeb1df146756 | 507 | if (SPI_NSSInternalSoft != SPI_NSSInternalSoft_Reset) |
mbed_official | 76:aeb1df146756 | 508 | { |
mbed_official | 76:aeb1df146756 | 509 | /* Set NSS pin internally by software */ |
mbed_official | 76:aeb1df146756 | 510 | SPIx->CR1 |= SPI_NSSInternalSoft_Set; |
mbed_official | 76:aeb1df146756 | 511 | } |
mbed_official | 76:aeb1df146756 | 512 | else |
mbed_official | 76:aeb1df146756 | 513 | { |
mbed_official | 76:aeb1df146756 | 514 | /* Reset NSS pin internally by software */ |
mbed_official | 76:aeb1df146756 | 515 | SPIx->CR1 &= SPI_NSSInternalSoft_Reset; |
mbed_official | 76:aeb1df146756 | 516 | } |
mbed_official | 76:aeb1df146756 | 517 | } |
mbed_official | 76:aeb1df146756 | 518 | |
mbed_official | 76:aeb1df146756 | 519 | /** |
mbed_official | 76:aeb1df146756 | 520 | * @brief Enables or disables the SS output for the selected SPI. |
mbed_official | 76:aeb1df146756 | 521 | * @param SPIx: where x can be 1, 2 or 3 to select the SPI peripheral. |
mbed_official | 76:aeb1df146756 | 522 | * @param NewState: new state of the SPIx SS output. |
mbed_official | 76:aeb1df146756 | 523 | * This parameter can be: ENABLE or DISABLE. |
mbed_official | 76:aeb1df146756 | 524 | * @retval None |
mbed_official | 76:aeb1df146756 | 525 | */ |
mbed_official | 76:aeb1df146756 | 526 | void SPI_SSOutputCmd(SPI_TypeDef* SPIx, FunctionalState NewState) |
mbed_official | 76:aeb1df146756 | 527 | { |
mbed_official | 76:aeb1df146756 | 528 | /* Check the parameters */ |
mbed_official | 76:aeb1df146756 | 529 | assert_param(IS_SPI_ALL_PERIPH(SPIx)); |
mbed_official | 76:aeb1df146756 | 530 | assert_param(IS_FUNCTIONAL_STATE(NewState)); |
mbed_official | 76:aeb1df146756 | 531 | if (NewState != DISABLE) |
mbed_official | 76:aeb1df146756 | 532 | { |
mbed_official | 76:aeb1df146756 | 533 | /* Enable the selected SPI SS output */ |
mbed_official | 76:aeb1df146756 | 534 | SPIx->CR2 |= (uint16_t)SPI_CR2_SSOE; |
mbed_official | 76:aeb1df146756 | 535 | } |
mbed_official | 76:aeb1df146756 | 536 | else |
mbed_official | 76:aeb1df146756 | 537 | { |
mbed_official | 76:aeb1df146756 | 538 | /* Disable the selected SPI SS output */ |
mbed_official | 76:aeb1df146756 | 539 | SPIx->CR2 &= (uint16_t)~((uint16_t)SPI_CR2_SSOE); |
mbed_official | 76:aeb1df146756 | 540 | } |
mbed_official | 76:aeb1df146756 | 541 | } |
mbed_official | 76:aeb1df146756 | 542 | |
mbed_official | 76:aeb1df146756 | 543 | /** |
mbed_official | 76:aeb1df146756 | 544 | * @} |
mbed_official | 76:aeb1df146756 | 545 | */ |
mbed_official | 76:aeb1df146756 | 546 | |
mbed_official | 76:aeb1df146756 | 547 | /** @defgroup SPI_Group2 Data transfers functions |
mbed_official | 76:aeb1df146756 | 548 | * @brief Data transfers functions |
mbed_official | 76:aeb1df146756 | 549 | * |
mbed_official | 76:aeb1df146756 | 550 | @verbatim |
mbed_official | 76:aeb1df146756 | 551 | =============================================================================== |
mbed_official | 76:aeb1df146756 | 552 | ##### Data transfers functions ##### |
mbed_official | 76:aeb1df146756 | 553 | =============================================================================== |
mbed_official | 76:aeb1df146756 | 554 | ....[..] This section provides a set of functions allowing to manage the SPI data |
mbed_official | 76:aeb1df146756 | 555 | transfers. |
mbed_official | 76:aeb1df146756 | 556 | ....[..] In reception, data are received and then stored into an internal Rx buffer |
mbed_official | 76:aeb1df146756 | 557 | while In transmission, data are first stored into an internal Tx buffer |
mbed_official | 76:aeb1df146756 | 558 | before being transmitted. |
mbed_official | 76:aeb1df146756 | 559 | ....[..] The read access of the SPI_DR register can be done using the |
mbed_official | 76:aeb1df146756 | 560 | SPI_I2S_ReceiveData() function and returns the Rx buffered value. |
mbed_official | 76:aeb1df146756 | 561 | Whereas a write access to the SPI_DR can be done using SPI_I2S_SendData() |
mbed_official | 76:aeb1df146756 | 562 | function and stores the written data into Tx buffer. |
mbed_official | 76:aeb1df146756 | 563 | |
mbed_official | 76:aeb1df146756 | 564 | @endverbatim |
mbed_official | 76:aeb1df146756 | 565 | * @{ |
mbed_official | 76:aeb1df146756 | 566 | */ |
mbed_official | 76:aeb1df146756 | 567 | |
mbed_official | 76:aeb1df146756 | 568 | /** |
mbed_official | 76:aeb1df146756 | 569 | * @brief Returns the most recent received data by the SPIx/I2Sx peripheral. |
mbed_official | 76:aeb1df146756 | 570 | * @param SPIx: To select the SPIx/I2Sx peripheral, where x can be: 1, 2 or 3 |
mbed_official | 76:aeb1df146756 | 571 | * in SPI mode or 2 or 3 in I2S mode. |
mbed_official | 76:aeb1df146756 | 572 | * @retval The value of the received data. |
mbed_official | 76:aeb1df146756 | 573 | */ |
mbed_official | 76:aeb1df146756 | 574 | uint16_t SPI_I2S_ReceiveData(SPI_TypeDef* SPIx) |
mbed_official | 76:aeb1df146756 | 575 | { |
mbed_official | 76:aeb1df146756 | 576 | /* Check the parameters */ |
mbed_official | 76:aeb1df146756 | 577 | assert_param(IS_SPI_ALL_PERIPH(SPIx)); |
mbed_official | 76:aeb1df146756 | 578 | |
mbed_official | 76:aeb1df146756 | 579 | /* Return the data in the DR register */ |
mbed_official | 76:aeb1df146756 | 580 | return SPIx->DR; |
mbed_official | 76:aeb1df146756 | 581 | } |
mbed_official | 76:aeb1df146756 | 582 | |
mbed_official | 76:aeb1df146756 | 583 | /** |
mbed_official | 76:aeb1df146756 | 584 | * @brief Transmits a Data through the SPIx/I2Sx peripheral. |
mbed_official | 76:aeb1df146756 | 585 | * @param SPIx: To select the SPIx/I2Sx peripheral, where x can be: 1, 2 or 3 |
mbed_official | 76:aeb1df146756 | 586 | * in SPI mode or 2 or 3 in I2S mode. |
mbed_official | 76:aeb1df146756 | 587 | * @param Data: Data to be transmitted. |
mbed_official | 76:aeb1df146756 | 588 | * @retval None |
mbed_official | 76:aeb1df146756 | 589 | */ |
mbed_official | 76:aeb1df146756 | 590 | void SPI_I2S_SendData(SPI_TypeDef* SPIx, uint16_t Data) |
mbed_official | 76:aeb1df146756 | 591 | { |
mbed_official | 76:aeb1df146756 | 592 | /* Check the parameters */ |
mbed_official | 76:aeb1df146756 | 593 | assert_param(IS_SPI_ALL_PERIPH(SPIx)); |
mbed_official | 76:aeb1df146756 | 594 | |
mbed_official | 76:aeb1df146756 | 595 | /* Write in the DR register the data to be sent */ |
mbed_official | 76:aeb1df146756 | 596 | SPIx->DR = Data; |
mbed_official | 76:aeb1df146756 | 597 | } |
mbed_official | 76:aeb1df146756 | 598 | |
mbed_official | 76:aeb1df146756 | 599 | /** |
mbed_official | 76:aeb1df146756 | 600 | * @} |
mbed_official | 76:aeb1df146756 | 601 | */ |
mbed_official | 76:aeb1df146756 | 602 | |
mbed_official | 76:aeb1df146756 | 603 | /** @defgroup SPI_Group3 Hardware CRC Calculation functions |
mbed_official | 76:aeb1df146756 | 604 | * @brief Hardware CRC Calculation functions |
mbed_official | 76:aeb1df146756 | 605 | * |
mbed_official | 76:aeb1df146756 | 606 | @verbatim |
mbed_official | 76:aeb1df146756 | 607 | =============================================================================== |
mbed_official | 76:aeb1df146756 | 608 | ##### Hardware CRC Calculation functions ##### |
mbed_official | 76:aeb1df146756 | 609 | =============================================================================== |
mbed_official | 76:aeb1df146756 | 610 | [..] This section provides a set of functions allowing to manage the SPI CRC |
mbed_official | 76:aeb1df146756 | 611 | hardware calculation SPI communication using CRC is possible through |
mbed_official | 76:aeb1df146756 | 612 | the following procedure: |
mbed_official | 76:aeb1df146756 | 613 | (#) Program the Data direction, Polarity, Phase, First Data, Baud Rate |
mbed_official | 76:aeb1df146756 | 614 | Prescaler, Slave Management, Peripheral Mode and CRC Polynomial |
mbed_official | 76:aeb1df146756 | 615 | values using the SPI_Init() function. |
mbed_official | 76:aeb1df146756 | 616 | (#) Enable the CRC calculation using the SPI_CalculateCRC() function. |
mbed_official | 76:aeb1df146756 | 617 | (#) Enable the SPI using the SPI_Cmd() function. |
mbed_official | 76:aeb1df146756 | 618 | (#) Before writing the last data to the TX buffer, set the CRCNext bit |
mbed_official | 76:aeb1df146756 | 619 | using the SPI_TransmitCRC() function to indicate that after |
mbed_official | 76:aeb1df146756 | 620 | transmission of the last data, the CRC should be transmitted. |
mbed_official | 76:aeb1df146756 | 621 | (#) After transmitting the last data, the SPI transmits the CRC. |
mbed_official | 76:aeb1df146756 | 622 | The SPI_CR1_CRCNEXT bit is reset. The CRC is also received and |
mbed_official | 76:aeb1df146756 | 623 | compared against the SPI_RXCRCR value. |
mbed_official | 76:aeb1df146756 | 624 | If the value does not match, the SPI_FLAG_CRCERR flag is set and an |
mbed_official | 76:aeb1df146756 | 625 | interrupt can be generated when the SPI_I2S_IT_ERR interrupt is enabled. |
mbed_official | 76:aeb1df146756 | 626 | -@- |
mbed_official | 76:aeb1df146756 | 627 | (+@) It is advised to don't read the calculate CRC values during the communication. |
mbed_official | 76:aeb1df146756 | 628 | (+@) When the SPI is in slave mode, be careful to enable CRC calculation only |
mbed_official | 76:aeb1df146756 | 629 | when the clock is stable, that is, when the clock is in the steady state. |
mbed_official | 76:aeb1df146756 | 630 | If not, a wrong CRC calculation may be done. In fact, the CRC is sensitive |
mbed_official | 76:aeb1df146756 | 631 | to the SCK slave input clock as soon as CRCEN is set, and this, whatever |
mbed_official | 76:aeb1df146756 | 632 | the value of the SPE bit. |
mbed_official | 76:aeb1df146756 | 633 | (+@) With high bitrate frequencies, be careful when transmitting the CRC. |
mbed_official | 76:aeb1df146756 | 634 | As the number of used CPU cycles has to be as low as possible in the CRC |
mbed_official | 76:aeb1df146756 | 635 | transfer phase, it is forbidden to call software functions in the CRC |
mbed_official | 76:aeb1df146756 | 636 | transmission sequence to avoid errors in the last data and CRC reception. |
mbed_official | 76:aeb1df146756 | 637 | In fact, CRCNEXT bit has to be written before the end of the transmission/ |
mbed_official | 76:aeb1df146756 | 638 | reception of the last data. |
mbed_official | 76:aeb1df146756 | 639 | (+@) For high bit rate frequencies, it is advised to use the DMA mode to avoid the |
mbed_official | 76:aeb1df146756 | 640 | degradation of the SPI speed performance due to CPU accesses impacting the |
mbed_official | 76:aeb1df146756 | 641 | SPI bandwidth. |
mbed_official | 76:aeb1df146756 | 642 | (+@) When the STM32L15xxx are configured as slaves and the NSS hardware mode is |
mbed_official | 76:aeb1df146756 | 643 | used, the NSS pin needs to be kept low between the data phase and the CRC |
mbed_official | 76:aeb1df146756 | 644 | phase. |
mbed_official | 76:aeb1df146756 | 645 | (+@) When the SPI is configured in slave mode with the CRC feature enabled, CRC |
mbed_official | 76:aeb1df146756 | 646 | calculation takes place even if a high level is applied on the NSS pin. |
mbed_official | 76:aeb1df146756 | 647 | This may happen for example in case of a multislave environment where the |
mbed_official | 76:aeb1df146756 | 648 | communication master addresses slaves alternately. |
mbed_official | 76:aeb1df146756 | 649 | (+@) Between a slave deselection (high level on NSS) and a new slave selection |
mbed_official | 76:aeb1df146756 | 650 | (low level on NSS), the CRC value should be cleared on both master and slave |
mbed_official | 76:aeb1df146756 | 651 | sides in order to resynchronize the master and slave for their respective |
mbed_official | 76:aeb1df146756 | 652 | CRC calculation. |
mbed_official | 76:aeb1df146756 | 653 | -@- To clear the CRC, follow the procedure below: |
mbed_official | 76:aeb1df146756 | 654 | (#@) Disable SPI using the SPI_Cmd() function |
mbed_official | 76:aeb1df146756 | 655 | (#@) Disable the CRC calculation using the SPI_CalculateCRC() function. |
mbed_official | 76:aeb1df146756 | 656 | (#@) Enable the CRC calculation using the SPI_CalculateCRC() function. |
mbed_official | 76:aeb1df146756 | 657 | (#@) Enable SPI using the SPI_Cmd() function. |
mbed_official | 76:aeb1df146756 | 658 | |
mbed_official | 76:aeb1df146756 | 659 | @endverbatim |
mbed_official | 76:aeb1df146756 | 660 | * @{ |
mbed_official | 76:aeb1df146756 | 661 | */ |
mbed_official | 76:aeb1df146756 | 662 | |
mbed_official | 76:aeb1df146756 | 663 | /** |
mbed_official | 76:aeb1df146756 | 664 | * @brief Enables or disables the CRC value calculation of the transferred bytes. |
mbed_official | 76:aeb1df146756 | 665 | * @param SPIx: where x can be 1, 2 or 3 to select the SPI peripheral. |
mbed_official | 76:aeb1df146756 | 666 | * @param NewState: new state of the SPIx CRC value calculation. |
mbed_official | 76:aeb1df146756 | 667 | * This parameter can be: ENABLE or DISABLE. |
mbed_official | 76:aeb1df146756 | 668 | * @retval None |
mbed_official | 76:aeb1df146756 | 669 | */ |
mbed_official | 76:aeb1df146756 | 670 | void SPI_CalculateCRC(SPI_TypeDef* SPIx, FunctionalState NewState) |
mbed_official | 76:aeb1df146756 | 671 | { |
mbed_official | 76:aeb1df146756 | 672 | /* Check the parameters */ |
mbed_official | 76:aeb1df146756 | 673 | assert_param(IS_SPI_ALL_PERIPH(SPIx)); |
mbed_official | 76:aeb1df146756 | 674 | assert_param(IS_FUNCTIONAL_STATE(NewState)); |
mbed_official | 76:aeb1df146756 | 675 | if (NewState != DISABLE) |
mbed_official | 76:aeb1df146756 | 676 | { |
mbed_official | 76:aeb1df146756 | 677 | /* Enable the selected SPI CRC calculation */ |
mbed_official | 76:aeb1df146756 | 678 | SPIx->CR1 |= SPI_CR1_CRCEN; |
mbed_official | 76:aeb1df146756 | 679 | } |
mbed_official | 76:aeb1df146756 | 680 | else |
mbed_official | 76:aeb1df146756 | 681 | { |
mbed_official | 76:aeb1df146756 | 682 | /* Disable the selected SPI CRC calculation */ |
mbed_official | 76:aeb1df146756 | 683 | SPIx->CR1 &= (uint16_t)~((uint16_t)SPI_CR1_CRCEN); |
mbed_official | 76:aeb1df146756 | 684 | } |
mbed_official | 76:aeb1df146756 | 685 | } |
mbed_official | 76:aeb1df146756 | 686 | |
mbed_official | 76:aeb1df146756 | 687 | /** |
mbed_official | 76:aeb1df146756 | 688 | * @brief Transmit the SPIx CRC value. |
mbed_official | 76:aeb1df146756 | 689 | * @param SPIx: where x can be 1, 2 or 3 to select the SPI peripheral. |
mbed_official | 76:aeb1df146756 | 690 | * @retval None |
mbed_official | 76:aeb1df146756 | 691 | */ |
mbed_official | 76:aeb1df146756 | 692 | void SPI_TransmitCRC(SPI_TypeDef* SPIx) |
mbed_official | 76:aeb1df146756 | 693 | { |
mbed_official | 76:aeb1df146756 | 694 | /* Check the parameters */ |
mbed_official | 76:aeb1df146756 | 695 | assert_param(IS_SPI_ALL_PERIPH(SPIx)); |
mbed_official | 76:aeb1df146756 | 696 | |
mbed_official | 76:aeb1df146756 | 697 | /* Enable the selected SPI CRC transmission */ |
mbed_official | 76:aeb1df146756 | 698 | SPIx->CR1 |= SPI_CR1_CRCNEXT; |
mbed_official | 76:aeb1df146756 | 699 | } |
mbed_official | 76:aeb1df146756 | 700 | |
mbed_official | 76:aeb1df146756 | 701 | /** |
mbed_official | 76:aeb1df146756 | 702 | * @brief Returns the transmit or the receive CRC register value for the specified SPI. |
mbed_official | 76:aeb1df146756 | 703 | * @param SPIx: where x can be 1, 2 or 3 to select the SPI peripheral. |
mbed_official | 76:aeb1df146756 | 704 | * @param SPI_CRC: specifies the CRC register to be read. |
mbed_official | 76:aeb1df146756 | 705 | * This parameter can be one of the following values: |
mbed_official | 76:aeb1df146756 | 706 | * @arg SPI_CRC_Tx: Selects Tx CRC register. |
mbed_official | 76:aeb1df146756 | 707 | * @arg SPI_CRC_Rx: Selects Rx CRC register. |
mbed_official | 76:aeb1df146756 | 708 | * @retval The selected CRC register value. |
mbed_official | 76:aeb1df146756 | 709 | */ |
mbed_official | 76:aeb1df146756 | 710 | uint16_t SPI_GetCRC(SPI_TypeDef* SPIx, uint8_t SPI_CRC) |
mbed_official | 76:aeb1df146756 | 711 | { |
mbed_official | 76:aeb1df146756 | 712 | uint16_t crcreg = 0; |
mbed_official | 76:aeb1df146756 | 713 | /* Check the parameters */ |
mbed_official | 76:aeb1df146756 | 714 | assert_param(IS_SPI_ALL_PERIPH(SPIx)); |
mbed_official | 76:aeb1df146756 | 715 | assert_param(IS_SPI_CRC(SPI_CRC)); |
mbed_official | 76:aeb1df146756 | 716 | if (SPI_CRC != SPI_CRC_Rx) |
mbed_official | 76:aeb1df146756 | 717 | { |
mbed_official | 76:aeb1df146756 | 718 | /* Get the Tx CRC register */ |
mbed_official | 76:aeb1df146756 | 719 | crcreg = SPIx->TXCRCR; |
mbed_official | 76:aeb1df146756 | 720 | } |
mbed_official | 76:aeb1df146756 | 721 | else |
mbed_official | 76:aeb1df146756 | 722 | { |
mbed_official | 76:aeb1df146756 | 723 | /* Get the Rx CRC register */ |
mbed_official | 76:aeb1df146756 | 724 | crcreg = SPIx->RXCRCR; |
mbed_official | 76:aeb1df146756 | 725 | } |
mbed_official | 76:aeb1df146756 | 726 | /* Return the selected CRC register */ |
mbed_official | 76:aeb1df146756 | 727 | return crcreg; |
mbed_official | 76:aeb1df146756 | 728 | } |
mbed_official | 76:aeb1df146756 | 729 | |
mbed_official | 76:aeb1df146756 | 730 | /** |
mbed_official | 76:aeb1df146756 | 731 | * @brief Returns the CRC Polynomial register value for the specified SPI. |
mbed_official | 76:aeb1df146756 | 732 | * @param SPIx: where x can be 1, 2 or 3 to select the SPI peripheral. |
mbed_official | 76:aeb1df146756 | 733 | * @retval The CRC Polynomial register value. |
mbed_official | 76:aeb1df146756 | 734 | */ |
mbed_official | 76:aeb1df146756 | 735 | uint16_t SPI_GetCRCPolynomial(SPI_TypeDef* SPIx) |
mbed_official | 76:aeb1df146756 | 736 | { |
mbed_official | 76:aeb1df146756 | 737 | /* Check the parameters */ |
mbed_official | 76:aeb1df146756 | 738 | assert_param(IS_SPI_ALL_PERIPH(SPIx)); |
mbed_official | 76:aeb1df146756 | 739 | |
mbed_official | 76:aeb1df146756 | 740 | /* Return the CRC polynomial register */ |
mbed_official | 76:aeb1df146756 | 741 | return SPIx->CRCPR; |
mbed_official | 76:aeb1df146756 | 742 | } |
mbed_official | 76:aeb1df146756 | 743 | |
mbed_official | 76:aeb1df146756 | 744 | /** |
mbed_official | 76:aeb1df146756 | 745 | * @} |
mbed_official | 76:aeb1df146756 | 746 | */ |
mbed_official | 76:aeb1df146756 | 747 | |
mbed_official | 76:aeb1df146756 | 748 | /** @defgroup SPI_Group4 DMA transfers management functions |
mbed_official | 76:aeb1df146756 | 749 | * @brief DMA transfers management functions |
mbed_official | 76:aeb1df146756 | 750 | * |
mbed_official | 76:aeb1df146756 | 751 | @verbatim |
mbed_official | 76:aeb1df146756 | 752 | =============================================================================== |
mbed_official | 76:aeb1df146756 | 753 | ##### DMA transfers management functions ##### |
mbed_official | 76:aeb1df146756 | 754 | =============================================================================== |
mbed_official | 76:aeb1df146756 | 755 | |
mbed_official | 76:aeb1df146756 | 756 | @endverbatim |
mbed_official | 76:aeb1df146756 | 757 | * @{ |
mbed_official | 76:aeb1df146756 | 758 | */ |
mbed_official | 76:aeb1df146756 | 759 | |
mbed_official | 76:aeb1df146756 | 760 | /** |
mbed_official | 76:aeb1df146756 | 761 | * @brief Enables or disables the SPIx/I2Sx DMA interface. |
mbed_official | 76:aeb1df146756 | 762 | * @param SPIx: To select the SPIx/I2Sx peripheral, where x can be: 1, 2 or 3 |
mbed_official | 76:aeb1df146756 | 763 | * in SPI mode or 2 or 3 in I2S mode. |
mbed_official | 76:aeb1df146756 | 764 | * @param SPI_I2S_DMAReq: specifies the SPI DMA transfer request to be enabled or disabled. |
mbed_official | 76:aeb1df146756 | 765 | * This parameter can be any combination of the following values: |
mbed_official | 76:aeb1df146756 | 766 | * @arg SPI_I2S_DMAReq_Tx: Tx buffer DMA transfer request. |
mbed_official | 76:aeb1df146756 | 767 | * @arg SPI_I2S_DMAReq_Rx: Rx buffer DMA transfer request. |
mbed_official | 76:aeb1df146756 | 768 | * @param NewState: new state of the selected SPI DMA transfer request. |
mbed_official | 76:aeb1df146756 | 769 | * This parameter can be: ENABLE or DISABLE. |
mbed_official | 76:aeb1df146756 | 770 | * @retval None |
mbed_official | 76:aeb1df146756 | 771 | */ |
mbed_official | 76:aeb1df146756 | 772 | void SPI_I2S_DMACmd(SPI_TypeDef* SPIx, uint16_t SPI_I2S_DMAReq, FunctionalState NewState) |
mbed_official | 76:aeb1df146756 | 773 | { |
mbed_official | 76:aeb1df146756 | 774 | /* Check the parameters */ |
mbed_official | 76:aeb1df146756 | 775 | assert_param(IS_SPI_ALL_PERIPH(SPIx)); |
mbed_official | 76:aeb1df146756 | 776 | assert_param(IS_FUNCTIONAL_STATE(NewState)); |
mbed_official | 76:aeb1df146756 | 777 | assert_param(IS_SPI_I2S_DMAREQ(SPI_I2S_DMAReq)); |
mbed_official | 76:aeb1df146756 | 778 | |
mbed_official | 76:aeb1df146756 | 779 | if (NewState != DISABLE) |
mbed_official | 76:aeb1df146756 | 780 | { |
mbed_official | 76:aeb1df146756 | 781 | /* Enable the selected SPI DMA requests */ |
mbed_official | 76:aeb1df146756 | 782 | SPIx->CR2 |= SPI_I2S_DMAReq; |
mbed_official | 76:aeb1df146756 | 783 | } |
mbed_official | 76:aeb1df146756 | 784 | else |
mbed_official | 76:aeb1df146756 | 785 | { |
mbed_official | 76:aeb1df146756 | 786 | /* Disable the selected SPI DMA requests */ |
mbed_official | 76:aeb1df146756 | 787 | SPIx->CR2 &= (uint16_t)~SPI_I2S_DMAReq; |
mbed_official | 76:aeb1df146756 | 788 | } |
mbed_official | 76:aeb1df146756 | 789 | } |
mbed_official | 76:aeb1df146756 | 790 | |
mbed_official | 76:aeb1df146756 | 791 | /** |
mbed_official | 76:aeb1df146756 | 792 | * @} |
mbed_official | 76:aeb1df146756 | 793 | */ |
mbed_official | 76:aeb1df146756 | 794 | |
mbed_official | 76:aeb1df146756 | 795 | /** @defgroup SPI_Group5 Interrupts and flags management functions |
mbed_official | 76:aeb1df146756 | 796 | * @brief Interrupts and flags management functions |
mbed_official | 76:aeb1df146756 | 797 | * |
mbed_official | 76:aeb1df146756 | 798 | @verbatim |
mbed_official | 76:aeb1df146756 | 799 | =============================================================================== |
mbed_official | 76:aeb1df146756 | 800 | ##### Interrupts and flags management functions ##### |
mbed_official | 76:aeb1df146756 | 801 | =============================================================================== |
mbed_official | 76:aeb1df146756 | 802 | [..] This section provides a set of functions allowing to configure the SPI |
mbed_official | 76:aeb1df146756 | 803 | Interrupts sources and check or clear the flags or pending bits status. |
mbed_official | 76:aeb1df146756 | 804 | The user should identify which mode will be used in his application to |
mbed_official | 76:aeb1df146756 | 805 | manage the communication: Polling mode, Interrupt mode or DMA mode. |
mbed_official | 76:aeb1df146756 | 806 | *** Polling Mode *** |
mbed_official | 76:aeb1df146756 | 807 | ==================== |
mbed_official | 76:aeb1df146756 | 808 | [..] In Polling Mode, the SPI/I2S communication can be managed by 9 flags: |
mbed_official | 76:aeb1df146756 | 809 | (#) SPI_I2S_FLAG_TXE : to indicate the status of the transmit buffer |
mbed_official | 76:aeb1df146756 | 810 | register. |
mbed_official | 76:aeb1df146756 | 811 | (#) SPI_I2S_FLAG_RXNE : to indicate the status of the receive buffer |
mbed_official | 76:aeb1df146756 | 812 | register. |
mbed_official | 76:aeb1df146756 | 813 | (#) SPI_I2S_FLAG_BSY : to indicate the state of the communication layer |
mbed_official | 76:aeb1df146756 | 814 | of the SPI. |
mbed_official | 76:aeb1df146756 | 815 | (#) SPI_FLAG_CRCERR : to indicate if a CRC Calculation error occur. |
mbed_official | 76:aeb1df146756 | 816 | (#) SPI_FLAG_MODF : to indicate if a Mode Fault error occur. |
mbed_official | 76:aeb1df146756 | 817 | (#) SPI_I2S_FLAG_OVR : to indicate if an Overrun error occur. |
mbed_official | 76:aeb1df146756 | 818 | (#) SPI_I2S_FLAG_FRE: to indicate a Frame Format error occurs. |
mbed_official | 76:aeb1df146756 | 819 | (#) I2S_FLAG_UDR: to indicate an Underrun error occurs. |
mbed_official | 76:aeb1df146756 | 820 | (#) I2S_FLAG_CHSIDE: to indicate Channel Side. |
mbed_official | 76:aeb1df146756 | 821 | -@- Do not use the BSY flag to handle each data transmission or reception. |
mbed_official | 76:aeb1df146756 | 822 | It is better to use the TXE and RXNE flags instead. |
mbed_official | 76:aeb1df146756 | 823 | [..] In this Mode it is advised to use the following functions: |
mbed_official | 76:aeb1df146756 | 824 | (+) FlagStatus SPI_I2S_GetFlagStatus(SPI_TypeDef* SPIx, uint16_t SPI_I2S_FLAG). |
mbed_official | 76:aeb1df146756 | 825 | (+) void SPI_I2S_ClearFlag(SPI_TypeDef* SPIx, uint16_t SPI_I2S_FLAG). |
mbed_official | 76:aeb1df146756 | 826 | |
mbed_official | 76:aeb1df146756 | 827 | *** Interrupt Mode *** |
mbed_official | 76:aeb1df146756 | 828 | ====================== |
mbed_official | 76:aeb1df146756 | 829 | [..] In Interrupt Mode, the SPI communication can be managed by 3 interrupt |
mbed_official | 76:aeb1df146756 | 830 | sources and 7 pending bits: |
mbed_official | 76:aeb1df146756 | 831 | [..] Pending Bits: |
mbed_official | 76:aeb1df146756 | 832 | (#) SPI_I2S_IT_TXE : to indicate the status of the transmit buffer register. |
mbed_official | 76:aeb1df146756 | 833 | (#) SPI_I2S_IT_RXNE : to indicate the status of the receive buffer register. |
mbed_official | 76:aeb1df146756 | 834 | (#) SPI_IT_CRCERR : to indicate if a CRC Calculation error occur. |
mbed_official | 76:aeb1df146756 | 835 | (#) SPI_IT_MODF : to indicate if a Mode Fault error occur. |
mbed_official | 76:aeb1df146756 | 836 | (#) SPI_I2S_IT_OVR : to indicate if an Overrun error occur. |
mbed_official | 76:aeb1df146756 | 837 | (#) I2S_IT_UDR : to indicate an Underrun Error occurs. |
mbed_official | 76:aeb1df146756 | 838 | (#) SPI_I2S_FLAG_FRE : to indicate a Frame Format error occurs. |
mbed_official | 76:aeb1df146756 | 839 | [..] Interrupt Source: |
mbed_official | 76:aeb1df146756 | 840 | (#) SPI_I2S_IT_TXE: specifies the interrupt source for the Tx buffer empty |
mbed_official | 76:aeb1df146756 | 841 | interrupt. |
mbed_official | 76:aeb1df146756 | 842 | (#) SPI_I2S_IT_RXNE : specifies the interrupt source for the Rx buffer not |
mbed_official | 76:aeb1df146756 | 843 | empty interrupt. |
mbed_official | 76:aeb1df146756 | 844 | (#) SPI_I2S_IT_ERR : specifies the interrupt source for the errors interrupt. |
mbed_official | 76:aeb1df146756 | 845 | [..] In this Mode it is advised to use the following functions: |
mbed_official | 76:aeb1df146756 | 846 | (+) void SPI_I2S_ITConfig(SPI_TypeDef* SPIx, uint8_t SPI_I2S_IT, |
mbed_official | 76:aeb1df146756 | 847 | FunctionalState NewState). |
mbed_official | 76:aeb1df146756 | 848 | (+) ITStatus SPI_I2S_GetITStatus(SPI_TypeDef* SPIx, uint8_t SPI_I2S_IT). |
mbed_official | 76:aeb1df146756 | 849 | (+) void SPI_I2S_ClearITPendingBit(SPI_TypeDef* SPIx, uint8_t SPI_I2S_IT). |
mbed_official | 76:aeb1df146756 | 850 | |
mbed_official | 76:aeb1df146756 | 851 | *** DMA Mode *** |
mbed_official | 76:aeb1df146756 | 852 | ================ |
mbed_official | 76:aeb1df146756 | 853 | [..] In DMA Mode, the SPI communication can be managed by 2 DMA Channel |
mbed_official | 76:aeb1df146756 | 854 | requests: |
mbed_official | 76:aeb1df146756 | 855 | (#) SPI_I2S_DMAReq_Tx: specifies the Tx buffer DMA transfer request. |
mbed_official | 76:aeb1df146756 | 856 | (#) SPI_I2S_DMAReq_Rx: specifies the Rx buffer DMA transfer request. |
mbed_official | 76:aeb1df146756 | 857 | |
mbed_official | 76:aeb1df146756 | 858 | [..] In this Mode it is advised to use the following function: |
mbed_official | 76:aeb1df146756 | 859 | (+) void SPI_I2S_DMACmd(SPI_TypeDef* SPIx, uint16_t SPI_I2S_DMAReq, |
mbed_official | 76:aeb1df146756 | 860 | FunctionalState NewState). |
mbed_official | 76:aeb1df146756 | 861 | |
mbed_official | 76:aeb1df146756 | 862 | @endverbatim |
mbed_official | 76:aeb1df146756 | 863 | * @{ |
mbed_official | 76:aeb1df146756 | 864 | */ |
mbed_official | 76:aeb1df146756 | 865 | |
mbed_official | 76:aeb1df146756 | 866 | /** |
mbed_official | 76:aeb1df146756 | 867 | * @brief Enables or disables the specified SPI/I2S interrupts. |
mbed_official | 76:aeb1df146756 | 868 | * @param SPIx: To select the SPIx/I2Sx peripheral, where x can be: 1, 2 or 3 |
mbed_official | 76:aeb1df146756 | 869 | * in SPI mode or 2 or 3 in I2S mode. |
mbed_official | 76:aeb1df146756 | 870 | |
mbed_official | 76:aeb1df146756 | 871 | * @param SPI_I2S_IT: specifies the SPI interrupt source to be enabled or disabled. |
mbed_official | 76:aeb1df146756 | 872 | * This parameter can be one of the following values: |
mbed_official | 76:aeb1df146756 | 873 | * @arg SPI_I2S_IT_TXE: Tx buffer empty interrupt mask. |
mbed_official | 76:aeb1df146756 | 874 | * @arg SPI_I2S_IT_RXNE: Rx buffer not empty interrupt mask. |
mbed_official | 76:aeb1df146756 | 875 | * @arg SPI_I2S_IT_ERR: Error interrupt mask. |
mbed_official | 76:aeb1df146756 | 876 | * @param NewState: new state of the specified SPI interrupt. |
mbed_official | 76:aeb1df146756 | 877 | * This parameter can be: ENABLE or DISABLE. |
mbed_official | 76:aeb1df146756 | 878 | * @retval None |
mbed_official | 76:aeb1df146756 | 879 | */ |
mbed_official | 76:aeb1df146756 | 880 | void SPI_I2S_ITConfig(SPI_TypeDef* SPIx, uint8_t SPI_I2S_IT, FunctionalState NewState) |
mbed_official | 76:aeb1df146756 | 881 | { |
mbed_official | 76:aeb1df146756 | 882 | uint16_t itpos = 0, itmask = 0 ; |
mbed_official | 76:aeb1df146756 | 883 | |
mbed_official | 76:aeb1df146756 | 884 | /* Check the parameters */ |
mbed_official | 76:aeb1df146756 | 885 | assert_param(IS_SPI_ALL_PERIPH(SPIx)); |
mbed_official | 76:aeb1df146756 | 886 | assert_param(IS_FUNCTIONAL_STATE(NewState)); |
mbed_official | 76:aeb1df146756 | 887 | assert_param(IS_SPI_I2S_CONFIG_IT(SPI_I2S_IT)); |
mbed_official | 76:aeb1df146756 | 888 | |
mbed_official | 76:aeb1df146756 | 889 | /* Get the SPI IT index */ |
mbed_official | 76:aeb1df146756 | 890 | itpos = SPI_I2S_IT >> 4; |
mbed_official | 76:aeb1df146756 | 891 | |
mbed_official | 76:aeb1df146756 | 892 | /* Set the IT mask */ |
mbed_official | 76:aeb1df146756 | 893 | itmask = (uint16_t)1 << (uint16_t)itpos; |
mbed_official | 76:aeb1df146756 | 894 | |
mbed_official | 76:aeb1df146756 | 895 | if (NewState != DISABLE) |
mbed_official | 76:aeb1df146756 | 896 | { |
mbed_official | 76:aeb1df146756 | 897 | /* Enable the selected SPI interrupt */ |
mbed_official | 76:aeb1df146756 | 898 | SPIx->CR2 |= itmask; |
mbed_official | 76:aeb1df146756 | 899 | } |
mbed_official | 76:aeb1df146756 | 900 | else |
mbed_official | 76:aeb1df146756 | 901 | { |
mbed_official | 76:aeb1df146756 | 902 | /* Disable the selected SPI interrupt */ |
mbed_official | 76:aeb1df146756 | 903 | SPIx->CR2 &= (uint16_t)~itmask; |
mbed_official | 76:aeb1df146756 | 904 | } |
mbed_official | 76:aeb1df146756 | 905 | } |
mbed_official | 76:aeb1df146756 | 906 | |
mbed_official | 76:aeb1df146756 | 907 | /** |
mbed_official | 76:aeb1df146756 | 908 | * @brief Checks whether the specified SPIx/I2Sx flag is set or not. |
mbed_official | 76:aeb1df146756 | 909 | * @param SPIx: To select the SPIx/I2Sx peripheral, where x can be: 1, 2 or 3 |
mbed_official | 76:aeb1df146756 | 910 | * in SPI mode or 2 or 3 in I2S mode. |
mbed_official | 76:aeb1df146756 | 911 | |
mbed_official | 76:aeb1df146756 | 912 | * @param SPI_I2S_FLAG: specifies the SPI flag to check. |
mbed_official | 76:aeb1df146756 | 913 | * This parameter can be one of the following values: |
mbed_official | 76:aeb1df146756 | 914 | * @arg SPI_I2S_FLAG_TXE: Transmit buffer empty flag. |
mbed_official | 76:aeb1df146756 | 915 | * @arg SPI_I2S_FLAG_RXNE: Receive buffer not empty flag. |
mbed_official | 76:aeb1df146756 | 916 | * @arg SPI_I2S_FLAG_BSY: Busy flag. |
mbed_official | 76:aeb1df146756 | 917 | * @arg SPI_I2S_FLAG_OVR: Overrun flag. |
mbed_official | 76:aeb1df146756 | 918 | * @arg SPI_FLAG_MODF: Mode Fault flag. |
mbed_official | 76:aeb1df146756 | 919 | * @arg SPI_FLAG_CRCERR: CRC Error flag. |
mbed_official | 76:aeb1df146756 | 920 | * @arg SPI_I2S_FLAG_FRE: Format Error. |
mbed_official | 76:aeb1df146756 | 921 | * @arg I2S_FLAG_UDR: Underrun Error flag. |
mbed_official | 76:aeb1df146756 | 922 | * @arg I2S_FLAG_CHSIDE: Channel Side flag. |
mbed_official | 76:aeb1df146756 | 923 | * @retval The new state of SPI_I2S_FLAG (SET or RESET). |
mbed_official | 76:aeb1df146756 | 924 | */ |
mbed_official | 76:aeb1df146756 | 925 | FlagStatus SPI_I2S_GetFlagStatus(SPI_TypeDef* SPIx, uint16_t SPI_I2S_FLAG) |
mbed_official | 76:aeb1df146756 | 926 | { |
mbed_official | 76:aeb1df146756 | 927 | FlagStatus bitstatus = RESET; |
mbed_official | 76:aeb1df146756 | 928 | /* Check the parameters */ |
mbed_official | 76:aeb1df146756 | 929 | assert_param(IS_SPI_ALL_PERIPH(SPIx)); |
mbed_official | 76:aeb1df146756 | 930 | assert_param(IS_SPI_I2S_GET_FLAG(SPI_I2S_FLAG)); |
mbed_official | 76:aeb1df146756 | 931 | |
mbed_official | 76:aeb1df146756 | 932 | /* Check the status of the specified SPI flag */ |
mbed_official | 76:aeb1df146756 | 933 | if ((SPIx->SR & SPI_I2S_FLAG) != (uint16_t)RESET) |
mbed_official | 76:aeb1df146756 | 934 | { |
mbed_official | 76:aeb1df146756 | 935 | /* SPI_I2S_FLAG is set */ |
mbed_official | 76:aeb1df146756 | 936 | bitstatus = SET; |
mbed_official | 76:aeb1df146756 | 937 | } |
mbed_official | 76:aeb1df146756 | 938 | else |
mbed_official | 76:aeb1df146756 | 939 | { |
mbed_official | 76:aeb1df146756 | 940 | /* SPI_I2S_FLAG is reset */ |
mbed_official | 76:aeb1df146756 | 941 | bitstatus = RESET; |
mbed_official | 76:aeb1df146756 | 942 | } |
mbed_official | 76:aeb1df146756 | 943 | /* Return the SPI_I2S_FLAG status */ |
mbed_official | 76:aeb1df146756 | 944 | return bitstatus; |
mbed_official | 76:aeb1df146756 | 945 | } |
mbed_official | 76:aeb1df146756 | 946 | |
mbed_official | 76:aeb1df146756 | 947 | /** |
mbed_official | 76:aeb1df146756 | 948 | * @brief Clears the SPIx CRC Error (CRCERR) flag. |
mbed_official | 76:aeb1df146756 | 949 | * @param SPIx: To select the SPIx/I2Sx peripheral, where x can be: 1, 2 or 3 |
mbed_official | 76:aeb1df146756 | 950 | * in SPI mode or 2 or 3 in I2S mode. |
mbed_official | 76:aeb1df146756 | 951 | |
mbed_official | 76:aeb1df146756 | 952 | * @param SPI_I2S_FLAG: specifies the SPI flag to clear. |
mbed_official | 76:aeb1df146756 | 953 | * This function clears only CRCERR flag. |
mbed_official | 76:aeb1df146756 | 954 | |
mbed_official | 76:aeb1df146756 | 955 | * @note OVR (OverRun error) flag is cleared by software sequence: a read |
mbed_official | 76:aeb1df146756 | 956 | * operation to SPI_DR register (SPI_I2S_ReceiveData()) followed by a read |
mbed_official | 76:aeb1df146756 | 957 | * operation to SPI_SR register (SPI_I2S_GetFlagStatus()). |
mbed_official | 76:aeb1df146756 | 958 | * @note UDR (UnderRun error) flag is cleared by a read operation to |
mbed_official | 76:aeb1df146756 | 959 | * SPI_SR register (SPI_I2S_GetFlagStatus()). |
mbed_official | 76:aeb1df146756 | 960 | * @note MODF (Mode Fault) flag is cleared by software sequence: a read/write |
mbed_official | 76:aeb1df146756 | 961 | * operation to SPI_SR register (SPI_I2S_GetFlagStatus()) followed by a |
mbed_official | 76:aeb1df146756 | 962 | * write operation to SPI_CR1 register (SPI_Cmd() to enable the SPI). |
mbed_official | 76:aeb1df146756 | 963 | * @retval None |
mbed_official | 76:aeb1df146756 | 964 | */ |
mbed_official | 76:aeb1df146756 | 965 | void SPI_I2S_ClearFlag(SPI_TypeDef* SPIx, uint16_t SPI_I2S_FLAG) |
mbed_official | 76:aeb1df146756 | 966 | { |
mbed_official | 76:aeb1df146756 | 967 | /* Check the parameters */ |
mbed_official | 76:aeb1df146756 | 968 | assert_param(IS_SPI_ALL_PERIPH(SPIx)); |
mbed_official | 76:aeb1df146756 | 969 | assert_param(IS_SPI_I2S_CLEAR_FLAG(SPI_I2S_FLAG)); |
mbed_official | 76:aeb1df146756 | 970 | |
mbed_official | 76:aeb1df146756 | 971 | /* Clear the selected SPI CRC Error (CRCERR) flag */ |
mbed_official | 76:aeb1df146756 | 972 | SPIx->SR = (uint16_t)~SPI_I2S_FLAG; |
mbed_official | 76:aeb1df146756 | 973 | } |
mbed_official | 76:aeb1df146756 | 974 | |
mbed_official | 76:aeb1df146756 | 975 | /** |
mbed_official | 76:aeb1df146756 | 976 | * @brief Checks whether the specified SPIx/I2Sx interrupt has occurred or not. |
mbed_official | 76:aeb1df146756 | 977 | * @param SPIx: To select the SPIx/I2Sx peripheral, where x can be: 1, 2 or 3 |
mbed_official | 76:aeb1df146756 | 978 | * in SPI mode or 2 or 3 in I2S mode. |
mbed_official | 76:aeb1df146756 | 979 | |
mbed_official | 76:aeb1df146756 | 980 | * @param SPI_I2S_IT: specifies the SPI interrupt source to check. |
mbed_official | 76:aeb1df146756 | 981 | * This parameter can be one of the following values: |
mbed_official | 76:aeb1df146756 | 982 | * @arg SPI_I2S_IT_TXE: Transmit buffer empty interrupt. |
mbed_official | 76:aeb1df146756 | 983 | * @arg SPI_I2S_IT_RXNE: Receive buffer not empty interrupt. |
mbed_official | 76:aeb1df146756 | 984 | * @arg SPI_I2S_IT_OVR: Overrun interrupt. |
mbed_official | 76:aeb1df146756 | 985 | * @arg SPI_IT_MODF: Mode Fault interrupt. |
mbed_official | 76:aeb1df146756 | 986 | * @arg SPI_IT_CRCERR: CRC Error interrupt. |
mbed_official | 76:aeb1df146756 | 987 | * @arg I2S_IT_UDR: Underrun interrupt. |
mbed_official | 76:aeb1df146756 | 988 | * @arg SPI_I2S_IT_FRE: Format Error interrupt. |
mbed_official | 76:aeb1df146756 | 989 | * @retval The new state of SPI_I2S_IT (SET or RESET). |
mbed_official | 76:aeb1df146756 | 990 | */ |
mbed_official | 76:aeb1df146756 | 991 | ITStatus SPI_I2S_GetITStatus(SPI_TypeDef* SPIx, uint8_t SPI_I2S_IT) |
mbed_official | 76:aeb1df146756 | 992 | { |
mbed_official | 76:aeb1df146756 | 993 | ITStatus bitstatus = RESET; |
mbed_official | 76:aeb1df146756 | 994 | uint16_t itpos = 0, itmask = 0, enablestatus = 0; |
mbed_official | 76:aeb1df146756 | 995 | |
mbed_official | 76:aeb1df146756 | 996 | /* Check the parameters */ |
mbed_official | 76:aeb1df146756 | 997 | assert_param(IS_SPI_ALL_PERIPH(SPIx)); |
mbed_official | 76:aeb1df146756 | 998 | assert_param(IS_SPI_I2S_GET_IT(SPI_I2S_IT)); |
mbed_official | 76:aeb1df146756 | 999 | |
mbed_official | 76:aeb1df146756 | 1000 | /* Get the SPI_I2S_IT index */ |
mbed_official | 76:aeb1df146756 | 1001 | itpos = 0x01 << (SPI_I2S_IT & 0x0F); |
mbed_official | 76:aeb1df146756 | 1002 | |
mbed_official | 76:aeb1df146756 | 1003 | /* Get the SPI_I2S_IT IT mask */ |
mbed_official | 76:aeb1df146756 | 1004 | itmask = SPI_I2S_IT >> 4; |
mbed_official | 76:aeb1df146756 | 1005 | |
mbed_official | 76:aeb1df146756 | 1006 | /* Set the IT mask */ |
mbed_official | 76:aeb1df146756 | 1007 | itmask = 0x01 << itmask; |
mbed_official | 76:aeb1df146756 | 1008 | |
mbed_official | 76:aeb1df146756 | 1009 | /* Get the SPI_I2S_IT enable bit status */ |
mbed_official | 76:aeb1df146756 | 1010 | enablestatus = (SPIx->CR2 & itmask) ; |
mbed_official | 76:aeb1df146756 | 1011 | |
mbed_official | 76:aeb1df146756 | 1012 | /* Check the status of the specified SPI interrupt */ |
mbed_official | 76:aeb1df146756 | 1013 | if (((SPIx->SR & itpos) != (uint16_t)RESET) && enablestatus) |
mbed_official | 76:aeb1df146756 | 1014 | { |
mbed_official | 76:aeb1df146756 | 1015 | /* SPI_I2S_IT is set */ |
mbed_official | 76:aeb1df146756 | 1016 | bitstatus = SET; |
mbed_official | 76:aeb1df146756 | 1017 | } |
mbed_official | 76:aeb1df146756 | 1018 | else |
mbed_official | 76:aeb1df146756 | 1019 | { |
mbed_official | 76:aeb1df146756 | 1020 | /* SPI_I2S_IT is reset */ |
mbed_official | 76:aeb1df146756 | 1021 | bitstatus = RESET; |
mbed_official | 76:aeb1df146756 | 1022 | } |
mbed_official | 76:aeb1df146756 | 1023 | /* Return the SPI_I2S_IT status */ |
mbed_official | 76:aeb1df146756 | 1024 | return bitstatus; |
mbed_official | 76:aeb1df146756 | 1025 | } |
mbed_official | 76:aeb1df146756 | 1026 | |
mbed_official | 76:aeb1df146756 | 1027 | /** |
mbed_official | 76:aeb1df146756 | 1028 | * @brief Clears the SPIx CRC Error (CRCERR) interrupt pending bit. |
mbed_official | 76:aeb1df146756 | 1029 | * @param SPIx: To select the SPIx/I2Sx peripheral, where x can be: 1, 2 or 3 |
mbed_official | 76:aeb1df146756 | 1030 | * in SPI mode or 2 or 3 in I2S mode. |
mbed_official | 76:aeb1df146756 | 1031 | |
mbed_official | 76:aeb1df146756 | 1032 | * @param SPI_I2S_IT: specifies the SPI interrupt pending bit to clear. |
mbed_official | 76:aeb1df146756 | 1033 | * This function clears only CRCERR interrupt pending bit. |
mbed_official | 76:aeb1df146756 | 1034 | |
mbed_official | 76:aeb1df146756 | 1035 | * OVR (OverRun Error) interrupt pending bit is cleared by software |
mbed_official | 76:aeb1df146756 | 1036 | * sequence: a read operation to SPI_DR register (SPI_I2S_ReceiveData()) |
mbed_official | 76:aeb1df146756 | 1037 | * followed by a read operation to SPI_SR register (SPI_I2S_GetITStatus()). |
mbed_official | 76:aeb1df146756 | 1038 | * @note UDR (UnderRun Error) interrupt pending bit is cleared by a read |
mbed_official | 76:aeb1df146756 | 1039 | * operation to SPI_SR register (SPI_I2S_GetITStatus()). |
mbed_official | 76:aeb1df146756 | 1040 | * @note MODF (Mode Fault) interrupt pending bit is cleared by software sequence: |
mbed_official | 76:aeb1df146756 | 1041 | * a read/write operation to SPI_SR register (SPI_I2S_GetITStatus()) |
mbed_official | 76:aeb1df146756 | 1042 | * followed by a write operation to SPI_CR1 register (SPI_Cmd() to enable |
mbed_official | 76:aeb1df146756 | 1043 | * the SPI). |
mbed_official | 76:aeb1df146756 | 1044 | * @retval None |
mbed_official | 76:aeb1df146756 | 1045 | */ |
mbed_official | 76:aeb1df146756 | 1046 | void SPI_I2S_ClearITPendingBit(SPI_TypeDef* SPIx, uint8_t SPI_I2S_IT) |
mbed_official | 76:aeb1df146756 | 1047 | { |
mbed_official | 76:aeb1df146756 | 1048 | uint16_t itpos = 0; |
mbed_official | 76:aeb1df146756 | 1049 | /* Check the parameters */ |
mbed_official | 76:aeb1df146756 | 1050 | assert_param(IS_SPI_ALL_PERIPH(SPIx)); |
mbed_official | 76:aeb1df146756 | 1051 | assert_param(IS_SPI_I2S_CLEAR_IT(SPI_I2S_IT)); |
mbed_official | 76:aeb1df146756 | 1052 | |
mbed_official | 76:aeb1df146756 | 1053 | /* Get the SPI_I2S IT index */ |
mbed_official | 76:aeb1df146756 | 1054 | itpos = 0x01 << (SPI_I2S_IT & 0x0F); |
mbed_official | 76:aeb1df146756 | 1055 | |
mbed_official | 76:aeb1df146756 | 1056 | /* Clear the selected SPI CRC Error (CRCERR) interrupt pending bit */ |
mbed_official | 76:aeb1df146756 | 1057 | SPIx->SR = (uint16_t)~itpos; |
mbed_official | 76:aeb1df146756 | 1058 | } |
mbed_official | 76:aeb1df146756 | 1059 | |
mbed_official | 76:aeb1df146756 | 1060 | /** |
mbed_official | 76:aeb1df146756 | 1061 | * @} |
mbed_official | 76:aeb1df146756 | 1062 | */ |
mbed_official | 76:aeb1df146756 | 1063 | |
mbed_official | 76:aeb1df146756 | 1064 | /** |
mbed_official | 76:aeb1df146756 | 1065 | * @} |
mbed_official | 76:aeb1df146756 | 1066 | */ |
mbed_official | 76:aeb1df146756 | 1067 | |
mbed_official | 76:aeb1df146756 | 1068 | /** |
mbed_official | 76:aeb1df146756 | 1069 | * @} |
mbed_official | 76:aeb1df146756 | 1070 | */ |
mbed_official | 76:aeb1df146756 | 1071 | |
mbed_official | 76:aeb1df146756 | 1072 | /** |
mbed_official | 76:aeb1df146756 | 1073 | * @} |
mbed_official | 76:aeb1df146756 | 1074 | */ |
mbed_official | 76:aeb1df146756 | 1075 | |
mbed_official | 76:aeb1df146756 | 1076 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |