shao ziyang / mbed-src-kl05

mbed library sources

Dependents:   frdm_kl05z_gpio_test

Fork of mbed-src by mbed official

targets/cmsis/TARGET_STM/TARGET_NUCLEO_F103RB/stm32f10x_spi.c@52:a51c77007319, 2013-12-02 (annotated)

Committer:
mbed_official
Date:
Mon Dec 02 11:30:05 2013 +0000
Revision:
52:a51c77007319
Child:
70:c1fbde68b492
Synchronized with git revision 49df530ae72ce97ccc773d1f2c13b38e868e6abd



Full URL: https://github.com/mbedmicro/mbed/commit/49df530ae72ce97ccc773d1f2c13b38e868e6abd/



Add STMicroelectronics NUCLEO_F103RB target

Who changed what in which revision?

UserRevisionLine numberNew contents of line
mbed_official 52:a51c77007319 1 /**
mbed_official 52:a51c77007319 2 ******************************************************************************
mbed_official 52:a51c77007319 3 * @file stm32f10x_spi.c
mbed_official 52:a51c77007319 4 * @author MCD Application Team
mbed_official 52:a51c77007319 5 * @version V3.5.0
mbed_official 52:a51c77007319 6 * @date 11-March-2011
mbed_official 52:a51c77007319 7 * @brief This file provides all the SPI firmware functions.
mbed_official 52:a51c77007319 8 ******************************************************************************
mbed_official 52:a51c77007319 9 * @attention
mbed_official 52:a51c77007319 10 *
mbed_official 52:a51c77007319 11 * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
mbed_official 52:a51c77007319 12 * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
mbed_official 52:a51c77007319 13 * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
mbed_official 52:a51c77007319 14 * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
mbed_official 52:a51c77007319 15 * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
mbed_official 52:a51c77007319 16 * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
mbed_official 52:a51c77007319 17 *
mbed_official 52:a51c77007319 18 * <h2><center>&copy; COPYRIGHT 2011 STMicroelectronics</center></h2>
mbed_official 52:a51c77007319 19 ******************************************************************************
mbed_official 52:a51c77007319 20 */
mbed_official 52:a51c77007319 21
mbed_official 52:a51c77007319 22 /* Includes ------------------------------------------------------------------*/
mbed_official 52:a51c77007319 23 #include "stm32f10x_spi.h"
mbed_official 52:a51c77007319 24 #include "stm32f10x_rcc.h"
mbed_official 52:a51c77007319 25
mbed_official 52:a51c77007319 26 /** @addtogroup STM32F10x_StdPeriph_Driver
mbed_official 52:a51c77007319 27 * @{
mbed_official 52:a51c77007319 28 */
mbed_official 52:a51c77007319 29
mbed_official 52:a51c77007319 30 /** @defgroup SPI
mbed_official 52:a51c77007319 31 * @brief SPI driver modules
mbed_official 52:a51c77007319 32 * @{
mbed_official 52:a51c77007319 33 */
mbed_official 52:a51c77007319 34
mbed_official 52:a51c77007319 35 /** @defgroup SPI_Private_TypesDefinitions
mbed_official 52:a51c77007319 36 * @{
mbed_official 52:a51c77007319 37 */
mbed_official 52:a51c77007319 38
mbed_official 52:a51c77007319 39 /**
mbed_official 52:a51c77007319 40 * @}
mbed_official 52:a51c77007319 41 */
mbed_official 52:a51c77007319 42
mbed_official 52:a51c77007319 43
mbed_official 52:a51c77007319 44 /** @defgroup SPI_Private_Defines
mbed_official 52:a51c77007319 45 * @{
mbed_official 52:a51c77007319 46 */
mbed_official 52:a51c77007319 47
mbed_official 52:a51c77007319 48 /* SPI SPE mask */
mbed_official 52:a51c77007319 49 #define CR1_SPE_Set ((uint16_t)0x0040)
mbed_official 52:a51c77007319 50 #define CR1_SPE_Reset ((uint16_t)0xFFBF)
mbed_official 52:a51c77007319 51
mbed_official 52:a51c77007319 52 /* I2S I2SE mask */
mbed_official 52:a51c77007319 53 #define I2SCFGR_I2SE_Set ((uint16_t)0x0400)
mbed_official 52:a51c77007319 54 #define I2SCFGR_I2SE_Reset ((uint16_t)0xFBFF)
mbed_official 52:a51c77007319 55
mbed_official 52:a51c77007319 56 /* SPI CRCNext mask */
mbed_official 52:a51c77007319 57 #define CR1_CRCNext_Set ((uint16_t)0x1000)
mbed_official 52:a51c77007319 58
mbed_official 52:a51c77007319 59 /* SPI CRCEN mask */
mbed_official 52:a51c77007319 60 #define CR1_CRCEN_Set ((uint16_t)0x2000)
mbed_official 52:a51c77007319 61 #define CR1_CRCEN_Reset ((uint16_t)0xDFFF)
mbed_official 52:a51c77007319 62
mbed_official 52:a51c77007319 63 /* SPI SSOE mask */
mbed_official 52:a51c77007319 64 #define CR2_SSOE_Set ((uint16_t)0x0004)
mbed_official 52:a51c77007319 65 #define CR2_SSOE_Reset ((uint16_t)0xFFFB)
mbed_official 52:a51c77007319 66
mbed_official 52:a51c77007319 67 /* SPI registers Masks */
mbed_official 52:a51c77007319 68 #define CR1_CLEAR_Mask ((uint16_t)0x3040)
mbed_official 52:a51c77007319 69 #define I2SCFGR_CLEAR_Mask ((uint16_t)0xF040)
mbed_official 52:a51c77007319 70
mbed_official 52:a51c77007319 71 /* SPI or I2S mode selection masks */
mbed_official 52:a51c77007319 72 #define SPI_Mode_Select ((uint16_t)0xF7FF)
mbed_official 52:a51c77007319 73 #define I2S_Mode_Select ((uint16_t)0x0800)
mbed_official 52:a51c77007319 74
mbed_official 52:a51c77007319 75 /* I2S clock source selection masks */
mbed_official 52:a51c77007319 76 #define I2S2_CLOCK_SRC ((uint32_t)(0x00020000))
mbed_official 52:a51c77007319 77 #define I2S3_CLOCK_SRC ((uint32_t)(0x00040000))
mbed_official 52:a51c77007319 78 #define I2S_MUL_MASK ((uint32_t)(0x0000F000))
mbed_official 52:a51c77007319 79 #define I2S_DIV_MASK ((uint32_t)(0x000000F0))
mbed_official 52:a51c77007319 80
mbed_official 52:a51c77007319 81 /**
mbed_official 52:a51c77007319 82 * @}
mbed_official 52:a51c77007319 83 */
mbed_official 52:a51c77007319 84
mbed_official 52:a51c77007319 85 /** @defgroup SPI_Private_Macros
mbed_official 52:a51c77007319 86 * @{
mbed_official 52:a51c77007319 87 */
mbed_official 52:a51c77007319 88
mbed_official 52:a51c77007319 89 /**
mbed_official 52:a51c77007319 90 * @}
mbed_official 52:a51c77007319 91 */
mbed_official 52:a51c77007319 92
mbed_official 52:a51c77007319 93 /** @defgroup SPI_Private_Variables
mbed_official 52:a51c77007319 94 * @{
mbed_official 52:a51c77007319 95 */
mbed_official 52:a51c77007319 96
mbed_official 52:a51c77007319 97 /**
mbed_official 52:a51c77007319 98 * @}
mbed_official 52:a51c77007319 99 */
mbed_official 52:a51c77007319 100
mbed_official 52:a51c77007319 101 /** @defgroup SPI_Private_FunctionPrototypes
mbed_official 52:a51c77007319 102 * @{
mbed_official 52:a51c77007319 103 */
mbed_official 52:a51c77007319 104
mbed_official 52:a51c77007319 105 /**
mbed_official 52:a51c77007319 106 * @}
mbed_official 52:a51c77007319 107 */
mbed_official 52:a51c77007319 108
mbed_official 52:a51c77007319 109 /** @defgroup SPI_Private_Functions
mbed_official 52:a51c77007319 110 * @{
mbed_official 52:a51c77007319 111 */
mbed_official 52:a51c77007319 112
mbed_official 52:a51c77007319 113 /**
mbed_official 52:a51c77007319 114 * @brief Deinitializes the SPIx peripheral registers to their default
mbed_official 52:a51c77007319 115 * reset values (Affects also the I2Ss).
mbed_official 52:a51c77007319 116 * @param SPIx: where x can be 1, 2 or 3 to select the SPI peripheral.
mbed_official 52:a51c77007319 117 * @retval None
mbed_official 52:a51c77007319 118 */
mbed_official 52:a51c77007319 119 void SPI_I2S_DeInit(SPI_TypeDef* SPIx)
mbed_official 52:a51c77007319 120 {
mbed_official 52:a51c77007319 121 /* Check the parameters */
mbed_official 52:a51c77007319 122 assert_param(IS_SPI_ALL_PERIPH(SPIx));
mbed_official 52:a51c77007319 123
mbed_official 52:a51c77007319 124 if (SPIx == SPI1)
mbed_official 52:a51c77007319 125 {
mbed_official 52:a51c77007319 126 /* Enable SPI1 reset state */
mbed_official 52:a51c77007319 127 RCC_APB2PeriphResetCmd(RCC_APB2Periph_SPI1, ENABLE);
mbed_official 52:a51c77007319 128 /* Release SPI1 from reset state */
mbed_official 52:a51c77007319 129 RCC_APB2PeriphResetCmd(RCC_APB2Periph_SPI1, DISABLE);
mbed_official 52:a51c77007319 130 }
mbed_official 52:a51c77007319 131 else if (SPIx == SPI2)
mbed_official 52:a51c77007319 132 {
mbed_official 52:a51c77007319 133 /* Enable SPI2 reset state */
mbed_official 52:a51c77007319 134 RCC_APB1PeriphResetCmd(RCC_APB1Periph_SPI2, ENABLE);
mbed_official 52:a51c77007319 135 /* Release SPI2 from reset state */
mbed_official 52:a51c77007319 136 RCC_APB1PeriphResetCmd(RCC_APB1Periph_SPI2, DISABLE);
mbed_official 52:a51c77007319 137 }
mbed_official 52:a51c77007319 138 else
mbed_official 52:a51c77007319 139 {
mbed_official 52:a51c77007319 140 if (SPIx == SPI3)
mbed_official 52:a51c77007319 141 {
mbed_official 52:a51c77007319 142 /* Enable SPI3 reset state */
mbed_official 52:a51c77007319 143 RCC_APB1PeriphResetCmd(RCC_APB1Periph_SPI3, ENABLE);
mbed_official 52:a51c77007319 144 /* Release SPI3 from reset state */
mbed_official 52:a51c77007319 145 RCC_APB1PeriphResetCmd(RCC_APB1Periph_SPI3, DISABLE);
mbed_official 52:a51c77007319 146 }
mbed_official 52:a51c77007319 147 }
mbed_official 52:a51c77007319 148 }
mbed_official 52:a51c77007319 149
mbed_official 52:a51c77007319 150 /**
mbed_official 52:a51c77007319 151 * @brief Initializes the SPIx peripheral according to the specified
mbed_official 52:a51c77007319 152 * parameters in the SPI_InitStruct.
mbed_official 52:a51c77007319 153 * @param SPIx: where x can be 1, 2 or 3 to select the SPI peripheral.
mbed_official 52:a51c77007319 154 * @param SPI_InitStruct: pointer to a SPI_InitTypeDef structure that
mbed_official 52:a51c77007319 155 * contains the configuration information for the specified SPI peripheral.
mbed_official 52:a51c77007319 156 * @retval None
mbed_official 52:a51c77007319 157 */
mbed_official 52:a51c77007319 158 void SPI_Init(SPI_TypeDef* SPIx, SPI_InitTypeDef* SPI_InitStruct)
mbed_official 52:a51c77007319 159 {
mbed_official 52:a51c77007319 160 uint16_t tmpreg = 0;
mbed_official 52:a51c77007319 161
mbed_official 52:a51c77007319 162 /* check the parameters */
mbed_official 52:a51c77007319 163 assert_param(IS_SPI_ALL_PERIPH(SPIx));
mbed_official 52:a51c77007319 164
mbed_official 52:a51c77007319 165 /* Check the SPI parameters */
mbed_official 52:a51c77007319 166 assert_param(IS_SPI_DIRECTION_MODE(SPI_InitStruct->SPI_Direction));
mbed_official 52:a51c77007319 167 assert_param(IS_SPI_MODE(SPI_InitStruct->SPI_Mode));
mbed_official 52:a51c77007319 168 assert_param(IS_SPI_DATASIZE(SPI_InitStruct->SPI_DataSize));
mbed_official 52:a51c77007319 169 assert_param(IS_SPI_CPOL(SPI_InitStruct->SPI_CPOL));
mbed_official 52:a51c77007319 170 assert_param(IS_SPI_CPHA(SPI_InitStruct->SPI_CPHA));
mbed_official 52:a51c77007319 171 assert_param(IS_SPI_NSS(SPI_InitStruct->SPI_NSS));
mbed_official 52:a51c77007319 172 assert_param(IS_SPI_BAUDRATE_PRESCALER(SPI_InitStruct->SPI_BaudRatePrescaler));
mbed_official 52:a51c77007319 173 assert_param(IS_SPI_FIRST_BIT(SPI_InitStruct->SPI_FirstBit));
mbed_official 52:a51c77007319 174 assert_param(IS_SPI_CRC_POLYNOMIAL(SPI_InitStruct->SPI_CRCPolynomial));
mbed_official 52:a51c77007319 175
mbed_official 52:a51c77007319 176 /*---------------------------- SPIx CR1 Configuration ------------------------*/
mbed_official 52:a51c77007319 177 /* Get the SPIx CR1 value */
mbed_official 52:a51c77007319 178 tmpreg = SPIx->CR1;
mbed_official 52:a51c77007319 179 /* Clear BIDIMode, BIDIOE, RxONLY, SSM, SSI, LSBFirst, BR, MSTR, CPOL and CPHA bits */
mbed_official 52:a51c77007319 180 tmpreg &= CR1_CLEAR_Mask;
mbed_official 52:a51c77007319 181 /* Configure SPIx: direction, NSS management, first transmitted bit, BaudRate prescaler
mbed_official 52:a51c77007319 182 master/salve mode, CPOL and CPHA */
mbed_official 52:a51c77007319 183 /* Set BIDImode, BIDIOE and RxONLY bits according to SPI_Direction value */
mbed_official 52:a51c77007319 184 /* Set SSM, SSI and MSTR bits according to SPI_Mode and SPI_NSS values */
mbed_official 52:a51c77007319 185 /* Set LSBFirst bit according to SPI_FirstBit value */
mbed_official 52:a51c77007319 186 /* Set BR bits according to SPI_BaudRatePrescaler value */
mbed_official 52:a51c77007319 187 /* Set CPOL bit according to SPI_CPOL value */
mbed_official 52:a51c77007319 188 /* Set CPHA bit according to SPI_CPHA value */
mbed_official 52:a51c77007319 189 tmpreg |= (uint16_t)((uint32_t)SPI_InitStruct->SPI_Direction | SPI_InitStruct->SPI_Mode |
mbed_official 52:a51c77007319 190 SPI_InitStruct->SPI_DataSize | SPI_InitStruct->SPI_CPOL |
mbed_official 52:a51c77007319 191 SPI_InitStruct->SPI_CPHA | SPI_InitStruct->SPI_NSS |
mbed_official 52:a51c77007319 192 SPI_InitStruct->SPI_BaudRatePrescaler | SPI_InitStruct->SPI_FirstBit);
mbed_official 52:a51c77007319 193 /* Write to SPIx CR1 */
mbed_official 52:a51c77007319 194 SPIx->CR1 = tmpreg;
mbed_official 52:a51c77007319 195
mbed_official 52:a51c77007319 196 /* Activate the SPI mode (Reset I2SMOD bit in I2SCFGR register) */
mbed_official 52:a51c77007319 197 SPIx->I2SCFGR &= SPI_Mode_Select;
mbed_official 52:a51c77007319 198
mbed_official 52:a51c77007319 199 /*---------------------------- SPIx CRCPOLY Configuration --------------------*/
mbed_official 52:a51c77007319 200 /* Write to SPIx CRCPOLY */
mbed_official 52:a51c77007319 201 SPIx->CRCPR = SPI_InitStruct->SPI_CRCPolynomial;
mbed_official 52:a51c77007319 202 }
mbed_official 52:a51c77007319 203
mbed_official 52:a51c77007319 204 /**
mbed_official 52:a51c77007319 205 * @brief Initializes the SPIx peripheral according to the specified
mbed_official 52:a51c77007319 206 * parameters in the I2S_InitStruct.
mbed_official 52:a51c77007319 207 * @param SPIx: where x can be 2 or 3 to select the SPI peripheral
mbed_official 52:a51c77007319 208 * (configured in I2S mode).
mbed_official 52:a51c77007319 209 * @param I2S_InitStruct: pointer to an I2S_InitTypeDef structure that
mbed_official 52:a51c77007319 210 * contains the configuration information for the specified SPI peripheral
mbed_official 52:a51c77007319 211 * configured in I2S mode.
mbed_official 52:a51c77007319 212 * @note
mbed_official 52:a51c77007319 213 * The function calculates the optimal prescaler needed to obtain the most
mbed_official 52:a51c77007319 214 * accurate audio frequency (depending on the I2S clock source, the PLL values
mbed_official 52:a51c77007319 215 * and the product configuration). But in case the prescaler value is greater
mbed_official 52:a51c77007319 216 * than 511, the default value (0x02) will be configured instead. *
mbed_official 52:a51c77007319 217 * @retval None
mbed_official 52:a51c77007319 218 */
mbed_official 52:a51c77007319 219 void I2S_Init(SPI_TypeDef* SPIx, I2S_InitTypeDef* I2S_InitStruct)
mbed_official 52:a51c77007319 220 {
mbed_official 52:a51c77007319 221 uint16_t tmpreg = 0, i2sdiv = 2, i2sodd = 0, packetlength = 1;
mbed_official 52:a51c77007319 222 uint32_t tmp = 0;
mbed_official 52:a51c77007319 223 RCC_ClocksTypeDef RCC_Clocks;
mbed_official 52:a51c77007319 224 uint32_t sourceclock = 0;
mbed_official 52:a51c77007319 225
mbed_official 52:a51c77007319 226 /* Check the I2S parameters */
mbed_official 52:a51c77007319 227 assert_param(IS_SPI_23_PERIPH(SPIx));
mbed_official 52:a51c77007319 228 assert_param(IS_I2S_MODE(I2S_InitStruct->I2S_Mode));
mbed_official 52:a51c77007319 229 assert_param(IS_I2S_STANDARD(I2S_InitStruct->I2S_Standard));
mbed_official 52:a51c77007319 230 assert_param(IS_I2S_DATA_FORMAT(I2S_InitStruct->I2S_DataFormat));
mbed_official 52:a51c77007319 231 assert_param(IS_I2S_MCLK_OUTPUT(I2S_InitStruct->I2S_MCLKOutput));
mbed_official 52:a51c77007319 232 assert_param(IS_I2S_AUDIO_FREQ(I2S_InitStruct->I2S_AudioFreq));
mbed_official 52:a51c77007319 233 assert_param(IS_I2S_CPOL(I2S_InitStruct->I2S_CPOL));
mbed_official 52:a51c77007319 234
mbed_official 52:a51c77007319 235 /*----------------------- SPIx I2SCFGR & I2SPR Configuration -----------------*/
mbed_official 52:a51c77007319 236 /* Clear I2SMOD, I2SE, I2SCFG, PCMSYNC, I2SSTD, CKPOL, DATLEN and CHLEN bits */
mbed_official 52:a51c77007319 237 SPIx->I2SCFGR &= I2SCFGR_CLEAR_Mask;
mbed_official 52:a51c77007319 238 SPIx->I2SPR = 0x0002;
mbed_official 52:a51c77007319 239
mbed_official 52:a51c77007319 240 /* Get the I2SCFGR register value */
mbed_official 52:a51c77007319 241 tmpreg = SPIx->I2SCFGR;
mbed_official 52:a51c77007319 242
mbed_official 52:a51c77007319 243 /* If the default value has to be written, reinitialize i2sdiv and i2sodd*/
mbed_official 52:a51c77007319 244 if(I2S_InitStruct->I2S_AudioFreq == I2S_AudioFreq_Default)
mbed_official 52:a51c77007319 245 {
mbed_official 52:a51c77007319 246 i2sodd = (uint16_t)0;
mbed_official 52:a51c77007319 247 i2sdiv = (uint16_t)2;
mbed_official 52:a51c77007319 248 }
mbed_official 52:a51c77007319 249 /* If the requested audio frequency is not the default, compute the prescaler */
mbed_official 52:a51c77007319 250 else
mbed_official 52:a51c77007319 251 {
mbed_official 52:a51c77007319 252 /* Check the frame length (For the Prescaler computing) */
mbed_official 52:a51c77007319 253 if(I2S_InitStruct->I2S_DataFormat == I2S_DataFormat_16b)
mbed_official 52:a51c77007319 254 {
mbed_official 52:a51c77007319 255 /* Packet length is 16 bits */
mbed_official 52:a51c77007319 256 packetlength = 1;
mbed_official 52:a51c77007319 257 }
mbed_official 52:a51c77007319 258 else
mbed_official 52:a51c77007319 259 {
mbed_official 52:a51c77007319 260 /* Packet length is 32 bits */
mbed_official 52:a51c77007319 261 packetlength = 2;
mbed_official 52:a51c77007319 262 }
mbed_official 52:a51c77007319 263
mbed_official 52:a51c77007319 264 /* Get the I2S clock source mask depending on the peripheral number */
mbed_official 52:a51c77007319 265 if(((uint32_t)SPIx) == SPI2_BASE)
mbed_official 52:a51c77007319 266 {
mbed_official 52:a51c77007319 267 /* The mask is relative to I2S2 */
mbed_official 52:a51c77007319 268 tmp = I2S2_CLOCK_SRC;
mbed_official 52:a51c77007319 269 }
mbed_official 52:a51c77007319 270 else
mbed_official 52:a51c77007319 271 {
mbed_official 52:a51c77007319 272 /* The mask is relative to I2S3 */
mbed_official 52:a51c77007319 273 tmp = I2S3_CLOCK_SRC;
mbed_official 52:a51c77007319 274 }
mbed_official 52:a51c77007319 275
mbed_official 52:a51c77007319 276 /* Check the I2S clock source configuration depending on the Device:
mbed_official 52:a51c77007319 277 Only Connectivity line devices have the PLL3 VCO clock */
mbed_official 52:a51c77007319 278 #ifdef STM32F10X_CL
mbed_official 52:a51c77007319 279 if((RCC->CFGR2 & tmp) != 0)
mbed_official 52:a51c77007319 280 {
mbed_official 52:a51c77007319 281 /* Get the configuration bits of RCC PLL3 multiplier */
mbed_official 52:a51c77007319 282 tmp = (uint32_t)((RCC->CFGR2 & I2S_MUL_MASK) >> 12);
mbed_official 52:a51c77007319 283
mbed_official 52:a51c77007319 284 /* Get the value of the PLL3 multiplier */
mbed_official 52:a51c77007319 285 if((tmp > 5) && (tmp < 15))
mbed_official 52:a51c77007319 286 {
mbed_official 52:a51c77007319 287 /* Multiplier is between 8 and 14 (value 15 is forbidden) */
mbed_official 52:a51c77007319 288 tmp += 2;
mbed_official 52:a51c77007319 289 }
mbed_official 52:a51c77007319 290 else
mbed_official 52:a51c77007319 291 {
mbed_official 52:a51c77007319 292 if (tmp == 15)
mbed_official 52:a51c77007319 293 {
mbed_official 52:a51c77007319 294 /* Multiplier is 20 */
mbed_official 52:a51c77007319 295 tmp = 20;
mbed_official 52:a51c77007319 296 }
mbed_official 52:a51c77007319 297 }
mbed_official 52:a51c77007319 298 /* Get the PREDIV2 value */
mbed_official 52:a51c77007319 299 sourceclock = (uint32_t)(((RCC->CFGR2 & I2S_DIV_MASK) >> 4) + 1);
mbed_official 52:a51c77007319 300
mbed_official 52:a51c77007319 301 /* Calculate the Source Clock frequency based on PLL3 and PREDIV2 values */
mbed_official 52:a51c77007319 302 sourceclock = (uint32_t) ((HSE_Value / sourceclock) * tmp * 2);
mbed_official 52:a51c77007319 303 }
mbed_official 52:a51c77007319 304 else
mbed_official 52:a51c77007319 305 {
mbed_official 52:a51c77007319 306 /* I2S Clock source is System clock: Get System Clock frequency */
mbed_official 52:a51c77007319 307 RCC_GetClocksFreq(&RCC_Clocks);
mbed_official 52:a51c77007319 308
mbed_official 52:a51c77007319 309 /* Get the source clock value: based on System Clock value */
mbed_official 52:a51c77007319 310 sourceclock = RCC_Clocks.SYSCLK_Frequency;
mbed_official 52:a51c77007319 311 }
mbed_official 52:a51c77007319 312 #else /* STM32F10X_HD */
mbed_official 52:a51c77007319 313 /* I2S Clock source is System clock: Get System Clock frequency */
mbed_official 52:a51c77007319 314 RCC_GetClocksFreq(&RCC_Clocks);
mbed_official 52:a51c77007319 315
mbed_official 52:a51c77007319 316 /* Get the source clock value: based on System Clock value */
mbed_official 52:a51c77007319 317 sourceclock = RCC_Clocks.SYSCLK_Frequency;
mbed_official 52:a51c77007319 318 #endif /* STM32F10X_CL */
mbed_official 52:a51c77007319 319
mbed_official 52:a51c77007319 320 /* Compute the Real divider depending on the MCLK output state with a floating point */
mbed_official 52:a51c77007319 321 if(I2S_InitStruct->I2S_MCLKOutput == I2S_MCLKOutput_Enable)
mbed_official 52:a51c77007319 322 {
mbed_official 52:a51c77007319 323 /* MCLK output is enabled */
mbed_official 52:a51c77007319 324 tmp = (uint16_t)(((((sourceclock / 256) * 10) / I2S_InitStruct->I2S_AudioFreq)) + 5);
mbed_official 52:a51c77007319 325 }
mbed_official 52:a51c77007319 326 else
mbed_official 52:a51c77007319 327 {
mbed_official 52:a51c77007319 328 /* MCLK output is disabled */
mbed_official 52:a51c77007319 329 tmp = (uint16_t)(((((sourceclock / (32 * packetlength)) *10 ) / I2S_InitStruct->I2S_AudioFreq)) + 5);
mbed_official 52:a51c77007319 330 }
mbed_official 52:a51c77007319 331
mbed_official 52:a51c77007319 332 /* Remove the floating point */
mbed_official 52:a51c77007319 333 tmp = tmp / 10;
mbed_official 52:a51c77007319 334
mbed_official 52:a51c77007319 335 /* Check the parity of the divider */
mbed_official 52:a51c77007319 336 i2sodd = (uint16_t)(tmp & (uint16_t)0x0001);
mbed_official 52:a51c77007319 337
mbed_official 52:a51c77007319 338 /* Compute the i2sdiv prescaler */
mbed_official 52:a51c77007319 339 i2sdiv = (uint16_t)((tmp - i2sodd) / 2);
mbed_official 52:a51c77007319 340
mbed_official 52:a51c77007319 341 /* Get the Mask for the Odd bit (SPI_I2SPR[8]) register */
mbed_official 52:a51c77007319 342 i2sodd = (uint16_t) (i2sodd << 8);
mbed_official 52:a51c77007319 343 }
mbed_official 52:a51c77007319 344
mbed_official 52:a51c77007319 345 /* Test if the divider is 1 or 0 or greater than 0xFF */
mbed_official 52:a51c77007319 346 if ((i2sdiv < 2) || (i2sdiv > 0xFF))
mbed_official 52:a51c77007319 347 {
mbed_official 52:a51c77007319 348 /* Set the default values */
mbed_official 52:a51c77007319 349 i2sdiv = 2;
mbed_official 52:a51c77007319 350 i2sodd = 0;
mbed_official 52:a51c77007319 351 }
mbed_official 52:a51c77007319 352
mbed_official 52:a51c77007319 353 /* Write to SPIx I2SPR register the computed value */
mbed_official 52:a51c77007319 354 SPIx->I2SPR = (uint16_t)(i2sdiv | (uint16_t)(i2sodd | (uint16_t)I2S_InitStruct->I2S_MCLKOutput));
mbed_official 52:a51c77007319 355
mbed_official 52:a51c77007319 356 /* Configure the I2S with the SPI_InitStruct values */
mbed_official 52:a51c77007319 357 tmpreg |= (uint16_t)(I2S_Mode_Select | (uint16_t)(I2S_InitStruct->I2S_Mode | \
mbed_official 52:a51c77007319 358 (uint16_t)(I2S_InitStruct->I2S_Standard | (uint16_t)(I2S_InitStruct->I2S_DataFormat | \
mbed_official 52:a51c77007319 359 (uint16_t)I2S_InitStruct->I2S_CPOL))));
mbed_official 52:a51c77007319 360
mbed_official 52:a51c77007319 361 /* Write to SPIx I2SCFGR */
mbed_official 52:a51c77007319 362 SPIx->I2SCFGR = tmpreg;
mbed_official 52:a51c77007319 363 }
mbed_official 52:a51c77007319 364
mbed_official 52:a51c77007319 365 /**
mbed_official 52:a51c77007319 366 * @brief Fills each SPI_InitStruct member with its default value.
mbed_official 52:a51c77007319 367 * @param SPI_InitStruct : pointer to a SPI_InitTypeDef structure which will be initialized.
mbed_official 52:a51c77007319 368 * @retval None
mbed_official 52:a51c77007319 369 */
mbed_official 52:a51c77007319 370 void SPI_StructInit(SPI_InitTypeDef* SPI_InitStruct)
mbed_official 52:a51c77007319 371 {
mbed_official 52:a51c77007319 372 /*--------------- Reset SPI init structure parameters values -----------------*/
mbed_official 52:a51c77007319 373 /* Initialize the SPI_Direction member */
mbed_official 52:a51c77007319 374 SPI_InitStruct->SPI_Direction = SPI_Direction_2Lines_FullDuplex;
mbed_official 52:a51c77007319 375 /* initialize the SPI_Mode member */
mbed_official 52:a51c77007319 376 SPI_InitStruct->SPI_Mode = SPI_Mode_Slave;
mbed_official 52:a51c77007319 377 /* initialize the SPI_DataSize member */
mbed_official 52:a51c77007319 378 SPI_InitStruct->SPI_DataSize = SPI_DataSize_8b;
mbed_official 52:a51c77007319 379 /* Initialize the SPI_CPOL member */
mbed_official 52:a51c77007319 380 SPI_InitStruct->SPI_CPOL = SPI_CPOL_Low;
mbed_official 52:a51c77007319 381 /* Initialize the SPI_CPHA member */
mbed_official 52:a51c77007319 382 SPI_InitStruct->SPI_CPHA = SPI_CPHA_1Edge;
mbed_official 52:a51c77007319 383 /* Initialize the SPI_NSS member */
mbed_official 52:a51c77007319 384 SPI_InitStruct->SPI_NSS = SPI_NSS_Hard;
mbed_official 52:a51c77007319 385 /* Initialize the SPI_BaudRatePrescaler member */
mbed_official 52:a51c77007319 386 SPI_InitStruct->SPI_BaudRatePrescaler = SPI_BaudRatePrescaler_2;
mbed_official 52:a51c77007319 387 /* Initialize the SPI_FirstBit member */
mbed_official 52:a51c77007319 388 SPI_InitStruct->SPI_FirstBit = SPI_FirstBit_MSB;
mbed_official 52:a51c77007319 389 /* Initialize the SPI_CRCPolynomial member */
mbed_official 52:a51c77007319 390 SPI_InitStruct->SPI_CRCPolynomial = 7;
mbed_official 52:a51c77007319 391 }
mbed_official 52:a51c77007319 392
mbed_official 52:a51c77007319 393 /**
mbed_official 52:a51c77007319 394 * @brief Fills each I2S_InitStruct member with its default value.
mbed_official 52:a51c77007319 395 * @param I2S_InitStruct : pointer to a I2S_InitTypeDef structure which will be initialized.
mbed_official 52:a51c77007319 396 * @retval None
mbed_official 52:a51c77007319 397 */
mbed_official 52:a51c77007319 398 void I2S_StructInit(I2S_InitTypeDef* I2S_InitStruct)
mbed_official 52:a51c77007319 399 {
mbed_official 52:a51c77007319 400 /*--------------- Reset I2S init structure parameters values -----------------*/
mbed_official 52:a51c77007319 401 /* Initialize the I2S_Mode member */
mbed_official 52:a51c77007319 402 I2S_InitStruct->I2S_Mode = I2S_Mode_SlaveTx;
mbed_official 52:a51c77007319 403
mbed_official 52:a51c77007319 404 /* Initialize the I2S_Standard member */
mbed_official 52:a51c77007319 405 I2S_InitStruct->I2S_Standard = I2S_Standard_Phillips;
mbed_official 52:a51c77007319 406
mbed_official 52:a51c77007319 407 /* Initialize the I2S_DataFormat member */
mbed_official 52:a51c77007319 408 I2S_InitStruct->I2S_DataFormat = I2S_DataFormat_16b;
mbed_official 52:a51c77007319 409
mbed_official 52:a51c77007319 410 /* Initialize the I2S_MCLKOutput member */
mbed_official 52:a51c77007319 411 I2S_InitStruct->I2S_MCLKOutput = I2S_MCLKOutput_Disable;
mbed_official 52:a51c77007319 412
mbed_official 52:a51c77007319 413 /* Initialize the I2S_AudioFreq member */
mbed_official 52:a51c77007319 414 I2S_InitStruct->I2S_AudioFreq = I2S_AudioFreq_Default;
mbed_official 52:a51c77007319 415
mbed_official 52:a51c77007319 416 /* Initialize the I2S_CPOL member */
mbed_official 52:a51c77007319 417 I2S_InitStruct->I2S_CPOL = I2S_CPOL_Low;
mbed_official 52:a51c77007319 418 }
mbed_official 52:a51c77007319 419
mbed_official 52:a51c77007319 420 /**
mbed_official 52:a51c77007319 421 * @brief Enables or disables the specified SPI peripheral.
mbed_official 52:a51c77007319 422 * @param SPIx: where x can be 1, 2 or 3 to select the SPI peripheral.
mbed_official 52:a51c77007319 423 * @param NewState: new state of the SPIx peripheral.
mbed_official 52:a51c77007319 424 * This parameter can be: ENABLE or DISABLE.
mbed_official 52:a51c77007319 425 * @retval None
mbed_official 52:a51c77007319 426 */
mbed_official 52:a51c77007319 427 void SPI_Cmd(SPI_TypeDef* SPIx, FunctionalState NewState)
mbed_official 52:a51c77007319 428 {
mbed_official 52:a51c77007319 429 /* Check the parameters */
mbed_official 52:a51c77007319 430 assert_param(IS_SPI_ALL_PERIPH(SPIx));
mbed_official 52:a51c77007319 431 assert_param(IS_FUNCTIONAL_STATE(NewState));
mbed_official 52:a51c77007319 432 if (NewState != DISABLE)
mbed_official 52:a51c77007319 433 {
mbed_official 52:a51c77007319 434 /* Enable the selected SPI peripheral */
mbed_official 52:a51c77007319 435 SPIx->CR1 |= CR1_SPE_Set;
mbed_official 52:a51c77007319 436 }
mbed_official 52:a51c77007319 437 else
mbed_official 52:a51c77007319 438 {
mbed_official 52:a51c77007319 439 /* Disable the selected SPI peripheral */
mbed_official 52:a51c77007319 440 SPIx->CR1 &= CR1_SPE_Reset;
mbed_official 52:a51c77007319 441 }
mbed_official 52:a51c77007319 442 }
mbed_official 52:a51c77007319 443
mbed_official 52:a51c77007319 444 /**
mbed_official 52:a51c77007319 445 * @brief Enables or disables the specified SPI peripheral (in I2S mode).
mbed_official 52:a51c77007319 446 * @param SPIx: where x can be 2 or 3 to select the SPI peripheral.
mbed_official 52:a51c77007319 447 * @param NewState: new state of the SPIx peripheral.
mbed_official 52:a51c77007319 448 * This parameter can be: ENABLE or DISABLE.
mbed_official 52:a51c77007319 449 * @retval None
mbed_official 52:a51c77007319 450 */
mbed_official 52:a51c77007319 451 void I2S_Cmd(SPI_TypeDef* SPIx, FunctionalState NewState)
mbed_official 52:a51c77007319 452 {
mbed_official 52:a51c77007319 453 /* Check the parameters */
mbed_official 52:a51c77007319 454 assert_param(IS_SPI_23_PERIPH(SPIx));
mbed_official 52:a51c77007319 455 assert_param(IS_FUNCTIONAL_STATE(NewState));
mbed_official 52:a51c77007319 456 if (NewState != DISABLE)
mbed_official 52:a51c77007319 457 {
mbed_official 52:a51c77007319 458 /* Enable the selected SPI peripheral (in I2S mode) */
mbed_official 52:a51c77007319 459 SPIx->I2SCFGR |= I2SCFGR_I2SE_Set;
mbed_official 52:a51c77007319 460 }
mbed_official 52:a51c77007319 461 else
mbed_official 52:a51c77007319 462 {
mbed_official 52:a51c77007319 463 /* Disable the selected SPI peripheral (in I2S mode) */
mbed_official 52:a51c77007319 464 SPIx->I2SCFGR &= I2SCFGR_I2SE_Reset;
mbed_official 52:a51c77007319 465 }
mbed_official 52:a51c77007319 466 }
mbed_official 52:a51c77007319 467
mbed_official 52:a51c77007319 468 /**
mbed_official 52:a51c77007319 469 * @brief Enables or disables the specified SPI/I2S interrupts.
mbed_official 52:a51c77007319 470 * @param SPIx: where x can be
mbed_official 52:a51c77007319 471 * - 1, 2 or 3 in SPI mode
mbed_official 52:a51c77007319 472 * - 2 or 3 in I2S mode
mbed_official 52:a51c77007319 473 * @param SPI_I2S_IT: specifies the SPI/I2S interrupt source to be enabled or disabled.
mbed_official 52:a51c77007319 474 * This parameter can be one of the following values:
mbed_official 52:a51c77007319 475 * @arg SPI_I2S_IT_TXE: Tx buffer empty interrupt mask
mbed_official 52:a51c77007319 476 * @arg SPI_I2S_IT_RXNE: Rx buffer not empty interrupt mask
mbed_official 52:a51c77007319 477 * @arg SPI_I2S_IT_ERR: Error interrupt mask
mbed_official 52:a51c77007319 478 * @param NewState: new state of the specified SPI/I2S interrupt.
mbed_official 52:a51c77007319 479 * This parameter can be: ENABLE or DISABLE.
mbed_official 52:a51c77007319 480 * @retval None
mbed_official 52:a51c77007319 481 */
mbed_official 52:a51c77007319 482 void SPI_I2S_ITConfig(SPI_TypeDef* SPIx, uint8_t SPI_I2S_IT, FunctionalState NewState)
mbed_official 52:a51c77007319 483 {
mbed_official 52:a51c77007319 484 uint16_t itpos = 0, itmask = 0 ;
mbed_official 52:a51c77007319 485 /* Check the parameters */
mbed_official 52:a51c77007319 486 assert_param(IS_SPI_ALL_PERIPH(SPIx));
mbed_official 52:a51c77007319 487 assert_param(IS_FUNCTIONAL_STATE(NewState));
mbed_official 52:a51c77007319 488 assert_param(IS_SPI_I2S_CONFIG_IT(SPI_I2S_IT));
mbed_official 52:a51c77007319 489
mbed_official 52:a51c77007319 490 /* Get the SPI/I2S IT index */
mbed_official 52:a51c77007319 491 itpos = SPI_I2S_IT >> 4;
mbed_official 52:a51c77007319 492
mbed_official 52:a51c77007319 493 /* Set the IT mask */
mbed_official 52:a51c77007319 494 itmask = (uint16_t)1 << (uint16_t)itpos;
mbed_official 52:a51c77007319 495
mbed_official 52:a51c77007319 496 if (NewState != DISABLE)
mbed_official 52:a51c77007319 497 {
mbed_official 52:a51c77007319 498 /* Enable the selected SPI/I2S interrupt */
mbed_official 52:a51c77007319 499 SPIx->CR2 |= itmask;
mbed_official 52:a51c77007319 500 }
mbed_official 52:a51c77007319 501 else
mbed_official 52:a51c77007319 502 {
mbed_official 52:a51c77007319 503 /* Disable the selected SPI/I2S interrupt */
mbed_official 52:a51c77007319 504 SPIx->CR2 &= (uint16_t)~itmask;
mbed_official 52:a51c77007319 505 }
mbed_official 52:a51c77007319 506 }
mbed_official 52:a51c77007319 507
mbed_official 52:a51c77007319 508 /**
mbed_official 52:a51c77007319 509 * @brief Enables or disables the SPIx/I2Sx DMA interface.
mbed_official 52:a51c77007319 510 * @param SPIx: where x can be
mbed_official 52:a51c77007319 511 * - 1, 2 or 3 in SPI mode
mbed_official 52:a51c77007319 512 * - 2 or 3 in I2S mode
mbed_official 52:a51c77007319 513 * @param SPI_I2S_DMAReq: specifies the SPI/I2S DMA transfer request to be enabled or disabled.
mbed_official 52:a51c77007319 514 * This parameter can be any combination of the following values:
mbed_official 52:a51c77007319 515 * @arg SPI_I2S_DMAReq_Tx: Tx buffer DMA transfer request
mbed_official 52:a51c77007319 516 * @arg SPI_I2S_DMAReq_Rx: Rx buffer DMA transfer request
mbed_official 52:a51c77007319 517 * @param NewState: new state of the selected SPI/I2S DMA transfer request.
mbed_official 52:a51c77007319 518 * This parameter can be: ENABLE or DISABLE.
mbed_official 52:a51c77007319 519 * @retval None
mbed_official 52:a51c77007319 520 */
mbed_official 52:a51c77007319 521 void SPI_I2S_DMACmd(SPI_TypeDef* SPIx, uint16_t SPI_I2S_DMAReq, FunctionalState NewState)
mbed_official 52:a51c77007319 522 {
mbed_official 52:a51c77007319 523 /* Check the parameters */
mbed_official 52:a51c77007319 524 assert_param(IS_SPI_ALL_PERIPH(SPIx));
mbed_official 52:a51c77007319 525 assert_param(IS_FUNCTIONAL_STATE(NewState));
mbed_official 52:a51c77007319 526 assert_param(IS_SPI_I2S_DMAREQ(SPI_I2S_DMAReq));
mbed_official 52:a51c77007319 527 if (NewState != DISABLE)
mbed_official 52:a51c77007319 528 {
mbed_official 52:a51c77007319 529 /* Enable the selected SPI/I2S DMA requests */
mbed_official 52:a51c77007319 530 SPIx->CR2 |= SPI_I2S_DMAReq;
mbed_official 52:a51c77007319 531 }
mbed_official 52:a51c77007319 532 else
mbed_official 52:a51c77007319 533 {
mbed_official 52:a51c77007319 534 /* Disable the selected SPI/I2S DMA requests */
mbed_official 52:a51c77007319 535 SPIx->CR2 &= (uint16_t)~SPI_I2S_DMAReq;
mbed_official 52:a51c77007319 536 }
mbed_official 52:a51c77007319 537 }
mbed_official 52:a51c77007319 538
mbed_official 52:a51c77007319 539 /**
mbed_official 52:a51c77007319 540 * @brief Transmits a Data through the SPIx/I2Sx peripheral.
mbed_official 52:a51c77007319 541 * @param SPIx: where x can be
mbed_official 52:a51c77007319 542 * - 1, 2 or 3 in SPI mode
mbed_official 52:a51c77007319 543 * - 2 or 3 in I2S mode
mbed_official 52:a51c77007319 544 * @param Data : Data to be transmitted.
mbed_official 52:a51c77007319 545 * @retval None
mbed_official 52:a51c77007319 546 */
mbed_official 52:a51c77007319 547 void SPI_I2S_SendData(SPI_TypeDef* SPIx, uint16_t Data)
mbed_official 52:a51c77007319 548 {
mbed_official 52:a51c77007319 549 /* Check the parameters */
mbed_official 52:a51c77007319 550 assert_param(IS_SPI_ALL_PERIPH(SPIx));
mbed_official 52:a51c77007319 551
mbed_official 52:a51c77007319 552 /* Write in the DR register the data to be sent */
mbed_official 52:a51c77007319 553 SPIx->DR = Data;
mbed_official 52:a51c77007319 554 }
mbed_official 52:a51c77007319 555
mbed_official 52:a51c77007319 556 /**
mbed_official 52:a51c77007319 557 * @brief Returns the most recent received data by the SPIx/I2Sx peripheral.
mbed_official 52:a51c77007319 558 * @param SPIx: where x can be
mbed_official 52:a51c77007319 559 * - 1, 2 or 3 in SPI mode
mbed_official 52:a51c77007319 560 * - 2 or 3 in I2S mode
mbed_official 52:a51c77007319 561 * @retval The value of the received data.
mbed_official 52:a51c77007319 562 */
mbed_official 52:a51c77007319 563 uint16_t SPI_I2S_ReceiveData(SPI_TypeDef* SPIx)
mbed_official 52:a51c77007319 564 {
mbed_official 52:a51c77007319 565 /* Check the parameters */
mbed_official 52:a51c77007319 566 assert_param(IS_SPI_ALL_PERIPH(SPIx));
mbed_official 52:a51c77007319 567
mbed_official 52:a51c77007319 568 /* Return the data in the DR register */
mbed_official 52:a51c77007319 569 return SPIx->DR;
mbed_official 52:a51c77007319 570 }
mbed_official 52:a51c77007319 571
mbed_official 52:a51c77007319 572 /**
mbed_official 52:a51c77007319 573 * @brief Configures internally by software the NSS pin for the selected SPI.
mbed_official 52:a51c77007319 574 * @param SPIx: where x can be 1, 2 or 3 to select the SPI peripheral.
mbed_official 52:a51c77007319 575 * @param SPI_NSSInternalSoft: specifies the SPI NSS internal state.
mbed_official 52:a51c77007319 576 * This parameter can be one of the following values:
mbed_official 52:a51c77007319 577 * @arg SPI_NSSInternalSoft_Set: Set NSS pin internally
mbed_official 52:a51c77007319 578 * @arg SPI_NSSInternalSoft_Reset: Reset NSS pin internally
mbed_official 52:a51c77007319 579 * @retval None
mbed_official 52:a51c77007319 580 */
mbed_official 52:a51c77007319 581 void SPI_NSSInternalSoftwareConfig(SPI_TypeDef* SPIx, uint16_t SPI_NSSInternalSoft)
mbed_official 52:a51c77007319 582 {
mbed_official 52:a51c77007319 583 /* Check the parameters */
mbed_official 52:a51c77007319 584 assert_param(IS_SPI_ALL_PERIPH(SPIx));
mbed_official 52:a51c77007319 585 assert_param(IS_SPI_NSS_INTERNAL(SPI_NSSInternalSoft));
mbed_official 52:a51c77007319 586 if (SPI_NSSInternalSoft != SPI_NSSInternalSoft_Reset)
mbed_official 52:a51c77007319 587 {
mbed_official 52:a51c77007319 588 /* Set NSS pin internally by software */
mbed_official 52:a51c77007319 589 SPIx->CR1 |= SPI_NSSInternalSoft_Set;
mbed_official 52:a51c77007319 590 }
mbed_official 52:a51c77007319 591 else
mbed_official 52:a51c77007319 592 {
mbed_official 52:a51c77007319 593 /* Reset NSS pin internally by software */
mbed_official 52:a51c77007319 594 SPIx->CR1 &= SPI_NSSInternalSoft_Reset;
mbed_official 52:a51c77007319 595 }
mbed_official 52:a51c77007319 596 }
mbed_official 52:a51c77007319 597
mbed_official 52:a51c77007319 598 /**
mbed_official 52:a51c77007319 599 * @brief Enables or disables the SS output for the selected SPI.
mbed_official 52:a51c77007319 600 * @param SPIx: where x can be 1, 2 or 3 to select the SPI peripheral.
mbed_official 52:a51c77007319 601 * @param NewState: new state of the SPIx SS output.
mbed_official 52:a51c77007319 602 * This parameter can be: ENABLE or DISABLE.
mbed_official 52:a51c77007319 603 * @retval None
mbed_official 52:a51c77007319 604 */
mbed_official 52:a51c77007319 605 void SPI_SSOutputCmd(SPI_TypeDef* SPIx, FunctionalState NewState)
mbed_official 52:a51c77007319 606 {
mbed_official 52:a51c77007319 607 /* Check the parameters */
mbed_official 52:a51c77007319 608 assert_param(IS_SPI_ALL_PERIPH(SPIx));
mbed_official 52:a51c77007319 609 assert_param(IS_FUNCTIONAL_STATE(NewState));
mbed_official 52:a51c77007319 610 if (NewState != DISABLE)
mbed_official 52:a51c77007319 611 {
mbed_official 52:a51c77007319 612 /* Enable the selected SPI SS output */
mbed_official 52:a51c77007319 613 SPIx->CR2 |= CR2_SSOE_Set;
mbed_official 52:a51c77007319 614 }
mbed_official 52:a51c77007319 615 else
mbed_official 52:a51c77007319 616 {
mbed_official 52:a51c77007319 617 /* Disable the selected SPI SS output */
mbed_official 52:a51c77007319 618 SPIx->CR2 &= CR2_SSOE_Reset;
mbed_official 52:a51c77007319 619 }
mbed_official 52:a51c77007319 620 }
mbed_official 52:a51c77007319 621
mbed_official 52:a51c77007319 622 /**
mbed_official 52:a51c77007319 623 * @brief Configures the data size for the selected SPI.
mbed_official 52:a51c77007319 624 * @param SPIx: where x can be 1, 2 or 3 to select the SPI peripheral.
mbed_official 52:a51c77007319 625 * @param SPI_DataSize: specifies the SPI data size.
mbed_official 52:a51c77007319 626 * This parameter can be one of the following values:
mbed_official 52:a51c77007319 627 * @arg SPI_DataSize_16b: Set data frame format to 16bit
mbed_official 52:a51c77007319 628 * @arg SPI_DataSize_8b: Set data frame format to 8bit
mbed_official 52:a51c77007319 629 * @retval None
mbed_official 52:a51c77007319 630 */
mbed_official 52:a51c77007319 631 void SPI_DataSizeConfig(SPI_TypeDef* SPIx, uint16_t SPI_DataSize)
mbed_official 52:a51c77007319 632 {
mbed_official 52:a51c77007319 633 /* Check the parameters */
mbed_official 52:a51c77007319 634 assert_param(IS_SPI_ALL_PERIPH(SPIx));
mbed_official 52:a51c77007319 635 assert_param(IS_SPI_DATASIZE(SPI_DataSize));
mbed_official 52:a51c77007319 636 /* Clear DFF bit */
mbed_official 52:a51c77007319 637 SPIx->CR1 &= (uint16_t)~SPI_DataSize_16b;
mbed_official 52:a51c77007319 638 /* Set new DFF bit value */
mbed_official 52:a51c77007319 639 SPIx->CR1 |= SPI_DataSize;
mbed_official 52:a51c77007319 640 }
mbed_official 52:a51c77007319 641
mbed_official 52:a51c77007319 642 /**
mbed_official 52:a51c77007319 643 * @brief Transmit the SPIx CRC value.
mbed_official 52:a51c77007319 644 * @param SPIx: where x can be 1, 2 or 3 to select the SPI peripheral.
mbed_official 52:a51c77007319 645 * @retval None
mbed_official 52:a51c77007319 646 */
mbed_official 52:a51c77007319 647 void SPI_TransmitCRC(SPI_TypeDef* SPIx)
mbed_official 52:a51c77007319 648 {
mbed_official 52:a51c77007319 649 /* Check the parameters */
mbed_official 52:a51c77007319 650 assert_param(IS_SPI_ALL_PERIPH(SPIx));
mbed_official 52:a51c77007319 651
mbed_official 52:a51c77007319 652 /* Enable the selected SPI CRC transmission */
mbed_official 52:a51c77007319 653 SPIx->CR1 |= CR1_CRCNext_Set;
mbed_official 52:a51c77007319 654 }
mbed_official 52:a51c77007319 655
mbed_official 52:a51c77007319 656 /**
mbed_official 52:a51c77007319 657 * @brief Enables or disables the CRC value calculation of the transferred bytes.
mbed_official 52:a51c77007319 658 * @param SPIx: where x can be 1, 2 or 3 to select the SPI peripheral.
mbed_official 52:a51c77007319 659 * @param NewState: new state of the SPIx CRC value calculation.
mbed_official 52:a51c77007319 660 * This parameter can be: ENABLE or DISABLE.
mbed_official 52:a51c77007319 661 * @retval None
mbed_official 52:a51c77007319 662 */
mbed_official 52:a51c77007319 663 void SPI_CalculateCRC(SPI_TypeDef* SPIx, FunctionalState NewState)
mbed_official 52:a51c77007319 664 {
mbed_official 52:a51c77007319 665 /* Check the parameters */
mbed_official 52:a51c77007319 666 assert_param(IS_SPI_ALL_PERIPH(SPIx));
mbed_official 52:a51c77007319 667 assert_param(IS_FUNCTIONAL_STATE(NewState));
mbed_official 52:a51c77007319 668 if (NewState != DISABLE)
mbed_official 52:a51c77007319 669 {
mbed_official 52:a51c77007319 670 /* Enable the selected SPI CRC calculation */
mbed_official 52:a51c77007319 671 SPIx->CR1 |= CR1_CRCEN_Set;
mbed_official 52:a51c77007319 672 }
mbed_official 52:a51c77007319 673 else
mbed_official 52:a51c77007319 674 {
mbed_official 52:a51c77007319 675 /* Disable the selected SPI CRC calculation */
mbed_official 52:a51c77007319 676 SPIx->CR1 &= CR1_CRCEN_Reset;
mbed_official 52:a51c77007319 677 }
mbed_official 52:a51c77007319 678 }
mbed_official 52:a51c77007319 679
mbed_official 52:a51c77007319 680 /**
mbed_official 52:a51c77007319 681 * @brief Returns the transmit or the receive CRC register value for the specified SPI.
mbed_official 52:a51c77007319 682 * @param SPIx: where x can be 1, 2 or 3 to select the SPI peripheral.
mbed_official 52:a51c77007319 683 * @param SPI_CRC: specifies the CRC register to be read.
mbed_official 52:a51c77007319 684 * This parameter can be one of the following values:
mbed_official 52:a51c77007319 685 * @arg SPI_CRC_Tx: Selects Tx CRC register
mbed_official 52:a51c77007319 686 * @arg SPI_CRC_Rx: Selects Rx CRC register
mbed_official 52:a51c77007319 687 * @retval The selected CRC register value..
mbed_official 52:a51c77007319 688 */
mbed_official 52:a51c77007319 689 uint16_t SPI_GetCRC(SPI_TypeDef* SPIx, uint8_t SPI_CRC)
mbed_official 52:a51c77007319 690 {
mbed_official 52:a51c77007319 691 uint16_t crcreg = 0;
mbed_official 52:a51c77007319 692 /* Check the parameters */
mbed_official 52:a51c77007319 693 assert_param(IS_SPI_ALL_PERIPH(SPIx));
mbed_official 52:a51c77007319 694 assert_param(IS_SPI_CRC(SPI_CRC));
mbed_official 52:a51c77007319 695 if (SPI_CRC != SPI_CRC_Rx)
mbed_official 52:a51c77007319 696 {
mbed_official 52:a51c77007319 697 /* Get the Tx CRC register */
mbed_official 52:a51c77007319 698 crcreg = SPIx->TXCRCR;
mbed_official 52:a51c77007319 699 }
mbed_official 52:a51c77007319 700 else
mbed_official 52:a51c77007319 701 {
mbed_official 52:a51c77007319 702 /* Get the Rx CRC register */
mbed_official 52:a51c77007319 703 crcreg = SPIx->RXCRCR;
mbed_official 52:a51c77007319 704 }
mbed_official 52:a51c77007319 705 /* Return the selected CRC register */
mbed_official 52:a51c77007319 706 return crcreg;
mbed_official 52:a51c77007319 707 }
mbed_official 52:a51c77007319 708
mbed_official 52:a51c77007319 709 /**
mbed_official 52:a51c77007319 710 * @brief Returns the CRC Polynomial register value for the specified SPI.
mbed_official 52:a51c77007319 711 * @param SPIx: where x can be 1, 2 or 3 to select the SPI peripheral.
mbed_official 52:a51c77007319 712 * @retval The CRC Polynomial register value.
mbed_official 52:a51c77007319 713 */
mbed_official 52:a51c77007319 714 uint16_t SPI_GetCRCPolynomial(SPI_TypeDef* SPIx)
mbed_official 52:a51c77007319 715 {
mbed_official 52:a51c77007319 716 /* Check the parameters */
mbed_official 52:a51c77007319 717 assert_param(IS_SPI_ALL_PERIPH(SPIx));
mbed_official 52:a51c77007319 718
mbed_official 52:a51c77007319 719 /* Return the CRC polynomial register */
mbed_official 52:a51c77007319 720 return SPIx->CRCPR;
mbed_official 52:a51c77007319 721 }
mbed_official 52:a51c77007319 722
mbed_official 52:a51c77007319 723 /**
mbed_official 52:a51c77007319 724 * @brief Selects the data transfer direction in bi-directional mode for the specified SPI.
mbed_official 52:a51c77007319 725 * @param SPIx: where x can be 1, 2 or 3 to select the SPI peripheral.
mbed_official 52:a51c77007319 726 * @param SPI_Direction: specifies the data transfer direction in bi-directional mode.
mbed_official 52:a51c77007319 727 * This parameter can be one of the following values:
mbed_official 52:a51c77007319 728 * @arg SPI_Direction_Tx: Selects Tx transmission direction
mbed_official 52:a51c77007319 729 * @arg SPI_Direction_Rx: Selects Rx receive direction
mbed_official 52:a51c77007319 730 * @retval None
mbed_official 52:a51c77007319 731 */
mbed_official 52:a51c77007319 732 void SPI_BiDirectionalLineConfig(SPI_TypeDef* SPIx, uint16_t SPI_Direction)
mbed_official 52:a51c77007319 733 {
mbed_official 52:a51c77007319 734 /* Check the parameters */
mbed_official 52:a51c77007319 735 assert_param(IS_SPI_ALL_PERIPH(SPIx));
mbed_official 52:a51c77007319 736 assert_param(IS_SPI_DIRECTION(SPI_Direction));
mbed_official 52:a51c77007319 737 if (SPI_Direction == SPI_Direction_Tx)
mbed_official 52:a51c77007319 738 {
mbed_official 52:a51c77007319 739 /* Set the Tx only mode */
mbed_official 52:a51c77007319 740 SPIx->CR1 |= SPI_Direction_Tx;
mbed_official 52:a51c77007319 741 }
mbed_official 52:a51c77007319 742 else
mbed_official 52:a51c77007319 743 {
mbed_official 52:a51c77007319 744 /* Set the Rx only mode */
mbed_official 52:a51c77007319 745 SPIx->CR1 &= SPI_Direction_Rx;
mbed_official 52:a51c77007319 746 }
mbed_official 52:a51c77007319 747 }
mbed_official 52:a51c77007319 748
mbed_official 52:a51c77007319 749 /**
mbed_official 52:a51c77007319 750 * @brief Checks whether the specified SPI/I2S flag is set or not.
mbed_official 52:a51c77007319 751 * @param SPIx: where x can be
mbed_official 52:a51c77007319 752 * - 1, 2 or 3 in SPI mode
mbed_official 52:a51c77007319 753 * - 2 or 3 in I2S mode
mbed_official 52:a51c77007319 754 * @param SPI_I2S_FLAG: specifies the SPI/I2S flag to check.
mbed_official 52:a51c77007319 755 * This parameter can be one of the following values:
mbed_official 52:a51c77007319 756 * @arg SPI_I2S_FLAG_TXE: Transmit buffer empty flag.
mbed_official 52:a51c77007319 757 * @arg SPI_I2S_FLAG_RXNE: Receive buffer not empty flag.
mbed_official 52:a51c77007319 758 * @arg SPI_I2S_FLAG_BSY: Busy flag.
mbed_official 52:a51c77007319 759 * @arg SPI_I2S_FLAG_OVR: Overrun flag.
mbed_official 52:a51c77007319 760 * @arg SPI_FLAG_MODF: Mode Fault flag.
mbed_official 52:a51c77007319 761 * @arg SPI_FLAG_CRCERR: CRC Error flag.
mbed_official 52:a51c77007319 762 * @arg I2S_FLAG_UDR: Underrun Error flag.
mbed_official 52:a51c77007319 763 * @arg I2S_FLAG_CHSIDE: Channel Side flag.
mbed_official 52:a51c77007319 764 * @retval The new state of SPI_I2S_FLAG (SET or RESET).
mbed_official 52:a51c77007319 765 */
mbed_official 52:a51c77007319 766 FlagStatus SPI_I2S_GetFlagStatus(SPI_TypeDef* SPIx, uint16_t SPI_I2S_FLAG)
mbed_official 52:a51c77007319 767 {
mbed_official 52:a51c77007319 768 FlagStatus bitstatus = RESET;
mbed_official 52:a51c77007319 769 /* Check the parameters */
mbed_official 52:a51c77007319 770 assert_param(IS_SPI_ALL_PERIPH(SPIx));
mbed_official 52:a51c77007319 771 assert_param(IS_SPI_I2S_GET_FLAG(SPI_I2S_FLAG));
mbed_official 52:a51c77007319 772 /* Check the status of the specified SPI/I2S flag */
mbed_official 52:a51c77007319 773 if ((SPIx->SR & SPI_I2S_FLAG) != (uint16_t)RESET)
mbed_official 52:a51c77007319 774 {
mbed_official 52:a51c77007319 775 /* SPI_I2S_FLAG is set */
mbed_official 52:a51c77007319 776 bitstatus = SET;
mbed_official 52:a51c77007319 777 }
mbed_official 52:a51c77007319 778 else
mbed_official 52:a51c77007319 779 {
mbed_official 52:a51c77007319 780 /* SPI_I2S_FLAG is reset */
mbed_official 52:a51c77007319 781 bitstatus = RESET;
mbed_official 52:a51c77007319 782 }
mbed_official 52:a51c77007319 783 /* Return the SPI_I2S_FLAG status */
mbed_official 52:a51c77007319 784 return bitstatus;
mbed_official 52:a51c77007319 785 }
mbed_official 52:a51c77007319 786
mbed_official 52:a51c77007319 787 /**
mbed_official 52:a51c77007319 788 * @brief Clears the SPIx CRC Error (CRCERR) flag.
mbed_official 52:a51c77007319 789 * @param SPIx: where x can be
mbed_official 52:a51c77007319 790 * - 1, 2 or 3 in SPI mode
mbed_official 52:a51c77007319 791 * @param SPI_I2S_FLAG: specifies the SPI flag to clear.
mbed_official 52:a51c77007319 792 * This function clears only CRCERR flag.
mbed_official 52:a51c77007319 793 * @note
mbed_official 52:a51c77007319 794 * - OVR (OverRun error) flag is cleared by software sequence: a read
mbed_official 52:a51c77007319 795 * operation to SPI_DR register (SPI_I2S_ReceiveData()) followed by a read
mbed_official 52:a51c77007319 796 * operation to SPI_SR register (SPI_I2S_GetFlagStatus()).
mbed_official 52:a51c77007319 797 * - UDR (UnderRun error) flag is cleared by a read operation to
mbed_official 52:a51c77007319 798 * SPI_SR register (SPI_I2S_GetFlagStatus()).
mbed_official 52:a51c77007319 799 * - MODF (Mode Fault) flag is cleared by software sequence: a read/write
mbed_official 52:a51c77007319 800 * operation to SPI_SR register (SPI_I2S_GetFlagStatus()) followed by a
mbed_official 52:a51c77007319 801 * write operation to SPI_CR1 register (SPI_Cmd() to enable the SPI).
mbed_official 52:a51c77007319 802 * @retval None
mbed_official 52:a51c77007319 803 */
mbed_official 52:a51c77007319 804 void SPI_I2S_ClearFlag(SPI_TypeDef* SPIx, uint16_t SPI_I2S_FLAG)
mbed_official 52:a51c77007319 805 {
mbed_official 52:a51c77007319 806 /* Check the parameters */
mbed_official 52:a51c77007319 807 assert_param(IS_SPI_ALL_PERIPH(SPIx));
mbed_official 52:a51c77007319 808 assert_param(IS_SPI_I2S_CLEAR_FLAG(SPI_I2S_FLAG));
mbed_official 52:a51c77007319 809
mbed_official 52:a51c77007319 810 /* Clear the selected SPI CRC Error (CRCERR) flag */
mbed_official 52:a51c77007319 811 SPIx->SR = (uint16_t)~SPI_I2S_FLAG;
mbed_official 52:a51c77007319 812 }
mbed_official 52:a51c77007319 813
mbed_official 52:a51c77007319 814 /**
mbed_official 52:a51c77007319 815 * @brief Checks whether the specified SPI/I2S interrupt has occurred or not.
mbed_official 52:a51c77007319 816 * @param SPIx: where x can be
mbed_official 52:a51c77007319 817 * - 1, 2 or 3 in SPI mode
mbed_official 52:a51c77007319 818 * - 2 or 3 in I2S mode
mbed_official 52:a51c77007319 819 * @param SPI_I2S_IT: specifies the SPI/I2S interrupt source to check.
mbed_official 52:a51c77007319 820 * This parameter can be one of the following values:
mbed_official 52:a51c77007319 821 * @arg SPI_I2S_IT_TXE: Transmit buffer empty interrupt.
mbed_official 52:a51c77007319 822 * @arg SPI_I2S_IT_RXNE: Receive buffer not empty interrupt.
mbed_official 52:a51c77007319 823 * @arg SPI_I2S_IT_OVR: Overrun interrupt.
mbed_official 52:a51c77007319 824 * @arg SPI_IT_MODF: Mode Fault interrupt.
mbed_official 52:a51c77007319 825 * @arg SPI_IT_CRCERR: CRC Error interrupt.
mbed_official 52:a51c77007319 826 * @arg I2S_IT_UDR: Underrun Error interrupt.
mbed_official 52:a51c77007319 827 * @retval The new state of SPI_I2S_IT (SET or RESET).
mbed_official 52:a51c77007319 828 */
mbed_official 52:a51c77007319 829 ITStatus SPI_I2S_GetITStatus(SPI_TypeDef* SPIx, uint8_t SPI_I2S_IT)
mbed_official 52:a51c77007319 830 {
mbed_official 52:a51c77007319 831 ITStatus bitstatus = RESET;
mbed_official 52:a51c77007319 832 uint16_t itpos = 0, itmask = 0, enablestatus = 0;
mbed_official 52:a51c77007319 833
mbed_official 52:a51c77007319 834 /* Check the parameters */
mbed_official 52:a51c77007319 835 assert_param(IS_SPI_ALL_PERIPH(SPIx));
mbed_official 52:a51c77007319 836 assert_param(IS_SPI_I2S_GET_IT(SPI_I2S_IT));
mbed_official 52:a51c77007319 837
mbed_official 52:a51c77007319 838 /* Get the SPI/I2S IT index */
mbed_official 52:a51c77007319 839 itpos = 0x01 << (SPI_I2S_IT & 0x0F);
mbed_official 52:a51c77007319 840
mbed_official 52:a51c77007319 841 /* Get the SPI/I2S IT mask */
mbed_official 52:a51c77007319 842 itmask = SPI_I2S_IT >> 4;
mbed_official 52:a51c77007319 843
mbed_official 52:a51c77007319 844 /* Set the IT mask */
mbed_official 52:a51c77007319 845 itmask = 0x01 << itmask;
mbed_official 52:a51c77007319 846
mbed_official 52:a51c77007319 847 /* Get the SPI_I2S_IT enable bit status */
mbed_official 52:a51c77007319 848 enablestatus = (SPIx->CR2 & itmask) ;
mbed_official 52:a51c77007319 849
mbed_official 52:a51c77007319 850 /* Check the status of the specified SPI/I2S interrupt */
mbed_official 52:a51c77007319 851 if (((SPIx->SR & itpos) != (uint16_t)RESET) && enablestatus)
mbed_official 52:a51c77007319 852 {
mbed_official 52:a51c77007319 853 /* SPI_I2S_IT is set */
mbed_official 52:a51c77007319 854 bitstatus = SET;
mbed_official 52:a51c77007319 855 }
mbed_official 52:a51c77007319 856 else
mbed_official 52:a51c77007319 857 {
mbed_official 52:a51c77007319 858 /* SPI_I2S_IT is reset */
mbed_official 52:a51c77007319 859 bitstatus = RESET;
mbed_official 52:a51c77007319 860 }
mbed_official 52:a51c77007319 861 /* Return the SPI_I2S_IT status */
mbed_official 52:a51c77007319 862 return bitstatus;
mbed_official 52:a51c77007319 863 }
mbed_official 52:a51c77007319 864
mbed_official 52:a51c77007319 865 /**
mbed_official 52:a51c77007319 866 * @brief Clears the SPIx CRC Error (CRCERR) interrupt pending bit.
mbed_official 52:a51c77007319 867 * @param SPIx: where x can be
mbed_official 52:a51c77007319 868 * - 1, 2 or 3 in SPI mode
mbed_official 52:a51c77007319 869 * @param SPI_I2S_IT: specifies the SPI interrupt pending bit to clear.
mbed_official 52:a51c77007319 870 * This function clears only CRCERR interrupt pending bit.
mbed_official 52:a51c77007319 871 * @note
mbed_official 52:a51c77007319 872 * - OVR (OverRun Error) interrupt pending bit is cleared by software
mbed_official 52:a51c77007319 873 * sequence: a read operation to SPI_DR register (SPI_I2S_ReceiveData())
mbed_official 52:a51c77007319 874 * followed by a read operation to SPI_SR register (SPI_I2S_GetITStatus()).
mbed_official 52:a51c77007319 875 * - UDR (UnderRun Error) interrupt pending bit is cleared by a read
mbed_official 52:a51c77007319 876 * operation to SPI_SR register (SPI_I2S_GetITStatus()).
mbed_official 52:a51c77007319 877 * - MODF (Mode Fault) interrupt pending bit is cleared by software sequence:
mbed_official 52:a51c77007319 878 * a read/write operation to SPI_SR register (SPI_I2S_GetITStatus())
mbed_official 52:a51c77007319 879 * followed by a write operation to SPI_CR1 register (SPI_Cmd() to enable
mbed_official 52:a51c77007319 880 * the SPI).
mbed_official 52:a51c77007319 881 * @retval None
mbed_official 52:a51c77007319 882 */
mbed_official 52:a51c77007319 883 void SPI_I2S_ClearITPendingBit(SPI_TypeDef* SPIx, uint8_t SPI_I2S_IT)
mbed_official 52:a51c77007319 884 {
mbed_official 52:a51c77007319 885 uint16_t itpos = 0;
mbed_official 52:a51c77007319 886 /* Check the parameters */
mbed_official 52:a51c77007319 887 assert_param(IS_SPI_ALL_PERIPH(SPIx));
mbed_official 52:a51c77007319 888 assert_param(IS_SPI_I2S_CLEAR_IT(SPI_I2S_IT));
mbed_official 52:a51c77007319 889
mbed_official 52:a51c77007319 890 /* Get the SPI IT index */
mbed_official 52:a51c77007319 891 itpos = 0x01 << (SPI_I2S_IT & 0x0F);
mbed_official 52:a51c77007319 892
mbed_official 52:a51c77007319 893 /* Clear the selected SPI CRC Error (CRCERR) interrupt pending bit */
mbed_official 52:a51c77007319 894 SPIx->SR = (uint16_t)~itpos;
mbed_official 52:a51c77007319 895 }
mbed_official 52:a51c77007319 896 /**
mbed_official 52:a51c77007319 897 * @}
mbed_official 52:a51c77007319 898 */
mbed_official 52:a51c77007319 899
mbed_official 52:a51c77007319 900 /**
mbed_official 52:a51c77007319 901 * @}
mbed_official 52:a51c77007319 902 */
mbed_official 52:a51c77007319 903
mbed_official 52:a51c77007319 904 /**
mbed_official 52:a51c77007319 905 * @}
mbed_official 52:a51c77007319 906 */
mbed_official 52:a51c77007319 907
mbed_official 52:a51c77007319 908 /******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/