mbed library sources
Dependents: frdm_kl05z_gpio_test
Fork of mbed-src by
targets/cmsis/TARGET_STM/TARGET_NUCLEO_F103RB/stm32f10x_sdio.c@52:a51c77007319, 2013-12-02 (annotated)
- Committer:
- mbed_official
- Date:
- Mon Dec 02 11:30:05 2013 +0000
- Revision:
- 52:a51c77007319
- Child:
- 70:c1fbde68b492
Synchronized with git revision 49df530ae72ce97ccc773d1f2c13b38e868e6abd
Full URL: https://github.com/mbedmicro/mbed/commit/49df530ae72ce97ccc773d1f2c13b38e868e6abd/
Add STMicroelectronics NUCLEO_F103RB target
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
mbed_official | 52:a51c77007319 | 1 | /** |
mbed_official | 52:a51c77007319 | 2 | ****************************************************************************** |
mbed_official | 52:a51c77007319 | 3 | * @file stm32f10x_sdio.c |
mbed_official | 52:a51c77007319 | 4 | * @author MCD Application Team |
mbed_official | 52:a51c77007319 | 5 | * @version V3.5.0 |
mbed_official | 52:a51c77007319 | 6 | * @date 11-March-2011 |
mbed_official | 52:a51c77007319 | 7 | * @brief This file provides all the SDIO firmware functions. |
mbed_official | 52:a51c77007319 | 8 | ****************************************************************************** |
mbed_official | 52:a51c77007319 | 9 | * @attention |
mbed_official | 52:a51c77007319 | 10 | * |
mbed_official | 52:a51c77007319 | 11 | * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS |
mbed_official | 52:a51c77007319 | 12 | * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE |
mbed_official | 52:a51c77007319 | 13 | * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY |
mbed_official | 52:a51c77007319 | 14 | * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING |
mbed_official | 52:a51c77007319 | 15 | * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE |
mbed_official | 52:a51c77007319 | 16 | * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. |
mbed_official | 52:a51c77007319 | 17 | * |
mbed_official | 52:a51c77007319 | 18 | * <h2><center>© COPYRIGHT 2011 STMicroelectronics</center></h2> |
mbed_official | 52:a51c77007319 | 19 | ****************************************************************************** |
mbed_official | 52:a51c77007319 | 20 | */ |
mbed_official | 52:a51c77007319 | 21 | |
mbed_official | 52:a51c77007319 | 22 | /* Includes ------------------------------------------------------------------*/ |
mbed_official | 52:a51c77007319 | 23 | #include "stm32f10x_sdio.h" |
mbed_official | 52:a51c77007319 | 24 | #include "stm32f10x_rcc.h" |
mbed_official | 52:a51c77007319 | 25 | |
mbed_official | 52:a51c77007319 | 26 | /** @addtogroup STM32F10x_StdPeriph_Driver |
mbed_official | 52:a51c77007319 | 27 | * @{ |
mbed_official | 52:a51c77007319 | 28 | */ |
mbed_official | 52:a51c77007319 | 29 | |
mbed_official | 52:a51c77007319 | 30 | /** @defgroup SDIO |
mbed_official | 52:a51c77007319 | 31 | * @brief SDIO driver modules |
mbed_official | 52:a51c77007319 | 32 | * @{ |
mbed_official | 52:a51c77007319 | 33 | */ |
mbed_official | 52:a51c77007319 | 34 | |
mbed_official | 52:a51c77007319 | 35 | /** @defgroup SDIO_Private_TypesDefinitions |
mbed_official | 52:a51c77007319 | 36 | * @{ |
mbed_official | 52:a51c77007319 | 37 | */ |
mbed_official | 52:a51c77007319 | 38 | |
mbed_official | 52:a51c77007319 | 39 | /* ------------ SDIO registers bit address in the alias region ----------- */ |
mbed_official | 52:a51c77007319 | 40 | #define SDIO_OFFSET (SDIO_BASE - PERIPH_BASE) |
mbed_official | 52:a51c77007319 | 41 | |
mbed_official | 52:a51c77007319 | 42 | /* --- CLKCR Register ---*/ |
mbed_official | 52:a51c77007319 | 43 | |
mbed_official | 52:a51c77007319 | 44 | /* Alias word address of CLKEN bit */ |
mbed_official | 52:a51c77007319 | 45 | #define CLKCR_OFFSET (SDIO_OFFSET + 0x04) |
mbed_official | 52:a51c77007319 | 46 | #define CLKEN_BitNumber 0x08 |
mbed_official | 52:a51c77007319 | 47 | #define CLKCR_CLKEN_BB (PERIPH_BB_BASE + (CLKCR_OFFSET * 32) + (CLKEN_BitNumber * 4)) |
mbed_official | 52:a51c77007319 | 48 | |
mbed_official | 52:a51c77007319 | 49 | /* --- CMD Register ---*/ |
mbed_official | 52:a51c77007319 | 50 | |
mbed_official | 52:a51c77007319 | 51 | /* Alias word address of SDIOSUSPEND bit */ |
mbed_official | 52:a51c77007319 | 52 | #define CMD_OFFSET (SDIO_OFFSET + 0x0C) |
mbed_official | 52:a51c77007319 | 53 | #define SDIOSUSPEND_BitNumber 0x0B |
mbed_official | 52:a51c77007319 | 54 | #define CMD_SDIOSUSPEND_BB (PERIPH_BB_BASE + (CMD_OFFSET * 32) + (SDIOSUSPEND_BitNumber * 4)) |
mbed_official | 52:a51c77007319 | 55 | |
mbed_official | 52:a51c77007319 | 56 | /* Alias word address of ENCMDCOMPL bit */ |
mbed_official | 52:a51c77007319 | 57 | #define ENCMDCOMPL_BitNumber 0x0C |
mbed_official | 52:a51c77007319 | 58 | #define CMD_ENCMDCOMPL_BB (PERIPH_BB_BASE + (CMD_OFFSET * 32) + (ENCMDCOMPL_BitNumber * 4)) |
mbed_official | 52:a51c77007319 | 59 | |
mbed_official | 52:a51c77007319 | 60 | /* Alias word address of NIEN bit */ |
mbed_official | 52:a51c77007319 | 61 | #define NIEN_BitNumber 0x0D |
mbed_official | 52:a51c77007319 | 62 | #define CMD_NIEN_BB (PERIPH_BB_BASE + (CMD_OFFSET * 32) + (NIEN_BitNumber * 4)) |
mbed_official | 52:a51c77007319 | 63 | |
mbed_official | 52:a51c77007319 | 64 | /* Alias word address of ATACMD bit */ |
mbed_official | 52:a51c77007319 | 65 | #define ATACMD_BitNumber 0x0E |
mbed_official | 52:a51c77007319 | 66 | #define CMD_ATACMD_BB (PERIPH_BB_BASE + (CMD_OFFSET * 32) + (ATACMD_BitNumber * 4)) |
mbed_official | 52:a51c77007319 | 67 | |
mbed_official | 52:a51c77007319 | 68 | /* --- DCTRL Register ---*/ |
mbed_official | 52:a51c77007319 | 69 | |
mbed_official | 52:a51c77007319 | 70 | /* Alias word address of DMAEN bit */ |
mbed_official | 52:a51c77007319 | 71 | #define DCTRL_OFFSET (SDIO_OFFSET + 0x2C) |
mbed_official | 52:a51c77007319 | 72 | #define DMAEN_BitNumber 0x03 |
mbed_official | 52:a51c77007319 | 73 | #define DCTRL_DMAEN_BB (PERIPH_BB_BASE + (DCTRL_OFFSET * 32) + (DMAEN_BitNumber * 4)) |
mbed_official | 52:a51c77007319 | 74 | |
mbed_official | 52:a51c77007319 | 75 | /* Alias word address of RWSTART bit */ |
mbed_official | 52:a51c77007319 | 76 | #define RWSTART_BitNumber 0x08 |
mbed_official | 52:a51c77007319 | 77 | #define DCTRL_RWSTART_BB (PERIPH_BB_BASE + (DCTRL_OFFSET * 32) + (RWSTART_BitNumber * 4)) |
mbed_official | 52:a51c77007319 | 78 | |
mbed_official | 52:a51c77007319 | 79 | /* Alias word address of RWSTOP bit */ |
mbed_official | 52:a51c77007319 | 80 | #define RWSTOP_BitNumber 0x09 |
mbed_official | 52:a51c77007319 | 81 | #define DCTRL_RWSTOP_BB (PERIPH_BB_BASE + (DCTRL_OFFSET * 32) + (RWSTOP_BitNumber * 4)) |
mbed_official | 52:a51c77007319 | 82 | |
mbed_official | 52:a51c77007319 | 83 | /* Alias word address of RWMOD bit */ |
mbed_official | 52:a51c77007319 | 84 | #define RWMOD_BitNumber 0x0A |
mbed_official | 52:a51c77007319 | 85 | #define DCTRL_RWMOD_BB (PERIPH_BB_BASE + (DCTRL_OFFSET * 32) + (RWMOD_BitNumber * 4)) |
mbed_official | 52:a51c77007319 | 86 | |
mbed_official | 52:a51c77007319 | 87 | /* Alias word address of SDIOEN bit */ |
mbed_official | 52:a51c77007319 | 88 | #define SDIOEN_BitNumber 0x0B |
mbed_official | 52:a51c77007319 | 89 | #define DCTRL_SDIOEN_BB (PERIPH_BB_BASE + (DCTRL_OFFSET * 32) + (SDIOEN_BitNumber * 4)) |
mbed_official | 52:a51c77007319 | 90 | |
mbed_official | 52:a51c77007319 | 91 | /* ---------------------- SDIO registers bit mask ------------------------ */ |
mbed_official | 52:a51c77007319 | 92 | |
mbed_official | 52:a51c77007319 | 93 | /* --- CLKCR Register ---*/ |
mbed_official | 52:a51c77007319 | 94 | |
mbed_official | 52:a51c77007319 | 95 | /* CLKCR register clear mask */ |
mbed_official | 52:a51c77007319 | 96 | #define CLKCR_CLEAR_MASK ((uint32_t)0xFFFF8100) |
mbed_official | 52:a51c77007319 | 97 | |
mbed_official | 52:a51c77007319 | 98 | /* --- PWRCTRL Register ---*/ |
mbed_official | 52:a51c77007319 | 99 | |
mbed_official | 52:a51c77007319 | 100 | /* SDIO PWRCTRL Mask */ |
mbed_official | 52:a51c77007319 | 101 | #define PWR_PWRCTRL_MASK ((uint32_t)0xFFFFFFFC) |
mbed_official | 52:a51c77007319 | 102 | |
mbed_official | 52:a51c77007319 | 103 | /* --- DCTRL Register ---*/ |
mbed_official | 52:a51c77007319 | 104 | |
mbed_official | 52:a51c77007319 | 105 | /* SDIO DCTRL Clear Mask */ |
mbed_official | 52:a51c77007319 | 106 | #define DCTRL_CLEAR_MASK ((uint32_t)0xFFFFFF08) |
mbed_official | 52:a51c77007319 | 107 | |
mbed_official | 52:a51c77007319 | 108 | /* --- CMD Register ---*/ |
mbed_official | 52:a51c77007319 | 109 | |
mbed_official | 52:a51c77007319 | 110 | /* CMD Register clear mask */ |
mbed_official | 52:a51c77007319 | 111 | #define CMD_CLEAR_MASK ((uint32_t)0xFFFFF800) |
mbed_official | 52:a51c77007319 | 112 | |
mbed_official | 52:a51c77007319 | 113 | /* SDIO RESP Registers Address */ |
mbed_official | 52:a51c77007319 | 114 | #define SDIO_RESP_ADDR ((uint32_t)(SDIO_BASE + 0x14)) |
mbed_official | 52:a51c77007319 | 115 | |
mbed_official | 52:a51c77007319 | 116 | /** |
mbed_official | 52:a51c77007319 | 117 | * @} |
mbed_official | 52:a51c77007319 | 118 | */ |
mbed_official | 52:a51c77007319 | 119 | |
mbed_official | 52:a51c77007319 | 120 | /** @defgroup SDIO_Private_Defines |
mbed_official | 52:a51c77007319 | 121 | * @{ |
mbed_official | 52:a51c77007319 | 122 | */ |
mbed_official | 52:a51c77007319 | 123 | |
mbed_official | 52:a51c77007319 | 124 | /** |
mbed_official | 52:a51c77007319 | 125 | * @} |
mbed_official | 52:a51c77007319 | 126 | */ |
mbed_official | 52:a51c77007319 | 127 | |
mbed_official | 52:a51c77007319 | 128 | /** @defgroup SDIO_Private_Macros |
mbed_official | 52:a51c77007319 | 129 | * @{ |
mbed_official | 52:a51c77007319 | 130 | */ |
mbed_official | 52:a51c77007319 | 131 | |
mbed_official | 52:a51c77007319 | 132 | /** |
mbed_official | 52:a51c77007319 | 133 | * @} |
mbed_official | 52:a51c77007319 | 134 | */ |
mbed_official | 52:a51c77007319 | 135 | |
mbed_official | 52:a51c77007319 | 136 | /** @defgroup SDIO_Private_Variables |
mbed_official | 52:a51c77007319 | 137 | * @{ |
mbed_official | 52:a51c77007319 | 138 | */ |
mbed_official | 52:a51c77007319 | 139 | |
mbed_official | 52:a51c77007319 | 140 | /** |
mbed_official | 52:a51c77007319 | 141 | * @} |
mbed_official | 52:a51c77007319 | 142 | */ |
mbed_official | 52:a51c77007319 | 143 | |
mbed_official | 52:a51c77007319 | 144 | /** @defgroup SDIO_Private_FunctionPrototypes |
mbed_official | 52:a51c77007319 | 145 | * @{ |
mbed_official | 52:a51c77007319 | 146 | */ |
mbed_official | 52:a51c77007319 | 147 | |
mbed_official | 52:a51c77007319 | 148 | /** |
mbed_official | 52:a51c77007319 | 149 | * @} |
mbed_official | 52:a51c77007319 | 150 | */ |
mbed_official | 52:a51c77007319 | 151 | |
mbed_official | 52:a51c77007319 | 152 | /** @defgroup SDIO_Private_Functions |
mbed_official | 52:a51c77007319 | 153 | * @{ |
mbed_official | 52:a51c77007319 | 154 | */ |
mbed_official | 52:a51c77007319 | 155 | |
mbed_official | 52:a51c77007319 | 156 | /** |
mbed_official | 52:a51c77007319 | 157 | * @brief Deinitializes the SDIO peripheral registers to their default reset values. |
mbed_official | 52:a51c77007319 | 158 | * @param None |
mbed_official | 52:a51c77007319 | 159 | * @retval None |
mbed_official | 52:a51c77007319 | 160 | */ |
mbed_official | 52:a51c77007319 | 161 | void SDIO_DeInit(void) |
mbed_official | 52:a51c77007319 | 162 | { |
mbed_official | 52:a51c77007319 | 163 | SDIO->POWER = 0x00000000; |
mbed_official | 52:a51c77007319 | 164 | SDIO->CLKCR = 0x00000000; |
mbed_official | 52:a51c77007319 | 165 | SDIO->ARG = 0x00000000; |
mbed_official | 52:a51c77007319 | 166 | SDIO->CMD = 0x00000000; |
mbed_official | 52:a51c77007319 | 167 | SDIO->DTIMER = 0x00000000; |
mbed_official | 52:a51c77007319 | 168 | SDIO->DLEN = 0x00000000; |
mbed_official | 52:a51c77007319 | 169 | SDIO->DCTRL = 0x00000000; |
mbed_official | 52:a51c77007319 | 170 | SDIO->ICR = 0x00C007FF; |
mbed_official | 52:a51c77007319 | 171 | SDIO->MASK = 0x00000000; |
mbed_official | 52:a51c77007319 | 172 | } |
mbed_official | 52:a51c77007319 | 173 | |
mbed_official | 52:a51c77007319 | 174 | /** |
mbed_official | 52:a51c77007319 | 175 | * @brief Initializes the SDIO peripheral according to the specified |
mbed_official | 52:a51c77007319 | 176 | * parameters in the SDIO_InitStruct. |
mbed_official | 52:a51c77007319 | 177 | * @param SDIO_InitStruct : pointer to a SDIO_InitTypeDef structure |
mbed_official | 52:a51c77007319 | 178 | * that contains the configuration information for the SDIO peripheral. |
mbed_official | 52:a51c77007319 | 179 | * @retval None |
mbed_official | 52:a51c77007319 | 180 | */ |
mbed_official | 52:a51c77007319 | 181 | void SDIO_Init(SDIO_InitTypeDef* SDIO_InitStruct) |
mbed_official | 52:a51c77007319 | 182 | { |
mbed_official | 52:a51c77007319 | 183 | uint32_t tmpreg = 0; |
mbed_official | 52:a51c77007319 | 184 | |
mbed_official | 52:a51c77007319 | 185 | /* Check the parameters */ |
mbed_official | 52:a51c77007319 | 186 | assert_param(IS_SDIO_CLOCK_EDGE(SDIO_InitStruct->SDIO_ClockEdge)); |
mbed_official | 52:a51c77007319 | 187 | assert_param(IS_SDIO_CLOCK_BYPASS(SDIO_InitStruct->SDIO_ClockBypass)); |
mbed_official | 52:a51c77007319 | 188 | assert_param(IS_SDIO_CLOCK_POWER_SAVE(SDIO_InitStruct->SDIO_ClockPowerSave)); |
mbed_official | 52:a51c77007319 | 189 | assert_param(IS_SDIO_BUS_WIDE(SDIO_InitStruct->SDIO_BusWide)); |
mbed_official | 52:a51c77007319 | 190 | assert_param(IS_SDIO_HARDWARE_FLOW_CONTROL(SDIO_InitStruct->SDIO_HardwareFlowControl)); |
mbed_official | 52:a51c77007319 | 191 | |
mbed_official | 52:a51c77007319 | 192 | /*---------------------------- SDIO CLKCR Configuration ------------------------*/ |
mbed_official | 52:a51c77007319 | 193 | /* Get the SDIO CLKCR value */ |
mbed_official | 52:a51c77007319 | 194 | tmpreg = SDIO->CLKCR; |
mbed_official | 52:a51c77007319 | 195 | |
mbed_official | 52:a51c77007319 | 196 | /* Clear CLKDIV, PWRSAV, BYPASS, WIDBUS, NEGEDGE, HWFC_EN bits */ |
mbed_official | 52:a51c77007319 | 197 | tmpreg &= CLKCR_CLEAR_MASK; |
mbed_official | 52:a51c77007319 | 198 | |
mbed_official | 52:a51c77007319 | 199 | /* Set CLKDIV bits according to SDIO_ClockDiv value */ |
mbed_official | 52:a51c77007319 | 200 | /* Set PWRSAV bit according to SDIO_ClockPowerSave value */ |
mbed_official | 52:a51c77007319 | 201 | /* Set BYPASS bit according to SDIO_ClockBypass value */ |
mbed_official | 52:a51c77007319 | 202 | /* Set WIDBUS bits according to SDIO_BusWide value */ |
mbed_official | 52:a51c77007319 | 203 | /* Set NEGEDGE bits according to SDIO_ClockEdge value */ |
mbed_official | 52:a51c77007319 | 204 | /* Set HWFC_EN bits according to SDIO_HardwareFlowControl value */ |
mbed_official | 52:a51c77007319 | 205 | tmpreg |= (SDIO_InitStruct->SDIO_ClockDiv | SDIO_InitStruct->SDIO_ClockPowerSave | |
mbed_official | 52:a51c77007319 | 206 | SDIO_InitStruct->SDIO_ClockBypass | SDIO_InitStruct->SDIO_BusWide | |
mbed_official | 52:a51c77007319 | 207 | SDIO_InitStruct->SDIO_ClockEdge | SDIO_InitStruct->SDIO_HardwareFlowControl); |
mbed_official | 52:a51c77007319 | 208 | |
mbed_official | 52:a51c77007319 | 209 | /* Write to SDIO CLKCR */ |
mbed_official | 52:a51c77007319 | 210 | SDIO->CLKCR = tmpreg; |
mbed_official | 52:a51c77007319 | 211 | } |
mbed_official | 52:a51c77007319 | 212 | |
mbed_official | 52:a51c77007319 | 213 | /** |
mbed_official | 52:a51c77007319 | 214 | * @brief Fills each SDIO_InitStruct member with its default value. |
mbed_official | 52:a51c77007319 | 215 | * @param SDIO_InitStruct: pointer to an SDIO_InitTypeDef structure which |
mbed_official | 52:a51c77007319 | 216 | * will be initialized. |
mbed_official | 52:a51c77007319 | 217 | * @retval None |
mbed_official | 52:a51c77007319 | 218 | */ |
mbed_official | 52:a51c77007319 | 219 | void SDIO_StructInit(SDIO_InitTypeDef* SDIO_InitStruct) |
mbed_official | 52:a51c77007319 | 220 | { |
mbed_official | 52:a51c77007319 | 221 | /* SDIO_InitStruct members default value */ |
mbed_official | 52:a51c77007319 | 222 | SDIO_InitStruct->SDIO_ClockDiv = 0x00; |
mbed_official | 52:a51c77007319 | 223 | SDIO_InitStruct->SDIO_ClockEdge = SDIO_ClockEdge_Rising; |
mbed_official | 52:a51c77007319 | 224 | SDIO_InitStruct->SDIO_ClockBypass = SDIO_ClockBypass_Disable; |
mbed_official | 52:a51c77007319 | 225 | SDIO_InitStruct->SDIO_ClockPowerSave = SDIO_ClockPowerSave_Disable; |
mbed_official | 52:a51c77007319 | 226 | SDIO_InitStruct->SDIO_BusWide = SDIO_BusWide_1b; |
mbed_official | 52:a51c77007319 | 227 | SDIO_InitStruct->SDIO_HardwareFlowControl = SDIO_HardwareFlowControl_Disable; |
mbed_official | 52:a51c77007319 | 228 | } |
mbed_official | 52:a51c77007319 | 229 | |
mbed_official | 52:a51c77007319 | 230 | /** |
mbed_official | 52:a51c77007319 | 231 | * @brief Enables or disables the SDIO Clock. |
mbed_official | 52:a51c77007319 | 232 | * @param NewState: new state of the SDIO Clock. This parameter can be: ENABLE or DISABLE. |
mbed_official | 52:a51c77007319 | 233 | * @retval None |
mbed_official | 52:a51c77007319 | 234 | */ |
mbed_official | 52:a51c77007319 | 235 | void SDIO_ClockCmd(FunctionalState NewState) |
mbed_official | 52:a51c77007319 | 236 | { |
mbed_official | 52:a51c77007319 | 237 | /* Check the parameters */ |
mbed_official | 52:a51c77007319 | 238 | assert_param(IS_FUNCTIONAL_STATE(NewState)); |
mbed_official | 52:a51c77007319 | 239 | |
mbed_official | 52:a51c77007319 | 240 | *(__IO uint32_t *) CLKCR_CLKEN_BB = (uint32_t)NewState; |
mbed_official | 52:a51c77007319 | 241 | } |
mbed_official | 52:a51c77007319 | 242 | |
mbed_official | 52:a51c77007319 | 243 | /** |
mbed_official | 52:a51c77007319 | 244 | * @brief Sets the power status of the controller. |
mbed_official | 52:a51c77007319 | 245 | * @param SDIO_PowerState: new state of the Power state. |
mbed_official | 52:a51c77007319 | 246 | * This parameter can be one of the following values: |
mbed_official | 52:a51c77007319 | 247 | * @arg SDIO_PowerState_OFF |
mbed_official | 52:a51c77007319 | 248 | * @arg SDIO_PowerState_ON |
mbed_official | 52:a51c77007319 | 249 | * @retval None |
mbed_official | 52:a51c77007319 | 250 | */ |
mbed_official | 52:a51c77007319 | 251 | void SDIO_SetPowerState(uint32_t SDIO_PowerState) |
mbed_official | 52:a51c77007319 | 252 | { |
mbed_official | 52:a51c77007319 | 253 | /* Check the parameters */ |
mbed_official | 52:a51c77007319 | 254 | assert_param(IS_SDIO_POWER_STATE(SDIO_PowerState)); |
mbed_official | 52:a51c77007319 | 255 | |
mbed_official | 52:a51c77007319 | 256 | SDIO->POWER &= PWR_PWRCTRL_MASK; |
mbed_official | 52:a51c77007319 | 257 | SDIO->POWER |= SDIO_PowerState; |
mbed_official | 52:a51c77007319 | 258 | } |
mbed_official | 52:a51c77007319 | 259 | |
mbed_official | 52:a51c77007319 | 260 | /** |
mbed_official | 52:a51c77007319 | 261 | * @brief Gets the power status of the controller. |
mbed_official | 52:a51c77007319 | 262 | * @param None |
mbed_official | 52:a51c77007319 | 263 | * @retval Power status of the controller. The returned value can |
mbed_official | 52:a51c77007319 | 264 | * be one of the following: |
mbed_official | 52:a51c77007319 | 265 | * - 0x00: Power OFF |
mbed_official | 52:a51c77007319 | 266 | * - 0x02: Power UP |
mbed_official | 52:a51c77007319 | 267 | * - 0x03: Power ON |
mbed_official | 52:a51c77007319 | 268 | */ |
mbed_official | 52:a51c77007319 | 269 | uint32_t SDIO_GetPowerState(void) |
mbed_official | 52:a51c77007319 | 270 | { |
mbed_official | 52:a51c77007319 | 271 | return (SDIO->POWER & (~PWR_PWRCTRL_MASK)); |
mbed_official | 52:a51c77007319 | 272 | } |
mbed_official | 52:a51c77007319 | 273 | |
mbed_official | 52:a51c77007319 | 274 | /** |
mbed_official | 52:a51c77007319 | 275 | * @brief Enables or disables the SDIO interrupts. |
mbed_official | 52:a51c77007319 | 276 | * @param SDIO_IT: specifies the SDIO interrupt sources to be enabled or disabled. |
mbed_official | 52:a51c77007319 | 277 | * This parameter can be one or a combination of the following values: |
mbed_official | 52:a51c77007319 | 278 | * @arg SDIO_IT_CCRCFAIL: Command response received (CRC check failed) interrupt |
mbed_official | 52:a51c77007319 | 279 | * @arg SDIO_IT_DCRCFAIL: Data block sent/received (CRC check failed) interrupt |
mbed_official | 52:a51c77007319 | 280 | * @arg SDIO_IT_CTIMEOUT: Command response timeout interrupt |
mbed_official | 52:a51c77007319 | 281 | * @arg SDIO_IT_DTIMEOUT: Data timeout interrupt |
mbed_official | 52:a51c77007319 | 282 | * @arg SDIO_IT_TXUNDERR: Transmit FIFO underrun error interrupt |
mbed_official | 52:a51c77007319 | 283 | * @arg SDIO_IT_RXOVERR: Received FIFO overrun error interrupt |
mbed_official | 52:a51c77007319 | 284 | * @arg SDIO_IT_CMDREND: Command response received (CRC check passed) interrupt |
mbed_official | 52:a51c77007319 | 285 | * @arg SDIO_IT_CMDSENT: Command sent (no response required) interrupt |
mbed_official | 52:a51c77007319 | 286 | * @arg SDIO_IT_DATAEND: Data end (data counter, SDIDCOUNT, is zero) interrupt |
mbed_official | 52:a51c77007319 | 287 | * @arg SDIO_IT_STBITERR: Start bit not detected on all data signals in wide |
mbed_official | 52:a51c77007319 | 288 | * bus mode interrupt |
mbed_official | 52:a51c77007319 | 289 | * @arg SDIO_IT_DBCKEND: Data block sent/received (CRC check passed) interrupt |
mbed_official | 52:a51c77007319 | 290 | * @arg SDIO_IT_CMDACT: Command transfer in progress interrupt |
mbed_official | 52:a51c77007319 | 291 | * @arg SDIO_IT_TXACT: Data transmit in progress interrupt |
mbed_official | 52:a51c77007319 | 292 | * @arg SDIO_IT_RXACT: Data receive in progress interrupt |
mbed_official | 52:a51c77007319 | 293 | * @arg SDIO_IT_TXFIFOHE: Transmit FIFO Half Empty interrupt |
mbed_official | 52:a51c77007319 | 294 | * @arg SDIO_IT_RXFIFOHF: Receive FIFO Half Full interrupt |
mbed_official | 52:a51c77007319 | 295 | * @arg SDIO_IT_TXFIFOF: Transmit FIFO full interrupt |
mbed_official | 52:a51c77007319 | 296 | * @arg SDIO_IT_RXFIFOF: Receive FIFO full interrupt |
mbed_official | 52:a51c77007319 | 297 | * @arg SDIO_IT_TXFIFOE: Transmit FIFO empty interrupt |
mbed_official | 52:a51c77007319 | 298 | * @arg SDIO_IT_RXFIFOE: Receive FIFO empty interrupt |
mbed_official | 52:a51c77007319 | 299 | * @arg SDIO_IT_TXDAVL: Data available in transmit FIFO interrupt |
mbed_official | 52:a51c77007319 | 300 | * @arg SDIO_IT_RXDAVL: Data available in receive FIFO interrupt |
mbed_official | 52:a51c77007319 | 301 | * @arg SDIO_IT_SDIOIT: SD I/O interrupt received interrupt |
mbed_official | 52:a51c77007319 | 302 | * @arg SDIO_IT_CEATAEND: CE-ATA command completion signal received for CMD61 interrupt |
mbed_official | 52:a51c77007319 | 303 | * @param NewState: new state of the specified SDIO interrupts. |
mbed_official | 52:a51c77007319 | 304 | * This parameter can be: ENABLE or DISABLE. |
mbed_official | 52:a51c77007319 | 305 | * @retval None |
mbed_official | 52:a51c77007319 | 306 | */ |
mbed_official | 52:a51c77007319 | 307 | void SDIO_ITConfig(uint32_t SDIO_IT, FunctionalState NewState) |
mbed_official | 52:a51c77007319 | 308 | { |
mbed_official | 52:a51c77007319 | 309 | /* Check the parameters */ |
mbed_official | 52:a51c77007319 | 310 | assert_param(IS_SDIO_IT(SDIO_IT)); |
mbed_official | 52:a51c77007319 | 311 | assert_param(IS_FUNCTIONAL_STATE(NewState)); |
mbed_official | 52:a51c77007319 | 312 | |
mbed_official | 52:a51c77007319 | 313 | if (NewState != DISABLE) |
mbed_official | 52:a51c77007319 | 314 | { |
mbed_official | 52:a51c77007319 | 315 | /* Enable the SDIO interrupts */ |
mbed_official | 52:a51c77007319 | 316 | SDIO->MASK |= SDIO_IT; |
mbed_official | 52:a51c77007319 | 317 | } |
mbed_official | 52:a51c77007319 | 318 | else |
mbed_official | 52:a51c77007319 | 319 | { |
mbed_official | 52:a51c77007319 | 320 | /* Disable the SDIO interrupts */ |
mbed_official | 52:a51c77007319 | 321 | SDIO->MASK &= ~SDIO_IT; |
mbed_official | 52:a51c77007319 | 322 | } |
mbed_official | 52:a51c77007319 | 323 | } |
mbed_official | 52:a51c77007319 | 324 | |
mbed_official | 52:a51c77007319 | 325 | /** |
mbed_official | 52:a51c77007319 | 326 | * @brief Enables or disables the SDIO DMA request. |
mbed_official | 52:a51c77007319 | 327 | * @param NewState: new state of the selected SDIO DMA request. |
mbed_official | 52:a51c77007319 | 328 | * This parameter can be: ENABLE or DISABLE. |
mbed_official | 52:a51c77007319 | 329 | * @retval None |
mbed_official | 52:a51c77007319 | 330 | */ |
mbed_official | 52:a51c77007319 | 331 | void SDIO_DMACmd(FunctionalState NewState) |
mbed_official | 52:a51c77007319 | 332 | { |
mbed_official | 52:a51c77007319 | 333 | /* Check the parameters */ |
mbed_official | 52:a51c77007319 | 334 | assert_param(IS_FUNCTIONAL_STATE(NewState)); |
mbed_official | 52:a51c77007319 | 335 | |
mbed_official | 52:a51c77007319 | 336 | *(__IO uint32_t *) DCTRL_DMAEN_BB = (uint32_t)NewState; |
mbed_official | 52:a51c77007319 | 337 | } |
mbed_official | 52:a51c77007319 | 338 | |
mbed_official | 52:a51c77007319 | 339 | /** |
mbed_official | 52:a51c77007319 | 340 | * @brief Initializes the SDIO Command according to the specified |
mbed_official | 52:a51c77007319 | 341 | * parameters in the SDIO_CmdInitStruct and send the command. |
mbed_official | 52:a51c77007319 | 342 | * @param SDIO_CmdInitStruct : pointer to a SDIO_CmdInitTypeDef |
mbed_official | 52:a51c77007319 | 343 | * structure that contains the configuration information for the SDIO command. |
mbed_official | 52:a51c77007319 | 344 | * @retval None |
mbed_official | 52:a51c77007319 | 345 | */ |
mbed_official | 52:a51c77007319 | 346 | void SDIO_SendCommand(SDIO_CmdInitTypeDef *SDIO_CmdInitStruct) |
mbed_official | 52:a51c77007319 | 347 | { |
mbed_official | 52:a51c77007319 | 348 | uint32_t tmpreg = 0; |
mbed_official | 52:a51c77007319 | 349 | |
mbed_official | 52:a51c77007319 | 350 | /* Check the parameters */ |
mbed_official | 52:a51c77007319 | 351 | assert_param(IS_SDIO_CMD_INDEX(SDIO_CmdInitStruct->SDIO_CmdIndex)); |
mbed_official | 52:a51c77007319 | 352 | assert_param(IS_SDIO_RESPONSE(SDIO_CmdInitStruct->SDIO_Response)); |
mbed_official | 52:a51c77007319 | 353 | assert_param(IS_SDIO_WAIT(SDIO_CmdInitStruct->SDIO_Wait)); |
mbed_official | 52:a51c77007319 | 354 | assert_param(IS_SDIO_CPSM(SDIO_CmdInitStruct->SDIO_CPSM)); |
mbed_official | 52:a51c77007319 | 355 | |
mbed_official | 52:a51c77007319 | 356 | /*---------------------------- SDIO ARG Configuration ------------------------*/ |
mbed_official | 52:a51c77007319 | 357 | /* Set the SDIO Argument value */ |
mbed_official | 52:a51c77007319 | 358 | SDIO->ARG = SDIO_CmdInitStruct->SDIO_Argument; |
mbed_official | 52:a51c77007319 | 359 | |
mbed_official | 52:a51c77007319 | 360 | /*---------------------------- SDIO CMD Configuration ------------------------*/ |
mbed_official | 52:a51c77007319 | 361 | /* Get the SDIO CMD value */ |
mbed_official | 52:a51c77007319 | 362 | tmpreg = SDIO->CMD; |
mbed_official | 52:a51c77007319 | 363 | /* Clear CMDINDEX, WAITRESP, WAITINT, WAITPEND, CPSMEN bits */ |
mbed_official | 52:a51c77007319 | 364 | tmpreg &= CMD_CLEAR_MASK; |
mbed_official | 52:a51c77007319 | 365 | /* Set CMDINDEX bits according to SDIO_CmdIndex value */ |
mbed_official | 52:a51c77007319 | 366 | /* Set WAITRESP bits according to SDIO_Response value */ |
mbed_official | 52:a51c77007319 | 367 | /* Set WAITINT and WAITPEND bits according to SDIO_Wait value */ |
mbed_official | 52:a51c77007319 | 368 | /* Set CPSMEN bits according to SDIO_CPSM value */ |
mbed_official | 52:a51c77007319 | 369 | tmpreg |= (uint32_t)SDIO_CmdInitStruct->SDIO_CmdIndex | SDIO_CmdInitStruct->SDIO_Response |
mbed_official | 52:a51c77007319 | 370 | | SDIO_CmdInitStruct->SDIO_Wait | SDIO_CmdInitStruct->SDIO_CPSM; |
mbed_official | 52:a51c77007319 | 371 | |
mbed_official | 52:a51c77007319 | 372 | /* Write to SDIO CMD */ |
mbed_official | 52:a51c77007319 | 373 | SDIO->CMD = tmpreg; |
mbed_official | 52:a51c77007319 | 374 | } |
mbed_official | 52:a51c77007319 | 375 | |
mbed_official | 52:a51c77007319 | 376 | /** |
mbed_official | 52:a51c77007319 | 377 | * @brief Fills each SDIO_CmdInitStruct member with its default value. |
mbed_official | 52:a51c77007319 | 378 | * @param SDIO_CmdInitStruct: pointer to an SDIO_CmdInitTypeDef |
mbed_official | 52:a51c77007319 | 379 | * structure which will be initialized. |
mbed_official | 52:a51c77007319 | 380 | * @retval None |
mbed_official | 52:a51c77007319 | 381 | */ |
mbed_official | 52:a51c77007319 | 382 | void SDIO_CmdStructInit(SDIO_CmdInitTypeDef* SDIO_CmdInitStruct) |
mbed_official | 52:a51c77007319 | 383 | { |
mbed_official | 52:a51c77007319 | 384 | /* SDIO_CmdInitStruct members default value */ |
mbed_official | 52:a51c77007319 | 385 | SDIO_CmdInitStruct->SDIO_Argument = 0x00; |
mbed_official | 52:a51c77007319 | 386 | SDIO_CmdInitStruct->SDIO_CmdIndex = 0x00; |
mbed_official | 52:a51c77007319 | 387 | SDIO_CmdInitStruct->SDIO_Response = SDIO_Response_No; |
mbed_official | 52:a51c77007319 | 388 | SDIO_CmdInitStruct->SDIO_Wait = SDIO_Wait_No; |
mbed_official | 52:a51c77007319 | 389 | SDIO_CmdInitStruct->SDIO_CPSM = SDIO_CPSM_Disable; |
mbed_official | 52:a51c77007319 | 390 | } |
mbed_official | 52:a51c77007319 | 391 | |
mbed_official | 52:a51c77007319 | 392 | /** |
mbed_official | 52:a51c77007319 | 393 | * @brief Returns command index of last command for which response received. |
mbed_official | 52:a51c77007319 | 394 | * @param None |
mbed_official | 52:a51c77007319 | 395 | * @retval Returns the command index of the last command response received. |
mbed_official | 52:a51c77007319 | 396 | */ |
mbed_official | 52:a51c77007319 | 397 | uint8_t SDIO_GetCommandResponse(void) |
mbed_official | 52:a51c77007319 | 398 | { |
mbed_official | 52:a51c77007319 | 399 | return (uint8_t)(SDIO->RESPCMD); |
mbed_official | 52:a51c77007319 | 400 | } |
mbed_official | 52:a51c77007319 | 401 | |
mbed_official | 52:a51c77007319 | 402 | /** |
mbed_official | 52:a51c77007319 | 403 | * @brief Returns response received from the card for the last command. |
mbed_official | 52:a51c77007319 | 404 | * @param SDIO_RESP: Specifies the SDIO response register. |
mbed_official | 52:a51c77007319 | 405 | * This parameter can be one of the following values: |
mbed_official | 52:a51c77007319 | 406 | * @arg SDIO_RESP1: Response Register 1 |
mbed_official | 52:a51c77007319 | 407 | * @arg SDIO_RESP2: Response Register 2 |
mbed_official | 52:a51c77007319 | 408 | * @arg SDIO_RESP3: Response Register 3 |
mbed_official | 52:a51c77007319 | 409 | * @arg SDIO_RESP4: Response Register 4 |
mbed_official | 52:a51c77007319 | 410 | * @retval The Corresponding response register value. |
mbed_official | 52:a51c77007319 | 411 | */ |
mbed_official | 52:a51c77007319 | 412 | uint32_t SDIO_GetResponse(uint32_t SDIO_RESP) |
mbed_official | 52:a51c77007319 | 413 | { |
mbed_official | 52:a51c77007319 | 414 | __IO uint32_t tmp = 0; |
mbed_official | 52:a51c77007319 | 415 | |
mbed_official | 52:a51c77007319 | 416 | /* Check the parameters */ |
mbed_official | 52:a51c77007319 | 417 | assert_param(IS_SDIO_RESP(SDIO_RESP)); |
mbed_official | 52:a51c77007319 | 418 | |
mbed_official | 52:a51c77007319 | 419 | tmp = SDIO_RESP_ADDR + SDIO_RESP; |
mbed_official | 52:a51c77007319 | 420 | |
mbed_official | 52:a51c77007319 | 421 | return (*(__IO uint32_t *) tmp); |
mbed_official | 52:a51c77007319 | 422 | } |
mbed_official | 52:a51c77007319 | 423 | |
mbed_official | 52:a51c77007319 | 424 | /** |
mbed_official | 52:a51c77007319 | 425 | * @brief Initializes the SDIO data path according to the specified |
mbed_official | 52:a51c77007319 | 426 | * parameters in the SDIO_DataInitStruct. |
mbed_official | 52:a51c77007319 | 427 | * @param SDIO_DataInitStruct : pointer to a SDIO_DataInitTypeDef structure that |
mbed_official | 52:a51c77007319 | 428 | * contains the configuration information for the SDIO command. |
mbed_official | 52:a51c77007319 | 429 | * @retval None |
mbed_official | 52:a51c77007319 | 430 | */ |
mbed_official | 52:a51c77007319 | 431 | void SDIO_DataConfig(SDIO_DataInitTypeDef* SDIO_DataInitStruct) |
mbed_official | 52:a51c77007319 | 432 | { |
mbed_official | 52:a51c77007319 | 433 | uint32_t tmpreg = 0; |
mbed_official | 52:a51c77007319 | 434 | |
mbed_official | 52:a51c77007319 | 435 | /* Check the parameters */ |
mbed_official | 52:a51c77007319 | 436 | assert_param(IS_SDIO_DATA_LENGTH(SDIO_DataInitStruct->SDIO_DataLength)); |
mbed_official | 52:a51c77007319 | 437 | assert_param(IS_SDIO_BLOCK_SIZE(SDIO_DataInitStruct->SDIO_DataBlockSize)); |
mbed_official | 52:a51c77007319 | 438 | assert_param(IS_SDIO_TRANSFER_DIR(SDIO_DataInitStruct->SDIO_TransferDir)); |
mbed_official | 52:a51c77007319 | 439 | assert_param(IS_SDIO_TRANSFER_MODE(SDIO_DataInitStruct->SDIO_TransferMode)); |
mbed_official | 52:a51c77007319 | 440 | assert_param(IS_SDIO_DPSM(SDIO_DataInitStruct->SDIO_DPSM)); |
mbed_official | 52:a51c77007319 | 441 | |
mbed_official | 52:a51c77007319 | 442 | /*---------------------------- SDIO DTIMER Configuration ---------------------*/ |
mbed_official | 52:a51c77007319 | 443 | /* Set the SDIO Data TimeOut value */ |
mbed_official | 52:a51c77007319 | 444 | SDIO->DTIMER = SDIO_DataInitStruct->SDIO_DataTimeOut; |
mbed_official | 52:a51c77007319 | 445 | |
mbed_official | 52:a51c77007319 | 446 | /*---------------------------- SDIO DLEN Configuration -----------------------*/ |
mbed_official | 52:a51c77007319 | 447 | /* Set the SDIO DataLength value */ |
mbed_official | 52:a51c77007319 | 448 | SDIO->DLEN = SDIO_DataInitStruct->SDIO_DataLength; |
mbed_official | 52:a51c77007319 | 449 | |
mbed_official | 52:a51c77007319 | 450 | /*---------------------------- SDIO DCTRL Configuration ----------------------*/ |
mbed_official | 52:a51c77007319 | 451 | /* Get the SDIO DCTRL value */ |
mbed_official | 52:a51c77007319 | 452 | tmpreg = SDIO->DCTRL; |
mbed_official | 52:a51c77007319 | 453 | /* Clear DEN, DTMODE, DTDIR and DBCKSIZE bits */ |
mbed_official | 52:a51c77007319 | 454 | tmpreg &= DCTRL_CLEAR_MASK; |
mbed_official | 52:a51c77007319 | 455 | /* Set DEN bit according to SDIO_DPSM value */ |
mbed_official | 52:a51c77007319 | 456 | /* Set DTMODE bit according to SDIO_TransferMode value */ |
mbed_official | 52:a51c77007319 | 457 | /* Set DTDIR bit according to SDIO_TransferDir value */ |
mbed_official | 52:a51c77007319 | 458 | /* Set DBCKSIZE bits according to SDIO_DataBlockSize value */ |
mbed_official | 52:a51c77007319 | 459 | tmpreg |= (uint32_t)SDIO_DataInitStruct->SDIO_DataBlockSize | SDIO_DataInitStruct->SDIO_TransferDir |
mbed_official | 52:a51c77007319 | 460 | | SDIO_DataInitStruct->SDIO_TransferMode | SDIO_DataInitStruct->SDIO_DPSM; |
mbed_official | 52:a51c77007319 | 461 | |
mbed_official | 52:a51c77007319 | 462 | /* Write to SDIO DCTRL */ |
mbed_official | 52:a51c77007319 | 463 | SDIO->DCTRL = tmpreg; |
mbed_official | 52:a51c77007319 | 464 | } |
mbed_official | 52:a51c77007319 | 465 | |
mbed_official | 52:a51c77007319 | 466 | /** |
mbed_official | 52:a51c77007319 | 467 | * @brief Fills each SDIO_DataInitStruct member with its default value. |
mbed_official | 52:a51c77007319 | 468 | * @param SDIO_DataInitStruct: pointer to an SDIO_DataInitTypeDef structure which |
mbed_official | 52:a51c77007319 | 469 | * will be initialized. |
mbed_official | 52:a51c77007319 | 470 | * @retval None |
mbed_official | 52:a51c77007319 | 471 | */ |
mbed_official | 52:a51c77007319 | 472 | void SDIO_DataStructInit(SDIO_DataInitTypeDef* SDIO_DataInitStruct) |
mbed_official | 52:a51c77007319 | 473 | { |
mbed_official | 52:a51c77007319 | 474 | /* SDIO_DataInitStruct members default value */ |
mbed_official | 52:a51c77007319 | 475 | SDIO_DataInitStruct->SDIO_DataTimeOut = 0xFFFFFFFF; |
mbed_official | 52:a51c77007319 | 476 | SDIO_DataInitStruct->SDIO_DataLength = 0x00; |
mbed_official | 52:a51c77007319 | 477 | SDIO_DataInitStruct->SDIO_DataBlockSize = SDIO_DataBlockSize_1b; |
mbed_official | 52:a51c77007319 | 478 | SDIO_DataInitStruct->SDIO_TransferDir = SDIO_TransferDir_ToCard; |
mbed_official | 52:a51c77007319 | 479 | SDIO_DataInitStruct->SDIO_TransferMode = SDIO_TransferMode_Block; |
mbed_official | 52:a51c77007319 | 480 | SDIO_DataInitStruct->SDIO_DPSM = SDIO_DPSM_Disable; |
mbed_official | 52:a51c77007319 | 481 | } |
mbed_official | 52:a51c77007319 | 482 | |
mbed_official | 52:a51c77007319 | 483 | /** |
mbed_official | 52:a51c77007319 | 484 | * @brief Returns number of remaining data bytes to be transferred. |
mbed_official | 52:a51c77007319 | 485 | * @param None |
mbed_official | 52:a51c77007319 | 486 | * @retval Number of remaining data bytes to be transferred |
mbed_official | 52:a51c77007319 | 487 | */ |
mbed_official | 52:a51c77007319 | 488 | uint32_t SDIO_GetDataCounter(void) |
mbed_official | 52:a51c77007319 | 489 | { |
mbed_official | 52:a51c77007319 | 490 | return SDIO->DCOUNT; |
mbed_official | 52:a51c77007319 | 491 | } |
mbed_official | 52:a51c77007319 | 492 | |
mbed_official | 52:a51c77007319 | 493 | /** |
mbed_official | 52:a51c77007319 | 494 | * @brief Read one data word from Rx FIFO. |
mbed_official | 52:a51c77007319 | 495 | * @param None |
mbed_official | 52:a51c77007319 | 496 | * @retval Data received |
mbed_official | 52:a51c77007319 | 497 | */ |
mbed_official | 52:a51c77007319 | 498 | uint32_t SDIO_ReadData(void) |
mbed_official | 52:a51c77007319 | 499 | { |
mbed_official | 52:a51c77007319 | 500 | return SDIO->FIFO; |
mbed_official | 52:a51c77007319 | 501 | } |
mbed_official | 52:a51c77007319 | 502 | |
mbed_official | 52:a51c77007319 | 503 | /** |
mbed_official | 52:a51c77007319 | 504 | * @brief Write one data word to Tx FIFO. |
mbed_official | 52:a51c77007319 | 505 | * @param Data: 32-bit data word to write. |
mbed_official | 52:a51c77007319 | 506 | * @retval None |
mbed_official | 52:a51c77007319 | 507 | */ |
mbed_official | 52:a51c77007319 | 508 | void SDIO_WriteData(uint32_t Data) |
mbed_official | 52:a51c77007319 | 509 | { |
mbed_official | 52:a51c77007319 | 510 | SDIO->FIFO = Data; |
mbed_official | 52:a51c77007319 | 511 | } |
mbed_official | 52:a51c77007319 | 512 | |
mbed_official | 52:a51c77007319 | 513 | /** |
mbed_official | 52:a51c77007319 | 514 | * @brief Returns the number of words left to be written to or read from FIFO. |
mbed_official | 52:a51c77007319 | 515 | * @param None |
mbed_official | 52:a51c77007319 | 516 | * @retval Remaining number of words. |
mbed_official | 52:a51c77007319 | 517 | */ |
mbed_official | 52:a51c77007319 | 518 | uint32_t SDIO_GetFIFOCount(void) |
mbed_official | 52:a51c77007319 | 519 | { |
mbed_official | 52:a51c77007319 | 520 | return SDIO->FIFOCNT; |
mbed_official | 52:a51c77007319 | 521 | } |
mbed_official | 52:a51c77007319 | 522 | |
mbed_official | 52:a51c77007319 | 523 | /** |
mbed_official | 52:a51c77007319 | 524 | * @brief Starts the SD I/O Read Wait operation. |
mbed_official | 52:a51c77007319 | 525 | * @param NewState: new state of the Start SDIO Read Wait operation. |
mbed_official | 52:a51c77007319 | 526 | * This parameter can be: ENABLE or DISABLE. |
mbed_official | 52:a51c77007319 | 527 | * @retval None |
mbed_official | 52:a51c77007319 | 528 | */ |
mbed_official | 52:a51c77007319 | 529 | void SDIO_StartSDIOReadWait(FunctionalState NewState) |
mbed_official | 52:a51c77007319 | 530 | { |
mbed_official | 52:a51c77007319 | 531 | /* Check the parameters */ |
mbed_official | 52:a51c77007319 | 532 | assert_param(IS_FUNCTIONAL_STATE(NewState)); |
mbed_official | 52:a51c77007319 | 533 | |
mbed_official | 52:a51c77007319 | 534 | *(__IO uint32_t *) DCTRL_RWSTART_BB = (uint32_t) NewState; |
mbed_official | 52:a51c77007319 | 535 | } |
mbed_official | 52:a51c77007319 | 536 | |
mbed_official | 52:a51c77007319 | 537 | /** |
mbed_official | 52:a51c77007319 | 538 | * @brief Stops the SD I/O Read Wait operation. |
mbed_official | 52:a51c77007319 | 539 | * @param NewState: new state of the Stop SDIO Read Wait operation. |
mbed_official | 52:a51c77007319 | 540 | * This parameter can be: ENABLE or DISABLE. |
mbed_official | 52:a51c77007319 | 541 | * @retval None |
mbed_official | 52:a51c77007319 | 542 | */ |
mbed_official | 52:a51c77007319 | 543 | void SDIO_StopSDIOReadWait(FunctionalState NewState) |
mbed_official | 52:a51c77007319 | 544 | { |
mbed_official | 52:a51c77007319 | 545 | /* Check the parameters */ |
mbed_official | 52:a51c77007319 | 546 | assert_param(IS_FUNCTIONAL_STATE(NewState)); |
mbed_official | 52:a51c77007319 | 547 | |
mbed_official | 52:a51c77007319 | 548 | *(__IO uint32_t *) DCTRL_RWSTOP_BB = (uint32_t) NewState; |
mbed_official | 52:a51c77007319 | 549 | } |
mbed_official | 52:a51c77007319 | 550 | |
mbed_official | 52:a51c77007319 | 551 | /** |
mbed_official | 52:a51c77007319 | 552 | * @brief Sets one of the two options of inserting read wait interval. |
mbed_official | 52:a51c77007319 | 553 | * @param SDIO_ReadWaitMode: SD I/O Read Wait operation mode. |
mbed_official | 52:a51c77007319 | 554 | * This parameter can be: |
mbed_official | 52:a51c77007319 | 555 | * @arg SDIO_ReadWaitMode_CLK: Read Wait control by stopping SDIOCLK |
mbed_official | 52:a51c77007319 | 556 | * @arg SDIO_ReadWaitMode_DATA2: Read Wait control using SDIO_DATA2 |
mbed_official | 52:a51c77007319 | 557 | * @retval None |
mbed_official | 52:a51c77007319 | 558 | */ |
mbed_official | 52:a51c77007319 | 559 | void SDIO_SetSDIOReadWaitMode(uint32_t SDIO_ReadWaitMode) |
mbed_official | 52:a51c77007319 | 560 | { |
mbed_official | 52:a51c77007319 | 561 | /* Check the parameters */ |
mbed_official | 52:a51c77007319 | 562 | assert_param(IS_SDIO_READWAIT_MODE(SDIO_ReadWaitMode)); |
mbed_official | 52:a51c77007319 | 563 | |
mbed_official | 52:a51c77007319 | 564 | *(__IO uint32_t *) DCTRL_RWMOD_BB = SDIO_ReadWaitMode; |
mbed_official | 52:a51c77007319 | 565 | } |
mbed_official | 52:a51c77007319 | 566 | |
mbed_official | 52:a51c77007319 | 567 | /** |
mbed_official | 52:a51c77007319 | 568 | * @brief Enables or disables the SD I/O Mode Operation. |
mbed_official | 52:a51c77007319 | 569 | * @param NewState: new state of SDIO specific operation. |
mbed_official | 52:a51c77007319 | 570 | * This parameter can be: ENABLE or DISABLE. |
mbed_official | 52:a51c77007319 | 571 | * @retval None |
mbed_official | 52:a51c77007319 | 572 | */ |
mbed_official | 52:a51c77007319 | 573 | void SDIO_SetSDIOOperation(FunctionalState NewState) |
mbed_official | 52:a51c77007319 | 574 | { |
mbed_official | 52:a51c77007319 | 575 | /* Check the parameters */ |
mbed_official | 52:a51c77007319 | 576 | assert_param(IS_FUNCTIONAL_STATE(NewState)); |
mbed_official | 52:a51c77007319 | 577 | |
mbed_official | 52:a51c77007319 | 578 | *(__IO uint32_t *) DCTRL_SDIOEN_BB = (uint32_t)NewState; |
mbed_official | 52:a51c77007319 | 579 | } |
mbed_official | 52:a51c77007319 | 580 | |
mbed_official | 52:a51c77007319 | 581 | /** |
mbed_official | 52:a51c77007319 | 582 | * @brief Enables or disables the SD I/O Mode suspend command sending. |
mbed_official | 52:a51c77007319 | 583 | * @param NewState: new state of the SD I/O Mode suspend command. |
mbed_official | 52:a51c77007319 | 584 | * This parameter can be: ENABLE or DISABLE. |
mbed_official | 52:a51c77007319 | 585 | * @retval None |
mbed_official | 52:a51c77007319 | 586 | */ |
mbed_official | 52:a51c77007319 | 587 | void SDIO_SendSDIOSuspendCmd(FunctionalState NewState) |
mbed_official | 52:a51c77007319 | 588 | { |
mbed_official | 52:a51c77007319 | 589 | /* Check the parameters */ |
mbed_official | 52:a51c77007319 | 590 | assert_param(IS_FUNCTIONAL_STATE(NewState)); |
mbed_official | 52:a51c77007319 | 591 | |
mbed_official | 52:a51c77007319 | 592 | *(__IO uint32_t *) CMD_SDIOSUSPEND_BB = (uint32_t)NewState; |
mbed_official | 52:a51c77007319 | 593 | } |
mbed_official | 52:a51c77007319 | 594 | |
mbed_official | 52:a51c77007319 | 595 | /** |
mbed_official | 52:a51c77007319 | 596 | * @brief Enables or disables the command completion signal. |
mbed_official | 52:a51c77007319 | 597 | * @param NewState: new state of command completion signal. |
mbed_official | 52:a51c77007319 | 598 | * This parameter can be: ENABLE or DISABLE. |
mbed_official | 52:a51c77007319 | 599 | * @retval None |
mbed_official | 52:a51c77007319 | 600 | */ |
mbed_official | 52:a51c77007319 | 601 | void SDIO_CommandCompletionCmd(FunctionalState NewState) |
mbed_official | 52:a51c77007319 | 602 | { |
mbed_official | 52:a51c77007319 | 603 | /* Check the parameters */ |
mbed_official | 52:a51c77007319 | 604 | assert_param(IS_FUNCTIONAL_STATE(NewState)); |
mbed_official | 52:a51c77007319 | 605 | |
mbed_official | 52:a51c77007319 | 606 | *(__IO uint32_t *) CMD_ENCMDCOMPL_BB = (uint32_t)NewState; |
mbed_official | 52:a51c77007319 | 607 | } |
mbed_official | 52:a51c77007319 | 608 | |
mbed_official | 52:a51c77007319 | 609 | /** |
mbed_official | 52:a51c77007319 | 610 | * @brief Enables or disables the CE-ATA interrupt. |
mbed_official | 52:a51c77007319 | 611 | * @param NewState: new state of CE-ATA interrupt. This parameter can be: ENABLE or DISABLE. |
mbed_official | 52:a51c77007319 | 612 | * @retval None |
mbed_official | 52:a51c77007319 | 613 | */ |
mbed_official | 52:a51c77007319 | 614 | void SDIO_CEATAITCmd(FunctionalState NewState) |
mbed_official | 52:a51c77007319 | 615 | { |
mbed_official | 52:a51c77007319 | 616 | /* Check the parameters */ |
mbed_official | 52:a51c77007319 | 617 | assert_param(IS_FUNCTIONAL_STATE(NewState)); |
mbed_official | 52:a51c77007319 | 618 | |
mbed_official | 52:a51c77007319 | 619 | *(__IO uint32_t *) CMD_NIEN_BB = (uint32_t)((~((uint32_t)NewState)) & ((uint32_t)0x1)); |
mbed_official | 52:a51c77007319 | 620 | } |
mbed_official | 52:a51c77007319 | 621 | |
mbed_official | 52:a51c77007319 | 622 | /** |
mbed_official | 52:a51c77007319 | 623 | * @brief Sends CE-ATA command (CMD61). |
mbed_official | 52:a51c77007319 | 624 | * @param NewState: new state of CE-ATA command. This parameter can be: ENABLE or DISABLE. |
mbed_official | 52:a51c77007319 | 625 | * @retval None |
mbed_official | 52:a51c77007319 | 626 | */ |
mbed_official | 52:a51c77007319 | 627 | void SDIO_SendCEATACmd(FunctionalState NewState) |
mbed_official | 52:a51c77007319 | 628 | { |
mbed_official | 52:a51c77007319 | 629 | /* Check the parameters */ |
mbed_official | 52:a51c77007319 | 630 | assert_param(IS_FUNCTIONAL_STATE(NewState)); |
mbed_official | 52:a51c77007319 | 631 | |
mbed_official | 52:a51c77007319 | 632 | *(__IO uint32_t *) CMD_ATACMD_BB = (uint32_t)NewState; |
mbed_official | 52:a51c77007319 | 633 | } |
mbed_official | 52:a51c77007319 | 634 | |
mbed_official | 52:a51c77007319 | 635 | /** |
mbed_official | 52:a51c77007319 | 636 | * @brief Checks whether the specified SDIO flag is set or not. |
mbed_official | 52:a51c77007319 | 637 | * @param SDIO_FLAG: specifies the flag to check. |
mbed_official | 52:a51c77007319 | 638 | * This parameter can be one of the following values: |
mbed_official | 52:a51c77007319 | 639 | * @arg SDIO_FLAG_CCRCFAIL: Command response received (CRC check failed) |
mbed_official | 52:a51c77007319 | 640 | * @arg SDIO_FLAG_DCRCFAIL: Data block sent/received (CRC check failed) |
mbed_official | 52:a51c77007319 | 641 | * @arg SDIO_FLAG_CTIMEOUT: Command response timeout |
mbed_official | 52:a51c77007319 | 642 | * @arg SDIO_FLAG_DTIMEOUT: Data timeout |
mbed_official | 52:a51c77007319 | 643 | * @arg SDIO_FLAG_TXUNDERR: Transmit FIFO underrun error |
mbed_official | 52:a51c77007319 | 644 | * @arg SDIO_FLAG_RXOVERR: Received FIFO overrun error |
mbed_official | 52:a51c77007319 | 645 | * @arg SDIO_FLAG_CMDREND: Command response received (CRC check passed) |
mbed_official | 52:a51c77007319 | 646 | * @arg SDIO_FLAG_CMDSENT: Command sent (no response required) |
mbed_official | 52:a51c77007319 | 647 | * @arg SDIO_FLAG_DATAEND: Data end (data counter, SDIDCOUNT, is zero) |
mbed_official | 52:a51c77007319 | 648 | * @arg SDIO_FLAG_STBITERR: Start bit not detected on all data signals in wide |
mbed_official | 52:a51c77007319 | 649 | * bus mode. |
mbed_official | 52:a51c77007319 | 650 | * @arg SDIO_FLAG_DBCKEND: Data block sent/received (CRC check passed) |
mbed_official | 52:a51c77007319 | 651 | * @arg SDIO_FLAG_CMDACT: Command transfer in progress |
mbed_official | 52:a51c77007319 | 652 | * @arg SDIO_FLAG_TXACT: Data transmit in progress |
mbed_official | 52:a51c77007319 | 653 | * @arg SDIO_FLAG_RXACT: Data receive in progress |
mbed_official | 52:a51c77007319 | 654 | * @arg SDIO_FLAG_TXFIFOHE: Transmit FIFO Half Empty |
mbed_official | 52:a51c77007319 | 655 | * @arg SDIO_FLAG_RXFIFOHF: Receive FIFO Half Full |
mbed_official | 52:a51c77007319 | 656 | * @arg SDIO_FLAG_TXFIFOF: Transmit FIFO full |
mbed_official | 52:a51c77007319 | 657 | * @arg SDIO_FLAG_RXFIFOF: Receive FIFO full |
mbed_official | 52:a51c77007319 | 658 | * @arg SDIO_FLAG_TXFIFOE: Transmit FIFO empty |
mbed_official | 52:a51c77007319 | 659 | * @arg SDIO_FLAG_RXFIFOE: Receive FIFO empty |
mbed_official | 52:a51c77007319 | 660 | * @arg SDIO_FLAG_TXDAVL: Data available in transmit FIFO |
mbed_official | 52:a51c77007319 | 661 | * @arg SDIO_FLAG_RXDAVL: Data available in receive FIFO |
mbed_official | 52:a51c77007319 | 662 | * @arg SDIO_FLAG_SDIOIT: SD I/O interrupt received |
mbed_official | 52:a51c77007319 | 663 | * @arg SDIO_FLAG_CEATAEND: CE-ATA command completion signal received for CMD61 |
mbed_official | 52:a51c77007319 | 664 | * @retval The new state of SDIO_FLAG (SET or RESET). |
mbed_official | 52:a51c77007319 | 665 | */ |
mbed_official | 52:a51c77007319 | 666 | FlagStatus SDIO_GetFlagStatus(uint32_t SDIO_FLAG) |
mbed_official | 52:a51c77007319 | 667 | { |
mbed_official | 52:a51c77007319 | 668 | FlagStatus bitstatus = RESET; |
mbed_official | 52:a51c77007319 | 669 | |
mbed_official | 52:a51c77007319 | 670 | /* Check the parameters */ |
mbed_official | 52:a51c77007319 | 671 | assert_param(IS_SDIO_FLAG(SDIO_FLAG)); |
mbed_official | 52:a51c77007319 | 672 | |
mbed_official | 52:a51c77007319 | 673 | if ((SDIO->STA & SDIO_FLAG) != (uint32_t)RESET) |
mbed_official | 52:a51c77007319 | 674 | { |
mbed_official | 52:a51c77007319 | 675 | bitstatus = SET; |
mbed_official | 52:a51c77007319 | 676 | } |
mbed_official | 52:a51c77007319 | 677 | else |
mbed_official | 52:a51c77007319 | 678 | { |
mbed_official | 52:a51c77007319 | 679 | bitstatus = RESET; |
mbed_official | 52:a51c77007319 | 680 | } |
mbed_official | 52:a51c77007319 | 681 | return bitstatus; |
mbed_official | 52:a51c77007319 | 682 | } |
mbed_official | 52:a51c77007319 | 683 | |
mbed_official | 52:a51c77007319 | 684 | /** |
mbed_official | 52:a51c77007319 | 685 | * @brief Clears the SDIO's pending flags. |
mbed_official | 52:a51c77007319 | 686 | * @param SDIO_FLAG: specifies the flag to clear. |
mbed_official | 52:a51c77007319 | 687 | * This parameter can be one or a combination of the following values: |
mbed_official | 52:a51c77007319 | 688 | * @arg SDIO_FLAG_CCRCFAIL: Command response received (CRC check failed) |
mbed_official | 52:a51c77007319 | 689 | * @arg SDIO_FLAG_DCRCFAIL: Data block sent/received (CRC check failed) |
mbed_official | 52:a51c77007319 | 690 | * @arg SDIO_FLAG_CTIMEOUT: Command response timeout |
mbed_official | 52:a51c77007319 | 691 | * @arg SDIO_FLAG_DTIMEOUT: Data timeout |
mbed_official | 52:a51c77007319 | 692 | * @arg SDIO_FLAG_TXUNDERR: Transmit FIFO underrun error |
mbed_official | 52:a51c77007319 | 693 | * @arg SDIO_FLAG_RXOVERR: Received FIFO overrun error |
mbed_official | 52:a51c77007319 | 694 | * @arg SDIO_FLAG_CMDREND: Command response received (CRC check passed) |
mbed_official | 52:a51c77007319 | 695 | * @arg SDIO_FLAG_CMDSENT: Command sent (no response required) |
mbed_official | 52:a51c77007319 | 696 | * @arg SDIO_FLAG_DATAEND: Data end (data counter, SDIDCOUNT, is zero) |
mbed_official | 52:a51c77007319 | 697 | * @arg SDIO_FLAG_STBITERR: Start bit not detected on all data signals in wide |
mbed_official | 52:a51c77007319 | 698 | * bus mode |
mbed_official | 52:a51c77007319 | 699 | * @arg SDIO_FLAG_DBCKEND: Data block sent/received (CRC check passed) |
mbed_official | 52:a51c77007319 | 700 | * @arg SDIO_FLAG_SDIOIT: SD I/O interrupt received |
mbed_official | 52:a51c77007319 | 701 | * @arg SDIO_FLAG_CEATAEND: CE-ATA command completion signal received for CMD61 |
mbed_official | 52:a51c77007319 | 702 | * @retval None |
mbed_official | 52:a51c77007319 | 703 | */ |
mbed_official | 52:a51c77007319 | 704 | void SDIO_ClearFlag(uint32_t SDIO_FLAG) |
mbed_official | 52:a51c77007319 | 705 | { |
mbed_official | 52:a51c77007319 | 706 | /* Check the parameters */ |
mbed_official | 52:a51c77007319 | 707 | assert_param(IS_SDIO_CLEAR_FLAG(SDIO_FLAG)); |
mbed_official | 52:a51c77007319 | 708 | |
mbed_official | 52:a51c77007319 | 709 | SDIO->ICR = SDIO_FLAG; |
mbed_official | 52:a51c77007319 | 710 | } |
mbed_official | 52:a51c77007319 | 711 | |
mbed_official | 52:a51c77007319 | 712 | /** |
mbed_official | 52:a51c77007319 | 713 | * @brief Checks whether the specified SDIO interrupt has occurred or not. |
mbed_official | 52:a51c77007319 | 714 | * @param SDIO_IT: specifies the SDIO interrupt source to check. |
mbed_official | 52:a51c77007319 | 715 | * This parameter can be one of the following values: |
mbed_official | 52:a51c77007319 | 716 | * @arg SDIO_IT_CCRCFAIL: Command response received (CRC check failed) interrupt |
mbed_official | 52:a51c77007319 | 717 | * @arg SDIO_IT_DCRCFAIL: Data block sent/received (CRC check failed) interrupt |
mbed_official | 52:a51c77007319 | 718 | * @arg SDIO_IT_CTIMEOUT: Command response timeout interrupt |
mbed_official | 52:a51c77007319 | 719 | * @arg SDIO_IT_DTIMEOUT: Data timeout interrupt |
mbed_official | 52:a51c77007319 | 720 | * @arg SDIO_IT_TXUNDERR: Transmit FIFO underrun error interrupt |
mbed_official | 52:a51c77007319 | 721 | * @arg SDIO_IT_RXOVERR: Received FIFO overrun error interrupt |
mbed_official | 52:a51c77007319 | 722 | * @arg SDIO_IT_CMDREND: Command response received (CRC check passed) interrupt |
mbed_official | 52:a51c77007319 | 723 | * @arg SDIO_IT_CMDSENT: Command sent (no response required) interrupt |
mbed_official | 52:a51c77007319 | 724 | * @arg SDIO_IT_DATAEND: Data end (data counter, SDIDCOUNT, is zero) interrupt |
mbed_official | 52:a51c77007319 | 725 | * @arg SDIO_IT_STBITERR: Start bit not detected on all data signals in wide |
mbed_official | 52:a51c77007319 | 726 | * bus mode interrupt |
mbed_official | 52:a51c77007319 | 727 | * @arg SDIO_IT_DBCKEND: Data block sent/received (CRC check passed) interrupt |
mbed_official | 52:a51c77007319 | 728 | * @arg SDIO_IT_CMDACT: Command transfer in progress interrupt |
mbed_official | 52:a51c77007319 | 729 | * @arg SDIO_IT_TXACT: Data transmit in progress interrupt |
mbed_official | 52:a51c77007319 | 730 | * @arg SDIO_IT_RXACT: Data receive in progress interrupt |
mbed_official | 52:a51c77007319 | 731 | * @arg SDIO_IT_TXFIFOHE: Transmit FIFO Half Empty interrupt |
mbed_official | 52:a51c77007319 | 732 | * @arg SDIO_IT_RXFIFOHF: Receive FIFO Half Full interrupt |
mbed_official | 52:a51c77007319 | 733 | * @arg SDIO_IT_TXFIFOF: Transmit FIFO full interrupt |
mbed_official | 52:a51c77007319 | 734 | * @arg SDIO_IT_RXFIFOF: Receive FIFO full interrupt |
mbed_official | 52:a51c77007319 | 735 | * @arg SDIO_IT_TXFIFOE: Transmit FIFO empty interrupt |
mbed_official | 52:a51c77007319 | 736 | * @arg SDIO_IT_RXFIFOE: Receive FIFO empty interrupt |
mbed_official | 52:a51c77007319 | 737 | * @arg SDIO_IT_TXDAVL: Data available in transmit FIFO interrupt |
mbed_official | 52:a51c77007319 | 738 | * @arg SDIO_IT_RXDAVL: Data available in receive FIFO interrupt |
mbed_official | 52:a51c77007319 | 739 | * @arg SDIO_IT_SDIOIT: SD I/O interrupt received interrupt |
mbed_official | 52:a51c77007319 | 740 | * @arg SDIO_IT_CEATAEND: CE-ATA command completion signal received for CMD61 interrupt |
mbed_official | 52:a51c77007319 | 741 | * @retval The new state of SDIO_IT (SET or RESET). |
mbed_official | 52:a51c77007319 | 742 | */ |
mbed_official | 52:a51c77007319 | 743 | ITStatus SDIO_GetITStatus(uint32_t SDIO_IT) |
mbed_official | 52:a51c77007319 | 744 | { |
mbed_official | 52:a51c77007319 | 745 | ITStatus bitstatus = RESET; |
mbed_official | 52:a51c77007319 | 746 | |
mbed_official | 52:a51c77007319 | 747 | /* Check the parameters */ |
mbed_official | 52:a51c77007319 | 748 | assert_param(IS_SDIO_GET_IT(SDIO_IT)); |
mbed_official | 52:a51c77007319 | 749 | if ((SDIO->STA & SDIO_IT) != (uint32_t)RESET) |
mbed_official | 52:a51c77007319 | 750 | { |
mbed_official | 52:a51c77007319 | 751 | bitstatus = SET; |
mbed_official | 52:a51c77007319 | 752 | } |
mbed_official | 52:a51c77007319 | 753 | else |
mbed_official | 52:a51c77007319 | 754 | { |
mbed_official | 52:a51c77007319 | 755 | bitstatus = RESET; |
mbed_official | 52:a51c77007319 | 756 | } |
mbed_official | 52:a51c77007319 | 757 | return bitstatus; |
mbed_official | 52:a51c77007319 | 758 | } |
mbed_official | 52:a51c77007319 | 759 | |
mbed_official | 52:a51c77007319 | 760 | /** |
mbed_official | 52:a51c77007319 | 761 | * @brief Clears the SDIO's interrupt pending bits. |
mbed_official | 52:a51c77007319 | 762 | * @param SDIO_IT: specifies the interrupt pending bit to clear. |
mbed_official | 52:a51c77007319 | 763 | * This parameter can be one or a combination of the following values: |
mbed_official | 52:a51c77007319 | 764 | * @arg SDIO_IT_CCRCFAIL: Command response received (CRC check failed) interrupt |
mbed_official | 52:a51c77007319 | 765 | * @arg SDIO_IT_DCRCFAIL: Data block sent/received (CRC check failed) interrupt |
mbed_official | 52:a51c77007319 | 766 | * @arg SDIO_IT_CTIMEOUT: Command response timeout interrupt |
mbed_official | 52:a51c77007319 | 767 | * @arg SDIO_IT_DTIMEOUT: Data timeout interrupt |
mbed_official | 52:a51c77007319 | 768 | * @arg SDIO_IT_TXUNDERR: Transmit FIFO underrun error interrupt |
mbed_official | 52:a51c77007319 | 769 | * @arg SDIO_IT_RXOVERR: Received FIFO overrun error interrupt |
mbed_official | 52:a51c77007319 | 770 | * @arg SDIO_IT_CMDREND: Command response received (CRC check passed) interrupt |
mbed_official | 52:a51c77007319 | 771 | * @arg SDIO_IT_CMDSENT: Command sent (no response required) interrupt |
mbed_official | 52:a51c77007319 | 772 | * @arg SDIO_IT_DATAEND: Data end (data counter, SDIDCOUNT, is zero) interrupt |
mbed_official | 52:a51c77007319 | 773 | * @arg SDIO_IT_STBITERR: Start bit not detected on all data signals in wide |
mbed_official | 52:a51c77007319 | 774 | * bus mode interrupt |
mbed_official | 52:a51c77007319 | 775 | * @arg SDIO_IT_SDIOIT: SD I/O interrupt received interrupt |
mbed_official | 52:a51c77007319 | 776 | * @arg SDIO_IT_CEATAEND: CE-ATA command completion signal received for CMD61 |
mbed_official | 52:a51c77007319 | 777 | * @retval None |
mbed_official | 52:a51c77007319 | 778 | */ |
mbed_official | 52:a51c77007319 | 779 | void SDIO_ClearITPendingBit(uint32_t SDIO_IT) |
mbed_official | 52:a51c77007319 | 780 | { |
mbed_official | 52:a51c77007319 | 781 | /* Check the parameters */ |
mbed_official | 52:a51c77007319 | 782 | assert_param(IS_SDIO_CLEAR_IT(SDIO_IT)); |
mbed_official | 52:a51c77007319 | 783 | |
mbed_official | 52:a51c77007319 | 784 | SDIO->ICR = SDIO_IT; |
mbed_official | 52:a51c77007319 | 785 | } |
mbed_official | 52:a51c77007319 | 786 | |
mbed_official | 52:a51c77007319 | 787 | /** |
mbed_official | 52:a51c77007319 | 788 | * @} |
mbed_official | 52:a51c77007319 | 789 | */ |
mbed_official | 52:a51c77007319 | 790 | |
mbed_official | 52:a51c77007319 | 791 | /** |
mbed_official | 52:a51c77007319 | 792 | * @} |
mbed_official | 52:a51c77007319 | 793 | */ |
mbed_official | 52:a51c77007319 | 794 | |
mbed_official | 52:a51c77007319 | 795 | /** |
mbed_official | 52:a51c77007319 | 796 | * @} |
mbed_official | 52:a51c77007319 | 797 | */ |
mbed_official | 52:a51c77007319 | 798 | |
mbed_official | 52:a51c77007319 | 799 | /******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/ |