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mbed library sources
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targets/cmsis/TARGET_STM/TARGET_NUCLEO_F103RB/stm32f10x_dma.h@52:a51c77007319, 2013-12-02 (annotated)
- Committer:
- mbed_official
- Date:
- Mon Dec 02 11:30:05 2013 +0000
- Revision:
- 52:a51c77007319
- Child:
- 70:c1fbde68b492
Synchronized with git revision 49df530ae72ce97ccc773d1f2c13b38e868e6abd
Full URL: https://github.com/mbedmicro/mbed/commit/49df530ae72ce97ccc773d1f2c13b38e868e6abd/
Add STMicroelectronics NUCLEO_F103RB target
Who changed what in which revision?
| User | Revision | Line number | New contents of line |
|---|---|---|---|
| mbed_official | 52:a51c77007319 | 1 | /** |
| mbed_official | 52:a51c77007319 | 2 | ****************************************************************************** |
| mbed_official | 52:a51c77007319 | 3 | * @file stm32f10x_dma.h |
| mbed_official | 52:a51c77007319 | 4 | * @author MCD Application Team |
| mbed_official | 52:a51c77007319 | 5 | * @version V3.5.0 |
| mbed_official | 52:a51c77007319 | 6 | * @date 11-March-2011 |
| mbed_official | 52:a51c77007319 | 7 | * @brief This file contains all the functions prototypes for the DMA firmware |
| mbed_official | 52:a51c77007319 | 8 | * library. |
| mbed_official | 52:a51c77007319 | 9 | ****************************************************************************** |
| mbed_official | 52:a51c77007319 | 10 | * @attention |
| mbed_official | 52:a51c77007319 | 11 | * |
| mbed_official | 52:a51c77007319 | 12 | * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS |
| mbed_official | 52:a51c77007319 | 13 | * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE |
| mbed_official | 52:a51c77007319 | 14 | * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY |
| mbed_official | 52:a51c77007319 | 15 | * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING |
| mbed_official | 52:a51c77007319 | 16 | * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE |
| mbed_official | 52:a51c77007319 | 17 | * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. |
| mbed_official | 52:a51c77007319 | 18 | * |
| mbed_official | 52:a51c77007319 | 19 | * <h2><center>© COPYRIGHT 2011 STMicroelectronics</center></h2> |
| mbed_official | 52:a51c77007319 | 20 | ****************************************************************************** |
| mbed_official | 52:a51c77007319 | 21 | */ |
| mbed_official | 52:a51c77007319 | 22 | |
| mbed_official | 52:a51c77007319 | 23 | /* Define to prevent recursive inclusion -------------------------------------*/ |
| mbed_official | 52:a51c77007319 | 24 | #ifndef __STM32F10x_DMA_H |
| mbed_official | 52:a51c77007319 | 25 | #define __STM32F10x_DMA_H |
| mbed_official | 52:a51c77007319 | 26 | |
| mbed_official | 52:a51c77007319 | 27 | #ifdef __cplusplus |
| mbed_official | 52:a51c77007319 | 28 | extern "C" { |
| mbed_official | 52:a51c77007319 | 29 | #endif |
| mbed_official | 52:a51c77007319 | 30 | |
| mbed_official | 52:a51c77007319 | 31 | /* Includes ------------------------------------------------------------------*/ |
| mbed_official | 52:a51c77007319 | 32 | #include "stm32f10x.h" |
| mbed_official | 52:a51c77007319 | 33 | |
| mbed_official | 52:a51c77007319 | 34 | /** @addtogroup STM32F10x_StdPeriph_Driver |
| mbed_official | 52:a51c77007319 | 35 | * @{ |
| mbed_official | 52:a51c77007319 | 36 | */ |
| mbed_official | 52:a51c77007319 | 37 | |
| mbed_official | 52:a51c77007319 | 38 | /** @addtogroup DMA |
| mbed_official | 52:a51c77007319 | 39 | * @{ |
| mbed_official | 52:a51c77007319 | 40 | */ |
| mbed_official | 52:a51c77007319 | 41 | |
| mbed_official | 52:a51c77007319 | 42 | /** @defgroup DMA_Exported_Types |
| mbed_official | 52:a51c77007319 | 43 | * @{ |
| mbed_official | 52:a51c77007319 | 44 | */ |
| mbed_official | 52:a51c77007319 | 45 | |
| mbed_official | 52:a51c77007319 | 46 | /** |
| mbed_official | 52:a51c77007319 | 47 | * @brief DMA Init structure definition |
| mbed_official | 52:a51c77007319 | 48 | */ |
| mbed_official | 52:a51c77007319 | 49 | |
| mbed_official | 52:a51c77007319 | 50 | typedef struct |
| mbed_official | 52:a51c77007319 | 51 | { |
| mbed_official | 52:a51c77007319 | 52 | uint32_t DMA_PeripheralBaseAddr; /*!< Specifies the peripheral base address for DMAy Channelx. */ |
| mbed_official | 52:a51c77007319 | 53 | |
| mbed_official | 52:a51c77007319 | 54 | uint32_t DMA_MemoryBaseAddr; /*!< Specifies the memory base address for DMAy Channelx. */ |
| mbed_official | 52:a51c77007319 | 55 | |
| mbed_official | 52:a51c77007319 | 56 | uint32_t DMA_DIR; /*!< Specifies if the peripheral is the source or destination. |
| mbed_official | 52:a51c77007319 | 57 | This parameter can be a value of @ref DMA_data_transfer_direction */ |
| mbed_official | 52:a51c77007319 | 58 | |
| mbed_official | 52:a51c77007319 | 59 | uint32_t DMA_BufferSize; /*!< Specifies the buffer size, in data unit, of the specified Channel. |
| mbed_official | 52:a51c77007319 | 60 | The data unit is equal to the configuration set in DMA_PeripheralDataSize |
| mbed_official | 52:a51c77007319 | 61 | or DMA_MemoryDataSize members depending in the transfer direction. */ |
| mbed_official | 52:a51c77007319 | 62 | |
| mbed_official | 52:a51c77007319 | 63 | uint32_t DMA_PeripheralInc; /*!< Specifies whether the Peripheral address register is incremented or not. |
| mbed_official | 52:a51c77007319 | 64 | This parameter can be a value of @ref DMA_peripheral_incremented_mode */ |
| mbed_official | 52:a51c77007319 | 65 | |
| mbed_official | 52:a51c77007319 | 66 | uint32_t DMA_MemoryInc; /*!< Specifies whether the memory address register is incremented or not. |
| mbed_official | 52:a51c77007319 | 67 | This parameter can be a value of @ref DMA_memory_incremented_mode */ |
| mbed_official | 52:a51c77007319 | 68 | |
| mbed_official | 52:a51c77007319 | 69 | uint32_t DMA_PeripheralDataSize; /*!< Specifies the Peripheral data width. |
| mbed_official | 52:a51c77007319 | 70 | This parameter can be a value of @ref DMA_peripheral_data_size */ |
| mbed_official | 52:a51c77007319 | 71 | |
| mbed_official | 52:a51c77007319 | 72 | uint32_t DMA_MemoryDataSize; /*!< Specifies the Memory data width. |
| mbed_official | 52:a51c77007319 | 73 | This parameter can be a value of @ref DMA_memory_data_size */ |
| mbed_official | 52:a51c77007319 | 74 | |
| mbed_official | 52:a51c77007319 | 75 | uint32_t DMA_Mode; /*!< Specifies the operation mode of the DMAy Channelx. |
| mbed_official | 52:a51c77007319 | 76 | This parameter can be a value of @ref DMA_circular_normal_mode. |
| mbed_official | 52:a51c77007319 | 77 | @note: The circular buffer mode cannot be used if the memory-to-memory |
| mbed_official | 52:a51c77007319 | 78 | data transfer is configured on the selected Channel */ |
| mbed_official | 52:a51c77007319 | 79 | |
| mbed_official | 52:a51c77007319 | 80 | uint32_t DMA_Priority; /*!< Specifies the software priority for the DMAy Channelx. |
| mbed_official | 52:a51c77007319 | 81 | This parameter can be a value of @ref DMA_priority_level */ |
| mbed_official | 52:a51c77007319 | 82 | |
| mbed_official | 52:a51c77007319 | 83 | uint32_t DMA_M2M; /*!< Specifies if the DMAy Channelx will be used in memory-to-memory transfer. |
| mbed_official | 52:a51c77007319 | 84 | This parameter can be a value of @ref DMA_memory_to_memory */ |
| mbed_official | 52:a51c77007319 | 85 | }DMA_InitTypeDef; |
| mbed_official | 52:a51c77007319 | 86 | |
| mbed_official | 52:a51c77007319 | 87 | /** |
| mbed_official | 52:a51c77007319 | 88 | * @} |
| mbed_official | 52:a51c77007319 | 89 | */ |
| mbed_official | 52:a51c77007319 | 90 | |
| mbed_official | 52:a51c77007319 | 91 | /** @defgroup DMA_Exported_Constants |
| mbed_official | 52:a51c77007319 | 92 | * @{ |
| mbed_official | 52:a51c77007319 | 93 | */ |
| mbed_official | 52:a51c77007319 | 94 | |
| mbed_official | 52:a51c77007319 | 95 | #define IS_DMA_ALL_PERIPH(PERIPH) (((PERIPH) == DMA1_Channel1) || \ |
| mbed_official | 52:a51c77007319 | 96 | ((PERIPH) == DMA1_Channel2) || \ |
| mbed_official | 52:a51c77007319 | 97 | ((PERIPH) == DMA1_Channel3) || \ |
| mbed_official | 52:a51c77007319 | 98 | ((PERIPH) == DMA1_Channel4) || \ |
| mbed_official | 52:a51c77007319 | 99 | ((PERIPH) == DMA1_Channel5) || \ |
| mbed_official | 52:a51c77007319 | 100 | ((PERIPH) == DMA1_Channel6) || \ |
| mbed_official | 52:a51c77007319 | 101 | ((PERIPH) == DMA1_Channel7) || \ |
| mbed_official | 52:a51c77007319 | 102 | ((PERIPH) == DMA2_Channel1) || \ |
| mbed_official | 52:a51c77007319 | 103 | ((PERIPH) == DMA2_Channel2) || \ |
| mbed_official | 52:a51c77007319 | 104 | ((PERIPH) == DMA2_Channel3) || \ |
| mbed_official | 52:a51c77007319 | 105 | ((PERIPH) == DMA2_Channel4) || \ |
| mbed_official | 52:a51c77007319 | 106 | ((PERIPH) == DMA2_Channel5)) |
| mbed_official | 52:a51c77007319 | 107 | |
| mbed_official | 52:a51c77007319 | 108 | /** @defgroup DMA_data_transfer_direction |
| mbed_official | 52:a51c77007319 | 109 | * @{ |
| mbed_official | 52:a51c77007319 | 110 | */ |
| mbed_official | 52:a51c77007319 | 111 | |
| mbed_official | 52:a51c77007319 | 112 | #define DMA_DIR_PeripheralDST ((uint32_t)0x00000010) |
| mbed_official | 52:a51c77007319 | 113 | #define DMA_DIR_PeripheralSRC ((uint32_t)0x00000000) |
| mbed_official | 52:a51c77007319 | 114 | #define IS_DMA_DIR(DIR) (((DIR) == DMA_DIR_PeripheralDST) || \ |
| mbed_official | 52:a51c77007319 | 115 | ((DIR) == DMA_DIR_PeripheralSRC)) |
| mbed_official | 52:a51c77007319 | 116 | /** |
| mbed_official | 52:a51c77007319 | 117 | * @} |
| mbed_official | 52:a51c77007319 | 118 | */ |
| mbed_official | 52:a51c77007319 | 119 | |
| mbed_official | 52:a51c77007319 | 120 | /** @defgroup DMA_peripheral_incremented_mode |
| mbed_official | 52:a51c77007319 | 121 | * @{ |
| mbed_official | 52:a51c77007319 | 122 | */ |
| mbed_official | 52:a51c77007319 | 123 | |
| mbed_official | 52:a51c77007319 | 124 | #define DMA_PeripheralInc_Enable ((uint32_t)0x00000040) |
| mbed_official | 52:a51c77007319 | 125 | #define DMA_PeripheralInc_Disable ((uint32_t)0x00000000) |
| mbed_official | 52:a51c77007319 | 126 | #define IS_DMA_PERIPHERAL_INC_STATE(STATE) (((STATE) == DMA_PeripheralInc_Enable) || \ |
| mbed_official | 52:a51c77007319 | 127 | ((STATE) == DMA_PeripheralInc_Disable)) |
| mbed_official | 52:a51c77007319 | 128 | /** |
| mbed_official | 52:a51c77007319 | 129 | * @} |
| mbed_official | 52:a51c77007319 | 130 | */ |
| mbed_official | 52:a51c77007319 | 131 | |
| mbed_official | 52:a51c77007319 | 132 | /** @defgroup DMA_memory_incremented_mode |
| mbed_official | 52:a51c77007319 | 133 | * @{ |
| mbed_official | 52:a51c77007319 | 134 | */ |
| mbed_official | 52:a51c77007319 | 135 | |
| mbed_official | 52:a51c77007319 | 136 | #define DMA_MemoryInc_Enable ((uint32_t)0x00000080) |
| mbed_official | 52:a51c77007319 | 137 | #define DMA_MemoryInc_Disable ((uint32_t)0x00000000) |
| mbed_official | 52:a51c77007319 | 138 | #define IS_DMA_MEMORY_INC_STATE(STATE) (((STATE) == DMA_MemoryInc_Enable) || \ |
| mbed_official | 52:a51c77007319 | 139 | ((STATE) == DMA_MemoryInc_Disable)) |
| mbed_official | 52:a51c77007319 | 140 | /** |
| mbed_official | 52:a51c77007319 | 141 | * @} |
| mbed_official | 52:a51c77007319 | 142 | */ |
| mbed_official | 52:a51c77007319 | 143 | |
| mbed_official | 52:a51c77007319 | 144 | /** @defgroup DMA_peripheral_data_size |
| mbed_official | 52:a51c77007319 | 145 | * @{ |
| mbed_official | 52:a51c77007319 | 146 | */ |
| mbed_official | 52:a51c77007319 | 147 | |
| mbed_official | 52:a51c77007319 | 148 | #define DMA_PeripheralDataSize_Byte ((uint32_t)0x00000000) |
| mbed_official | 52:a51c77007319 | 149 | #define DMA_PeripheralDataSize_HalfWord ((uint32_t)0x00000100) |
| mbed_official | 52:a51c77007319 | 150 | #define DMA_PeripheralDataSize_Word ((uint32_t)0x00000200) |
| mbed_official | 52:a51c77007319 | 151 | #define IS_DMA_PERIPHERAL_DATA_SIZE(SIZE) (((SIZE) == DMA_PeripheralDataSize_Byte) || \ |
| mbed_official | 52:a51c77007319 | 152 | ((SIZE) == DMA_PeripheralDataSize_HalfWord) || \ |
| mbed_official | 52:a51c77007319 | 153 | ((SIZE) == DMA_PeripheralDataSize_Word)) |
| mbed_official | 52:a51c77007319 | 154 | /** |
| mbed_official | 52:a51c77007319 | 155 | * @} |
| mbed_official | 52:a51c77007319 | 156 | */ |
| mbed_official | 52:a51c77007319 | 157 | |
| mbed_official | 52:a51c77007319 | 158 | /** @defgroup DMA_memory_data_size |
| mbed_official | 52:a51c77007319 | 159 | * @{ |
| mbed_official | 52:a51c77007319 | 160 | */ |
| mbed_official | 52:a51c77007319 | 161 | |
| mbed_official | 52:a51c77007319 | 162 | #define DMA_MemoryDataSize_Byte ((uint32_t)0x00000000) |
| mbed_official | 52:a51c77007319 | 163 | #define DMA_MemoryDataSize_HalfWord ((uint32_t)0x00000400) |
| mbed_official | 52:a51c77007319 | 164 | #define DMA_MemoryDataSize_Word ((uint32_t)0x00000800) |
| mbed_official | 52:a51c77007319 | 165 | #define IS_DMA_MEMORY_DATA_SIZE(SIZE) (((SIZE) == DMA_MemoryDataSize_Byte) || \ |
| mbed_official | 52:a51c77007319 | 166 | ((SIZE) == DMA_MemoryDataSize_HalfWord) || \ |
| mbed_official | 52:a51c77007319 | 167 | ((SIZE) == DMA_MemoryDataSize_Word)) |
| mbed_official | 52:a51c77007319 | 168 | /** |
| mbed_official | 52:a51c77007319 | 169 | * @} |
| mbed_official | 52:a51c77007319 | 170 | */ |
| mbed_official | 52:a51c77007319 | 171 | |
| mbed_official | 52:a51c77007319 | 172 | /** @defgroup DMA_circular_normal_mode |
| mbed_official | 52:a51c77007319 | 173 | * @{ |
| mbed_official | 52:a51c77007319 | 174 | */ |
| mbed_official | 52:a51c77007319 | 175 | |
| mbed_official | 52:a51c77007319 | 176 | #define DMA_Mode_Circular ((uint32_t)0x00000020) |
| mbed_official | 52:a51c77007319 | 177 | #define DMA_Mode_Normal ((uint32_t)0x00000000) |
| mbed_official | 52:a51c77007319 | 178 | #define IS_DMA_MODE(MODE) (((MODE) == DMA_Mode_Circular) || ((MODE) == DMA_Mode_Normal)) |
| mbed_official | 52:a51c77007319 | 179 | /** |
| mbed_official | 52:a51c77007319 | 180 | * @} |
| mbed_official | 52:a51c77007319 | 181 | */ |
| mbed_official | 52:a51c77007319 | 182 | |
| mbed_official | 52:a51c77007319 | 183 | /** @defgroup DMA_priority_level |
| mbed_official | 52:a51c77007319 | 184 | * @{ |
| mbed_official | 52:a51c77007319 | 185 | */ |
| mbed_official | 52:a51c77007319 | 186 | |
| mbed_official | 52:a51c77007319 | 187 | #define DMA_Priority_VeryHigh ((uint32_t)0x00003000) |
| mbed_official | 52:a51c77007319 | 188 | #define DMA_Priority_High ((uint32_t)0x00002000) |
| mbed_official | 52:a51c77007319 | 189 | #define DMA_Priority_Medium ((uint32_t)0x00001000) |
| mbed_official | 52:a51c77007319 | 190 | #define DMA_Priority_Low ((uint32_t)0x00000000) |
| mbed_official | 52:a51c77007319 | 191 | #define IS_DMA_PRIORITY(PRIORITY) (((PRIORITY) == DMA_Priority_VeryHigh) || \ |
| mbed_official | 52:a51c77007319 | 192 | ((PRIORITY) == DMA_Priority_High) || \ |
| mbed_official | 52:a51c77007319 | 193 | ((PRIORITY) == DMA_Priority_Medium) || \ |
| mbed_official | 52:a51c77007319 | 194 | ((PRIORITY) == DMA_Priority_Low)) |
| mbed_official | 52:a51c77007319 | 195 | /** |
| mbed_official | 52:a51c77007319 | 196 | * @} |
| mbed_official | 52:a51c77007319 | 197 | */ |
| mbed_official | 52:a51c77007319 | 198 | |
| mbed_official | 52:a51c77007319 | 199 | /** @defgroup DMA_memory_to_memory |
| mbed_official | 52:a51c77007319 | 200 | * @{ |
| mbed_official | 52:a51c77007319 | 201 | */ |
| mbed_official | 52:a51c77007319 | 202 | |
| mbed_official | 52:a51c77007319 | 203 | #define DMA_M2M_Enable ((uint32_t)0x00004000) |
| mbed_official | 52:a51c77007319 | 204 | #define DMA_M2M_Disable ((uint32_t)0x00000000) |
| mbed_official | 52:a51c77007319 | 205 | #define IS_DMA_M2M_STATE(STATE) (((STATE) == DMA_M2M_Enable) || ((STATE) == DMA_M2M_Disable)) |
| mbed_official | 52:a51c77007319 | 206 | |
| mbed_official | 52:a51c77007319 | 207 | /** |
| mbed_official | 52:a51c77007319 | 208 | * @} |
| mbed_official | 52:a51c77007319 | 209 | */ |
| mbed_official | 52:a51c77007319 | 210 | |
| mbed_official | 52:a51c77007319 | 211 | /** @defgroup DMA_interrupts_definition |
| mbed_official | 52:a51c77007319 | 212 | * @{ |
| mbed_official | 52:a51c77007319 | 213 | */ |
| mbed_official | 52:a51c77007319 | 214 | |
| mbed_official | 52:a51c77007319 | 215 | #define DMA_IT_TC ((uint32_t)0x00000002) |
| mbed_official | 52:a51c77007319 | 216 | #define DMA_IT_HT ((uint32_t)0x00000004) |
| mbed_official | 52:a51c77007319 | 217 | #define DMA_IT_TE ((uint32_t)0x00000008) |
| mbed_official | 52:a51c77007319 | 218 | #define IS_DMA_CONFIG_IT(IT) ((((IT) & 0xFFFFFFF1) == 0x00) && ((IT) != 0x00)) |
| mbed_official | 52:a51c77007319 | 219 | |
| mbed_official | 52:a51c77007319 | 220 | #define DMA1_IT_GL1 ((uint32_t)0x00000001) |
| mbed_official | 52:a51c77007319 | 221 | #define DMA1_IT_TC1 ((uint32_t)0x00000002) |
| mbed_official | 52:a51c77007319 | 222 | #define DMA1_IT_HT1 ((uint32_t)0x00000004) |
| mbed_official | 52:a51c77007319 | 223 | #define DMA1_IT_TE1 ((uint32_t)0x00000008) |
| mbed_official | 52:a51c77007319 | 224 | #define DMA1_IT_GL2 ((uint32_t)0x00000010) |
| mbed_official | 52:a51c77007319 | 225 | #define DMA1_IT_TC2 ((uint32_t)0x00000020) |
| mbed_official | 52:a51c77007319 | 226 | #define DMA1_IT_HT2 ((uint32_t)0x00000040) |
| mbed_official | 52:a51c77007319 | 227 | #define DMA1_IT_TE2 ((uint32_t)0x00000080) |
| mbed_official | 52:a51c77007319 | 228 | #define DMA1_IT_GL3 ((uint32_t)0x00000100) |
| mbed_official | 52:a51c77007319 | 229 | #define DMA1_IT_TC3 ((uint32_t)0x00000200) |
| mbed_official | 52:a51c77007319 | 230 | #define DMA1_IT_HT3 ((uint32_t)0x00000400) |
| mbed_official | 52:a51c77007319 | 231 | #define DMA1_IT_TE3 ((uint32_t)0x00000800) |
| mbed_official | 52:a51c77007319 | 232 | #define DMA1_IT_GL4 ((uint32_t)0x00001000) |
| mbed_official | 52:a51c77007319 | 233 | #define DMA1_IT_TC4 ((uint32_t)0x00002000) |
| mbed_official | 52:a51c77007319 | 234 | #define DMA1_IT_HT4 ((uint32_t)0x00004000) |
| mbed_official | 52:a51c77007319 | 235 | #define DMA1_IT_TE4 ((uint32_t)0x00008000) |
| mbed_official | 52:a51c77007319 | 236 | #define DMA1_IT_GL5 ((uint32_t)0x00010000) |
| mbed_official | 52:a51c77007319 | 237 | #define DMA1_IT_TC5 ((uint32_t)0x00020000) |
| mbed_official | 52:a51c77007319 | 238 | #define DMA1_IT_HT5 ((uint32_t)0x00040000) |
| mbed_official | 52:a51c77007319 | 239 | #define DMA1_IT_TE5 ((uint32_t)0x00080000) |
| mbed_official | 52:a51c77007319 | 240 | #define DMA1_IT_GL6 ((uint32_t)0x00100000) |
| mbed_official | 52:a51c77007319 | 241 | #define DMA1_IT_TC6 ((uint32_t)0x00200000) |
| mbed_official | 52:a51c77007319 | 242 | #define DMA1_IT_HT6 ((uint32_t)0x00400000) |
| mbed_official | 52:a51c77007319 | 243 | #define DMA1_IT_TE6 ((uint32_t)0x00800000) |
| mbed_official | 52:a51c77007319 | 244 | #define DMA1_IT_GL7 ((uint32_t)0x01000000) |
| mbed_official | 52:a51c77007319 | 245 | #define DMA1_IT_TC7 ((uint32_t)0x02000000) |
| mbed_official | 52:a51c77007319 | 246 | #define DMA1_IT_HT7 ((uint32_t)0x04000000) |
| mbed_official | 52:a51c77007319 | 247 | #define DMA1_IT_TE7 ((uint32_t)0x08000000) |
| mbed_official | 52:a51c77007319 | 248 | |
| mbed_official | 52:a51c77007319 | 249 | #define DMA2_IT_GL1 ((uint32_t)0x10000001) |
| mbed_official | 52:a51c77007319 | 250 | #define DMA2_IT_TC1 ((uint32_t)0x10000002) |
| mbed_official | 52:a51c77007319 | 251 | #define DMA2_IT_HT1 ((uint32_t)0x10000004) |
| mbed_official | 52:a51c77007319 | 252 | #define DMA2_IT_TE1 ((uint32_t)0x10000008) |
| mbed_official | 52:a51c77007319 | 253 | #define DMA2_IT_GL2 ((uint32_t)0x10000010) |
| mbed_official | 52:a51c77007319 | 254 | #define DMA2_IT_TC2 ((uint32_t)0x10000020) |
| mbed_official | 52:a51c77007319 | 255 | #define DMA2_IT_HT2 ((uint32_t)0x10000040) |
| mbed_official | 52:a51c77007319 | 256 | #define DMA2_IT_TE2 ((uint32_t)0x10000080) |
| mbed_official | 52:a51c77007319 | 257 | #define DMA2_IT_GL3 ((uint32_t)0x10000100) |
| mbed_official | 52:a51c77007319 | 258 | #define DMA2_IT_TC3 ((uint32_t)0x10000200) |
| mbed_official | 52:a51c77007319 | 259 | #define DMA2_IT_HT3 ((uint32_t)0x10000400) |
| mbed_official | 52:a51c77007319 | 260 | #define DMA2_IT_TE3 ((uint32_t)0x10000800) |
| mbed_official | 52:a51c77007319 | 261 | #define DMA2_IT_GL4 ((uint32_t)0x10001000) |
| mbed_official | 52:a51c77007319 | 262 | #define DMA2_IT_TC4 ((uint32_t)0x10002000) |
| mbed_official | 52:a51c77007319 | 263 | #define DMA2_IT_HT4 ((uint32_t)0x10004000) |
| mbed_official | 52:a51c77007319 | 264 | #define DMA2_IT_TE4 ((uint32_t)0x10008000) |
| mbed_official | 52:a51c77007319 | 265 | #define DMA2_IT_GL5 ((uint32_t)0x10010000) |
| mbed_official | 52:a51c77007319 | 266 | #define DMA2_IT_TC5 ((uint32_t)0x10020000) |
| mbed_official | 52:a51c77007319 | 267 | #define DMA2_IT_HT5 ((uint32_t)0x10040000) |
| mbed_official | 52:a51c77007319 | 268 | #define DMA2_IT_TE5 ((uint32_t)0x10080000) |
| mbed_official | 52:a51c77007319 | 269 | |
| mbed_official | 52:a51c77007319 | 270 | #define IS_DMA_CLEAR_IT(IT) (((((IT) & 0xF0000000) == 0x00) || (((IT) & 0xEFF00000) == 0x00)) && ((IT) != 0x00)) |
| mbed_official | 52:a51c77007319 | 271 | |
| mbed_official | 52:a51c77007319 | 272 | #define IS_DMA_GET_IT(IT) (((IT) == DMA1_IT_GL1) || ((IT) == DMA1_IT_TC1) || \ |
| mbed_official | 52:a51c77007319 | 273 | ((IT) == DMA1_IT_HT1) || ((IT) == DMA1_IT_TE1) || \ |
| mbed_official | 52:a51c77007319 | 274 | ((IT) == DMA1_IT_GL2) || ((IT) == DMA1_IT_TC2) || \ |
| mbed_official | 52:a51c77007319 | 275 | ((IT) == DMA1_IT_HT2) || ((IT) == DMA1_IT_TE2) || \ |
| mbed_official | 52:a51c77007319 | 276 | ((IT) == DMA1_IT_GL3) || ((IT) == DMA1_IT_TC3) || \ |
| mbed_official | 52:a51c77007319 | 277 | ((IT) == DMA1_IT_HT3) || ((IT) == DMA1_IT_TE3) || \ |
| mbed_official | 52:a51c77007319 | 278 | ((IT) == DMA1_IT_GL4) || ((IT) == DMA1_IT_TC4) || \ |
| mbed_official | 52:a51c77007319 | 279 | ((IT) == DMA1_IT_HT4) || ((IT) == DMA1_IT_TE4) || \ |
| mbed_official | 52:a51c77007319 | 280 | ((IT) == DMA1_IT_GL5) || ((IT) == DMA1_IT_TC5) || \ |
| mbed_official | 52:a51c77007319 | 281 | ((IT) == DMA1_IT_HT5) || ((IT) == DMA1_IT_TE5) || \ |
| mbed_official | 52:a51c77007319 | 282 | ((IT) == DMA1_IT_GL6) || ((IT) == DMA1_IT_TC6) || \ |
| mbed_official | 52:a51c77007319 | 283 | ((IT) == DMA1_IT_HT6) || ((IT) == DMA1_IT_TE6) || \ |
| mbed_official | 52:a51c77007319 | 284 | ((IT) == DMA1_IT_GL7) || ((IT) == DMA1_IT_TC7) || \ |
| mbed_official | 52:a51c77007319 | 285 | ((IT) == DMA1_IT_HT7) || ((IT) == DMA1_IT_TE7) || \ |
| mbed_official | 52:a51c77007319 | 286 | ((IT) == DMA2_IT_GL1) || ((IT) == DMA2_IT_TC1) || \ |
| mbed_official | 52:a51c77007319 | 287 | ((IT) == DMA2_IT_HT1) || ((IT) == DMA2_IT_TE1) || \ |
| mbed_official | 52:a51c77007319 | 288 | ((IT) == DMA2_IT_GL2) || ((IT) == DMA2_IT_TC2) || \ |
| mbed_official | 52:a51c77007319 | 289 | ((IT) == DMA2_IT_HT2) || ((IT) == DMA2_IT_TE2) || \ |
| mbed_official | 52:a51c77007319 | 290 | ((IT) == DMA2_IT_GL3) || ((IT) == DMA2_IT_TC3) || \ |
| mbed_official | 52:a51c77007319 | 291 | ((IT) == DMA2_IT_HT3) || ((IT) == DMA2_IT_TE3) || \ |
| mbed_official | 52:a51c77007319 | 292 | ((IT) == DMA2_IT_GL4) || ((IT) == DMA2_IT_TC4) || \ |
| mbed_official | 52:a51c77007319 | 293 | ((IT) == DMA2_IT_HT4) || ((IT) == DMA2_IT_TE4) || \ |
| mbed_official | 52:a51c77007319 | 294 | ((IT) == DMA2_IT_GL5) || ((IT) == DMA2_IT_TC5) || \ |
| mbed_official | 52:a51c77007319 | 295 | ((IT) == DMA2_IT_HT5) || ((IT) == DMA2_IT_TE5)) |
| mbed_official | 52:a51c77007319 | 296 | |
| mbed_official | 52:a51c77007319 | 297 | /** |
| mbed_official | 52:a51c77007319 | 298 | * @} |
| mbed_official | 52:a51c77007319 | 299 | */ |
| mbed_official | 52:a51c77007319 | 300 | |
| mbed_official | 52:a51c77007319 | 301 | /** @defgroup DMA_flags_definition |
| mbed_official | 52:a51c77007319 | 302 | * @{ |
| mbed_official | 52:a51c77007319 | 303 | */ |
| mbed_official | 52:a51c77007319 | 304 | #define DMA1_FLAG_GL1 ((uint32_t)0x00000001) |
| mbed_official | 52:a51c77007319 | 305 | #define DMA1_FLAG_TC1 ((uint32_t)0x00000002) |
| mbed_official | 52:a51c77007319 | 306 | #define DMA1_FLAG_HT1 ((uint32_t)0x00000004) |
| mbed_official | 52:a51c77007319 | 307 | #define DMA1_FLAG_TE1 ((uint32_t)0x00000008) |
| mbed_official | 52:a51c77007319 | 308 | #define DMA1_FLAG_GL2 ((uint32_t)0x00000010) |
| mbed_official | 52:a51c77007319 | 309 | #define DMA1_FLAG_TC2 ((uint32_t)0x00000020) |
| mbed_official | 52:a51c77007319 | 310 | #define DMA1_FLAG_HT2 ((uint32_t)0x00000040) |
| mbed_official | 52:a51c77007319 | 311 | #define DMA1_FLAG_TE2 ((uint32_t)0x00000080) |
| mbed_official | 52:a51c77007319 | 312 | #define DMA1_FLAG_GL3 ((uint32_t)0x00000100) |
| mbed_official | 52:a51c77007319 | 313 | #define DMA1_FLAG_TC3 ((uint32_t)0x00000200) |
| mbed_official | 52:a51c77007319 | 314 | #define DMA1_FLAG_HT3 ((uint32_t)0x00000400) |
| mbed_official | 52:a51c77007319 | 315 | #define DMA1_FLAG_TE3 ((uint32_t)0x00000800) |
| mbed_official | 52:a51c77007319 | 316 | #define DMA1_FLAG_GL4 ((uint32_t)0x00001000) |
| mbed_official | 52:a51c77007319 | 317 | #define DMA1_FLAG_TC4 ((uint32_t)0x00002000) |
| mbed_official | 52:a51c77007319 | 318 | #define DMA1_FLAG_HT4 ((uint32_t)0x00004000) |
| mbed_official | 52:a51c77007319 | 319 | #define DMA1_FLAG_TE4 ((uint32_t)0x00008000) |
| mbed_official | 52:a51c77007319 | 320 | #define DMA1_FLAG_GL5 ((uint32_t)0x00010000) |
| mbed_official | 52:a51c77007319 | 321 | #define DMA1_FLAG_TC5 ((uint32_t)0x00020000) |
| mbed_official | 52:a51c77007319 | 322 | #define DMA1_FLAG_HT5 ((uint32_t)0x00040000) |
| mbed_official | 52:a51c77007319 | 323 | #define DMA1_FLAG_TE5 ((uint32_t)0x00080000) |
| mbed_official | 52:a51c77007319 | 324 | #define DMA1_FLAG_GL6 ((uint32_t)0x00100000) |
| mbed_official | 52:a51c77007319 | 325 | #define DMA1_FLAG_TC6 ((uint32_t)0x00200000) |
| mbed_official | 52:a51c77007319 | 326 | #define DMA1_FLAG_HT6 ((uint32_t)0x00400000) |
| mbed_official | 52:a51c77007319 | 327 | #define DMA1_FLAG_TE6 ((uint32_t)0x00800000) |
| mbed_official | 52:a51c77007319 | 328 | #define DMA1_FLAG_GL7 ((uint32_t)0x01000000) |
| mbed_official | 52:a51c77007319 | 329 | #define DMA1_FLAG_TC7 ((uint32_t)0x02000000) |
| mbed_official | 52:a51c77007319 | 330 | #define DMA1_FLAG_HT7 ((uint32_t)0x04000000) |
| mbed_official | 52:a51c77007319 | 331 | #define DMA1_FLAG_TE7 ((uint32_t)0x08000000) |
| mbed_official | 52:a51c77007319 | 332 | |
| mbed_official | 52:a51c77007319 | 333 | #define DMA2_FLAG_GL1 ((uint32_t)0x10000001) |
| mbed_official | 52:a51c77007319 | 334 | #define DMA2_FLAG_TC1 ((uint32_t)0x10000002) |
| mbed_official | 52:a51c77007319 | 335 | #define DMA2_FLAG_HT1 ((uint32_t)0x10000004) |
| mbed_official | 52:a51c77007319 | 336 | #define DMA2_FLAG_TE1 ((uint32_t)0x10000008) |
| mbed_official | 52:a51c77007319 | 337 | #define DMA2_FLAG_GL2 ((uint32_t)0x10000010) |
| mbed_official | 52:a51c77007319 | 338 | #define DMA2_FLAG_TC2 ((uint32_t)0x10000020) |
| mbed_official | 52:a51c77007319 | 339 | #define DMA2_FLAG_HT2 ((uint32_t)0x10000040) |
| mbed_official | 52:a51c77007319 | 340 | #define DMA2_FLAG_TE2 ((uint32_t)0x10000080) |
| mbed_official | 52:a51c77007319 | 341 | #define DMA2_FLAG_GL3 ((uint32_t)0x10000100) |
| mbed_official | 52:a51c77007319 | 342 | #define DMA2_FLAG_TC3 ((uint32_t)0x10000200) |
| mbed_official | 52:a51c77007319 | 343 | #define DMA2_FLAG_HT3 ((uint32_t)0x10000400) |
| mbed_official | 52:a51c77007319 | 344 | #define DMA2_FLAG_TE3 ((uint32_t)0x10000800) |
| mbed_official | 52:a51c77007319 | 345 | #define DMA2_FLAG_GL4 ((uint32_t)0x10001000) |
| mbed_official | 52:a51c77007319 | 346 | #define DMA2_FLAG_TC4 ((uint32_t)0x10002000) |
| mbed_official | 52:a51c77007319 | 347 | #define DMA2_FLAG_HT4 ((uint32_t)0x10004000) |
| mbed_official | 52:a51c77007319 | 348 | #define DMA2_FLAG_TE4 ((uint32_t)0x10008000) |
| mbed_official | 52:a51c77007319 | 349 | #define DMA2_FLAG_GL5 ((uint32_t)0x10010000) |
| mbed_official | 52:a51c77007319 | 350 | #define DMA2_FLAG_TC5 ((uint32_t)0x10020000) |
| mbed_official | 52:a51c77007319 | 351 | #define DMA2_FLAG_HT5 ((uint32_t)0x10040000) |
| mbed_official | 52:a51c77007319 | 352 | #define DMA2_FLAG_TE5 ((uint32_t)0x10080000) |
| mbed_official | 52:a51c77007319 | 353 | |
| mbed_official | 52:a51c77007319 | 354 | #define IS_DMA_CLEAR_FLAG(FLAG) (((((FLAG) & 0xF0000000) == 0x00) || (((FLAG) & 0xEFF00000) == 0x00)) && ((FLAG) != 0x00)) |
| mbed_official | 52:a51c77007319 | 355 | |
| mbed_official | 52:a51c77007319 | 356 | #define IS_DMA_GET_FLAG(FLAG) (((FLAG) == DMA1_FLAG_GL1) || ((FLAG) == DMA1_FLAG_TC1) || \ |
| mbed_official | 52:a51c77007319 | 357 | ((FLAG) == DMA1_FLAG_HT1) || ((FLAG) == DMA1_FLAG_TE1) || \ |
| mbed_official | 52:a51c77007319 | 358 | ((FLAG) == DMA1_FLAG_GL2) || ((FLAG) == DMA1_FLAG_TC2) || \ |
| mbed_official | 52:a51c77007319 | 359 | ((FLAG) == DMA1_FLAG_HT2) || ((FLAG) == DMA1_FLAG_TE2) || \ |
| mbed_official | 52:a51c77007319 | 360 | ((FLAG) == DMA1_FLAG_GL3) || ((FLAG) == DMA1_FLAG_TC3) || \ |
| mbed_official | 52:a51c77007319 | 361 | ((FLAG) == DMA1_FLAG_HT3) || ((FLAG) == DMA1_FLAG_TE3) || \ |
| mbed_official | 52:a51c77007319 | 362 | ((FLAG) == DMA1_FLAG_GL4) || ((FLAG) == DMA1_FLAG_TC4) || \ |
| mbed_official | 52:a51c77007319 | 363 | ((FLAG) == DMA1_FLAG_HT4) || ((FLAG) == DMA1_FLAG_TE4) || \ |
| mbed_official | 52:a51c77007319 | 364 | ((FLAG) == DMA1_FLAG_GL5) || ((FLAG) == DMA1_FLAG_TC5) || \ |
| mbed_official | 52:a51c77007319 | 365 | ((FLAG) == DMA1_FLAG_HT5) || ((FLAG) == DMA1_FLAG_TE5) || \ |
| mbed_official | 52:a51c77007319 | 366 | ((FLAG) == DMA1_FLAG_GL6) || ((FLAG) == DMA1_FLAG_TC6) || \ |
| mbed_official | 52:a51c77007319 | 367 | ((FLAG) == DMA1_FLAG_HT6) || ((FLAG) == DMA1_FLAG_TE6) || \ |
| mbed_official | 52:a51c77007319 | 368 | ((FLAG) == DMA1_FLAG_GL7) || ((FLAG) == DMA1_FLAG_TC7) || \ |
| mbed_official | 52:a51c77007319 | 369 | ((FLAG) == DMA1_FLAG_HT7) || ((FLAG) == DMA1_FLAG_TE7) || \ |
| mbed_official | 52:a51c77007319 | 370 | ((FLAG) == DMA2_FLAG_GL1) || ((FLAG) == DMA2_FLAG_TC1) || \ |
| mbed_official | 52:a51c77007319 | 371 | ((FLAG) == DMA2_FLAG_HT1) || ((FLAG) == DMA2_FLAG_TE1) || \ |
| mbed_official | 52:a51c77007319 | 372 | ((FLAG) == DMA2_FLAG_GL2) || ((FLAG) == DMA2_FLAG_TC2) || \ |
| mbed_official | 52:a51c77007319 | 373 | ((FLAG) == DMA2_FLAG_HT2) || ((FLAG) == DMA2_FLAG_TE2) || \ |
| mbed_official | 52:a51c77007319 | 374 | ((FLAG) == DMA2_FLAG_GL3) || ((FLAG) == DMA2_FLAG_TC3) || \ |
| mbed_official | 52:a51c77007319 | 375 | ((FLAG) == DMA2_FLAG_HT3) || ((FLAG) == DMA2_FLAG_TE3) || \ |
| mbed_official | 52:a51c77007319 | 376 | ((FLAG) == DMA2_FLAG_GL4) || ((FLAG) == DMA2_FLAG_TC4) || \ |
| mbed_official | 52:a51c77007319 | 377 | ((FLAG) == DMA2_FLAG_HT4) || ((FLAG) == DMA2_FLAG_TE4) || \ |
| mbed_official | 52:a51c77007319 | 378 | ((FLAG) == DMA2_FLAG_GL5) || ((FLAG) == DMA2_FLAG_TC5) || \ |
| mbed_official | 52:a51c77007319 | 379 | ((FLAG) == DMA2_FLAG_HT5) || ((FLAG) == DMA2_FLAG_TE5)) |
| mbed_official | 52:a51c77007319 | 380 | /** |
| mbed_official | 52:a51c77007319 | 381 | * @} |
| mbed_official | 52:a51c77007319 | 382 | */ |
| mbed_official | 52:a51c77007319 | 383 | |
| mbed_official | 52:a51c77007319 | 384 | /** @defgroup DMA_Buffer_Size |
| mbed_official | 52:a51c77007319 | 385 | * @{ |
| mbed_official | 52:a51c77007319 | 386 | */ |
| mbed_official | 52:a51c77007319 | 387 | |
| mbed_official | 52:a51c77007319 | 388 | #define IS_DMA_BUFFER_SIZE(SIZE) (((SIZE) >= 0x1) && ((SIZE) < 0x10000)) |
| mbed_official | 52:a51c77007319 | 389 | |
| mbed_official | 52:a51c77007319 | 390 | /** |
| mbed_official | 52:a51c77007319 | 391 | * @} |
| mbed_official | 52:a51c77007319 | 392 | */ |
| mbed_official | 52:a51c77007319 | 393 | |
| mbed_official | 52:a51c77007319 | 394 | /** |
| mbed_official | 52:a51c77007319 | 395 | * @} |
| mbed_official | 52:a51c77007319 | 396 | */ |
| mbed_official | 52:a51c77007319 | 397 | |
| mbed_official | 52:a51c77007319 | 398 | /** @defgroup DMA_Exported_Macros |
| mbed_official | 52:a51c77007319 | 399 | * @{ |
| mbed_official | 52:a51c77007319 | 400 | */ |
| mbed_official | 52:a51c77007319 | 401 | |
| mbed_official | 52:a51c77007319 | 402 | /** |
| mbed_official | 52:a51c77007319 | 403 | * @} |
| mbed_official | 52:a51c77007319 | 404 | */ |
| mbed_official | 52:a51c77007319 | 405 | |
| mbed_official | 52:a51c77007319 | 406 | /** @defgroup DMA_Exported_Functions |
| mbed_official | 52:a51c77007319 | 407 | * @{ |
| mbed_official | 52:a51c77007319 | 408 | */ |
| mbed_official | 52:a51c77007319 | 409 | |
| mbed_official | 52:a51c77007319 | 410 | void DMA_DeInit(DMA_Channel_TypeDef* DMAy_Channelx); |
| mbed_official | 52:a51c77007319 | 411 | void DMA_Init(DMA_Channel_TypeDef* DMAy_Channelx, DMA_InitTypeDef* DMA_InitStruct); |
| mbed_official | 52:a51c77007319 | 412 | void DMA_StructInit(DMA_InitTypeDef* DMA_InitStruct); |
| mbed_official | 52:a51c77007319 | 413 | void DMA_Cmd(DMA_Channel_TypeDef* DMAy_Channelx, FunctionalState NewState); |
| mbed_official | 52:a51c77007319 | 414 | void DMA_ITConfig(DMA_Channel_TypeDef* DMAy_Channelx, uint32_t DMA_IT, FunctionalState NewState); |
| mbed_official | 52:a51c77007319 | 415 | void DMA_SetCurrDataCounter(DMA_Channel_TypeDef* DMAy_Channelx, uint16_t DataNumber); |
| mbed_official | 52:a51c77007319 | 416 | uint16_t DMA_GetCurrDataCounter(DMA_Channel_TypeDef* DMAy_Channelx); |
| mbed_official | 52:a51c77007319 | 417 | FlagStatus DMA_GetFlagStatus(uint32_t DMAy_FLAG); |
| mbed_official | 52:a51c77007319 | 418 | void DMA_ClearFlag(uint32_t DMAy_FLAG); |
| mbed_official | 52:a51c77007319 | 419 | ITStatus DMA_GetITStatus(uint32_t DMAy_IT); |
| mbed_official | 52:a51c77007319 | 420 | void DMA_ClearITPendingBit(uint32_t DMAy_IT); |
| mbed_official | 52:a51c77007319 | 421 | |
| mbed_official | 52:a51c77007319 | 422 | #ifdef __cplusplus |
| mbed_official | 52:a51c77007319 | 423 | } |
| mbed_official | 52:a51c77007319 | 424 | #endif |
| mbed_official | 52:a51c77007319 | 425 | |
| mbed_official | 52:a51c77007319 | 426 | #endif /*__STM32F10x_DMA_H */ |
| mbed_official | 52:a51c77007319 | 427 | /** |
| mbed_official | 52:a51c77007319 | 428 | * @} |
| mbed_official | 52:a51c77007319 | 429 | */ |
| mbed_official | 52:a51c77007319 | 430 | |
| mbed_official | 52:a51c77007319 | 431 | /** |
| mbed_official | 52:a51c77007319 | 432 | * @} |
| mbed_official | 52:a51c77007319 | 433 | */ |
| mbed_official | 52:a51c77007319 | 434 | |
| mbed_official | 52:a51c77007319 | 435 | /** |
| mbed_official | 52:a51c77007319 | 436 | * @} |
| mbed_official | 52:a51c77007319 | 437 | */ |
| mbed_official | 52:a51c77007319 | 438 | |
| mbed_official | 52:a51c77007319 | 439 | /******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/ |