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targets/cmsis/TARGET_STM/TARGET_NUCLEO_L053R8/stm32l0xx_hal_i2s.h@181:a4cbdfbbd2f4, 2014-05-07 (annotated)

Committer:
mbed_official
Date:
Wed May 07 13:15:08 2014 +0100
Revision:
181:a4cbdfbbd2f4
Synchronized with git revision 7751e759576c6fd68deccb81ea82bac19ed41745



Full URL: https://github.com/mbedmicro/mbed/commit/7751e759576c6fd68deccb81ea82bac19ed41745/

Who changed what in which revision?

UserRevisionLine numberNew contents of line
mbed_official 181:a4cbdfbbd2f4 1 /**
mbed_official 181:a4cbdfbbd2f4 2 ******************************************************************************
mbed_official 181:a4cbdfbbd2f4 3 * @file stm32l0xx_hal_i2s.h
mbed_official 181:a4cbdfbbd2f4 4 * @author MCD Application Team
mbed_official 181:a4cbdfbbd2f4 5 * @version V1.0.0
mbed_official 181:a4cbdfbbd2f4 6 * @date 22-April-2014
mbed_official 181:a4cbdfbbd2f4 7 * @brief Header file of I2S HAL module.
mbed_official 181:a4cbdfbbd2f4 8 ******************************************************************************
mbed_official 181:a4cbdfbbd2f4 9 * @attention
mbed_official 181:a4cbdfbbd2f4 10 *
mbed_official 181:a4cbdfbbd2f4 11 * <h2><center>&copy; COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
mbed_official 181:a4cbdfbbd2f4 12 *
mbed_official 181:a4cbdfbbd2f4 13 * Redistribution and use in source and binary forms, with or without modification,
mbed_official 181:a4cbdfbbd2f4 14 * are permitted provided that the following conditions are met:
mbed_official 181:a4cbdfbbd2f4 15 * 1. Redistributions of source code must retain the above copyright notice,
mbed_official 181:a4cbdfbbd2f4 16 * this list of conditions and the following disclaimer.
mbed_official 181:a4cbdfbbd2f4 17 * 2. Redistributions in binary form must reproduce the above copyright notice,
mbed_official 181:a4cbdfbbd2f4 18 * this list of conditions and the following disclaimer in the documentation
mbed_official 181:a4cbdfbbd2f4 19 * and/or other materials provided with the distribution.
mbed_official 181:a4cbdfbbd2f4 20 * 3. Neither the name of STMicroelectronics nor the names of its contributors
mbed_official 181:a4cbdfbbd2f4 21 * may be used to endorse or promote products derived from this software
mbed_official 181:a4cbdfbbd2f4 22 * without specific prior written permission.
mbed_official 181:a4cbdfbbd2f4 23 *
mbed_official 181:a4cbdfbbd2f4 24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
mbed_official 181:a4cbdfbbd2f4 25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
mbed_official 181:a4cbdfbbd2f4 26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
mbed_official 181:a4cbdfbbd2f4 27 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
mbed_official 181:a4cbdfbbd2f4 28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
mbed_official 181:a4cbdfbbd2f4 29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
mbed_official 181:a4cbdfbbd2f4 30 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
mbed_official 181:a4cbdfbbd2f4 31 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
mbed_official 181:a4cbdfbbd2f4 32 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
mbed_official 181:a4cbdfbbd2f4 33 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
mbed_official 181:a4cbdfbbd2f4 34 *
mbed_official 181:a4cbdfbbd2f4 35 ******************************************************************************
mbed_official 181:a4cbdfbbd2f4 36 */
mbed_official 181:a4cbdfbbd2f4 37
mbed_official 181:a4cbdfbbd2f4 38 /* Define to prevent recursive inclusion -------------------------------------*/
mbed_official 181:a4cbdfbbd2f4 39 #ifndef __STM32L0xx_HAL_I2S_H
mbed_official 181:a4cbdfbbd2f4 40 #define __STM32L0xx_HAL_I2S_H
mbed_official 181:a4cbdfbbd2f4 41
mbed_official 181:a4cbdfbbd2f4 42 #ifdef __cplusplus
mbed_official 181:a4cbdfbbd2f4 43 extern "C" {
mbed_official 181:a4cbdfbbd2f4 44 #endif
mbed_official 181:a4cbdfbbd2f4 45
mbed_official 181:a4cbdfbbd2f4 46 /* Includes ------------------------------------------------------------------*/
mbed_official 181:a4cbdfbbd2f4 47 #include "stm32l0xx_hal_def.h"
mbed_official 181:a4cbdfbbd2f4 48
mbed_official 181:a4cbdfbbd2f4 49 /** @addtogroup STM32L0xx_HAL_Driver
mbed_official 181:a4cbdfbbd2f4 50 * @{
mbed_official 181:a4cbdfbbd2f4 51 */
mbed_official 181:a4cbdfbbd2f4 52
mbed_official 181:a4cbdfbbd2f4 53 /** @addtogroup I2S
mbed_official 181:a4cbdfbbd2f4 54 * @{
mbed_official 181:a4cbdfbbd2f4 55 */
mbed_official 181:a4cbdfbbd2f4 56
mbed_official 181:a4cbdfbbd2f4 57 /* Exported types ------------------------------------------------------------*/
mbed_official 181:a4cbdfbbd2f4 58 /**
mbed_official 181:a4cbdfbbd2f4 59 * @brief I2S Init structure definition
mbed_official 181:a4cbdfbbd2f4 60 */
mbed_official 181:a4cbdfbbd2f4 61 typedef struct
mbed_official 181:a4cbdfbbd2f4 62 {
mbed_official 181:a4cbdfbbd2f4 63 uint32_t Mode; /*!< Specifies the I2S operating mode.
mbed_official 181:a4cbdfbbd2f4 64 This parameter can be a value of @ref I2S_Mode */
mbed_official 181:a4cbdfbbd2f4 65
mbed_official 181:a4cbdfbbd2f4 66 uint32_t Standard; /*!< Specifies the standard used for the I2S communication.
mbed_official 181:a4cbdfbbd2f4 67 This parameter can be a value of @ref I2S_Standard */
mbed_official 181:a4cbdfbbd2f4 68
mbed_official 181:a4cbdfbbd2f4 69 uint32_t DataFormat; /*!< Specifies the data format for the I2S communication.
mbed_official 181:a4cbdfbbd2f4 70 This parameter can be a value of @ref I2S_Data_Format */
mbed_official 181:a4cbdfbbd2f4 71
mbed_official 181:a4cbdfbbd2f4 72 uint32_t MCLKOutput; /*!< Specifies whether the I2S MCLK output is enabled or not.
mbed_official 181:a4cbdfbbd2f4 73 This parameter can be a value of @ref I2S_MCLK_Output */
mbed_official 181:a4cbdfbbd2f4 74
mbed_official 181:a4cbdfbbd2f4 75 uint32_t AudioFreq; /*!< Specifies the frequency selected for the I2S communication.
mbed_official 181:a4cbdfbbd2f4 76 This parameter can be a value of @ref I2S_Audio_Frequency */
mbed_official 181:a4cbdfbbd2f4 77
mbed_official 181:a4cbdfbbd2f4 78 uint32_t CPOL; /*!< Specifies the idle state of the I2S clock.
mbed_official 181:a4cbdfbbd2f4 79 This parameter can be a value of @ref I2S_Clock_Polarity */
mbed_official 181:a4cbdfbbd2f4 80
mbed_official 181:a4cbdfbbd2f4 81 }I2S_InitTypeDef;
mbed_official 181:a4cbdfbbd2f4 82
mbed_official 181:a4cbdfbbd2f4 83 /**
mbed_official 181:a4cbdfbbd2f4 84 * @brief HAL State structures definition
mbed_official 181:a4cbdfbbd2f4 85 */
mbed_official 181:a4cbdfbbd2f4 86 typedef enum
mbed_official 181:a4cbdfbbd2f4 87 {
mbed_official 181:a4cbdfbbd2f4 88 HAL_I2S_STATE_RESET = 0x00, /*!< I2S not yet initialized or disabled */
mbed_official 181:a4cbdfbbd2f4 89 HAL_I2S_STATE_READY = 0x01, /*!< I2S initialized and ready for use */
mbed_official 181:a4cbdfbbd2f4 90 HAL_I2S_STATE_BUSY = 0x02, /*!< I2S internal process is ongoing */
mbed_official 181:a4cbdfbbd2f4 91 HAL_I2S_STATE_BUSY_TX = 0x12, /*!< Data Transmission process is ongoing */
mbed_official 181:a4cbdfbbd2f4 92 HAL_I2S_STATE_BUSY_RX = 0x22, /*!< Data Reception process is ongoing */
mbed_official 181:a4cbdfbbd2f4 93 HAL_I2S_STATE_TIMEOUT = 0x03, /*!< I2S timeout state */
mbed_official 181:a4cbdfbbd2f4 94 HAL_I2S_STATE_ERROR = 0x04 /*!< I2S error state */
mbed_official 181:a4cbdfbbd2f4 95
mbed_official 181:a4cbdfbbd2f4 96 }HAL_I2S_StateTypeDef;
mbed_official 181:a4cbdfbbd2f4 97
mbed_official 181:a4cbdfbbd2f4 98 /**
mbed_official 181:a4cbdfbbd2f4 99 * @brief HAL I2S Error Code structure definition
mbed_official 181:a4cbdfbbd2f4 100 */
mbed_official 181:a4cbdfbbd2f4 101 typedef enum
mbed_official 181:a4cbdfbbd2f4 102 {
mbed_official 181:a4cbdfbbd2f4 103 HAL_I2S_ERROR_NONE = 0x00, /*!< No error */
mbed_official 181:a4cbdfbbd2f4 104 HAL_I2S_ERROR_UDR = 0x01, /*!< I2S Underrun error */
mbed_official 181:a4cbdfbbd2f4 105 HAL_I2S_ERROR_OVR = 0x02, /*!< I2S Overrun error */
mbed_official 181:a4cbdfbbd2f4 106 HAL_I2S_ERROR_FRE = 0x10, /*!< I2S Frame format error */
mbed_official 181:a4cbdfbbd2f4 107 HAL_I2S_ERROR_DMA = 0x20 /*!< DMA transfer error */
mbed_official 181:a4cbdfbbd2f4 108 }HAL_I2S_ErrorTypeDef;
mbed_official 181:a4cbdfbbd2f4 109
mbed_official 181:a4cbdfbbd2f4 110 /**
mbed_official 181:a4cbdfbbd2f4 111 * @brief I2S handle Structure definition
mbed_official 181:a4cbdfbbd2f4 112 */
mbed_official 181:a4cbdfbbd2f4 113 typedef struct
mbed_official 181:a4cbdfbbd2f4 114 {
mbed_official 181:a4cbdfbbd2f4 115 SPI_TypeDef *Instance; /* I2S registers base address */
mbed_official 181:a4cbdfbbd2f4 116
mbed_official 181:a4cbdfbbd2f4 117 I2S_InitTypeDef Init; /* I2S communication parameters */
mbed_official 181:a4cbdfbbd2f4 118
mbed_official 181:a4cbdfbbd2f4 119 uint16_t *pTxBuffPtr; /* Pointer to I2S Tx transfer buffer*/
mbed_official 181:a4cbdfbbd2f4 120
mbed_official 181:a4cbdfbbd2f4 121 __IO uint16_t TxXferSize; /* I2S Tx transfer size */
mbed_official 181:a4cbdfbbd2f4 122
mbed_official 181:a4cbdfbbd2f4 123 __IO uint16_t TxXferCount; /* I2S Tx transfer Counter */
mbed_official 181:a4cbdfbbd2f4 124
mbed_official 181:a4cbdfbbd2f4 125 uint16_t *pRxBuffPtr; /* Pointer to I2S Rx transfer buffer*/
mbed_official 181:a4cbdfbbd2f4 126
mbed_official 181:a4cbdfbbd2f4 127 __IO uint16_t RxXferSize; /* I2S Rx transfer size */
mbed_official 181:a4cbdfbbd2f4 128
mbed_official 181:a4cbdfbbd2f4 129 __IO uint16_t RxXferCount; /* I2S Rx transfer counter */
mbed_official 181:a4cbdfbbd2f4 130
mbed_official 181:a4cbdfbbd2f4 131 DMA_HandleTypeDef *hdmatx; /* I2S Tx DMA handle parameters */
mbed_official 181:a4cbdfbbd2f4 132
mbed_official 181:a4cbdfbbd2f4 133 DMA_HandleTypeDef *hdmarx; /* I2S Rx DMA handle parameters */
mbed_official 181:a4cbdfbbd2f4 134
mbed_official 181:a4cbdfbbd2f4 135 __IO HAL_LockTypeDef Lock; /* I2S locking object */
mbed_official 181:a4cbdfbbd2f4 136
mbed_official 181:a4cbdfbbd2f4 137 __IO HAL_I2S_StateTypeDef State; /* I2S communication state */
mbed_official 181:a4cbdfbbd2f4 138
mbed_official 181:a4cbdfbbd2f4 139 __IO HAL_I2S_ErrorTypeDef ErrorCode; /* I2S Error code */
mbed_official 181:a4cbdfbbd2f4 140
mbed_official 181:a4cbdfbbd2f4 141 }I2S_HandleTypeDef;
mbed_official 181:a4cbdfbbd2f4 142
mbed_official 181:a4cbdfbbd2f4 143 /* Exported constants --------------------------------------------------------*/
mbed_official 181:a4cbdfbbd2f4 144
mbed_official 181:a4cbdfbbd2f4 145 /** @defgroup I2S_Exported_Constants
mbed_official 181:a4cbdfbbd2f4 146 * @{
mbed_official 181:a4cbdfbbd2f4 147 */
mbed_official 181:a4cbdfbbd2f4 148
mbed_official 181:a4cbdfbbd2f4 149 /** @defgroup I2S_Mode
mbed_official 181:a4cbdfbbd2f4 150 * @{
mbed_official 181:a4cbdfbbd2f4 151 */
mbed_official 181:a4cbdfbbd2f4 152 #define I2S_MODE_SLAVE_TX ((uint32_t)0x00000000)
mbed_official 181:a4cbdfbbd2f4 153 #define I2S_MODE_SLAVE_RX ((uint32_t)0x00000100)
mbed_official 181:a4cbdfbbd2f4 154 #define I2S_MODE_MASTER_TX ((uint32_t)0x00000200)
mbed_official 181:a4cbdfbbd2f4 155 #define I2S_MODE_MASTER_RX ((uint32_t)0x00000300)
mbed_official 181:a4cbdfbbd2f4 156
mbed_official 181:a4cbdfbbd2f4 157 #define IS_I2S_MODE(MODE) (((MODE) == I2S_MODE_SLAVE_TX) || \
mbed_official 181:a4cbdfbbd2f4 158 ((MODE) == I2S_MODE_SLAVE_RX) || \
mbed_official 181:a4cbdfbbd2f4 159 ((MODE) == I2S_MODE_MASTER_TX) || \
mbed_official 181:a4cbdfbbd2f4 160 ((MODE) == I2S_MODE_MASTER_RX))
mbed_official 181:a4cbdfbbd2f4 161 /**
mbed_official 181:a4cbdfbbd2f4 162 * @}
mbed_official 181:a4cbdfbbd2f4 163 */
mbed_official 181:a4cbdfbbd2f4 164
mbed_official 181:a4cbdfbbd2f4 165 /** @defgroup I2S_Standard
mbed_official 181:a4cbdfbbd2f4 166 * @{
mbed_official 181:a4cbdfbbd2f4 167 */
mbed_official 181:a4cbdfbbd2f4 168 #define I2S_STANDARD_PHILIPS ((uint32_t)0x00000000)
mbed_official 181:a4cbdfbbd2f4 169 #define I2S_STANDARD_MSB ((uint32_t)0x00000010)
mbed_official 181:a4cbdfbbd2f4 170 #define I2S_STANDARD_LSB ((uint32_t)0x00000020)
mbed_official 181:a4cbdfbbd2f4 171 #define I2S_STANDARD_PCM_SHORT ((uint32_t)0x00000030)
mbed_official 181:a4cbdfbbd2f4 172 #define I2S_STANDARD_PCM_LONG ((uint32_t)0x000000B0)
mbed_official 181:a4cbdfbbd2f4 173
mbed_official 181:a4cbdfbbd2f4 174 #define IS_I2S_STANDARD(STANDARD) (((STANDARD) == I2S_STANDARD_PHILIPS) || \
mbed_official 181:a4cbdfbbd2f4 175 ((STANDARD) == I2S_STANDARD_MSB) || \
mbed_official 181:a4cbdfbbd2f4 176 ((STANDARD) == I2S_STANDARD_LSB) || \
mbed_official 181:a4cbdfbbd2f4 177 ((STANDARD) == I2S_STANDARD_PCM_SHORT) || \
mbed_official 181:a4cbdfbbd2f4 178 ((STANDARD) == I2S_STANDARD_PCM_LONG))
mbed_official 181:a4cbdfbbd2f4 179 /**
mbed_official 181:a4cbdfbbd2f4 180 * @}
mbed_official 181:a4cbdfbbd2f4 181 */
mbed_official 181:a4cbdfbbd2f4 182
mbed_official 181:a4cbdfbbd2f4 183 /** @defgroup I2S_Data_Format
mbed_official 181:a4cbdfbbd2f4 184 * @{
mbed_official 181:a4cbdfbbd2f4 185 */
mbed_official 181:a4cbdfbbd2f4 186 #define I2S_DATAFORMAT_16B ((uint32_t)0x00000000)
mbed_official 181:a4cbdfbbd2f4 187 #define I2S_DATAFORMAT_16B_EXTENDED ((uint32_t)0x00000001)
mbed_official 181:a4cbdfbbd2f4 188 #define I2S_DATAFORMAT_24B ((uint32_t)0x00000003)
mbed_official 181:a4cbdfbbd2f4 189 #define I2S_DATAFORMAT_32B ((uint32_t)0x00000005)
mbed_official 181:a4cbdfbbd2f4 190
mbed_official 181:a4cbdfbbd2f4 191 #define IS_I2S_DATA_FORMAT(FORMAT) (((FORMAT) == I2S_DATAFORMAT_16B) || \
mbed_official 181:a4cbdfbbd2f4 192 ((FORMAT) == I2S_DATAFORMAT_16B_EXTENDED) || \
mbed_official 181:a4cbdfbbd2f4 193 ((FORMAT) == I2S_DATAFORMAT_24B) || \
mbed_official 181:a4cbdfbbd2f4 194 ((FORMAT) == I2S_DATAFORMAT_32B))
mbed_official 181:a4cbdfbbd2f4 195 /**
mbed_official 181:a4cbdfbbd2f4 196 * @}
mbed_official 181:a4cbdfbbd2f4 197 */
mbed_official 181:a4cbdfbbd2f4 198
mbed_official 181:a4cbdfbbd2f4 199 /** @defgroup I2S_MCLK_Output
mbed_official 181:a4cbdfbbd2f4 200 * @{
mbed_official 181:a4cbdfbbd2f4 201 */
mbed_official 181:a4cbdfbbd2f4 202 #define I2S_MCLKOUTPUT_ENABLE ((uint32_t)SPI_I2SPR_MCKOE)
mbed_official 181:a4cbdfbbd2f4 203 #define I2S_MCLKOUTPUT_DISABLE ((uint32_t)0x00000000)
mbed_official 181:a4cbdfbbd2f4 204
mbed_official 181:a4cbdfbbd2f4 205 #define IS_I2S_MCLK_OUTPUT(OUTPUT) (((OUTPUT) == I2S_MCLKOUTPUT_ENABLE) || \
mbed_official 181:a4cbdfbbd2f4 206 ((OUTPUT) == I2S_MCLKOUTPUT_DISABLE))
mbed_official 181:a4cbdfbbd2f4 207 /**
mbed_official 181:a4cbdfbbd2f4 208 * @}
mbed_official 181:a4cbdfbbd2f4 209 */
mbed_official 181:a4cbdfbbd2f4 210
mbed_official 181:a4cbdfbbd2f4 211 /** @defgroup I2S_Audio_Frequency
mbed_official 181:a4cbdfbbd2f4 212 * @{
mbed_official 181:a4cbdfbbd2f4 213 */
mbed_official 181:a4cbdfbbd2f4 214 #define I2S_AUDIOFREQ_192K ((uint32_t)192000)
mbed_official 181:a4cbdfbbd2f4 215 #define I2S_AUDIOFREQ_96K ((uint32_t)96000)
mbed_official 181:a4cbdfbbd2f4 216 #define I2S_AUDIOFREQ_48K ((uint32_t)48000)
mbed_official 181:a4cbdfbbd2f4 217 #define I2S_AUDIOFREQ_44K ((uint32_t)44100)
mbed_official 181:a4cbdfbbd2f4 218 #define I2S_AUDIOFREQ_32K ((uint32_t)32000)
mbed_official 181:a4cbdfbbd2f4 219 #define I2S_AUDIOFREQ_22K ((uint32_t)22050)
mbed_official 181:a4cbdfbbd2f4 220 #define I2S_AUDIOFREQ_16K ((uint32_t)16000)
mbed_official 181:a4cbdfbbd2f4 221 #define I2S_AUDIOFREQ_11K ((uint32_t)11025)
mbed_official 181:a4cbdfbbd2f4 222 #define I2S_AUDIOFREQ_8K ((uint32_t)8000)
mbed_official 181:a4cbdfbbd2f4 223 #define I2S_AUDIOFREQ_DEFAULT ((uint32_t)2)
mbed_official 181:a4cbdfbbd2f4 224
mbed_official 181:a4cbdfbbd2f4 225 #define IS_I2S_AUDIO_FREQ(FREQ) ((((FREQ) >= I2S_AUDIOFREQ_8K) && \
mbed_official 181:a4cbdfbbd2f4 226 ((FREQ) <= I2S_AUDIOFREQ_192K)) || \
mbed_official 181:a4cbdfbbd2f4 227 ((FREQ) == I2S_AUDIOFREQ_DEFAULT))
mbed_official 181:a4cbdfbbd2f4 228 /**
mbed_official 181:a4cbdfbbd2f4 229 * @}
mbed_official 181:a4cbdfbbd2f4 230 */
mbed_official 181:a4cbdfbbd2f4 231
mbed_official 181:a4cbdfbbd2f4 232 /** @defgroup I2S_Clock_Polarity
mbed_official 181:a4cbdfbbd2f4 233 * @{
mbed_official 181:a4cbdfbbd2f4 234 */
mbed_official 181:a4cbdfbbd2f4 235 #define I2S_CPOL_LOW ((uint32_t)0x00000000)
mbed_official 181:a4cbdfbbd2f4 236 #define I2S_CPOL_HIGH ((uint32_t)SPI_I2SCFGR_CKPOL)
mbed_official 181:a4cbdfbbd2f4 237
mbed_official 181:a4cbdfbbd2f4 238 #define IS_I2S_CPOL(CPOL) (((CPOL) == I2S_CPOL_LOW) || \
mbed_official 181:a4cbdfbbd2f4 239 ((CPOL) == I2S_CPOL_HIGH))
mbed_official 181:a4cbdfbbd2f4 240 /**
mbed_official 181:a4cbdfbbd2f4 241 * @}
mbed_official 181:a4cbdfbbd2f4 242 */
mbed_official 181:a4cbdfbbd2f4 243
mbed_official 181:a4cbdfbbd2f4 244 /** @defgroup I2S_Interrupt_configuration_definition
mbed_official 181:a4cbdfbbd2f4 245 * @{
mbed_official 181:a4cbdfbbd2f4 246 */
mbed_official 181:a4cbdfbbd2f4 247 #define I2S_IT_TXE SPI_CR2_TXEIE
mbed_official 181:a4cbdfbbd2f4 248 #define I2S_IT_RXNE SPI_CR2_RXNEIE
mbed_official 181:a4cbdfbbd2f4 249 #define I2S_IT_ERR SPI_CR2_ERRIE
mbed_official 181:a4cbdfbbd2f4 250 /**
mbed_official 181:a4cbdfbbd2f4 251 * @}
mbed_official 181:a4cbdfbbd2f4 252 */
mbed_official 181:a4cbdfbbd2f4 253
mbed_official 181:a4cbdfbbd2f4 254 /** @defgroup I2S_Flag_definition
mbed_official 181:a4cbdfbbd2f4 255 * @{
mbed_official 181:a4cbdfbbd2f4 256 */
mbed_official 181:a4cbdfbbd2f4 257 #define I2S_FLAG_TXE SPI_SR_TXE
mbed_official 181:a4cbdfbbd2f4 258 #define I2S_FLAG_RXNE SPI_SR_RXNE
mbed_official 181:a4cbdfbbd2f4 259
mbed_official 181:a4cbdfbbd2f4 260 #define I2S_FLAG_UDR SPI_SR_UDR
mbed_official 181:a4cbdfbbd2f4 261 #define I2S_FLAG_OVR SPI_SR_OVR
mbed_official 181:a4cbdfbbd2f4 262 #define I2S_FLAG_FRE SPI_SR_FRE
mbed_official 181:a4cbdfbbd2f4 263
mbed_official 181:a4cbdfbbd2f4 264 #define I2S_FLAG_CHSIDE SPI_SR_CHSIDE
mbed_official 181:a4cbdfbbd2f4 265 #define I2S_FLAG_BSY SPI_SR_BSY
mbed_official 181:a4cbdfbbd2f4 266 /**
mbed_official 181:a4cbdfbbd2f4 267 * @}
mbed_official 181:a4cbdfbbd2f4 268 */
mbed_official 181:a4cbdfbbd2f4 269
mbed_official 181:a4cbdfbbd2f4 270 /**
mbed_official 181:a4cbdfbbd2f4 271 * @}
mbed_official 181:a4cbdfbbd2f4 272 */
mbed_official 181:a4cbdfbbd2f4 273
mbed_official 181:a4cbdfbbd2f4 274 /* Exported macro ------------------------------------------------------------*/
mbed_official 181:a4cbdfbbd2f4 275
mbed_official 181:a4cbdfbbd2f4 276 /** @brief Reset I2S handle state
mbed_official 181:a4cbdfbbd2f4 277 * @param __HANDLE__: specifies the I2S Handle.
mbed_official 181:a4cbdfbbd2f4 278 * @retval None
mbed_official 181:a4cbdfbbd2f4 279 */
mbed_official 181:a4cbdfbbd2f4 280 #define __HAL_I2S_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_I2S_STATE_RESET)
mbed_official 181:a4cbdfbbd2f4 281
mbed_official 181:a4cbdfbbd2f4 282 /** @brief Enable or disable the specified SPI peripheral (in I2S mode).
mbed_official 181:a4cbdfbbd2f4 283 * @param __HANDLE__: specifies the I2S Handle.
mbed_official 181:a4cbdfbbd2f4 284 * @retval None
mbed_official 181:a4cbdfbbd2f4 285 */
mbed_official 181:a4cbdfbbd2f4 286 #define __HAL_I2S_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->I2SCFGR |= SPI_I2SCFGR_I2SE)
mbed_official 181:a4cbdfbbd2f4 287 #define __HAL_I2S_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->I2SCFGR &= (uint32_t)~((uint32_t)SPI_I2SCFGR_I2SE))
mbed_official 181:a4cbdfbbd2f4 288
mbed_official 181:a4cbdfbbd2f4 289 /** @brief Enable or disable the specified I2S interrupts.
mbed_official 181:a4cbdfbbd2f4 290 * @param __HANDLE__: specifies the I2S Handle.
mbed_official 181:a4cbdfbbd2f4 291 * @param __INTERRUPT__: specifies the interrupt source to enable or disable.
mbed_official 181:a4cbdfbbd2f4 292 * This parameter can be one of the following values:
mbed_official 181:a4cbdfbbd2f4 293 * @arg I2S_IT_TXE: Tx buffer empty interrupt enable
mbed_official 181:a4cbdfbbd2f4 294 * @arg I2S_IT_RXNE: RX buffer not empty interrupt enable
mbed_official 181:a4cbdfbbd2f4 295 * @arg I2S_IT_ERR: Error interrupt enable
mbed_official 181:a4cbdfbbd2f4 296 * @retval None
mbed_official 181:a4cbdfbbd2f4 297 */
mbed_official 181:a4cbdfbbd2f4 298 #define __HAL_I2S_ENABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->CR2 |= (__INTERRUPT__))
mbed_official 181:a4cbdfbbd2f4 299 #define __HAL_I2S_DISABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->CR2 &= ~(__INTERRUPT__))
mbed_official 181:a4cbdfbbd2f4 300
mbed_official 181:a4cbdfbbd2f4 301 /** @brief Checks if the specified I2S interrupt source is enabled or disabled.
mbed_official 181:a4cbdfbbd2f4 302 * @param __HANDLE__: specifies the I2S Handle.
mbed_official 181:a4cbdfbbd2f4 303 * This parameter can be I2S where x: 1, 2, or 3 to select the I2S peripheral.
mbed_official 181:a4cbdfbbd2f4 304 * @param __INTERRUPT__: specifies the I2S interrupt source to check.
mbed_official 181:a4cbdfbbd2f4 305 * This parameter can be one of the following values:
mbed_official 181:a4cbdfbbd2f4 306 * @arg I2S_IT_TXE: Tx buffer empty interrupt enable
mbed_official 181:a4cbdfbbd2f4 307 * @arg I2S_IT_RXNE: RX buffer not empty interrupt enable
mbed_official 181:a4cbdfbbd2f4 308 * @arg I2S_IT_ERR: Error interrupt enable
mbed_official 181:a4cbdfbbd2f4 309 * @retval The new state of __IT__ (TRUE or FALSE).
mbed_official 181:a4cbdfbbd2f4 310 */
mbed_official 181:a4cbdfbbd2f4 311 #define __HAL_I2S_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) ((((__HANDLE__)->Instance->CR2 & (__INTERRUPT__)) == (__INTERRUPT__)) ? SET : RESET)
mbed_official 181:a4cbdfbbd2f4 312
mbed_official 181:a4cbdfbbd2f4 313 /** @brief Checks whether the specified I2S flag is set or not.
mbed_official 181:a4cbdfbbd2f4 314 * @param __HANDLE__: specifies the I2S Handle.
mbed_official 181:a4cbdfbbd2f4 315 * @param __FLAG__: specifies the flag to check.
mbed_official 181:a4cbdfbbd2f4 316 * This parameter can be one of the following values:
mbed_official 181:a4cbdfbbd2f4 317 * @arg I2S_FLAG_RXNE: Receive buffer not empty flag
mbed_official 181:a4cbdfbbd2f4 318 * @arg I2S_FLAG_TXE: Transmit buffer empty flag
mbed_official 181:a4cbdfbbd2f4 319 * @arg I2S_FLAG_UDR: Underrun flag
mbed_official 181:a4cbdfbbd2f4 320 * @arg I2S_FLAG_OVR: Overrun flag
mbed_official 181:a4cbdfbbd2f4 321 * @arg I2S_FLAG_FRE: Frame error flag
mbed_official 181:a4cbdfbbd2f4 322 * @arg I2S_FLAG_CHSIDE: Channel Side flag
mbed_official 181:a4cbdfbbd2f4 323 * @arg I2S_FLAG_BSY: Busy flag
mbed_official 181:a4cbdfbbd2f4 324 * @retval The new state of __FLAG__ (TRUE or FALSE).
mbed_official 181:a4cbdfbbd2f4 325 */
mbed_official 181:a4cbdfbbd2f4 326 #define __HAL_I2S_GET_FLAG(__HANDLE__, __FLAG__) ((((__HANDLE__)->Instance->SR) & (__FLAG__)) == (__FLAG__))
mbed_official 181:a4cbdfbbd2f4 327
mbed_official 181:a4cbdfbbd2f4 328 /** @brief Clears the I2S OVR pending flag.
mbed_official 181:a4cbdfbbd2f4 329 * @param __HANDLE__: specifies the I2S Handle.
mbed_official 181:a4cbdfbbd2f4 330 * @retval None
mbed_official 181:a4cbdfbbd2f4 331 */
mbed_official 181:a4cbdfbbd2f4 332 #define __HAL_I2S_CLEAR_OVRFLAG(__HANDLE__) do{(__HANDLE__)->Instance->DR;\
mbed_official 181:a4cbdfbbd2f4 333 (__HANDLE__)->Instance->SR;}while(0)
mbed_official 181:a4cbdfbbd2f4 334 /** @brief Clears the I2S UDR pending flag.
mbed_official 181:a4cbdfbbd2f4 335 * @param __HANDLE__: specifies the I2S Handle.
mbed_official 181:a4cbdfbbd2f4 336 * @retval None
mbed_official 181:a4cbdfbbd2f4 337 */
mbed_official 181:a4cbdfbbd2f4 338 #define __HAL_I2S_CLEAR_UDRFLAG(__HANDLE__)((__HANDLE__)->Instance->SR)
mbed_official 181:a4cbdfbbd2f4 339
mbed_official 181:a4cbdfbbd2f4 340 /* Exported functions --------------------------------------------------------*/
mbed_official 181:a4cbdfbbd2f4 341
mbed_official 181:a4cbdfbbd2f4 342 /* Initialization/de-initialization functions **********************************/
mbed_official 181:a4cbdfbbd2f4 343 HAL_StatusTypeDef HAL_I2S_Init(I2S_HandleTypeDef *hi2s);
mbed_official 181:a4cbdfbbd2f4 344 HAL_StatusTypeDef HAL_I2S_DeInit (I2S_HandleTypeDef *hi2s);
mbed_official 181:a4cbdfbbd2f4 345 void HAL_I2S_MspInit(I2S_HandleTypeDef *hi2s);
mbed_official 181:a4cbdfbbd2f4 346 void HAL_I2S_MspDeInit(I2S_HandleTypeDef *hi2s);
mbed_official 181:a4cbdfbbd2f4 347
mbed_official 181:a4cbdfbbd2f4 348 /* I/O operation functions *****************************************************/
mbed_official 181:a4cbdfbbd2f4 349 /* Blocking mode: Polling */
mbed_official 181:a4cbdfbbd2f4 350 HAL_StatusTypeDef HAL_I2S_Transmit(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint16_t Size, uint32_t Timeout);
mbed_official 181:a4cbdfbbd2f4 351 HAL_StatusTypeDef HAL_I2S_Receive(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint16_t Size, uint32_t Timeout);
mbed_official 181:a4cbdfbbd2f4 352
mbed_official 181:a4cbdfbbd2f4 353 /* Non-Blocking mode: Interrupt */
mbed_official 181:a4cbdfbbd2f4 354 HAL_StatusTypeDef HAL_I2S_Transmit_IT(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint16_t Size);
mbed_official 181:a4cbdfbbd2f4 355 HAL_StatusTypeDef HAL_I2S_Receive_IT(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint16_t Size);
mbed_official 181:a4cbdfbbd2f4 356 void HAL_I2S_IRQHandler(I2S_HandleTypeDef *hi2s);
mbed_official 181:a4cbdfbbd2f4 357
mbed_official 181:a4cbdfbbd2f4 358 /* Non-Blocking mode: DMA */
mbed_official 181:a4cbdfbbd2f4 359 HAL_StatusTypeDef HAL_I2S_Transmit_DMA(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint16_t Size);
mbed_official 181:a4cbdfbbd2f4 360 HAL_StatusTypeDef HAL_I2S_Receive_DMA(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint16_t Size);
mbed_official 181:a4cbdfbbd2f4 361
mbed_official 181:a4cbdfbbd2f4 362 HAL_StatusTypeDef HAL_I2S_DMAPause(I2S_HandleTypeDef *hi2s);
mbed_official 181:a4cbdfbbd2f4 363 HAL_StatusTypeDef HAL_I2S_DMAResume(I2S_HandleTypeDef *hi2s);
mbed_official 181:a4cbdfbbd2f4 364 HAL_StatusTypeDef HAL_I2S_DMAStop(I2S_HandleTypeDef *hi2s);
mbed_official 181:a4cbdfbbd2f4 365
mbed_official 181:a4cbdfbbd2f4 366 /* Peripheral Control and State functions **************************************/
mbed_official 181:a4cbdfbbd2f4 367 HAL_I2S_StateTypeDef HAL_I2S_GetState(I2S_HandleTypeDef *hi2s);
mbed_official 181:a4cbdfbbd2f4 368 HAL_I2S_ErrorTypeDef HAL_I2S_GetError(I2S_HandleTypeDef *hi2s);
mbed_official 181:a4cbdfbbd2f4 369
mbed_official 181:a4cbdfbbd2f4 370 /* Callbacks used in non blocking modes (Interrupt and DMA) *******************/
mbed_official 181:a4cbdfbbd2f4 371 void HAL_I2S_TxHalfCpltCallback(I2S_HandleTypeDef *hi2s);
mbed_official 181:a4cbdfbbd2f4 372 void HAL_I2S_TxCpltCallback(I2S_HandleTypeDef *hi2s);
mbed_official 181:a4cbdfbbd2f4 373 void HAL_I2S_RxHalfCpltCallback(I2S_HandleTypeDef *hi2s);
mbed_official 181:a4cbdfbbd2f4 374 void HAL_I2S_RxCpltCallback(I2S_HandleTypeDef *hi2s);
mbed_official 181:a4cbdfbbd2f4 375 void HAL_I2S_ErrorCallback(I2S_HandleTypeDef *hi2s);
mbed_official 181:a4cbdfbbd2f4 376
mbed_official 181:a4cbdfbbd2f4 377 void I2S_DMATxCplt(DMA_HandleTypeDef *hdma);
mbed_official 181:a4cbdfbbd2f4 378 void I2S_DMATxHalfCplt(DMA_HandleTypeDef *hdma);
mbed_official 181:a4cbdfbbd2f4 379 void I2S_DMARxCplt(DMA_HandleTypeDef *hdma);
mbed_official 181:a4cbdfbbd2f4 380 void I2S_DMARxHalfCplt(DMA_HandleTypeDef *hdma);
mbed_official 181:a4cbdfbbd2f4 381 void I2S_DMAError(DMA_HandleTypeDef *hdma);
mbed_official 181:a4cbdfbbd2f4 382 HAL_StatusTypeDef I2S_WaitFlagStateUntilTimeout(I2S_HandleTypeDef *hi2s, uint32_t Flag, uint32_t Status, uint32_t Timeout);
mbed_official 181:a4cbdfbbd2f4 383
mbed_official 181:a4cbdfbbd2f4 384 /**
mbed_official 181:a4cbdfbbd2f4 385 * @}
mbed_official 181:a4cbdfbbd2f4 386 */
mbed_official 181:a4cbdfbbd2f4 387
mbed_official 181:a4cbdfbbd2f4 388 /**
mbed_official 181:a4cbdfbbd2f4 389 * @}
mbed_official 181:a4cbdfbbd2f4 390 */
mbed_official 181:a4cbdfbbd2f4 391
mbed_official 181:a4cbdfbbd2f4 392 #ifdef __cplusplus
mbed_official 181:a4cbdfbbd2f4 393 }
mbed_official 181:a4cbdfbbd2f4 394 #endif
mbed_official 181:a4cbdfbbd2f4 395
mbed_official 181:a4cbdfbbd2f4 396
mbed_official 181:a4cbdfbbd2f4 397 #endif /* __STM32L0xx_HAL_I2S_H */
mbed_official 181:a4cbdfbbd2f4 398
mbed_official 181:a4cbdfbbd2f4 399 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/