mbed library sources

Dependents:   frdm_kl05z_gpio_test

Fork of mbed-src by mbed official

Committer:
mbed_official
Date:
Wed May 07 13:15:08 2014 +0100
Revision:
181:a4cbdfbbd2f4
Synchronized with git revision 7751e759576c6fd68deccb81ea82bac19ed41745

Full URL: https://github.com/mbedmicro/mbed/commit/7751e759576c6fd68deccb81ea82bac19ed41745/

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mbed_official 181:a4cbdfbbd2f4 1 /**
mbed_official 181:a4cbdfbbd2f4 2 ******************************************************************************
mbed_official 181:a4cbdfbbd2f4 3 * @file stm32l0xx_hal_adc.h
mbed_official 181:a4cbdfbbd2f4 4 * @author MCD Application Team
mbed_official 181:a4cbdfbbd2f4 5 * @version V1.0.0
mbed_official 181:a4cbdfbbd2f4 6 * @date 22-April-2014
mbed_official 181:a4cbdfbbd2f4 7 * @brief This file contains all the functions prototypes for the ADC firmware
mbed_official 181:a4cbdfbbd2f4 8 * library.
mbed_official 181:a4cbdfbbd2f4 9 ******************************************************************************
mbed_official 181:a4cbdfbbd2f4 10 * @attention
mbed_official 181:a4cbdfbbd2f4 11 *
mbed_official 181:a4cbdfbbd2f4 12 * <h2><center>&copy; COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
mbed_official 181:a4cbdfbbd2f4 13 *
mbed_official 181:a4cbdfbbd2f4 14 * Redistribution and use in source and binary forms, with or without modification,
mbed_official 181:a4cbdfbbd2f4 15 * are permitted provided that the following conditions are met:
mbed_official 181:a4cbdfbbd2f4 16 * 1. Redistributions of source code must retain the above copyright notice,
mbed_official 181:a4cbdfbbd2f4 17 * this list of conditions and the following disclaimer.
mbed_official 181:a4cbdfbbd2f4 18 * 2. Redistributions in binary form must reproduce the above copyright notice,
mbed_official 181:a4cbdfbbd2f4 19 * this list of conditions and the following disclaimer in the documentation
mbed_official 181:a4cbdfbbd2f4 20 * and/or other materials provided with the distribution.
mbed_official 181:a4cbdfbbd2f4 21 * 3. Neither the name of STMicroelectronics nor the names of its contributors
mbed_official 181:a4cbdfbbd2f4 22 * may be used to endorse or promote products derived from this software
mbed_official 181:a4cbdfbbd2f4 23 * without specific prior written permission.
mbed_official 181:a4cbdfbbd2f4 24 *
mbed_official 181:a4cbdfbbd2f4 25 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
mbed_official 181:a4cbdfbbd2f4 26 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
mbed_official 181:a4cbdfbbd2f4 27 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
mbed_official 181:a4cbdfbbd2f4 28 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
mbed_official 181:a4cbdfbbd2f4 29 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
mbed_official 181:a4cbdfbbd2f4 30 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
mbed_official 181:a4cbdfbbd2f4 31 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
mbed_official 181:a4cbdfbbd2f4 32 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
mbed_official 181:a4cbdfbbd2f4 33 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
mbed_official 181:a4cbdfbbd2f4 34 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
mbed_official 181:a4cbdfbbd2f4 35 *
mbed_official 181:a4cbdfbbd2f4 36 ******************************************************************************
mbed_official 181:a4cbdfbbd2f4 37 */
mbed_official 181:a4cbdfbbd2f4 38
mbed_official 181:a4cbdfbbd2f4 39 /* Define to prevent recursive inclusion -------------------------------------*/
mbed_official 181:a4cbdfbbd2f4 40 #ifndef __STM32L0xx_ADC_H
mbed_official 181:a4cbdfbbd2f4 41 #define __STM32L0xx_ADC_H
mbed_official 181:a4cbdfbbd2f4 42
mbed_official 181:a4cbdfbbd2f4 43 #ifdef __cplusplus
mbed_official 181:a4cbdfbbd2f4 44 extern "C" {
mbed_official 181:a4cbdfbbd2f4 45 #endif
mbed_official 181:a4cbdfbbd2f4 46
mbed_official 181:a4cbdfbbd2f4 47 /* Includes ------------------------------------------------------------------*/
mbed_official 181:a4cbdfbbd2f4 48 #include "stm32l0xx_hal_def.h"
mbed_official 181:a4cbdfbbd2f4 49
mbed_official 181:a4cbdfbbd2f4 50 /** @addtogroup STM32L0xx_HAL_Driver
mbed_official 181:a4cbdfbbd2f4 51 * @{
mbed_official 181:a4cbdfbbd2f4 52 */
mbed_official 181:a4cbdfbbd2f4 53
mbed_official 181:a4cbdfbbd2f4 54 /** @addtogroup ADC
mbed_official 181:a4cbdfbbd2f4 55 * @{
mbed_official 181:a4cbdfbbd2f4 56 */
mbed_official 181:a4cbdfbbd2f4 57
mbed_official 181:a4cbdfbbd2f4 58 /* Exported types ------------------------------------------------------------*/
mbed_official 181:a4cbdfbbd2f4 59 /**
mbed_official 181:a4cbdfbbd2f4 60 * @brief HAL State structures definition
mbed_official 181:a4cbdfbbd2f4 61 */
mbed_official 181:a4cbdfbbd2f4 62 typedef enum
mbed_official 181:a4cbdfbbd2f4 63 {
mbed_official 181:a4cbdfbbd2f4 64 HAL_ADC_STATE_RESET = 0x00, /*!< ADC not yet initialized or disabled */
mbed_official 181:a4cbdfbbd2f4 65 HAL_ADC_STATE_READY = 0x01, /*!< ADC peripheral ready for use */
mbed_official 181:a4cbdfbbd2f4 66 HAL_ADC_STATE_BUSY = 0x02, /*!< An internal process is ongoing */
mbed_official 181:a4cbdfbbd2f4 67 HAL_ADC_STATE_BUSY_REG = 0x12, /*!< Regular conversion is ongoing */
mbed_official 181:a4cbdfbbd2f4 68 HAL_ADC_STATE_TIMEOUT = 0x03, /*!< Timeout state */
mbed_official 181:a4cbdfbbd2f4 69 HAL_ADC_STATE_ERROR = 0x04, /*!< ADC state error */
mbed_official 181:a4cbdfbbd2f4 70 HAL_ADC_STATE_EOC = 0x05, /*!< Conversion is completed */
mbed_official 181:a4cbdfbbd2f4 71 HAL_ADC_STATE_AWD = 0x06, /*!< ADC state analog watchdog */
mbed_official 181:a4cbdfbbd2f4 72 }HAL_ADC_StateTypeDef;
mbed_official 181:a4cbdfbbd2f4 73
mbed_official 181:a4cbdfbbd2f4 74
mbed_official 181:a4cbdfbbd2f4 75 /**
mbed_official 181:a4cbdfbbd2f4 76 * @brief ADC Oversampler structure definition
mbed_official 181:a4cbdfbbd2f4 77 */
mbed_official 181:a4cbdfbbd2f4 78 typedef struct
mbed_official 181:a4cbdfbbd2f4 79 {
mbed_official 181:a4cbdfbbd2f4 80 uint32_t Ratio; /*!< Configures the oversampling ratio.
mbed_official 181:a4cbdfbbd2f4 81 This parameter can be a value of @ref ADC_Oversampling_Ratio */
mbed_official 181:a4cbdfbbd2f4 82 uint32_t RightBitShift; /*!< Configures the division coefficient for the Oversampler.
mbed_official 181:a4cbdfbbd2f4 83 This parameter can be a value of @ref ADC_Right_Bit_Shift */
mbed_official 181:a4cbdfbbd2f4 84 uint32_t TriggeredMode; /*!< Selects the regular triggered oversampling mode
mbed_official 181:a4cbdfbbd2f4 85 This parameter can be a value of @ref ADC_Triggered_Oversampling_Mode */
mbed_official 181:a4cbdfbbd2f4 86
mbed_official 181:a4cbdfbbd2f4 87 }ADC_OversamplingTypeDef;
mbed_official 181:a4cbdfbbd2f4 88
mbed_official 181:a4cbdfbbd2f4 89 /**
mbed_official 181:a4cbdfbbd2f4 90 * @brief ADC Init structure definition
mbed_official 181:a4cbdfbbd2f4 91 * @note The setting of these parameters with function HAL_ADC_Init() is conditioned by the ADC state.
mbed_official 181:a4cbdfbbd2f4 92 * If ADC is not in the appropriate state to modify some parameters, these parameters setting is bypassed
mbed_official 181:a4cbdfbbd2f4 93 * without error reporting (as it can be the expected behaviour in case of intended action to update antother parameter (which fullfills the ADC state condition) on the fly).
mbed_official 181:a4cbdfbbd2f4 94 */
mbed_official 181:a4cbdfbbd2f4 95 typedef struct
mbed_official 181:a4cbdfbbd2f4 96 {
mbed_official 181:a4cbdfbbd2f4 97 uint32_t OversamplingMode; /*!< Specifies whether the oversampling feature is enabled or disabled
mbed_official 181:a4cbdfbbd2f4 98 This parameter can be set to ENABLE or DISABLE.
mbed_official 181:a4cbdfbbd2f4 99 Note: This parameter can be modified only if there is no conversion is ongoing. */
mbed_official 181:a4cbdfbbd2f4 100 ADC_OversamplingTypeDef Oversample; /*!< Specifies the Oversampling parameters
mbed_official 181:a4cbdfbbd2f4 101 Note: This parameter can be modified only if there is no conversion is ongoing. */
mbed_official 181:a4cbdfbbd2f4 102 uint32_t ClockPrescaler; /*!< Selects the ADC clock frequency.
mbed_official 181:a4cbdfbbd2f4 103 This parameter can be a value of @ref ADC_ClockPrescaler
mbed_official 181:a4cbdfbbd2f4 104 Note: This parameter can be modified only if ADC is disabled. */
mbed_official 181:a4cbdfbbd2f4 105 uint32_t Resolution; /*!< Configures the ADC resolution mode.
mbed_official 181:a4cbdfbbd2f4 106 This parameter can be a value of @ref ADC_Resolution
mbed_official 181:a4cbdfbbd2f4 107 Note: This parameter can be modified only if ADC is disabled. */
mbed_official 181:a4cbdfbbd2f4 108 uint32_t SamplingTime; /*!< The sample time value to be set for all channels.
mbed_official 181:a4cbdfbbd2f4 109 This parameter can be a value of @ref ADC_sampling_times.
mbed_official 181:a4cbdfbbd2f4 110 Note: This parameter can be modified only if there is no conversion is ongoing. */
mbed_official 181:a4cbdfbbd2f4 111 uint32_t ScanDirection; /*!< The scan sequence direction.
mbed_official 181:a4cbdfbbd2f4 112 This parameter can be a value of @ref ADC_scan_direction.
mbed_official 181:a4cbdfbbd2f4 113 Note: This parameter can be modified only if there is no conversion is ongoing. */
mbed_official 181:a4cbdfbbd2f4 114 uint32_t DataAlign; /*!< Specifies whether the ADC data alignment is left or right.
mbed_official 181:a4cbdfbbd2f4 115 This parameter can be a value of @ref ADC_data_align.
mbed_official 181:a4cbdfbbd2f4 116 Note: This parameter can be modified only if there is no conversion is ongoing. */
mbed_official 181:a4cbdfbbd2f4 117 uint32_t ContinuousConvMode; /*!< Specifies whether the conversion is performed in Continuous or Single mode.
mbed_official 181:a4cbdfbbd2f4 118 This parameter can be set to ENABLE or DISABLE.
mbed_official 181:a4cbdfbbd2f4 119 Note: This parameter can be modified only if there is no conversion is ongoing. */
mbed_official 181:a4cbdfbbd2f4 120 uint32_t DiscontinuousConvMode; /*!< Specifies whether the conversion is performed
mbed_official 181:a4cbdfbbd2f4 121 in Complete-sequence/Discontinuous-sequence.
mbed_official 181:a4cbdfbbd2f4 122 Discontinuous mode can be enabled only if continuous mode is disabled.
mbed_official 181:a4cbdfbbd2f4 123 This parameter can be set to ENABLE or DISABLE.
mbed_official 181:a4cbdfbbd2f4 124 Note: This parameter can be modified only if there is no conversion is ongoing. */
mbed_official 181:a4cbdfbbd2f4 125 uint32_t ExternalTrigConvEdge; /*!< Select the external trigger edge and enable the trigger.
mbed_official 181:a4cbdfbbd2f4 126 This parameter can be a value of @ref ADC_External_trigger_Edge.
mbed_official 181:a4cbdfbbd2f4 127 Note: This parameter can be modified only if there is no conversion is ongoing. */
mbed_official 181:a4cbdfbbd2f4 128 uint32_t ExternalTrigConv; /*!< Select the external event used to trigger the start of conversion.
mbed_official 181:a4cbdfbbd2f4 129 This parameter can be a value of @ref ADC_External_trigger_Source.
mbed_official 181:a4cbdfbbd2f4 130 Note: This parameter can be modified only if there is no conversion is ongoing. */
mbed_official 181:a4cbdfbbd2f4 131 uint32_t DMAContinuousRequests; /*!< Specifies whether the DMA requests are performed in one shot mode (DMA transfer stop when number of conversions is reached)
mbed_official 181:a4cbdfbbd2f4 132 or in Continuous mode (DMA transfer unlimited, whatever number of conversions).
mbed_official 181:a4cbdfbbd2f4 133 Note: In continuous mode, DMA must be configured in circular mode. Otherwise an overrun will be triggered when DMA buffer max pointer is reached.
mbed_official 181:a4cbdfbbd2f4 134 This parameter can be set to ENABLE or DISABLE.
mbed_official 181:a4cbdfbbd2f4 135 Note: This parameter can be modified only if there is no conversion is ongoing. */
mbed_official 181:a4cbdfbbd2f4 136 uint32_t EOCSelection; /*!< Specifies what EOC (End Of Conversion) flag is used for conversion polling and interruption:
mbed_official 181:a4cbdfbbd2f4 137 end of single channel conversion or end of channels conversions sequence.
mbed_official 181:a4cbdfbbd2f4 138 This parameter can be a value of @ref ADC_EOCSelection. */
mbed_official 181:a4cbdfbbd2f4 139 uint32_t Overrun; /*!< Select the behaviour in case of overrun: data preserved or overwritten
mbed_official 181:a4cbdfbbd2f4 140 This parameter has an effect on regular channels only, including in DMA mode.
mbed_official 181:a4cbdfbbd2f4 141 This parameter can be a value of @ref ADC_Overrun.
mbed_official 181:a4cbdfbbd2f4 142 Note: This parameter can be modified only if there is no conversion is ongoing. */
mbed_official 181:a4cbdfbbd2f4 143 uint32_t LowPowerAutoWait; /*!< Specifies the usage of dynamic low power Auto Delay: new conversion start only
mbed_official 181:a4cbdfbbd2f4 144 when the previous conversion (for regular channel) is completed.
mbed_official 181:a4cbdfbbd2f4 145 This avoids risk of overrun for low frequency application.
mbed_official 181:a4cbdfbbd2f4 146 This parameter can be set to ENABLE or DISABLE.
mbed_official 181:a4cbdfbbd2f4 147 Note: This parameter can be modified only if there is no conversion is ongoing. */
mbed_official 181:a4cbdfbbd2f4 148 uint32_t LowPowerFrequencyMode; /*!< When selecting an analog ADC clock frequency lower than 2.8MHz,
mbed_official 181:a4cbdfbbd2f4 149 it is mandatory to first enable the Low Frequency Mode.
mbed_official 181:a4cbdfbbd2f4 150 This parameter can be set to ENABLE or DISABLE.
mbed_official 181:a4cbdfbbd2f4 151 Note: This parameter can be modified only if there is no conversion is ongoing. */
mbed_official 181:a4cbdfbbd2f4 152 uint32_t LowPowerAutoOff; /*!< When setting the AutoOff feature, the ADC is always powered off when not converting and automatically
mbed_official 181:a4cbdfbbd2f4 153 wakes-up when a conversion is started (by software or hardware trigger).
mbed_official 181:a4cbdfbbd2f4 154 This parameter can be set to ENABLE or DISABLE.
mbed_official 181:a4cbdfbbd2f4 155 Note: This parameter can be modified only if there is no conversion is ongoing. */
mbed_official 181:a4cbdfbbd2f4 156 }ADC_InitTypeDef;
mbed_official 181:a4cbdfbbd2f4 157
mbed_official 181:a4cbdfbbd2f4 158 /**
mbed_official 181:a4cbdfbbd2f4 159 * @brief ADC handle Structure definition
mbed_official 181:a4cbdfbbd2f4 160 */
mbed_official 181:a4cbdfbbd2f4 161 typedef struct __ADC_HandleTypeDef
mbed_official 181:a4cbdfbbd2f4 162 {
mbed_official 181:a4cbdfbbd2f4 163 ADC_TypeDef *Instance; /*!< Register base address */
mbed_official 181:a4cbdfbbd2f4 164
mbed_official 181:a4cbdfbbd2f4 165 ADC_InitTypeDef Init; /*!< ADC required parameters */
mbed_official 181:a4cbdfbbd2f4 166
mbed_official 181:a4cbdfbbd2f4 167 DMA_HandleTypeDef *DMA_Handle; /*!< Pointer DMA Handler */
mbed_official 181:a4cbdfbbd2f4 168
mbed_official 181:a4cbdfbbd2f4 169 HAL_LockTypeDef Lock; /*!< ADC locking object */
mbed_official 181:a4cbdfbbd2f4 170
mbed_official 181:a4cbdfbbd2f4 171 __IO HAL_ADC_StateTypeDef State; /*!< ADC communication state */
mbed_official 181:a4cbdfbbd2f4 172
mbed_official 181:a4cbdfbbd2f4 173 __IO uint32_t ErrorCode; /*!< ADC Error code */
mbed_official 181:a4cbdfbbd2f4 174 }ADC_HandleTypeDef;
mbed_official 181:a4cbdfbbd2f4 175
mbed_official 181:a4cbdfbbd2f4 176 /**
mbed_official 181:a4cbdfbbd2f4 177 * @brief ADC Configuration regular Channel structure definition
mbed_official 181:a4cbdfbbd2f4 178 */
mbed_official 181:a4cbdfbbd2f4 179 typedef struct
mbed_official 181:a4cbdfbbd2f4 180 {
mbed_official 181:a4cbdfbbd2f4 181 uint32_t Channel; /*!< the ADC channel to configure
mbed_official 181:a4cbdfbbd2f4 182 This parameter can be a value of @ref ADC_channels */
mbed_official 181:a4cbdfbbd2f4 183 }ADC_ChannelConfTypeDef;
mbed_official 181:a4cbdfbbd2f4 184
mbed_official 181:a4cbdfbbd2f4 185
mbed_official 181:a4cbdfbbd2f4 186 /**
mbed_official 181:a4cbdfbbd2f4 187 * @brief ADC Configuration analog watchdog definition
mbed_official 181:a4cbdfbbd2f4 188 */
mbed_official 181:a4cbdfbbd2f4 189 typedef struct
mbed_official 181:a4cbdfbbd2f4 190 {
mbed_official 181:a4cbdfbbd2f4 191 uint32_t WatchdogMode; /*!< Configures the ADC analog watchdog mode: single/all channels.
mbed_official 181:a4cbdfbbd2f4 192 This parameter can be a value of @ref ADC_analog_watchdog_mode. */
mbed_official 181:a4cbdfbbd2f4 193 uint32_t Channel; /*!< Selects which ADC channel to monitor by analog watchdog.
mbed_official 181:a4cbdfbbd2f4 194 This parameter has an effect only if watchdog mode is configured on single channel (parameter WatchdogMode)
mbed_official 181:a4cbdfbbd2f4 195 This parameter can be a value of @ref ADC_channels. */
mbed_official 181:a4cbdfbbd2f4 196 uint32_t ITMode; /*!< Specifies whether the analog watchdog is configured in interrupt or polling mode.
mbed_official 181:a4cbdfbbd2f4 197 This parameter can be set to ENABLE or DISABLE */
mbed_official 181:a4cbdfbbd2f4 198 uint32_t HighThreshold; /*!< Configures the ADC analog watchdog High threshold value.
mbed_official 181:a4cbdfbbd2f4 199 Depending of ADC resolution selected (12, 10, 8 or 6 bits),
mbed_official 181:a4cbdfbbd2f4 200 this parameter must be a number between Min_Data = 0x000 and Max_Data = 0xFFF, 0x3FF, 0xFF or 0x3F respectively. */
mbed_official 181:a4cbdfbbd2f4 201 uint32_t LowThreshold; /*!< Configures the ADC analog watchdog High threshold value.
mbed_official 181:a4cbdfbbd2f4 202 Depending of ADC resolution selected (12, 10, 8 or 6 bits),
mbed_official 181:a4cbdfbbd2f4 203 this parameter must be a number between Min_Data = 0x000 and Max_Data = 0xFFF, 0x3FF, 0xFF or 0x3F respectively. */
mbed_official 181:a4cbdfbbd2f4 204 }ADC_AnalogWDGConfTypeDef;
mbed_official 181:a4cbdfbbd2f4 205
mbed_official 181:a4cbdfbbd2f4 206
mbed_official 181:a4cbdfbbd2f4 207 /* Exported constants --------------------------------------------------------*/
mbed_official 181:a4cbdfbbd2f4 208
mbed_official 181:a4cbdfbbd2f4 209 /** @defgroup ADC_Exported_Constants
mbed_official 181:a4cbdfbbd2f4 210 * @{
mbed_official 181:a4cbdfbbd2f4 211 */
mbed_official 181:a4cbdfbbd2f4 212
mbed_official 181:a4cbdfbbd2f4 213 /** @defgroup ADC_Error_Code
mbed_official 181:a4cbdfbbd2f4 214 * @{
mbed_official 181:a4cbdfbbd2f4 215 */
mbed_official 181:a4cbdfbbd2f4 216 #define HAL_ADC_ERROR_NONE ((uint32_t)0x00) /*!< No error */
mbed_official 181:a4cbdfbbd2f4 217 #define HAL_ADC_ERROR_INTERNAL ((uint32_t)0x01) /*!< ADC IP internal error: if problem of clocking,
mbed_official 181:a4cbdfbbd2f4 218 enable/disable, erroneous state */
mbed_official 181:a4cbdfbbd2f4 219 #define HAL_ADC_ERROR_OVR ((uint32_t)0x01) /*!< OVR error */
mbed_official 181:a4cbdfbbd2f4 220 #define HAL_ADC_ERROR_DMA ((uint32_t)0x02) /*!< DMA transfer error */
mbed_official 181:a4cbdfbbd2f4 221 /**
mbed_official 181:a4cbdfbbd2f4 222 * @}
mbed_official 181:a4cbdfbbd2f4 223 */
mbed_official 181:a4cbdfbbd2f4 224
mbed_official 181:a4cbdfbbd2f4 225 /** @defgroup ADC_TimeOut_Values
mbed_official 181:a4cbdfbbd2f4 226 * @{
mbed_official 181:a4cbdfbbd2f4 227 */
mbed_official 181:a4cbdfbbd2f4 228
mbed_official 181:a4cbdfbbd2f4 229 /* Fixed timeout values for ADC calibration, enable settling time, disable */
mbed_official 181:a4cbdfbbd2f4 230 /* settling time. */
mbed_official 181:a4cbdfbbd2f4 231 /* Values defined to be higher than worst cases: low clocks freq, */
mbed_official 181:a4cbdfbbd2f4 232 /* maximum prescalers. */
mbed_official 181:a4cbdfbbd2f4 233 /* Unit: ms */
mbed_official 181:a4cbdfbbd2f4 234 #define ADC_ENABLE_TIMEOUT 10
mbed_official 181:a4cbdfbbd2f4 235 #define ADC_DISABLE_TIMEOUT 10
mbed_official 181:a4cbdfbbd2f4 236 #define ADC_STOP_CONVERSION_TIMEOUT 10
mbed_official 181:a4cbdfbbd2f4 237
mbed_official 181:a4cbdfbbd2f4 238 /* Delay of 10us fixed to worst case: maximum CPU frequency 180MHz to have */
mbed_official 181:a4cbdfbbd2f4 239 /* the minimum number of CPU cycles to fulfill this delay */
mbed_official 181:a4cbdfbbd2f4 240 #define ADC_DELAY_10US_MIN_CPU_CYCLES 1800
mbed_official 181:a4cbdfbbd2f4 241 /**
mbed_official 181:a4cbdfbbd2f4 242 * @}
mbed_official 181:a4cbdfbbd2f4 243 */
mbed_official 181:a4cbdfbbd2f4 244
mbed_official 181:a4cbdfbbd2f4 245 /** @defgroup ADC_ClockPrescaler
mbed_official 181:a4cbdfbbd2f4 246 * @{
mbed_official 181:a4cbdfbbd2f4 247 */
mbed_official 181:a4cbdfbbd2f4 248 #define ADC_CLOCK_ASYNC_DIV1 ((uint32_t)0x00000000) /*!< ADC Asynchronous clock mode divided by 1 */
mbed_official 181:a4cbdfbbd2f4 249 #define ADC_CLOCK_ASYNC_DIV2 (ADC_CCR_PRESC_0) /*!< ADC Asynchronous clock mode divided by 2 */
mbed_official 181:a4cbdfbbd2f4 250 #define ADC_CLOCK_ASYNC_DIV4 (ADC_CCR_PRESC_1) /*!< ADC Asynchronous clock mode divided by 2 */
mbed_official 181:a4cbdfbbd2f4 251 #define ADC_CLOCK_ASYNC_DIV6 (ADC_CCR_PRESC_1 | ADC_CCR_PRESC_0) /*!< ADC Asynchronous clock mode divided by 2 */
mbed_official 181:a4cbdfbbd2f4 252 #define ADC_CLOCK_ASYNC_DIV8 (ADC_CCR_PRESC_2) /*!< ADC Asynchronous clock mode divided by 2 */
mbed_official 181:a4cbdfbbd2f4 253 #define ADC_CLOCK_ASYNC_DIV10 (ADC_CCR_PRESC_2 | ADC_CCR_PRESC_0) /*!< ADC Asynchronous clock mode divided by 2 */
mbed_official 181:a4cbdfbbd2f4 254 #define ADC_CLOCK_ASYNC_DIV12 (ADC_CCR_PRESC_2 | ADC_CCR_PRESC_1) /*!< ADC Asynchronous clock mode divided by 2 */
mbed_official 181:a4cbdfbbd2f4 255 #define ADC_CLOCK_ASYNC_DIV16 (ADC_CCR_PRESC_2 | ADC_CCR_PRESC_1 | ADC_CCR_PRESC_0) /*!< ADC Asynchronous clock mode divided by 2 */
mbed_official 181:a4cbdfbbd2f4 256 #define ADC_CLOCK_ASYNC_DIV32 (ADC_CCR_PRESC_3) /*!< ADC Asynchronous clock mode divided by 2 */
mbed_official 181:a4cbdfbbd2f4 257 #define ADC_CLOCK_ASYNC_DIV64 (ADC_CCR_PRESC_3 | ADC_CCR_PRESC_0) /*!< ADC Asynchronous clock mode divided by 2 */
mbed_official 181:a4cbdfbbd2f4 258 #define ADC_CLOCK_ASYNC_DIV128 (ADC_CCR_PRESC_3 | ADC_CCR_PRESC_1) /*!< ADC Asynchronous clock mode divided by 2 */
mbed_official 181:a4cbdfbbd2f4 259 #define ADC_CLOCK_ASYNC_DIV256 (ADC_CCR_PRESC_3 | ADC_CCR_PRESC_1 | ADC_CCR_PRESC_0) /*!< ADC Asynchronous clock mode divided by 2 */
mbed_official 181:a4cbdfbbd2f4 260
mbed_official 181:a4cbdfbbd2f4 261 #define ADC_CLOCKPRESCALER_PCLK_DIV1 ((uint32_t)ADC_CFGR2_CKMODE_0) /*!< Synchronous clock mode divided by 1 */
mbed_official 181:a4cbdfbbd2f4 262 #define ADC_CLOCKPRESCALER_PCLK_DIV2 ((uint32_t)ADC_CFGR2_CKMODE_1) /*!< Synchronous clock mode divided by 2 */
mbed_official 181:a4cbdfbbd2f4 263 #define ADC_CLOCKPRESCALER_PCLK_DIV4 ((uint32_t)ADC_CFGR2_CKMODE) /*!< Synchronous clock mode divided by 4 */
mbed_official 181:a4cbdfbbd2f4 264
mbed_official 181:a4cbdfbbd2f4 265 #define IS_ADC_CLOCKPRESCALER(ADC_CLOCK) (((ADC_CLOCK) == ADC_CLOCK_ASYNC_DIV1) ||\
mbed_official 181:a4cbdfbbd2f4 266 ((ADC_CLOCK) == ADC_CLOCKPRESCALER_PCLK_DIV1) ||\
mbed_official 181:a4cbdfbbd2f4 267 ((ADC_CLOCK) == ADC_CLOCKPRESCALER_PCLK_DIV2) ||\
mbed_official 181:a4cbdfbbd2f4 268 ((ADC_CLOCK) == ADC_CLOCKPRESCALER_PCLK_DIV4) ||\
mbed_official 181:a4cbdfbbd2f4 269 ((ADC_CLOCK) == ADC_CLOCK_ASYNC_DIV1 ) ||\
mbed_official 181:a4cbdfbbd2f4 270 ((ADC_CLOCK) == ADC_CLOCK_ASYNC_DIV2 ) ||\
mbed_official 181:a4cbdfbbd2f4 271 ((ADC_CLOCK) == ADC_CLOCK_ASYNC_DIV4 ) ||\
mbed_official 181:a4cbdfbbd2f4 272 ((ADC_CLOCK) == ADC_CLOCK_ASYNC_DIV6 ) ||\
mbed_official 181:a4cbdfbbd2f4 273 ((ADC_CLOCK) == ADC_CLOCK_ASYNC_DIV8 ) ||\
mbed_official 181:a4cbdfbbd2f4 274 ((ADC_CLOCK) == ADC_CLOCK_ASYNC_DIV10 ) ||\
mbed_official 181:a4cbdfbbd2f4 275 ((ADC_CLOCK) == ADC_CLOCK_ASYNC_DIV12 ) ||\
mbed_official 181:a4cbdfbbd2f4 276 ((ADC_CLOCK) == ADC_CLOCK_ASYNC_DIV16 ) ||\
mbed_official 181:a4cbdfbbd2f4 277 ((ADC_CLOCK) == ADC_CLOCK_ASYNC_DIV32 ) ||\
mbed_official 181:a4cbdfbbd2f4 278 ((ADC_CLOCK) == ADC_CLOCK_ASYNC_DIV64 ) ||\
mbed_official 181:a4cbdfbbd2f4 279 ((ADC_CLOCK) == ADC_CLOCK_ASYNC_DIV128 ) ||\
mbed_official 181:a4cbdfbbd2f4 280 ((ADC_CLOCK) == ADC_CLOCK_ASYNC_DIV256))
mbed_official 181:a4cbdfbbd2f4 281 /**
mbed_official 181:a4cbdfbbd2f4 282 * @}
mbed_official 181:a4cbdfbbd2f4 283 */
mbed_official 181:a4cbdfbbd2f4 284
mbed_official 181:a4cbdfbbd2f4 285 /** @defgroup ADC_Resolution
mbed_official 181:a4cbdfbbd2f4 286 * @{
mbed_official 181:a4cbdfbbd2f4 287 */
mbed_official 181:a4cbdfbbd2f4 288 #define ADC_RESOLUTION12b ((uint32_t)0x00000000) /*!< ADC 12-bit resolution */
mbed_official 181:a4cbdfbbd2f4 289 #define ADC_RESOLUTION10b ((uint32_t)ADC_CFGR1_RES_0) /*!< ADC 10-bit resolution */
mbed_official 181:a4cbdfbbd2f4 290 #define ADC_RESOLUTION8b ((uint32_t)ADC_CFGR1_RES_1) /*!< ADC 8-bit resolution */
mbed_official 181:a4cbdfbbd2f4 291 #define ADC_RESOLUTION6b ((uint32_t)ADC_CFGR1_RES) /*!< ADC 6-bit resolution */
mbed_official 181:a4cbdfbbd2f4 292
mbed_official 181:a4cbdfbbd2f4 293 #define IS_ADC_RESOLUTION(RESOLUTION) (((RESOLUTION) == ADC_RESOLUTION12b) || \
mbed_official 181:a4cbdfbbd2f4 294 ((RESOLUTION) == ADC_RESOLUTION10b) || \
mbed_official 181:a4cbdfbbd2f4 295 ((RESOLUTION) == ADC_RESOLUTION8b) || \
mbed_official 181:a4cbdfbbd2f4 296 ((RESOLUTION) == ADC_RESOLUTION6b))
mbed_official 181:a4cbdfbbd2f4 297
mbed_official 181:a4cbdfbbd2f4 298 #define IS_ADC_RESOLUTION_8_6_BITS(RESOLUTION) (((RESOLUTION) == ADC_RESOLUTION8b) || \
mbed_official 181:a4cbdfbbd2f4 299 ((RESOLUTION) == ADC_RESOLUTION6b))
mbed_official 181:a4cbdfbbd2f4 300 /**
mbed_official 181:a4cbdfbbd2f4 301 * @}
mbed_official 181:a4cbdfbbd2f4 302 */
mbed_official 181:a4cbdfbbd2f4 303
mbed_official 181:a4cbdfbbd2f4 304 /** @defgroup ADC_data_align
mbed_official 181:a4cbdfbbd2f4 305 * @{
mbed_official 181:a4cbdfbbd2f4 306 */
mbed_official 181:a4cbdfbbd2f4 307 #define ADC_DATAALIGN_RIGHT ((uint32_t)0x00000000)
mbed_official 181:a4cbdfbbd2f4 308 #define ADC_DATAALIGN_LEFT ((uint32_t)ADC_CFGR1_ALIGN)
mbed_official 181:a4cbdfbbd2f4 309
mbed_official 181:a4cbdfbbd2f4 310 #define IS_ADC_DATA_ALIGN(ALIGN) (((ALIGN) == ADC_DATAALIGN_RIGHT) || \
mbed_official 181:a4cbdfbbd2f4 311 ((ALIGN) == ADC_DATAALIGN_LEFT))
mbed_official 181:a4cbdfbbd2f4 312 /**
mbed_official 181:a4cbdfbbd2f4 313 * @}
mbed_official 181:a4cbdfbbd2f4 314 */
mbed_official 181:a4cbdfbbd2f4 315
mbed_official 181:a4cbdfbbd2f4 316 /** @defgroup ADC_External_trigger_Edge
mbed_official 181:a4cbdfbbd2f4 317 * @{
mbed_official 181:a4cbdfbbd2f4 318 */
mbed_official 181:a4cbdfbbd2f4 319 #define ADC_EXTERNALTRIG_EDGE_NONE ((uint32_t)0x00000000)
mbed_official 181:a4cbdfbbd2f4 320 #define ADC_EXTERNALTRIG_EDGE_RISING ((uint32_t)ADC_CFGR1_EXTEN_0)
mbed_official 181:a4cbdfbbd2f4 321 #define ADC_EXTERNALTRIG_EDGE_FALLING ((uint32_t)ADC_CFGR1_EXTEN_1)
mbed_official 181:a4cbdfbbd2f4 322 #define ADC_EXTERNALTRIG_EDGE_RISINGFALLING ((uint32_t)ADC_CFGR1_EXTEN)
mbed_official 181:a4cbdfbbd2f4 323
mbed_official 181:a4cbdfbbd2f4 324 #define IS_ADC_EXTTRIG_EDGE(EDGE) (((EDGE) == ADC_EXTERNALTRIG_EDGE_NONE) || \
mbed_official 181:a4cbdfbbd2f4 325 ((EDGE) == ADC_EXTERNALTRIG_EDGE_RISING) || \
mbed_official 181:a4cbdfbbd2f4 326 ((EDGE) == ADC_EXTERNALTRIG_EDGE_FALLING) || \
mbed_official 181:a4cbdfbbd2f4 327 ((EDGE) == ADC_EXTERNALTRIG_EDGE_RISINGFALLING))
mbed_official 181:a4cbdfbbd2f4 328 /**
mbed_official 181:a4cbdfbbd2f4 329 * @}
mbed_official 181:a4cbdfbbd2f4 330 */
mbed_official 181:a4cbdfbbd2f4 331
mbed_official 181:a4cbdfbbd2f4 332 /** @defgroup ADC_External_trigger_Source
mbed_official 181:a4cbdfbbd2f4 333 * @{
mbed_official 181:a4cbdfbbd2f4 334 */
mbed_official 181:a4cbdfbbd2f4 335 #define ADC_EXTERNALTRIG0_T6_TRGO ((uint32_t)0x00000000)
mbed_official 181:a4cbdfbbd2f4 336 #define ADC_EXTERNALTRIG1_T21_CC2 ADC_CFGR1_EXTSEL_0
mbed_official 181:a4cbdfbbd2f4 337 #define ADC_EXTERNALTRIG2_T2_TRGO ADC_CFGR1_EXTSEL_1
mbed_official 181:a4cbdfbbd2f4 338 #define ADC_EXTERNALTRIG3_T2_CC4 ((uint32_t)0x000000C0)
mbed_official 181:a4cbdfbbd2f4 339 #define ADC_EXTERNALTRIG4_T22_TRGO ADC_CFGR1_EXTSEL_2
mbed_official 181:a4cbdfbbd2f4 340 #define ADC_EXTERNALTRIG7_EXT_IT11 ADC_CFGR1_EXTSEL
mbed_official 181:a4cbdfbbd2f4 341
mbed_official 181:a4cbdfbbd2f4 342 #define IS_ADC_EXTERNAL_TRIG_CONV(CONV) (((CONV) == ADC_EXTERNALTRIG0_T6_TRGO ) || \
mbed_official 181:a4cbdfbbd2f4 343 ((CONV) == ADC_EXTERNALTRIG1_T21_CC2 ) || \
mbed_official 181:a4cbdfbbd2f4 344 ((CONV) == ADC_EXTERNALTRIG2_T2_TRGO ) || \
mbed_official 181:a4cbdfbbd2f4 345 ((CONV) == ADC_EXTERNALTRIG3_T2_CC4 ) || \
mbed_official 181:a4cbdfbbd2f4 346 ((CONV) == ADC_EXTERNALTRIG4_T22_TRGO ) || \
mbed_official 181:a4cbdfbbd2f4 347 ((CONV) == ADC_EXTERNALTRIG7_EXT_IT11 ))
mbed_official 181:a4cbdfbbd2f4 348
mbed_official 181:a4cbdfbbd2f4 349 /**
mbed_official 181:a4cbdfbbd2f4 350 * @}
mbed_official 181:a4cbdfbbd2f4 351 */
mbed_official 181:a4cbdfbbd2f4 352
mbed_official 181:a4cbdfbbd2f4 353 /** @defgroup ADC_EOCSelection
mbed_official 181:a4cbdfbbd2f4 354 * @{
mbed_official 181:a4cbdfbbd2f4 355 */
mbed_official 181:a4cbdfbbd2f4 356 #define EOC_SINGLE_CONV ((uint32_t) ADC_ISR_EOC)
mbed_official 181:a4cbdfbbd2f4 357 #define EOC_SEQ_CONV ((uint32_t) ADC_ISR_EOS)
mbed_official 181:a4cbdfbbd2f4 358 #define EOC_SINGLE_SEQ_CONV ((uint32_t)(ADC_ISR_EOC | ADC_ISR_EOS)) /*!< reserved for future use */
mbed_official 181:a4cbdfbbd2f4 359
mbed_official 181:a4cbdfbbd2f4 360 #define IS_ADC_EOC_SELECTION(EOC_SELECTION) (((EOC_SELECTION) == EOC_SINGLE_CONV) || \
mbed_official 181:a4cbdfbbd2f4 361 ((EOC_SELECTION) == EOC_SEQ_CONV) || \
mbed_official 181:a4cbdfbbd2f4 362 ((EOC_SELECTION) == EOC_SINGLE_SEQ_CONV))
mbed_official 181:a4cbdfbbd2f4 363 /**
mbed_official 181:a4cbdfbbd2f4 364 * @}
mbed_official 181:a4cbdfbbd2f4 365 */
mbed_official 181:a4cbdfbbd2f4 366
mbed_official 181:a4cbdfbbd2f4 367 /** @defgroup ADC_Overrun
mbed_official 181:a4cbdfbbd2f4 368 * @{
mbed_official 181:a4cbdfbbd2f4 369 */
mbed_official 181:a4cbdfbbd2f4 370 #define OVR_DATA_PRESERVED ((uint32_t)0x00000000)
mbed_official 181:a4cbdfbbd2f4 371 #define OVR_DATA_OVERWRITTEN ((uint32_t)ADC_CFGR1_OVRMOD)
mbed_official 181:a4cbdfbbd2f4 372
mbed_official 181:a4cbdfbbd2f4 373 #define IS_ADC_OVERRUN(OVR) (((OVR) == OVR_DATA_PRESERVED) || \
mbed_official 181:a4cbdfbbd2f4 374 ((OVR) == OVR_DATA_OVERWRITTEN))
mbed_official 181:a4cbdfbbd2f4 375 /**
mbed_official 181:a4cbdfbbd2f4 376 * @}
mbed_official 181:a4cbdfbbd2f4 377 */
mbed_official 181:a4cbdfbbd2f4 378
mbed_official 181:a4cbdfbbd2f4 379 /** @defgroup ADC_channels
mbed_official 181:a4cbdfbbd2f4 380 * @{
mbed_official 181:a4cbdfbbd2f4 381 */
mbed_official 181:a4cbdfbbd2f4 382 #define ADC_CHANNEL_0 ((uint32_t)(ADC_CHSELR_CHSEL0))
mbed_official 181:a4cbdfbbd2f4 383 #define ADC_CHANNEL_1 ((uint32_t)(ADC_CHSELR_CHSEL1) | ADC_CFGR1_AWDCH_0)
mbed_official 181:a4cbdfbbd2f4 384 #define ADC_CHANNEL_2 ((uint32_t)(ADC_CHSELR_CHSEL2) | ADC_CFGR1_AWDCH_1)
mbed_official 181:a4cbdfbbd2f4 385 #define ADC_CHANNEL_3 ((uint32_t)(ADC_CHSELR_CHSEL3)| ADC_CFGR1_AWDCH_1 | ADC_CFGR1_AWDCH_0)
mbed_official 181:a4cbdfbbd2f4 386 #define ADC_CHANNEL_4 ((uint32_t)(ADC_CHSELR_CHSEL4)| ADC_CFGR1_AWDCH_2)
mbed_official 181:a4cbdfbbd2f4 387 #define ADC_CHANNEL_5 ((uint32_t)(ADC_CHSELR_CHSEL5)| ADC_CFGR1_AWDCH_2| ADC_CFGR1_AWDCH_0)
mbed_official 181:a4cbdfbbd2f4 388 #define ADC_CHANNEL_6 ((uint32_t)(ADC_CHSELR_CHSEL6)| ADC_CFGR1_AWDCH_2| ADC_CFGR1_AWDCH_1)
mbed_official 181:a4cbdfbbd2f4 389 #define ADC_CHANNEL_7 ((uint32_t)(ADC_CHSELR_CHSEL7)| ADC_CFGR1_AWDCH_2| ADC_CFGR1_AWDCH_1 | ADC_CFGR1_AWDCH_0)
mbed_official 181:a4cbdfbbd2f4 390 #define ADC_CHANNEL_8 ((uint32_t)(ADC_CHSELR_CHSEL8)| ADC_CFGR1_AWDCH_3)
mbed_official 181:a4cbdfbbd2f4 391 #define ADC_CHANNEL_9 ((uint32_t)(ADC_CHSELR_CHSEL9)| ADC_CFGR1_AWDCH_3| ADC_CFGR1_AWDCH_0)
mbed_official 181:a4cbdfbbd2f4 392 #define ADC_CHANNEL_10 ((uint32_t)(ADC_CHSELR_CHSEL10)| ADC_CFGR1_AWDCH_3| ADC_CFGR1_AWDCH_1)
mbed_official 181:a4cbdfbbd2f4 393 #define ADC_CHANNEL_11 ((uint32_t)(ADC_CHSELR_CHSEL11)| ADC_CFGR1_AWDCH_3| ADC_CFGR1_AWDCH_1| ADC_CFGR1_AWDCH_0)
mbed_official 181:a4cbdfbbd2f4 394 #define ADC_CHANNEL_12 ((uint32_t)(ADC_CHSELR_CHSEL12)| ADC_CFGR1_AWDCH_3| ADC_CFGR1_AWDCH_2)
mbed_official 181:a4cbdfbbd2f4 395 #define ADC_CHANNEL_13 ((uint32_t)(ADC_CHSELR_CHSEL13)| ADC_CFGR1_AWDCH_3| ADC_CFGR1_AWDCH_2| ADC_CFGR1_AWDCH_0)
mbed_official 181:a4cbdfbbd2f4 396 #define ADC_CHANNEL_14 ((uint32_t)(ADC_CHSELR_CHSEL14)| ADC_CFGR1_AWDCH_3| ADC_CFGR1_AWDCH_2| ADC_CFGR1_AWDCH_1)
mbed_official 181:a4cbdfbbd2f4 397 #define ADC_CHANNEL_15 ((uint32_t)(ADC_CHSELR_CHSEL15)| ADC_CFGR1_AWDCH_3| ADC_CFGR1_AWDCH_2| ADC_CFGR1_AWDCH_1| ADC_CFGR1_AWDCH_0)
mbed_official 181:a4cbdfbbd2f4 398 #define ADC_CHANNEL_16 ((uint32_t)(ADC_CHSELR_CHSEL16)| ADC_CFGR1_AWDCH_4)
mbed_official 181:a4cbdfbbd2f4 399 #define ADC_CHANNEL_17 ((uint32_t)(ADC_CHSELR_CHSEL17)| ADC_CFGR1_AWDCH_4| ADC_CFGR1_AWDCH_0)
mbed_official 181:a4cbdfbbd2f4 400 #define ADC_CHANNEL_18 ((uint32_t)(ADC_CHSELR_CHSEL18)| ADC_CFGR1_AWDCH_4| ADC_CFGR1_AWDCH_1)
mbed_official 181:a4cbdfbbd2f4 401
mbed_official 181:a4cbdfbbd2f4 402 /* Internal channels */
mbed_official 181:a4cbdfbbd2f4 403 #define ADC_CHANNEL_TEMPSENSOR ADC_CHANNEL_16
mbed_official 181:a4cbdfbbd2f4 404 #define ADC_CHANNEL_VREFINT ADC_CHANNEL_17
mbed_official 181:a4cbdfbbd2f4 405 #define ADC_CHANNEL_VLCD ADC_CHANNEL_18
mbed_official 181:a4cbdfbbd2f4 406
mbed_official 181:a4cbdfbbd2f4 407
mbed_official 181:a4cbdfbbd2f4 408 #define IS_ADC_CHANNEL(CHANNEL) (((CHANNEL) == ADC_CHANNEL_0) || \
mbed_official 181:a4cbdfbbd2f4 409 ((CHANNEL) == ADC_CHANNEL_1) || \
mbed_official 181:a4cbdfbbd2f4 410 ((CHANNEL) == ADC_CHANNEL_2) || \
mbed_official 181:a4cbdfbbd2f4 411 ((CHANNEL) == ADC_CHANNEL_3) || \
mbed_official 181:a4cbdfbbd2f4 412 ((CHANNEL) == ADC_CHANNEL_4) || \
mbed_official 181:a4cbdfbbd2f4 413 ((CHANNEL) == ADC_CHANNEL_5) || \
mbed_official 181:a4cbdfbbd2f4 414 ((CHANNEL) == ADC_CHANNEL_6) || \
mbed_official 181:a4cbdfbbd2f4 415 ((CHANNEL) == ADC_CHANNEL_7) || \
mbed_official 181:a4cbdfbbd2f4 416 ((CHANNEL) == ADC_CHANNEL_8) || \
mbed_official 181:a4cbdfbbd2f4 417 ((CHANNEL) == ADC_CHANNEL_9) || \
mbed_official 181:a4cbdfbbd2f4 418 ((CHANNEL) == ADC_CHANNEL_10) || \
mbed_official 181:a4cbdfbbd2f4 419 ((CHANNEL) == ADC_CHANNEL_11) || \
mbed_official 181:a4cbdfbbd2f4 420 ((CHANNEL) == ADC_CHANNEL_12) || \
mbed_official 181:a4cbdfbbd2f4 421 ((CHANNEL) == ADC_CHANNEL_13) || \
mbed_official 181:a4cbdfbbd2f4 422 ((CHANNEL) == ADC_CHANNEL_14) || \
mbed_official 181:a4cbdfbbd2f4 423 ((CHANNEL) == ADC_CHANNEL_15) || \
mbed_official 181:a4cbdfbbd2f4 424 ((CHANNEL) == ADC_CHANNEL_TEMPSENSOR) || \
mbed_official 181:a4cbdfbbd2f4 425 ((CHANNEL) == ADC_CHANNEL_VREFINT) || \
mbed_official 181:a4cbdfbbd2f4 426 ((CHANNEL) == ADC_CHANNEL_VLCD))
mbed_official 181:a4cbdfbbd2f4 427
mbed_official 181:a4cbdfbbd2f4 428 /**
mbed_official 181:a4cbdfbbd2f4 429 * @}
mbed_official 181:a4cbdfbbd2f4 430 */
mbed_official 181:a4cbdfbbd2f4 431
mbed_official 181:a4cbdfbbd2f4 432 /** @defgroup ADC_Channel_AWD_Masks
mbed_official 181:a4cbdfbbd2f4 433 * @{
mbed_official 181:a4cbdfbbd2f4 434 */
mbed_official 181:a4cbdfbbd2f4 435 #define ADC_CHANNEL_MASK ((uint32_t)0x0007FFFF)
mbed_official 181:a4cbdfbbd2f4 436 #define ADC_CHANNEL_AWD_MASK ((uint32_t)0x7C000000)
mbed_official 181:a4cbdfbbd2f4 437 /**
mbed_official 181:a4cbdfbbd2f4 438 * @}
mbed_official 181:a4cbdfbbd2f4 439 */
mbed_official 181:a4cbdfbbd2f4 440
mbed_official 181:a4cbdfbbd2f4 441
mbed_official 181:a4cbdfbbd2f4 442 /** @defgroup ADC_sampling_times
mbed_official 181:a4cbdfbbd2f4 443 * @{
mbed_official 181:a4cbdfbbd2f4 444 */
mbed_official 181:a4cbdfbbd2f4 445
mbed_official 181:a4cbdfbbd2f4 446 #define ADC_SAMPLETIME_1CYCLE_5 ((uint32_t)0x00000000) /*!< ADC sampling time 1.5 cycle */
mbed_official 181:a4cbdfbbd2f4 447 #define ADC_SAMPLETIME_7CYCLES_5 ((uint32_t)ADC_SMPR_SMPR_0) /*!< ADC sampling time 7.5 CYCLES */
mbed_official 181:a4cbdfbbd2f4 448 #define ADC_SAMPLETIME_13CYCLES_5 ((uint32_t)ADC_SMPR_SMPR_1) /*!< ADC sampling time 13.5 CYCLES */
mbed_official 181:a4cbdfbbd2f4 449 #define ADC_SAMPLETIME_28CYCLES_5 ((uint32_t)(ADC_SMPR_SMPR_1 | ADC_SMPR_SMPR_0)) /*!< ADC sampling time 28.5 CYCLES */
mbed_official 181:a4cbdfbbd2f4 450 #define ADC_SAMPLETIME_41CYCLES_5 ((uint32_t)ADC_SMPR_SMPR_2) /*!< ADC sampling time 41.5 CYCLES */
mbed_official 181:a4cbdfbbd2f4 451 #define ADC_SAMPLETIME_55CYCLES_5 ((uint32_t)(ADC_SMPR_SMPR_2 | ADC_SMPR_SMPR_0)) /*!< ADC sampling time 55.5 CYCLES */
mbed_official 181:a4cbdfbbd2f4 452 #define ADC_SAMPLETIME_71CYCLES_5 ((uint32_t)(ADC_SMPR_SMPR_2 | ADC_SMPR_SMPR_1)) /*!< ADC sampling time 71.5 CYCLES */
mbed_official 181:a4cbdfbbd2f4 453 #define ADC_SAMPLETIME_239CYCLES_5 ((uint32_t)ADC_SMPR_SMPR) /*!< ADC sampling time 239.5 CYCLES */
mbed_official 181:a4cbdfbbd2f4 454
mbed_official 181:a4cbdfbbd2f4 455 #define IS_ADC_SAMPLE_TIME(TIME) (((TIME) == ADC_SAMPLETIME_1CYCLE_5 ) || \
mbed_official 181:a4cbdfbbd2f4 456 ((TIME) == ADC_SAMPLETIME_7CYCLES_5 ) || \
mbed_official 181:a4cbdfbbd2f4 457 ((TIME) == ADC_SAMPLETIME_13CYCLES_5 ) || \
mbed_official 181:a4cbdfbbd2f4 458 ((TIME) == ADC_SAMPLETIME_28CYCLES_5 ) || \
mbed_official 181:a4cbdfbbd2f4 459 ((TIME) == ADC_SAMPLETIME_41CYCLES_5 ) || \
mbed_official 181:a4cbdfbbd2f4 460 ((TIME) == ADC_SAMPLETIME_55CYCLES_5 ) || \
mbed_official 181:a4cbdfbbd2f4 461 ((TIME) == ADC_SAMPLETIME_71CYCLES_5 ) || \
mbed_official 181:a4cbdfbbd2f4 462 ((TIME) == ADC_SAMPLETIME_239CYCLES_5))
mbed_official 181:a4cbdfbbd2f4 463 /**
mbed_official 181:a4cbdfbbd2f4 464 * @}
mbed_official 181:a4cbdfbbd2f4 465 */
mbed_official 181:a4cbdfbbd2f4 466
mbed_official 181:a4cbdfbbd2f4 467 /** @defgroup ADC_scan_direction
mbed_official 181:a4cbdfbbd2f4 468 * @{
mbed_official 181:a4cbdfbbd2f4 469 */
mbed_official 181:a4cbdfbbd2f4 470 #define ADC_SCAN_DIRECTION_UPWARD ((uint32_t)0x00000000)
mbed_official 181:a4cbdfbbd2f4 471 #define ADC_SCAN_DIRECTION_BACKWARD ADC_CFGR1_SCANDIR
mbed_official 181:a4cbdfbbd2f4 472
mbed_official 181:a4cbdfbbd2f4 473
mbed_official 181:a4cbdfbbd2f4 474 #define IS_ADC_SCAN_DIRECTION(DIRECTION) (((DIRECTION) == ADC_SCAN_DIRECTION_UPWARD) || \
mbed_official 181:a4cbdfbbd2f4 475 ((DIRECTION) == ADC_SCAN_DIRECTION_BACKWARD))
mbed_official 181:a4cbdfbbd2f4 476 /**
mbed_official 181:a4cbdfbbd2f4 477 * @}
mbed_official 181:a4cbdfbbd2f4 478 */
mbed_official 181:a4cbdfbbd2f4 479
mbed_official 181:a4cbdfbbd2f4 480 /** @defgroup ADC_Oversampling_Ratio
mbed_official 181:a4cbdfbbd2f4 481 * @{
mbed_official 181:a4cbdfbbd2f4 482 */
mbed_official 181:a4cbdfbbd2f4 483
mbed_official 181:a4cbdfbbd2f4 484 #define ADC_OVERSAMPLING_RATIO_2 ((uint32_t)0x00000000) /*!< ADC Oversampling ratio 2x */
mbed_official 181:a4cbdfbbd2f4 485 #define ADC_OVERSAMPLING_RATIO_4 ((uint32_t)0x00000004) /*!< ADC Oversampling ratio 4x */
mbed_official 181:a4cbdfbbd2f4 486 #define ADC_OVERSAMPLING_RATIO_8 ((uint32_t)0x00000008) /*!< ADC Oversampling ratio 8x */
mbed_official 181:a4cbdfbbd2f4 487 #define ADC_OVERSAMPLING_RATIO_16 ((uint32_t)0x0000000C) /*!< ADC Oversampling ratio 16x */
mbed_official 181:a4cbdfbbd2f4 488 #define ADC_OVERSAMPLING_RATIO_32 ((uint32_t)0x00000010) /*!< ADC Oversampling ratio 32x */
mbed_official 181:a4cbdfbbd2f4 489 #define ADC_OVERSAMPLING_RATIO_64 ((uint32_t)0x00000014) /*!< ADC Oversampling ratio 64x */
mbed_official 181:a4cbdfbbd2f4 490 #define ADC_OVERSAMPLING_RATIO_128 ((uint32_t)0x00000018) /*!< ADC Oversampling ratio 128x */
mbed_official 181:a4cbdfbbd2f4 491 #define ADC_OVERSAMPLING_RATIO_256 ((uint32_t)0x0000001C) /*!< ADC Oversampling ratio 256x */
mbed_official 181:a4cbdfbbd2f4 492 #define IS_ADC_OVERSAMPLING_RATIO(RATIO) (((RATIO) == ADC_OVERSAMPLING_RATIO_2 ) || \
mbed_official 181:a4cbdfbbd2f4 493 ((RATIO) == ADC_OVERSAMPLING_RATIO_4 ) || \
mbed_official 181:a4cbdfbbd2f4 494 ((RATIO) == ADC_OVERSAMPLING_RATIO_8 ) || \
mbed_official 181:a4cbdfbbd2f4 495 ((RATIO) == ADC_OVERSAMPLING_RATIO_16 ) || \
mbed_official 181:a4cbdfbbd2f4 496 ((RATIO) == ADC_OVERSAMPLING_RATIO_32 ) || \
mbed_official 181:a4cbdfbbd2f4 497 ((RATIO) == ADC_OVERSAMPLING_RATIO_64 ) || \
mbed_official 181:a4cbdfbbd2f4 498 ((RATIO) == ADC_OVERSAMPLING_RATIO_128 ) || \
mbed_official 181:a4cbdfbbd2f4 499 ((RATIO) == ADC_OVERSAMPLING_RATIO_256 ))
mbed_official 181:a4cbdfbbd2f4 500 /**
mbed_official 181:a4cbdfbbd2f4 501 * @}
mbed_official 181:a4cbdfbbd2f4 502 */
mbed_official 181:a4cbdfbbd2f4 503
mbed_official 181:a4cbdfbbd2f4 504 /** @defgroup ADC_Right_Bit_Shift
mbed_official 181:a4cbdfbbd2f4 505 * @{
mbed_official 181:a4cbdfbbd2f4 506 */
mbed_official 181:a4cbdfbbd2f4 507 #define ADC_RIGHTBITSHIFT_NONE ((uint32_t)0x00000000) /*!< ADC No bit shift for oversampling */
mbed_official 181:a4cbdfbbd2f4 508 #define ADC_RIGHTBITSHIFT_1 ((uint32_t)0x00000020) /*!< ADC 1 bit shift for oversampling */
mbed_official 181:a4cbdfbbd2f4 509 #define ADC_RIGHTBITSHIFT_2 ((uint32_t)0x00000040) /*!< ADC 2 bits shift for oversampling */
mbed_official 181:a4cbdfbbd2f4 510 #define ADC_RIGHTBITSHIFT_3 ((uint32_t)0x00000060) /*!< ADC 3 bits shift for oversampling */
mbed_official 181:a4cbdfbbd2f4 511 #define ADC_RIGHTBITSHIFT_4 ((uint32_t)0x00000080) /*!< ADC 4 bits shift for oversampling */
mbed_official 181:a4cbdfbbd2f4 512 #define ADC_RIGHTBITSHIFT_5 ((uint32_t)0x000000A0) /*!< ADC 5 bits shift for oversampling */
mbed_official 181:a4cbdfbbd2f4 513 #define ADC_RIGHTBITSHIFT_6 ((uint32_t)0x000000C0) /*!< ADC 6 bits shift for oversampling */
mbed_official 181:a4cbdfbbd2f4 514 #define ADC_RIGHTBITSHIFT_7 ((uint32_t)0x000000E0) /*!< ADC 7 bits shift for oversampling */
mbed_official 181:a4cbdfbbd2f4 515 #define ADC_RIGHTBITSHIFT_8 ((uint32_t)0x00000100) /*!< ADC 8 bits shift for oversampling */
mbed_official 181:a4cbdfbbd2f4 516 #define IS_ADC_RIGHT_BIT_SHIFT(SHIFT) (((SHIFT) == ADC_RIGHTBITSHIFT_NONE) || \
mbed_official 181:a4cbdfbbd2f4 517 ((SHIFT) == ADC_RIGHTBITSHIFT_1 ) || \
mbed_official 181:a4cbdfbbd2f4 518 ((SHIFT) == ADC_RIGHTBITSHIFT_2 ) || \
mbed_official 181:a4cbdfbbd2f4 519 ((SHIFT) == ADC_RIGHTBITSHIFT_3 ) || \
mbed_official 181:a4cbdfbbd2f4 520 ((SHIFT) == ADC_RIGHTBITSHIFT_4 ) || \
mbed_official 181:a4cbdfbbd2f4 521 ((SHIFT) == ADC_RIGHTBITSHIFT_5 ) || \
mbed_official 181:a4cbdfbbd2f4 522 ((SHIFT) == ADC_RIGHTBITSHIFT_6 ) || \
mbed_official 181:a4cbdfbbd2f4 523 ((SHIFT) == ADC_RIGHTBITSHIFT_7 ) || \
mbed_official 181:a4cbdfbbd2f4 524 ((SHIFT) == ADC_RIGHTBITSHIFT_8 ))
mbed_official 181:a4cbdfbbd2f4 525 /**
mbed_official 181:a4cbdfbbd2f4 526 * @}
mbed_official 181:a4cbdfbbd2f4 527 */
mbed_official 181:a4cbdfbbd2f4 528
mbed_official 181:a4cbdfbbd2f4 529 /** @defgroup ADC_Triggered_Oversampling_Mode
mbed_official 181:a4cbdfbbd2f4 530 * @{
mbed_official 181:a4cbdfbbd2f4 531 */
mbed_official 181:a4cbdfbbd2f4 532 #define ADC_TRIGGEREDMODE_SINGLE_TRIGGER ((uint32_t)0x00000000) /*!< ADC No bit shift for oversampling */
mbed_official 181:a4cbdfbbd2f4 533 #define ADC_TRIGGEREDMODE_MULTI_TRIGGER ((uint32_t)0x00000200) /*!< ADC No bit shift for oversampling */
mbed_official 181:a4cbdfbbd2f4 534 #define IS_ADC_TRIGGERED_OVERSAMPLING_MODE(MODE) (((MODE) == ADC_TRIGGEREDMODE_SINGLE_TRIGGER) || \
mbed_official 181:a4cbdfbbd2f4 535 ((MODE) == ADC_TRIGGEREDMODE_MULTI_TRIGGER) )
mbed_official 181:a4cbdfbbd2f4 536 /**
mbed_official 181:a4cbdfbbd2f4 537 * @}
mbed_official 181:a4cbdfbbd2f4 538 */
mbed_official 181:a4cbdfbbd2f4 539
mbed_official 181:a4cbdfbbd2f4 540 /** @defgroup ADC_analog_watchdog_mode
mbed_official 181:a4cbdfbbd2f4 541 * @{
mbed_official 181:a4cbdfbbd2f4 542 */
mbed_official 181:a4cbdfbbd2f4 543 #define ADC_ANALOGWATCHDOG_NONE ((uint32_t) 0x00000000)
mbed_official 181:a4cbdfbbd2f4 544 #define ADC_ANALOGWATCHDOG_SINGLE_REG ((uint32_t)(ADC_CFGR1_AWDSGL | ADC_CFGR1_AWDEN))
mbed_official 181:a4cbdfbbd2f4 545 #define ADC_ANALOGWATCHDOG_ALL_REG ((uint32_t) ADC_CFGR1_AWDEN)
mbed_official 181:a4cbdfbbd2f4 546
mbed_official 181:a4cbdfbbd2f4 547
mbed_official 181:a4cbdfbbd2f4 548 #define IS_ADC_ANALOG_WATCHDOG_MODE(WATCHDOG) (((WATCHDOG) == ADC_ANALOGWATCHDOG_NONE ) || \
mbed_official 181:a4cbdfbbd2f4 549 ((WATCHDOG) == ADC_ANALOGWATCHDOG_SINGLE_REG) || \
mbed_official 181:a4cbdfbbd2f4 550 ((WATCHDOG) == ADC_ANALOGWATCHDOG_ALL_REG ))
mbed_official 181:a4cbdfbbd2f4 551 /**
mbed_official 181:a4cbdfbbd2f4 552 * @}
mbed_official 181:a4cbdfbbd2f4 553 */
mbed_official 181:a4cbdfbbd2f4 554
mbed_official 181:a4cbdfbbd2f4 555 /** @defgroup ADC_conversion_type
mbed_official 181:a4cbdfbbd2f4 556 * @{
mbed_official 181:a4cbdfbbd2f4 557 */
mbed_official 181:a4cbdfbbd2f4 558 #define REGULAR_GROUP ((uint32_t)(ADC_FLAG_EOC | ADC_FLAG_EOS))
mbed_official 181:a4cbdfbbd2f4 559 #define IS_ADC_CONVERSION_GROUP(CONVERSION) ((CONVERSION) == REGULAR_GROUP)
mbed_official 181:a4cbdfbbd2f4 560 /**
mbed_official 181:a4cbdfbbd2f4 561 * @}
mbed_official 181:a4cbdfbbd2f4 562 */
mbed_official 181:a4cbdfbbd2f4 563
mbed_official 181:a4cbdfbbd2f4 564 /** @defgroup ADC_Event_type
mbed_official 181:a4cbdfbbd2f4 565 * @{
mbed_official 181:a4cbdfbbd2f4 566 */
mbed_official 181:a4cbdfbbd2f4 567 #define AWD_EVENT ((uint32_t)ADC_FLAG_AWD)
mbed_official 181:a4cbdfbbd2f4 568 #define OVR_EVENT ((uint32_t)ADC_FLAG_OVR)
mbed_official 181:a4cbdfbbd2f4 569
mbed_official 181:a4cbdfbbd2f4 570 #define IS_ADC_EVENT_TYPE(EVENT) (((EVENT) == AWD_EVENT) || \
mbed_official 181:a4cbdfbbd2f4 571 ((EVENT) == OVR_EVENT))
mbed_official 181:a4cbdfbbd2f4 572 /**
mbed_official 181:a4cbdfbbd2f4 573 * @}
mbed_official 181:a4cbdfbbd2f4 574 */
mbed_official 181:a4cbdfbbd2f4 575
mbed_official 181:a4cbdfbbd2f4 576 /** @defgroup ADC_interrupts_definition
mbed_official 181:a4cbdfbbd2f4 577 * @{
mbed_official 181:a4cbdfbbd2f4 578 */
mbed_official 181:a4cbdfbbd2f4 579 #define ADC_IT_RDY ADC_IER_ADRDYIE /*!< ADC Ready (ADRDY) interrupt source */
mbed_official 181:a4cbdfbbd2f4 580 #define ADC_IT_EOSMP ADC_IER_EOSMPIE /*!< ADC End of Sampling interrupt source */
mbed_official 181:a4cbdfbbd2f4 581 #define ADC_IT_EOC ADC_IER_EOCIE /*!< ADC End of Regular Conversion interrupt source */
mbed_official 181:a4cbdfbbd2f4 582 #define ADC_IT_EOS ADC_IER_EOSEQIE /*!< ADC End of Regular sequence of Conversions interrupt source */
mbed_official 181:a4cbdfbbd2f4 583 #define ADC_IT_OVR ADC_IER_OVRIE /*!< ADC overrun interrupt source */
mbed_official 181:a4cbdfbbd2f4 584 #define ADC_IT_AWD ADC_IER_AWDIE /*!< ADC Analog watchdog 1 interrupt source */
mbed_official 181:a4cbdfbbd2f4 585 #define ADC_IT_EOCAL ADC_IER_EOCALIE /*!< ADC End of Calibration interrupt source */
mbed_official 181:a4cbdfbbd2f4 586
mbed_official 181:a4cbdfbbd2f4 587 /* Check of single flag */
mbed_official 181:a4cbdfbbd2f4 588 #define IS_ADC_IT(IT) (((IT) == ADC_IT_AWD) || ((IT) == ADC_IT_RDY) || \
mbed_official 181:a4cbdfbbd2f4 589 ((IT) == ADC_IT_EOSMP) || ((IT) == ADC_IT_EOC) || \
mbed_official 181:a4cbdfbbd2f4 590 ((IT) == ADC_IT_EOS) || ((IT) == ADC_IT_OVR))
mbed_official 181:a4cbdfbbd2f4 591 /**
mbed_official 181:a4cbdfbbd2f4 592 * @}
mbed_official 181:a4cbdfbbd2f4 593 */
mbed_official 181:a4cbdfbbd2f4 594
mbed_official 181:a4cbdfbbd2f4 595
mbed_official 181:a4cbdfbbd2f4 596
mbed_official 181:a4cbdfbbd2f4 597 /** @defgroup ADC_flags_definition
mbed_official 181:a4cbdfbbd2f4 598 * @{
mbed_official 181:a4cbdfbbd2f4 599 */
mbed_official 181:a4cbdfbbd2f4 600 #define ADC_FLAG_RDY ADC_ISR_ADRDY /*!< ADC Ready (ADRDY) flag */
mbed_official 181:a4cbdfbbd2f4 601 #define ADC_FLAG_EOSMP ADC_ISR_EOSMP /*!< ADC End of Sampling flag */
mbed_official 181:a4cbdfbbd2f4 602 #define ADC_FLAG_EOC ADC_ISR_EOC /*!< ADC End of Regular Conversion flag */
mbed_official 181:a4cbdfbbd2f4 603 #define ADC_FLAG_EOS ADC_ISR_EOSEQ /*!< ADC End of Regular sequence of Conversions flag */
mbed_official 181:a4cbdfbbd2f4 604 #define ADC_FLAG_OVR ADC_ISR_OVR /*!< ADC overrun flag */
mbed_official 181:a4cbdfbbd2f4 605 #define ADC_FLAG_AWD ADC_ISR_AWD /*!< ADC Analog watchdog flag */
mbed_official 181:a4cbdfbbd2f4 606 #define ADC_FLAG_EOCAL ADC_ISR_EOCAL /*!< ADC Enf Of Calibration flag */
mbed_official 181:a4cbdfbbd2f4 607
mbed_official 181:a4cbdfbbd2f4 608
mbed_official 181:a4cbdfbbd2f4 609 #define ADC_FLAG_ALL (ADC_FLAG_RDY | ADC_FLAG_EOSMP | ADC_FLAG_EOC | ADC_FLAG_EOS | \
mbed_official 181:a4cbdfbbd2f4 610 ADC_FLAG_OVR | ADC_FLAG_AWD | ADC_FLAG_EOCAL)
mbed_official 181:a4cbdfbbd2f4 611
mbed_official 181:a4cbdfbbd2f4 612 /* Check of single flag */
mbed_official 181:a4cbdfbbd2f4 613 #define IS_ADC_FLAG(FLAG) (((FLAG) == ADC_FLAG_RDY) || ((FLAG) == ADC_FLAG_EOSMP) || \
mbed_official 181:a4cbdfbbd2f4 614 ((FLAG) == ADC_FLAG_EOC) || ((FLAG) == ADC_FLAG_EOS) || \
mbed_official 181:a4cbdfbbd2f4 615 ((FLAG) == ADC_FLAG_OVR) || ((FLAG) == ADC_FLAG_AWD) || \
mbed_official 181:a4cbdfbbd2f4 616 ((FLAG) == ADC_FLAG_EOCAL))
mbed_official 181:a4cbdfbbd2f4 617 /**
mbed_official 181:a4cbdfbbd2f4 618 * @}
mbed_official 181:a4cbdfbbd2f4 619 */
mbed_official 181:a4cbdfbbd2f4 620
mbed_official 181:a4cbdfbbd2f4 621
mbed_official 181:a4cbdfbbd2f4 622 /** @defgroup ADC_range_verification
mbed_official 181:a4cbdfbbd2f4 623 * in function of ADC resolution selected (12, 10, 8 or 6 bits)
mbed_official 181:a4cbdfbbd2f4 624 * @{
mbed_official 181:a4cbdfbbd2f4 625 */
mbed_official 181:a4cbdfbbd2f4 626 #define IS_ADC_RANGE(RESOLUTION, ADC_VALUE) \
mbed_official 181:a4cbdfbbd2f4 627 ((((RESOLUTION) == ADC_RESOLUTION12b) && ((ADC_VALUE) <= ((uint32_t)0x0FFF))) || \
mbed_official 181:a4cbdfbbd2f4 628 (((RESOLUTION) == ADC_RESOLUTION10b) && ((ADC_VALUE) <= ((uint32_t)0x03FF))) || \
mbed_official 181:a4cbdfbbd2f4 629 (((RESOLUTION) == ADC_RESOLUTION8b) && ((ADC_VALUE) <= ((uint32_t)0x00FF))) || \
mbed_official 181:a4cbdfbbd2f4 630 (((RESOLUTION) == ADC_RESOLUTION6b) && ((ADC_VALUE) <= ((uint32_t)0x003F))))
mbed_official 181:a4cbdfbbd2f4 631 /**
mbed_official 181:a4cbdfbbd2f4 632 * @}
mbed_official 181:a4cbdfbbd2f4 633 */
mbed_official 181:a4cbdfbbd2f4 634
mbed_official 181:a4cbdfbbd2f4 635 /** @defgroup ADC_regular_nb_conv_verification
mbed_official 181:a4cbdfbbd2f4 636 * @{
mbed_official 181:a4cbdfbbd2f4 637 */
mbed_official 181:a4cbdfbbd2f4 638 #define IS_ADC_REGULAR_NB_CONV(LENGTH) (((LENGTH) >= ((uint32_t)1)) && ((LENGTH) <= ((uint32_t)16)))
mbed_official 181:a4cbdfbbd2f4 639 /**
mbed_official 181:a4cbdfbbd2f4 640 * @}
mbed_official 181:a4cbdfbbd2f4 641 */
mbed_official 181:a4cbdfbbd2f4 642
mbed_official 181:a4cbdfbbd2f4 643 /**
mbed_official 181:a4cbdfbbd2f4 644 * @}
mbed_official 181:a4cbdfbbd2f4 645 */
mbed_official 181:a4cbdfbbd2f4 646 /* Exported macro ------------------------------------------------------------*/
mbed_official 181:a4cbdfbbd2f4 647
mbed_official 181:a4cbdfbbd2f4 648 /** @defgroup ADC_Exported_Macro
mbed_official 181:a4cbdfbbd2f4 649 * @{
mbed_official 181:a4cbdfbbd2f4 650 */
mbed_official 181:a4cbdfbbd2f4 651 /** @brief Reset ADC handle state
mbed_official 181:a4cbdfbbd2f4 652 * @param __HANDLE__: ADC handle
mbed_official 181:a4cbdfbbd2f4 653 * @retval None
mbed_official 181:a4cbdfbbd2f4 654 */
mbed_official 181:a4cbdfbbd2f4 655 #define __HAL_ADC_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_ADC_STATE_RESET)
mbed_official 181:a4cbdfbbd2f4 656
mbed_official 181:a4cbdfbbd2f4 657 /**
mbed_official 181:a4cbdfbbd2f4 658 * @brief Enable the ADC peripheral
mbed_official 181:a4cbdfbbd2f4 659 * @param __HANDLE__: ADC handle
mbed_official 181:a4cbdfbbd2f4 660 * @retval None
mbed_official 181:a4cbdfbbd2f4 661 */
mbed_official 181:a4cbdfbbd2f4 662 #define __HAL_ADC_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR |= ADC_CR_ADEN)
mbed_official 181:a4cbdfbbd2f4 663
mbed_official 181:a4cbdfbbd2f4 664 /**
mbed_official 181:a4cbdfbbd2f4 665 * @brief Verification of hardware constraints before ADC can be enabled
mbed_official 181:a4cbdfbbd2f4 666 * @param __HANDLE__: ADC handle
mbed_official 181:a4cbdfbbd2f4 667 * @retval SET (ADC can be enabled) or RESET (ADC cannot be enabled)
mbed_official 181:a4cbdfbbd2f4 668 */
mbed_official 181:a4cbdfbbd2f4 669 #define __HAL_ADC_ENABLING_CONDITIONS(__HANDLE__) \
mbed_official 181:a4cbdfbbd2f4 670 (( ( ((__HANDLE__)->Instance->CR) & \
mbed_official 181:a4cbdfbbd2f4 671 (ADC_CR_ADCAL | ADC_CR_ADSTP | ADC_CR_ADSTART | \
mbed_official 181:a4cbdfbbd2f4 672 ADC_CR_ADDIS | ADC_CR_ADEN ) \
mbed_official 181:a4cbdfbbd2f4 673 ) == RESET \
mbed_official 181:a4cbdfbbd2f4 674 ) ? SET : RESET)
mbed_official 181:a4cbdfbbd2f4 675
mbed_official 181:a4cbdfbbd2f4 676 /**
mbed_official 181:a4cbdfbbd2f4 677 * @brief Disable the ADC peripheral
mbed_official 181:a4cbdfbbd2f4 678 * @param __HANDLE__: ADC handle
mbed_official 181:a4cbdfbbd2f4 679 * @retval None
mbed_official 181:a4cbdfbbd2f4 680 */
mbed_official 181:a4cbdfbbd2f4 681 #define __HAL_ADC_DISABLE(__HANDLE__) \
mbed_official 181:a4cbdfbbd2f4 682 do{ \
mbed_official 181:a4cbdfbbd2f4 683 (__HANDLE__)->Instance->CR |= ADC_CR_ADDIS; \
mbed_official 181:a4cbdfbbd2f4 684 __HAL_ADC_CLEAR_FLAG((__HANDLE__), (ADC_FLAG_EOSMP | ADC_FLAG_RDY)); \
mbed_official 181:a4cbdfbbd2f4 685 } while(0)
mbed_official 181:a4cbdfbbd2f4 686
mbed_official 181:a4cbdfbbd2f4 687 /**
mbed_official 181:a4cbdfbbd2f4 688 * @brief Verification of hardware constraints before ADC can be disabled
mbed_official 181:a4cbdfbbd2f4 689 * @param __HANDLE__: ADC handle
mbed_official 181:a4cbdfbbd2f4 690 * @retval SET (ADC can be disabled) or RESET (ADC cannot be disabled)
mbed_official 181:a4cbdfbbd2f4 691 */
mbed_official 181:a4cbdfbbd2f4 692 #define __HAL_ADC_DISABLING_CONDITIONS(__HANDLE__) \
mbed_official 181:a4cbdfbbd2f4 693 (( ( ((__HANDLE__)->Instance->CR) & \
mbed_official 181:a4cbdfbbd2f4 694 (ADC_CR_ADSTART | ADC_CR_ADEN)) == ADC_CR_ADEN \
mbed_official 181:a4cbdfbbd2f4 695 ) ? SET : RESET)
mbed_official 181:a4cbdfbbd2f4 696
mbed_official 181:a4cbdfbbd2f4 697 /**
mbed_official 181:a4cbdfbbd2f4 698 * @brief Verification of ADC state: enabled or disabled
mbed_official 181:a4cbdfbbd2f4 699 * @param __HANDLE__: ADC handle
mbed_official 181:a4cbdfbbd2f4 700 * @retval SET (ADC enabled) or RESET (ADC disabled)
mbed_official 181:a4cbdfbbd2f4 701 */
mbed_official 181:a4cbdfbbd2f4 702 #define __HAL_ADC_IS_ENABLED(__HANDLE__) \
mbed_official 181:a4cbdfbbd2f4 703 (( ((((__HANDLE__)->Instance->CR) & (ADC_CR_ADEN | ADC_CR_ADDIS)) == ADC_CR_ADEN) && \
mbed_official 181:a4cbdfbbd2f4 704 ((((__HANDLE__)->Instance->ISR) & ADC_FLAG_RDY) == ADC_FLAG_RDY) \
mbed_official 181:a4cbdfbbd2f4 705 ) ? SET : RESET)
mbed_official 181:a4cbdfbbd2f4 706
mbed_official 181:a4cbdfbbd2f4 707 /**
mbed_official 181:a4cbdfbbd2f4 708 * @brief Returns resolution bits in CFGR register: RES[1:0]. Return value among parameter to @ref ADC_Resolution.
mbed_official 181:a4cbdfbbd2f4 709 * @param __HANDLE__: ADC handle
mbed_official 181:a4cbdfbbd2f4 710 * @retval None
mbed_official 181:a4cbdfbbd2f4 711 */
mbed_official 181:a4cbdfbbd2f4 712 #define __HAL_ADC_GET_RESOLUTION(__HANDLE__) (((__HANDLE__)->Instance->CFGR1) & ADC_CFGR1_RES)
mbed_official 181:a4cbdfbbd2f4 713
mbed_official 181:a4cbdfbbd2f4 714 /**
mbed_official 181:a4cbdfbbd2f4 715 * @brief Check if no conversion is ongoing on regular groups
mbed_official 181:a4cbdfbbd2f4 716 * @param __HANDLE__: ADC handle
mbed_official 181:a4cbdfbbd2f4 717 * @retval SET (conversion is on going) or RESET (no conversion is on going)
mbed_official 181:a4cbdfbbd2f4 718 */
mbed_official 181:a4cbdfbbd2f4 719 #define __HAL_ADC_IS_CONVERSION_ONGOING(__HANDLE__) \
mbed_official 181:a4cbdfbbd2f4 720 (( (((__HANDLE__)->Instance->CR) & (ADC_CR_ADSTART)) == RESET ) ? RESET : SET)
mbed_official 181:a4cbdfbbd2f4 721
mbed_official 181:a4cbdfbbd2f4 722 /**
mbed_official 181:a4cbdfbbd2f4 723 * @brief Enable ADC continuous conversion mode.
mbed_official 181:a4cbdfbbd2f4 724 * @param _CONTINUOUS_MODE_: Continuous mode.
mbed_official 181:a4cbdfbbd2f4 725 * @retval None
mbed_official 181:a4cbdfbbd2f4 726 */
mbed_official 181:a4cbdfbbd2f4 727 #define __HAL_ADC_CFGR1_CONTINUOUS(_CONTINUOUS_MODE_) ((_CONTINUOUS_MODE_) << 13)
mbed_official 181:a4cbdfbbd2f4 728
mbed_official 181:a4cbdfbbd2f4 729 /**
mbed_official 181:a4cbdfbbd2f4 730 * @brief Configures the number of discontinuous conversions for the regular group channels.
mbed_official 181:a4cbdfbbd2f4 731 * @param _NBR_DISCONTINUOUS_CONV_: Number of discontinuous conversions.
mbed_official 181:a4cbdfbbd2f4 732 * @retval None
mbed_official 181:a4cbdfbbd2f4 733 */
mbed_official 181:a4cbdfbbd2f4 734 #define __HAL_ADC_CFGR1_DISCONTINUOUS_NUM(_NBR_DISCONTINUOUS_CONV_) (((_NBR_DISCONTINUOUS_CONV_) - 1) << 17)
mbed_official 181:a4cbdfbbd2f4 735
mbed_official 181:a4cbdfbbd2f4 736 /**
mbed_official 181:a4cbdfbbd2f4 737 * @brief Enable the ADC DMA continuous request.
mbed_official 181:a4cbdfbbd2f4 738 * @param _DMAContReq_MODE_: DMA continuous request mode.
mbed_official 181:a4cbdfbbd2f4 739 * @retval None
mbed_official 181:a4cbdfbbd2f4 740 */
mbed_official 181:a4cbdfbbd2f4 741 #define __HAL_ADC_CFGR1_DMAContReq(_DMAContReq_MODE_) ((_DMAContReq_MODE_) << 1)
mbed_official 181:a4cbdfbbd2f4 742
mbed_official 181:a4cbdfbbd2f4 743 /**
mbed_official 181:a4cbdfbbd2f4 744 * @brief Enable the ADC Auto Delay.
mbed_official 181:a4cbdfbbd2f4 745 * @param _AutoDelay_: Auto delay bit enable or disable.
mbed_official 181:a4cbdfbbd2f4 746 * @retval None
mbed_official 181:a4cbdfbbd2f4 747 */
mbed_official 181:a4cbdfbbd2f4 748 #define __HAL_ADC_CFGR1_AutoDelay(_AutoDelay_) ((_AutoDelay_) << 14)
mbed_official 181:a4cbdfbbd2f4 749
mbed_official 181:a4cbdfbbd2f4 750 /**
mbed_official 181:a4cbdfbbd2f4 751 * @brief Enable the ADC LowPowerAutoOff.
mbed_official 181:a4cbdfbbd2f4 752 * @param _AUTOFF_: AutoOff bit enable or disable.
mbed_official 181:a4cbdfbbd2f4 753 * @retval None
mbed_official 181:a4cbdfbbd2f4 754 */
mbed_official 181:a4cbdfbbd2f4 755 #define __HAL_ADC_CFGR1_AUTOFF(_AUTOFF_) ((_AUTOFF_) << 15)
mbed_official 181:a4cbdfbbd2f4 756
mbed_official 181:a4cbdfbbd2f4 757 /**
mbed_official 181:a4cbdfbbd2f4 758 * @brief Configure the analog watchdog high threshold into registers TR1, TR2 or TR3.
mbed_official 181:a4cbdfbbd2f4 759 * @param _Threshold_: Threshold value
mbed_official 181:a4cbdfbbd2f4 760 * @retval None
mbed_official 181:a4cbdfbbd2f4 761 */
mbed_official 181:a4cbdfbbd2f4 762 #define __HAL_ADC_TRx_HighThreshold(_Threshold_) ((_Threshold_) << 16)
mbed_official 181:a4cbdfbbd2f4 763
mbed_official 181:a4cbdfbbd2f4 764 /**
mbed_official 181:a4cbdfbbd2f4 765 * @brief Enable the ADC Low Frequency mode.
mbed_official 181:a4cbdfbbd2f4 766 * @param _LOW_FREQUENCY_MODE_: Low Frequency mode.
mbed_official 181:a4cbdfbbd2f4 767 * @retval None
mbed_official 181:a4cbdfbbd2f4 768 */
mbed_official 181:a4cbdfbbd2f4 769 #define __HAL_ADC_CCR_LOWFREQUENCY(_LOW_FREQUENCY_MODE_) ((_LOW_FREQUENCY_MODE_) << 25)
mbed_official 181:a4cbdfbbd2f4 770
mbed_official 181:a4cbdfbbd2f4 771 /**
mbed_official 181:a4cbdfbbd2f4 772 * @brief Shift the offset in function of the selected ADC resolution.
mbed_official 181:a4cbdfbbd2f4 773 * Offset has to be left-aligned on bit 11, the LSB (right bits) are set to 0
mbed_official 181:a4cbdfbbd2f4 774 * If resolution 12 bits, no shift.
mbed_official 181:a4cbdfbbd2f4 775 * If resolution 10 bits, shift of 2 ranks on the right.
mbed_official 181:a4cbdfbbd2f4 776 * If resolution 8 bits, shift of 4 ranks on the right.
mbed_official 181:a4cbdfbbd2f4 777 * If resolution 6 bits, shift of 6 ranks on the right.
mbed_official 181:a4cbdfbbd2f4 778 * therefore, shift = (12 - resolution) = 12 - (12- (((RES[1:0]) >> 3)*2))
mbed_official 181:a4cbdfbbd2f4 779 * @param __HANDLE__: ADC handle.
mbed_official 181:a4cbdfbbd2f4 780 * @param _Offset_: Value to be shifted
mbed_official 181:a4cbdfbbd2f4 781 * @retval None
mbed_official 181:a4cbdfbbd2f4 782 */
mbed_official 181:a4cbdfbbd2f4 783 #define __HAL_ADC_Offset_shift_resolution(__HANDLE__, _Offset_) \
mbed_official 181:a4cbdfbbd2f4 784 ((_Offset_) << ((((__HANDLE__)->Instance->CFGR & ADC_CFGR1_RES) >> 3)*2))
mbed_official 181:a4cbdfbbd2f4 785
mbed_official 181:a4cbdfbbd2f4 786 /**
mbed_official 181:a4cbdfbbd2f4 787 * @brief Shift the AWD1 threshold in function of the selected ADC resolution.
mbed_official 181:a4cbdfbbd2f4 788 * Thresholds have to be left-aligned on bit 11, the LSB (right bits) are set to 0
mbed_official 181:a4cbdfbbd2f4 789 * If resolution 12 bits, no shift.
mbed_official 181:a4cbdfbbd2f4 790 * If resolution 10 bits, shift of 2 ranks on the right.
mbed_official 181:a4cbdfbbd2f4 791 * If resolution 8 bits, shift of 4 ranks on the right.
mbed_official 181:a4cbdfbbd2f4 792 * If resolution 6 bits, shift of 6 ranks on the right.
mbed_official 181:a4cbdfbbd2f4 793 * therefore, shift = (12 - resolution) = 12 - (12- (((RES[1:0]) >> 3)*2))
mbed_official 181:a4cbdfbbd2f4 794 * @param __HANDLE__: ADC handle.
mbed_official 181:a4cbdfbbd2f4 795 * @param _Threshold_: Value to be shifted
mbed_official 181:a4cbdfbbd2f4 796 * @retval None
mbed_official 181:a4cbdfbbd2f4 797 */
mbed_official 181:a4cbdfbbd2f4 798 #define __HAL_ADC_AWD1Threshold_shift_resolution(__HANDLE__, _Threshold_) \
mbed_official 181:a4cbdfbbd2f4 799 ((_Threshold_) << ((((__HANDLE__)->Instance->CFGR1 & ADC_CFGR1_RES) >> 3)*2))
mbed_official 181:a4cbdfbbd2f4 800
mbed_official 181:a4cbdfbbd2f4 801 /**
mbed_official 181:a4cbdfbbd2f4 802 * @brief Shift the value on the left, less significant are set to 0.
mbed_official 181:a4cbdfbbd2f4 803 * @param _Value_: Value to be shifted
mbed_official 181:a4cbdfbbd2f4 804 * @param _Shift_: Number of shift to be done
mbed_official 181:a4cbdfbbd2f4 805 * @retval None
mbed_official 181:a4cbdfbbd2f4 806 */
mbed_official 181:a4cbdfbbd2f4 807 #define __HAL_ADC_Value_Shift_left(_Value_, _Shift_) ((_Value_) << (_Shift_))
mbed_official 181:a4cbdfbbd2f4 808
mbed_official 181:a4cbdfbbd2f4 809
mbed_official 181:a4cbdfbbd2f4 810 /**
mbed_official 181:a4cbdfbbd2f4 811 * @brief Enable the ADC end of conversion interrupt.
mbed_official 181:a4cbdfbbd2f4 812 * @param __HANDLE__: ADC handle.
mbed_official 181:a4cbdfbbd2f4 813 * @param __INTERRUPT__: ADC Interrupt.
mbed_official 181:a4cbdfbbd2f4 814 * @retval None
mbed_official 181:a4cbdfbbd2f4 815 */
mbed_official 181:a4cbdfbbd2f4 816 #define __HAL_ADC_ENABLE_IT(__HANDLE__, __INTERRUPT__) (((__HANDLE__)->Instance->IER) |= (__INTERRUPT__))
mbed_official 181:a4cbdfbbd2f4 817
mbed_official 181:a4cbdfbbd2f4 818 /**
mbed_official 181:a4cbdfbbd2f4 819 * @brief Disable the ADC end of conversion interrupt.
mbed_official 181:a4cbdfbbd2f4 820 * @param __HANDLE__: ADC handle.
mbed_official 181:a4cbdfbbd2f4 821 * @param __INTERRUPT__: ADC interrupt.
mbed_official 181:a4cbdfbbd2f4 822 * @retval None
mbed_official 181:a4cbdfbbd2f4 823 */
mbed_official 181:a4cbdfbbd2f4 824 #define __HAL_ADC_DISABLE_IT(__HANDLE__, __INTERRUPT__) (((__HANDLE__)->Instance->IER) &= ~(__INTERRUPT__))
mbed_official 181:a4cbdfbbd2f4 825
mbed_official 181:a4cbdfbbd2f4 826 /** @brief Checks if the specified ADC interrupt source is enabled or disabled.
mbed_official 181:a4cbdfbbd2f4 827 * @param __HANDLE__: specifies the ADC Handle.
mbed_official 181:a4cbdfbbd2f4 828 * @param __INTERRUPT__: specifies the ADC interrupt source to check.
mbed_official 181:a4cbdfbbd2f4 829 * @retval The new state of __IT__ (TRUE or FALSE).
mbed_official 181:a4cbdfbbd2f4 830 */
mbed_official 181:a4cbdfbbd2f4 831 #define __HAL_ADC_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) ((((__HANDLE__)->Instance->IER & (__INTERRUPT__)) == (__INTERRUPT__)) ? SET : RESET)
mbed_official 181:a4cbdfbbd2f4 832
mbed_official 181:a4cbdfbbd2f4 833 /**
mbed_official 181:a4cbdfbbd2f4 834 * @brief Clear the ADC's pending flags
mbed_official 181:a4cbdfbbd2f4 835 * @param __HANDLE__: ADC handle.
mbed_official 181:a4cbdfbbd2f4 836 * @param __FLAG__: ADC flag.
mbed_official 181:a4cbdfbbd2f4 837 * @retval None
mbed_official 181:a4cbdfbbd2f4 838 */
mbed_official 181:a4cbdfbbd2f4 839 /* Note: bit cleared bit by writing 1 */
mbed_official 181:a4cbdfbbd2f4 840 #define __HAL_ADC_CLEAR_FLAG(__HANDLE__, __FLAG__) (((__HANDLE__)->Instance->ISR) &= (__FLAG__))
mbed_official 181:a4cbdfbbd2f4 841
mbed_official 181:a4cbdfbbd2f4 842 /**
mbed_official 181:a4cbdfbbd2f4 843 * @brief Get the selected ADC's flag status.
mbed_official 181:a4cbdfbbd2f4 844 * @param __HANDLE__: ADC handle.
mbed_official 181:a4cbdfbbd2f4 845 * @param __FLAG__: ADC flag.
mbed_official 181:a4cbdfbbd2f4 846 * @retval None
mbed_official 181:a4cbdfbbd2f4 847 */
mbed_official 181:a4cbdfbbd2f4 848 #define __HAL_ADC_GET_FLAG(__HANDLE__, __FLAG__) ((((__HANDLE__)->Instance->ISR) & (__FLAG__)) == (__FLAG__))
mbed_official 181:a4cbdfbbd2f4 849
mbed_official 181:a4cbdfbbd2f4 850
mbed_official 181:a4cbdfbbd2f4 851
mbed_official 181:a4cbdfbbd2f4 852 /**
mbed_official 181:a4cbdfbbd2f4 853 * @brief Configuration of ADC clock & prescaler: clock source PCLK or Asynchronous with selectable prescaler
mbed_official 181:a4cbdfbbd2f4 854 * @param __HANDLE__: ADC handle
mbed_official 181:a4cbdfbbd2f4 855 * @retval None
mbed_official 181:a4cbdfbbd2f4 856 */
mbed_official 181:a4cbdfbbd2f4 857
mbed_official 181:a4cbdfbbd2f4 858 #define __HAL_ADC_CLOCK_PRESCALER(__HANDLE__) \
mbed_official 181:a4cbdfbbd2f4 859 do{ \
mbed_official 181:a4cbdfbbd2f4 860 if ((((__HANDLE__)->Init.ClockPrescaler) == ADC_CLOCKPRESCALER_PCLK_DIV1) || \
mbed_official 181:a4cbdfbbd2f4 861 (((__HANDLE__)->Init.ClockPrescaler) == ADC_CLOCKPRESCALER_PCLK_DIV2) || \
mbed_official 181:a4cbdfbbd2f4 862 (((__HANDLE__)->Init.ClockPrescaler) == ADC_CLOCKPRESCALER_PCLK_DIV2)) \
mbed_official 181:a4cbdfbbd2f4 863 { \
mbed_official 181:a4cbdfbbd2f4 864 (__HANDLE__)->Instance->CFGR2 &= ~(ADC_CFGR2_CKMODE); \
mbed_official 181:a4cbdfbbd2f4 865 (__HANDLE__)->Instance->CFGR2 |= (__HANDLE__)->Init.ClockPrescaler; \
mbed_official 181:a4cbdfbbd2f4 866 } \
mbed_official 181:a4cbdfbbd2f4 867 else \
mbed_official 181:a4cbdfbbd2f4 868 { \
mbed_official 181:a4cbdfbbd2f4 869 /* CKMOD bits must be reset */ \
mbed_official 181:a4cbdfbbd2f4 870 (__HANDLE__)->Instance->CFGR2 &= ~(ADC_CFGR2_CKMODE); \
mbed_official 181:a4cbdfbbd2f4 871 ADC->CCR &= ~(ADC_CCR_PRESC); \
mbed_official 181:a4cbdfbbd2f4 872 ADC->CCR |= (__HANDLE__)->Init.ClockPrescaler; \
mbed_official 181:a4cbdfbbd2f4 873 } \
mbed_official 181:a4cbdfbbd2f4 874 } while(0)
mbed_official 181:a4cbdfbbd2f4 875
mbed_official 181:a4cbdfbbd2f4 876 /**
mbed_official 181:a4cbdfbbd2f4 877 * @}
mbed_official 181:a4cbdfbbd2f4 878 */
mbed_official 181:a4cbdfbbd2f4 879
mbed_official 181:a4cbdfbbd2f4 880 /* Include ADC HAL Extension module */
mbed_official 181:a4cbdfbbd2f4 881 #include "stm32l0xx_hal_adc_ex.h"
mbed_official 181:a4cbdfbbd2f4 882
mbed_official 181:a4cbdfbbd2f4 883 /* Exported functions --------------------------------------------------------*/
mbed_official 181:a4cbdfbbd2f4 884 /* Initialization and de-initialization functions **********************************/
mbed_official 181:a4cbdfbbd2f4 885 HAL_StatusTypeDef HAL_ADC_Init(ADC_HandleTypeDef* hadc);
mbed_official 181:a4cbdfbbd2f4 886 HAL_StatusTypeDef HAL_ADC_DeInit(ADC_HandleTypeDef *hadc);
mbed_official 181:a4cbdfbbd2f4 887 void HAL_ADC_MspInit(ADC_HandleTypeDef* hadc);
mbed_official 181:a4cbdfbbd2f4 888 void HAL_ADC_MspDeInit(ADC_HandleTypeDef* hadc);
mbed_official 181:a4cbdfbbd2f4 889
mbed_official 181:a4cbdfbbd2f4 890 /* IO operation functions *****************************************************/
mbed_official 181:a4cbdfbbd2f4 891 /* Blocking mode: Polling */
mbed_official 181:a4cbdfbbd2f4 892 HAL_StatusTypeDef HAL_ADC_Start(ADC_HandleTypeDef* hadc);
mbed_official 181:a4cbdfbbd2f4 893 HAL_StatusTypeDef HAL_ADC_Stop(ADC_HandleTypeDef* hadc);
mbed_official 181:a4cbdfbbd2f4 894 HAL_StatusTypeDef HAL_ADC_PollForConversion(ADC_HandleTypeDef* hadc, uint32_t Timeout);
mbed_official 181:a4cbdfbbd2f4 895 HAL_StatusTypeDef HAL_ADC_PollForEvent(ADC_HandleTypeDef* hadc, uint32_t EventType, uint32_t Timeout);
mbed_official 181:a4cbdfbbd2f4 896
mbed_official 181:a4cbdfbbd2f4 897 /* Non-blocking mode: Interruption */
mbed_official 181:a4cbdfbbd2f4 898 HAL_StatusTypeDef HAL_ADC_Start_IT(ADC_HandleTypeDef* hadc);
mbed_official 181:a4cbdfbbd2f4 899 HAL_StatusTypeDef HAL_ADC_Stop_IT(ADC_HandleTypeDef* hadc);
mbed_official 181:a4cbdfbbd2f4 900
mbed_official 181:a4cbdfbbd2f4 901 /* Non-blocking mode: DMA */
mbed_official 181:a4cbdfbbd2f4 902 HAL_StatusTypeDef HAL_ADC_Start_DMA(ADC_HandleTypeDef* hadc, uint32_t* pData, uint32_t Length);
mbed_official 181:a4cbdfbbd2f4 903 HAL_StatusTypeDef HAL_ADC_Stop_DMA(ADC_HandleTypeDef* hadc);
mbed_official 181:a4cbdfbbd2f4 904
mbed_official 181:a4cbdfbbd2f4 905 /* ADC retrieve conversion value intended to be used with polling or interruption */
mbed_official 181:a4cbdfbbd2f4 906 uint32_t HAL_ADC_GetValue(ADC_HandleTypeDef* hadc);
mbed_official 181:a4cbdfbbd2f4 907
mbed_official 181:a4cbdfbbd2f4 908 /* ADC IRQHandler and Callbacks used in non-blocking modes (Interruption and DMA) */
mbed_official 181:a4cbdfbbd2f4 909 void HAL_ADC_IRQHandler(ADC_HandleTypeDef* hadc);
mbed_official 181:a4cbdfbbd2f4 910 void HAL_ADC_ConvCpltCallback(ADC_HandleTypeDef* hadc);
mbed_official 181:a4cbdfbbd2f4 911 void HAL_ADC_ConvHalfCpltCallback(ADC_HandleTypeDef* hadc);
mbed_official 181:a4cbdfbbd2f4 912 void HAL_ADC_LevelOutOfWindowCallback(ADC_HandleTypeDef* hadc);
mbed_official 181:a4cbdfbbd2f4 913 void HAL_ADC_ErrorCallback(ADC_HandleTypeDef *hadc);
mbed_official 181:a4cbdfbbd2f4 914
mbed_official 181:a4cbdfbbd2f4 915 /* Peripheral Control functions ***********************************************/
mbed_official 181:a4cbdfbbd2f4 916 HAL_StatusTypeDef HAL_ADC_ConfigChannel(ADC_HandleTypeDef* hadc, ADC_ChannelConfTypeDef* sConfig);
mbed_official 181:a4cbdfbbd2f4 917 HAL_StatusTypeDef HAL_ADC_AnalogWDGConfig(ADC_HandleTypeDef* hadc, ADC_AnalogWDGConfTypeDef* AnalogWDGConfig);
mbed_official 181:a4cbdfbbd2f4 918
mbed_official 181:a4cbdfbbd2f4 919 /* Peripheral State functions *************************************************/
mbed_official 181:a4cbdfbbd2f4 920 HAL_ADC_StateTypeDef HAL_ADC_GetState(ADC_HandleTypeDef* hadc);
mbed_official 181:a4cbdfbbd2f4 921 uint32_t HAL_ADC_GetError(ADC_HandleTypeDef *hadc);
mbed_official 181:a4cbdfbbd2f4 922
mbed_official 181:a4cbdfbbd2f4 923
mbed_official 181:a4cbdfbbd2f4 924 /**
mbed_official 181:a4cbdfbbd2f4 925 * @}
mbed_official 181:a4cbdfbbd2f4 926 */
mbed_official 181:a4cbdfbbd2f4 927
mbed_official 181:a4cbdfbbd2f4 928 /**
mbed_official 181:a4cbdfbbd2f4 929 * @}
mbed_official 181:a4cbdfbbd2f4 930 */
mbed_official 181:a4cbdfbbd2f4 931
mbed_official 181:a4cbdfbbd2f4 932 #ifdef __cplusplus
mbed_official 181:a4cbdfbbd2f4 933 }
mbed_official 181:a4cbdfbbd2f4 934 #endif
mbed_official 181:a4cbdfbbd2f4 935
mbed_official 181:a4cbdfbbd2f4 936 #endif /*__STM32L0xx_ADC_H */
mbed_official 181:a4cbdfbbd2f4 937
mbed_official 181:a4cbdfbbd2f4 938
mbed_official 181:a4cbdfbbd2f4 939 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/