mbed library sources

Dependents:   frdm_kl05z_gpio_test

Fork of mbed-src by mbed official

Committer:
mbed_official
Date:
Tue Jul 08 11:15:08 2014 +0100
Revision:
250:a49055e7a707
Parent:
158:3121b9889f7b
Child:
251:de9a1e4ffd79
Synchronized with git revision 3197042b65f8d28e856e1a7812d45e2fbe80e3f1

Full URL: https://github.com/mbedmicro/mbed/commit/3197042b65f8d28e856e1a7812d45e2fbe80e3f1/

error.h -> mbed_error.h

Who changed what in which revision?

UserRevisionLine numberNew contents of line
mbed_official 82:0b31dbcd4769 1 /* mbed Microcontroller Library
mbed_official 82:0b31dbcd4769 2 * Copyright (c) 2006-2013 ARM Limited
mbed_official 82:0b31dbcd4769 3 *
mbed_official 82:0b31dbcd4769 4 * Licensed under the Apache License, Version 2.0 (the "License");
mbed_official 82:0b31dbcd4769 5 * you may not use this file except in compliance with the License.
mbed_official 82:0b31dbcd4769 6 * You may obtain a copy of the License at
mbed_official 82:0b31dbcd4769 7 *
mbed_official 82:0b31dbcd4769 8 * http://www.apache.org/licenses/LICENSE-2.0
mbed_official 82:0b31dbcd4769 9 *
mbed_official 82:0b31dbcd4769 10 * Unless required by applicable law or agreed to in writing, software
mbed_official 82:0b31dbcd4769 11 * distributed under the License is distributed on an "AS IS" BASIS,
mbed_official 82:0b31dbcd4769 12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
mbed_official 82:0b31dbcd4769 13 * See the License for the specific language governing permissions and
mbed_official 82:0b31dbcd4769 14 * limitations under the License.
mbed_official 82:0b31dbcd4769 15 */
mbed_official 82:0b31dbcd4769 16 #include <stddef.h>
mbed_official 82:0b31dbcd4769 17 #include "cmsis.h"
mbed_official 82:0b31dbcd4769 18
mbed_official 82:0b31dbcd4769 19 #include "gpio_irq_api.h"
mbed_official 113:65a335a675de 20 #include "gpio_api.h"
mbed_official 250:a49055e7a707 21 #include "mbed_error.h"
mbed_official 82:0b31dbcd4769 22
mbed_official 82:0b31dbcd4769 23 #define CHANNEL_NUM 64 // 31 pins on 2 ports
mbed_official 82:0b31dbcd4769 24
mbed_official 82:0b31dbcd4769 25 static uint32_t channel_ids[CHANNEL_NUM] = {0};
mbed_official 82:0b31dbcd4769 26 static gpio_irq_handler irq_handler;
mbed_official 82:0b31dbcd4769 27
mbed_official 82:0b31dbcd4769 28 #define IRQ_DISABLED (0)
mbed_official 82:0b31dbcd4769 29 #define IRQ_RAISING_EDGE PORT_PCR_IRQC(9)
mbed_official 82:0b31dbcd4769 30 #define IRQ_FALLING_EDGE PORT_PCR_IRQC(10)
mbed_official 82:0b31dbcd4769 31 #define IRQ_EITHER_EDGE PORT_PCR_IRQC(11)
mbed_official 82:0b31dbcd4769 32
mbed_official 82:0b31dbcd4769 33 static void handle_interrupt_in(PORT_Type *port, int ch_base) {
mbed_official 82:0b31dbcd4769 34 uint32_t mask = 0, i;
mbed_official 82:0b31dbcd4769 35
mbed_official 82:0b31dbcd4769 36 for (i = 0; i < 32; i++) {
mbed_official 82:0b31dbcd4769 37 uint32_t pmask = (1 << i);
mbed_official 82:0b31dbcd4769 38 if (port->ISFR & pmask) {
mbed_official 82:0b31dbcd4769 39 mask |= pmask;
mbed_official 82:0b31dbcd4769 40 uint32_t id = channel_ids[ch_base + i];
mbed_official 86:26fc69fd3b6c 41 if (id == 0) {
mbed_official 86:26fc69fd3b6c 42 continue;
mbed_official 86:26fc69fd3b6c 43 }
mbed_official 82:0b31dbcd4769 44
mbed_official 82:0b31dbcd4769 45 FGPIO_Type *gpio;
mbed_official 82:0b31dbcd4769 46 gpio_irq_event event = IRQ_NONE;
mbed_official 82:0b31dbcd4769 47 switch (port->PCR[i] & PORT_PCR_IRQC_MASK) {
mbed_official 82:0b31dbcd4769 48 case IRQ_RAISING_EDGE:
mbed_official 82:0b31dbcd4769 49 event = IRQ_RISE;
mbed_official 82:0b31dbcd4769 50 break;
mbed_official 82:0b31dbcd4769 51
mbed_official 82:0b31dbcd4769 52 case IRQ_FALLING_EDGE:
mbed_official 82:0b31dbcd4769 53 event = IRQ_FALL;
mbed_official 82:0b31dbcd4769 54 break;
mbed_official 82:0b31dbcd4769 55
mbed_official 82:0b31dbcd4769 56 case IRQ_EITHER_EDGE:
mbed_official 82:0b31dbcd4769 57 gpio = (port == PORTA) ? (FPTA) : (FPTB);
mbed_official 82:0b31dbcd4769 58 event = (gpio->PDIR & pmask) ? (IRQ_RISE) : (IRQ_FALL);
mbed_official 82:0b31dbcd4769 59 break;
mbed_official 82:0b31dbcd4769 60 }
mbed_official 82:0b31dbcd4769 61 if (event != IRQ_NONE) {
mbed_official 82:0b31dbcd4769 62 irq_handler(id, event);
mbed_official 82:0b31dbcd4769 63 }
mbed_official 82:0b31dbcd4769 64 }
mbed_official 82:0b31dbcd4769 65 }
mbed_official 82:0b31dbcd4769 66 port->ISFR = mask;
mbed_official 82:0b31dbcd4769 67 }
mbed_official 82:0b31dbcd4769 68
mbed_official 82:0b31dbcd4769 69 /* IRQ only on PORTA and PORTB */
mbed_official 82:0b31dbcd4769 70 void gpio_irqA(void) {
mbed_official 82:0b31dbcd4769 71 handle_interrupt_in(PORTA, 0);
mbed_official 82:0b31dbcd4769 72 }
mbed_official 82:0b31dbcd4769 73
mbed_official 82:0b31dbcd4769 74 void gpio_irqB(void) {
mbed_official 82:0b31dbcd4769 75 handle_interrupt_in(PORTB, 32);
mbed_official 82:0b31dbcd4769 76 }
mbed_official 82:0b31dbcd4769 77
mbed_official 82:0b31dbcd4769 78 int gpio_irq_init(gpio_irq_t *obj, PinName pin, gpio_irq_handler handler, uint32_t id) {
mbed_official 82:0b31dbcd4769 79 if (pin == NC) return -1;
mbed_official 82:0b31dbcd4769 80
mbed_official 82:0b31dbcd4769 81 irq_handler = handler;
mbed_official 82:0b31dbcd4769 82
mbed_official 82:0b31dbcd4769 83 obj->port = pin >> PORT_SHIFT;
mbed_official 82:0b31dbcd4769 84 obj->pin = (pin & 0x7F) >> 2;
mbed_official 82:0b31dbcd4769 85
mbed_official 82:0b31dbcd4769 86 uint32_t ch_base, vector;
mbed_official 82:0b31dbcd4769 87 IRQn_Type irq_n;
mbed_official 82:0b31dbcd4769 88 switch (obj->port) {
mbed_official 82:0b31dbcd4769 89 case PortA:
mbed_official 82:0b31dbcd4769 90 ch_base = 0;
mbed_official 82:0b31dbcd4769 91 irq_n = PORTA_IRQn;
mbed_official 82:0b31dbcd4769 92 vector = (uint32_t)gpio_irqA;
mbed_official 82:0b31dbcd4769 93 break;
mbed_official 82:0b31dbcd4769 94
mbed_official 82:0b31dbcd4769 95 case PortB:
mbed_official 82:0b31dbcd4769 96 ch_base = 32;
mbed_official 82:0b31dbcd4769 97 irq_n = PORTB_IRQn;
mbed_official 82:0b31dbcd4769 98 vector = (uint32_t)gpio_irqB;
mbed_official 82:0b31dbcd4769 99 break;
mbed_official 82:0b31dbcd4769 100
mbed_official 82:0b31dbcd4769 101 default:
mbed_official 158:3121b9889f7b 102 error("gpio_irq only supported on Port A and B");
mbed_official 82:0b31dbcd4769 103 break;
mbed_official 82:0b31dbcd4769 104 }
mbed_official 82:0b31dbcd4769 105 NVIC_SetVector(irq_n, vector);
mbed_official 82:0b31dbcd4769 106 NVIC_EnableIRQ(irq_n);
mbed_official 82:0b31dbcd4769 107
mbed_official 82:0b31dbcd4769 108 obj->ch = ch_base + obj->pin;
mbed_official 82:0b31dbcd4769 109 channel_ids[obj->ch] = id;
mbed_official 82:0b31dbcd4769 110
mbed_official 82:0b31dbcd4769 111 return 0;
mbed_official 82:0b31dbcd4769 112 }
mbed_official 82:0b31dbcd4769 113
mbed_official 82:0b31dbcd4769 114 void gpio_irq_free(gpio_irq_t *obj) {
mbed_official 82:0b31dbcd4769 115 channel_ids[obj->ch] = 0;
mbed_official 82:0b31dbcd4769 116 }
mbed_official 82:0b31dbcd4769 117
mbed_official 82:0b31dbcd4769 118 void gpio_irq_set(gpio_irq_t *obj, gpio_irq_event event, uint32_t enable) {
mbed_official 82:0b31dbcd4769 119 PORT_Type *port = (PORT_Type *)(PORTA_BASE + 0x1000 * obj->port);
mbed_official 82:0b31dbcd4769 120
mbed_official 82:0b31dbcd4769 121 uint32_t irq_settings = IRQ_DISABLED;
mbed_official 82:0b31dbcd4769 122
mbed_official 82:0b31dbcd4769 123 switch (port->PCR[obj->pin] & PORT_PCR_IRQC_MASK) {
mbed_official 82:0b31dbcd4769 124 case IRQ_DISABLED:
mbed_official 82:0b31dbcd4769 125 if (enable) {
mbed_official 82:0b31dbcd4769 126 irq_settings = (event == IRQ_RISE) ? (IRQ_RAISING_EDGE) : (IRQ_FALLING_EDGE);
mbed_official 82:0b31dbcd4769 127 }
mbed_official 82:0b31dbcd4769 128 break;
mbed_official 82:0b31dbcd4769 129
mbed_official 82:0b31dbcd4769 130 case IRQ_RAISING_EDGE:
mbed_official 82:0b31dbcd4769 131 if (enable) {
mbed_official 82:0b31dbcd4769 132 irq_settings = (event == IRQ_RISE) ? (IRQ_RAISING_EDGE) : (IRQ_EITHER_EDGE);
mbed_official 82:0b31dbcd4769 133 } else {
mbed_official 82:0b31dbcd4769 134 if (event == IRQ_FALL)
mbed_official 82:0b31dbcd4769 135 irq_settings = IRQ_RAISING_EDGE;
mbed_official 82:0b31dbcd4769 136 }
mbed_official 82:0b31dbcd4769 137 break;
mbed_official 82:0b31dbcd4769 138
mbed_official 82:0b31dbcd4769 139 case IRQ_FALLING_EDGE:
mbed_official 82:0b31dbcd4769 140 if (enable) {
mbed_official 82:0b31dbcd4769 141 irq_settings = (event == IRQ_FALL) ? (IRQ_FALLING_EDGE) : (IRQ_EITHER_EDGE);
mbed_official 82:0b31dbcd4769 142 } else {
mbed_official 82:0b31dbcd4769 143 if (event == IRQ_RISE)
mbed_official 82:0b31dbcd4769 144 irq_settings = IRQ_FALLING_EDGE;
mbed_official 82:0b31dbcd4769 145 }
mbed_official 82:0b31dbcd4769 146 break;
mbed_official 82:0b31dbcd4769 147
mbed_official 82:0b31dbcd4769 148 case IRQ_EITHER_EDGE:
mbed_official 82:0b31dbcd4769 149 if (enable) {
mbed_official 82:0b31dbcd4769 150 irq_settings = IRQ_EITHER_EDGE;
mbed_official 82:0b31dbcd4769 151 } else {
mbed_official 82:0b31dbcd4769 152 irq_settings = (event == IRQ_RISE) ? (IRQ_FALLING_EDGE) : (IRQ_RAISING_EDGE);
mbed_official 82:0b31dbcd4769 153 }
mbed_official 82:0b31dbcd4769 154 break;
mbed_official 82:0b31dbcd4769 155 }
mbed_official 82:0b31dbcd4769 156
mbed_official 82:0b31dbcd4769 157 // Interrupt configuration and clear interrupt
mbed_official 82:0b31dbcd4769 158 port->PCR[obj->pin] = (port->PCR[obj->pin] & ~PORT_PCR_IRQC_MASK) | irq_settings | PORT_PCR_ISF_MASK;
mbed_official 82:0b31dbcd4769 159 }
mbed_official 82:0b31dbcd4769 160
mbed_official 82:0b31dbcd4769 161 void gpio_irq_enable(gpio_irq_t *obj) {
mbed_official 82:0b31dbcd4769 162 if (obj->port == PortA) {
mbed_official 82:0b31dbcd4769 163 NVIC_EnableIRQ(PORTA_IRQn);
mbed_official 82:0b31dbcd4769 164 } else if (obj->port == PortB) {
mbed_official 82:0b31dbcd4769 165 NVIC_EnableIRQ(PORTB_IRQn);
mbed_official 82:0b31dbcd4769 166 }
mbed_official 82:0b31dbcd4769 167 }
mbed_official 82:0b31dbcd4769 168
mbed_official 82:0b31dbcd4769 169 void gpio_irq_disable(gpio_irq_t *obj) {
mbed_official 82:0b31dbcd4769 170 if (obj->port == PortA) {
mbed_official 82:0b31dbcd4769 171 NVIC_DisableIRQ(PORTA_IRQn);
mbed_official 82:0b31dbcd4769 172 } else if (obj->port == PortB) {
mbed_official 82:0b31dbcd4769 173 NVIC_DisableIRQ(PORTB_IRQn);
mbed_official 82:0b31dbcd4769 174 }
mbed_official 82:0b31dbcd4769 175 }