shao ziyang / mbed-src-kl05

mbed library sources

Dependents:   frdm_kl05z_gpio_test

Fork of mbed-src by mbed official

targets/hal/TARGET_NXP/TARGET_LPC176X/i2c_api.c@323:9e901b0a5aa1, 2014-09-13 (annotated)

Committer:
shaoziyang
Date:
Sat Sep 13 14:25:46 2014 +0000
Revision:
323:9e901b0a5aa1
Parent:
227:7bd0639b8911 
test with CLOCK_SETUP = 0

Who changed what in which revision?

UserRevisionLine numberNew contents of line
bogdanm 13:0645d8841f51 1 /* mbed Microcontroller Library
bogdanm 13:0645d8841f51 2 * Copyright (c) 2006-2013 ARM Limited
bogdanm 13:0645d8841f51 3 *
bogdanm 13:0645d8841f51 4 * Licensed under the Apache License, Version 2.0 (the "License");
bogdanm 13:0645d8841f51 5 * you may not use this file except in compliance with the License.
bogdanm 13:0645d8841f51 6 * You may obtain a copy of the License at
bogdanm 13:0645d8841f51 7 *
bogdanm 13:0645d8841f51 8 * http://www.apache.org/licenses/LICENSE-2.0
bogdanm 13:0645d8841f51 9 *
bogdanm 13:0645d8841f51 10 * Unless required by applicable law or agreed to in writing, software
bogdanm 13:0645d8841f51 11 * distributed under the License is distributed on an "AS IS" BASIS,
bogdanm 13:0645d8841f51 12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
bogdanm 13:0645d8841f51 13 * See the License for the specific language governing permissions and
bogdanm 13:0645d8841f51 14 * limitations under the License.
bogdanm 13:0645d8841f51 15 */
mbed_official 227:7bd0639b8911 16 #include "mbed_assert.h"
bogdanm 13:0645d8841f51 17 #include "i2c_api.h"
bogdanm 13:0645d8841f51 18 #include "cmsis.h"
bogdanm 13:0645d8841f51 19 #include "pinmap.h"
bogdanm 13:0645d8841f51 20
bogdanm 13:0645d8841f51 21 static const PinMap PinMap_I2C_SDA[] = {
bogdanm 13:0645d8841f51 22 {P0_0 , I2C_1, 3},
bogdanm 13:0645d8841f51 23 {P0_10, I2C_2, 2},
bogdanm 13:0645d8841f51 24 {P0_19, I2C_1, 3},
bogdanm 13:0645d8841f51 25 {P0_27, I2C_0, 1},
bogdanm 13:0645d8841f51 26 {NC , NC , 0}
bogdanm 13:0645d8841f51 27 };
bogdanm 13:0645d8841f51 28
bogdanm 13:0645d8841f51 29 static const PinMap PinMap_I2C_SCL[] = {
bogdanm 13:0645d8841f51 30 {P0_1 , I2C_1, 3},
bogdanm 13:0645d8841f51 31 {P0_11, I2C_2, 2},
bogdanm 13:0645d8841f51 32 {P0_20, I2C_1, 3},
bogdanm 13:0645d8841f51 33 {P0_28, I2C_0, 1},
bogdanm 13:0645d8841f51 34 {NC , NC, 0}
bogdanm 13:0645d8841f51 35 };
bogdanm 13:0645d8841f51 36
bogdanm 13:0645d8841f51 37 #define I2C_CONSET(x) (x->i2c->I2CONSET)
bogdanm 13:0645d8841f51 38 #define I2C_CONCLR(x) (x->i2c->I2CONCLR)
bogdanm 13:0645d8841f51 39 #define I2C_STAT(x) (x->i2c->I2STAT)
bogdanm 13:0645d8841f51 40 #define I2C_DAT(x) (x->i2c->I2DAT)
bogdanm 13:0645d8841f51 41 #define I2C_SCLL(x, val) (x->i2c->I2SCLL = val)
bogdanm 13:0645d8841f51 42 #define I2C_SCLH(x, val) (x->i2c->I2SCLH = val)
bogdanm 13:0645d8841f51 43
bogdanm 13:0645d8841f51 44 static const uint32_t I2C_addr_offset[2][4] = {
bogdanm 13:0645d8841f51 45 {0x0C, 0x20, 0x24, 0x28},
bogdanm 13:0645d8841f51 46 {0x30, 0x34, 0x38, 0x3C}
bogdanm 13:0645d8841f51 47 };
bogdanm 13:0645d8841f51 48
bogdanm 13:0645d8841f51 49 static inline void i2c_conclr(i2c_t *obj, int start, int stop, int interrupt, int acknowledge) {
bogdanm 13:0645d8841f51 50 I2C_CONCLR(obj) = (start << 5)
bogdanm 13:0645d8841f51 51 | (stop << 4)
bogdanm 13:0645d8841f51 52 | (interrupt << 3)
bogdanm 13:0645d8841f51 53 | (acknowledge << 2);
bogdanm 13:0645d8841f51 54 }
bogdanm 13:0645d8841f51 55
bogdanm 13:0645d8841f51 56 static inline void i2c_conset(i2c_t *obj, int start, int stop, int interrupt, int acknowledge) {
bogdanm 13:0645d8841f51 57 I2C_CONSET(obj) = (start << 5)
bogdanm 13:0645d8841f51 58 | (stop << 4)
bogdanm 13:0645d8841f51 59 | (interrupt << 3)
bogdanm 13:0645d8841f51 60 | (acknowledge << 2);
bogdanm 13:0645d8841f51 61 }
bogdanm 13:0645d8841f51 62
bogdanm 13:0645d8841f51 63 // Clear the Serial Interrupt (SI)
bogdanm 13:0645d8841f51 64 static inline void i2c_clear_SI(i2c_t *obj) {
bogdanm 13:0645d8841f51 65 i2c_conclr(obj, 0, 0, 1, 0);
bogdanm 13:0645d8841f51 66 }
bogdanm 13:0645d8841f51 67
bogdanm 13:0645d8841f51 68 static inline int i2c_status(i2c_t *obj) {
bogdanm 13:0645d8841f51 69 return I2C_STAT(obj);
bogdanm 13:0645d8841f51 70 }
bogdanm 13:0645d8841f51 71
bogdanm 13:0645d8841f51 72 // Wait until the Serial Interrupt (SI) is set
bogdanm 13:0645d8841f51 73 static int i2c_wait_SI(i2c_t *obj) {
bogdanm 13:0645d8841f51 74 int timeout = 0;
bogdanm 13:0645d8841f51 75 while (!(I2C_CONSET(obj) & (1 << 3))) {
bogdanm 13:0645d8841f51 76 timeout++;
bogdanm 13:0645d8841f51 77 if (timeout > 100000) return -1;
bogdanm 13:0645d8841f51 78 }
bogdanm 13:0645d8841f51 79 return 0;
bogdanm 13:0645d8841f51 80 }
bogdanm 13:0645d8841f51 81
bogdanm 13:0645d8841f51 82 static inline void i2c_interface_enable(i2c_t *obj) {
bogdanm 13:0645d8841f51 83 I2C_CONSET(obj) = 0x40;
bogdanm 13:0645d8841f51 84 }
bogdanm 13:0645d8841f51 85
bogdanm 13:0645d8841f51 86 static inline void i2c_power_enable(i2c_t *obj) {
bogdanm 13:0645d8841f51 87 switch ((int)obj->i2c) {
bogdanm 13:0645d8841f51 88 case I2C_0: LPC_SC->PCONP |= 1 << 7; break;
bogdanm 13:0645d8841f51 89 case I2C_1: LPC_SC->PCONP |= 1 << 19; break;
bogdanm 13:0645d8841f51 90 case I2C_2: LPC_SC->PCONP |= 1 << 26; break;
bogdanm 13:0645d8841f51 91 }
bogdanm 13:0645d8841f51 92 }
bogdanm 13:0645d8841f51 93
bogdanm 13:0645d8841f51 94 void i2c_init(i2c_t *obj, PinName sda, PinName scl) {
bogdanm 13:0645d8841f51 95 // determine the SPI to use
bogdanm 13:0645d8841f51 96 I2CName i2c_sda = (I2CName)pinmap_peripheral(sda, PinMap_I2C_SDA);
bogdanm 13:0645d8841f51 97 I2CName i2c_scl = (I2CName)pinmap_peripheral(scl, PinMap_I2C_SCL);
bogdanm 13:0645d8841f51 98 obj->i2c = (LPC_I2C_TypeDef *)pinmap_merge(i2c_sda, i2c_scl);
mbed_official 227:7bd0639b8911 99 MBED_ASSERT((int)obj->i2c != NC);
bogdanm 13:0645d8841f51 100
bogdanm 13:0645d8841f51 101 // enable power
bogdanm 13:0645d8841f51 102 i2c_power_enable(obj);
bogdanm 13:0645d8841f51 103
bogdanm 13:0645d8841f51 104 // set default frequency at 100k
bogdanm 13:0645d8841f51 105 i2c_frequency(obj, 100000);
bogdanm 13:0645d8841f51 106 i2c_conclr(obj, 1, 1, 1, 1);
bogdanm 13:0645d8841f51 107 i2c_interface_enable(obj);
bogdanm 13:0645d8841f51 108
bogdanm 13:0645d8841f51 109 pinmap_pinout(sda, PinMap_I2C_SDA);
bogdanm 13:0645d8841f51 110 pinmap_pinout(scl, PinMap_I2C_SCL);
bogdanm 13:0645d8841f51 111 }
bogdanm 13:0645d8841f51 112
bogdanm 13:0645d8841f51 113 inline int i2c_start(i2c_t *obj) {
bogdanm 13:0645d8841f51 114 int status = 0;
bogdanm 13:0645d8841f51 115 // 8.1 Before master mode can be entered, I2CON must be initialised to:
bogdanm 13:0645d8841f51 116 // - I2EN STA STO SI AA - -
bogdanm 13:0645d8841f51 117 // - 1 0 0 0 x - -
bogdanm 13:0645d8841f51 118 // if AA = 0, it can't enter slave mode
bogdanm 13:0645d8841f51 119 i2c_conclr(obj, 1, 1, 1, 1);
bogdanm 13:0645d8841f51 120
bogdanm 13:0645d8841f51 121 // The master mode may now be entered by setting the STA bit
bogdanm 13:0645d8841f51 122 // this will generate a start condition when the bus becomes free
bogdanm 13:0645d8841f51 123 i2c_conset(obj, 1, 0, 0, 1);
bogdanm 13:0645d8841f51 124
bogdanm 13:0645d8841f51 125 i2c_wait_SI(obj);
bogdanm 13:0645d8841f51 126 status = i2c_status(obj);
bogdanm 13:0645d8841f51 127
bogdanm 13:0645d8841f51 128 // Clear start bit now transmitted, and interrupt bit
bogdanm 13:0645d8841f51 129 i2c_conclr(obj, 1, 0, 0, 0);
bogdanm 13:0645d8841f51 130 return status;
bogdanm 13:0645d8841f51 131 }
bogdanm 13:0645d8841f51 132
bogdanm 13:0645d8841f51 133 inline int i2c_stop(i2c_t *obj) {
bogdanm 13:0645d8841f51 134 int timeout = 0;
bogdanm 13:0645d8841f51 135
bogdanm 13:0645d8841f51 136 // write the stop bit
bogdanm 13:0645d8841f51 137 i2c_conset(obj, 0, 1, 0, 0);
bogdanm 13:0645d8841f51 138 i2c_clear_SI(obj);
bogdanm 13:0645d8841f51 139
bogdanm 13:0645d8841f51 140 // wait for STO bit to reset
bogdanm 13:0645d8841f51 141 while(I2C_CONSET(obj) & (1 << 4)) {
bogdanm 13:0645d8841f51 142 timeout ++;
bogdanm 13:0645d8841f51 143 if (timeout > 100000) return 1;
bogdanm 13:0645d8841f51 144 }
bogdanm 13:0645d8841f51 145
bogdanm 13:0645d8841f51 146 return 0;
bogdanm 13:0645d8841f51 147 }
bogdanm 13:0645d8841f51 148
bogdanm 13:0645d8841f51 149 static inline int i2c_do_write(i2c_t *obj, int value, uint8_t addr) {
bogdanm 13:0645d8841f51 150 // write the data
bogdanm 13:0645d8841f51 151 I2C_DAT(obj) = value;
bogdanm 13:0645d8841f51 152
bogdanm 13:0645d8841f51 153 // clear SI to init a send
bogdanm 13:0645d8841f51 154 i2c_clear_SI(obj);
bogdanm 13:0645d8841f51 155
bogdanm 13:0645d8841f51 156 // wait and return status
bogdanm 13:0645d8841f51 157 i2c_wait_SI(obj);
bogdanm 13:0645d8841f51 158 return i2c_status(obj);
bogdanm 13:0645d8841f51 159 }
bogdanm 13:0645d8841f51 160
bogdanm 13:0645d8841f51 161 static inline int i2c_do_read(i2c_t *obj, int last) {
bogdanm 13:0645d8841f51 162 // we are in state 0x40 (SLA+R tx'd) or 0x50 (data rx'd and ack)
bogdanm 13:0645d8841f51 163 if(last) {
bogdanm 13:0645d8841f51 164 i2c_conclr(obj, 0, 0, 0, 1); // send a NOT ACK
bogdanm 13:0645d8841f51 165 } else {
bogdanm 13:0645d8841f51 166 i2c_conset(obj, 0, 0, 0, 1); // send a ACK
bogdanm 13:0645d8841f51 167 }
bogdanm 13:0645d8841f51 168
bogdanm 13:0645d8841f51 169 // accept byte
bogdanm 13:0645d8841f51 170 i2c_clear_SI(obj);
bogdanm 13:0645d8841f51 171
bogdanm 13:0645d8841f51 172 // wait for it to arrive
bogdanm 13:0645d8841f51 173 i2c_wait_SI(obj);
bogdanm 13:0645d8841f51 174
bogdanm 13:0645d8841f51 175 // return the data
bogdanm 13:0645d8841f51 176 return (I2C_DAT(obj) & 0xFF);
bogdanm 13:0645d8841f51 177 }
bogdanm 13:0645d8841f51 178
bogdanm 13:0645d8841f51 179 void i2c_frequency(i2c_t *obj, int hz) {
bogdanm 13:0645d8841f51 180 // [TODO] set pclk to /4
bogdanm 13:0645d8841f51 181 uint32_t PCLK = SystemCoreClock / 4;
bogdanm 13:0645d8841f51 182
bogdanm 13:0645d8841f51 183 uint32_t pulse = PCLK / (hz * 2);
bogdanm 13:0645d8841f51 184
bogdanm 13:0645d8841f51 185 // I2C Rate
bogdanm 13:0645d8841f51 186 I2C_SCLL(obj, pulse);
bogdanm 13:0645d8841f51 187 I2C_SCLH(obj, pulse);
bogdanm 13:0645d8841f51 188 }
bogdanm 13:0645d8841f51 189
bogdanm 13:0645d8841f51 190 // The I2C does a read or a write as a whole operation
bogdanm 13:0645d8841f51 191 // There are two types of error conditions it can encounter
bogdanm 13:0645d8841f51 192 // 1) it can not obtain the bus
bogdanm 13:0645d8841f51 193 // 2) it gets error responses at part of the transmission
bogdanm 13:0645d8841f51 194 //
bogdanm 13:0645d8841f51 195 // We tackle them as follows:
bogdanm 13:0645d8841f51 196 // 1) we retry until we get the bus. we could have a "timeout" if we can not get it
bogdanm 13:0645d8841f51 197 // which basically turns it in to a 2)
bogdanm 13:0645d8841f51 198 // 2) on error, we use the standard error mechanisms to report/debug
bogdanm 13:0645d8841f51 199 //
bogdanm 13:0645d8841f51 200 // Therefore an I2C transaction should always complete. If it doesn't it is usually
bogdanm 13:0645d8841f51 201 // because something is setup wrong (e.g. wiring), and we don't need to programatically
bogdanm 13:0645d8841f51 202 // check for that
bogdanm 13:0645d8841f51 203
bogdanm 13:0645d8841f51 204 int i2c_read(i2c_t *obj, int address, char *data, int length, int stop) {
bogdanm 13:0645d8841f51 205 int count, status;
bogdanm 13:0645d8841f51 206
bogdanm 13:0645d8841f51 207 status = i2c_start(obj);
bogdanm 13:0645d8841f51 208
bogdanm 13:0645d8841f51 209 if ((status != 0x10) && (status != 0x08)) {
bogdanm 13:0645d8841f51 210 i2c_stop(obj);
bogdanm 13:0645d8841f51 211 return I2C_ERROR_BUS_BUSY;
bogdanm 13:0645d8841f51 212 }
bogdanm 13:0645d8841f51 213
bogdanm 13:0645d8841f51 214 status = i2c_do_write(obj, (address | 0x01), 1);
bogdanm 13:0645d8841f51 215 if (status != 0x40) {
bogdanm 13:0645d8841f51 216 i2c_stop(obj);
bogdanm 13:0645d8841f51 217 return I2C_ERROR_NO_SLAVE;
bogdanm 13:0645d8841f51 218 }
bogdanm 13:0645d8841f51 219
bogdanm 13:0645d8841f51 220 // Read in all except last byte
bogdanm 13:0645d8841f51 221 for (count = 0; count < (length - 1); count++) {
bogdanm 13:0645d8841f51 222 int value = i2c_do_read(obj, 0);
bogdanm 13:0645d8841f51 223 status = i2c_status(obj);
bogdanm 13:0645d8841f51 224 if (status != 0x50) {
bogdanm 13:0645d8841f51 225 i2c_stop(obj);
bogdanm 13:0645d8841f51 226 return count;
bogdanm 13:0645d8841f51 227 }
bogdanm 13:0645d8841f51 228 data[count] = (char) value;
bogdanm 13:0645d8841f51 229 }
bogdanm 13:0645d8841f51 230
bogdanm 13:0645d8841f51 231 // read in last byte
bogdanm 13:0645d8841f51 232 int value = i2c_do_read(obj, 1);
bogdanm 13:0645d8841f51 233 status = i2c_status(obj);
bogdanm 13:0645d8841f51 234 if (status != 0x58) {
bogdanm 13:0645d8841f51 235 i2c_stop(obj);
bogdanm 13:0645d8841f51 236 return length - 1;
bogdanm 13:0645d8841f51 237 }
bogdanm 13:0645d8841f51 238
bogdanm 13:0645d8841f51 239 data[count] = (char) value;
bogdanm 13:0645d8841f51 240
bogdanm 13:0645d8841f51 241 // If not repeated start, send stop.
bogdanm 13:0645d8841f51 242 if (stop) {
bogdanm 13:0645d8841f51 243 i2c_stop(obj);
bogdanm 13:0645d8841f51 244 }
bogdanm 13:0645d8841f51 245
bogdanm 13:0645d8841f51 246 return length;
bogdanm 13:0645d8841f51 247 }
bogdanm 13:0645d8841f51 248
bogdanm 13:0645d8841f51 249 int i2c_write(i2c_t *obj, int address, const char *data, int length, int stop) {
bogdanm 13:0645d8841f51 250 int i, status;
bogdanm 13:0645d8841f51 251
bogdanm 13:0645d8841f51 252 status = i2c_start(obj);
bogdanm 13:0645d8841f51 253
bogdanm 13:0645d8841f51 254 if ((status != 0x10) && (status != 0x08)) {
bogdanm 13:0645d8841f51 255 i2c_stop(obj);
bogdanm 13:0645d8841f51 256 return I2C_ERROR_BUS_BUSY;
bogdanm 13:0645d8841f51 257 }
bogdanm 13:0645d8841f51 258
bogdanm 13:0645d8841f51 259 status = i2c_do_write(obj, (address & 0xFE), 1);
bogdanm 13:0645d8841f51 260 if (status != 0x18) {
bogdanm 13:0645d8841f51 261 i2c_stop(obj);
bogdanm 13:0645d8841f51 262 return I2C_ERROR_NO_SLAVE;
bogdanm 13:0645d8841f51 263 }
bogdanm 13:0645d8841f51 264
bogdanm 13:0645d8841f51 265 for (i=0; i<length; i++) {
bogdanm 13:0645d8841f51 266 status = i2c_do_write(obj, data[i], 0);
bogdanm 13:0645d8841f51 267 if(status != 0x28) {
bogdanm 13:0645d8841f51 268 i2c_stop(obj);
bogdanm 13:0645d8841f51 269 return i;
bogdanm 13:0645d8841f51 270 }
bogdanm 13:0645d8841f51 271 }
bogdanm 13:0645d8841f51 272
bogdanm 13:0645d8841f51 273 // clearing the serial interrupt here might cause an unintended rewrite of the last byte
bogdanm 13:0645d8841f51 274 // see also issue report https://mbed.org/users/mbed_official/code/mbed/issues/1
bogdanm 13:0645d8841f51 275 // i2c_clear_SI(obj);
bogdanm 13:0645d8841f51 276
bogdanm 13:0645d8841f51 277 // If not repeated start, send stop.
bogdanm 13:0645d8841f51 278 if (stop) {
bogdanm 13:0645d8841f51 279 i2c_stop(obj);
bogdanm 13:0645d8841f51 280 }
bogdanm 13:0645d8841f51 281
bogdanm 13:0645d8841f51 282 return length;
bogdanm 13:0645d8841f51 283 }
bogdanm 13:0645d8841f51 284
bogdanm 13:0645d8841f51 285 void i2c_reset(i2c_t *obj) {
bogdanm 13:0645d8841f51 286 i2c_stop(obj);
bogdanm 13:0645d8841f51 287 }
bogdanm 13:0645d8841f51 288
bogdanm 13:0645d8841f51 289 int i2c_byte_read(i2c_t *obj, int last) {
bogdanm 13:0645d8841f51 290 return (i2c_do_read(obj, last) & 0xFF);
bogdanm 13:0645d8841f51 291 }
bogdanm 13:0645d8841f51 292
bogdanm 13:0645d8841f51 293 int i2c_byte_write(i2c_t *obj, int data) {
bogdanm 13:0645d8841f51 294 int ack;
bogdanm 13:0645d8841f51 295 int status = i2c_do_write(obj, (data & 0xFF), 0);
bogdanm 13:0645d8841f51 296
bogdanm 13:0645d8841f51 297 switch(status) {
bogdanm 13:0645d8841f51 298 case 0x18: case 0x28: // Master transmit ACKs
bogdanm 13:0645d8841f51 299 ack = 1;
bogdanm 13:0645d8841f51 300 break;
bogdanm 13:0645d8841f51 301 case 0x40: // Master receive address transmitted ACK
bogdanm 13:0645d8841f51 302 ack = 1;
bogdanm 13:0645d8841f51 303 break;
bogdanm 13:0645d8841f51 304 case 0xB8: // Slave transmit ACK
bogdanm 13:0645d8841f51 305 ack = 1;
bogdanm 13:0645d8841f51 306 break;
bogdanm 13:0645d8841f51 307 default:
bogdanm 13:0645d8841f51 308 ack = 0;
bogdanm 13:0645d8841f51 309 break;
bogdanm 13:0645d8841f51 310 }
bogdanm 13:0645d8841f51 311
bogdanm 13:0645d8841f51 312 return ack;
bogdanm 13:0645d8841f51 313 }
bogdanm 13:0645d8841f51 314
bogdanm 13:0645d8841f51 315 void i2c_slave_mode(i2c_t *obj, int enable_slave) {
bogdanm 13:0645d8841f51 316 if (enable_slave != 0) {
bogdanm 13:0645d8841f51 317 i2c_conclr(obj, 1, 1, 1, 0);
bogdanm 13:0645d8841f51 318 i2c_conset(obj, 0, 0, 0, 1);
bogdanm 13:0645d8841f51 319 } else {
bogdanm 13:0645d8841f51 320 i2c_conclr(obj, 1, 1, 1, 1);
bogdanm 13:0645d8841f51 321 }
bogdanm 13:0645d8841f51 322 }
bogdanm 13:0645d8841f51 323
bogdanm 13:0645d8841f51 324 int i2c_slave_receive(i2c_t *obj) {
bogdanm 13:0645d8841f51 325 int status;
bogdanm 13:0645d8841f51 326 int retval;
bogdanm 13:0645d8841f51 327
bogdanm 13:0645d8841f51 328 status = i2c_status(obj);
bogdanm 13:0645d8841f51 329 switch(status) {
bogdanm 13:0645d8841f51 330 case 0x60: retval = 3; break;
bogdanm 13:0645d8841f51 331 case 0x70: retval = 2; break;
bogdanm 13:0645d8841f51 332 case 0xA8: retval = 1; break;
bogdanm 13:0645d8841f51 333 default : retval = 0; break;
bogdanm 13:0645d8841f51 334 }
bogdanm 13:0645d8841f51 335
bogdanm 13:0645d8841f51 336 return(retval);
bogdanm 13:0645d8841f51 337 }
bogdanm 13:0645d8841f51 338
bogdanm 13:0645d8841f51 339 int i2c_slave_read(i2c_t *obj, char *data, int length) {
bogdanm 13:0645d8841f51 340 int count = 0;
bogdanm 13:0645d8841f51 341 int status;
bogdanm 13:0645d8841f51 342
bogdanm 13:0645d8841f51 343 do {
bogdanm 13:0645d8841f51 344 i2c_clear_SI(obj);
bogdanm 13:0645d8841f51 345 i2c_wait_SI(obj);
bogdanm 13:0645d8841f51 346 status = i2c_status(obj);
bogdanm 13:0645d8841f51 347 if((status == 0x80) || (status == 0x90)) {
bogdanm 13:0645d8841f51 348 data[count] = I2C_DAT(obj) & 0xFF;
bogdanm 13:0645d8841f51 349 }
bogdanm 13:0645d8841f51 350 count++;
bogdanm 13:0645d8841f51 351 } while (((status == 0x80) || (status == 0x90) ||
bogdanm 13:0645d8841f51 352 (status == 0x060) || (status == 0x70)) && (count < length));
bogdanm 13:0645d8841f51 353
bogdanm 13:0645d8841f51 354 if(status != 0xA0) {
bogdanm 13:0645d8841f51 355 i2c_stop(obj);
bogdanm 13:0645d8841f51 356 }
bogdanm 13:0645d8841f51 357
bogdanm 13:0645d8841f51 358 i2c_clear_SI(obj);
bogdanm 13:0645d8841f51 359
bogdanm 13:0645d8841f51 360 return count;
bogdanm 13:0645d8841f51 361 }
bogdanm 13:0645d8841f51 362
bogdanm 13:0645d8841f51 363 int i2c_slave_write(i2c_t *obj, const char *data, int length) {
bogdanm 13:0645d8841f51 364 int count = 0;
bogdanm 13:0645d8841f51 365 int status;
bogdanm 13:0645d8841f51 366
bogdanm 13:0645d8841f51 367 if(length <= 0) {
bogdanm 13:0645d8841f51 368 return(0);
bogdanm 13:0645d8841f51 369 }
bogdanm 13:0645d8841f51 370
bogdanm 13:0645d8841f51 371 do {
bogdanm 13:0645d8841f51 372 status = i2c_do_write(obj, data[count], 0);
bogdanm 13:0645d8841f51 373 count++;
bogdanm 13:0645d8841f51 374 } while ((count < length) && (status == 0xB8));
bogdanm 13:0645d8841f51 375
bogdanm 13:0645d8841f51 376 if ((status != 0xC0) && (status != 0xC8)) {
bogdanm 13:0645d8841f51 377 i2c_stop(obj);
bogdanm 13:0645d8841f51 378 }
bogdanm 13:0645d8841f51 379
bogdanm 13:0645d8841f51 380 i2c_clear_SI(obj);
bogdanm 13:0645d8841f51 381
bogdanm 13:0645d8841f51 382 return(count);
bogdanm 13:0645d8841f51 383 }
bogdanm 13:0645d8841f51 384
bogdanm 13:0645d8841f51 385 void i2c_slave_address(i2c_t *obj, int idx, uint32_t address, uint32_t mask) {
bogdanm 13:0645d8841f51 386 uint32_t addr;
bogdanm 13:0645d8841f51 387
bogdanm 13:0645d8841f51 388 if ((idx >= 0) && (idx <= 3)) {
bogdanm 13:0645d8841f51 389 addr = ((uint32_t)obj->i2c) + I2C_addr_offset[0][idx];
bogdanm 13:0645d8841f51 390 *((uint32_t *) addr) = address & 0xFF;
bogdanm 13:0645d8841f51 391 addr = ((uint32_t)obj->i2c) + I2C_addr_offset[1][idx];
bogdanm 13:0645d8841f51 392 *((uint32_t *) addr) = mask & 0xFE;
bogdanm 13:0645d8841f51 393 }
bogdanm 13:0645d8841f51 394 }