shao ziyang / mbed-src-kl05

mbed library sources

Dependents:   frdm_kl05z_gpio_test

Fork of mbed-src by mbed official

targets/hal/TARGET_NXP/TARGET_LPC15XX/analogin_api.c@323:9e901b0a5aa1, 2014-09-13 (annotated)

Committer:
shaoziyang
Date:
Sat Sep 13 14:25:46 2014 +0000
Revision:
323:9e901b0a5aa1
Parent:
227:7bd0639b8911 
test with CLOCK_SETUP = 0

Who changed what in which revision?

UserRevisionLine numberNew contents of line
mbed_official 103:9b881da47c92 1 /* mbed Microcontroller Library
mbed_official 103:9b881da47c92 2 * Copyright (c) 2006-2013 ARM Limited
mbed_official 103:9b881da47c92 3 *
mbed_official 103:9b881da47c92 4 * Licensed under the Apache License, Version 2.0 (the "License");
mbed_official 103:9b881da47c92 5 * you may not use this file except in compliance with the License.
mbed_official 103:9b881da47c92 6 * You may obtain a copy of the License at
mbed_official 103:9b881da47c92 7 *
mbed_official 103:9b881da47c92 8 * http://www.apache.org/licenses/LICENSE-2.0
mbed_official 103:9b881da47c92 9 *
mbed_official 103:9b881da47c92 10 * Unless required by applicable law or agreed to in writing, software
mbed_official 103:9b881da47c92 11 * distributed under the License is distributed on an "AS IS" BASIS,
mbed_official 103:9b881da47c92 12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
mbed_official 103:9b881da47c92 13 * See the License for the specific language governing permissions and
mbed_official 103:9b881da47c92 14 * limitations under the License.
mbed_official 103:9b881da47c92 15 */
mbed_official 227:7bd0639b8911 16 #include "mbed_assert.h"
mbed_official 103:9b881da47c92 17 #include "analogin_api.h"
mbed_official 103:9b881da47c92 18 #include "cmsis.h"
mbed_official 103:9b881da47c92 19 #include "pinmap.h"
mbed_official 103:9b881da47c92 20
mbed_official 103:9b881da47c92 21 #define ANALOGIN_MEDIAN_FILTER 1
mbed_official 103:9b881da47c92 22
mbed_official 103:9b881da47c92 23 #define ADC_10BIT_RANGE 0x3FF
mbed_official 103:9b881da47c92 24 #define ADC_12BIT_RANGE 0xFFF
mbed_official 103:9b881da47c92 25
mbed_official 103:9b881da47c92 26 #define ADC_RANGE ADC_12BIT_RANGE
mbed_official 103:9b881da47c92 27
mbed_official 103:9b881da47c92 28 static const PinMap PinMap_ADC[] = {
mbed_official 103:9b881da47c92 29 {P0_8 , ADC0_0, 0},
mbed_official 103:9b881da47c92 30 {P0_7 , ADC0_1, 0},
mbed_official 103:9b881da47c92 31 {P0_6 , ADC0_2, 0},
mbed_official 103:9b881da47c92 32 {P0_5 , ADC0_3, 0},
mbed_official 103:9b881da47c92 33 {P0_4 , ADC0_4, 0},
mbed_official 103:9b881da47c92 34 {P0_3 , ADC0_5, 0},
mbed_official 103:9b881da47c92 35 {P0_2 , ADC0_6, 0},
mbed_official 103:9b881da47c92 36 {P0_1 , ADC0_7, 0},
mbed_official 103:9b881da47c92 37 {P1_0 , ADC0_8, 0},
mbed_official 103:9b881da47c92 38 {P0_31, ADC0_9, 0},
mbed_official 103:9b881da47c92 39 {P0_0 , ADC0_10,0},
mbed_official 103:9b881da47c92 40 {P0_30, ADC0_11,0},
mbed_official 103:9b881da47c92 41 {P1_1 , ADC1_0, 0},
mbed_official 103:9b881da47c92 42 {P0_9 , ADC1_1, 0},
mbed_official 103:9b881da47c92 43 {P0_10, ADC1_2, 0},
mbed_official 103:9b881da47c92 44 {P0_11, ADC1_3, 0},
mbed_official 103:9b881da47c92 45 {P1_2 , ADC1_4, 0},
mbed_official 103:9b881da47c92 46 {P1_3 , ADC1_5, 0},
mbed_official 103:9b881da47c92 47 {P0_13, ADC1_6, 0},
mbed_official 103:9b881da47c92 48 {P0_14, ADC1_7, 0},
mbed_official 103:9b881da47c92 49 {P0_15, ADC1_8, 0},
mbed_official 103:9b881da47c92 50 {P0_16, ADC1_9, 0},
mbed_official 103:9b881da47c92 51 {P1_4 , ADC1_10,0},
mbed_official 103:9b881da47c92 52 {P1_5 , ADC1_11,0},
mbed_official 103:9b881da47c92 53 };
mbed_official 103:9b881da47c92 54
mbed_official 103:9b881da47c92 55 void analogin_init(analogin_t *obj, PinName pin) {
mbed_official 103:9b881da47c92 56 obj->adc = (ADCName)pinmap_peripheral(pin, PinMap_ADC);
mbed_official 227:7bd0639b8911 57 MBED_ASSERT(obj->adc != (ADCName)NC);
mbed_official 227:7bd0639b8911 58
mbed_official 103:9b881da47c92 59 uint32_t port = (pin >> 5);
mbed_official 214:b6ec89a903fb 60 // enable clock for GPIOx
mbed_official 103:9b881da47c92 61 LPC_SYSCON->SYSAHBCLKCTRL0 |= (1UL << (14 + port));
mbed_official 214:b6ec89a903fb 62 // pin enable
mbed_official 214:b6ec89a903fb 63 LPC_SWM->PINENABLE0 &= ~(1UL << obj->adc);
mbed_official 103:9b881da47c92 64 // configure GPIO as input
mbed_official 103:9b881da47c92 65 LPC_GPIO_PORT->DIR[port] &= ~(1UL << (pin & 0x1F));
mbed_official 214:b6ec89a903fb 66
mbed_official 103:9b881da47c92 67 // power up ADC
mbed_official 103:9b881da47c92 68 if (obj->adc < ADC1_0)
mbed_official 103:9b881da47c92 69 {
mbed_official 103:9b881da47c92 70 // ADC0
mbed_official 103:9b881da47c92 71 LPC_SYSCON->PDRUNCFG &= ~(1 << 10);
mbed_official 103:9b881da47c92 72 LPC_SYSCON->SYSAHBCLKCTRL0 |= (1 << 27);
mbed_official 214:b6ec89a903fb 73 }
mbed_official 214:b6ec89a903fb 74 else {
mbed_official 214:b6ec89a903fb 75 // ADC1
mbed_official 103:9b881da47c92 76 LPC_SYSCON->PDRUNCFG &= ~(1 << 11);
mbed_official 103:9b881da47c92 77 LPC_SYSCON->SYSAHBCLKCTRL0 |= (1 << 28);
mbed_official 214:b6ec89a903fb 78 }
mbed_official 103:9b881da47c92 79
mbed_official 103:9b881da47c92 80 // select IRC as async. clock, divided by 1
mbed_official 103:9b881da47c92 81 LPC_SYSCON->ADCASYNCCLKSEL = 0;
mbed_official 103:9b881da47c92 82 LPC_SYSCON->ADCASYNCCLKDIV = 1;
mbed_official 103:9b881da47c92 83
mbed_official 103:9b881da47c92 84 __IO LPC_ADC0_Type *adc_reg = (obj->adc < ADC1_0) ? (__IO LPC_ADC0_Type*)(LPC_ADC0) : (__IO LPC_ADC0_Type*)(LPC_ADC1);
mbed_official 103:9b881da47c92 85
mbed_official 103:9b881da47c92 86 // start calibration
mbed_official 103:9b881da47c92 87 adc_reg->CTRL |= (1UL << 30);
mbed_official 103:9b881da47c92 88 __NOP(); __NOP(); __NOP(); __NOP(); __NOP(); __NOP();
mbed_official 103:9b881da47c92 89
mbed_official 103:9b881da47c92 90 // asynchronous mode
mbed_official 103:9b881da47c92 91 adc_reg->CTRL = (1UL << 8);
mbed_official 103:9b881da47c92 92
mbed_official 103:9b881da47c92 93 }
mbed_official 103:9b881da47c92 94
mbed_official 103:9b881da47c92 95 static inline uint32_t adc_read(analogin_t *obj) {
mbed_official 217:d0ccc61c1fd4 96 uint32_t channels;
mbed_official 103:9b881da47c92 97
mbed_official 103:9b881da47c92 98 __IO LPC_ADC0_Type *adc_reg = (obj->adc < ADC1_0) ? (__IO LPC_ADC0_Type*)(LPC_ADC0) : (__IO LPC_ADC0_Type*)(LPC_ADC1);
mbed_official 103:9b881da47c92 99
mbed_official 214:b6ec89a903fb 100 if (obj->adc >= ADC1_0)
mbed_official 214:b6ec89a903fb 101 channels = ((obj->adc - ADC1_0) & 0x1F);
mbed_official 214:b6ec89a903fb 102 else
mbed_official 214:b6ec89a903fb 103 channels = (obj->adc & 0x1F);
mbed_official 214:b6ec89a903fb 104
mbed_official 103:9b881da47c92 105 // select channel
mbed_official 103:9b881da47c92 106 adc_reg->SEQA_CTRL &= ~(0xFFF);
mbed_official 214:b6ec89a903fb 107 adc_reg->SEQA_CTRL |= (1UL << channels);
mbed_official 103:9b881da47c92 108
mbed_official 103:9b881da47c92 109 // start conversion and sequence enable
mbed_official 103:9b881da47c92 110 adc_reg->SEQA_CTRL |= ((1UL << 26) | (1UL << 31));
mbed_official 103:9b881da47c92 111
mbed_official 103:9b881da47c92 112 // Repeatedly get the sample data until DONE bit
mbed_official 103:9b881da47c92 113 volatile uint32_t data;
mbed_official 103:9b881da47c92 114 do {
mbed_official 103:9b881da47c92 115 data = adc_reg->SEQA_GDAT;
mbed_official 103:9b881da47c92 116 } while ((data & (1UL << 31)) == 0);
mbed_official 103:9b881da47c92 117
mbed_official 103:9b881da47c92 118 // Stop conversion
mbed_official 103:9b881da47c92 119 adc_reg->SEQA_CTRL &= ~(1UL << 31);
mbed_official 103:9b881da47c92 120
mbed_official 103:9b881da47c92 121 return ((data >> 4) & ADC_RANGE);
mbed_official 103:9b881da47c92 122 }
mbed_official 103:9b881da47c92 123
mbed_official 103:9b881da47c92 124 static inline void order(uint32_t *a, uint32_t *b) {
mbed_official 103:9b881da47c92 125 if (*a > *b) {
mbed_official 103:9b881da47c92 126 uint32_t t = *a;
mbed_official 103:9b881da47c92 127 *a = *b;
mbed_official 103:9b881da47c92 128 *b = t;
mbed_official 103:9b881da47c92 129 }
mbed_official 103:9b881da47c92 130 }
mbed_official 103:9b881da47c92 131
mbed_official 103:9b881da47c92 132 static inline uint32_t adc_read_u32(analogin_t *obj) {
mbed_official 103:9b881da47c92 133 uint32_t value;
mbed_official 103:9b881da47c92 134 #if ANALOGIN_MEDIAN_FILTER
mbed_official 103:9b881da47c92 135 uint32_t v1 = adc_read(obj);
mbed_official 103:9b881da47c92 136 uint32_t v2 = adc_read(obj);
mbed_official 103:9b881da47c92 137 uint32_t v3 = adc_read(obj);
mbed_official 103:9b881da47c92 138 order(&v1, &v2);
mbed_official 103:9b881da47c92 139 order(&v2, &v3);
mbed_official 103:9b881da47c92 140 order(&v1, &v2);
mbed_official 103:9b881da47c92 141 value = v2;
mbed_official 103:9b881da47c92 142 #else
mbed_official 103:9b881da47c92 143 value = adc_read(obj);
mbed_official 103:9b881da47c92 144 #endif
mbed_official 103:9b881da47c92 145 return value;
mbed_official 103:9b881da47c92 146 }
mbed_official 103:9b881da47c92 147
mbed_official 103:9b881da47c92 148 uint16_t analogin_read_u16(analogin_t *obj) {
mbed_official 103:9b881da47c92 149 uint32_t value = adc_read_u32(obj);
mbed_official 103:9b881da47c92 150 return (value << 4) | ((value >> 8) & 0x000F); // 12 bit
mbed_official 103:9b881da47c92 151 }
mbed_official 103:9b881da47c92 152
mbed_official 103:9b881da47c92 153 float analogin_read(analogin_t *obj) {
mbed_official 103:9b881da47c92 154 uint32_t value = adc_read_u32(obj);
mbed_official 103:9b881da47c92 155 return (float)value * (1.0f / (float)ADC_RANGE);
mbed_official 103:9b881da47c92 156 }