mbed library sources
Dependents: frdm_kl05z_gpio_test
Fork of mbed-src by
targets/hal/TARGET_Freescale/TARGET_KPSDK_MCUS/TARGET_MCU_K64F/device/MK64F12/MK64F12_usb.h@323:9e901b0a5aa1, 2014-09-13 (annotated)
- Committer:
- shaoziyang
- Date:
- Sat Sep 13 14:25:46 2014 +0000
- Revision:
- 323:9e901b0a5aa1
- Parent:
- 320:be04b2b1e3f2
test with CLOCK_SETUP = 0
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
mbed_official | 146:f64d43ff0c18 | 1 | /* |
mbed_official | 146:f64d43ff0c18 | 2 | * Copyright (c) 2014, Freescale Semiconductor, Inc. |
mbed_official | 146:f64d43ff0c18 | 3 | * All rights reserved. |
mbed_official | 146:f64d43ff0c18 | 4 | * |
mbed_official | 146:f64d43ff0c18 | 5 | * THIS SOFTWARE IS PROVIDED BY FREESCALE "AS IS" AND ANY EXPRESS OR IMPLIED |
mbed_official | 146:f64d43ff0c18 | 6 | * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF |
mbed_official | 146:f64d43ff0c18 | 7 | * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT |
mbed_official | 146:f64d43ff0c18 | 8 | * SHALL FREESCALE BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, |
mbed_official | 146:f64d43ff0c18 | 9 | * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT |
mbed_official | 146:f64d43ff0c18 | 10 | * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS |
mbed_official | 146:f64d43ff0c18 | 11 | * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN |
mbed_official | 146:f64d43ff0c18 | 12 | * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING |
mbed_official | 146:f64d43ff0c18 | 13 | * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY |
mbed_official | 146:f64d43ff0c18 | 14 | * OF SUCH DAMAGE. |
mbed_official | 146:f64d43ff0c18 | 15 | */ |
mbed_official | 146:f64d43ff0c18 | 16 | /* |
mbed_official | 146:f64d43ff0c18 | 17 | * WARNING! DO NOT EDIT THIS FILE DIRECTLY! |
mbed_official | 146:f64d43ff0c18 | 18 | * |
mbed_official | 146:f64d43ff0c18 | 19 | * This file was generated automatically and any changes may be lost. |
mbed_official | 146:f64d43ff0c18 | 20 | */ |
mbed_official | 146:f64d43ff0c18 | 21 | #ifndef __HW_USB_REGISTERS_H__ |
mbed_official | 146:f64d43ff0c18 | 22 | #define __HW_USB_REGISTERS_H__ |
mbed_official | 146:f64d43ff0c18 | 23 | |
mbed_official | 146:f64d43ff0c18 | 24 | #include "regs.h" |
mbed_official | 146:f64d43ff0c18 | 25 | |
mbed_official | 146:f64d43ff0c18 | 26 | /* |
mbed_official | 146:f64d43ff0c18 | 27 | * MK64F12 USB |
mbed_official | 146:f64d43ff0c18 | 28 | * |
mbed_official | 146:f64d43ff0c18 | 29 | * Universal Serial Bus, OTG Capable Controller |
mbed_official | 146:f64d43ff0c18 | 30 | * |
mbed_official | 146:f64d43ff0c18 | 31 | * Registers defined in this header file: |
mbed_official | 146:f64d43ff0c18 | 32 | * - HW_USB_PERID - Peripheral ID register |
mbed_official | 146:f64d43ff0c18 | 33 | * - HW_USB_IDCOMP - Peripheral ID Complement register |
mbed_official | 146:f64d43ff0c18 | 34 | * - HW_USB_REV - Peripheral Revision register |
mbed_official | 146:f64d43ff0c18 | 35 | * - HW_USB_ADDINFO - Peripheral Additional Info register |
mbed_official | 146:f64d43ff0c18 | 36 | * - HW_USB_OTGISTAT - OTG Interrupt Status register |
mbed_official | 146:f64d43ff0c18 | 37 | * - HW_USB_OTGICR - OTG Interrupt Control register |
mbed_official | 146:f64d43ff0c18 | 38 | * - HW_USB_OTGSTAT - OTG Status register |
mbed_official | 146:f64d43ff0c18 | 39 | * - HW_USB_OTGCTL - OTG Control register |
mbed_official | 146:f64d43ff0c18 | 40 | * - HW_USB_ISTAT - Interrupt Status register |
mbed_official | 146:f64d43ff0c18 | 41 | * - HW_USB_INTEN - Interrupt Enable register |
mbed_official | 146:f64d43ff0c18 | 42 | * - HW_USB_ERRSTAT - Error Interrupt Status register |
mbed_official | 146:f64d43ff0c18 | 43 | * - HW_USB_ERREN - Error Interrupt Enable register |
mbed_official | 146:f64d43ff0c18 | 44 | * - HW_USB_STAT - Status register |
mbed_official | 146:f64d43ff0c18 | 45 | * - HW_USB_CTL - Control register |
mbed_official | 146:f64d43ff0c18 | 46 | * - HW_USB_ADDR - Address register |
mbed_official | 146:f64d43ff0c18 | 47 | * - HW_USB_BDTPAGE1 - BDT Page register 1 |
mbed_official | 146:f64d43ff0c18 | 48 | * - HW_USB_FRMNUML - Frame Number register Low |
mbed_official | 146:f64d43ff0c18 | 49 | * - HW_USB_FRMNUMH - Frame Number register High |
mbed_official | 146:f64d43ff0c18 | 50 | * - HW_USB_TOKEN - Token register |
mbed_official | 146:f64d43ff0c18 | 51 | * - HW_USB_SOFTHLD - SOF Threshold register |
mbed_official | 146:f64d43ff0c18 | 52 | * - HW_USB_BDTPAGE2 - BDT Page Register 2 |
mbed_official | 146:f64d43ff0c18 | 53 | * - HW_USB_BDTPAGE3 - BDT Page Register 3 |
mbed_official | 146:f64d43ff0c18 | 54 | * - HW_USB_ENDPTn - Endpoint Control register |
mbed_official | 146:f64d43ff0c18 | 55 | * - HW_USB_USBCTRL - USB Control register |
mbed_official | 146:f64d43ff0c18 | 56 | * - HW_USB_OBSERVE - USB OTG Observe register |
mbed_official | 146:f64d43ff0c18 | 57 | * - HW_USB_CONTROL - USB OTG Control register |
mbed_official | 146:f64d43ff0c18 | 58 | * - HW_USB_USBTRC0 - USB Transceiver Control register 0 |
mbed_official | 146:f64d43ff0c18 | 59 | * - HW_USB_USBFRMADJUST - Frame Adjust Register |
mbed_official | 146:f64d43ff0c18 | 60 | * - HW_USB_CLK_RECOVER_CTRL - USB Clock recovery control |
mbed_official | 146:f64d43ff0c18 | 61 | * - HW_USB_CLK_RECOVER_IRC_EN - IRC48M oscillator enable register |
mbed_official | 146:f64d43ff0c18 | 62 | * - HW_USB_CLK_RECOVER_INT_STATUS - Clock recovery separated interrupt status |
mbed_official | 146:f64d43ff0c18 | 63 | * |
mbed_official | 146:f64d43ff0c18 | 64 | * - hw_usb_t - Struct containing all module registers. |
mbed_official | 146:f64d43ff0c18 | 65 | */ |
mbed_official | 146:f64d43ff0c18 | 66 | |
mbed_official | 146:f64d43ff0c18 | 67 | //! @name Module base addresses |
mbed_official | 146:f64d43ff0c18 | 68 | //@{ |
mbed_official | 146:f64d43ff0c18 | 69 | #ifndef REGS_USB_BASE |
mbed_official | 146:f64d43ff0c18 | 70 | #define HW_USB_INSTANCE_COUNT (1U) //!< Number of instances of the USB module. |
mbed_official | 146:f64d43ff0c18 | 71 | #define REGS_USB_BASE (0x40072000U) //!< Base address for USB0. |
mbed_official | 146:f64d43ff0c18 | 72 | #endif |
mbed_official | 146:f64d43ff0c18 | 73 | //@} |
mbed_official | 146:f64d43ff0c18 | 74 | |
mbed_official | 146:f64d43ff0c18 | 75 | //------------------------------------------------------------------------------------------- |
mbed_official | 146:f64d43ff0c18 | 76 | // HW_USB_PERID - Peripheral ID register |
mbed_official | 146:f64d43ff0c18 | 77 | //------------------------------------------------------------------------------------------- |
mbed_official | 146:f64d43ff0c18 | 78 | |
mbed_official | 146:f64d43ff0c18 | 79 | #ifndef __LANGUAGE_ASM__ |
mbed_official | 146:f64d43ff0c18 | 80 | /*! |
mbed_official | 146:f64d43ff0c18 | 81 | * @brief HW_USB_PERID - Peripheral ID register (RO) |
mbed_official | 146:f64d43ff0c18 | 82 | * |
mbed_official | 146:f64d43ff0c18 | 83 | * Reset value: 0x04U |
mbed_official | 146:f64d43ff0c18 | 84 | * |
mbed_official | 146:f64d43ff0c18 | 85 | * Reads back the value of 0x04. This value is defined for the USB peripheral. |
mbed_official | 146:f64d43ff0c18 | 86 | */ |
mbed_official | 146:f64d43ff0c18 | 87 | typedef union _hw_usb_perid |
mbed_official | 146:f64d43ff0c18 | 88 | { |
mbed_official | 146:f64d43ff0c18 | 89 | uint8_t U; |
mbed_official | 146:f64d43ff0c18 | 90 | struct _hw_usb_perid_bitfields |
mbed_official | 146:f64d43ff0c18 | 91 | { |
mbed_official | 146:f64d43ff0c18 | 92 | uint8_t ID : 6; //!< [5:0] Peripheral Identification |
mbed_official | 146:f64d43ff0c18 | 93 | uint8_t RESERVED0 : 2; //!< [7:6] |
mbed_official | 146:f64d43ff0c18 | 94 | } B; |
mbed_official | 146:f64d43ff0c18 | 95 | } hw_usb_perid_t; |
mbed_official | 146:f64d43ff0c18 | 96 | #endif |
mbed_official | 146:f64d43ff0c18 | 97 | |
mbed_official | 146:f64d43ff0c18 | 98 | /*! |
mbed_official | 146:f64d43ff0c18 | 99 | * @name Constants and macros for entire USB_PERID register |
mbed_official | 146:f64d43ff0c18 | 100 | */ |
mbed_official | 146:f64d43ff0c18 | 101 | //@{ |
mbed_official | 146:f64d43ff0c18 | 102 | #define HW_USB_PERID_ADDR (REGS_USB_BASE + 0x0U) |
mbed_official | 146:f64d43ff0c18 | 103 | |
mbed_official | 146:f64d43ff0c18 | 104 | #ifndef __LANGUAGE_ASM__ |
mbed_official | 146:f64d43ff0c18 | 105 | #define HW_USB_PERID (*(__I hw_usb_perid_t *) HW_USB_PERID_ADDR) |
mbed_official | 146:f64d43ff0c18 | 106 | #define HW_USB_PERID_RD() (HW_USB_PERID.U) |
mbed_official | 146:f64d43ff0c18 | 107 | #endif |
mbed_official | 146:f64d43ff0c18 | 108 | //@} |
mbed_official | 146:f64d43ff0c18 | 109 | |
mbed_official | 146:f64d43ff0c18 | 110 | /* |
mbed_official | 146:f64d43ff0c18 | 111 | * Constants & macros for individual USB_PERID bitfields |
mbed_official | 146:f64d43ff0c18 | 112 | */ |
mbed_official | 146:f64d43ff0c18 | 113 | |
mbed_official | 146:f64d43ff0c18 | 114 | /*! |
mbed_official | 146:f64d43ff0c18 | 115 | * @name Register USB_PERID, field ID[5:0] (RO) |
mbed_official | 146:f64d43ff0c18 | 116 | * |
mbed_official | 146:f64d43ff0c18 | 117 | * This field always reads 0x4h. |
mbed_official | 146:f64d43ff0c18 | 118 | */ |
mbed_official | 146:f64d43ff0c18 | 119 | //@{ |
mbed_official | 146:f64d43ff0c18 | 120 | #define BP_USB_PERID_ID (0U) //!< Bit position for USB_PERID_ID. |
mbed_official | 146:f64d43ff0c18 | 121 | #define BM_USB_PERID_ID (0x3FU) //!< Bit mask for USB_PERID_ID. |
mbed_official | 146:f64d43ff0c18 | 122 | #define BS_USB_PERID_ID (6U) //!< Bit field size in bits for USB_PERID_ID. |
mbed_official | 146:f64d43ff0c18 | 123 | |
mbed_official | 146:f64d43ff0c18 | 124 | #ifndef __LANGUAGE_ASM__ |
mbed_official | 146:f64d43ff0c18 | 125 | //! @brief Read current value of the USB_PERID_ID field. |
mbed_official | 146:f64d43ff0c18 | 126 | #define BR_USB_PERID_ID (HW_USB_PERID.B.ID) |
mbed_official | 146:f64d43ff0c18 | 127 | #endif |
mbed_official | 146:f64d43ff0c18 | 128 | //@} |
mbed_official | 146:f64d43ff0c18 | 129 | |
mbed_official | 146:f64d43ff0c18 | 130 | //------------------------------------------------------------------------------------------- |
mbed_official | 146:f64d43ff0c18 | 131 | // HW_USB_IDCOMP - Peripheral ID Complement register |
mbed_official | 146:f64d43ff0c18 | 132 | //------------------------------------------------------------------------------------------- |
mbed_official | 146:f64d43ff0c18 | 133 | |
mbed_official | 146:f64d43ff0c18 | 134 | #ifndef __LANGUAGE_ASM__ |
mbed_official | 146:f64d43ff0c18 | 135 | /*! |
mbed_official | 146:f64d43ff0c18 | 136 | * @brief HW_USB_IDCOMP - Peripheral ID Complement register (RO) |
mbed_official | 146:f64d43ff0c18 | 137 | * |
mbed_official | 146:f64d43ff0c18 | 138 | * Reset value: 0xFBU |
mbed_official | 146:f64d43ff0c18 | 139 | * |
mbed_official | 146:f64d43ff0c18 | 140 | * Reads back the complement of the Peripheral ID register. For the USB |
mbed_official | 146:f64d43ff0c18 | 141 | * peripheral, the value is 0xFB. |
mbed_official | 146:f64d43ff0c18 | 142 | */ |
mbed_official | 146:f64d43ff0c18 | 143 | typedef union _hw_usb_idcomp |
mbed_official | 146:f64d43ff0c18 | 144 | { |
mbed_official | 146:f64d43ff0c18 | 145 | uint8_t U; |
mbed_official | 146:f64d43ff0c18 | 146 | struct _hw_usb_idcomp_bitfields |
mbed_official | 146:f64d43ff0c18 | 147 | { |
mbed_official | 146:f64d43ff0c18 | 148 | uint8_t NID : 6; //!< [5:0] |
mbed_official | 146:f64d43ff0c18 | 149 | uint8_t RESERVED0 : 2; //!< [7:6] |
mbed_official | 146:f64d43ff0c18 | 150 | } B; |
mbed_official | 146:f64d43ff0c18 | 151 | } hw_usb_idcomp_t; |
mbed_official | 146:f64d43ff0c18 | 152 | #endif |
mbed_official | 146:f64d43ff0c18 | 153 | |
mbed_official | 146:f64d43ff0c18 | 154 | /*! |
mbed_official | 146:f64d43ff0c18 | 155 | * @name Constants and macros for entire USB_IDCOMP register |
mbed_official | 146:f64d43ff0c18 | 156 | */ |
mbed_official | 146:f64d43ff0c18 | 157 | //@{ |
mbed_official | 146:f64d43ff0c18 | 158 | #define HW_USB_IDCOMP_ADDR (REGS_USB_BASE + 0x4U) |
mbed_official | 146:f64d43ff0c18 | 159 | |
mbed_official | 146:f64d43ff0c18 | 160 | #ifndef __LANGUAGE_ASM__ |
mbed_official | 146:f64d43ff0c18 | 161 | #define HW_USB_IDCOMP (*(__I hw_usb_idcomp_t *) HW_USB_IDCOMP_ADDR) |
mbed_official | 146:f64d43ff0c18 | 162 | #define HW_USB_IDCOMP_RD() (HW_USB_IDCOMP.U) |
mbed_official | 146:f64d43ff0c18 | 163 | #endif |
mbed_official | 146:f64d43ff0c18 | 164 | //@} |
mbed_official | 146:f64d43ff0c18 | 165 | |
mbed_official | 146:f64d43ff0c18 | 166 | /* |
mbed_official | 146:f64d43ff0c18 | 167 | * Constants & macros for individual USB_IDCOMP bitfields |
mbed_official | 146:f64d43ff0c18 | 168 | */ |
mbed_official | 146:f64d43ff0c18 | 169 | |
mbed_official | 146:f64d43ff0c18 | 170 | /*! |
mbed_official | 146:f64d43ff0c18 | 171 | * @name Register USB_IDCOMP, field NID[5:0] (RO) |
mbed_official | 146:f64d43ff0c18 | 172 | * |
mbed_official | 146:f64d43ff0c18 | 173 | * Ones' complement of PERID[ID]. bits. |
mbed_official | 146:f64d43ff0c18 | 174 | */ |
mbed_official | 146:f64d43ff0c18 | 175 | //@{ |
mbed_official | 146:f64d43ff0c18 | 176 | #define BP_USB_IDCOMP_NID (0U) //!< Bit position for USB_IDCOMP_NID. |
mbed_official | 146:f64d43ff0c18 | 177 | #define BM_USB_IDCOMP_NID (0x3FU) //!< Bit mask for USB_IDCOMP_NID. |
mbed_official | 146:f64d43ff0c18 | 178 | #define BS_USB_IDCOMP_NID (6U) //!< Bit field size in bits for USB_IDCOMP_NID. |
mbed_official | 146:f64d43ff0c18 | 179 | |
mbed_official | 146:f64d43ff0c18 | 180 | #ifndef __LANGUAGE_ASM__ |
mbed_official | 146:f64d43ff0c18 | 181 | //! @brief Read current value of the USB_IDCOMP_NID field. |
mbed_official | 146:f64d43ff0c18 | 182 | #define BR_USB_IDCOMP_NID (HW_USB_IDCOMP.B.NID) |
mbed_official | 146:f64d43ff0c18 | 183 | #endif |
mbed_official | 146:f64d43ff0c18 | 184 | //@} |
mbed_official | 146:f64d43ff0c18 | 185 | |
mbed_official | 146:f64d43ff0c18 | 186 | //------------------------------------------------------------------------------------------- |
mbed_official | 146:f64d43ff0c18 | 187 | // HW_USB_REV - Peripheral Revision register |
mbed_official | 146:f64d43ff0c18 | 188 | //------------------------------------------------------------------------------------------- |
mbed_official | 146:f64d43ff0c18 | 189 | |
mbed_official | 146:f64d43ff0c18 | 190 | #ifndef __LANGUAGE_ASM__ |
mbed_official | 146:f64d43ff0c18 | 191 | /*! |
mbed_official | 146:f64d43ff0c18 | 192 | * @brief HW_USB_REV - Peripheral Revision register (RO) |
mbed_official | 146:f64d43ff0c18 | 193 | * |
mbed_official | 146:f64d43ff0c18 | 194 | * Reset value: 0x33U |
mbed_official | 146:f64d43ff0c18 | 195 | * |
mbed_official | 146:f64d43ff0c18 | 196 | * Contains the revision number of the USB module. |
mbed_official | 146:f64d43ff0c18 | 197 | */ |
mbed_official | 146:f64d43ff0c18 | 198 | typedef union _hw_usb_rev |
mbed_official | 146:f64d43ff0c18 | 199 | { |
mbed_official | 146:f64d43ff0c18 | 200 | uint8_t U; |
mbed_official | 146:f64d43ff0c18 | 201 | struct _hw_usb_rev_bitfields |
mbed_official | 146:f64d43ff0c18 | 202 | { |
mbed_official | 146:f64d43ff0c18 | 203 | uint8_t REV : 8; //!< [7:0] Revision |
mbed_official | 146:f64d43ff0c18 | 204 | } B; |
mbed_official | 146:f64d43ff0c18 | 205 | } hw_usb_rev_t; |
mbed_official | 146:f64d43ff0c18 | 206 | #endif |
mbed_official | 146:f64d43ff0c18 | 207 | |
mbed_official | 146:f64d43ff0c18 | 208 | /*! |
mbed_official | 146:f64d43ff0c18 | 209 | * @name Constants and macros for entire USB_REV register |
mbed_official | 146:f64d43ff0c18 | 210 | */ |
mbed_official | 146:f64d43ff0c18 | 211 | //@{ |
mbed_official | 146:f64d43ff0c18 | 212 | #define HW_USB_REV_ADDR (REGS_USB_BASE + 0x8U) |
mbed_official | 146:f64d43ff0c18 | 213 | |
mbed_official | 146:f64d43ff0c18 | 214 | #ifndef __LANGUAGE_ASM__ |
mbed_official | 146:f64d43ff0c18 | 215 | #define HW_USB_REV (*(__I hw_usb_rev_t *) HW_USB_REV_ADDR) |
mbed_official | 146:f64d43ff0c18 | 216 | #define HW_USB_REV_RD() (HW_USB_REV.U) |
mbed_official | 146:f64d43ff0c18 | 217 | #endif |
mbed_official | 146:f64d43ff0c18 | 218 | //@} |
mbed_official | 146:f64d43ff0c18 | 219 | |
mbed_official | 146:f64d43ff0c18 | 220 | /* |
mbed_official | 146:f64d43ff0c18 | 221 | * Constants & macros for individual USB_REV bitfields |
mbed_official | 146:f64d43ff0c18 | 222 | */ |
mbed_official | 146:f64d43ff0c18 | 223 | |
mbed_official | 146:f64d43ff0c18 | 224 | /*! |
mbed_official | 146:f64d43ff0c18 | 225 | * @name Register USB_REV, field REV[7:0] (RO) |
mbed_official | 146:f64d43ff0c18 | 226 | * |
mbed_official | 146:f64d43ff0c18 | 227 | * Indicates the revision number of the USB Core. |
mbed_official | 146:f64d43ff0c18 | 228 | */ |
mbed_official | 146:f64d43ff0c18 | 229 | //@{ |
mbed_official | 146:f64d43ff0c18 | 230 | #define BP_USB_REV_REV (0U) //!< Bit position for USB_REV_REV. |
mbed_official | 146:f64d43ff0c18 | 231 | #define BM_USB_REV_REV (0xFFU) //!< Bit mask for USB_REV_REV. |
mbed_official | 146:f64d43ff0c18 | 232 | #define BS_USB_REV_REV (8U) //!< Bit field size in bits for USB_REV_REV. |
mbed_official | 146:f64d43ff0c18 | 233 | |
mbed_official | 146:f64d43ff0c18 | 234 | #ifndef __LANGUAGE_ASM__ |
mbed_official | 146:f64d43ff0c18 | 235 | //! @brief Read current value of the USB_REV_REV field. |
mbed_official | 146:f64d43ff0c18 | 236 | #define BR_USB_REV_REV (HW_USB_REV.U) |
mbed_official | 146:f64d43ff0c18 | 237 | #endif |
mbed_official | 146:f64d43ff0c18 | 238 | //@} |
mbed_official | 146:f64d43ff0c18 | 239 | |
mbed_official | 146:f64d43ff0c18 | 240 | //------------------------------------------------------------------------------------------- |
mbed_official | 146:f64d43ff0c18 | 241 | // HW_USB_ADDINFO - Peripheral Additional Info register |
mbed_official | 146:f64d43ff0c18 | 242 | //------------------------------------------------------------------------------------------- |
mbed_official | 146:f64d43ff0c18 | 243 | |
mbed_official | 146:f64d43ff0c18 | 244 | #ifndef __LANGUAGE_ASM__ |
mbed_official | 146:f64d43ff0c18 | 245 | /*! |
mbed_official | 146:f64d43ff0c18 | 246 | * @brief HW_USB_ADDINFO - Peripheral Additional Info register (RO) |
mbed_official | 146:f64d43ff0c18 | 247 | * |
mbed_official | 146:f64d43ff0c18 | 248 | * Reset value: 0x01U |
mbed_official | 146:f64d43ff0c18 | 249 | * |
mbed_official | 146:f64d43ff0c18 | 250 | * Reads back the value of the fixed Interrupt Request Level (IRQNUM) along with |
mbed_official | 146:f64d43ff0c18 | 251 | * the Host Enable bit. |
mbed_official | 146:f64d43ff0c18 | 252 | */ |
mbed_official | 146:f64d43ff0c18 | 253 | typedef union _hw_usb_addinfo |
mbed_official | 146:f64d43ff0c18 | 254 | { |
mbed_official | 146:f64d43ff0c18 | 255 | uint8_t U; |
mbed_official | 146:f64d43ff0c18 | 256 | struct _hw_usb_addinfo_bitfields |
mbed_official | 146:f64d43ff0c18 | 257 | { |
mbed_official | 146:f64d43ff0c18 | 258 | uint8_t IEHOST : 1; //!< [0] |
mbed_official | 146:f64d43ff0c18 | 259 | uint8_t RESERVED0 : 2; //!< [2:1] |
mbed_official | 146:f64d43ff0c18 | 260 | uint8_t IRQNUM : 5; //!< [7:3] Assigned Interrupt Request Number |
mbed_official | 146:f64d43ff0c18 | 261 | } B; |
mbed_official | 146:f64d43ff0c18 | 262 | } hw_usb_addinfo_t; |
mbed_official | 146:f64d43ff0c18 | 263 | #endif |
mbed_official | 146:f64d43ff0c18 | 264 | |
mbed_official | 146:f64d43ff0c18 | 265 | /*! |
mbed_official | 146:f64d43ff0c18 | 266 | * @name Constants and macros for entire USB_ADDINFO register |
mbed_official | 146:f64d43ff0c18 | 267 | */ |
mbed_official | 146:f64d43ff0c18 | 268 | //@{ |
mbed_official | 146:f64d43ff0c18 | 269 | #define HW_USB_ADDINFO_ADDR (REGS_USB_BASE + 0xCU) |
mbed_official | 146:f64d43ff0c18 | 270 | |
mbed_official | 146:f64d43ff0c18 | 271 | #ifndef __LANGUAGE_ASM__ |
mbed_official | 146:f64d43ff0c18 | 272 | #define HW_USB_ADDINFO (*(__I hw_usb_addinfo_t *) HW_USB_ADDINFO_ADDR) |
mbed_official | 146:f64d43ff0c18 | 273 | #define HW_USB_ADDINFO_RD() (HW_USB_ADDINFO.U) |
mbed_official | 146:f64d43ff0c18 | 274 | #endif |
mbed_official | 146:f64d43ff0c18 | 275 | //@} |
mbed_official | 146:f64d43ff0c18 | 276 | |
mbed_official | 146:f64d43ff0c18 | 277 | /* |
mbed_official | 146:f64d43ff0c18 | 278 | * Constants & macros for individual USB_ADDINFO bitfields |
mbed_official | 146:f64d43ff0c18 | 279 | */ |
mbed_official | 146:f64d43ff0c18 | 280 | |
mbed_official | 146:f64d43ff0c18 | 281 | /*! |
mbed_official | 146:f64d43ff0c18 | 282 | * @name Register USB_ADDINFO, field IEHOST[0] (RO) |
mbed_official | 146:f64d43ff0c18 | 283 | * |
mbed_official | 146:f64d43ff0c18 | 284 | * This bit is set if host mode is enabled. |
mbed_official | 146:f64d43ff0c18 | 285 | */ |
mbed_official | 146:f64d43ff0c18 | 286 | //@{ |
mbed_official | 146:f64d43ff0c18 | 287 | #define BP_USB_ADDINFO_IEHOST (0U) //!< Bit position for USB_ADDINFO_IEHOST. |
mbed_official | 146:f64d43ff0c18 | 288 | #define BM_USB_ADDINFO_IEHOST (0x01U) //!< Bit mask for USB_ADDINFO_IEHOST. |
mbed_official | 146:f64d43ff0c18 | 289 | #define BS_USB_ADDINFO_IEHOST (1U) //!< Bit field size in bits for USB_ADDINFO_IEHOST. |
mbed_official | 146:f64d43ff0c18 | 290 | |
mbed_official | 146:f64d43ff0c18 | 291 | #ifndef __LANGUAGE_ASM__ |
mbed_official | 146:f64d43ff0c18 | 292 | //! @brief Read current value of the USB_ADDINFO_IEHOST field. |
mbed_official | 146:f64d43ff0c18 | 293 | #define BR_USB_ADDINFO_IEHOST (BITBAND_ACCESS8(HW_USB_ADDINFO_ADDR, BP_USB_ADDINFO_IEHOST)) |
mbed_official | 146:f64d43ff0c18 | 294 | #endif |
mbed_official | 146:f64d43ff0c18 | 295 | //@} |
mbed_official | 146:f64d43ff0c18 | 296 | |
mbed_official | 146:f64d43ff0c18 | 297 | /*! |
mbed_official | 146:f64d43ff0c18 | 298 | * @name Register USB_ADDINFO, field IRQNUM[7:3] (RO) |
mbed_official | 146:f64d43ff0c18 | 299 | */ |
mbed_official | 146:f64d43ff0c18 | 300 | //@{ |
mbed_official | 146:f64d43ff0c18 | 301 | #define BP_USB_ADDINFO_IRQNUM (3U) //!< Bit position for USB_ADDINFO_IRQNUM. |
mbed_official | 146:f64d43ff0c18 | 302 | #define BM_USB_ADDINFO_IRQNUM (0xF8U) //!< Bit mask for USB_ADDINFO_IRQNUM. |
mbed_official | 146:f64d43ff0c18 | 303 | #define BS_USB_ADDINFO_IRQNUM (5U) //!< Bit field size in bits for USB_ADDINFO_IRQNUM. |
mbed_official | 146:f64d43ff0c18 | 304 | |
mbed_official | 146:f64d43ff0c18 | 305 | #ifndef __LANGUAGE_ASM__ |
mbed_official | 146:f64d43ff0c18 | 306 | //! @brief Read current value of the USB_ADDINFO_IRQNUM field. |
mbed_official | 146:f64d43ff0c18 | 307 | #define BR_USB_ADDINFO_IRQNUM (HW_USB_ADDINFO.B.IRQNUM) |
mbed_official | 146:f64d43ff0c18 | 308 | #endif |
mbed_official | 146:f64d43ff0c18 | 309 | //@} |
mbed_official | 146:f64d43ff0c18 | 310 | |
mbed_official | 146:f64d43ff0c18 | 311 | //------------------------------------------------------------------------------------------- |
mbed_official | 146:f64d43ff0c18 | 312 | // HW_USB_OTGISTAT - OTG Interrupt Status register |
mbed_official | 146:f64d43ff0c18 | 313 | //------------------------------------------------------------------------------------------- |
mbed_official | 146:f64d43ff0c18 | 314 | |
mbed_official | 146:f64d43ff0c18 | 315 | #ifndef __LANGUAGE_ASM__ |
mbed_official | 146:f64d43ff0c18 | 316 | /*! |
mbed_official | 146:f64d43ff0c18 | 317 | * @brief HW_USB_OTGISTAT - OTG Interrupt Status register (RW) |
mbed_official | 146:f64d43ff0c18 | 318 | * |
mbed_official | 146:f64d43ff0c18 | 319 | * Reset value: 0x00U |
mbed_official | 146:f64d43ff0c18 | 320 | * |
mbed_official | 146:f64d43ff0c18 | 321 | * Records changes of the ID sense and VBUS signals. Software can read this |
mbed_official | 146:f64d43ff0c18 | 322 | * register to determine the event that triggers an interrupt. Only bits that have |
mbed_official | 146:f64d43ff0c18 | 323 | * changed since the last software read are set. Writing a one to a bit clears the |
mbed_official | 146:f64d43ff0c18 | 324 | * associated interrupt. |
mbed_official | 146:f64d43ff0c18 | 325 | */ |
mbed_official | 146:f64d43ff0c18 | 326 | typedef union _hw_usb_otgistat |
mbed_official | 146:f64d43ff0c18 | 327 | { |
mbed_official | 146:f64d43ff0c18 | 328 | uint8_t U; |
mbed_official | 146:f64d43ff0c18 | 329 | struct _hw_usb_otgistat_bitfields |
mbed_official | 146:f64d43ff0c18 | 330 | { |
mbed_official | 146:f64d43ff0c18 | 331 | uint8_t AVBUSCHG : 1; //!< [0] |
mbed_official | 146:f64d43ff0c18 | 332 | uint8_t RESERVED0 : 1; //!< [1] |
mbed_official | 146:f64d43ff0c18 | 333 | uint8_t B_SESS_CHG : 1; //!< [2] |
mbed_official | 146:f64d43ff0c18 | 334 | uint8_t SESSVLDCHG : 1; //!< [3] |
mbed_official | 146:f64d43ff0c18 | 335 | uint8_t RESERVED1 : 1; //!< [4] |
mbed_official | 146:f64d43ff0c18 | 336 | uint8_t LINE_STATE_CHG : 1; //!< [5] |
mbed_official | 146:f64d43ff0c18 | 337 | uint8_t ONEMSEC : 1; //!< [6] |
mbed_official | 146:f64d43ff0c18 | 338 | uint8_t IDCHG : 1; //!< [7] |
mbed_official | 146:f64d43ff0c18 | 339 | } B; |
mbed_official | 146:f64d43ff0c18 | 340 | } hw_usb_otgistat_t; |
mbed_official | 146:f64d43ff0c18 | 341 | #endif |
mbed_official | 146:f64d43ff0c18 | 342 | |
mbed_official | 146:f64d43ff0c18 | 343 | /*! |
mbed_official | 146:f64d43ff0c18 | 344 | * @name Constants and macros for entire USB_OTGISTAT register |
mbed_official | 146:f64d43ff0c18 | 345 | */ |
mbed_official | 146:f64d43ff0c18 | 346 | //@{ |
mbed_official | 146:f64d43ff0c18 | 347 | #define HW_USB_OTGISTAT_ADDR (REGS_USB_BASE + 0x10U) |
mbed_official | 146:f64d43ff0c18 | 348 | |
mbed_official | 146:f64d43ff0c18 | 349 | #ifndef __LANGUAGE_ASM__ |
mbed_official | 146:f64d43ff0c18 | 350 | #define HW_USB_OTGISTAT (*(__IO hw_usb_otgistat_t *) HW_USB_OTGISTAT_ADDR) |
mbed_official | 146:f64d43ff0c18 | 351 | #define HW_USB_OTGISTAT_RD() (HW_USB_OTGISTAT.U) |
mbed_official | 146:f64d43ff0c18 | 352 | #define HW_USB_OTGISTAT_WR(v) (HW_USB_OTGISTAT.U = (v)) |
mbed_official | 146:f64d43ff0c18 | 353 | #define HW_USB_OTGISTAT_SET(v) (HW_USB_OTGISTAT_WR(HW_USB_OTGISTAT_RD() | (v))) |
mbed_official | 146:f64d43ff0c18 | 354 | #define HW_USB_OTGISTAT_CLR(v) (HW_USB_OTGISTAT_WR(HW_USB_OTGISTAT_RD() & ~(v))) |
mbed_official | 146:f64d43ff0c18 | 355 | #define HW_USB_OTGISTAT_TOG(v) (HW_USB_OTGISTAT_WR(HW_USB_OTGISTAT_RD() ^ (v))) |
mbed_official | 146:f64d43ff0c18 | 356 | #endif |
mbed_official | 146:f64d43ff0c18 | 357 | //@} |
mbed_official | 146:f64d43ff0c18 | 358 | |
mbed_official | 146:f64d43ff0c18 | 359 | /* |
mbed_official | 146:f64d43ff0c18 | 360 | * Constants & macros for individual USB_OTGISTAT bitfields |
mbed_official | 146:f64d43ff0c18 | 361 | */ |
mbed_official | 146:f64d43ff0c18 | 362 | |
mbed_official | 146:f64d43ff0c18 | 363 | /*! |
mbed_official | 146:f64d43ff0c18 | 364 | * @name Register USB_OTGISTAT, field AVBUSCHG[0] (RW) |
mbed_official | 146:f64d43ff0c18 | 365 | * |
mbed_official | 146:f64d43ff0c18 | 366 | * This bit is set when a change in VBUS is detected on an A device. |
mbed_official | 146:f64d43ff0c18 | 367 | */ |
mbed_official | 146:f64d43ff0c18 | 368 | //@{ |
mbed_official | 146:f64d43ff0c18 | 369 | #define BP_USB_OTGISTAT_AVBUSCHG (0U) //!< Bit position for USB_OTGISTAT_AVBUSCHG. |
mbed_official | 146:f64d43ff0c18 | 370 | #define BM_USB_OTGISTAT_AVBUSCHG (0x01U) //!< Bit mask for USB_OTGISTAT_AVBUSCHG. |
mbed_official | 146:f64d43ff0c18 | 371 | #define BS_USB_OTGISTAT_AVBUSCHG (1U) //!< Bit field size in bits for USB_OTGISTAT_AVBUSCHG. |
mbed_official | 146:f64d43ff0c18 | 372 | |
mbed_official | 146:f64d43ff0c18 | 373 | #ifndef __LANGUAGE_ASM__ |
mbed_official | 146:f64d43ff0c18 | 374 | //! @brief Read current value of the USB_OTGISTAT_AVBUSCHG field. |
mbed_official | 146:f64d43ff0c18 | 375 | #define BR_USB_OTGISTAT_AVBUSCHG (BITBAND_ACCESS8(HW_USB_OTGISTAT_ADDR, BP_USB_OTGISTAT_AVBUSCHG)) |
mbed_official | 146:f64d43ff0c18 | 376 | #endif |
mbed_official | 146:f64d43ff0c18 | 377 | |
mbed_official | 146:f64d43ff0c18 | 378 | //! @brief Format value for bitfield USB_OTGISTAT_AVBUSCHG. |
mbed_official | 146:f64d43ff0c18 | 379 | #define BF_USB_OTGISTAT_AVBUSCHG(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint8_t) << BP_USB_OTGISTAT_AVBUSCHG), uint8_t) & BM_USB_OTGISTAT_AVBUSCHG) |
mbed_official | 146:f64d43ff0c18 | 380 | |
mbed_official | 146:f64d43ff0c18 | 381 | #ifndef __LANGUAGE_ASM__ |
mbed_official | 146:f64d43ff0c18 | 382 | //! @brief Set the AVBUSCHG field to a new value. |
mbed_official | 146:f64d43ff0c18 | 383 | #define BW_USB_OTGISTAT_AVBUSCHG(v) (BITBAND_ACCESS8(HW_USB_OTGISTAT_ADDR, BP_USB_OTGISTAT_AVBUSCHG) = (v)) |
mbed_official | 146:f64d43ff0c18 | 384 | #endif |
mbed_official | 146:f64d43ff0c18 | 385 | //@} |
mbed_official | 146:f64d43ff0c18 | 386 | |
mbed_official | 146:f64d43ff0c18 | 387 | /*! |
mbed_official | 146:f64d43ff0c18 | 388 | * @name Register USB_OTGISTAT, field B_SESS_CHG[2] (RW) |
mbed_official | 146:f64d43ff0c18 | 389 | * |
mbed_official | 146:f64d43ff0c18 | 390 | * This bit is set when a change in VBUS is detected on a B device. |
mbed_official | 146:f64d43ff0c18 | 391 | */ |
mbed_official | 146:f64d43ff0c18 | 392 | //@{ |
mbed_official | 146:f64d43ff0c18 | 393 | #define BP_USB_OTGISTAT_B_SESS_CHG (2U) //!< Bit position for USB_OTGISTAT_B_SESS_CHG. |
mbed_official | 146:f64d43ff0c18 | 394 | #define BM_USB_OTGISTAT_B_SESS_CHG (0x04U) //!< Bit mask for USB_OTGISTAT_B_SESS_CHG. |
mbed_official | 146:f64d43ff0c18 | 395 | #define BS_USB_OTGISTAT_B_SESS_CHG (1U) //!< Bit field size in bits for USB_OTGISTAT_B_SESS_CHG. |
mbed_official | 146:f64d43ff0c18 | 396 | |
mbed_official | 146:f64d43ff0c18 | 397 | #ifndef __LANGUAGE_ASM__ |
mbed_official | 146:f64d43ff0c18 | 398 | //! @brief Read current value of the USB_OTGISTAT_B_SESS_CHG field. |
mbed_official | 146:f64d43ff0c18 | 399 | #define BR_USB_OTGISTAT_B_SESS_CHG (BITBAND_ACCESS8(HW_USB_OTGISTAT_ADDR, BP_USB_OTGISTAT_B_SESS_CHG)) |
mbed_official | 146:f64d43ff0c18 | 400 | #endif |
mbed_official | 146:f64d43ff0c18 | 401 | |
mbed_official | 146:f64d43ff0c18 | 402 | //! @brief Format value for bitfield USB_OTGISTAT_B_SESS_CHG. |
mbed_official | 146:f64d43ff0c18 | 403 | #define BF_USB_OTGISTAT_B_SESS_CHG(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint8_t) << BP_USB_OTGISTAT_B_SESS_CHG), uint8_t) & BM_USB_OTGISTAT_B_SESS_CHG) |
mbed_official | 146:f64d43ff0c18 | 404 | |
mbed_official | 146:f64d43ff0c18 | 405 | #ifndef __LANGUAGE_ASM__ |
mbed_official | 146:f64d43ff0c18 | 406 | //! @brief Set the B_SESS_CHG field to a new value. |
mbed_official | 146:f64d43ff0c18 | 407 | #define BW_USB_OTGISTAT_B_SESS_CHG(v) (BITBAND_ACCESS8(HW_USB_OTGISTAT_ADDR, BP_USB_OTGISTAT_B_SESS_CHG) = (v)) |
mbed_official | 146:f64d43ff0c18 | 408 | #endif |
mbed_official | 146:f64d43ff0c18 | 409 | //@} |
mbed_official | 146:f64d43ff0c18 | 410 | |
mbed_official | 146:f64d43ff0c18 | 411 | /*! |
mbed_official | 146:f64d43ff0c18 | 412 | * @name Register USB_OTGISTAT, field SESSVLDCHG[3] (RW) |
mbed_official | 146:f64d43ff0c18 | 413 | * |
mbed_official | 146:f64d43ff0c18 | 414 | * This bit is set when a change in VBUS is detected indicating a session valid |
mbed_official | 146:f64d43ff0c18 | 415 | * or a session no longer valid. |
mbed_official | 146:f64d43ff0c18 | 416 | */ |
mbed_official | 146:f64d43ff0c18 | 417 | //@{ |
mbed_official | 146:f64d43ff0c18 | 418 | #define BP_USB_OTGISTAT_SESSVLDCHG (3U) //!< Bit position for USB_OTGISTAT_SESSVLDCHG. |
mbed_official | 146:f64d43ff0c18 | 419 | #define BM_USB_OTGISTAT_SESSVLDCHG (0x08U) //!< Bit mask for USB_OTGISTAT_SESSVLDCHG. |
mbed_official | 146:f64d43ff0c18 | 420 | #define BS_USB_OTGISTAT_SESSVLDCHG (1U) //!< Bit field size in bits for USB_OTGISTAT_SESSVLDCHG. |
mbed_official | 146:f64d43ff0c18 | 421 | |
mbed_official | 146:f64d43ff0c18 | 422 | #ifndef __LANGUAGE_ASM__ |
mbed_official | 146:f64d43ff0c18 | 423 | //! @brief Read current value of the USB_OTGISTAT_SESSVLDCHG field. |
mbed_official | 146:f64d43ff0c18 | 424 | #define BR_USB_OTGISTAT_SESSVLDCHG (BITBAND_ACCESS8(HW_USB_OTGISTAT_ADDR, BP_USB_OTGISTAT_SESSVLDCHG)) |
mbed_official | 146:f64d43ff0c18 | 425 | #endif |
mbed_official | 146:f64d43ff0c18 | 426 | |
mbed_official | 146:f64d43ff0c18 | 427 | //! @brief Format value for bitfield USB_OTGISTAT_SESSVLDCHG. |
mbed_official | 146:f64d43ff0c18 | 428 | #define BF_USB_OTGISTAT_SESSVLDCHG(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint8_t) << BP_USB_OTGISTAT_SESSVLDCHG), uint8_t) & BM_USB_OTGISTAT_SESSVLDCHG) |
mbed_official | 146:f64d43ff0c18 | 429 | |
mbed_official | 146:f64d43ff0c18 | 430 | #ifndef __LANGUAGE_ASM__ |
mbed_official | 146:f64d43ff0c18 | 431 | //! @brief Set the SESSVLDCHG field to a new value. |
mbed_official | 146:f64d43ff0c18 | 432 | #define BW_USB_OTGISTAT_SESSVLDCHG(v) (BITBAND_ACCESS8(HW_USB_OTGISTAT_ADDR, BP_USB_OTGISTAT_SESSVLDCHG) = (v)) |
mbed_official | 146:f64d43ff0c18 | 433 | #endif |
mbed_official | 146:f64d43ff0c18 | 434 | //@} |
mbed_official | 146:f64d43ff0c18 | 435 | |
mbed_official | 146:f64d43ff0c18 | 436 | /*! |
mbed_official | 146:f64d43ff0c18 | 437 | * @name Register USB_OTGISTAT, field LINE_STATE_CHG[5] (RW) |
mbed_official | 146:f64d43ff0c18 | 438 | * |
mbed_official | 146:f64d43ff0c18 | 439 | * This interrupt is set when the USB line state (CTL[SE0] and CTL[JSTATE] bits) |
mbed_official | 146:f64d43ff0c18 | 440 | * are stable without change for 1 millisecond, and the value of the line state |
mbed_official | 146:f64d43ff0c18 | 441 | * is different from the last time when the line state was stable. It is set on |
mbed_official | 146:f64d43ff0c18 | 442 | * transitions between SE0 and J-state, SE0 and K-state, and J-state and K-state. |
mbed_official | 146:f64d43ff0c18 | 443 | * Changes in J-state while SE0 is true do not cause an interrupt. This interrupt |
mbed_official | 146:f64d43ff0c18 | 444 | * can be used in detecting Reset, Resume, Connect, and Data Line Pulse |
mbed_official | 146:f64d43ff0c18 | 445 | * signaling. |
mbed_official | 146:f64d43ff0c18 | 446 | */ |
mbed_official | 146:f64d43ff0c18 | 447 | //@{ |
mbed_official | 146:f64d43ff0c18 | 448 | #define BP_USB_OTGISTAT_LINE_STATE_CHG (5U) //!< Bit position for USB_OTGISTAT_LINE_STATE_CHG. |
mbed_official | 146:f64d43ff0c18 | 449 | #define BM_USB_OTGISTAT_LINE_STATE_CHG (0x20U) //!< Bit mask for USB_OTGISTAT_LINE_STATE_CHG. |
mbed_official | 146:f64d43ff0c18 | 450 | #define BS_USB_OTGISTAT_LINE_STATE_CHG (1U) //!< Bit field size in bits for USB_OTGISTAT_LINE_STATE_CHG. |
mbed_official | 146:f64d43ff0c18 | 451 | |
mbed_official | 146:f64d43ff0c18 | 452 | #ifndef __LANGUAGE_ASM__ |
mbed_official | 146:f64d43ff0c18 | 453 | //! @brief Read current value of the USB_OTGISTAT_LINE_STATE_CHG field. |
mbed_official | 146:f64d43ff0c18 | 454 | #define BR_USB_OTGISTAT_LINE_STATE_CHG (BITBAND_ACCESS8(HW_USB_OTGISTAT_ADDR, BP_USB_OTGISTAT_LINE_STATE_CHG)) |
mbed_official | 146:f64d43ff0c18 | 455 | #endif |
mbed_official | 146:f64d43ff0c18 | 456 | |
mbed_official | 146:f64d43ff0c18 | 457 | //! @brief Format value for bitfield USB_OTGISTAT_LINE_STATE_CHG. |
mbed_official | 146:f64d43ff0c18 | 458 | #define BF_USB_OTGISTAT_LINE_STATE_CHG(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint8_t) << BP_USB_OTGISTAT_LINE_STATE_CHG), uint8_t) & BM_USB_OTGISTAT_LINE_STATE_CHG) |
mbed_official | 146:f64d43ff0c18 | 459 | |
mbed_official | 146:f64d43ff0c18 | 460 | #ifndef __LANGUAGE_ASM__ |
mbed_official | 146:f64d43ff0c18 | 461 | //! @brief Set the LINE_STATE_CHG field to a new value. |
mbed_official | 146:f64d43ff0c18 | 462 | #define BW_USB_OTGISTAT_LINE_STATE_CHG(v) (BITBAND_ACCESS8(HW_USB_OTGISTAT_ADDR, BP_USB_OTGISTAT_LINE_STATE_CHG) = (v)) |
mbed_official | 146:f64d43ff0c18 | 463 | #endif |
mbed_official | 146:f64d43ff0c18 | 464 | //@} |
mbed_official | 146:f64d43ff0c18 | 465 | |
mbed_official | 146:f64d43ff0c18 | 466 | /*! |
mbed_official | 146:f64d43ff0c18 | 467 | * @name Register USB_OTGISTAT, field ONEMSEC[6] (RW) |
mbed_official | 146:f64d43ff0c18 | 468 | * |
mbed_official | 146:f64d43ff0c18 | 469 | * This bit is set when the 1 millisecond timer expires. This bit stays asserted |
mbed_official | 146:f64d43ff0c18 | 470 | * until cleared by software. The interrupt must be serviced every millisecond |
mbed_official | 146:f64d43ff0c18 | 471 | * to avoid losing 1msec counts. |
mbed_official | 146:f64d43ff0c18 | 472 | */ |
mbed_official | 146:f64d43ff0c18 | 473 | //@{ |
mbed_official | 146:f64d43ff0c18 | 474 | #define BP_USB_OTGISTAT_ONEMSEC (6U) //!< Bit position for USB_OTGISTAT_ONEMSEC. |
mbed_official | 146:f64d43ff0c18 | 475 | #define BM_USB_OTGISTAT_ONEMSEC (0x40U) //!< Bit mask for USB_OTGISTAT_ONEMSEC. |
mbed_official | 146:f64d43ff0c18 | 476 | #define BS_USB_OTGISTAT_ONEMSEC (1U) //!< Bit field size in bits for USB_OTGISTAT_ONEMSEC. |
mbed_official | 146:f64d43ff0c18 | 477 | |
mbed_official | 146:f64d43ff0c18 | 478 | #ifndef __LANGUAGE_ASM__ |
mbed_official | 146:f64d43ff0c18 | 479 | //! @brief Read current value of the USB_OTGISTAT_ONEMSEC field. |
mbed_official | 146:f64d43ff0c18 | 480 | #define BR_USB_OTGISTAT_ONEMSEC (BITBAND_ACCESS8(HW_USB_OTGISTAT_ADDR, BP_USB_OTGISTAT_ONEMSEC)) |
mbed_official | 146:f64d43ff0c18 | 481 | #endif |
mbed_official | 146:f64d43ff0c18 | 482 | |
mbed_official | 146:f64d43ff0c18 | 483 | //! @brief Format value for bitfield USB_OTGISTAT_ONEMSEC. |
mbed_official | 146:f64d43ff0c18 | 484 | #define BF_USB_OTGISTAT_ONEMSEC(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint8_t) << BP_USB_OTGISTAT_ONEMSEC), uint8_t) & BM_USB_OTGISTAT_ONEMSEC) |
mbed_official | 146:f64d43ff0c18 | 485 | |
mbed_official | 146:f64d43ff0c18 | 486 | #ifndef __LANGUAGE_ASM__ |
mbed_official | 146:f64d43ff0c18 | 487 | //! @brief Set the ONEMSEC field to a new value. |
mbed_official | 146:f64d43ff0c18 | 488 | #define BW_USB_OTGISTAT_ONEMSEC(v) (BITBAND_ACCESS8(HW_USB_OTGISTAT_ADDR, BP_USB_OTGISTAT_ONEMSEC) = (v)) |
mbed_official | 146:f64d43ff0c18 | 489 | #endif |
mbed_official | 146:f64d43ff0c18 | 490 | //@} |
mbed_official | 146:f64d43ff0c18 | 491 | |
mbed_official | 146:f64d43ff0c18 | 492 | /*! |
mbed_official | 146:f64d43ff0c18 | 493 | * @name Register USB_OTGISTAT, field IDCHG[7] (RW) |
mbed_official | 146:f64d43ff0c18 | 494 | * |
mbed_official | 146:f64d43ff0c18 | 495 | * This bit is set when a change in the ID Signal from the USB connector is |
mbed_official | 146:f64d43ff0c18 | 496 | * sensed. |
mbed_official | 146:f64d43ff0c18 | 497 | */ |
mbed_official | 146:f64d43ff0c18 | 498 | //@{ |
mbed_official | 146:f64d43ff0c18 | 499 | #define BP_USB_OTGISTAT_IDCHG (7U) //!< Bit position for USB_OTGISTAT_IDCHG. |
mbed_official | 146:f64d43ff0c18 | 500 | #define BM_USB_OTGISTAT_IDCHG (0x80U) //!< Bit mask for USB_OTGISTAT_IDCHG. |
mbed_official | 146:f64d43ff0c18 | 501 | #define BS_USB_OTGISTAT_IDCHG (1U) //!< Bit field size in bits for USB_OTGISTAT_IDCHG. |
mbed_official | 146:f64d43ff0c18 | 502 | |
mbed_official | 146:f64d43ff0c18 | 503 | #ifndef __LANGUAGE_ASM__ |
mbed_official | 146:f64d43ff0c18 | 504 | //! @brief Read current value of the USB_OTGISTAT_IDCHG field. |
mbed_official | 146:f64d43ff0c18 | 505 | #define BR_USB_OTGISTAT_IDCHG (BITBAND_ACCESS8(HW_USB_OTGISTAT_ADDR, BP_USB_OTGISTAT_IDCHG)) |
mbed_official | 146:f64d43ff0c18 | 506 | #endif |
mbed_official | 146:f64d43ff0c18 | 507 | |
mbed_official | 146:f64d43ff0c18 | 508 | //! @brief Format value for bitfield USB_OTGISTAT_IDCHG. |
mbed_official | 146:f64d43ff0c18 | 509 | #define BF_USB_OTGISTAT_IDCHG(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint8_t) << BP_USB_OTGISTAT_IDCHG), uint8_t) & BM_USB_OTGISTAT_IDCHG) |
mbed_official | 146:f64d43ff0c18 | 510 | |
mbed_official | 146:f64d43ff0c18 | 511 | #ifndef __LANGUAGE_ASM__ |
mbed_official | 146:f64d43ff0c18 | 512 | //! @brief Set the IDCHG field to a new value. |
mbed_official | 146:f64d43ff0c18 | 513 | #define BW_USB_OTGISTAT_IDCHG(v) (BITBAND_ACCESS8(HW_USB_OTGISTAT_ADDR, BP_USB_OTGISTAT_IDCHG) = (v)) |
mbed_official | 146:f64d43ff0c18 | 514 | #endif |
mbed_official | 146:f64d43ff0c18 | 515 | //@} |
mbed_official | 146:f64d43ff0c18 | 516 | |
mbed_official | 146:f64d43ff0c18 | 517 | //------------------------------------------------------------------------------------------- |
mbed_official | 146:f64d43ff0c18 | 518 | // HW_USB_OTGICR - OTG Interrupt Control register |
mbed_official | 146:f64d43ff0c18 | 519 | //------------------------------------------------------------------------------------------- |
mbed_official | 146:f64d43ff0c18 | 520 | |
mbed_official | 146:f64d43ff0c18 | 521 | #ifndef __LANGUAGE_ASM__ |
mbed_official | 146:f64d43ff0c18 | 522 | /*! |
mbed_official | 146:f64d43ff0c18 | 523 | * @brief HW_USB_OTGICR - OTG Interrupt Control register (RW) |
mbed_official | 146:f64d43ff0c18 | 524 | * |
mbed_official | 146:f64d43ff0c18 | 525 | * Reset value: 0x00U |
mbed_official | 146:f64d43ff0c18 | 526 | * |
mbed_official | 146:f64d43ff0c18 | 527 | * Enables the corresponding interrupt status bits defined in the OTG Interrupt |
mbed_official | 146:f64d43ff0c18 | 528 | * Status Register. |
mbed_official | 146:f64d43ff0c18 | 529 | */ |
mbed_official | 146:f64d43ff0c18 | 530 | typedef union _hw_usb_otgicr |
mbed_official | 146:f64d43ff0c18 | 531 | { |
mbed_official | 146:f64d43ff0c18 | 532 | uint8_t U; |
mbed_official | 146:f64d43ff0c18 | 533 | struct _hw_usb_otgicr_bitfields |
mbed_official | 146:f64d43ff0c18 | 534 | { |
mbed_official | 146:f64d43ff0c18 | 535 | uint8_t AVBUSEN : 1; //!< [0] A VBUS Valid Interrupt Enable |
mbed_official | 146:f64d43ff0c18 | 536 | uint8_t RESERVED0 : 1; //!< [1] |
mbed_official | 146:f64d43ff0c18 | 537 | uint8_t BSESSEN : 1; //!< [2] B Session END Interrupt Enable |
mbed_official | 146:f64d43ff0c18 | 538 | uint8_t SESSVLDEN : 1; //!< [3] Session Valid Interrupt Enable |
mbed_official | 146:f64d43ff0c18 | 539 | uint8_t RESERVED1 : 1; //!< [4] |
mbed_official | 146:f64d43ff0c18 | 540 | uint8_t LINESTATEEN : 1; //!< [5] Line State Change Interrupt Enable |
mbed_official | 146:f64d43ff0c18 | 541 | uint8_t ONEMSECEN : 1; //!< [6] One Millisecond Interrupt Enable |
mbed_official | 146:f64d43ff0c18 | 542 | uint8_t IDEN : 1; //!< [7] ID Interrupt Enable |
mbed_official | 146:f64d43ff0c18 | 543 | } B; |
mbed_official | 146:f64d43ff0c18 | 544 | } hw_usb_otgicr_t; |
mbed_official | 146:f64d43ff0c18 | 545 | #endif |
mbed_official | 146:f64d43ff0c18 | 546 | |
mbed_official | 146:f64d43ff0c18 | 547 | /*! |
mbed_official | 146:f64d43ff0c18 | 548 | * @name Constants and macros for entire USB_OTGICR register |
mbed_official | 146:f64d43ff0c18 | 549 | */ |
mbed_official | 146:f64d43ff0c18 | 550 | //@{ |
mbed_official | 146:f64d43ff0c18 | 551 | #define HW_USB_OTGICR_ADDR (REGS_USB_BASE + 0x14U) |
mbed_official | 146:f64d43ff0c18 | 552 | |
mbed_official | 146:f64d43ff0c18 | 553 | #ifndef __LANGUAGE_ASM__ |
mbed_official | 146:f64d43ff0c18 | 554 | #define HW_USB_OTGICR (*(__IO hw_usb_otgicr_t *) HW_USB_OTGICR_ADDR) |
mbed_official | 146:f64d43ff0c18 | 555 | #define HW_USB_OTGICR_RD() (HW_USB_OTGICR.U) |
mbed_official | 146:f64d43ff0c18 | 556 | #define HW_USB_OTGICR_WR(v) (HW_USB_OTGICR.U = (v)) |
mbed_official | 146:f64d43ff0c18 | 557 | #define HW_USB_OTGICR_SET(v) (HW_USB_OTGICR_WR(HW_USB_OTGICR_RD() | (v))) |
mbed_official | 146:f64d43ff0c18 | 558 | #define HW_USB_OTGICR_CLR(v) (HW_USB_OTGICR_WR(HW_USB_OTGICR_RD() & ~(v))) |
mbed_official | 146:f64d43ff0c18 | 559 | #define HW_USB_OTGICR_TOG(v) (HW_USB_OTGICR_WR(HW_USB_OTGICR_RD() ^ (v))) |
mbed_official | 146:f64d43ff0c18 | 560 | #endif |
mbed_official | 146:f64d43ff0c18 | 561 | //@} |
mbed_official | 146:f64d43ff0c18 | 562 | |
mbed_official | 146:f64d43ff0c18 | 563 | /* |
mbed_official | 146:f64d43ff0c18 | 564 | * Constants & macros for individual USB_OTGICR bitfields |
mbed_official | 146:f64d43ff0c18 | 565 | */ |
mbed_official | 146:f64d43ff0c18 | 566 | |
mbed_official | 146:f64d43ff0c18 | 567 | /*! |
mbed_official | 146:f64d43ff0c18 | 568 | * @name Register USB_OTGICR, field AVBUSEN[0] (RW) |
mbed_official | 146:f64d43ff0c18 | 569 | * |
mbed_official | 146:f64d43ff0c18 | 570 | * Values: |
mbed_official | 146:f64d43ff0c18 | 571 | * - 0 - Disables the AVBUSCHG interrupt. |
mbed_official | 146:f64d43ff0c18 | 572 | * - 1 - Enables the AVBUSCHG interrupt. |
mbed_official | 146:f64d43ff0c18 | 573 | */ |
mbed_official | 146:f64d43ff0c18 | 574 | //@{ |
mbed_official | 146:f64d43ff0c18 | 575 | #define BP_USB_OTGICR_AVBUSEN (0U) //!< Bit position for USB_OTGICR_AVBUSEN. |
mbed_official | 146:f64d43ff0c18 | 576 | #define BM_USB_OTGICR_AVBUSEN (0x01U) //!< Bit mask for USB_OTGICR_AVBUSEN. |
mbed_official | 146:f64d43ff0c18 | 577 | #define BS_USB_OTGICR_AVBUSEN (1U) //!< Bit field size in bits for USB_OTGICR_AVBUSEN. |
mbed_official | 146:f64d43ff0c18 | 578 | |
mbed_official | 146:f64d43ff0c18 | 579 | #ifndef __LANGUAGE_ASM__ |
mbed_official | 146:f64d43ff0c18 | 580 | //! @brief Read current value of the USB_OTGICR_AVBUSEN field. |
mbed_official | 146:f64d43ff0c18 | 581 | #define BR_USB_OTGICR_AVBUSEN (BITBAND_ACCESS8(HW_USB_OTGICR_ADDR, BP_USB_OTGICR_AVBUSEN)) |
mbed_official | 146:f64d43ff0c18 | 582 | #endif |
mbed_official | 146:f64d43ff0c18 | 583 | |
mbed_official | 146:f64d43ff0c18 | 584 | //! @brief Format value for bitfield USB_OTGICR_AVBUSEN. |
mbed_official | 146:f64d43ff0c18 | 585 | #define BF_USB_OTGICR_AVBUSEN(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint8_t) << BP_USB_OTGICR_AVBUSEN), uint8_t) & BM_USB_OTGICR_AVBUSEN) |
mbed_official | 146:f64d43ff0c18 | 586 | |
mbed_official | 146:f64d43ff0c18 | 587 | #ifndef __LANGUAGE_ASM__ |
mbed_official | 146:f64d43ff0c18 | 588 | //! @brief Set the AVBUSEN field to a new value. |
mbed_official | 146:f64d43ff0c18 | 589 | #define BW_USB_OTGICR_AVBUSEN(v) (BITBAND_ACCESS8(HW_USB_OTGICR_ADDR, BP_USB_OTGICR_AVBUSEN) = (v)) |
mbed_official | 146:f64d43ff0c18 | 590 | #endif |
mbed_official | 146:f64d43ff0c18 | 591 | //@} |
mbed_official | 146:f64d43ff0c18 | 592 | |
mbed_official | 146:f64d43ff0c18 | 593 | /*! |
mbed_official | 146:f64d43ff0c18 | 594 | * @name Register USB_OTGICR, field BSESSEN[2] (RW) |
mbed_official | 146:f64d43ff0c18 | 595 | * |
mbed_official | 146:f64d43ff0c18 | 596 | * Values: |
mbed_official | 146:f64d43ff0c18 | 597 | * - 0 - Disables the B_SESS_CHG interrupt. |
mbed_official | 146:f64d43ff0c18 | 598 | * - 1 - Enables the B_SESS_CHG interrupt. |
mbed_official | 146:f64d43ff0c18 | 599 | */ |
mbed_official | 146:f64d43ff0c18 | 600 | //@{ |
mbed_official | 146:f64d43ff0c18 | 601 | #define BP_USB_OTGICR_BSESSEN (2U) //!< Bit position for USB_OTGICR_BSESSEN. |
mbed_official | 146:f64d43ff0c18 | 602 | #define BM_USB_OTGICR_BSESSEN (0x04U) //!< Bit mask for USB_OTGICR_BSESSEN. |
mbed_official | 146:f64d43ff0c18 | 603 | #define BS_USB_OTGICR_BSESSEN (1U) //!< Bit field size in bits for USB_OTGICR_BSESSEN. |
mbed_official | 146:f64d43ff0c18 | 604 | |
mbed_official | 146:f64d43ff0c18 | 605 | #ifndef __LANGUAGE_ASM__ |
mbed_official | 146:f64d43ff0c18 | 606 | //! @brief Read current value of the USB_OTGICR_BSESSEN field. |
mbed_official | 146:f64d43ff0c18 | 607 | #define BR_USB_OTGICR_BSESSEN (BITBAND_ACCESS8(HW_USB_OTGICR_ADDR, BP_USB_OTGICR_BSESSEN)) |
mbed_official | 146:f64d43ff0c18 | 608 | #endif |
mbed_official | 146:f64d43ff0c18 | 609 | |
mbed_official | 146:f64d43ff0c18 | 610 | //! @brief Format value for bitfield USB_OTGICR_BSESSEN. |
mbed_official | 146:f64d43ff0c18 | 611 | #define BF_USB_OTGICR_BSESSEN(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint8_t) << BP_USB_OTGICR_BSESSEN), uint8_t) & BM_USB_OTGICR_BSESSEN) |
mbed_official | 146:f64d43ff0c18 | 612 | |
mbed_official | 146:f64d43ff0c18 | 613 | #ifndef __LANGUAGE_ASM__ |
mbed_official | 146:f64d43ff0c18 | 614 | //! @brief Set the BSESSEN field to a new value. |
mbed_official | 146:f64d43ff0c18 | 615 | #define BW_USB_OTGICR_BSESSEN(v) (BITBAND_ACCESS8(HW_USB_OTGICR_ADDR, BP_USB_OTGICR_BSESSEN) = (v)) |
mbed_official | 146:f64d43ff0c18 | 616 | #endif |
mbed_official | 146:f64d43ff0c18 | 617 | //@} |
mbed_official | 146:f64d43ff0c18 | 618 | |
mbed_official | 146:f64d43ff0c18 | 619 | /*! |
mbed_official | 146:f64d43ff0c18 | 620 | * @name Register USB_OTGICR, field SESSVLDEN[3] (RW) |
mbed_official | 146:f64d43ff0c18 | 621 | * |
mbed_official | 146:f64d43ff0c18 | 622 | * Values: |
mbed_official | 146:f64d43ff0c18 | 623 | * - 0 - Disables the SESSVLDCHG interrupt. |
mbed_official | 146:f64d43ff0c18 | 624 | * - 1 - Enables the SESSVLDCHG interrupt. |
mbed_official | 146:f64d43ff0c18 | 625 | */ |
mbed_official | 146:f64d43ff0c18 | 626 | //@{ |
mbed_official | 146:f64d43ff0c18 | 627 | #define BP_USB_OTGICR_SESSVLDEN (3U) //!< Bit position for USB_OTGICR_SESSVLDEN. |
mbed_official | 146:f64d43ff0c18 | 628 | #define BM_USB_OTGICR_SESSVLDEN (0x08U) //!< Bit mask for USB_OTGICR_SESSVLDEN. |
mbed_official | 146:f64d43ff0c18 | 629 | #define BS_USB_OTGICR_SESSVLDEN (1U) //!< Bit field size in bits for USB_OTGICR_SESSVLDEN. |
mbed_official | 146:f64d43ff0c18 | 630 | |
mbed_official | 146:f64d43ff0c18 | 631 | #ifndef __LANGUAGE_ASM__ |
mbed_official | 146:f64d43ff0c18 | 632 | //! @brief Read current value of the USB_OTGICR_SESSVLDEN field. |
mbed_official | 146:f64d43ff0c18 | 633 | #define BR_USB_OTGICR_SESSVLDEN (BITBAND_ACCESS8(HW_USB_OTGICR_ADDR, BP_USB_OTGICR_SESSVLDEN)) |
mbed_official | 146:f64d43ff0c18 | 634 | #endif |
mbed_official | 146:f64d43ff0c18 | 635 | |
mbed_official | 146:f64d43ff0c18 | 636 | //! @brief Format value for bitfield USB_OTGICR_SESSVLDEN. |
mbed_official | 146:f64d43ff0c18 | 637 | #define BF_USB_OTGICR_SESSVLDEN(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint8_t) << BP_USB_OTGICR_SESSVLDEN), uint8_t) & BM_USB_OTGICR_SESSVLDEN) |
mbed_official | 146:f64d43ff0c18 | 638 | |
mbed_official | 146:f64d43ff0c18 | 639 | #ifndef __LANGUAGE_ASM__ |
mbed_official | 146:f64d43ff0c18 | 640 | //! @brief Set the SESSVLDEN field to a new value. |
mbed_official | 146:f64d43ff0c18 | 641 | #define BW_USB_OTGICR_SESSVLDEN(v) (BITBAND_ACCESS8(HW_USB_OTGICR_ADDR, BP_USB_OTGICR_SESSVLDEN) = (v)) |
mbed_official | 146:f64d43ff0c18 | 642 | #endif |
mbed_official | 146:f64d43ff0c18 | 643 | //@} |
mbed_official | 146:f64d43ff0c18 | 644 | |
mbed_official | 146:f64d43ff0c18 | 645 | /*! |
mbed_official | 146:f64d43ff0c18 | 646 | * @name Register USB_OTGICR, field LINESTATEEN[5] (RW) |
mbed_official | 146:f64d43ff0c18 | 647 | * |
mbed_official | 146:f64d43ff0c18 | 648 | * Values: |
mbed_official | 146:f64d43ff0c18 | 649 | * - 0 - Disables the LINE_STAT_CHG interrupt. |
mbed_official | 146:f64d43ff0c18 | 650 | * - 1 - Enables the LINE_STAT_CHG interrupt. |
mbed_official | 146:f64d43ff0c18 | 651 | */ |
mbed_official | 146:f64d43ff0c18 | 652 | //@{ |
mbed_official | 146:f64d43ff0c18 | 653 | #define BP_USB_OTGICR_LINESTATEEN (5U) //!< Bit position for USB_OTGICR_LINESTATEEN. |
mbed_official | 146:f64d43ff0c18 | 654 | #define BM_USB_OTGICR_LINESTATEEN (0x20U) //!< Bit mask for USB_OTGICR_LINESTATEEN. |
mbed_official | 146:f64d43ff0c18 | 655 | #define BS_USB_OTGICR_LINESTATEEN (1U) //!< Bit field size in bits for USB_OTGICR_LINESTATEEN. |
mbed_official | 146:f64d43ff0c18 | 656 | |
mbed_official | 146:f64d43ff0c18 | 657 | #ifndef __LANGUAGE_ASM__ |
mbed_official | 146:f64d43ff0c18 | 658 | //! @brief Read current value of the USB_OTGICR_LINESTATEEN field. |
mbed_official | 146:f64d43ff0c18 | 659 | #define BR_USB_OTGICR_LINESTATEEN (BITBAND_ACCESS8(HW_USB_OTGICR_ADDR, BP_USB_OTGICR_LINESTATEEN)) |
mbed_official | 146:f64d43ff0c18 | 660 | #endif |
mbed_official | 146:f64d43ff0c18 | 661 | |
mbed_official | 146:f64d43ff0c18 | 662 | //! @brief Format value for bitfield USB_OTGICR_LINESTATEEN. |
mbed_official | 146:f64d43ff0c18 | 663 | #define BF_USB_OTGICR_LINESTATEEN(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint8_t) << BP_USB_OTGICR_LINESTATEEN), uint8_t) & BM_USB_OTGICR_LINESTATEEN) |
mbed_official | 146:f64d43ff0c18 | 664 | |
mbed_official | 146:f64d43ff0c18 | 665 | #ifndef __LANGUAGE_ASM__ |
mbed_official | 146:f64d43ff0c18 | 666 | //! @brief Set the LINESTATEEN field to a new value. |
mbed_official | 146:f64d43ff0c18 | 667 | #define BW_USB_OTGICR_LINESTATEEN(v) (BITBAND_ACCESS8(HW_USB_OTGICR_ADDR, BP_USB_OTGICR_LINESTATEEN) = (v)) |
mbed_official | 146:f64d43ff0c18 | 668 | #endif |
mbed_official | 146:f64d43ff0c18 | 669 | //@} |
mbed_official | 146:f64d43ff0c18 | 670 | |
mbed_official | 146:f64d43ff0c18 | 671 | /*! |
mbed_official | 146:f64d43ff0c18 | 672 | * @name Register USB_OTGICR, field ONEMSECEN[6] (RW) |
mbed_official | 146:f64d43ff0c18 | 673 | * |
mbed_official | 146:f64d43ff0c18 | 674 | * Values: |
mbed_official | 146:f64d43ff0c18 | 675 | * - 0 - Diables the 1ms timer interrupt. |
mbed_official | 146:f64d43ff0c18 | 676 | * - 1 - Enables the 1ms timer interrupt. |
mbed_official | 146:f64d43ff0c18 | 677 | */ |
mbed_official | 146:f64d43ff0c18 | 678 | //@{ |
mbed_official | 146:f64d43ff0c18 | 679 | #define BP_USB_OTGICR_ONEMSECEN (6U) //!< Bit position for USB_OTGICR_ONEMSECEN. |
mbed_official | 146:f64d43ff0c18 | 680 | #define BM_USB_OTGICR_ONEMSECEN (0x40U) //!< Bit mask for USB_OTGICR_ONEMSECEN. |
mbed_official | 146:f64d43ff0c18 | 681 | #define BS_USB_OTGICR_ONEMSECEN (1U) //!< Bit field size in bits for USB_OTGICR_ONEMSECEN. |
mbed_official | 146:f64d43ff0c18 | 682 | |
mbed_official | 146:f64d43ff0c18 | 683 | #ifndef __LANGUAGE_ASM__ |
mbed_official | 146:f64d43ff0c18 | 684 | //! @brief Read current value of the USB_OTGICR_ONEMSECEN field. |
mbed_official | 146:f64d43ff0c18 | 685 | #define BR_USB_OTGICR_ONEMSECEN (BITBAND_ACCESS8(HW_USB_OTGICR_ADDR, BP_USB_OTGICR_ONEMSECEN)) |
mbed_official | 146:f64d43ff0c18 | 686 | #endif |
mbed_official | 146:f64d43ff0c18 | 687 | |
mbed_official | 146:f64d43ff0c18 | 688 | //! @brief Format value for bitfield USB_OTGICR_ONEMSECEN. |
mbed_official | 146:f64d43ff0c18 | 689 | #define BF_USB_OTGICR_ONEMSECEN(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint8_t) << BP_USB_OTGICR_ONEMSECEN), uint8_t) & BM_USB_OTGICR_ONEMSECEN) |
mbed_official | 146:f64d43ff0c18 | 690 | |
mbed_official | 146:f64d43ff0c18 | 691 | #ifndef __LANGUAGE_ASM__ |
mbed_official | 146:f64d43ff0c18 | 692 | //! @brief Set the ONEMSECEN field to a new value. |
mbed_official | 146:f64d43ff0c18 | 693 | #define BW_USB_OTGICR_ONEMSECEN(v) (BITBAND_ACCESS8(HW_USB_OTGICR_ADDR, BP_USB_OTGICR_ONEMSECEN) = (v)) |
mbed_official | 146:f64d43ff0c18 | 694 | #endif |
mbed_official | 146:f64d43ff0c18 | 695 | //@} |
mbed_official | 146:f64d43ff0c18 | 696 | |
mbed_official | 146:f64d43ff0c18 | 697 | /*! |
mbed_official | 146:f64d43ff0c18 | 698 | * @name Register USB_OTGICR, field IDEN[7] (RW) |
mbed_official | 146:f64d43ff0c18 | 699 | * |
mbed_official | 146:f64d43ff0c18 | 700 | * Values: |
mbed_official | 146:f64d43ff0c18 | 701 | * - 0 - The ID interrupt is disabled |
mbed_official | 146:f64d43ff0c18 | 702 | * - 1 - The ID interrupt is enabled |
mbed_official | 146:f64d43ff0c18 | 703 | */ |
mbed_official | 146:f64d43ff0c18 | 704 | //@{ |
mbed_official | 146:f64d43ff0c18 | 705 | #define BP_USB_OTGICR_IDEN (7U) //!< Bit position for USB_OTGICR_IDEN. |
mbed_official | 146:f64d43ff0c18 | 706 | #define BM_USB_OTGICR_IDEN (0x80U) //!< Bit mask for USB_OTGICR_IDEN. |
mbed_official | 146:f64d43ff0c18 | 707 | #define BS_USB_OTGICR_IDEN (1U) //!< Bit field size in bits for USB_OTGICR_IDEN. |
mbed_official | 146:f64d43ff0c18 | 708 | |
mbed_official | 146:f64d43ff0c18 | 709 | #ifndef __LANGUAGE_ASM__ |
mbed_official | 146:f64d43ff0c18 | 710 | //! @brief Read current value of the USB_OTGICR_IDEN field. |
mbed_official | 146:f64d43ff0c18 | 711 | #define BR_USB_OTGICR_IDEN (BITBAND_ACCESS8(HW_USB_OTGICR_ADDR, BP_USB_OTGICR_IDEN)) |
mbed_official | 146:f64d43ff0c18 | 712 | #endif |
mbed_official | 146:f64d43ff0c18 | 713 | |
mbed_official | 146:f64d43ff0c18 | 714 | //! @brief Format value for bitfield USB_OTGICR_IDEN. |
mbed_official | 146:f64d43ff0c18 | 715 | #define BF_USB_OTGICR_IDEN(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint8_t) << BP_USB_OTGICR_IDEN), uint8_t) & BM_USB_OTGICR_IDEN) |
mbed_official | 146:f64d43ff0c18 | 716 | |
mbed_official | 146:f64d43ff0c18 | 717 | #ifndef __LANGUAGE_ASM__ |
mbed_official | 146:f64d43ff0c18 | 718 | //! @brief Set the IDEN field to a new value. |
mbed_official | 146:f64d43ff0c18 | 719 | #define BW_USB_OTGICR_IDEN(v) (BITBAND_ACCESS8(HW_USB_OTGICR_ADDR, BP_USB_OTGICR_IDEN) = (v)) |
mbed_official | 146:f64d43ff0c18 | 720 | #endif |
mbed_official | 146:f64d43ff0c18 | 721 | //@} |
mbed_official | 146:f64d43ff0c18 | 722 | |
mbed_official | 146:f64d43ff0c18 | 723 | //------------------------------------------------------------------------------------------- |
mbed_official | 146:f64d43ff0c18 | 724 | // HW_USB_OTGSTAT - OTG Status register |
mbed_official | 146:f64d43ff0c18 | 725 | //------------------------------------------------------------------------------------------- |
mbed_official | 146:f64d43ff0c18 | 726 | |
mbed_official | 146:f64d43ff0c18 | 727 | #ifndef __LANGUAGE_ASM__ |
mbed_official | 146:f64d43ff0c18 | 728 | /*! |
mbed_official | 146:f64d43ff0c18 | 729 | * @brief HW_USB_OTGSTAT - OTG Status register (RW) |
mbed_official | 146:f64d43ff0c18 | 730 | * |
mbed_official | 146:f64d43ff0c18 | 731 | * Reset value: 0x00U |
mbed_official | 146:f64d43ff0c18 | 732 | * |
mbed_official | 146:f64d43ff0c18 | 733 | * Displays the actual value from the external comparator outputs of the ID pin |
mbed_official | 146:f64d43ff0c18 | 734 | * and VBUS. |
mbed_official | 146:f64d43ff0c18 | 735 | */ |
mbed_official | 146:f64d43ff0c18 | 736 | typedef union _hw_usb_otgstat |
mbed_official | 146:f64d43ff0c18 | 737 | { |
mbed_official | 146:f64d43ff0c18 | 738 | uint8_t U; |
mbed_official | 146:f64d43ff0c18 | 739 | struct _hw_usb_otgstat_bitfields |
mbed_official | 146:f64d43ff0c18 | 740 | { |
mbed_official | 146:f64d43ff0c18 | 741 | uint8_t AVBUSVLD : 1; //!< [0] A VBUS Valid |
mbed_official | 146:f64d43ff0c18 | 742 | uint8_t RESERVED0 : 1; //!< [1] |
mbed_official | 146:f64d43ff0c18 | 743 | uint8_t BSESSEND : 1; //!< [2] B Session End |
mbed_official | 146:f64d43ff0c18 | 744 | uint8_t SESS_VLD : 1; //!< [3] Session Valid |
mbed_official | 146:f64d43ff0c18 | 745 | uint8_t RESERVED1 : 1; //!< [4] |
mbed_official | 146:f64d43ff0c18 | 746 | uint8_t LINESTATESTABLE : 1; //!< [5] |
mbed_official | 146:f64d43ff0c18 | 747 | uint8_t ONEMSECEN : 1; //!< [6] |
mbed_official | 146:f64d43ff0c18 | 748 | uint8_t ID : 1; //!< [7] |
mbed_official | 146:f64d43ff0c18 | 749 | } B; |
mbed_official | 146:f64d43ff0c18 | 750 | } hw_usb_otgstat_t; |
mbed_official | 146:f64d43ff0c18 | 751 | #endif |
mbed_official | 146:f64d43ff0c18 | 752 | |
mbed_official | 146:f64d43ff0c18 | 753 | /*! |
mbed_official | 146:f64d43ff0c18 | 754 | * @name Constants and macros for entire USB_OTGSTAT register |
mbed_official | 146:f64d43ff0c18 | 755 | */ |
mbed_official | 146:f64d43ff0c18 | 756 | //@{ |
mbed_official | 146:f64d43ff0c18 | 757 | #define HW_USB_OTGSTAT_ADDR (REGS_USB_BASE + 0x18U) |
mbed_official | 146:f64d43ff0c18 | 758 | |
mbed_official | 146:f64d43ff0c18 | 759 | #ifndef __LANGUAGE_ASM__ |
mbed_official | 146:f64d43ff0c18 | 760 | #define HW_USB_OTGSTAT (*(__IO hw_usb_otgstat_t *) HW_USB_OTGSTAT_ADDR) |
mbed_official | 146:f64d43ff0c18 | 761 | #define HW_USB_OTGSTAT_RD() (HW_USB_OTGSTAT.U) |
mbed_official | 146:f64d43ff0c18 | 762 | #define HW_USB_OTGSTAT_WR(v) (HW_USB_OTGSTAT.U = (v)) |
mbed_official | 146:f64d43ff0c18 | 763 | #define HW_USB_OTGSTAT_SET(v) (HW_USB_OTGSTAT_WR(HW_USB_OTGSTAT_RD() | (v))) |
mbed_official | 146:f64d43ff0c18 | 764 | #define HW_USB_OTGSTAT_CLR(v) (HW_USB_OTGSTAT_WR(HW_USB_OTGSTAT_RD() & ~(v))) |
mbed_official | 146:f64d43ff0c18 | 765 | #define HW_USB_OTGSTAT_TOG(v) (HW_USB_OTGSTAT_WR(HW_USB_OTGSTAT_RD() ^ (v))) |
mbed_official | 146:f64d43ff0c18 | 766 | #endif |
mbed_official | 146:f64d43ff0c18 | 767 | //@} |
mbed_official | 146:f64d43ff0c18 | 768 | |
mbed_official | 146:f64d43ff0c18 | 769 | /* |
mbed_official | 146:f64d43ff0c18 | 770 | * Constants & macros for individual USB_OTGSTAT bitfields |
mbed_official | 146:f64d43ff0c18 | 771 | */ |
mbed_official | 146:f64d43ff0c18 | 772 | |
mbed_official | 146:f64d43ff0c18 | 773 | /*! |
mbed_official | 146:f64d43ff0c18 | 774 | * @name Register USB_OTGSTAT, field AVBUSVLD[0] (RW) |
mbed_official | 146:f64d43ff0c18 | 775 | * |
mbed_official | 146:f64d43ff0c18 | 776 | * Values: |
mbed_official | 146:f64d43ff0c18 | 777 | * - 0 - The VBUS voltage is below the A VBUS Valid threshold. |
mbed_official | 146:f64d43ff0c18 | 778 | * - 1 - The VBUS voltage is above the A VBUS Valid threshold. |
mbed_official | 146:f64d43ff0c18 | 779 | */ |
mbed_official | 146:f64d43ff0c18 | 780 | //@{ |
mbed_official | 146:f64d43ff0c18 | 781 | #define BP_USB_OTGSTAT_AVBUSVLD (0U) //!< Bit position for USB_OTGSTAT_AVBUSVLD. |
mbed_official | 146:f64d43ff0c18 | 782 | #define BM_USB_OTGSTAT_AVBUSVLD (0x01U) //!< Bit mask for USB_OTGSTAT_AVBUSVLD. |
mbed_official | 146:f64d43ff0c18 | 783 | #define BS_USB_OTGSTAT_AVBUSVLD (1U) //!< Bit field size in bits for USB_OTGSTAT_AVBUSVLD. |
mbed_official | 146:f64d43ff0c18 | 784 | |
mbed_official | 146:f64d43ff0c18 | 785 | #ifndef __LANGUAGE_ASM__ |
mbed_official | 146:f64d43ff0c18 | 786 | //! @brief Read current value of the USB_OTGSTAT_AVBUSVLD field. |
mbed_official | 146:f64d43ff0c18 | 787 | #define BR_USB_OTGSTAT_AVBUSVLD (BITBAND_ACCESS8(HW_USB_OTGSTAT_ADDR, BP_USB_OTGSTAT_AVBUSVLD)) |
mbed_official | 146:f64d43ff0c18 | 788 | #endif |
mbed_official | 146:f64d43ff0c18 | 789 | |
mbed_official | 146:f64d43ff0c18 | 790 | //! @brief Format value for bitfield USB_OTGSTAT_AVBUSVLD. |
mbed_official | 146:f64d43ff0c18 | 791 | #define BF_USB_OTGSTAT_AVBUSVLD(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint8_t) << BP_USB_OTGSTAT_AVBUSVLD), uint8_t) & BM_USB_OTGSTAT_AVBUSVLD) |
mbed_official | 146:f64d43ff0c18 | 792 | |
mbed_official | 146:f64d43ff0c18 | 793 | #ifndef __LANGUAGE_ASM__ |
mbed_official | 146:f64d43ff0c18 | 794 | //! @brief Set the AVBUSVLD field to a new value. |
mbed_official | 146:f64d43ff0c18 | 795 | #define BW_USB_OTGSTAT_AVBUSVLD(v) (BITBAND_ACCESS8(HW_USB_OTGSTAT_ADDR, BP_USB_OTGSTAT_AVBUSVLD) = (v)) |
mbed_official | 146:f64d43ff0c18 | 796 | #endif |
mbed_official | 146:f64d43ff0c18 | 797 | //@} |
mbed_official | 146:f64d43ff0c18 | 798 | |
mbed_official | 146:f64d43ff0c18 | 799 | /*! |
mbed_official | 146:f64d43ff0c18 | 800 | * @name Register USB_OTGSTAT, field BSESSEND[2] (RW) |
mbed_official | 146:f64d43ff0c18 | 801 | * |
mbed_official | 146:f64d43ff0c18 | 802 | * Values: |
mbed_official | 146:f64d43ff0c18 | 803 | * - 0 - The VBUS voltage is above the B session end threshold. |
mbed_official | 146:f64d43ff0c18 | 804 | * - 1 - The VBUS voltage is below the B session end threshold. |
mbed_official | 146:f64d43ff0c18 | 805 | */ |
mbed_official | 146:f64d43ff0c18 | 806 | //@{ |
mbed_official | 146:f64d43ff0c18 | 807 | #define BP_USB_OTGSTAT_BSESSEND (2U) //!< Bit position for USB_OTGSTAT_BSESSEND. |
mbed_official | 146:f64d43ff0c18 | 808 | #define BM_USB_OTGSTAT_BSESSEND (0x04U) //!< Bit mask for USB_OTGSTAT_BSESSEND. |
mbed_official | 146:f64d43ff0c18 | 809 | #define BS_USB_OTGSTAT_BSESSEND (1U) //!< Bit field size in bits for USB_OTGSTAT_BSESSEND. |
mbed_official | 146:f64d43ff0c18 | 810 | |
mbed_official | 146:f64d43ff0c18 | 811 | #ifndef __LANGUAGE_ASM__ |
mbed_official | 146:f64d43ff0c18 | 812 | //! @brief Read current value of the USB_OTGSTAT_BSESSEND field. |
mbed_official | 146:f64d43ff0c18 | 813 | #define BR_USB_OTGSTAT_BSESSEND (BITBAND_ACCESS8(HW_USB_OTGSTAT_ADDR, BP_USB_OTGSTAT_BSESSEND)) |
mbed_official | 146:f64d43ff0c18 | 814 | #endif |
mbed_official | 146:f64d43ff0c18 | 815 | |
mbed_official | 146:f64d43ff0c18 | 816 | //! @brief Format value for bitfield USB_OTGSTAT_BSESSEND. |
mbed_official | 146:f64d43ff0c18 | 817 | #define BF_USB_OTGSTAT_BSESSEND(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint8_t) << BP_USB_OTGSTAT_BSESSEND), uint8_t) & BM_USB_OTGSTAT_BSESSEND) |
mbed_official | 146:f64d43ff0c18 | 818 | |
mbed_official | 146:f64d43ff0c18 | 819 | #ifndef __LANGUAGE_ASM__ |
mbed_official | 146:f64d43ff0c18 | 820 | //! @brief Set the BSESSEND field to a new value. |
mbed_official | 146:f64d43ff0c18 | 821 | #define BW_USB_OTGSTAT_BSESSEND(v) (BITBAND_ACCESS8(HW_USB_OTGSTAT_ADDR, BP_USB_OTGSTAT_BSESSEND) = (v)) |
mbed_official | 146:f64d43ff0c18 | 822 | #endif |
mbed_official | 146:f64d43ff0c18 | 823 | //@} |
mbed_official | 146:f64d43ff0c18 | 824 | |
mbed_official | 146:f64d43ff0c18 | 825 | /*! |
mbed_official | 146:f64d43ff0c18 | 826 | * @name Register USB_OTGSTAT, field SESS_VLD[3] (RW) |
mbed_official | 146:f64d43ff0c18 | 827 | * |
mbed_official | 146:f64d43ff0c18 | 828 | * Values: |
mbed_official | 146:f64d43ff0c18 | 829 | * - 0 - The VBUS voltage is below the B session valid threshold |
mbed_official | 146:f64d43ff0c18 | 830 | * - 1 - The VBUS voltage is above the B session valid threshold. |
mbed_official | 146:f64d43ff0c18 | 831 | */ |
mbed_official | 146:f64d43ff0c18 | 832 | //@{ |
mbed_official | 146:f64d43ff0c18 | 833 | #define BP_USB_OTGSTAT_SESS_VLD (3U) //!< Bit position for USB_OTGSTAT_SESS_VLD. |
mbed_official | 146:f64d43ff0c18 | 834 | #define BM_USB_OTGSTAT_SESS_VLD (0x08U) //!< Bit mask for USB_OTGSTAT_SESS_VLD. |
mbed_official | 146:f64d43ff0c18 | 835 | #define BS_USB_OTGSTAT_SESS_VLD (1U) //!< Bit field size in bits for USB_OTGSTAT_SESS_VLD. |
mbed_official | 146:f64d43ff0c18 | 836 | |
mbed_official | 146:f64d43ff0c18 | 837 | #ifndef __LANGUAGE_ASM__ |
mbed_official | 146:f64d43ff0c18 | 838 | //! @brief Read current value of the USB_OTGSTAT_SESS_VLD field. |
mbed_official | 146:f64d43ff0c18 | 839 | #define BR_USB_OTGSTAT_SESS_VLD (BITBAND_ACCESS8(HW_USB_OTGSTAT_ADDR, BP_USB_OTGSTAT_SESS_VLD)) |
mbed_official | 146:f64d43ff0c18 | 840 | #endif |
mbed_official | 146:f64d43ff0c18 | 841 | |
mbed_official | 146:f64d43ff0c18 | 842 | //! @brief Format value for bitfield USB_OTGSTAT_SESS_VLD. |
mbed_official | 146:f64d43ff0c18 | 843 | #define BF_USB_OTGSTAT_SESS_VLD(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint8_t) << BP_USB_OTGSTAT_SESS_VLD), uint8_t) & BM_USB_OTGSTAT_SESS_VLD) |
mbed_official | 146:f64d43ff0c18 | 844 | |
mbed_official | 146:f64d43ff0c18 | 845 | #ifndef __LANGUAGE_ASM__ |
mbed_official | 146:f64d43ff0c18 | 846 | //! @brief Set the SESS_VLD field to a new value. |
mbed_official | 146:f64d43ff0c18 | 847 | #define BW_USB_OTGSTAT_SESS_VLD(v) (BITBAND_ACCESS8(HW_USB_OTGSTAT_ADDR, BP_USB_OTGSTAT_SESS_VLD) = (v)) |
mbed_official | 146:f64d43ff0c18 | 848 | #endif |
mbed_official | 146:f64d43ff0c18 | 849 | //@} |
mbed_official | 146:f64d43ff0c18 | 850 | |
mbed_official | 146:f64d43ff0c18 | 851 | /*! |
mbed_official | 146:f64d43ff0c18 | 852 | * @name Register USB_OTGSTAT, field LINESTATESTABLE[5] (RW) |
mbed_official | 146:f64d43ff0c18 | 853 | * |
mbed_official | 146:f64d43ff0c18 | 854 | * Indicates that the internal signals that control the LINE_STATE_CHG field of |
mbed_official | 146:f64d43ff0c18 | 855 | * OTGISTAT are stable for at least 1 millisecond. First read LINE_STATE_CHG |
mbed_official | 146:f64d43ff0c18 | 856 | * field and then read this field. If this field reads as 1, then the value of |
mbed_official | 146:f64d43ff0c18 | 857 | * LINE_STATE_CHG can be considered stable. |
mbed_official | 146:f64d43ff0c18 | 858 | * |
mbed_official | 146:f64d43ff0c18 | 859 | * Values: |
mbed_official | 146:f64d43ff0c18 | 860 | * - 0 - The LINE_STAT_CHG bit is not yet stable. |
mbed_official | 146:f64d43ff0c18 | 861 | * - 1 - The LINE_STAT_CHG bit has been debounced and is stable. |
mbed_official | 146:f64d43ff0c18 | 862 | */ |
mbed_official | 146:f64d43ff0c18 | 863 | //@{ |
mbed_official | 146:f64d43ff0c18 | 864 | #define BP_USB_OTGSTAT_LINESTATESTABLE (5U) //!< Bit position for USB_OTGSTAT_LINESTATESTABLE. |
mbed_official | 146:f64d43ff0c18 | 865 | #define BM_USB_OTGSTAT_LINESTATESTABLE (0x20U) //!< Bit mask for USB_OTGSTAT_LINESTATESTABLE. |
mbed_official | 146:f64d43ff0c18 | 866 | #define BS_USB_OTGSTAT_LINESTATESTABLE (1U) //!< Bit field size in bits for USB_OTGSTAT_LINESTATESTABLE. |
mbed_official | 146:f64d43ff0c18 | 867 | |
mbed_official | 146:f64d43ff0c18 | 868 | #ifndef __LANGUAGE_ASM__ |
mbed_official | 146:f64d43ff0c18 | 869 | //! @brief Read current value of the USB_OTGSTAT_LINESTATESTABLE field. |
mbed_official | 146:f64d43ff0c18 | 870 | #define BR_USB_OTGSTAT_LINESTATESTABLE (BITBAND_ACCESS8(HW_USB_OTGSTAT_ADDR, BP_USB_OTGSTAT_LINESTATESTABLE)) |
mbed_official | 146:f64d43ff0c18 | 871 | #endif |
mbed_official | 146:f64d43ff0c18 | 872 | |
mbed_official | 146:f64d43ff0c18 | 873 | //! @brief Format value for bitfield USB_OTGSTAT_LINESTATESTABLE. |
mbed_official | 146:f64d43ff0c18 | 874 | #define BF_USB_OTGSTAT_LINESTATESTABLE(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint8_t) << BP_USB_OTGSTAT_LINESTATESTABLE), uint8_t) & BM_USB_OTGSTAT_LINESTATESTABLE) |
mbed_official | 146:f64d43ff0c18 | 875 | |
mbed_official | 146:f64d43ff0c18 | 876 | #ifndef __LANGUAGE_ASM__ |
mbed_official | 146:f64d43ff0c18 | 877 | //! @brief Set the LINESTATESTABLE field to a new value. |
mbed_official | 146:f64d43ff0c18 | 878 | #define BW_USB_OTGSTAT_LINESTATESTABLE(v) (BITBAND_ACCESS8(HW_USB_OTGSTAT_ADDR, BP_USB_OTGSTAT_LINESTATESTABLE) = (v)) |
mbed_official | 146:f64d43ff0c18 | 879 | #endif |
mbed_official | 146:f64d43ff0c18 | 880 | //@} |
mbed_official | 146:f64d43ff0c18 | 881 | |
mbed_official | 146:f64d43ff0c18 | 882 | /*! |
mbed_official | 146:f64d43ff0c18 | 883 | * @name Register USB_OTGSTAT, field ONEMSECEN[6] (RW) |
mbed_official | 146:f64d43ff0c18 | 884 | * |
mbed_official | 146:f64d43ff0c18 | 885 | * This bit is reserved for the 1ms count, but it is not useful to software. |
mbed_official | 146:f64d43ff0c18 | 886 | */ |
mbed_official | 146:f64d43ff0c18 | 887 | //@{ |
mbed_official | 146:f64d43ff0c18 | 888 | #define BP_USB_OTGSTAT_ONEMSECEN (6U) //!< Bit position for USB_OTGSTAT_ONEMSECEN. |
mbed_official | 146:f64d43ff0c18 | 889 | #define BM_USB_OTGSTAT_ONEMSECEN (0x40U) //!< Bit mask for USB_OTGSTAT_ONEMSECEN. |
mbed_official | 146:f64d43ff0c18 | 890 | #define BS_USB_OTGSTAT_ONEMSECEN (1U) //!< Bit field size in bits for USB_OTGSTAT_ONEMSECEN. |
mbed_official | 146:f64d43ff0c18 | 891 | |
mbed_official | 146:f64d43ff0c18 | 892 | #ifndef __LANGUAGE_ASM__ |
mbed_official | 146:f64d43ff0c18 | 893 | //! @brief Read current value of the USB_OTGSTAT_ONEMSECEN field. |
mbed_official | 146:f64d43ff0c18 | 894 | #define BR_USB_OTGSTAT_ONEMSECEN (BITBAND_ACCESS8(HW_USB_OTGSTAT_ADDR, BP_USB_OTGSTAT_ONEMSECEN)) |
mbed_official | 146:f64d43ff0c18 | 895 | #endif |
mbed_official | 146:f64d43ff0c18 | 896 | |
mbed_official | 146:f64d43ff0c18 | 897 | //! @brief Format value for bitfield USB_OTGSTAT_ONEMSECEN. |
mbed_official | 146:f64d43ff0c18 | 898 | #define BF_USB_OTGSTAT_ONEMSECEN(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint8_t) << BP_USB_OTGSTAT_ONEMSECEN), uint8_t) & BM_USB_OTGSTAT_ONEMSECEN) |
mbed_official | 146:f64d43ff0c18 | 899 | |
mbed_official | 146:f64d43ff0c18 | 900 | #ifndef __LANGUAGE_ASM__ |
mbed_official | 146:f64d43ff0c18 | 901 | //! @brief Set the ONEMSECEN field to a new value. |
mbed_official | 146:f64d43ff0c18 | 902 | #define BW_USB_OTGSTAT_ONEMSECEN(v) (BITBAND_ACCESS8(HW_USB_OTGSTAT_ADDR, BP_USB_OTGSTAT_ONEMSECEN) = (v)) |
mbed_official | 146:f64d43ff0c18 | 903 | #endif |
mbed_official | 146:f64d43ff0c18 | 904 | //@} |
mbed_official | 146:f64d43ff0c18 | 905 | |
mbed_official | 146:f64d43ff0c18 | 906 | /*! |
mbed_official | 146:f64d43ff0c18 | 907 | * @name Register USB_OTGSTAT, field ID[7] (RW) |
mbed_official | 146:f64d43ff0c18 | 908 | * |
mbed_official | 146:f64d43ff0c18 | 909 | * Indicates the current state of the ID pin on the USB connector |
mbed_official | 146:f64d43ff0c18 | 910 | * |
mbed_official | 146:f64d43ff0c18 | 911 | * Values: |
mbed_official | 146:f64d43ff0c18 | 912 | * - 0 - Indicates a Type A cable is plugged into the USB connector. |
mbed_official | 146:f64d43ff0c18 | 913 | * - 1 - Indicates no cable is attached or a Type B cable is plugged into the |
mbed_official | 146:f64d43ff0c18 | 914 | * USB connector. |
mbed_official | 146:f64d43ff0c18 | 915 | */ |
mbed_official | 146:f64d43ff0c18 | 916 | //@{ |
mbed_official | 146:f64d43ff0c18 | 917 | #define BP_USB_OTGSTAT_ID (7U) //!< Bit position for USB_OTGSTAT_ID. |
mbed_official | 146:f64d43ff0c18 | 918 | #define BM_USB_OTGSTAT_ID (0x80U) //!< Bit mask for USB_OTGSTAT_ID. |
mbed_official | 146:f64d43ff0c18 | 919 | #define BS_USB_OTGSTAT_ID (1U) //!< Bit field size in bits for USB_OTGSTAT_ID. |
mbed_official | 146:f64d43ff0c18 | 920 | |
mbed_official | 146:f64d43ff0c18 | 921 | #ifndef __LANGUAGE_ASM__ |
mbed_official | 146:f64d43ff0c18 | 922 | //! @brief Read current value of the USB_OTGSTAT_ID field. |
mbed_official | 146:f64d43ff0c18 | 923 | #define BR_USB_OTGSTAT_ID (BITBAND_ACCESS8(HW_USB_OTGSTAT_ADDR, BP_USB_OTGSTAT_ID)) |
mbed_official | 146:f64d43ff0c18 | 924 | #endif |
mbed_official | 146:f64d43ff0c18 | 925 | |
mbed_official | 146:f64d43ff0c18 | 926 | //! @brief Format value for bitfield USB_OTGSTAT_ID. |
mbed_official | 146:f64d43ff0c18 | 927 | #define BF_USB_OTGSTAT_ID(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint8_t) << BP_USB_OTGSTAT_ID), uint8_t) & BM_USB_OTGSTAT_ID) |
mbed_official | 146:f64d43ff0c18 | 928 | |
mbed_official | 146:f64d43ff0c18 | 929 | #ifndef __LANGUAGE_ASM__ |
mbed_official | 146:f64d43ff0c18 | 930 | //! @brief Set the ID field to a new value. |
mbed_official | 146:f64d43ff0c18 | 931 | #define BW_USB_OTGSTAT_ID(v) (BITBAND_ACCESS8(HW_USB_OTGSTAT_ADDR, BP_USB_OTGSTAT_ID) = (v)) |
mbed_official | 146:f64d43ff0c18 | 932 | #endif |
mbed_official | 146:f64d43ff0c18 | 933 | //@} |
mbed_official | 146:f64d43ff0c18 | 934 | |
mbed_official | 146:f64d43ff0c18 | 935 | //------------------------------------------------------------------------------------------- |
mbed_official | 146:f64d43ff0c18 | 936 | // HW_USB_OTGCTL - OTG Control register |
mbed_official | 146:f64d43ff0c18 | 937 | //------------------------------------------------------------------------------------------- |
mbed_official | 146:f64d43ff0c18 | 938 | |
mbed_official | 146:f64d43ff0c18 | 939 | #ifndef __LANGUAGE_ASM__ |
mbed_official | 146:f64d43ff0c18 | 940 | /*! |
mbed_official | 146:f64d43ff0c18 | 941 | * @brief HW_USB_OTGCTL - OTG Control register (RW) |
mbed_official | 146:f64d43ff0c18 | 942 | * |
mbed_official | 146:f64d43ff0c18 | 943 | * Reset value: 0x00U |
mbed_official | 146:f64d43ff0c18 | 944 | * |
mbed_official | 146:f64d43ff0c18 | 945 | * Controls the operation of VBUS and Data Line termination resistors. |
mbed_official | 146:f64d43ff0c18 | 946 | */ |
mbed_official | 146:f64d43ff0c18 | 947 | typedef union _hw_usb_otgctl |
mbed_official | 146:f64d43ff0c18 | 948 | { |
mbed_official | 146:f64d43ff0c18 | 949 | uint8_t U; |
mbed_official | 146:f64d43ff0c18 | 950 | struct _hw_usb_otgctl_bitfields |
mbed_official | 146:f64d43ff0c18 | 951 | { |
mbed_official | 146:f64d43ff0c18 | 952 | uint8_t RESERVED0 : 2; //!< [1:0] |
mbed_official | 146:f64d43ff0c18 | 953 | uint8_t OTGEN : 1; //!< [2] On-The-Go pullup/pulldown resistor enable |
mbed_official | 146:f64d43ff0c18 | 954 | uint8_t RESERVED1 : 1; //!< [3] |
mbed_official | 146:f64d43ff0c18 | 955 | uint8_t DMLOW : 1; //!< [4] D- Data Line pull-down resistor enable |
mbed_official | 146:f64d43ff0c18 | 956 | uint8_t DPLOW : 1; //!< [5] D+ Data Line pull-down resistor enable |
mbed_official | 146:f64d43ff0c18 | 957 | uint8_t RESERVED2 : 1; //!< [6] |
mbed_official | 146:f64d43ff0c18 | 958 | uint8_t DPHIGH : 1; //!< [7] D+ Data Line pullup resistor enable |
mbed_official | 146:f64d43ff0c18 | 959 | } B; |
mbed_official | 146:f64d43ff0c18 | 960 | } hw_usb_otgctl_t; |
mbed_official | 146:f64d43ff0c18 | 961 | #endif |
mbed_official | 146:f64d43ff0c18 | 962 | |
mbed_official | 146:f64d43ff0c18 | 963 | /*! |
mbed_official | 146:f64d43ff0c18 | 964 | * @name Constants and macros for entire USB_OTGCTL register |
mbed_official | 146:f64d43ff0c18 | 965 | */ |
mbed_official | 146:f64d43ff0c18 | 966 | //@{ |
mbed_official | 146:f64d43ff0c18 | 967 | #define HW_USB_OTGCTL_ADDR (REGS_USB_BASE + 0x1CU) |
mbed_official | 146:f64d43ff0c18 | 968 | |
mbed_official | 146:f64d43ff0c18 | 969 | #ifndef __LANGUAGE_ASM__ |
mbed_official | 146:f64d43ff0c18 | 970 | #define HW_USB_OTGCTL (*(__IO hw_usb_otgctl_t *) HW_USB_OTGCTL_ADDR) |
mbed_official | 146:f64d43ff0c18 | 971 | #define HW_USB_OTGCTL_RD() (HW_USB_OTGCTL.U) |
mbed_official | 146:f64d43ff0c18 | 972 | #define HW_USB_OTGCTL_WR(v) (HW_USB_OTGCTL.U = (v)) |
mbed_official | 146:f64d43ff0c18 | 973 | #define HW_USB_OTGCTL_SET(v) (HW_USB_OTGCTL_WR(HW_USB_OTGCTL_RD() | (v))) |
mbed_official | 146:f64d43ff0c18 | 974 | #define HW_USB_OTGCTL_CLR(v) (HW_USB_OTGCTL_WR(HW_USB_OTGCTL_RD() & ~(v))) |
mbed_official | 146:f64d43ff0c18 | 975 | #define HW_USB_OTGCTL_TOG(v) (HW_USB_OTGCTL_WR(HW_USB_OTGCTL_RD() ^ (v))) |
mbed_official | 146:f64d43ff0c18 | 976 | #endif |
mbed_official | 146:f64d43ff0c18 | 977 | //@} |
mbed_official | 146:f64d43ff0c18 | 978 | |
mbed_official | 146:f64d43ff0c18 | 979 | /* |
mbed_official | 146:f64d43ff0c18 | 980 | * Constants & macros for individual USB_OTGCTL bitfields |
mbed_official | 146:f64d43ff0c18 | 981 | */ |
mbed_official | 146:f64d43ff0c18 | 982 | |
mbed_official | 146:f64d43ff0c18 | 983 | /*! |
mbed_official | 146:f64d43ff0c18 | 984 | * @name Register USB_OTGCTL, field OTGEN[2] (RW) |
mbed_official | 146:f64d43ff0c18 | 985 | * |
mbed_official | 146:f64d43ff0c18 | 986 | * Values: |
mbed_official | 146:f64d43ff0c18 | 987 | * - 0 - If USB_EN is 1 and HOST_MODE is 0 in the Control Register (CTL), then |
mbed_official | 146:f64d43ff0c18 | 988 | * the D+ Data Line pull-up resistors are enabled. If HOST_MODE is 1 the D+ |
mbed_official | 146:f64d43ff0c18 | 989 | * and D- Data Line pull-down resistors are engaged. |
mbed_official | 146:f64d43ff0c18 | 990 | * - 1 - The pull-up and pull-down controls in this register are used. |
mbed_official | 146:f64d43ff0c18 | 991 | */ |
mbed_official | 146:f64d43ff0c18 | 992 | //@{ |
mbed_official | 146:f64d43ff0c18 | 993 | #define BP_USB_OTGCTL_OTGEN (2U) //!< Bit position for USB_OTGCTL_OTGEN. |
mbed_official | 146:f64d43ff0c18 | 994 | #define BM_USB_OTGCTL_OTGEN (0x04U) //!< Bit mask for USB_OTGCTL_OTGEN. |
mbed_official | 146:f64d43ff0c18 | 995 | #define BS_USB_OTGCTL_OTGEN (1U) //!< Bit field size in bits for USB_OTGCTL_OTGEN. |
mbed_official | 146:f64d43ff0c18 | 996 | |
mbed_official | 146:f64d43ff0c18 | 997 | #ifndef __LANGUAGE_ASM__ |
mbed_official | 146:f64d43ff0c18 | 998 | //! @brief Read current value of the USB_OTGCTL_OTGEN field. |
mbed_official | 146:f64d43ff0c18 | 999 | #define BR_USB_OTGCTL_OTGEN (BITBAND_ACCESS8(HW_USB_OTGCTL_ADDR, BP_USB_OTGCTL_OTGEN)) |
mbed_official | 146:f64d43ff0c18 | 1000 | #endif |
mbed_official | 146:f64d43ff0c18 | 1001 | |
mbed_official | 146:f64d43ff0c18 | 1002 | //! @brief Format value for bitfield USB_OTGCTL_OTGEN. |
mbed_official | 146:f64d43ff0c18 | 1003 | #define BF_USB_OTGCTL_OTGEN(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint8_t) << BP_USB_OTGCTL_OTGEN), uint8_t) & BM_USB_OTGCTL_OTGEN) |
mbed_official | 146:f64d43ff0c18 | 1004 | |
mbed_official | 146:f64d43ff0c18 | 1005 | #ifndef __LANGUAGE_ASM__ |
mbed_official | 146:f64d43ff0c18 | 1006 | //! @brief Set the OTGEN field to a new value. |
mbed_official | 146:f64d43ff0c18 | 1007 | #define BW_USB_OTGCTL_OTGEN(v) (BITBAND_ACCESS8(HW_USB_OTGCTL_ADDR, BP_USB_OTGCTL_OTGEN) = (v)) |
mbed_official | 146:f64d43ff0c18 | 1008 | #endif |
mbed_official | 146:f64d43ff0c18 | 1009 | //@} |
mbed_official | 146:f64d43ff0c18 | 1010 | |
mbed_official | 146:f64d43ff0c18 | 1011 | /*! |
mbed_official | 146:f64d43ff0c18 | 1012 | * @name Register USB_OTGCTL, field DMLOW[4] (RW) |
mbed_official | 146:f64d43ff0c18 | 1013 | * |
mbed_official | 146:f64d43ff0c18 | 1014 | * Values: |
mbed_official | 146:f64d43ff0c18 | 1015 | * - 0 - D- pulldown resistor is not enabled. |
mbed_official | 146:f64d43ff0c18 | 1016 | * - 1 - D- pulldown resistor is enabled. |
mbed_official | 146:f64d43ff0c18 | 1017 | */ |
mbed_official | 146:f64d43ff0c18 | 1018 | //@{ |
mbed_official | 146:f64d43ff0c18 | 1019 | #define BP_USB_OTGCTL_DMLOW (4U) //!< Bit position for USB_OTGCTL_DMLOW. |
mbed_official | 146:f64d43ff0c18 | 1020 | #define BM_USB_OTGCTL_DMLOW (0x10U) //!< Bit mask for USB_OTGCTL_DMLOW. |
mbed_official | 146:f64d43ff0c18 | 1021 | #define BS_USB_OTGCTL_DMLOW (1U) //!< Bit field size in bits for USB_OTGCTL_DMLOW. |
mbed_official | 146:f64d43ff0c18 | 1022 | |
mbed_official | 146:f64d43ff0c18 | 1023 | #ifndef __LANGUAGE_ASM__ |
mbed_official | 146:f64d43ff0c18 | 1024 | //! @brief Read current value of the USB_OTGCTL_DMLOW field. |
mbed_official | 146:f64d43ff0c18 | 1025 | #define BR_USB_OTGCTL_DMLOW (BITBAND_ACCESS8(HW_USB_OTGCTL_ADDR, BP_USB_OTGCTL_DMLOW)) |
mbed_official | 146:f64d43ff0c18 | 1026 | #endif |
mbed_official | 146:f64d43ff0c18 | 1027 | |
mbed_official | 146:f64d43ff0c18 | 1028 | //! @brief Format value for bitfield USB_OTGCTL_DMLOW. |
mbed_official | 146:f64d43ff0c18 | 1029 | #define BF_USB_OTGCTL_DMLOW(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint8_t) << BP_USB_OTGCTL_DMLOW), uint8_t) & BM_USB_OTGCTL_DMLOW) |
mbed_official | 146:f64d43ff0c18 | 1030 | |
mbed_official | 146:f64d43ff0c18 | 1031 | #ifndef __LANGUAGE_ASM__ |
mbed_official | 146:f64d43ff0c18 | 1032 | //! @brief Set the DMLOW field to a new value. |
mbed_official | 146:f64d43ff0c18 | 1033 | #define BW_USB_OTGCTL_DMLOW(v) (BITBAND_ACCESS8(HW_USB_OTGCTL_ADDR, BP_USB_OTGCTL_DMLOW) = (v)) |
mbed_official | 146:f64d43ff0c18 | 1034 | #endif |
mbed_official | 146:f64d43ff0c18 | 1035 | //@} |
mbed_official | 146:f64d43ff0c18 | 1036 | |
mbed_official | 146:f64d43ff0c18 | 1037 | /*! |
mbed_official | 146:f64d43ff0c18 | 1038 | * @name Register USB_OTGCTL, field DPLOW[5] (RW) |
mbed_official | 146:f64d43ff0c18 | 1039 | * |
mbed_official | 146:f64d43ff0c18 | 1040 | * This bit should always be enabled together with bit 4 (DMLOW) |
mbed_official | 146:f64d43ff0c18 | 1041 | * |
mbed_official | 146:f64d43ff0c18 | 1042 | * Values: |
mbed_official | 146:f64d43ff0c18 | 1043 | * - 0 - D+ pulldown resistor is not enabled. |
mbed_official | 146:f64d43ff0c18 | 1044 | * - 1 - D+ pulldown resistor is enabled. |
mbed_official | 146:f64d43ff0c18 | 1045 | */ |
mbed_official | 146:f64d43ff0c18 | 1046 | //@{ |
mbed_official | 146:f64d43ff0c18 | 1047 | #define BP_USB_OTGCTL_DPLOW (5U) //!< Bit position for USB_OTGCTL_DPLOW. |
mbed_official | 146:f64d43ff0c18 | 1048 | #define BM_USB_OTGCTL_DPLOW (0x20U) //!< Bit mask for USB_OTGCTL_DPLOW. |
mbed_official | 146:f64d43ff0c18 | 1049 | #define BS_USB_OTGCTL_DPLOW (1U) //!< Bit field size in bits for USB_OTGCTL_DPLOW. |
mbed_official | 146:f64d43ff0c18 | 1050 | |
mbed_official | 146:f64d43ff0c18 | 1051 | #ifndef __LANGUAGE_ASM__ |
mbed_official | 146:f64d43ff0c18 | 1052 | //! @brief Read current value of the USB_OTGCTL_DPLOW field. |
mbed_official | 146:f64d43ff0c18 | 1053 | #define BR_USB_OTGCTL_DPLOW (BITBAND_ACCESS8(HW_USB_OTGCTL_ADDR, BP_USB_OTGCTL_DPLOW)) |
mbed_official | 146:f64d43ff0c18 | 1054 | #endif |
mbed_official | 146:f64d43ff0c18 | 1055 | |
mbed_official | 146:f64d43ff0c18 | 1056 | //! @brief Format value for bitfield USB_OTGCTL_DPLOW. |
mbed_official | 146:f64d43ff0c18 | 1057 | #define BF_USB_OTGCTL_DPLOW(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint8_t) << BP_USB_OTGCTL_DPLOW), uint8_t) & BM_USB_OTGCTL_DPLOW) |
mbed_official | 146:f64d43ff0c18 | 1058 | |
mbed_official | 146:f64d43ff0c18 | 1059 | #ifndef __LANGUAGE_ASM__ |
mbed_official | 146:f64d43ff0c18 | 1060 | //! @brief Set the DPLOW field to a new value. |
mbed_official | 146:f64d43ff0c18 | 1061 | #define BW_USB_OTGCTL_DPLOW(v) (BITBAND_ACCESS8(HW_USB_OTGCTL_ADDR, BP_USB_OTGCTL_DPLOW) = (v)) |
mbed_official | 146:f64d43ff0c18 | 1062 | #endif |
mbed_official | 146:f64d43ff0c18 | 1063 | //@} |
mbed_official | 146:f64d43ff0c18 | 1064 | |
mbed_official | 146:f64d43ff0c18 | 1065 | /*! |
mbed_official | 146:f64d43ff0c18 | 1066 | * @name Register USB_OTGCTL, field DPHIGH[7] (RW) |
mbed_official | 146:f64d43ff0c18 | 1067 | * |
mbed_official | 146:f64d43ff0c18 | 1068 | * Values: |
mbed_official | 146:f64d43ff0c18 | 1069 | * - 0 - D+ pullup resistor is not enabled |
mbed_official | 146:f64d43ff0c18 | 1070 | * - 1 - D+ pullup resistor is enabled |
mbed_official | 146:f64d43ff0c18 | 1071 | */ |
mbed_official | 146:f64d43ff0c18 | 1072 | //@{ |
mbed_official | 146:f64d43ff0c18 | 1073 | #define BP_USB_OTGCTL_DPHIGH (7U) //!< Bit position for USB_OTGCTL_DPHIGH. |
mbed_official | 146:f64d43ff0c18 | 1074 | #define BM_USB_OTGCTL_DPHIGH (0x80U) //!< Bit mask for USB_OTGCTL_DPHIGH. |
mbed_official | 146:f64d43ff0c18 | 1075 | #define BS_USB_OTGCTL_DPHIGH (1U) //!< Bit field size in bits for USB_OTGCTL_DPHIGH. |
mbed_official | 146:f64d43ff0c18 | 1076 | |
mbed_official | 146:f64d43ff0c18 | 1077 | #ifndef __LANGUAGE_ASM__ |
mbed_official | 146:f64d43ff0c18 | 1078 | //! @brief Read current value of the USB_OTGCTL_DPHIGH field. |
mbed_official | 146:f64d43ff0c18 | 1079 | #define BR_USB_OTGCTL_DPHIGH (BITBAND_ACCESS8(HW_USB_OTGCTL_ADDR, BP_USB_OTGCTL_DPHIGH)) |
mbed_official | 146:f64d43ff0c18 | 1080 | #endif |
mbed_official | 146:f64d43ff0c18 | 1081 | |
mbed_official | 146:f64d43ff0c18 | 1082 | //! @brief Format value for bitfield USB_OTGCTL_DPHIGH. |
mbed_official | 146:f64d43ff0c18 | 1083 | #define BF_USB_OTGCTL_DPHIGH(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint8_t) << BP_USB_OTGCTL_DPHIGH), uint8_t) & BM_USB_OTGCTL_DPHIGH) |
mbed_official | 146:f64d43ff0c18 | 1084 | |
mbed_official | 146:f64d43ff0c18 | 1085 | #ifndef __LANGUAGE_ASM__ |
mbed_official | 146:f64d43ff0c18 | 1086 | //! @brief Set the DPHIGH field to a new value. |
mbed_official | 146:f64d43ff0c18 | 1087 | #define BW_USB_OTGCTL_DPHIGH(v) (BITBAND_ACCESS8(HW_USB_OTGCTL_ADDR, BP_USB_OTGCTL_DPHIGH) = (v)) |
mbed_official | 146:f64d43ff0c18 | 1088 | #endif |
mbed_official | 146:f64d43ff0c18 | 1089 | //@} |
mbed_official | 146:f64d43ff0c18 | 1090 | |
mbed_official | 146:f64d43ff0c18 | 1091 | //------------------------------------------------------------------------------------------- |
mbed_official | 146:f64d43ff0c18 | 1092 | // HW_USB_ISTAT - Interrupt Status register |
mbed_official | 146:f64d43ff0c18 | 1093 | //------------------------------------------------------------------------------------------- |
mbed_official | 146:f64d43ff0c18 | 1094 | |
mbed_official | 146:f64d43ff0c18 | 1095 | #ifndef __LANGUAGE_ASM__ |
mbed_official | 146:f64d43ff0c18 | 1096 | /*! |
mbed_official | 146:f64d43ff0c18 | 1097 | * @brief HW_USB_ISTAT - Interrupt Status register (W1C) |
mbed_official | 146:f64d43ff0c18 | 1098 | * |
mbed_official | 146:f64d43ff0c18 | 1099 | * Reset value: 0x00U |
mbed_official | 146:f64d43ff0c18 | 1100 | * |
mbed_official | 146:f64d43ff0c18 | 1101 | * Contains fields for each of the interrupt sources within the USB Module. Each |
mbed_official | 146:f64d43ff0c18 | 1102 | * of these fields are qualified with their respective interrupt enable bits. |
mbed_official | 146:f64d43ff0c18 | 1103 | * All fields of this register are logically OR'd together along with the OTG |
mbed_official | 146:f64d43ff0c18 | 1104 | * Interrupt Status Register (OTGSTAT) to form a single interrupt source for the |
mbed_official | 146:f64d43ff0c18 | 1105 | * processor's interrupt controller. After an interrupt bit has been set it may only |
mbed_official | 146:f64d43ff0c18 | 1106 | * be cleared by writing a one to the respective interrupt bit. This register |
mbed_official | 146:f64d43ff0c18 | 1107 | * contains the value of 0x00 after a reset. |
mbed_official | 146:f64d43ff0c18 | 1108 | */ |
mbed_official | 146:f64d43ff0c18 | 1109 | typedef union _hw_usb_istat |
mbed_official | 146:f64d43ff0c18 | 1110 | { |
mbed_official | 146:f64d43ff0c18 | 1111 | uint8_t U; |
mbed_official | 146:f64d43ff0c18 | 1112 | struct _hw_usb_istat_bitfields |
mbed_official | 146:f64d43ff0c18 | 1113 | { |
mbed_official | 146:f64d43ff0c18 | 1114 | uint8_t USBRST : 1; //!< [0] |
mbed_official | 146:f64d43ff0c18 | 1115 | uint8_t ERROR : 1; //!< [1] |
mbed_official | 146:f64d43ff0c18 | 1116 | uint8_t SOFTOK : 1; //!< [2] |
mbed_official | 146:f64d43ff0c18 | 1117 | uint8_t TOKDNE : 1; //!< [3] |
mbed_official | 146:f64d43ff0c18 | 1118 | uint8_t SLEEP : 1; //!< [4] |
mbed_official | 146:f64d43ff0c18 | 1119 | uint8_t RESUME : 1; //!< [5] |
mbed_official | 146:f64d43ff0c18 | 1120 | uint8_t ATTACH : 1; //!< [6] Attach Interrupt |
mbed_official | 146:f64d43ff0c18 | 1121 | uint8_t STALL : 1; //!< [7] Stall Interrupt |
mbed_official | 146:f64d43ff0c18 | 1122 | } B; |
mbed_official | 146:f64d43ff0c18 | 1123 | } hw_usb_istat_t; |
mbed_official | 146:f64d43ff0c18 | 1124 | #endif |
mbed_official | 146:f64d43ff0c18 | 1125 | |
mbed_official | 146:f64d43ff0c18 | 1126 | /*! |
mbed_official | 146:f64d43ff0c18 | 1127 | * @name Constants and macros for entire USB_ISTAT register |
mbed_official | 146:f64d43ff0c18 | 1128 | */ |
mbed_official | 146:f64d43ff0c18 | 1129 | //@{ |
mbed_official | 146:f64d43ff0c18 | 1130 | #define HW_USB_ISTAT_ADDR (REGS_USB_BASE + 0x80U) |
mbed_official | 146:f64d43ff0c18 | 1131 | |
mbed_official | 146:f64d43ff0c18 | 1132 | #ifndef __LANGUAGE_ASM__ |
mbed_official | 146:f64d43ff0c18 | 1133 | #define HW_USB_ISTAT (*(__IO hw_usb_istat_t *) HW_USB_ISTAT_ADDR) |
mbed_official | 146:f64d43ff0c18 | 1134 | #define HW_USB_ISTAT_RD() (HW_USB_ISTAT.U) |
mbed_official | 146:f64d43ff0c18 | 1135 | #define HW_USB_ISTAT_WR(v) (HW_USB_ISTAT.U = (v)) |
mbed_official | 146:f64d43ff0c18 | 1136 | #define HW_USB_ISTAT_SET(v) (HW_USB_ISTAT_WR(HW_USB_ISTAT_RD() | (v))) |
mbed_official | 146:f64d43ff0c18 | 1137 | #define HW_USB_ISTAT_CLR(v) (HW_USB_ISTAT_WR(HW_USB_ISTAT_RD() & ~(v))) |
mbed_official | 146:f64d43ff0c18 | 1138 | #define HW_USB_ISTAT_TOG(v) (HW_USB_ISTAT_WR(HW_USB_ISTAT_RD() ^ (v))) |
mbed_official | 146:f64d43ff0c18 | 1139 | #endif |
mbed_official | 146:f64d43ff0c18 | 1140 | //@} |
mbed_official | 146:f64d43ff0c18 | 1141 | |
mbed_official | 146:f64d43ff0c18 | 1142 | /* |
mbed_official | 146:f64d43ff0c18 | 1143 | * Constants & macros for individual USB_ISTAT bitfields |
mbed_official | 146:f64d43ff0c18 | 1144 | */ |
mbed_official | 146:f64d43ff0c18 | 1145 | |
mbed_official | 146:f64d43ff0c18 | 1146 | /*! |
mbed_official | 146:f64d43ff0c18 | 1147 | * @name Register USB_ISTAT, field USBRST[0] (W1C) |
mbed_official | 146:f64d43ff0c18 | 1148 | * |
mbed_official | 146:f64d43ff0c18 | 1149 | * This bit is set when the USB Module has decoded a valid USB reset. This |
mbed_official | 146:f64d43ff0c18 | 1150 | * informs the processor that it should write 0x00 into the address register and |
mbed_official | 146:f64d43ff0c18 | 1151 | * enable endpoint 0. USBRST is set after a USB reset has been detected for 2.5 |
mbed_official | 146:f64d43ff0c18 | 1152 | * microseconds. It is not asserted again until the USB reset condition has been |
mbed_official | 146:f64d43ff0c18 | 1153 | * removed and then reasserted. |
mbed_official | 146:f64d43ff0c18 | 1154 | */ |
mbed_official | 146:f64d43ff0c18 | 1155 | //@{ |
mbed_official | 146:f64d43ff0c18 | 1156 | #define BP_USB_ISTAT_USBRST (0U) //!< Bit position for USB_ISTAT_USBRST. |
mbed_official | 146:f64d43ff0c18 | 1157 | #define BM_USB_ISTAT_USBRST (0x01U) //!< Bit mask for USB_ISTAT_USBRST. |
mbed_official | 146:f64d43ff0c18 | 1158 | #define BS_USB_ISTAT_USBRST (1U) //!< Bit field size in bits for USB_ISTAT_USBRST. |
mbed_official | 146:f64d43ff0c18 | 1159 | |
mbed_official | 146:f64d43ff0c18 | 1160 | #ifndef __LANGUAGE_ASM__ |
mbed_official | 146:f64d43ff0c18 | 1161 | //! @brief Read current value of the USB_ISTAT_USBRST field. |
mbed_official | 146:f64d43ff0c18 | 1162 | #define BR_USB_ISTAT_USBRST (BITBAND_ACCESS8(HW_USB_ISTAT_ADDR, BP_USB_ISTAT_USBRST)) |
mbed_official | 146:f64d43ff0c18 | 1163 | #endif |
mbed_official | 146:f64d43ff0c18 | 1164 | |
mbed_official | 146:f64d43ff0c18 | 1165 | //! @brief Format value for bitfield USB_ISTAT_USBRST. |
mbed_official | 146:f64d43ff0c18 | 1166 | #define BF_USB_ISTAT_USBRST(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint8_t) << BP_USB_ISTAT_USBRST), uint8_t) & BM_USB_ISTAT_USBRST) |
mbed_official | 146:f64d43ff0c18 | 1167 | |
mbed_official | 146:f64d43ff0c18 | 1168 | #ifndef __LANGUAGE_ASM__ |
mbed_official | 146:f64d43ff0c18 | 1169 | //! @brief Set the USBRST field to a new value. |
mbed_official | 146:f64d43ff0c18 | 1170 | #define BW_USB_ISTAT_USBRST(v) (BITBAND_ACCESS8(HW_USB_ISTAT_ADDR, BP_USB_ISTAT_USBRST) = (v)) |
mbed_official | 146:f64d43ff0c18 | 1171 | #endif |
mbed_official | 146:f64d43ff0c18 | 1172 | //@} |
mbed_official | 146:f64d43ff0c18 | 1173 | |
mbed_official | 146:f64d43ff0c18 | 1174 | /*! |
mbed_official | 146:f64d43ff0c18 | 1175 | * @name Register USB_ISTAT, field ERROR[1] (W1C) |
mbed_official | 146:f64d43ff0c18 | 1176 | * |
mbed_official | 146:f64d43ff0c18 | 1177 | * This bit is set when any of the error conditions within Error Interrupt |
mbed_official | 146:f64d43ff0c18 | 1178 | * Status (ERRSTAT) register occur. The processor must then read the ERRSTAT register |
mbed_official | 146:f64d43ff0c18 | 1179 | * to determine the source of the error. |
mbed_official | 146:f64d43ff0c18 | 1180 | */ |
mbed_official | 146:f64d43ff0c18 | 1181 | //@{ |
mbed_official | 146:f64d43ff0c18 | 1182 | #define BP_USB_ISTAT_ERROR (1U) //!< Bit position for USB_ISTAT_ERROR. |
mbed_official | 146:f64d43ff0c18 | 1183 | #define BM_USB_ISTAT_ERROR (0x02U) //!< Bit mask for USB_ISTAT_ERROR. |
mbed_official | 146:f64d43ff0c18 | 1184 | #define BS_USB_ISTAT_ERROR (1U) //!< Bit field size in bits for USB_ISTAT_ERROR. |
mbed_official | 146:f64d43ff0c18 | 1185 | |
mbed_official | 146:f64d43ff0c18 | 1186 | #ifndef __LANGUAGE_ASM__ |
mbed_official | 146:f64d43ff0c18 | 1187 | //! @brief Read current value of the USB_ISTAT_ERROR field. |
mbed_official | 146:f64d43ff0c18 | 1188 | #define BR_USB_ISTAT_ERROR (BITBAND_ACCESS8(HW_USB_ISTAT_ADDR, BP_USB_ISTAT_ERROR)) |
mbed_official | 146:f64d43ff0c18 | 1189 | #endif |
mbed_official | 146:f64d43ff0c18 | 1190 | |
mbed_official | 146:f64d43ff0c18 | 1191 | //! @brief Format value for bitfield USB_ISTAT_ERROR. |
mbed_official | 146:f64d43ff0c18 | 1192 | #define BF_USB_ISTAT_ERROR(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint8_t) << BP_USB_ISTAT_ERROR), uint8_t) & BM_USB_ISTAT_ERROR) |
mbed_official | 146:f64d43ff0c18 | 1193 | |
mbed_official | 146:f64d43ff0c18 | 1194 | #ifndef __LANGUAGE_ASM__ |
mbed_official | 146:f64d43ff0c18 | 1195 | //! @brief Set the ERROR field to a new value. |
mbed_official | 146:f64d43ff0c18 | 1196 | #define BW_USB_ISTAT_ERROR(v) (BITBAND_ACCESS8(HW_USB_ISTAT_ADDR, BP_USB_ISTAT_ERROR) = (v)) |
mbed_official | 146:f64d43ff0c18 | 1197 | #endif |
mbed_official | 146:f64d43ff0c18 | 1198 | //@} |
mbed_official | 146:f64d43ff0c18 | 1199 | |
mbed_official | 146:f64d43ff0c18 | 1200 | /*! |
mbed_official | 146:f64d43ff0c18 | 1201 | * @name Register USB_ISTAT, field SOFTOK[2] (W1C) |
mbed_official | 146:f64d43ff0c18 | 1202 | * |
mbed_official | 146:f64d43ff0c18 | 1203 | * This bit is set when the USB Module receives a Start Of Frame (SOF) token. In |
mbed_official | 146:f64d43ff0c18 | 1204 | * Host mode this field is set when the SOF threshold is reached, so that |
mbed_official | 146:f64d43ff0c18 | 1205 | * software can prepare for the next SOF. |
mbed_official | 146:f64d43ff0c18 | 1206 | */ |
mbed_official | 146:f64d43ff0c18 | 1207 | //@{ |
mbed_official | 146:f64d43ff0c18 | 1208 | #define BP_USB_ISTAT_SOFTOK (2U) //!< Bit position for USB_ISTAT_SOFTOK. |
mbed_official | 146:f64d43ff0c18 | 1209 | #define BM_USB_ISTAT_SOFTOK (0x04U) //!< Bit mask for USB_ISTAT_SOFTOK. |
mbed_official | 146:f64d43ff0c18 | 1210 | #define BS_USB_ISTAT_SOFTOK (1U) //!< Bit field size in bits for USB_ISTAT_SOFTOK. |
mbed_official | 146:f64d43ff0c18 | 1211 | |
mbed_official | 146:f64d43ff0c18 | 1212 | #ifndef __LANGUAGE_ASM__ |
mbed_official | 146:f64d43ff0c18 | 1213 | //! @brief Read current value of the USB_ISTAT_SOFTOK field. |
mbed_official | 146:f64d43ff0c18 | 1214 | #define BR_USB_ISTAT_SOFTOK (BITBAND_ACCESS8(HW_USB_ISTAT_ADDR, BP_USB_ISTAT_SOFTOK)) |
mbed_official | 146:f64d43ff0c18 | 1215 | #endif |
mbed_official | 146:f64d43ff0c18 | 1216 | |
mbed_official | 146:f64d43ff0c18 | 1217 | //! @brief Format value for bitfield USB_ISTAT_SOFTOK. |
mbed_official | 146:f64d43ff0c18 | 1218 | #define BF_USB_ISTAT_SOFTOK(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint8_t) << BP_USB_ISTAT_SOFTOK), uint8_t) & BM_USB_ISTAT_SOFTOK) |
mbed_official | 146:f64d43ff0c18 | 1219 | |
mbed_official | 146:f64d43ff0c18 | 1220 | #ifndef __LANGUAGE_ASM__ |
mbed_official | 146:f64d43ff0c18 | 1221 | //! @brief Set the SOFTOK field to a new value. |
mbed_official | 146:f64d43ff0c18 | 1222 | #define BW_USB_ISTAT_SOFTOK(v) (BITBAND_ACCESS8(HW_USB_ISTAT_ADDR, BP_USB_ISTAT_SOFTOK) = (v)) |
mbed_official | 146:f64d43ff0c18 | 1223 | #endif |
mbed_official | 146:f64d43ff0c18 | 1224 | //@} |
mbed_official | 146:f64d43ff0c18 | 1225 | |
mbed_official | 146:f64d43ff0c18 | 1226 | /*! |
mbed_official | 146:f64d43ff0c18 | 1227 | * @name Register USB_ISTAT, field TOKDNE[3] (W1C) |
mbed_official | 146:f64d43ff0c18 | 1228 | * |
mbed_official | 146:f64d43ff0c18 | 1229 | * This bit is set when the current token being processed has completed. The |
mbed_official | 146:f64d43ff0c18 | 1230 | * processor must immediately read the STATUS (STAT) register to determine the |
mbed_official | 146:f64d43ff0c18 | 1231 | * EndPoint and BD used for this token. Clearing this bit (by writing a one) causes |
mbed_official | 146:f64d43ff0c18 | 1232 | * STAT to be cleared or the STAT holding register to be loaded into the STAT |
mbed_official | 146:f64d43ff0c18 | 1233 | * register. |
mbed_official | 146:f64d43ff0c18 | 1234 | */ |
mbed_official | 146:f64d43ff0c18 | 1235 | //@{ |
mbed_official | 146:f64d43ff0c18 | 1236 | #define BP_USB_ISTAT_TOKDNE (3U) //!< Bit position for USB_ISTAT_TOKDNE. |
mbed_official | 146:f64d43ff0c18 | 1237 | #define BM_USB_ISTAT_TOKDNE (0x08U) //!< Bit mask for USB_ISTAT_TOKDNE. |
mbed_official | 146:f64d43ff0c18 | 1238 | #define BS_USB_ISTAT_TOKDNE (1U) //!< Bit field size in bits for USB_ISTAT_TOKDNE. |
mbed_official | 146:f64d43ff0c18 | 1239 | |
mbed_official | 146:f64d43ff0c18 | 1240 | #ifndef __LANGUAGE_ASM__ |
mbed_official | 146:f64d43ff0c18 | 1241 | //! @brief Read current value of the USB_ISTAT_TOKDNE field. |
mbed_official | 146:f64d43ff0c18 | 1242 | #define BR_USB_ISTAT_TOKDNE (BITBAND_ACCESS8(HW_USB_ISTAT_ADDR, BP_USB_ISTAT_TOKDNE)) |
mbed_official | 146:f64d43ff0c18 | 1243 | #endif |
mbed_official | 146:f64d43ff0c18 | 1244 | |
mbed_official | 146:f64d43ff0c18 | 1245 | //! @brief Format value for bitfield USB_ISTAT_TOKDNE. |
mbed_official | 146:f64d43ff0c18 | 1246 | #define BF_USB_ISTAT_TOKDNE(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint8_t) << BP_USB_ISTAT_TOKDNE), uint8_t) & BM_USB_ISTAT_TOKDNE) |
mbed_official | 146:f64d43ff0c18 | 1247 | |
mbed_official | 146:f64d43ff0c18 | 1248 | #ifndef __LANGUAGE_ASM__ |
mbed_official | 146:f64d43ff0c18 | 1249 | //! @brief Set the TOKDNE field to a new value. |
mbed_official | 146:f64d43ff0c18 | 1250 | #define BW_USB_ISTAT_TOKDNE(v) (BITBAND_ACCESS8(HW_USB_ISTAT_ADDR, BP_USB_ISTAT_TOKDNE) = (v)) |
mbed_official | 146:f64d43ff0c18 | 1251 | #endif |
mbed_official | 146:f64d43ff0c18 | 1252 | //@} |
mbed_official | 146:f64d43ff0c18 | 1253 | |
mbed_official | 146:f64d43ff0c18 | 1254 | /*! |
mbed_official | 146:f64d43ff0c18 | 1255 | * @name Register USB_ISTAT, field SLEEP[4] (W1C) |
mbed_official | 146:f64d43ff0c18 | 1256 | * |
mbed_official | 146:f64d43ff0c18 | 1257 | * This bit is set when the USB Module detects a constant idle on the USB bus |
mbed_official | 146:f64d43ff0c18 | 1258 | * for 3 ms. The sleep timer is reset by activity on the USB bus. |
mbed_official | 146:f64d43ff0c18 | 1259 | */ |
mbed_official | 146:f64d43ff0c18 | 1260 | //@{ |
mbed_official | 146:f64d43ff0c18 | 1261 | #define BP_USB_ISTAT_SLEEP (4U) //!< Bit position for USB_ISTAT_SLEEP. |
mbed_official | 146:f64d43ff0c18 | 1262 | #define BM_USB_ISTAT_SLEEP (0x10U) //!< Bit mask for USB_ISTAT_SLEEP. |
mbed_official | 146:f64d43ff0c18 | 1263 | #define BS_USB_ISTAT_SLEEP (1U) //!< Bit field size in bits for USB_ISTAT_SLEEP. |
mbed_official | 146:f64d43ff0c18 | 1264 | |
mbed_official | 146:f64d43ff0c18 | 1265 | #ifndef __LANGUAGE_ASM__ |
mbed_official | 146:f64d43ff0c18 | 1266 | //! @brief Read current value of the USB_ISTAT_SLEEP field. |
mbed_official | 146:f64d43ff0c18 | 1267 | #define BR_USB_ISTAT_SLEEP (BITBAND_ACCESS8(HW_USB_ISTAT_ADDR, BP_USB_ISTAT_SLEEP)) |
mbed_official | 146:f64d43ff0c18 | 1268 | #endif |
mbed_official | 146:f64d43ff0c18 | 1269 | |
mbed_official | 146:f64d43ff0c18 | 1270 | //! @brief Format value for bitfield USB_ISTAT_SLEEP. |
mbed_official | 146:f64d43ff0c18 | 1271 | #define BF_USB_ISTAT_SLEEP(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint8_t) << BP_USB_ISTAT_SLEEP), uint8_t) & BM_USB_ISTAT_SLEEP) |
mbed_official | 146:f64d43ff0c18 | 1272 | |
mbed_official | 146:f64d43ff0c18 | 1273 | #ifndef __LANGUAGE_ASM__ |
mbed_official | 146:f64d43ff0c18 | 1274 | //! @brief Set the SLEEP field to a new value. |
mbed_official | 146:f64d43ff0c18 | 1275 | #define BW_USB_ISTAT_SLEEP(v) (BITBAND_ACCESS8(HW_USB_ISTAT_ADDR, BP_USB_ISTAT_SLEEP) = (v)) |
mbed_official | 146:f64d43ff0c18 | 1276 | #endif |
mbed_official | 146:f64d43ff0c18 | 1277 | //@} |
mbed_official | 146:f64d43ff0c18 | 1278 | |
mbed_official | 146:f64d43ff0c18 | 1279 | /*! |
mbed_official | 146:f64d43ff0c18 | 1280 | * @name Register USB_ISTAT, field RESUME[5] (W1C) |
mbed_official | 146:f64d43ff0c18 | 1281 | * |
mbed_official | 146:f64d43ff0c18 | 1282 | * This bit is set when a K-state is observed on the DP/DM signals for 2.5 us. |
mbed_official | 146:f64d43ff0c18 | 1283 | * When not in suspend mode this interrupt must be disabled. |
mbed_official | 146:f64d43ff0c18 | 1284 | */ |
mbed_official | 146:f64d43ff0c18 | 1285 | //@{ |
mbed_official | 146:f64d43ff0c18 | 1286 | #define BP_USB_ISTAT_RESUME (5U) //!< Bit position for USB_ISTAT_RESUME. |
mbed_official | 146:f64d43ff0c18 | 1287 | #define BM_USB_ISTAT_RESUME (0x20U) //!< Bit mask for USB_ISTAT_RESUME. |
mbed_official | 146:f64d43ff0c18 | 1288 | #define BS_USB_ISTAT_RESUME (1U) //!< Bit field size in bits for USB_ISTAT_RESUME. |
mbed_official | 146:f64d43ff0c18 | 1289 | |
mbed_official | 146:f64d43ff0c18 | 1290 | #ifndef __LANGUAGE_ASM__ |
mbed_official | 146:f64d43ff0c18 | 1291 | //! @brief Read current value of the USB_ISTAT_RESUME field. |
mbed_official | 146:f64d43ff0c18 | 1292 | #define BR_USB_ISTAT_RESUME (BITBAND_ACCESS8(HW_USB_ISTAT_ADDR, BP_USB_ISTAT_RESUME)) |
mbed_official | 146:f64d43ff0c18 | 1293 | #endif |
mbed_official | 146:f64d43ff0c18 | 1294 | |
mbed_official | 146:f64d43ff0c18 | 1295 | //! @brief Format value for bitfield USB_ISTAT_RESUME. |
mbed_official | 146:f64d43ff0c18 | 1296 | #define BF_USB_ISTAT_RESUME(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint8_t) << BP_USB_ISTAT_RESUME), uint8_t) & BM_USB_ISTAT_RESUME) |
mbed_official | 146:f64d43ff0c18 | 1297 | |
mbed_official | 146:f64d43ff0c18 | 1298 | #ifndef __LANGUAGE_ASM__ |
mbed_official | 146:f64d43ff0c18 | 1299 | //! @brief Set the RESUME field to a new value. |
mbed_official | 146:f64d43ff0c18 | 1300 | #define BW_USB_ISTAT_RESUME(v) (BITBAND_ACCESS8(HW_USB_ISTAT_ADDR, BP_USB_ISTAT_RESUME) = (v)) |
mbed_official | 146:f64d43ff0c18 | 1301 | #endif |
mbed_official | 146:f64d43ff0c18 | 1302 | //@} |
mbed_official | 146:f64d43ff0c18 | 1303 | |
mbed_official | 146:f64d43ff0c18 | 1304 | /*! |
mbed_official | 146:f64d43ff0c18 | 1305 | * @name Register USB_ISTAT, field ATTACH[6] (W1C) |
mbed_official | 146:f64d43ff0c18 | 1306 | * |
mbed_official | 146:f64d43ff0c18 | 1307 | * This bit is set when the USB Module detects an attach of a USB device. This |
mbed_official | 146:f64d43ff0c18 | 1308 | * signal is only valid if HOSTMODEEN is true. This interrupt signifies that a |
mbed_official | 146:f64d43ff0c18 | 1309 | * peripheral is now present and must be configured; it is asserted if there have |
mbed_official | 146:f64d43ff0c18 | 1310 | * been no transitions on the USB for 2.5 us and the current bus state is not SE0." |
mbed_official | 146:f64d43ff0c18 | 1311 | */ |
mbed_official | 146:f64d43ff0c18 | 1312 | //@{ |
mbed_official | 146:f64d43ff0c18 | 1313 | #define BP_USB_ISTAT_ATTACH (6U) //!< Bit position for USB_ISTAT_ATTACH. |
mbed_official | 146:f64d43ff0c18 | 1314 | #define BM_USB_ISTAT_ATTACH (0x40U) //!< Bit mask for USB_ISTAT_ATTACH. |
mbed_official | 146:f64d43ff0c18 | 1315 | #define BS_USB_ISTAT_ATTACH (1U) //!< Bit field size in bits for USB_ISTAT_ATTACH. |
mbed_official | 146:f64d43ff0c18 | 1316 | |
mbed_official | 146:f64d43ff0c18 | 1317 | #ifndef __LANGUAGE_ASM__ |
mbed_official | 146:f64d43ff0c18 | 1318 | //! @brief Read current value of the USB_ISTAT_ATTACH field. |
mbed_official | 146:f64d43ff0c18 | 1319 | #define BR_USB_ISTAT_ATTACH (BITBAND_ACCESS8(HW_USB_ISTAT_ADDR, BP_USB_ISTAT_ATTACH)) |
mbed_official | 146:f64d43ff0c18 | 1320 | #endif |
mbed_official | 146:f64d43ff0c18 | 1321 | |
mbed_official | 146:f64d43ff0c18 | 1322 | //! @brief Format value for bitfield USB_ISTAT_ATTACH. |
mbed_official | 146:f64d43ff0c18 | 1323 | #define BF_USB_ISTAT_ATTACH(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint8_t) << BP_USB_ISTAT_ATTACH), uint8_t) & BM_USB_ISTAT_ATTACH) |
mbed_official | 146:f64d43ff0c18 | 1324 | |
mbed_official | 146:f64d43ff0c18 | 1325 | #ifndef __LANGUAGE_ASM__ |
mbed_official | 146:f64d43ff0c18 | 1326 | //! @brief Set the ATTACH field to a new value. |
mbed_official | 146:f64d43ff0c18 | 1327 | #define BW_USB_ISTAT_ATTACH(v) (BITBAND_ACCESS8(HW_USB_ISTAT_ADDR, BP_USB_ISTAT_ATTACH) = (v)) |
mbed_official | 146:f64d43ff0c18 | 1328 | #endif |
mbed_official | 146:f64d43ff0c18 | 1329 | //@} |
mbed_official | 146:f64d43ff0c18 | 1330 | |
mbed_official | 146:f64d43ff0c18 | 1331 | /*! |
mbed_official | 146:f64d43ff0c18 | 1332 | * @name Register USB_ISTAT, field STALL[7] (W1C) |
mbed_official | 146:f64d43ff0c18 | 1333 | * |
mbed_official | 146:f64d43ff0c18 | 1334 | * In Target mode this bit is asserted when a STALL handshake is sent by the |
mbed_official | 146:f64d43ff0c18 | 1335 | * SIE. In Host mode this bit is set when the USB Module detects a STALL acknowledge |
mbed_official | 146:f64d43ff0c18 | 1336 | * during the handshake phase of a USB transaction.This interrupt can be used to |
mbed_official | 146:f64d43ff0c18 | 1337 | * determine whether the last USB transaction was completed successfully or |
mbed_official | 146:f64d43ff0c18 | 1338 | * stalled. |
mbed_official | 146:f64d43ff0c18 | 1339 | */ |
mbed_official | 146:f64d43ff0c18 | 1340 | //@{ |
mbed_official | 146:f64d43ff0c18 | 1341 | #define BP_USB_ISTAT_STALL (7U) //!< Bit position for USB_ISTAT_STALL. |
mbed_official | 146:f64d43ff0c18 | 1342 | #define BM_USB_ISTAT_STALL (0x80U) //!< Bit mask for USB_ISTAT_STALL. |
mbed_official | 146:f64d43ff0c18 | 1343 | #define BS_USB_ISTAT_STALL (1U) //!< Bit field size in bits for USB_ISTAT_STALL. |
mbed_official | 146:f64d43ff0c18 | 1344 | |
mbed_official | 146:f64d43ff0c18 | 1345 | #ifndef __LANGUAGE_ASM__ |
mbed_official | 146:f64d43ff0c18 | 1346 | //! @brief Read current value of the USB_ISTAT_STALL field. |
mbed_official | 146:f64d43ff0c18 | 1347 | #define BR_USB_ISTAT_STALL (BITBAND_ACCESS8(HW_USB_ISTAT_ADDR, BP_USB_ISTAT_STALL)) |
mbed_official | 146:f64d43ff0c18 | 1348 | #endif |
mbed_official | 146:f64d43ff0c18 | 1349 | |
mbed_official | 146:f64d43ff0c18 | 1350 | //! @brief Format value for bitfield USB_ISTAT_STALL. |
mbed_official | 146:f64d43ff0c18 | 1351 | #define BF_USB_ISTAT_STALL(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint8_t) << BP_USB_ISTAT_STALL), uint8_t) & BM_USB_ISTAT_STALL) |
mbed_official | 146:f64d43ff0c18 | 1352 | |
mbed_official | 146:f64d43ff0c18 | 1353 | #ifndef __LANGUAGE_ASM__ |
mbed_official | 146:f64d43ff0c18 | 1354 | //! @brief Set the STALL field to a new value. |
mbed_official | 146:f64d43ff0c18 | 1355 | #define BW_USB_ISTAT_STALL(v) (BITBAND_ACCESS8(HW_USB_ISTAT_ADDR, BP_USB_ISTAT_STALL) = (v)) |
mbed_official | 146:f64d43ff0c18 | 1356 | #endif |
mbed_official | 146:f64d43ff0c18 | 1357 | //@} |
mbed_official | 146:f64d43ff0c18 | 1358 | |
mbed_official | 146:f64d43ff0c18 | 1359 | //------------------------------------------------------------------------------------------- |
mbed_official | 146:f64d43ff0c18 | 1360 | // HW_USB_INTEN - Interrupt Enable register |
mbed_official | 146:f64d43ff0c18 | 1361 | //------------------------------------------------------------------------------------------- |
mbed_official | 146:f64d43ff0c18 | 1362 | |
mbed_official | 146:f64d43ff0c18 | 1363 | #ifndef __LANGUAGE_ASM__ |
mbed_official | 146:f64d43ff0c18 | 1364 | /*! |
mbed_official | 146:f64d43ff0c18 | 1365 | * @brief HW_USB_INTEN - Interrupt Enable register (RW) |
mbed_official | 146:f64d43ff0c18 | 1366 | * |
mbed_official | 146:f64d43ff0c18 | 1367 | * Reset value: 0x00U |
mbed_official | 146:f64d43ff0c18 | 1368 | * |
mbed_official | 146:f64d43ff0c18 | 1369 | * Contains enable fields for each of the interrupt sources within the USB |
mbed_official | 146:f64d43ff0c18 | 1370 | * Module. Setting any of these bits enables the respective interrupt source in the |
mbed_official | 146:f64d43ff0c18 | 1371 | * ISTAT register. This register contains the value of 0x00 after a reset. |
mbed_official | 146:f64d43ff0c18 | 1372 | */ |
mbed_official | 146:f64d43ff0c18 | 1373 | typedef union _hw_usb_inten |
mbed_official | 146:f64d43ff0c18 | 1374 | { |
mbed_official | 146:f64d43ff0c18 | 1375 | uint8_t U; |
mbed_official | 146:f64d43ff0c18 | 1376 | struct _hw_usb_inten_bitfields |
mbed_official | 146:f64d43ff0c18 | 1377 | { |
mbed_official | 146:f64d43ff0c18 | 1378 | uint8_t USBRSTEN : 1; //!< [0] USBRST Interrupt Enable |
mbed_official | 146:f64d43ff0c18 | 1379 | uint8_t ERROREN : 1; //!< [1] ERROR Interrupt Enable |
mbed_official | 146:f64d43ff0c18 | 1380 | uint8_t SOFTOKEN : 1; //!< [2] SOFTOK Interrupt Enable |
mbed_official | 146:f64d43ff0c18 | 1381 | uint8_t TOKDNEEN : 1; //!< [3] TOKDNE Interrupt Enable |
mbed_official | 146:f64d43ff0c18 | 1382 | uint8_t SLEEPEN : 1; //!< [4] SLEEP Interrupt Enable |
mbed_official | 146:f64d43ff0c18 | 1383 | uint8_t RESUMEEN : 1; //!< [5] RESUME Interrupt Enable |
mbed_official | 146:f64d43ff0c18 | 1384 | uint8_t ATTACHEN : 1; //!< [6] ATTACH Interrupt Enable |
mbed_official | 146:f64d43ff0c18 | 1385 | uint8_t STALLEN : 1; //!< [7] STALL Interrupt Enable |
mbed_official | 146:f64d43ff0c18 | 1386 | } B; |
mbed_official | 146:f64d43ff0c18 | 1387 | } hw_usb_inten_t; |
mbed_official | 146:f64d43ff0c18 | 1388 | #endif |
mbed_official | 146:f64d43ff0c18 | 1389 | |
mbed_official | 146:f64d43ff0c18 | 1390 | /*! |
mbed_official | 146:f64d43ff0c18 | 1391 | * @name Constants and macros for entire USB_INTEN register |
mbed_official | 146:f64d43ff0c18 | 1392 | */ |
mbed_official | 146:f64d43ff0c18 | 1393 | //@{ |
mbed_official | 146:f64d43ff0c18 | 1394 | #define HW_USB_INTEN_ADDR (REGS_USB_BASE + 0x84U) |
mbed_official | 146:f64d43ff0c18 | 1395 | |
mbed_official | 146:f64d43ff0c18 | 1396 | #ifndef __LANGUAGE_ASM__ |
mbed_official | 146:f64d43ff0c18 | 1397 | #define HW_USB_INTEN (*(__IO hw_usb_inten_t *) HW_USB_INTEN_ADDR) |
mbed_official | 146:f64d43ff0c18 | 1398 | #define HW_USB_INTEN_RD() (HW_USB_INTEN.U) |
mbed_official | 146:f64d43ff0c18 | 1399 | #define HW_USB_INTEN_WR(v) (HW_USB_INTEN.U = (v)) |
mbed_official | 146:f64d43ff0c18 | 1400 | #define HW_USB_INTEN_SET(v) (HW_USB_INTEN_WR(HW_USB_INTEN_RD() | (v))) |
mbed_official | 146:f64d43ff0c18 | 1401 | #define HW_USB_INTEN_CLR(v) (HW_USB_INTEN_WR(HW_USB_INTEN_RD() & ~(v))) |
mbed_official | 146:f64d43ff0c18 | 1402 | #define HW_USB_INTEN_TOG(v) (HW_USB_INTEN_WR(HW_USB_INTEN_RD() ^ (v))) |
mbed_official | 146:f64d43ff0c18 | 1403 | #endif |
mbed_official | 146:f64d43ff0c18 | 1404 | //@} |
mbed_official | 146:f64d43ff0c18 | 1405 | |
mbed_official | 146:f64d43ff0c18 | 1406 | /* |
mbed_official | 146:f64d43ff0c18 | 1407 | * Constants & macros for individual USB_INTEN bitfields |
mbed_official | 146:f64d43ff0c18 | 1408 | */ |
mbed_official | 146:f64d43ff0c18 | 1409 | |
mbed_official | 146:f64d43ff0c18 | 1410 | /*! |
mbed_official | 146:f64d43ff0c18 | 1411 | * @name Register USB_INTEN, field USBRSTEN[0] (RW) |
mbed_official | 146:f64d43ff0c18 | 1412 | * |
mbed_official | 146:f64d43ff0c18 | 1413 | * Values: |
mbed_official | 146:f64d43ff0c18 | 1414 | * - 0 - Disables the USBRST interrupt. |
mbed_official | 146:f64d43ff0c18 | 1415 | * - 1 - Enables the USBRST interrupt. |
mbed_official | 146:f64d43ff0c18 | 1416 | */ |
mbed_official | 146:f64d43ff0c18 | 1417 | //@{ |
mbed_official | 146:f64d43ff0c18 | 1418 | #define BP_USB_INTEN_USBRSTEN (0U) //!< Bit position for USB_INTEN_USBRSTEN. |
mbed_official | 146:f64d43ff0c18 | 1419 | #define BM_USB_INTEN_USBRSTEN (0x01U) //!< Bit mask for USB_INTEN_USBRSTEN. |
mbed_official | 146:f64d43ff0c18 | 1420 | #define BS_USB_INTEN_USBRSTEN (1U) //!< Bit field size in bits for USB_INTEN_USBRSTEN. |
mbed_official | 146:f64d43ff0c18 | 1421 | |
mbed_official | 146:f64d43ff0c18 | 1422 | #ifndef __LANGUAGE_ASM__ |
mbed_official | 146:f64d43ff0c18 | 1423 | //! @brief Read current value of the USB_INTEN_USBRSTEN field. |
mbed_official | 146:f64d43ff0c18 | 1424 | #define BR_USB_INTEN_USBRSTEN (BITBAND_ACCESS8(HW_USB_INTEN_ADDR, BP_USB_INTEN_USBRSTEN)) |
mbed_official | 146:f64d43ff0c18 | 1425 | #endif |
mbed_official | 146:f64d43ff0c18 | 1426 | |
mbed_official | 146:f64d43ff0c18 | 1427 | //! @brief Format value for bitfield USB_INTEN_USBRSTEN. |
mbed_official | 146:f64d43ff0c18 | 1428 | #define BF_USB_INTEN_USBRSTEN(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint8_t) << BP_USB_INTEN_USBRSTEN), uint8_t) & BM_USB_INTEN_USBRSTEN) |
mbed_official | 146:f64d43ff0c18 | 1429 | |
mbed_official | 146:f64d43ff0c18 | 1430 | #ifndef __LANGUAGE_ASM__ |
mbed_official | 146:f64d43ff0c18 | 1431 | //! @brief Set the USBRSTEN field to a new value. |
mbed_official | 146:f64d43ff0c18 | 1432 | #define BW_USB_INTEN_USBRSTEN(v) (BITBAND_ACCESS8(HW_USB_INTEN_ADDR, BP_USB_INTEN_USBRSTEN) = (v)) |
mbed_official | 146:f64d43ff0c18 | 1433 | #endif |
mbed_official | 146:f64d43ff0c18 | 1434 | //@} |
mbed_official | 146:f64d43ff0c18 | 1435 | |
mbed_official | 146:f64d43ff0c18 | 1436 | /*! |
mbed_official | 146:f64d43ff0c18 | 1437 | * @name Register USB_INTEN, field ERROREN[1] (RW) |
mbed_official | 146:f64d43ff0c18 | 1438 | * |
mbed_official | 146:f64d43ff0c18 | 1439 | * Values: |
mbed_official | 146:f64d43ff0c18 | 1440 | * - 0 - Disables the ERROR interrupt. |
mbed_official | 146:f64d43ff0c18 | 1441 | * - 1 - Enables the ERROR interrupt. |
mbed_official | 146:f64d43ff0c18 | 1442 | */ |
mbed_official | 146:f64d43ff0c18 | 1443 | //@{ |
mbed_official | 146:f64d43ff0c18 | 1444 | #define BP_USB_INTEN_ERROREN (1U) //!< Bit position for USB_INTEN_ERROREN. |
mbed_official | 146:f64d43ff0c18 | 1445 | #define BM_USB_INTEN_ERROREN (0x02U) //!< Bit mask for USB_INTEN_ERROREN. |
mbed_official | 146:f64d43ff0c18 | 1446 | #define BS_USB_INTEN_ERROREN (1U) //!< Bit field size in bits for USB_INTEN_ERROREN. |
mbed_official | 146:f64d43ff0c18 | 1447 | |
mbed_official | 146:f64d43ff0c18 | 1448 | #ifndef __LANGUAGE_ASM__ |
mbed_official | 146:f64d43ff0c18 | 1449 | //! @brief Read current value of the USB_INTEN_ERROREN field. |
mbed_official | 146:f64d43ff0c18 | 1450 | #define BR_USB_INTEN_ERROREN (BITBAND_ACCESS8(HW_USB_INTEN_ADDR, BP_USB_INTEN_ERROREN)) |
mbed_official | 146:f64d43ff0c18 | 1451 | #endif |
mbed_official | 146:f64d43ff0c18 | 1452 | |
mbed_official | 146:f64d43ff0c18 | 1453 | //! @brief Format value for bitfield USB_INTEN_ERROREN. |
mbed_official | 146:f64d43ff0c18 | 1454 | #define BF_USB_INTEN_ERROREN(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint8_t) << BP_USB_INTEN_ERROREN), uint8_t) & BM_USB_INTEN_ERROREN) |
mbed_official | 146:f64d43ff0c18 | 1455 | |
mbed_official | 146:f64d43ff0c18 | 1456 | #ifndef __LANGUAGE_ASM__ |
mbed_official | 146:f64d43ff0c18 | 1457 | //! @brief Set the ERROREN field to a new value. |
mbed_official | 146:f64d43ff0c18 | 1458 | #define BW_USB_INTEN_ERROREN(v) (BITBAND_ACCESS8(HW_USB_INTEN_ADDR, BP_USB_INTEN_ERROREN) = (v)) |
mbed_official | 146:f64d43ff0c18 | 1459 | #endif |
mbed_official | 146:f64d43ff0c18 | 1460 | //@} |
mbed_official | 146:f64d43ff0c18 | 1461 | |
mbed_official | 146:f64d43ff0c18 | 1462 | /*! |
mbed_official | 146:f64d43ff0c18 | 1463 | * @name Register USB_INTEN, field SOFTOKEN[2] (RW) |
mbed_official | 146:f64d43ff0c18 | 1464 | * |
mbed_official | 146:f64d43ff0c18 | 1465 | * Values: |
mbed_official | 146:f64d43ff0c18 | 1466 | * - 0 - Disbles the SOFTOK interrupt. |
mbed_official | 146:f64d43ff0c18 | 1467 | * - 1 - Enables the SOFTOK interrupt. |
mbed_official | 146:f64d43ff0c18 | 1468 | */ |
mbed_official | 146:f64d43ff0c18 | 1469 | //@{ |
mbed_official | 146:f64d43ff0c18 | 1470 | #define BP_USB_INTEN_SOFTOKEN (2U) //!< Bit position for USB_INTEN_SOFTOKEN. |
mbed_official | 146:f64d43ff0c18 | 1471 | #define BM_USB_INTEN_SOFTOKEN (0x04U) //!< Bit mask for USB_INTEN_SOFTOKEN. |
mbed_official | 146:f64d43ff0c18 | 1472 | #define BS_USB_INTEN_SOFTOKEN (1U) //!< Bit field size in bits for USB_INTEN_SOFTOKEN. |
mbed_official | 146:f64d43ff0c18 | 1473 | |
mbed_official | 146:f64d43ff0c18 | 1474 | #ifndef __LANGUAGE_ASM__ |
mbed_official | 146:f64d43ff0c18 | 1475 | //! @brief Read current value of the USB_INTEN_SOFTOKEN field. |
mbed_official | 146:f64d43ff0c18 | 1476 | #define BR_USB_INTEN_SOFTOKEN (BITBAND_ACCESS8(HW_USB_INTEN_ADDR, BP_USB_INTEN_SOFTOKEN)) |
mbed_official | 146:f64d43ff0c18 | 1477 | #endif |
mbed_official | 146:f64d43ff0c18 | 1478 | |
mbed_official | 146:f64d43ff0c18 | 1479 | //! @brief Format value for bitfield USB_INTEN_SOFTOKEN. |
mbed_official | 146:f64d43ff0c18 | 1480 | #define BF_USB_INTEN_SOFTOKEN(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint8_t) << BP_USB_INTEN_SOFTOKEN), uint8_t) & BM_USB_INTEN_SOFTOKEN) |
mbed_official | 146:f64d43ff0c18 | 1481 | |
mbed_official | 146:f64d43ff0c18 | 1482 | #ifndef __LANGUAGE_ASM__ |
mbed_official | 146:f64d43ff0c18 | 1483 | //! @brief Set the SOFTOKEN field to a new value. |
mbed_official | 146:f64d43ff0c18 | 1484 | #define BW_USB_INTEN_SOFTOKEN(v) (BITBAND_ACCESS8(HW_USB_INTEN_ADDR, BP_USB_INTEN_SOFTOKEN) = (v)) |
mbed_official | 146:f64d43ff0c18 | 1485 | #endif |
mbed_official | 146:f64d43ff0c18 | 1486 | //@} |
mbed_official | 146:f64d43ff0c18 | 1487 | |
mbed_official | 146:f64d43ff0c18 | 1488 | /*! |
mbed_official | 146:f64d43ff0c18 | 1489 | * @name Register USB_INTEN, field TOKDNEEN[3] (RW) |
mbed_official | 146:f64d43ff0c18 | 1490 | * |
mbed_official | 146:f64d43ff0c18 | 1491 | * Values: |
mbed_official | 146:f64d43ff0c18 | 1492 | * - 0 - Disables the TOKDNE interrupt. |
mbed_official | 146:f64d43ff0c18 | 1493 | * - 1 - Enables the TOKDNE interrupt. |
mbed_official | 146:f64d43ff0c18 | 1494 | */ |
mbed_official | 146:f64d43ff0c18 | 1495 | //@{ |
mbed_official | 146:f64d43ff0c18 | 1496 | #define BP_USB_INTEN_TOKDNEEN (3U) //!< Bit position for USB_INTEN_TOKDNEEN. |
mbed_official | 146:f64d43ff0c18 | 1497 | #define BM_USB_INTEN_TOKDNEEN (0x08U) //!< Bit mask for USB_INTEN_TOKDNEEN. |
mbed_official | 146:f64d43ff0c18 | 1498 | #define BS_USB_INTEN_TOKDNEEN (1U) //!< Bit field size in bits for USB_INTEN_TOKDNEEN. |
mbed_official | 146:f64d43ff0c18 | 1499 | |
mbed_official | 146:f64d43ff0c18 | 1500 | #ifndef __LANGUAGE_ASM__ |
mbed_official | 146:f64d43ff0c18 | 1501 | //! @brief Read current value of the USB_INTEN_TOKDNEEN field. |
mbed_official | 146:f64d43ff0c18 | 1502 | #define BR_USB_INTEN_TOKDNEEN (BITBAND_ACCESS8(HW_USB_INTEN_ADDR, BP_USB_INTEN_TOKDNEEN)) |
mbed_official | 146:f64d43ff0c18 | 1503 | #endif |
mbed_official | 146:f64d43ff0c18 | 1504 | |
mbed_official | 146:f64d43ff0c18 | 1505 | //! @brief Format value for bitfield USB_INTEN_TOKDNEEN. |
mbed_official | 146:f64d43ff0c18 | 1506 | #define BF_USB_INTEN_TOKDNEEN(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint8_t) << BP_USB_INTEN_TOKDNEEN), uint8_t) & BM_USB_INTEN_TOKDNEEN) |
mbed_official | 146:f64d43ff0c18 | 1507 | |
mbed_official | 146:f64d43ff0c18 | 1508 | #ifndef __LANGUAGE_ASM__ |
mbed_official | 146:f64d43ff0c18 | 1509 | //! @brief Set the TOKDNEEN field to a new value. |
mbed_official | 146:f64d43ff0c18 | 1510 | #define BW_USB_INTEN_TOKDNEEN(v) (BITBAND_ACCESS8(HW_USB_INTEN_ADDR, BP_USB_INTEN_TOKDNEEN) = (v)) |
mbed_official | 146:f64d43ff0c18 | 1511 | #endif |
mbed_official | 146:f64d43ff0c18 | 1512 | //@} |
mbed_official | 146:f64d43ff0c18 | 1513 | |
mbed_official | 146:f64d43ff0c18 | 1514 | /*! |
mbed_official | 146:f64d43ff0c18 | 1515 | * @name Register USB_INTEN, field SLEEPEN[4] (RW) |
mbed_official | 146:f64d43ff0c18 | 1516 | * |
mbed_official | 146:f64d43ff0c18 | 1517 | * Values: |
mbed_official | 146:f64d43ff0c18 | 1518 | * - 0 - Disables the SLEEP interrupt. |
mbed_official | 146:f64d43ff0c18 | 1519 | * - 1 - Enables the SLEEP interrupt. |
mbed_official | 146:f64d43ff0c18 | 1520 | */ |
mbed_official | 146:f64d43ff0c18 | 1521 | //@{ |
mbed_official | 146:f64d43ff0c18 | 1522 | #define BP_USB_INTEN_SLEEPEN (4U) //!< Bit position for USB_INTEN_SLEEPEN. |
mbed_official | 146:f64d43ff0c18 | 1523 | #define BM_USB_INTEN_SLEEPEN (0x10U) //!< Bit mask for USB_INTEN_SLEEPEN. |
mbed_official | 146:f64d43ff0c18 | 1524 | #define BS_USB_INTEN_SLEEPEN (1U) //!< Bit field size in bits for USB_INTEN_SLEEPEN. |
mbed_official | 146:f64d43ff0c18 | 1525 | |
mbed_official | 146:f64d43ff0c18 | 1526 | #ifndef __LANGUAGE_ASM__ |
mbed_official | 146:f64d43ff0c18 | 1527 | //! @brief Read current value of the USB_INTEN_SLEEPEN field. |
mbed_official | 146:f64d43ff0c18 | 1528 | #define BR_USB_INTEN_SLEEPEN (BITBAND_ACCESS8(HW_USB_INTEN_ADDR, BP_USB_INTEN_SLEEPEN)) |
mbed_official | 146:f64d43ff0c18 | 1529 | #endif |
mbed_official | 146:f64d43ff0c18 | 1530 | |
mbed_official | 146:f64d43ff0c18 | 1531 | //! @brief Format value for bitfield USB_INTEN_SLEEPEN. |
mbed_official | 146:f64d43ff0c18 | 1532 | #define BF_USB_INTEN_SLEEPEN(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint8_t) << BP_USB_INTEN_SLEEPEN), uint8_t) & BM_USB_INTEN_SLEEPEN) |
mbed_official | 146:f64d43ff0c18 | 1533 | |
mbed_official | 146:f64d43ff0c18 | 1534 | #ifndef __LANGUAGE_ASM__ |
mbed_official | 146:f64d43ff0c18 | 1535 | //! @brief Set the SLEEPEN field to a new value. |
mbed_official | 146:f64d43ff0c18 | 1536 | #define BW_USB_INTEN_SLEEPEN(v) (BITBAND_ACCESS8(HW_USB_INTEN_ADDR, BP_USB_INTEN_SLEEPEN) = (v)) |
mbed_official | 146:f64d43ff0c18 | 1537 | #endif |
mbed_official | 146:f64d43ff0c18 | 1538 | //@} |
mbed_official | 146:f64d43ff0c18 | 1539 | |
mbed_official | 146:f64d43ff0c18 | 1540 | /*! |
mbed_official | 146:f64d43ff0c18 | 1541 | * @name Register USB_INTEN, field RESUMEEN[5] (RW) |
mbed_official | 146:f64d43ff0c18 | 1542 | * |
mbed_official | 146:f64d43ff0c18 | 1543 | * Values: |
mbed_official | 146:f64d43ff0c18 | 1544 | * - 0 - Disables the RESUME interrupt. |
mbed_official | 146:f64d43ff0c18 | 1545 | * - 1 - Enables the RESUME interrupt. |
mbed_official | 146:f64d43ff0c18 | 1546 | */ |
mbed_official | 146:f64d43ff0c18 | 1547 | //@{ |
mbed_official | 146:f64d43ff0c18 | 1548 | #define BP_USB_INTEN_RESUMEEN (5U) //!< Bit position for USB_INTEN_RESUMEEN. |
mbed_official | 146:f64d43ff0c18 | 1549 | #define BM_USB_INTEN_RESUMEEN (0x20U) //!< Bit mask for USB_INTEN_RESUMEEN. |
mbed_official | 146:f64d43ff0c18 | 1550 | #define BS_USB_INTEN_RESUMEEN (1U) //!< Bit field size in bits for USB_INTEN_RESUMEEN. |
mbed_official | 146:f64d43ff0c18 | 1551 | |
mbed_official | 146:f64d43ff0c18 | 1552 | #ifndef __LANGUAGE_ASM__ |
mbed_official | 146:f64d43ff0c18 | 1553 | //! @brief Read current value of the USB_INTEN_RESUMEEN field. |
mbed_official | 146:f64d43ff0c18 | 1554 | #define BR_USB_INTEN_RESUMEEN (BITBAND_ACCESS8(HW_USB_INTEN_ADDR, BP_USB_INTEN_RESUMEEN)) |
mbed_official | 146:f64d43ff0c18 | 1555 | #endif |
mbed_official | 146:f64d43ff0c18 | 1556 | |
mbed_official | 146:f64d43ff0c18 | 1557 | //! @brief Format value for bitfield USB_INTEN_RESUMEEN. |
mbed_official | 146:f64d43ff0c18 | 1558 | #define BF_USB_INTEN_RESUMEEN(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint8_t) << BP_USB_INTEN_RESUMEEN), uint8_t) & BM_USB_INTEN_RESUMEEN) |
mbed_official | 146:f64d43ff0c18 | 1559 | |
mbed_official | 146:f64d43ff0c18 | 1560 | #ifndef __LANGUAGE_ASM__ |
mbed_official | 146:f64d43ff0c18 | 1561 | //! @brief Set the RESUMEEN field to a new value. |
mbed_official | 146:f64d43ff0c18 | 1562 | #define BW_USB_INTEN_RESUMEEN(v) (BITBAND_ACCESS8(HW_USB_INTEN_ADDR, BP_USB_INTEN_RESUMEEN) = (v)) |
mbed_official | 146:f64d43ff0c18 | 1563 | #endif |
mbed_official | 146:f64d43ff0c18 | 1564 | //@} |
mbed_official | 146:f64d43ff0c18 | 1565 | |
mbed_official | 146:f64d43ff0c18 | 1566 | /*! |
mbed_official | 146:f64d43ff0c18 | 1567 | * @name Register USB_INTEN, field ATTACHEN[6] (RW) |
mbed_official | 146:f64d43ff0c18 | 1568 | * |
mbed_official | 146:f64d43ff0c18 | 1569 | * Values: |
mbed_official | 146:f64d43ff0c18 | 1570 | * - 0 - Disables the ATTACH interrupt. |
mbed_official | 146:f64d43ff0c18 | 1571 | * - 1 - Enables the ATTACH interrupt. |
mbed_official | 146:f64d43ff0c18 | 1572 | */ |
mbed_official | 146:f64d43ff0c18 | 1573 | //@{ |
mbed_official | 146:f64d43ff0c18 | 1574 | #define BP_USB_INTEN_ATTACHEN (6U) //!< Bit position for USB_INTEN_ATTACHEN. |
mbed_official | 146:f64d43ff0c18 | 1575 | #define BM_USB_INTEN_ATTACHEN (0x40U) //!< Bit mask for USB_INTEN_ATTACHEN. |
mbed_official | 146:f64d43ff0c18 | 1576 | #define BS_USB_INTEN_ATTACHEN (1U) //!< Bit field size in bits for USB_INTEN_ATTACHEN. |
mbed_official | 146:f64d43ff0c18 | 1577 | |
mbed_official | 146:f64d43ff0c18 | 1578 | #ifndef __LANGUAGE_ASM__ |
mbed_official | 146:f64d43ff0c18 | 1579 | //! @brief Read current value of the USB_INTEN_ATTACHEN field. |
mbed_official | 146:f64d43ff0c18 | 1580 | #define BR_USB_INTEN_ATTACHEN (BITBAND_ACCESS8(HW_USB_INTEN_ADDR, BP_USB_INTEN_ATTACHEN)) |
mbed_official | 146:f64d43ff0c18 | 1581 | #endif |
mbed_official | 146:f64d43ff0c18 | 1582 | |
mbed_official | 146:f64d43ff0c18 | 1583 | //! @brief Format value for bitfield USB_INTEN_ATTACHEN. |
mbed_official | 146:f64d43ff0c18 | 1584 | #define BF_USB_INTEN_ATTACHEN(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint8_t) << BP_USB_INTEN_ATTACHEN), uint8_t) & BM_USB_INTEN_ATTACHEN) |
mbed_official | 146:f64d43ff0c18 | 1585 | |
mbed_official | 146:f64d43ff0c18 | 1586 | #ifndef __LANGUAGE_ASM__ |
mbed_official | 146:f64d43ff0c18 | 1587 | //! @brief Set the ATTACHEN field to a new value. |
mbed_official | 146:f64d43ff0c18 | 1588 | #define BW_USB_INTEN_ATTACHEN(v) (BITBAND_ACCESS8(HW_USB_INTEN_ADDR, BP_USB_INTEN_ATTACHEN) = (v)) |
mbed_official | 146:f64d43ff0c18 | 1589 | #endif |
mbed_official | 146:f64d43ff0c18 | 1590 | //@} |
mbed_official | 146:f64d43ff0c18 | 1591 | |
mbed_official | 146:f64d43ff0c18 | 1592 | /*! |
mbed_official | 146:f64d43ff0c18 | 1593 | * @name Register USB_INTEN, field STALLEN[7] (RW) |
mbed_official | 146:f64d43ff0c18 | 1594 | * |
mbed_official | 146:f64d43ff0c18 | 1595 | * Values: |
mbed_official | 146:f64d43ff0c18 | 1596 | * - 0 - Diasbles the STALL interrupt. |
mbed_official | 146:f64d43ff0c18 | 1597 | * - 1 - Enables the STALL interrupt. |
mbed_official | 146:f64d43ff0c18 | 1598 | */ |
mbed_official | 146:f64d43ff0c18 | 1599 | //@{ |
mbed_official | 146:f64d43ff0c18 | 1600 | #define BP_USB_INTEN_STALLEN (7U) //!< Bit position for USB_INTEN_STALLEN. |
mbed_official | 146:f64d43ff0c18 | 1601 | #define BM_USB_INTEN_STALLEN (0x80U) //!< Bit mask for USB_INTEN_STALLEN. |
mbed_official | 146:f64d43ff0c18 | 1602 | #define BS_USB_INTEN_STALLEN (1U) //!< Bit field size in bits for USB_INTEN_STALLEN. |
mbed_official | 146:f64d43ff0c18 | 1603 | |
mbed_official | 146:f64d43ff0c18 | 1604 | #ifndef __LANGUAGE_ASM__ |
mbed_official | 146:f64d43ff0c18 | 1605 | //! @brief Read current value of the USB_INTEN_STALLEN field. |
mbed_official | 146:f64d43ff0c18 | 1606 | #define BR_USB_INTEN_STALLEN (BITBAND_ACCESS8(HW_USB_INTEN_ADDR, BP_USB_INTEN_STALLEN)) |
mbed_official | 146:f64d43ff0c18 | 1607 | #endif |
mbed_official | 146:f64d43ff0c18 | 1608 | |
mbed_official | 146:f64d43ff0c18 | 1609 | //! @brief Format value for bitfield USB_INTEN_STALLEN. |
mbed_official | 146:f64d43ff0c18 | 1610 | #define BF_USB_INTEN_STALLEN(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint8_t) << BP_USB_INTEN_STALLEN), uint8_t) & BM_USB_INTEN_STALLEN) |
mbed_official | 146:f64d43ff0c18 | 1611 | |
mbed_official | 146:f64d43ff0c18 | 1612 | #ifndef __LANGUAGE_ASM__ |
mbed_official | 146:f64d43ff0c18 | 1613 | //! @brief Set the STALLEN field to a new value. |
mbed_official | 146:f64d43ff0c18 | 1614 | #define BW_USB_INTEN_STALLEN(v) (BITBAND_ACCESS8(HW_USB_INTEN_ADDR, BP_USB_INTEN_STALLEN) = (v)) |
mbed_official | 146:f64d43ff0c18 | 1615 | #endif |
mbed_official | 146:f64d43ff0c18 | 1616 | //@} |
mbed_official | 146:f64d43ff0c18 | 1617 | |
mbed_official | 146:f64d43ff0c18 | 1618 | //------------------------------------------------------------------------------------------- |
mbed_official | 146:f64d43ff0c18 | 1619 | // HW_USB_ERRSTAT - Error Interrupt Status register |
mbed_official | 146:f64d43ff0c18 | 1620 | //------------------------------------------------------------------------------------------- |
mbed_official | 146:f64d43ff0c18 | 1621 | |
mbed_official | 146:f64d43ff0c18 | 1622 | #ifndef __LANGUAGE_ASM__ |
mbed_official | 146:f64d43ff0c18 | 1623 | /*! |
mbed_official | 146:f64d43ff0c18 | 1624 | * @brief HW_USB_ERRSTAT - Error Interrupt Status register (RW) |
mbed_official | 146:f64d43ff0c18 | 1625 | * |
mbed_official | 146:f64d43ff0c18 | 1626 | * Reset value: 0x00U |
mbed_official | 146:f64d43ff0c18 | 1627 | * |
mbed_official | 146:f64d43ff0c18 | 1628 | * Contains enable bits for each of the error sources within the USB Module. |
mbed_official | 146:f64d43ff0c18 | 1629 | * Each of these bits are qualified with their respective error enable bits. All |
mbed_official | 146:f64d43ff0c18 | 1630 | * bits of this register are logically OR'd together and the result placed in the |
mbed_official | 146:f64d43ff0c18 | 1631 | * ERROR bit of the ISTAT register. After an interrupt bit has been set it may only |
mbed_official | 146:f64d43ff0c18 | 1632 | * be cleared by writing a one to the respective interrupt bit. Each bit is set |
mbed_official | 146:f64d43ff0c18 | 1633 | * as soon as the error condition is detected. Therefore, the interrupt does not |
mbed_official | 146:f64d43ff0c18 | 1634 | * typically correspond with the end of a token being processed. This register |
mbed_official | 146:f64d43ff0c18 | 1635 | * contains the value of 0x00 after a reset. |
mbed_official | 146:f64d43ff0c18 | 1636 | */ |
mbed_official | 146:f64d43ff0c18 | 1637 | typedef union _hw_usb_errstat |
mbed_official | 146:f64d43ff0c18 | 1638 | { |
mbed_official | 146:f64d43ff0c18 | 1639 | uint8_t U; |
mbed_official | 146:f64d43ff0c18 | 1640 | struct _hw_usb_errstat_bitfields |
mbed_official | 146:f64d43ff0c18 | 1641 | { |
mbed_official | 146:f64d43ff0c18 | 1642 | uint8_t PIDERR : 1; //!< [0] |
mbed_official | 146:f64d43ff0c18 | 1643 | uint8_t CRC5EOF : 1; //!< [1] |
mbed_official | 146:f64d43ff0c18 | 1644 | uint8_t CRC16 : 1; //!< [2] |
mbed_official | 146:f64d43ff0c18 | 1645 | uint8_t DFN8 : 1; //!< [3] |
mbed_official | 146:f64d43ff0c18 | 1646 | uint8_t BTOERR : 1; //!< [4] |
mbed_official | 146:f64d43ff0c18 | 1647 | uint8_t DMAERR : 1; //!< [5] |
mbed_official | 146:f64d43ff0c18 | 1648 | uint8_t RESERVED0 : 1; //!< [6] |
mbed_official | 146:f64d43ff0c18 | 1649 | uint8_t BTSERR : 1; //!< [7] |
mbed_official | 146:f64d43ff0c18 | 1650 | } B; |
mbed_official | 146:f64d43ff0c18 | 1651 | } hw_usb_errstat_t; |
mbed_official | 146:f64d43ff0c18 | 1652 | #endif |
mbed_official | 146:f64d43ff0c18 | 1653 | |
mbed_official | 146:f64d43ff0c18 | 1654 | /*! |
mbed_official | 146:f64d43ff0c18 | 1655 | * @name Constants and macros for entire USB_ERRSTAT register |
mbed_official | 146:f64d43ff0c18 | 1656 | */ |
mbed_official | 146:f64d43ff0c18 | 1657 | //@{ |
mbed_official | 146:f64d43ff0c18 | 1658 | #define HW_USB_ERRSTAT_ADDR (REGS_USB_BASE + 0x88U) |
mbed_official | 146:f64d43ff0c18 | 1659 | |
mbed_official | 146:f64d43ff0c18 | 1660 | #ifndef __LANGUAGE_ASM__ |
mbed_official | 146:f64d43ff0c18 | 1661 | #define HW_USB_ERRSTAT (*(__IO hw_usb_errstat_t *) HW_USB_ERRSTAT_ADDR) |
mbed_official | 146:f64d43ff0c18 | 1662 | #define HW_USB_ERRSTAT_RD() (HW_USB_ERRSTAT.U) |
mbed_official | 146:f64d43ff0c18 | 1663 | #define HW_USB_ERRSTAT_WR(v) (HW_USB_ERRSTAT.U = (v)) |
mbed_official | 146:f64d43ff0c18 | 1664 | #define HW_USB_ERRSTAT_SET(v) (HW_USB_ERRSTAT_WR(HW_USB_ERRSTAT_RD() | (v))) |
mbed_official | 146:f64d43ff0c18 | 1665 | #define HW_USB_ERRSTAT_CLR(v) (HW_USB_ERRSTAT_WR(HW_USB_ERRSTAT_RD() & ~(v))) |
mbed_official | 146:f64d43ff0c18 | 1666 | #define HW_USB_ERRSTAT_TOG(v) (HW_USB_ERRSTAT_WR(HW_USB_ERRSTAT_RD() ^ (v))) |
mbed_official | 146:f64d43ff0c18 | 1667 | #endif |
mbed_official | 146:f64d43ff0c18 | 1668 | //@} |
mbed_official | 146:f64d43ff0c18 | 1669 | |
mbed_official | 146:f64d43ff0c18 | 1670 | /* |
mbed_official | 146:f64d43ff0c18 | 1671 | * Constants & macros for individual USB_ERRSTAT bitfields |
mbed_official | 146:f64d43ff0c18 | 1672 | */ |
mbed_official | 146:f64d43ff0c18 | 1673 | |
mbed_official | 146:f64d43ff0c18 | 1674 | /*! |
mbed_official | 146:f64d43ff0c18 | 1675 | * @name Register USB_ERRSTAT, field PIDERR[0] (W1C) |
mbed_official | 146:f64d43ff0c18 | 1676 | * |
mbed_official | 146:f64d43ff0c18 | 1677 | * This bit is set when the PID check field fails. |
mbed_official | 146:f64d43ff0c18 | 1678 | */ |
mbed_official | 146:f64d43ff0c18 | 1679 | //@{ |
mbed_official | 146:f64d43ff0c18 | 1680 | #define BP_USB_ERRSTAT_PIDERR (0U) //!< Bit position for USB_ERRSTAT_PIDERR. |
mbed_official | 146:f64d43ff0c18 | 1681 | #define BM_USB_ERRSTAT_PIDERR (0x01U) //!< Bit mask for USB_ERRSTAT_PIDERR. |
mbed_official | 146:f64d43ff0c18 | 1682 | #define BS_USB_ERRSTAT_PIDERR (1U) //!< Bit field size in bits for USB_ERRSTAT_PIDERR. |
mbed_official | 146:f64d43ff0c18 | 1683 | |
mbed_official | 146:f64d43ff0c18 | 1684 | #ifndef __LANGUAGE_ASM__ |
mbed_official | 146:f64d43ff0c18 | 1685 | //! @brief Read current value of the USB_ERRSTAT_PIDERR field. |
mbed_official | 146:f64d43ff0c18 | 1686 | #define BR_USB_ERRSTAT_PIDERR (BITBAND_ACCESS8(HW_USB_ERRSTAT_ADDR, BP_USB_ERRSTAT_PIDERR)) |
mbed_official | 146:f64d43ff0c18 | 1687 | #endif |
mbed_official | 146:f64d43ff0c18 | 1688 | |
mbed_official | 146:f64d43ff0c18 | 1689 | //! @brief Format value for bitfield USB_ERRSTAT_PIDERR. |
mbed_official | 146:f64d43ff0c18 | 1690 | #define BF_USB_ERRSTAT_PIDERR(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint8_t) << BP_USB_ERRSTAT_PIDERR), uint8_t) & BM_USB_ERRSTAT_PIDERR) |
mbed_official | 146:f64d43ff0c18 | 1691 | |
mbed_official | 146:f64d43ff0c18 | 1692 | #ifndef __LANGUAGE_ASM__ |
mbed_official | 146:f64d43ff0c18 | 1693 | //! @brief Set the PIDERR field to a new value. |
mbed_official | 146:f64d43ff0c18 | 1694 | #define BW_USB_ERRSTAT_PIDERR(v) (BITBAND_ACCESS8(HW_USB_ERRSTAT_ADDR, BP_USB_ERRSTAT_PIDERR) = (v)) |
mbed_official | 146:f64d43ff0c18 | 1695 | #endif |
mbed_official | 146:f64d43ff0c18 | 1696 | //@} |
mbed_official | 146:f64d43ff0c18 | 1697 | |
mbed_official | 146:f64d43ff0c18 | 1698 | /*! |
mbed_official | 146:f64d43ff0c18 | 1699 | * @name Register USB_ERRSTAT, field CRC5EOF[1] (W1C) |
mbed_official | 146:f64d43ff0c18 | 1700 | * |
mbed_official | 146:f64d43ff0c18 | 1701 | * This error interrupt has two functions. When the USB Module is operating in |
mbed_official | 146:f64d43ff0c18 | 1702 | * peripheral mode (HOSTMODEEN=0), this interrupt detects CRC5 errors in the token |
mbed_official | 146:f64d43ff0c18 | 1703 | * packets generated by the host. If set the token packet was rejected due to a |
mbed_official | 146:f64d43ff0c18 | 1704 | * CRC5 error. When the USB Module is operating in host mode (HOSTMODEEN=1), this |
mbed_official | 146:f64d43ff0c18 | 1705 | * interrupt detects End Of Frame (EOF) error conditions. This occurs when the |
mbed_official | 146:f64d43ff0c18 | 1706 | * USB Module is transmitting or receiving data and the SOF counter reaches zero. |
mbed_official | 146:f64d43ff0c18 | 1707 | * This interrupt is useful when developing USB packet scheduling software to |
mbed_official | 146:f64d43ff0c18 | 1708 | * ensure that no USB transactions cross the start of the next frame. |
mbed_official | 146:f64d43ff0c18 | 1709 | */ |
mbed_official | 146:f64d43ff0c18 | 1710 | //@{ |
mbed_official | 146:f64d43ff0c18 | 1711 | #define BP_USB_ERRSTAT_CRC5EOF (1U) //!< Bit position for USB_ERRSTAT_CRC5EOF. |
mbed_official | 146:f64d43ff0c18 | 1712 | #define BM_USB_ERRSTAT_CRC5EOF (0x02U) //!< Bit mask for USB_ERRSTAT_CRC5EOF. |
mbed_official | 146:f64d43ff0c18 | 1713 | #define BS_USB_ERRSTAT_CRC5EOF (1U) //!< Bit field size in bits for USB_ERRSTAT_CRC5EOF. |
mbed_official | 146:f64d43ff0c18 | 1714 | |
mbed_official | 146:f64d43ff0c18 | 1715 | #ifndef __LANGUAGE_ASM__ |
mbed_official | 146:f64d43ff0c18 | 1716 | //! @brief Read current value of the USB_ERRSTAT_CRC5EOF field. |
mbed_official | 146:f64d43ff0c18 | 1717 | #define BR_USB_ERRSTAT_CRC5EOF (BITBAND_ACCESS8(HW_USB_ERRSTAT_ADDR, BP_USB_ERRSTAT_CRC5EOF)) |
mbed_official | 146:f64d43ff0c18 | 1718 | #endif |
mbed_official | 146:f64d43ff0c18 | 1719 | |
mbed_official | 146:f64d43ff0c18 | 1720 | //! @brief Format value for bitfield USB_ERRSTAT_CRC5EOF. |
mbed_official | 146:f64d43ff0c18 | 1721 | #define BF_USB_ERRSTAT_CRC5EOF(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint8_t) << BP_USB_ERRSTAT_CRC5EOF), uint8_t) & BM_USB_ERRSTAT_CRC5EOF) |
mbed_official | 146:f64d43ff0c18 | 1722 | |
mbed_official | 146:f64d43ff0c18 | 1723 | #ifndef __LANGUAGE_ASM__ |
mbed_official | 146:f64d43ff0c18 | 1724 | //! @brief Set the CRC5EOF field to a new value. |
mbed_official | 146:f64d43ff0c18 | 1725 | #define BW_USB_ERRSTAT_CRC5EOF(v) (BITBAND_ACCESS8(HW_USB_ERRSTAT_ADDR, BP_USB_ERRSTAT_CRC5EOF) = (v)) |
mbed_official | 146:f64d43ff0c18 | 1726 | #endif |
mbed_official | 146:f64d43ff0c18 | 1727 | //@} |
mbed_official | 146:f64d43ff0c18 | 1728 | |
mbed_official | 146:f64d43ff0c18 | 1729 | /*! |
mbed_official | 146:f64d43ff0c18 | 1730 | * @name Register USB_ERRSTAT, field CRC16[2] (W1C) |
mbed_official | 146:f64d43ff0c18 | 1731 | * |
mbed_official | 146:f64d43ff0c18 | 1732 | * This bit is set when a data packet is rejected due to a CRC16 error. |
mbed_official | 146:f64d43ff0c18 | 1733 | */ |
mbed_official | 146:f64d43ff0c18 | 1734 | //@{ |
mbed_official | 146:f64d43ff0c18 | 1735 | #define BP_USB_ERRSTAT_CRC16 (2U) //!< Bit position for USB_ERRSTAT_CRC16. |
mbed_official | 146:f64d43ff0c18 | 1736 | #define BM_USB_ERRSTAT_CRC16 (0x04U) //!< Bit mask for USB_ERRSTAT_CRC16. |
mbed_official | 146:f64d43ff0c18 | 1737 | #define BS_USB_ERRSTAT_CRC16 (1U) //!< Bit field size in bits for USB_ERRSTAT_CRC16. |
mbed_official | 146:f64d43ff0c18 | 1738 | |
mbed_official | 146:f64d43ff0c18 | 1739 | #ifndef __LANGUAGE_ASM__ |
mbed_official | 146:f64d43ff0c18 | 1740 | //! @brief Read current value of the USB_ERRSTAT_CRC16 field. |
mbed_official | 146:f64d43ff0c18 | 1741 | #define BR_USB_ERRSTAT_CRC16 (BITBAND_ACCESS8(HW_USB_ERRSTAT_ADDR, BP_USB_ERRSTAT_CRC16)) |
mbed_official | 146:f64d43ff0c18 | 1742 | #endif |
mbed_official | 146:f64d43ff0c18 | 1743 | |
mbed_official | 146:f64d43ff0c18 | 1744 | //! @brief Format value for bitfield USB_ERRSTAT_CRC16. |
mbed_official | 146:f64d43ff0c18 | 1745 | #define BF_USB_ERRSTAT_CRC16(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint8_t) << BP_USB_ERRSTAT_CRC16), uint8_t) & BM_USB_ERRSTAT_CRC16) |
mbed_official | 146:f64d43ff0c18 | 1746 | |
mbed_official | 146:f64d43ff0c18 | 1747 | #ifndef __LANGUAGE_ASM__ |
mbed_official | 146:f64d43ff0c18 | 1748 | //! @brief Set the CRC16 field to a new value. |
mbed_official | 146:f64d43ff0c18 | 1749 | #define BW_USB_ERRSTAT_CRC16(v) (BITBAND_ACCESS8(HW_USB_ERRSTAT_ADDR, BP_USB_ERRSTAT_CRC16) = (v)) |
mbed_official | 146:f64d43ff0c18 | 1750 | #endif |
mbed_official | 146:f64d43ff0c18 | 1751 | //@} |
mbed_official | 146:f64d43ff0c18 | 1752 | |
mbed_official | 146:f64d43ff0c18 | 1753 | /*! |
mbed_official | 146:f64d43ff0c18 | 1754 | * @name Register USB_ERRSTAT, field DFN8[3] (W1C) |
mbed_official | 146:f64d43ff0c18 | 1755 | * |
mbed_official | 146:f64d43ff0c18 | 1756 | * This bit is set if the data field received was not 8 bits in length. USB |
mbed_official | 146:f64d43ff0c18 | 1757 | * Specification 1.0 requires that data fields be an integral number of bytes. If the |
mbed_official | 146:f64d43ff0c18 | 1758 | * data field was not an integral number of bytes, this bit is set. |
mbed_official | 146:f64d43ff0c18 | 1759 | */ |
mbed_official | 146:f64d43ff0c18 | 1760 | //@{ |
mbed_official | 146:f64d43ff0c18 | 1761 | #define BP_USB_ERRSTAT_DFN8 (3U) //!< Bit position for USB_ERRSTAT_DFN8. |
mbed_official | 146:f64d43ff0c18 | 1762 | #define BM_USB_ERRSTAT_DFN8 (0x08U) //!< Bit mask for USB_ERRSTAT_DFN8. |
mbed_official | 146:f64d43ff0c18 | 1763 | #define BS_USB_ERRSTAT_DFN8 (1U) //!< Bit field size in bits for USB_ERRSTAT_DFN8. |
mbed_official | 146:f64d43ff0c18 | 1764 | |
mbed_official | 146:f64d43ff0c18 | 1765 | #ifndef __LANGUAGE_ASM__ |
mbed_official | 146:f64d43ff0c18 | 1766 | //! @brief Read current value of the USB_ERRSTAT_DFN8 field. |
mbed_official | 146:f64d43ff0c18 | 1767 | #define BR_USB_ERRSTAT_DFN8 (BITBAND_ACCESS8(HW_USB_ERRSTAT_ADDR, BP_USB_ERRSTAT_DFN8)) |
mbed_official | 146:f64d43ff0c18 | 1768 | #endif |
mbed_official | 146:f64d43ff0c18 | 1769 | |
mbed_official | 146:f64d43ff0c18 | 1770 | //! @brief Format value for bitfield USB_ERRSTAT_DFN8. |
mbed_official | 146:f64d43ff0c18 | 1771 | #define BF_USB_ERRSTAT_DFN8(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint8_t) << BP_USB_ERRSTAT_DFN8), uint8_t) & BM_USB_ERRSTAT_DFN8) |
mbed_official | 146:f64d43ff0c18 | 1772 | |
mbed_official | 146:f64d43ff0c18 | 1773 | #ifndef __LANGUAGE_ASM__ |
mbed_official | 146:f64d43ff0c18 | 1774 | //! @brief Set the DFN8 field to a new value. |
mbed_official | 146:f64d43ff0c18 | 1775 | #define BW_USB_ERRSTAT_DFN8(v) (BITBAND_ACCESS8(HW_USB_ERRSTAT_ADDR, BP_USB_ERRSTAT_DFN8) = (v)) |
mbed_official | 146:f64d43ff0c18 | 1776 | #endif |
mbed_official | 146:f64d43ff0c18 | 1777 | //@} |
mbed_official | 146:f64d43ff0c18 | 1778 | |
mbed_official | 146:f64d43ff0c18 | 1779 | /*! |
mbed_official | 146:f64d43ff0c18 | 1780 | * @name Register USB_ERRSTAT, field BTOERR[4] (W1C) |
mbed_official | 146:f64d43ff0c18 | 1781 | * |
mbed_official | 146:f64d43ff0c18 | 1782 | * This bit is set when a bus turnaround timeout error occurs. The USB module |
mbed_official | 146:f64d43ff0c18 | 1783 | * contains a bus turnaround timer that keeps track of the amount of time elapsed |
mbed_official | 146:f64d43ff0c18 | 1784 | * between the token and data phases of a SETUP or OUT TOKEN or the data and |
mbed_official | 146:f64d43ff0c18 | 1785 | * handshake phases of a IN TOKEN. If more than 16 bit times are counted from the |
mbed_official | 146:f64d43ff0c18 | 1786 | * previous EOP before a transition from IDLE, a bus turnaround timeout error occurs. |
mbed_official | 146:f64d43ff0c18 | 1787 | */ |
mbed_official | 146:f64d43ff0c18 | 1788 | //@{ |
mbed_official | 146:f64d43ff0c18 | 1789 | #define BP_USB_ERRSTAT_BTOERR (4U) //!< Bit position for USB_ERRSTAT_BTOERR. |
mbed_official | 146:f64d43ff0c18 | 1790 | #define BM_USB_ERRSTAT_BTOERR (0x10U) //!< Bit mask for USB_ERRSTAT_BTOERR. |
mbed_official | 146:f64d43ff0c18 | 1791 | #define BS_USB_ERRSTAT_BTOERR (1U) //!< Bit field size in bits for USB_ERRSTAT_BTOERR. |
mbed_official | 146:f64d43ff0c18 | 1792 | |
mbed_official | 146:f64d43ff0c18 | 1793 | #ifndef __LANGUAGE_ASM__ |
mbed_official | 146:f64d43ff0c18 | 1794 | //! @brief Read current value of the USB_ERRSTAT_BTOERR field. |
mbed_official | 146:f64d43ff0c18 | 1795 | #define BR_USB_ERRSTAT_BTOERR (BITBAND_ACCESS8(HW_USB_ERRSTAT_ADDR, BP_USB_ERRSTAT_BTOERR)) |
mbed_official | 146:f64d43ff0c18 | 1796 | #endif |
mbed_official | 146:f64d43ff0c18 | 1797 | |
mbed_official | 146:f64d43ff0c18 | 1798 | //! @brief Format value for bitfield USB_ERRSTAT_BTOERR. |
mbed_official | 146:f64d43ff0c18 | 1799 | #define BF_USB_ERRSTAT_BTOERR(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint8_t) << BP_USB_ERRSTAT_BTOERR), uint8_t) & BM_USB_ERRSTAT_BTOERR) |
mbed_official | 146:f64d43ff0c18 | 1800 | |
mbed_official | 146:f64d43ff0c18 | 1801 | #ifndef __LANGUAGE_ASM__ |
mbed_official | 146:f64d43ff0c18 | 1802 | //! @brief Set the BTOERR field to a new value. |
mbed_official | 146:f64d43ff0c18 | 1803 | #define BW_USB_ERRSTAT_BTOERR(v) (BITBAND_ACCESS8(HW_USB_ERRSTAT_ADDR, BP_USB_ERRSTAT_BTOERR) = (v)) |
mbed_official | 146:f64d43ff0c18 | 1804 | #endif |
mbed_official | 146:f64d43ff0c18 | 1805 | //@} |
mbed_official | 146:f64d43ff0c18 | 1806 | |
mbed_official | 146:f64d43ff0c18 | 1807 | /*! |
mbed_official | 146:f64d43ff0c18 | 1808 | * @name Register USB_ERRSTAT, field DMAERR[5] (W1C) |
mbed_official | 146:f64d43ff0c18 | 1809 | * |
mbed_official | 146:f64d43ff0c18 | 1810 | * This bit is set if the USB Module has requested a DMA access to read a new |
mbed_official | 146:f64d43ff0c18 | 1811 | * BDT but has not been given the bus before it needs to receive or transmit data. |
mbed_official | 146:f64d43ff0c18 | 1812 | * If processing a TX transfer this would cause a transmit data underflow |
mbed_official | 146:f64d43ff0c18 | 1813 | * condition. If processing a RX transfer this would cause a receive data overflow |
mbed_official | 146:f64d43ff0c18 | 1814 | * condition. This interrupt is useful when developing device arbitration hardware for |
mbed_official | 146:f64d43ff0c18 | 1815 | * the microprocessor and the USB module to minimize bus request and bus grant |
mbed_official | 146:f64d43ff0c18 | 1816 | * latency. This bit is also set if a data packet to or from the host is larger |
mbed_official | 146:f64d43ff0c18 | 1817 | * than the buffer size allocated in the BDT. In this case the data packet is |
mbed_official | 146:f64d43ff0c18 | 1818 | * truncated as it is put in buffer memory. |
mbed_official | 146:f64d43ff0c18 | 1819 | */ |
mbed_official | 146:f64d43ff0c18 | 1820 | //@{ |
mbed_official | 146:f64d43ff0c18 | 1821 | #define BP_USB_ERRSTAT_DMAERR (5U) //!< Bit position for USB_ERRSTAT_DMAERR. |
mbed_official | 146:f64d43ff0c18 | 1822 | #define BM_USB_ERRSTAT_DMAERR (0x20U) //!< Bit mask for USB_ERRSTAT_DMAERR. |
mbed_official | 146:f64d43ff0c18 | 1823 | #define BS_USB_ERRSTAT_DMAERR (1U) //!< Bit field size in bits for USB_ERRSTAT_DMAERR. |
mbed_official | 146:f64d43ff0c18 | 1824 | |
mbed_official | 146:f64d43ff0c18 | 1825 | #ifndef __LANGUAGE_ASM__ |
mbed_official | 146:f64d43ff0c18 | 1826 | //! @brief Read current value of the USB_ERRSTAT_DMAERR field. |
mbed_official | 146:f64d43ff0c18 | 1827 | #define BR_USB_ERRSTAT_DMAERR (BITBAND_ACCESS8(HW_USB_ERRSTAT_ADDR, BP_USB_ERRSTAT_DMAERR)) |
mbed_official | 146:f64d43ff0c18 | 1828 | #endif |
mbed_official | 146:f64d43ff0c18 | 1829 | |
mbed_official | 146:f64d43ff0c18 | 1830 | //! @brief Format value for bitfield USB_ERRSTAT_DMAERR. |
mbed_official | 146:f64d43ff0c18 | 1831 | #define BF_USB_ERRSTAT_DMAERR(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint8_t) << BP_USB_ERRSTAT_DMAERR), uint8_t) & BM_USB_ERRSTAT_DMAERR) |
mbed_official | 146:f64d43ff0c18 | 1832 | |
mbed_official | 146:f64d43ff0c18 | 1833 | #ifndef __LANGUAGE_ASM__ |
mbed_official | 146:f64d43ff0c18 | 1834 | //! @brief Set the DMAERR field to a new value. |
mbed_official | 146:f64d43ff0c18 | 1835 | #define BW_USB_ERRSTAT_DMAERR(v) (BITBAND_ACCESS8(HW_USB_ERRSTAT_ADDR, BP_USB_ERRSTAT_DMAERR) = (v)) |
mbed_official | 146:f64d43ff0c18 | 1836 | #endif |
mbed_official | 146:f64d43ff0c18 | 1837 | //@} |
mbed_official | 146:f64d43ff0c18 | 1838 | |
mbed_official | 146:f64d43ff0c18 | 1839 | /*! |
mbed_official | 146:f64d43ff0c18 | 1840 | * @name Register USB_ERRSTAT, field BTSERR[7] (W1C) |
mbed_official | 146:f64d43ff0c18 | 1841 | * |
mbed_official | 146:f64d43ff0c18 | 1842 | * This bit is set when a bit stuff error is detected. If set, the corresponding |
mbed_official | 146:f64d43ff0c18 | 1843 | * packet is rejected due to the error. |
mbed_official | 146:f64d43ff0c18 | 1844 | */ |
mbed_official | 146:f64d43ff0c18 | 1845 | //@{ |
mbed_official | 146:f64d43ff0c18 | 1846 | #define BP_USB_ERRSTAT_BTSERR (7U) //!< Bit position for USB_ERRSTAT_BTSERR. |
mbed_official | 146:f64d43ff0c18 | 1847 | #define BM_USB_ERRSTAT_BTSERR (0x80U) //!< Bit mask for USB_ERRSTAT_BTSERR. |
mbed_official | 146:f64d43ff0c18 | 1848 | #define BS_USB_ERRSTAT_BTSERR (1U) //!< Bit field size in bits for USB_ERRSTAT_BTSERR. |
mbed_official | 146:f64d43ff0c18 | 1849 | |
mbed_official | 146:f64d43ff0c18 | 1850 | #ifndef __LANGUAGE_ASM__ |
mbed_official | 146:f64d43ff0c18 | 1851 | //! @brief Read current value of the USB_ERRSTAT_BTSERR field. |
mbed_official | 146:f64d43ff0c18 | 1852 | #define BR_USB_ERRSTAT_BTSERR (BITBAND_ACCESS8(HW_USB_ERRSTAT_ADDR, BP_USB_ERRSTAT_BTSERR)) |
mbed_official | 146:f64d43ff0c18 | 1853 | #endif |
mbed_official | 146:f64d43ff0c18 | 1854 | |
mbed_official | 146:f64d43ff0c18 | 1855 | //! @brief Format value for bitfield USB_ERRSTAT_BTSERR. |
mbed_official | 146:f64d43ff0c18 | 1856 | #define BF_USB_ERRSTAT_BTSERR(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint8_t) << BP_USB_ERRSTAT_BTSERR), uint8_t) & BM_USB_ERRSTAT_BTSERR) |
mbed_official | 146:f64d43ff0c18 | 1857 | |
mbed_official | 146:f64d43ff0c18 | 1858 | #ifndef __LANGUAGE_ASM__ |
mbed_official | 146:f64d43ff0c18 | 1859 | //! @brief Set the BTSERR field to a new value. |
mbed_official | 146:f64d43ff0c18 | 1860 | #define BW_USB_ERRSTAT_BTSERR(v) (BITBAND_ACCESS8(HW_USB_ERRSTAT_ADDR, BP_USB_ERRSTAT_BTSERR) = (v)) |
mbed_official | 146:f64d43ff0c18 | 1861 | #endif |
mbed_official | 146:f64d43ff0c18 | 1862 | //@} |
mbed_official | 146:f64d43ff0c18 | 1863 | |
mbed_official | 146:f64d43ff0c18 | 1864 | //------------------------------------------------------------------------------------------- |
mbed_official | 146:f64d43ff0c18 | 1865 | // HW_USB_ERREN - Error Interrupt Enable register |
mbed_official | 146:f64d43ff0c18 | 1866 | //------------------------------------------------------------------------------------------- |
mbed_official | 146:f64d43ff0c18 | 1867 | |
mbed_official | 146:f64d43ff0c18 | 1868 | #ifndef __LANGUAGE_ASM__ |
mbed_official | 146:f64d43ff0c18 | 1869 | /*! |
mbed_official | 146:f64d43ff0c18 | 1870 | * @brief HW_USB_ERREN - Error Interrupt Enable register (RW) |
mbed_official | 146:f64d43ff0c18 | 1871 | * |
mbed_official | 146:f64d43ff0c18 | 1872 | * Reset value: 0x00U |
mbed_official | 146:f64d43ff0c18 | 1873 | * |
mbed_official | 146:f64d43ff0c18 | 1874 | * Contains enable bits for each of the error interrupt sources within the USB |
mbed_official | 146:f64d43ff0c18 | 1875 | * module. Setting any of these bits enables the respective interrupt source in |
mbed_official | 146:f64d43ff0c18 | 1876 | * ERRSTAT. Each bit is set as soon as the error condition is detected. Therefore, |
mbed_official | 146:f64d43ff0c18 | 1877 | * the interrupt does not typically correspond with the end of a token being |
mbed_official | 146:f64d43ff0c18 | 1878 | * processed. This register contains the value of 0x00 after a reset. |
mbed_official | 146:f64d43ff0c18 | 1879 | */ |
mbed_official | 146:f64d43ff0c18 | 1880 | typedef union _hw_usb_erren |
mbed_official | 146:f64d43ff0c18 | 1881 | { |
mbed_official | 146:f64d43ff0c18 | 1882 | uint8_t U; |
mbed_official | 146:f64d43ff0c18 | 1883 | struct _hw_usb_erren_bitfields |
mbed_official | 146:f64d43ff0c18 | 1884 | { |
mbed_official | 146:f64d43ff0c18 | 1885 | uint8_t PIDERREN : 1; //!< [0] PIDERR Interrupt Enable |
mbed_official | 146:f64d43ff0c18 | 1886 | uint8_t CRC5EOFEN : 1; //!< [1] CRC5/EOF Interrupt Enable |
mbed_official | 146:f64d43ff0c18 | 1887 | uint8_t CRC16EN : 1; //!< [2] CRC16 Interrupt Enable |
mbed_official | 146:f64d43ff0c18 | 1888 | uint8_t DFN8EN : 1; //!< [3] DFN8 Interrupt Enable |
mbed_official | 146:f64d43ff0c18 | 1889 | uint8_t BTOERREN : 1; //!< [4] BTOERR Interrupt Enable |
mbed_official | 146:f64d43ff0c18 | 1890 | uint8_t DMAERREN : 1; //!< [5] DMAERR Interrupt Enable |
mbed_official | 146:f64d43ff0c18 | 1891 | uint8_t RESERVED0 : 1; //!< [6] |
mbed_official | 146:f64d43ff0c18 | 1892 | uint8_t BTSERREN : 1; //!< [7] BTSERR Interrupt Enable |
mbed_official | 146:f64d43ff0c18 | 1893 | } B; |
mbed_official | 146:f64d43ff0c18 | 1894 | } hw_usb_erren_t; |
mbed_official | 146:f64d43ff0c18 | 1895 | #endif |
mbed_official | 146:f64d43ff0c18 | 1896 | |
mbed_official | 146:f64d43ff0c18 | 1897 | /*! |
mbed_official | 146:f64d43ff0c18 | 1898 | * @name Constants and macros for entire USB_ERREN register |
mbed_official | 146:f64d43ff0c18 | 1899 | */ |
mbed_official | 146:f64d43ff0c18 | 1900 | //@{ |
mbed_official | 146:f64d43ff0c18 | 1901 | #define HW_USB_ERREN_ADDR (REGS_USB_BASE + 0x8CU) |
mbed_official | 146:f64d43ff0c18 | 1902 | |
mbed_official | 146:f64d43ff0c18 | 1903 | #ifndef __LANGUAGE_ASM__ |
mbed_official | 146:f64d43ff0c18 | 1904 | #define HW_USB_ERREN (*(__IO hw_usb_erren_t *) HW_USB_ERREN_ADDR) |
mbed_official | 146:f64d43ff0c18 | 1905 | #define HW_USB_ERREN_RD() (HW_USB_ERREN.U) |
mbed_official | 146:f64d43ff0c18 | 1906 | #define HW_USB_ERREN_WR(v) (HW_USB_ERREN.U = (v)) |
mbed_official | 146:f64d43ff0c18 | 1907 | #define HW_USB_ERREN_SET(v) (HW_USB_ERREN_WR(HW_USB_ERREN_RD() | (v))) |
mbed_official | 146:f64d43ff0c18 | 1908 | #define HW_USB_ERREN_CLR(v) (HW_USB_ERREN_WR(HW_USB_ERREN_RD() & ~(v))) |
mbed_official | 146:f64d43ff0c18 | 1909 | #define HW_USB_ERREN_TOG(v) (HW_USB_ERREN_WR(HW_USB_ERREN_RD() ^ (v))) |
mbed_official | 146:f64d43ff0c18 | 1910 | #endif |
mbed_official | 146:f64d43ff0c18 | 1911 | //@} |
mbed_official | 146:f64d43ff0c18 | 1912 | |
mbed_official | 146:f64d43ff0c18 | 1913 | /* |
mbed_official | 146:f64d43ff0c18 | 1914 | * Constants & macros for individual USB_ERREN bitfields |
mbed_official | 146:f64d43ff0c18 | 1915 | */ |
mbed_official | 146:f64d43ff0c18 | 1916 | |
mbed_official | 146:f64d43ff0c18 | 1917 | /*! |
mbed_official | 146:f64d43ff0c18 | 1918 | * @name Register USB_ERREN, field PIDERREN[0] (RW) |
mbed_official | 146:f64d43ff0c18 | 1919 | * |
mbed_official | 146:f64d43ff0c18 | 1920 | * Values: |
mbed_official | 146:f64d43ff0c18 | 1921 | * - 0 - Disables the PIDERR interrupt. |
mbed_official | 146:f64d43ff0c18 | 1922 | * - 1 - Enters the PIDERR interrupt. |
mbed_official | 146:f64d43ff0c18 | 1923 | */ |
mbed_official | 146:f64d43ff0c18 | 1924 | //@{ |
mbed_official | 146:f64d43ff0c18 | 1925 | #define BP_USB_ERREN_PIDERREN (0U) //!< Bit position for USB_ERREN_PIDERREN. |
mbed_official | 146:f64d43ff0c18 | 1926 | #define BM_USB_ERREN_PIDERREN (0x01U) //!< Bit mask for USB_ERREN_PIDERREN. |
mbed_official | 146:f64d43ff0c18 | 1927 | #define BS_USB_ERREN_PIDERREN (1U) //!< Bit field size in bits for USB_ERREN_PIDERREN. |
mbed_official | 146:f64d43ff0c18 | 1928 | |
mbed_official | 146:f64d43ff0c18 | 1929 | #ifndef __LANGUAGE_ASM__ |
mbed_official | 146:f64d43ff0c18 | 1930 | //! @brief Read current value of the USB_ERREN_PIDERREN field. |
mbed_official | 146:f64d43ff0c18 | 1931 | #define BR_USB_ERREN_PIDERREN (BITBAND_ACCESS8(HW_USB_ERREN_ADDR, BP_USB_ERREN_PIDERREN)) |
mbed_official | 146:f64d43ff0c18 | 1932 | #endif |
mbed_official | 146:f64d43ff0c18 | 1933 | |
mbed_official | 146:f64d43ff0c18 | 1934 | //! @brief Format value for bitfield USB_ERREN_PIDERREN. |
mbed_official | 146:f64d43ff0c18 | 1935 | #define BF_USB_ERREN_PIDERREN(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint8_t) << BP_USB_ERREN_PIDERREN), uint8_t) & BM_USB_ERREN_PIDERREN) |
mbed_official | 146:f64d43ff0c18 | 1936 | |
mbed_official | 146:f64d43ff0c18 | 1937 | #ifndef __LANGUAGE_ASM__ |
mbed_official | 146:f64d43ff0c18 | 1938 | //! @brief Set the PIDERREN field to a new value. |
mbed_official | 146:f64d43ff0c18 | 1939 | #define BW_USB_ERREN_PIDERREN(v) (BITBAND_ACCESS8(HW_USB_ERREN_ADDR, BP_USB_ERREN_PIDERREN) = (v)) |
mbed_official | 146:f64d43ff0c18 | 1940 | #endif |
mbed_official | 146:f64d43ff0c18 | 1941 | //@} |
mbed_official | 146:f64d43ff0c18 | 1942 | |
mbed_official | 146:f64d43ff0c18 | 1943 | /*! |
mbed_official | 146:f64d43ff0c18 | 1944 | * @name Register USB_ERREN, field CRC5EOFEN[1] (RW) |
mbed_official | 146:f64d43ff0c18 | 1945 | * |
mbed_official | 146:f64d43ff0c18 | 1946 | * Values: |
mbed_official | 146:f64d43ff0c18 | 1947 | * - 0 - Disables the CRC5/EOF interrupt. |
mbed_official | 146:f64d43ff0c18 | 1948 | * - 1 - Enables the CRC5/EOF interrupt. |
mbed_official | 146:f64d43ff0c18 | 1949 | */ |
mbed_official | 146:f64d43ff0c18 | 1950 | //@{ |
mbed_official | 146:f64d43ff0c18 | 1951 | #define BP_USB_ERREN_CRC5EOFEN (1U) //!< Bit position for USB_ERREN_CRC5EOFEN. |
mbed_official | 146:f64d43ff0c18 | 1952 | #define BM_USB_ERREN_CRC5EOFEN (0x02U) //!< Bit mask for USB_ERREN_CRC5EOFEN. |
mbed_official | 146:f64d43ff0c18 | 1953 | #define BS_USB_ERREN_CRC5EOFEN (1U) //!< Bit field size in bits for USB_ERREN_CRC5EOFEN. |
mbed_official | 146:f64d43ff0c18 | 1954 | |
mbed_official | 146:f64d43ff0c18 | 1955 | #ifndef __LANGUAGE_ASM__ |
mbed_official | 146:f64d43ff0c18 | 1956 | //! @brief Read current value of the USB_ERREN_CRC5EOFEN field. |
mbed_official | 146:f64d43ff0c18 | 1957 | #define BR_USB_ERREN_CRC5EOFEN (BITBAND_ACCESS8(HW_USB_ERREN_ADDR, BP_USB_ERREN_CRC5EOFEN)) |
mbed_official | 146:f64d43ff0c18 | 1958 | #endif |
mbed_official | 146:f64d43ff0c18 | 1959 | |
mbed_official | 146:f64d43ff0c18 | 1960 | //! @brief Format value for bitfield USB_ERREN_CRC5EOFEN. |
mbed_official | 146:f64d43ff0c18 | 1961 | #define BF_USB_ERREN_CRC5EOFEN(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint8_t) << BP_USB_ERREN_CRC5EOFEN), uint8_t) & BM_USB_ERREN_CRC5EOFEN) |
mbed_official | 146:f64d43ff0c18 | 1962 | |
mbed_official | 146:f64d43ff0c18 | 1963 | #ifndef __LANGUAGE_ASM__ |
mbed_official | 146:f64d43ff0c18 | 1964 | //! @brief Set the CRC5EOFEN field to a new value. |
mbed_official | 146:f64d43ff0c18 | 1965 | #define BW_USB_ERREN_CRC5EOFEN(v) (BITBAND_ACCESS8(HW_USB_ERREN_ADDR, BP_USB_ERREN_CRC5EOFEN) = (v)) |
mbed_official | 146:f64d43ff0c18 | 1966 | #endif |
mbed_official | 146:f64d43ff0c18 | 1967 | //@} |
mbed_official | 146:f64d43ff0c18 | 1968 | |
mbed_official | 146:f64d43ff0c18 | 1969 | /*! |
mbed_official | 146:f64d43ff0c18 | 1970 | * @name Register USB_ERREN, field CRC16EN[2] (RW) |
mbed_official | 146:f64d43ff0c18 | 1971 | * |
mbed_official | 146:f64d43ff0c18 | 1972 | * Values: |
mbed_official | 146:f64d43ff0c18 | 1973 | * - 0 - Disables the CRC16 interrupt. |
mbed_official | 146:f64d43ff0c18 | 1974 | * - 1 - Enables the CRC16 interrupt. |
mbed_official | 146:f64d43ff0c18 | 1975 | */ |
mbed_official | 146:f64d43ff0c18 | 1976 | //@{ |
mbed_official | 146:f64d43ff0c18 | 1977 | #define BP_USB_ERREN_CRC16EN (2U) //!< Bit position for USB_ERREN_CRC16EN. |
mbed_official | 146:f64d43ff0c18 | 1978 | #define BM_USB_ERREN_CRC16EN (0x04U) //!< Bit mask for USB_ERREN_CRC16EN. |
mbed_official | 146:f64d43ff0c18 | 1979 | #define BS_USB_ERREN_CRC16EN (1U) //!< Bit field size in bits for USB_ERREN_CRC16EN. |
mbed_official | 146:f64d43ff0c18 | 1980 | |
mbed_official | 146:f64d43ff0c18 | 1981 | #ifndef __LANGUAGE_ASM__ |
mbed_official | 146:f64d43ff0c18 | 1982 | //! @brief Read current value of the USB_ERREN_CRC16EN field. |
mbed_official | 146:f64d43ff0c18 | 1983 | #define BR_USB_ERREN_CRC16EN (BITBAND_ACCESS8(HW_USB_ERREN_ADDR, BP_USB_ERREN_CRC16EN)) |
mbed_official | 146:f64d43ff0c18 | 1984 | #endif |
mbed_official | 146:f64d43ff0c18 | 1985 | |
mbed_official | 146:f64d43ff0c18 | 1986 | //! @brief Format value for bitfield USB_ERREN_CRC16EN. |
mbed_official | 146:f64d43ff0c18 | 1987 | #define BF_USB_ERREN_CRC16EN(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint8_t) << BP_USB_ERREN_CRC16EN), uint8_t) & BM_USB_ERREN_CRC16EN) |
mbed_official | 146:f64d43ff0c18 | 1988 | |
mbed_official | 146:f64d43ff0c18 | 1989 | #ifndef __LANGUAGE_ASM__ |
mbed_official | 146:f64d43ff0c18 | 1990 | //! @brief Set the CRC16EN field to a new value. |
mbed_official | 146:f64d43ff0c18 | 1991 | #define BW_USB_ERREN_CRC16EN(v) (BITBAND_ACCESS8(HW_USB_ERREN_ADDR, BP_USB_ERREN_CRC16EN) = (v)) |
mbed_official | 146:f64d43ff0c18 | 1992 | #endif |
mbed_official | 146:f64d43ff0c18 | 1993 | //@} |
mbed_official | 146:f64d43ff0c18 | 1994 | |
mbed_official | 146:f64d43ff0c18 | 1995 | /*! |
mbed_official | 146:f64d43ff0c18 | 1996 | * @name Register USB_ERREN, field DFN8EN[3] (RW) |
mbed_official | 146:f64d43ff0c18 | 1997 | * |
mbed_official | 146:f64d43ff0c18 | 1998 | * Values: |
mbed_official | 146:f64d43ff0c18 | 1999 | * - 0 - Disables the DFN8 interrupt. |
mbed_official | 146:f64d43ff0c18 | 2000 | * - 1 - Enables the DFN8 interrupt. |
mbed_official | 146:f64d43ff0c18 | 2001 | */ |
mbed_official | 146:f64d43ff0c18 | 2002 | //@{ |
mbed_official | 146:f64d43ff0c18 | 2003 | #define BP_USB_ERREN_DFN8EN (3U) //!< Bit position for USB_ERREN_DFN8EN. |
mbed_official | 146:f64d43ff0c18 | 2004 | #define BM_USB_ERREN_DFN8EN (0x08U) //!< Bit mask for USB_ERREN_DFN8EN. |
mbed_official | 146:f64d43ff0c18 | 2005 | #define BS_USB_ERREN_DFN8EN (1U) //!< Bit field size in bits for USB_ERREN_DFN8EN. |
mbed_official | 146:f64d43ff0c18 | 2006 | |
mbed_official | 146:f64d43ff0c18 | 2007 | #ifndef __LANGUAGE_ASM__ |
mbed_official | 146:f64d43ff0c18 | 2008 | //! @brief Read current value of the USB_ERREN_DFN8EN field. |
mbed_official | 146:f64d43ff0c18 | 2009 | #define BR_USB_ERREN_DFN8EN (BITBAND_ACCESS8(HW_USB_ERREN_ADDR, BP_USB_ERREN_DFN8EN)) |
mbed_official | 146:f64d43ff0c18 | 2010 | #endif |
mbed_official | 146:f64d43ff0c18 | 2011 | |
mbed_official | 146:f64d43ff0c18 | 2012 | //! @brief Format value for bitfield USB_ERREN_DFN8EN. |
mbed_official | 146:f64d43ff0c18 | 2013 | #define BF_USB_ERREN_DFN8EN(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint8_t) << BP_USB_ERREN_DFN8EN), uint8_t) & BM_USB_ERREN_DFN8EN) |
mbed_official | 146:f64d43ff0c18 | 2014 | |
mbed_official | 146:f64d43ff0c18 | 2015 | #ifndef __LANGUAGE_ASM__ |
mbed_official | 146:f64d43ff0c18 | 2016 | //! @brief Set the DFN8EN field to a new value. |
mbed_official | 146:f64d43ff0c18 | 2017 | #define BW_USB_ERREN_DFN8EN(v) (BITBAND_ACCESS8(HW_USB_ERREN_ADDR, BP_USB_ERREN_DFN8EN) = (v)) |
mbed_official | 146:f64d43ff0c18 | 2018 | #endif |
mbed_official | 146:f64d43ff0c18 | 2019 | //@} |
mbed_official | 146:f64d43ff0c18 | 2020 | |
mbed_official | 146:f64d43ff0c18 | 2021 | /*! |
mbed_official | 146:f64d43ff0c18 | 2022 | * @name Register USB_ERREN, field BTOERREN[4] (RW) |
mbed_official | 146:f64d43ff0c18 | 2023 | * |
mbed_official | 146:f64d43ff0c18 | 2024 | * Values: |
mbed_official | 146:f64d43ff0c18 | 2025 | * - 0 - Disables the BTOERR interrupt. |
mbed_official | 146:f64d43ff0c18 | 2026 | * - 1 - Enables the BTOERR interrupt. |
mbed_official | 146:f64d43ff0c18 | 2027 | */ |
mbed_official | 146:f64d43ff0c18 | 2028 | //@{ |
mbed_official | 146:f64d43ff0c18 | 2029 | #define BP_USB_ERREN_BTOERREN (4U) //!< Bit position for USB_ERREN_BTOERREN. |
mbed_official | 146:f64d43ff0c18 | 2030 | #define BM_USB_ERREN_BTOERREN (0x10U) //!< Bit mask for USB_ERREN_BTOERREN. |
mbed_official | 146:f64d43ff0c18 | 2031 | #define BS_USB_ERREN_BTOERREN (1U) //!< Bit field size in bits for USB_ERREN_BTOERREN. |
mbed_official | 146:f64d43ff0c18 | 2032 | |
mbed_official | 146:f64d43ff0c18 | 2033 | #ifndef __LANGUAGE_ASM__ |
mbed_official | 146:f64d43ff0c18 | 2034 | //! @brief Read current value of the USB_ERREN_BTOERREN field. |
mbed_official | 146:f64d43ff0c18 | 2035 | #define BR_USB_ERREN_BTOERREN (BITBAND_ACCESS8(HW_USB_ERREN_ADDR, BP_USB_ERREN_BTOERREN)) |
mbed_official | 146:f64d43ff0c18 | 2036 | #endif |
mbed_official | 146:f64d43ff0c18 | 2037 | |
mbed_official | 146:f64d43ff0c18 | 2038 | //! @brief Format value for bitfield USB_ERREN_BTOERREN. |
mbed_official | 146:f64d43ff0c18 | 2039 | #define BF_USB_ERREN_BTOERREN(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint8_t) << BP_USB_ERREN_BTOERREN), uint8_t) & BM_USB_ERREN_BTOERREN) |
mbed_official | 146:f64d43ff0c18 | 2040 | |
mbed_official | 146:f64d43ff0c18 | 2041 | #ifndef __LANGUAGE_ASM__ |
mbed_official | 146:f64d43ff0c18 | 2042 | //! @brief Set the BTOERREN field to a new value. |
mbed_official | 146:f64d43ff0c18 | 2043 | #define BW_USB_ERREN_BTOERREN(v) (BITBAND_ACCESS8(HW_USB_ERREN_ADDR, BP_USB_ERREN_BTOERREN) = (v)) |
mbed_official | 146:f64d43ff0c18 | 2044 | #endif |
mbed_official | 146:f64d43ff0c18 | 2045 | //@} |
mbed_official | 146:f64d43ff0c18 | 2046 | |
mbed_official | 146:f64d43ff0c18 | 2047 | /*! |
mbed_official | 146:f64d43ff0c18 | 2048 | * @name Register USB_ERREN, field DMAERREN[5] (RW) |
mbed_official | 146:f64d43ff0c18 | 2049 | * |
mbed_official | 146:f64d43ff0c18 | 2050 | * Values: |
mbed_official | 146:f64d43ff0c18 | 2051 | * - 0 - Disables the DMAERR interrupt. |
mbed_official | 146:f64d43ff0c18 | 2052 | * - 1 - Enables the DMAERR interrupt. |
mbed_official | 146:f64d43ff0c18 | 2053 | */ |
mbed_official | 146:f64d43ff0c18 | 2054 | //@{ |
mbed_official | 146:f64d43ff0c18 | 2055 | #define BP_USB_ERREN_DMAERREN (5U) //!< Bit position for USB_ERREN_DMAERREN. |
mbed_official | 146:f64d43ff0c18 | 2056 | #define BM_USB_ERREN_DMAERREN (0x20U) //!< Bit mask for USB_ERREN_DMAERREN. |
mbed_official | 146:f64d43ff0c18 | 2057 | #define BS_USB_ERREN_DMAERREN (1U) //!< Bit field size in bits for USB_ERREN_DMAERREN. |
mbed_official | 146:f64d43ff0c18 | 2058 | |
mbed_official | 146:f64d43ff0c18 | 2059 | #ifndef __LANGUAGE_ASM__ |
mbed_official | 146:f64d43ff0c18 | 2060 | //! @brief Read current value of the USB_ERREN_DMAERREN field. |
mbed_official | 146:f64d43ff0c18 | 2061 | #define BR_USB_ERREN_DMAERREN (BITBAND_ACCESS8(HW_USB_ERREN_ADDR, BP_USB_ERREN_DMAERREN)) |
mbed_official | 146:f64d43ff0c18 | 2062 | #endif |
mbed_official | 146:f64d43ff0c18 | 2063 | |
mbed_official | 146:f64d43ff0c18 | 2064 | //! @brief Format value for bitfield USB_ERREN_DMAERREN. |
mbed_official | 146:f64d43ff0c18 | 2065 | #define BF_USB_ERREN_DMAERREN(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint8_t) << BP_USB_ERREN_DMAERREN), uint8_t) & BM_USB_ERREN_DMAERREN) |
mbed_official | 146:f64d43ff0c18 | 2066 | |
mbed_official | 146:f64d43ff0c18 | 2067 | #ifndef __LANGUAGE_ASM__ |
mbed_official | 146:f64d43ff0c18 | 2068 | //! @brief Set the DMAERREN field to a new value. |
mbed_official | 146:f64d43ff0c18 | 2069 | #define BW_USB_ERREN_DMAERREN(v) (BITBAND_ACCESS8(HW_USB_ERREN_ADDR, BP_USB_ERREN_DMAERREN) = (v)) |
mbed_official | 146:f64d43ff0c18 | 2070 | #endif |
mbed_official | 146:f64d43ff0c18 | 2071 | //@} |
mbed_official | 146:f64d43ff0c18 | 2072 | |
mbed_official | 146:f64d43ff0c18 | 2073 | /*! |
mbed_official | 146:f64d43ff0c18 | 2074 | * @name Register USB_ERREN, field BTSERREN[7] (RW) |
mbed_official | 146:f64d43ff0c18 | 2075 | * |
mbed_official | 146:f64d43ff0c18 | 2076 | * Values: |
mbed_official | 146:f64d43ff0c18 | 2077 | * - 0 - Disables the BTSERR interrupt. |
mbed_official | 146:f64d43ff0c18 | 2078 | * - 1 - Enables the BTSERR interrupt. |
mbed_official | 146:f64d43ff0c18 | 2079 | */ |
mbed_official | 146:f64d43ff0c18 | 2080 | //@{ |
mbed_official | 146:f64d43ff0c18 | 2081 | #define BP_USB_ERREN_BTSERREN (7U) //!< Bit position for USB_ERREN_BTSERREN. |
mbed_official | 146:f64d43ff0c18 | 2082 | #define BM_USB_ERREN_BTSERREN (0x80U) //!< Bit mask for USB_ERREN_BTSERREN. |
mbed_official | 146:f64d43ff0c18 | 2083 | #define BS_USB_ERREN_BTSERREN (1U) //!< Bit field size in bits for USB_ERREN_BTSERREN. |
mbed_official | 146:f64d43ff0c18 | 2084 | |
mbed_official | 146:f64d43ff0c18 | 2085 | #ifndef __LANGUAGE_ASM__ |
mbed_official | 146:f64d43ff0c18 | 2086 | //! @brief Read current value of the USB_ERREN_BTSERREN field. |
mbed_official | 146:f64d43ff0c18 | 2087 | #define BR_USB_ERREN_BTSERREN (BITBAND_ACCESS8(HW_USB_ERREN_ADDR, BP_USB_ERREN_BTSERREN)) |
mbed_official | 146:f64d43ff0c18 | 2088 | #endif |
mbed_official | 146:f64d43ff0c18 | 2089 | |
mbed_official | 146:f64d43ff0c18 | 2090 | //! @brief Format value for bitfield USB_ERREN_BTSERREN. |
mbed_official | 146:f64d43ff0c18 | 2091 | #define BF_USB_ERREN_BTSERREN(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint8_t) << BP_USB_ERREN_BTSERREN), uint8_t) & BM_USB_ERREN_BTSERREN) |
mbed_official | 146:f64d43ff0c18 | 2092 | |
mbed_official | 146:f64d43ff0c18 | 2093 | #ifndef __LANGUAGE_ASM__ |
mbed_official | 146:f64d43ff0c18 | 2094 | //! @brief Set the BTSERREN field to a new value. |
mbed_official | 146:f64d43ff0c18 | 2095 | #define BW_USB_ERREN_BTSERREN(v) (BITBAND_ACCESS8(HW_USB_ERREN_ADDR, BP_USB_ERREN_BTSERREN) = (v)) |
mbed_official | 146:f64d43ff0c18 | 2096 | #endif |
mbed_official | 146:f64d43ff0c18 | 2097 | //@} |
mbed_official | 146:f64d43ff0c18 | 2098 | |
mbed_official | 146:f64d43ff0c18 | 2099 | //------------------------------------------------------------------------------------------- |
mbed_official | 146:f64d43ff0c18 | 2100 | // HW_USB_STAT - Status register |
mbed_official | 146:f64d43ff0c18 | 2101 | //------------------------------------------------------------------------------------------- |
mbed_official | 146:f64d43ff0c18 | 2102 | |
mbed_official | 146:f64d43ff0c18 | 2103 | #ifndef __LANGUAGE_ASM__ |
mbed_official | 146:f64d43ff0c18 | 2104 | /*! |
mbed_official | 146:f64d43ff0c18 | 2105 | * @brief HW_USB_STAT - Status register (RO) |
mbed_official | 146:f64d43ff0c18 | 2106 | * |
mbed_official | 146:f64d43ff0c18 | 2107 | * Reset value: 0x00U |
mbed_official | 146:f64d43ff0c18 | 2108 | * |
mbed_official | 146:f64d43ff0c18 | 2109 | * Reports the transaction status within the USB module. When the processor's |
mbed_official | 146:f64d43ff0c18 | 2110 | * interrupt controller has received a TOKDNE, interrupt the Status Register must |
mbed_official | 146:f64d43ff0c18 | 2111 | * be read to determine the status of the previous endpoint communication. The |
mbed_official | 146:f64d43ff0c18 | 2112 | * data in the status register is valid when TOKDNE interrupt is asserted. The |
mbed_official | 146:f64d43ff0c18 | 2113 | * Status register is actually a read window into a status FIFO maintained by the USB |
mbed_official | 146:f64d43ff0c18 | 2114 | * module. When the USB module uses a BD, it updates the Status register. If |
mbed_official | 146:f64d43ff0c18 | 2115 | * another USB transaction is performed before the TOKDNE interrupt is serviced, the |
mbed_official | 146:f64d43ff0c18 | 2116 | * USB module stores the status of the next transaction in the STAT FIFO. Thus |
mbed_official | 146:f64d43ff0c18 | 2117 | * STAT is actually a four byte FIFO that allows the processor core to process one |
mbed_official | 146:f64d43ff0c18 | 2118 | * transaction while the SIE is processing the next transaction. Clearing the |
mbed_official | 146:f64d43ff0c18 | 2119 | * TOKDNE bit in the ISTAT register causes the SIE to update STAT with the contents |
mbed_official | 146:f64d43ff0c18 | 2120 | * of the next STAT value. If the data in the STAT holding register is valid, the |
mbed_official | 146:f64d43ff0c18 | 2121 | * SIE immediately reasserts to TOKDNE interrupt. |
mbed_official | 146:f64d43ff0c18 | 2122 | */ |
mbed_official | 146:f64d43ff0c18 | 2123 | typedef union _hw_usb_stat |
mbed_official | 146:f64d43ff0c18 | 2124 | { |
mbed_official | 146:f64d43ff0c18 | 2125 | uint8_t U; |
mbed_official | 146:f64d43ff0c18 | 2126 | struct _hw_usb_stat_bitfields |
mbed_official | 146:f64d43ff0c18 | 2127 | { |
mbed_official | 146:f64d43ff0c18 | 2128 | uint8_t RESERVED0 : 2; //!< [1:0] |
mbed_official | 146:f64d43ff0c18 | 2129 | uint8_t ODD : 1; //!< [2] |
mbed_official | 146:f64d43ff0c18 | 2130 | uint8_t TX : 1; //!< [3] Transmit Indicator |
mbed_official | 146:f64d43ff0c18 | 2131 | uint8_t ENDP : 4; //!< [7:4] |
mbed_official | 146:f64d43ff0c18 | 2132 | } B; |
mbed_official | 146:f64d43ff0c18 | 2133 | } hw_usb_stat_t; |
mbed_official | 146:f64d43ff0c18 | 2134 | #endif |
mbed_official | 146:f64d43ff0c18 | 2135 | |
mbed_official | 146:f64d43ff0c18 | 2136 | /*! |
mbed_official | 146:f64d43ff0c18 | 2137 | * @name Constants and macros for entire USB_STAT register |
mbed_official | 146:f64d43ff0c18 | 2138 | */ |
mbed_official | 146:f64d43ff0c18 | 2139 | //@{ |
mbed_official | 146:f64d43ff0c18 | 2140 | #define HW_USB_STAT_ADDR (REGS_USB_BASE + 0x90U) |
mbed_official | 146:f64d43ff0c18 | 2141 | |
mbed_official | 146:f64d43ff0c18 | 2142 | #ifndef __LANGUAGE_ASM__ |
mbed_official | 146:f64d43ff0c18 | 2143 | #define HW_USB_STAT (*(__I hw_usb_stat_t *) HW_USB_STAT_ADDR) |
mbed_official | 146:f64d43ff0c18 | 2144 | #define HW_USB_STAT_RD() (HW_USB_STAT.U) |
mbed_official | 146:f64d43ff0c18 | 2145 | #endif |
mbed_official | 146:f64d43ff0c18 | 2146 | //@} |
mbed_official | 146:f64d43ff0c18 | 2147 | |
mbed_official | 146:f64d43ff0c18 | 2148 | /* |
mbed_official | 146:f64d43ff0c18 | 2149 | * Constants & macros for individual USB_STAT bitfields |
mbed_official | 146:f64d43ff0c18 | 2150 | */ |
mbed_official | 146:f64d43ff0c18 | 2151 | |
mbed_official | 146:f64d43ff0c18 | 2152 | /*! |
mbed_official | 146:f64d43ff0c18 | 2153 | * @name Register USB_STAT, field ODD[2] (RO) |
mbed_official | 146:f64d43ff0c18 | 2154 | * |
mbed_official | 146:f64d43ff0c18 | 2155 | * This bit is set if the last buffer descriptor updated was in the odd bank of |
mbed_official | 146:f64d43ff0c18 | 2156 | * the BDT. |
mbed_official | 146:f64d43ff0c18 | 2157 | */ |
mbed_official | 146:f64d43ff0c18 | 2158 | //@{ |
mbed_official | 146:f64d43ff0c18 | 2159 | #define BP_USB_STAT_ODD (2U) //!< Bit position for USB_STAT_ODD. |
mbed_official | 146:f64d43ff0c18 | 2160 | #define BM_USB_STAT_ODD (0x04U) //!< Bit mask for USB_STAT_ODD. |
mbed_official | 146:f64d43ff0c18 | 2161 | #define BS_USB_STAT_ODD (1U) //!< Bit field size in bits for USB_STAT_ODD. |
mbed_official | 146:f64d43ff0c18 | 2162 | |
mbed_official | 146:f64d43ff0c18 | 2163 | #ifndef __LANGUAGE_ASM__ |
mbed_official | 146:f64d43ff0c18 | 2164 | //! @brief Read current value of the USB_STAT_ODD field. |
mbed_official | 146:f64d43ff0c18 | 2165 | #define BR_USB_STAT_ODD (BITBAND_ACCESS8(HW_USB_STAT_ADDR, BP_USB_STAT_ODD)) |
mbed_official | 146:f64d43ff0c18 | 2166 | #endif |
mbed_official | 146:f64d43ff0c18 | 2167 | //@} |
mbed_official | 146:f64d43ff0c18 | 2168 | |
mbed_official | 146:f64d43ff0c18 | 2169 | /*! |
mbed_official | 146:f64d43ff0c18 | 2170 | * @name Register USB_STAT, field TX[3] (RO) |
mbed_official | 146:f64d43ff0c18 | 2171 | * |
mbed_official | 146:f64d43ff0c18 | 2172 | * Values: |
mbed_official | 146:f64d43ff0c18 | 2173 | * - 0 - The most recent transaction was a receive operation. |
mbed_official | 146:f64d43ff0c18 | 2174 | * - 1 - The most recent transaction was a transmit operation. |
mbed_official | 146:f64d43ff0c18 | 2175 | */ |
mbed_official | 146:f64d43ff0c18 | 2176 | //@{ |
mbed_official | 146:f64d43ff0c18 | 2177 | #define BP_USB_STAT_TX (3U) //!< Bit position for USB_STAT_TX. |
mbed_official | 146:f64d43ff0c18 | 2178 | #define BM_USB_STAT_TX (0x08U) //!< Bit mask for USB_STAT_TX. |
mbed_official | 146:f64d43ff0c18 | 2179 | #define BS_USB_STAT_TX (1U) //!< Bit field size in bits for USB_STAT_TX. |
mbed_official | 146:f64d43ff0c18 | 2180 | |
mbed_official | 146:f64d43ff0c18 | 2181 | #ifndef __LANGUAGE_ASM__ |
mbed_official | 146:f64d43ff0c18 | 2182 | //! @brief Read current value of the USB_STAT_TX field. |
mbed_official | 146:f64d43ff0c18 | 2183 | #define BR_USB_STAT_TX (BITBAND_ACCESS8(HW_USB_STAT_ADDR, BP_USB_STAT_TX)) |
mbed_official | 146:f64d43ff0c18 | 2184 | #endif |
mbed_official | 146:f64d43ff0c18 | 2185 | //@} |
mbed_official | 146:f64d43ff0c18 | 2186 | |
mbed_official | 146:f64d43ff0c18 | 2187 | /*! |
mbed_official | 146:f64d43ff0c18 | 2188 | * @name Register USB_STAT, field ENDP[7:4] (RO) |
mbed_official | 146:f64d43ff0c18 | 2189 | * |
mbed_official | 146:f64d43ff0c18 | 2190 | * This four-bit field encodes the endpoint address that received or transmitted |
mbed_official | 146:f64d43ff0c18 | 2191 | * the previous token. This allows the processor core to determine the BDT entry |
mbed_official | 146:f64d43ff0c18 | 2192 | * that was updated by the last USB transaction. |
mbed_official | 146:f64d43ff0c18 | 2193 | */ |
mbed_official | 146:f64d43ff0c18 | 2194 | //@{ |
mbed_official | 146:f64d43ff0c18 | 2195 | #define BP_USB_STAT_ENDP (4U) //!< Bit position for USB_STAT_ENDP. |
mbed_official | 146:f64d43ff0c18 | 2196 | #define BM_USB_STAT_ENDP (0xF0U) //!< Bit mask for USB_STAT_ENDP. |
mbed_official | 146:f64d43ff0c18 | 2197 | #define BS_USB_STAT_ENDP (4U) //!< Bit field size in bits for USB_STAT_ENDP. |
mbed_official | 146:f64d43ff0c18 | 2198 | |
mbed_official | 146:f64d43ff0c18 | 2199 | #ifndef __LANGUAGE_ASM__ |
mbed_official | 146:f64d43ff0c18 | 2200 | //! @brief Read current value of the USB_STAT_ENDP field. |
mbed_official | 146:f64d43ff0c18 | 2201 | #define BR_USB_STAT_ENDP (HW_USB_STAT.B.ENDP) |
mbed_official | 146:f64d43ff0c18 | 2202 | #endif |
mbed_official | 146:f64d43ff0c18 | 2203 | //@} |
mbed_official | 146:f64d43ff0c18 | 2204 | |
mbed_official | 146:f64d43ff0c18 | 2205 | //------------------------------------------------------------------------------------------- |
mbed_official | 146:f64d43ff0c18 | 2206 | // HW_USB_CTL - Control register |
mbed_official | 146:f64d43ff0c18 | 2207 | //------------------------------------------------------------------------------------------- |
mbed_official | 146:f64d43ff0c18 | 2208 | |
mbed_official | 146:f64d43ff0c18 | 2209 | #ifndef __LANGUAGE_ASM__ |
mbed_official | 146:f64d43ff0c18 | 2210 | /*! |
mbed_official | 146:f64d43ff0c18 | 2211 | * @brief HW_USB_CTL - Control register (RW) |
mbed_official | 146:f64d43ff0c18 | 2212 | * |
mbed_official | 146:f64d43ff0c18 | 2213 | * Reset value: 0x00U |
mbed_official | 146:f64d43ff0c18 | 2214 | * |
mbed_official | 146:f64d43ff0c18 | 2215 | * Provides various control and configuration information for the USB module. |
mbed_official | 146:f64d43ff0c18 | 2216 | */ |
mbed_official | 146:f64d43ff0c18 | 2217 | typedef union _hw_usb_ctl |
mbed_official | 146:f64d43ff0c18 | 2218 | { |
mbed_official | 146:f64d43ff0c18 | 2219 | uint8_t U; |
mbed_official | 146:f64d43ff0c18 | 2220 | struct _hw_usb_ctl_bitfields |
mbed_official | 146:f64d43ff0c18 | 2221 | { |
mbed_official | 146:f64d43ff0c18 | 2222 | uint8_t USBENSOFEN : 1; //!< [0] USB Enable |
mbed_official | 146:f64d43ff0c18 | 2223 | uint8_t ODDRST : 1; //!< [1] |
mbed_official | 146:f64d43ff0c18 | 2224 | uint8_t RESUME : 1; //!< [2] |
mbed_official | 146:f64d43ff0c18 | 2225 | uint8_t HOSTMODEEN : 1; //!< [3] |
mbed_official | 146:f64d43ff0c18 | 2226 | uint8_t RESET : 1; //!< [4] |
mbed_official | 146:f64d43ff0c18 | 2227 | uint8_t TXSUSPENDTOKENBUSY : 1; //!< [5] |
mbed_official | 146:f64d43ff0c18 | 2228 | uint8_t SE0 : 1; //!< [6] Live USB Single Ended Zero signal |
mbed_official | 146:f64d43ff0c18 | 2229 | uint8_t JSTATE : 1; //!< [7] Live USB differential receiver JSTATE |
mbed_official | 146:f64d43ff0c18 | 2230 | //! signal |
mbed_official | 146:f64d43ff0c18 | 2231 | } B; |
mbed_official | 146:f64d43ff0c18 | 2232 | } hw_usb_ctl_t; |
mbed_official | 146:f64d43ff0c18 | 2233 | #endif |
mbed_official | 146:f64d43ff0c18 | 2234 | |
mbed_official | 146:f64d43ff0c18 | 2235 | /*! |
mbed_official | 146:f64d43ff0c18 | 2236 | * @name Constants and macros for entire USB_CTL register |
mbed_official | 146:f64d43ff0c18 | 2237 | */ |
mbed_official | 146:f64d43ff0c18 | 2238 | //@{ |
mbed_official | 146:f64d43ff0c18 | 2239 | #define HW_USB_CTL_ADDR (REGS_USB_BASE + 0x94U) |
mbed_official | 146:f64d43ff0c18 | 2240 | |
mbed_official | 146:f64d43ff0c18 | 2241 | #ifndef __LANGUAGE_ASM__ |
mbed_official | 146:f64d43ff0c18 | 2242 | #define HW_USB_CTL (*(__IO hw_usb_ctl_t *) HW_USB_CTL_ADDR) |
mbed_official | 146:f64d43ff0c18 | 2243 | #define HW_USB_CTL_RD() (HW_USB_CTL.U) |
mbed_official | 146:f64d43ff0c18 | 2244 | #define HW_USB_CTL_WR(v) (HW_USB_CTL.U = (v)) |
mbed_official | 146:f64d43ff0c18 | 2245 | #define HW_USB_CTL_SET(v) (HW_USB_CTL_WR(HW_USB_CTL_RD() | (v))) |
mbed_official | 146:f64d43ff0c18 | 2246 | #define HW_USB_CTL_CLR(v) (HW_USB_CTL_WR(HW_USB_CTL_RD() & ~(v))) |
mbed_official | 146:f64d43ff0c18 | 2247 | #define HW_USB_CTL_TOG(v) (HW_USB_CTL_WR(HW_USB_CTL_RD() ^ (v))) |
mbed_official | 146:f64d43ff0c18 | 2248 | #endif |
mbed_official | 146:f64d43ff0c18 | 2249 | //@} |
mbed_official | 146:f64d43ff0c18 | 2250 | |
mbed_official | 146:f64d43ff0c18 | 2251 | /* |
mbed_official | 146:f64d43ff0c18 | 2252 | * Constants & macros for individual USB_CTL bitfields |
mbed_official | 146:f64d43ff0c18 | 2253 | */ |
mbed_official | 146:f64d43ff0c18 | 2254 | |
mbed_official | 146:f64d43ff0c18 | 2255 | /*! |
mbed_official | 146:f64d43ff0c18 | 2256 | * @name Register USB_CTL, field USBENSOFEN[0] (RW) |
mbed_official | 146:f64d43ff0c18 | 2257 | * |
mbed_official | 146:f64d43ff0c18 | 2258 | * Setting this bit enables the USB-FS to operate; clearing it disables the |
mbed_official | 146:f64d43ff0c18 | 2259 | * USB-FS. Setting the bit causes the SIE to reset all of its ODD bits to the BDTs. |
mbed_official | 146:f64d43ff0c18 | 2260 | * Therefore, setting this bit resets much of the logic in the SIE. When host mode |
mbed_official | 146:f64d43ff0c18 | 2261 | * is enabled, clearing this bit causes the SIE to stop sending SOF tokens. |
mbed_official | 146:f64d43ff0c18 | 2262 | * |
mbed_official | 146:f64d43ff0c18 | 2263 | * Values: |
mbed_official | 146:f64d43ff0c18 | 2264 | * - 0 - Disables the USB Module. |
mbed_official | 146:f64d43ff0c18 | 2265 | * - 1 - Enables the USB Module. |
mbed_official | 146:f64d43ff0c18 | 2266 | */ |
mbed_official | 146:f64d43ff0c18 | 2267 | //@{ |
mbed_official | 146:f64d43ff0c18 | 2268 | #define BP_USB_CTL_USBENSOFEN (0U) //!< Bit position for USB_CTL_USBENSOFEN. |
mbed_official | 146:f64d43ff0c18 | 2269 | #define BM_USB_CTL_USBENSOFEN (0x01U) //!< Bit mask for USB_CTL_USBENSOFEN. |
mbed_official | 146:f64d43ff0c18 | 2270 | #define BS_USB_CTL_USBENSOFEN (1U) //!< Bit field size in bits for USB_CTL_USBENSOFEN. |
mbed_official | 146:f64d43ff0c18 | 2271 | |
mbed_official | 146:f64d43ff0c18 | 2272 | #ifndef __LANGUAGE_ASM__ |
mbed_official | 146:f64d43ff0c18 | 2273 | //! @brief Read current value of the USB_CTL_USBENSOFEN field. |
mbed_official | 146:f64d43ff0c18 | 2274 | #define BR_USB_CTL_USBENSOFEN (BITBAND_ACCESS8(HW_USB_CTL_ADDR, BP_USB_CTL_USBENSOFEN)) |
mbed_official | 146:f64d43ff0c18 | 2275 | #endif |
mbed_official | 146:f64d43ff0c18 | 2276 | |
mbed_official | 146:f64d43ff0c18 | 2277 | //! @brief Format value for bitfield USB_CTL_USBENSOFEN. |
mbed_official | 146:f64d43ff0c18 | 2278 | #define BF_USB_CTL_USBENSOFEN(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint8_t) << BP_USB_CTL_USBENSOFEN), uint8_t) & BM_USB_CTL_USBENSOFEN) |
mbed_official | 146:f64d43ff0c18 | 2279 | |
mbed_official | 146:f64d43ff0c18 | 2280 | #ifndef __LANGUAGE_ASM__ |
mbed_official | 146:f64d43ff0c18 | 2281 | //! @brief Set the USBENSOFEN field to a new value. |
mbed_official | 146:f64d43ff0c18 | 2282 | #define BW_USB_CTL_USBENSOFEN(v) (BITBAND_ACCESS8(HW_USB_CTL_ADDR, BP_USB_CTL_USBENSOFEN) = (v)) |
mbed_official | 146:f64d43ff0c18 | 2283 | #endif |
mbed_official | 146:f64d43ff0c18 | 2284 | //@} |
mbed_official | 146:f64d43ff0c18 | 2285 | |
mbed_official | 146:f64d43ff0c18 | 2286 | /*! |
mbed_official | 146:f64d43ff0c18 | 2287 | * @name Register USB_CTL, field ODDRST[1] (RW) |
mbed_official | 146:f64d43ff0c18 | 2288 | * |
mbed_official | 146:f64d43ff0c18 | 2289 | * Setting this bit to 1 resets all the BDT ODD ping/pong fields to 0, which |
mbed_official | 146:f64d43ff0c18 | 2290 | * then specifies the EVEN BDT bank. |
mbed_official | 146:f64d43ff0c18 | 2291 | */ |
mbed_official | 146:f64d43ff0c18 | 2292 | //@{ |
mbed_official | 146:f64d43ff0c18 | 2293 | #define BP_USB_CTL_ODDRST (1U) //!< Bit position for USB_CTL_ODDRST. |
mbed_official | 146:f64d43ff0c18 | 2294 | #define BM_USB_CTL_ODDRST (0x02U) //!< Bit mask for USB_CTL_ODDRST. |
mbed_official | 146:f64d43ff0c18 | 2295 | #define BS_USB_CTL_ODDRST (1U) //!< Bit field size in bits for USB_CTL_ODDRST. |
mbed_official | 146:f64d43ff0c18 | 2296 | |
mbed_official | 146:f64d43ff0c18 | 2297 | #ifndef __LANGUAGE_ASM__ |
mbed_official | 146:f64d43ff0c18 | 2298 | //! @brief Read current value of the USB_CTL_ODDRST field. |
mbed_official | 146:f64d43ff0c18 | 2299 | #define BR_USB_CTL_ODDRST (BITBAND_ACCESS8(HW_USB_CTL_ADDR, BP_USB_CTL_ODDRST)) |
mbed_official | 146:f64d43ff0c18 | 2300 | #endif |
mbed_official | 146:f64d43ff0c18 | 2301 | |
mbed_official | 146:f64d43ff0c18 | 2302 | //! @brief Format value for bitfield USB_CTL_ODDRST. |
mbed_official | 146:f64d43ff0c18 | 2303 | #define BF_USB_CTL_ODDRST(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint8_t) << BP_USB_CTL_ODDRST), uint8_t) & BM_USB_CTL_ODDRST) |
mbed_official | 146:f64d43ff0c18 | 2304 | |
mbed_official | 146:f64d43ff0c18 | 2305 | #ifndef __LANGUAGE_ASM__ |
mbed_official | 146:f64d43ff0c18 | 2306 | //! @brief Set the ODDRST field to a new value. |
mbed_official | 146:f64d43ff0c18 | 2307 | #define BW_USB_CTL_ODDRST(v) (BITBAND_ACCESS8(HW_USB_CTL_ADDR, BP_USB_CTL_ODDRST) = (v)) |
mbed_official | 146:f64d43ff0c18 | 2308 | #endif |
mbed_official | 146:f64d43ff0c18 | 2309 | //@} |
mbed_official | 146:f64d43ff0c18 | 2310 | |
mbed_official | 146:f64d43ff0c18 | 2311 | /*! |
mbed_official | 146:f64d43ff0c18 | 2312 | * @name Register USB_CTL, field RESUME[2] (RW) |
mbed_official | 146:f64d43ff0c18 | 2313 | * |
mbed_official | 146:f64d43ff0c18 | 2314 | * When set to 1 this bit enables the USB Module to execute resume signaling. |
mbed_official | 146:f64d43ff0c18 | 2315 | * This allows the USB Module to perform remote wake-up. Software must set RESUME |
mbed_official | 146:f64d43ff0c18 | 2316 | * to 1 for the required amount of time and then clear it to 0. If the HOSTMODEEN |
mbed_official | 146:f64d43ff0c18 | 2317 | * bit is set, the USB module appends a Low Speed End of Packet to the Resume |
mbed_official | 146:f64d43ff0c18 | 2318 | * signaling when the RESUME bit is cleared. For more information on RESUME |
mbed_official | 146:f64d43ff0c18 | 2319 | * signaling see Section 7.1.4.5 of the USB specification version 1.0. |
mbed_official | 146:f64d43ff0c18 | 2320 | */ |
mbed_official | 146:f64d43ff0c18 | 2321 | //@{ |
mbed_official | 146:f64d43ff0c18 | 2322 | #define BP_USB_CTL_RESUME (2U) //!< Bit position for USB_CTL_RESUME. |
mbed_official | 146:f64d43ff0c18 | 2323 | #define BM_USB_CTL_RESUME (0x04U) //!< Bit mask for USB_CTL_RESUME. |
mbed_official | 146:f64d43ff0c18 | 2324 | #define BS_USB_CTL_RESUME (1U) //!< Bit field size in bits for USB_CTL_RESUME. |
mbed_official | 146:f64d43ff0c18 | 2325 | |
mbed_official | 146:f64d43ff0c18 | 2326 | #ifndef __LANGUAGE_ASM__ |
mbed_official | 146:f64d43ff0c18 | 2327 | //! @brief Read current value of the USB_CTL_RESUME field. |
mbed_official | 146:f64d43ff0c18 | 2328 | #define BR_USB_CTL_RESUME (BITBAND_ACCESS8(HW_USB_CTL_ADDR, BP_USB_CTL_RESUME)) |
mbed_official | 146:f64d43ff0c18 | 2329 | #endif |
mbed_official | 146:f64d43ff0c18 | 2330 | |
mbed_official | 146:f64d43ff0c18 | 2331 | //! @brief Format value for bitfield USB_CTL_RESUME. |
mbed_official | 146:f64d43ff0c18 | 2332 | #define BF_USB_CTL_RESUME(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint8_t) << BP_USB_CTL_RESUME), uint8_t) & BM_USB_CTL_RESUME) |
mbed_official | 146:f64d43ff0c18 | 2333 | |
mbed_official | 146:f64d43ff0c18 | 2334 | #ifndef __LANGUAGE_ASM__ |
mbed_official | 146:f64d43ff0c18 | 2335 | //! @brief Set the RESUME field to a new value. |
mbed_official | 146:f64d43ff0c18 | 2336 | #define BW_USB_CTL_RESUME(v) (BITBAND_ACCESS8(HW_USB_CTL_ADDR, BP_USB_CTL_RESUME) = (v)) |
mbed_official | 146:f64d43ff0c18 | 2337 | #endif |
mbed_official | 146:f64d43ff0c18 | 2338 | //@} |
mbed_official | 146:f64d43ff0c18 | 2339 | |
mbed_official | 146:f64d43ff0c18 | 2340 | /*! |
mbed_official | 146:f64d43ff0c18 | 2341 | * @name Register USB_CTL, field HOSTMODEEN[3] (RW) |
mbed_official | 146:f64d43ff0c18 | 2342 | * |
mbed_official | 146:f64d43ff0c18 | 2343 | * When set to 1, this bit enables the USB Module to operate in Host mode. In |
mbed_official | 146:f64d43ff0c18 | 2344 | * host mode, the USB module performs USB transactions under the programmed control |
mbed_official | 146:f64d43ff0c18 | 2345 | * of the host processor. |
mbed_official | 146:f64d43ff0c18 | 2346 | */ |
mbed_official | 146:f64d43ff0c18 | 2347 | //@{ |
mbed_official | 146:f64d43ff0c18 | 2348 | #define BP_USB_CTL_HOSTMODEEN (3U) //!< Bit position for USB_CTL_HOSTMODEEN. |
mbed_official | 146:f64d43ff0c18 | 2349 | #define BM_USB_CTL_HOSTMODEEN (0x08U) //!< Bit mask for USB_CTL_HOSTMODEEN. |
mbed_official | 146:f64d43ff0c18 | 2350 | #define BS_USB_CTL_HOSTMODEEN (1U) //!< Bit field size in bits for USB_CTL_HOSTMODEEN. |
mbed_official | 146:f64d43ff0c18 | 2351 | |
mbed_official | 146:f64d43ff0c18 | 2352 | #ifndef __LANGUAGE_ASM__ |
mbed_official | 146:f64d43ff0c18 | 2353 | //! @brief Read current value of the USB_CTL_HOSTMODEEN field. |
mbed_official | 146:f64d43ff0c18 | 2354 | #define BR_USB_CTL_HOSTMODEEN (BITBAND_ACCESS8(HW_USB_CTL_ADDR, BP_USB_CTL_HOSTMODEEN)) |
mbed_official | 146:f64d43ff0c18 | 2355 | #endif |
mbed_official | 146:f64d43ff0c18 | 2356 | |
mbed_official | 146:f64d43ff0c18 | 2357 | //! @brief Format value for bitfield USB_CTL_HOSTMODEEN. |
mbed_official | 146:f64d43ff0c18 | 2358 | #define BF_USB_CTL_HOSTMODEEN(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint8_t) << BP_USB_CTL_HOSTMODEEN), uint8_t) & BM_USB_CTL_HOSTMODEEN) |
mbed_official | 146:f64d43ff0c18 | 2359 | |
mbed_official | 146:f64d43ff0c18 | 2360 | #ifndef __LANGUAGE_ASM__ |
mbed_official | 146:f64d43ff0c18 | 2361 | //! @brief Set the HOSTMODEEN field to a new value. |
mbed_official | 146:f64d43ff0c18 | 2362 | #define BW_USB_CTL_HOSTMODEEN(v) (BITBAND_ACCESS8(HW_USB_CTL_ADDR, BP_USB_CTL_HOSTMODEEN) = (v)) |
mbed_official | 146:f64d43ff0c18 | 2363 | #endif |
mbed_official | 146:f64d43ff0c18 | 2364 | //@} |
mbed_official | 146:f64d43ff0c18 | 2365 | |
mbed_official | 146:f64d43ff0c18 | 2366 | /*! |
mbed_official | 146:f64d43ff0c18 | 2367 | * @name Register USB_CTL, field RESET[4] (RW) |
mbed_official | 146:f64d43ff0c18 | 2368 | * |
mbed_official | 146:f64d43ff0c18 | 2369 | * Setting this bit enables the USB Module to generate USB reset signaling. This |
mbed_official | 146:f64d43ff0c18 | 2370 | * allows the USB Module to reset USB peripherals. This control signal is only |
mbed_official | 146:f64d43ff0c18 | 2371 | * valid in Host mode (HOSTMODEEN=1). Software must set RESET to 1 for the |
mbed_official | 146:f64d43ff0c18 | 2372 | * required amount of time and then clear it to 0 to end reset signaling. For more |
mbed_official | 146:f64d43ff0c18 | 2373 | * information on reset signaling see Section 7.1.4.3 of the USB specification version |
mbed_official | 146:f64d43ff0c18 | 2374 | * 1.0. |
mbed_official | 146:f64d43ff0c18 | 2375 | */ |
mbed_official | 146:f64d43ff0c18 | 2376 | //@{ |
mbed_official | 146:f64d43ff0c18 | 2377 | #define BP_USB_CTL_RESET (4U) //!< Bit position for USB_CTL_RESET. |
mbed_official | 146:f64d43ff0c18 | 2378 | #define BM_USB_CTL_RESET (0x10U) //!< Bit mask for USB_CTL_RESET. |
mbed_official | 146:f64d43ff0c18 | 2379 | #define BS_USB_CTL_RESET (1U) //!< Bit field size in bits for USB_CTL_RESET. |
mbed_official | 146:f64d43ff0c18 | 2380 | |
mbed_official | 146:f64d43ff0c18 | 2381 | #ifndef __LANGUAGE_ASM__ |
mbed_official | 146:f64d43ff0c18 | 2382 | //! @brief Read current value of the USB_CTL_RESET field. |
mbed_official | 146:f64d43ff0c18 | 2383 | #define BR_USB_CTL_RESET (BITBAND_ACCESS8(HW_USB_CTL_ADDR, BP_USB_CTL_RESET)) |
mbed_official | 146:f64d43ff0c18 | 2384 | #endif |
mbed_official | 146:f64d43ff0c18 | 2385 | |
mbed_official | 146:f64d43ff0c18 | 2386 | //! @brief Format value for bitfield USB_CTL_RESET. |
mbed_official | 146:f64d43ff0c18 | 2387 | #define BF_USB_CTL_RESET(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint8_t) << BP_USB_CTL_RESET), uint8_t) & BM_USB_CTL_RESET) |
mbed_official | 146:f64d43ff0c18 | 2388 | |
mbed_official | 146:f64d43ff0c18 | 2389 | #ifndef __LANGUAGE_ASM__ |
mbed_official | 146:f64d43ff0c18 | 2390 | //! @brief Set the RESET field to a new value. |
mbed_official | 146:f64d43ff0c18 | 2391 | #define BW_USB_CTL_RESET(v) (BITBAND_ACCESS8(HW_USB_CTL_ADDR, BP_USB_CTL_RESET) = (v)) |
mbed_official | 146:f64d43ff0c18 | 2392 | #endif |
mbed_official | 146:f64d43ff0c18 | 2393 | //@} |
mbed_official | 146:f64d43ff0c18 | 2394 | |
mbed_official | 146:f64d43ff0c18 | 2395 | /*! |
mbed_official | 146:f64d43ff0c18 | 2396 | * @name Register USB_CTL, field TXSUSPENDTOKENBUSY[5] (RW) |
mbed_official | 146:f64d43ff0c18 | 2397 | * |
mbed_official | 146:f64d43ff0c18 | 2398 | * In Host mode, TOKEN_BUSY is set when the USB module is busy executing a USB |
mbed_official | 146:f64d43ff0c18 | 2399 | * token. Software must not write more token commands to the Token Register when |
mbed_official | 146:f64d43ff0c18 | 2400 | * TOKEN_BUSY is set. Software should check this field before writing any tokens |
mbed_official | 146:f64d43ff0c18 | 2401 | * to the Token Register to ensure that token commands are not lost. In Target |
mbed_official | 146:f64d43ff0c18 | 2402 | * mode, TXD_SUSPEND is set when the SIE has disabled packet transmission and |
mbed_official | 146:f64d43ff0c18 | 2403 | * reception. Clearing this bit allows the SIE to continue token processing. This bit |
mbed_official | 146:f64d43ff0c18 | 2404 | * is set by the SIE when a SETUP Token is received allowing software to dequeue |
mbed_official | 146:f64d43ff0c18 | 2405 | * any pending packet transactions in the BDT before resuming token processing. |
mbed_official | 146:f64d43ff0c18 | 2406 | */ |
mbed_official | 146:f64d43ff0c18 | 2407 | //@{ |
mbed_official | 146:f64d43ff0c18 | 2408 | #define BP_USB_CTL_TXSUSPENDTOKENBUSY (5U) //!< Bit position for USB_CTL_TXSUSPENDTOKENBUSY. |
mbed_official | 146:f64d43ff0c18 | 2409 | #define BM_USB_CTL_TXSUSPENDTOKENBUSY (0x20U) //!< Bit mask for USB_CTL_TXSUSPENDTOKENBUSY. |
mbed_official | 146:f64d43ff0c18 | 2410 | #define BS_USB_CTL_TXSUSPENDTOKENBUSY (1U) //!< Bit field size in bits for USB_CTL_TXSUSPENDTOKENBUSY. |
mbed_official | 146:f64d43ff0c18 | 2411 | |
mbed_official | 146:f64d43ff0c18 | 2412 | #ifndef __LANGUAGE_ASM__ |
mbed_official | 146:f64d43ff0c18 | 2413 | //! @brief Read current value of the USB_CTL_TXSUSPENDTOKENBUSY field. |
mbed_official | 146:f64d43ff0c18 | 2414 | #define BR_USB_CTL_TXSUSPENDTOKENBUSY (BITBAND_ACCESS8(HW_USB_CTL_ADDR, BP_USB_CTL_TXSUSPENDTOKENBUSY)) |
mbed_official | 146:f64d43ff0c18 | 2415 | #endif |
mbed_official | 146:f64d43ff0c18 | 2416 | |
mbed_official | 146:f64d43ff0c18 | 2417 | //! @brief Format value for bitfield USB_CTL_TXSUSPENDTOKENBUSY. |
mbed_official | 146:f64d43ff0c18 | 2418 | #define BF_USB_CTL_TXSUSPENDTOKENBUSY(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint8_t) << BP_USB_CTL_TXSUSPENDTOKENBUSY), uint8_t) & BM_USB_CTL_TXSUSPENDTOKENBUSY) |
mbed_official | 146:f64d43ff0c18 | 2419 | |
mbed_official | 146:f64d43ff0c18 | 2420 | #ifndef __LANGUAGE_ASM__ |
mbed_official | 146:f64d43ff0c18 | 2421 | //! @brief Set the TXSUSPENDTOKENBUSY field to a new value. |
mbed_official | 146:f64d43ff0c18 | 2422 | #define BW_USB_CTL_TXSUSPENDTOKENBUSY(v) (BITBAND_ACCESS8(HW_USB_CTL_ADDR, BP_USB_CTL_TXSUSPENDTOKENBUSY) = (v)) |
mbed_official | 146:f64d43ff0c18 | 2423 | #endif |
mbed_official | 146:f64d43ff0c18 | 2424 | //@} |
mbed_official | 146:f64d43ff0c18 | 2425 | |
mbed_official | 146:f64d43ff0c18 | 2426 | /*! |
mbed_official | 146:f64d43ff0c18 | 2427 | * @name Register USB_CTL, field SE0[6] (RW) |
mbed_official | 146:f64d43ff0c18 | 2428 | */ |
mbed_official | 146:f64d43ff0c18 | 2429 | //@{ |
mbed_official | 146:f64d43ff0c18 | 2430 | #define BP_USB_CTL_SE0 (6U) //!< Bit position for USB_CTL_SE0. |
mbed_official | 146:f64d43ff0c18 | 2431 | #define BM_USB_CTL_SE0 (0x40U) //!< Bit mask for USB_CTL_SE0. |
mbed_official | 146:f64d43ff0c18 | 2432 | #define BS_USB_CTL_SE0 (1U) //!< Bit field size in bits for USB_CTL_SE0. |
mbed_official | 146:f64d43ff0c18 | 2433 | |
mbed_official | 146:f64d43ff0c18 | 2434 | #ifndef __LANGUAGE_ASM__ |
mbed_official | 146:f64d43ff0c18 | 2435 | //! @brief Read current value of the USB_CTL_SE0 field. |
mbed_official | 146:f64d43ff0c18 | 2436 | #define BR_USB_CTL_SE0 (BITBAND_ACCESS8(HW_USB_CTL_ADDR, BP_USB_CTL_SE0)) |
mbed_official | 146:f64d43ff0c18 | 2437 | #endif |
mbed_official | 146:f64d43ff0c18 | 2438 | |
mbed_official | 146:f64d43ff0c18 | 2439 | //! @brief Format value for bitfield USB_CTL_SE0. |
mbed_official | 146:f64d43ff0c18 | 2440 | #define BF_USB_CTL_SE0(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint8_t) << BP_USB_CTL_SE0), uint8_t) & BM_USB_CTL_SE0) |
mbed_official | 146:f64d43ff0c18 | 2441 | |
mbed_official | 146:f64d43ff0c18 | 2442 | #ifndef __LANGUAGE_ASM__ |
mbed_official | 146:f64d43ff0c18 | 2443 | //! @brief Set the SE0 field to a new value. |
mbed_official | 146:f64d43ff0c18 | 2444 | #define BW_USB_CTL_SE0(v) (BITBAND_ACCESS8(HW_USB_CTL_ADDR, BP_USB_CTL_SE0) = (v)) |
mbed_official | 146:f64d43ff0c18 | 2445 | #endif |
mbed_official | 146:f64d43ff0c18 | 2446 | //@} |
mbed_official | 146:f64d43ff0c18 | 2447 | |
mbed_official | 146:f64d43ff0c18 | 2448 | /*! |
mbed_official | 146:f64d43ff0c18 | 2449 | * @name Register USB_CTL, field JSTATE[7] (RW) |
mbed_official | 146:f64d43ff0c18 | 2450 | * |
mbed_official | 146:f64d43ff0c18 | 2451 | * The polarity of this signal is affected by the current state of LSEN . |
mbed_official | 146:f64d43ff0c18 | 2452 | */ |
mbed_official | 146:f64d43ff0c18 | 2453 | //@{ |
mbed_official | 146:f64d43ff0c18 | 2454 | #define BP_USB_CTL_JSTATE (7U) //!< Bit position for USB_CTL_JSTATE. |
mbed_official | 146:f64d43ff0c18 | 2455 | #define BM_USB_CTL_JSTATE (0x80U) //!< Bit mask for USB_CTL_JSTATE. |
mbed_official | 146:f64d43ff0c18 | 2456 | #define BS_USB_CTL_JSTATE (1U) //!< Bit field size in bits for USB_CTL_JSTATE. |
mbed_official | 146:f64d43ff0c18 | 2457 | |
mbed_official | 146:f64d43ff0c18 | 2458 | #ifndef __LANGUAGE_ASM__ |
mbed_official | 146:f64d43ff0c18 | 2459 | //! @brief Read current value of the USB_CTL_JSTATE field. |
mbed_official | 146:f64d43ff0c18 | 2460 | #define BR_USB_CTL_JSTATE (BITBAND_ACCESS8(HW_USB_CTL_ADDR, BP_USB_CTL_JSTATE)) |
mbed_official | 146:f64d43ff0c18 | 2461 | #endif |
mbed_official | 146:f64d43ff0c18 | 2462 | |
mbed_official | 146:f64d43ff0c18 | 2463 | //! @brief Format value for bitfield USB_CTL_JSTATE. |
mbed_official | 146:f64d43ff0c18 | 2464 | #define BF_USB_CTL_JSTATE(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint8_t) << BP_USB_CTL_JSTATE), uint8_t) & BM_USB_CTL_JSTATE) |
mbed_official | 146:f64d43ff0c18 | 2465 | |
mbed_official | 146:f64d43ff0c18 | 2466 | #ifndef __LANGUAGE_ASM__ |
mbed_official | 146:f64d43ff0c18 | 2467 | //! @brief Set the JSTATE field to a new value. |
mbed_official | 146:f64d43ff0c18 | 2468 | #define BW_USB_CTL_JSTATE(v) (BITBAND_ACCESS8(HW_USB_CTL_ADDR, BP_USB_CTL_JSTATE) = (v)) |
mbed_official | 146:f64d43ff0c18 | 2469 | #endif |
mbed_official | 146:f64d43ff0c18 | 2470 | //@} |
mbed_official | 146:f64d43ff0c18 | 2471 | |
mbed_official | 146:f64d43ff0c18 | 2472 | //------------------------------------------------------------------------------------------- |
mbed_official | 146:f64d43ff0c18 | 2473 | // HW_USB_ADDR - Address register |
mbed_official | 146:f64d43ff0c18 | 2474 | //------------------------------------------------------------------------------------------- |
mbed_official | 146:f64d43ff0c18 | 2475 | |
mbed_official | 146:f64d43ff0c18 | 2476 | #ifndef __LANGUAGE_ASM__ |
mbed_official | 146:f64d43ff0c18 | 2477 | /*! |
mbed_official | 146:f64d43ff0c18 | 2478 | * @brief HW_USB_ADDR - Address register (RW) |
mbed_official | 146:f64d43ff0c18 | 2479 | * |
mbed_official | 146:f64d43ff0c18 | 2480 | * Reset value: 0x00U |
mbed_official | 146:f64d43ff0c18 | 2481 | * |
mbed_official | 146:f64d43ff0c18 | 2482 | * Holds the unique USB address that the USB module decodes when in Peripheral |
mbed_official | 146:f64d43ff0c18 | 2483 | * mode (HOSTMODEEN=0). When operating in Host mode (HOSTMODEEN=1) the USB module |
mbed_official | 146:f64d43ff0c18 | 2484 | * transmits this address with a TOKEN packet. This enables the USB module to |
mbed_official | 146:f64d43ff0c18 | 2485 | * uniquely address any USB peripheral. In either mode, CTL[USBENSOFEN] must be 1. |
mbed_official | 146:f64d43ff0c18 | 2486 | * The Address register is reset to 0x00 after the reset input becomes active or |
mbed_official | 146:f64d43ff0c18 | 2487 | * the USB module decodes a USB reset signal. This action initializes the Address |
mbed_official | 146:f64d43ff0c18 | 2488 | * register to decode address 0x00 as required by the USB specification. |
mbed_official | 146:f64d43ff0c18 | 2489 | */ |
mbed_official | 146:f64d43ff0c18 | 2490 | typedef union _hw_usb_addr |
mbed_official | 146:f64d43ff0c18 | 2491 | { |
mbed_official | 146:f64d43ff0c18 | 2492 | uint8_t U; |
mbed_official | 146:f64d43ff0c18 | 2493 | struct _hw_usb_addr_bitfields |
mbed_official | 146:f64d43ff0c18 | 2494 | { |
mbed_official | 146:f64d43ff0c18 | 2495 | uint8_t ADDR : 7; //!< [6:0] USB Address |
mbed_official | 146:f64d43ff0c18 | 2496 | uint8_t LSEN : 1; //!< [7] Low Speed Enable bit |
mbed_official | 146:f64d43ff0c18 | 2497 | } B; |
mbed_official | 146:f64d43ff0c18 | 2498 | } hw_usb_addr_t; |
mbed_official | 146:f64d43ff0c18 | 2499 | #endif |
mbed_official | 146:f64d43ff0c18 | 2500 | |
mbed_official | 146:f64d43ff0c18 | 2501 | /*! |
mbed_official | 146:f64d43ff0c18 | 2502 | * @name Constants and macros for entire USB_ADDR register |
mbed_official | 146:f64d43ff0c18 | 2503 | */ |
mbed_official | 146:f64d43ff0c18 | 2504 | //@{ |
mbed_official | 146:f64d43ff0c18 | 2505 | #define HW_USB_ADDR_ADDR (REGS_USB_BASE + 0x98U) |
mbed_official | 146:f64d43ff0c18 | 2506 | |
mbed_official | 146:f64d43ff0c18 | 2507 | #ifndef __LANGUAGE_ASM__ |
mbed_official | 146:f64d43ff0c18 | 2508 | #define HW_USB_ADDR (*(__IO hw_usb_addr_t *) HW_USB_ADDR_ADDR) |
mbed_official | 146:f64d43ff0c18 | 2509 | #define HW_USB_ADDR_RD() (HW_USB_ADDR.U) |
mbed_official | 146:f64d43ff0c18 | 2510 | #define HW_USB_ADDR_WR(v) (HW_USB_ADDR.U = (v)) |
mbed_official | 146:f64d43ff0c18 | 2511 | #define HW_USB_ADDR_SET(v) (HW_USB_ADDR_WR(HW_USB_ADDR_RD() | (v))) |
mbed_official | 146:f64d43ff0c18 | 2512 | #define HW_USB_ADDR_CLR(v) (HW_USB_ADDR_WR(HW_USB_ADDR_RD() & ~(v))) |
mbed_official | 146:f64d43ff0c18 | 2513 | #define HW_USB_ADDR_TOG(v) (HW_USB_ADDR_WR(HW_USB_ADDR_RD() ^ (v))) |
mbed_official | 146:f64d43ff0c18 | 2514 | #endif |
mbed_official | 146:f64d43ff0c18 | 2515 | //@} |
mbed_official | 146:f64d43ff0c18 | 2516 | |
mbed_official | 146:f64d43ff0c18 | 2517 | /* |
mbed_official | 146:f64d43ff0c18 | 2518 | * Constants & macros for individual USB_ADDR bitfields |
mbed_official | 146:f64d43ff0c18 | 2519 | */ |
mbed_official | 146:f64d43ff0c18 | 2520 | |
mbed_official | 146:f64d43ff0c18 | 2521 | /*! |
mbed_official | 146:f64d43ff0c18 | 2522 | * @name Register USB_ADDR, field ADDR[6:0] (RW) |
mbed_official | 146:f64d43ff0c18 | 2523 | * |
mbed_official | 146:f64d43ff0c18 | 2524 | * Defines the USB address that the USB module decodes in peripheral mode, or |
mbed_official | 146:f64d43ff0c18 | 2525 | * transmits when in host mode. |
mbed_official | 146:f64d43ff0c18 | 2526 | */ |
mbed_official | 146:f64d43ff0c18 | 2527 | //@{ |
mbed_official | 146:f64d43ff0c18 | 2528 | #define BP_USB_ADDR_ADDR (0U) //!< Bit position for USB_ADDR_ADDR. |
mbed_official | 146:f64d43ff0c18 | 2529 | #define BM_USB_ADDR_ADDR (0x7FU) //!< Bit mask for USB_ADDR_ADDR. |
mbed_official | 146:f64d43ff0c18 | 2530 | #define BS_USB_ADDR_ADDR (7U) //!< Bit field size in bits for USB_ADDR_ADDR. |
mbed_official | 146:f64d43ff0c18 | 2531 | |
mbed_official | 146:f64d43ff0c18 | 2532 | #ifndef __LANGUAGE_ASM__ |
mbed_official | 146:f64d43ff0c18 | 2533 | //! @brief Read current value of the USB_ADDR_ADDR field. |
mbed_official | 146:f64d43ff0c18 | 2534 | #define BR_USB_ADDR_ADDR (HW_USB_ADDR.B.ADDR) |
mbed_official | 146:f64d43ff0c18 | 2535 | #endif |
mbed_official | 146:f64d43ff0c18 | 2536 | |
mbed_official | 146:f64d43ff0c18 | 2537 | //! @brief Format value for bitfield USB_ADDR_ADDR. |
mbed_official | 146:f64d43ff0c18 | 2538 | #define BF_USB_ADDR_ADDR(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint8_t) << BP_USB_ADDR_ADDR), uint8_t) & BM_USB_ADDR_ADDR) |
mbed_official | 146:f64d43ff0c18 | 2539 | |
mbed_official | 146:f64d43ff0c18 | 2540 | #ifndef __LANGUAGE_ASM__ |
mbed_official | 146:f64d43ff0c18 | 2541 | //! @brief Set the ADDR field to a new value. |
mbed_official | 146:f64d43ff0c18 | 2542 | #define BW_USB_ADDR_ADDR(v) (HW_USB_ADDR_WR((HW_USB_ADDR_RD() & ~BM_USB_ADDR_ADDR) | BF_USB_ADDR_ADDR(v))) |
mbed_official | 146:f64d43ff0c18 | 2543 | #endif |
mbed_official | 146:f64d43ff0c18 | 2544 | //@} |
mbed_official | 146:f64d43ff0c18 | 2545 | |
mbed_official | 146:f64d43ff0c18 | 2546 | /*! |
mbed_official | 146:f64d43ff0c18 | 2547 | * @name Register USB_ADDR, field LSEN[7] (RW) |
mbed_official | 146:f64d43ff0c18 | 2548 | * |
mbed_official | 146:f64d43ff0c18 | 2549 | * Informs the USB module that the next token command written to the token |
mbed_official | 146:f64d43ff0c18 | 2550 | * register must be performed at low speed. This enables the USB module to perform the |
mbed_official | 146:f64d43ff0c18 | 2551 | * necessary preamble required for low-speed data transmissions. |
mbed_official | 146:f64d43ff0c18 | 2552 | */ |
mbed_official | 146:f64d43ff0c18 | 2553 | //@{ |
mbed_official | 146:f64d43ff0c18 | 2554 | #define BP_USB_ADDR_LSEN (7U) //!< Bit position for USB_ADDR_LSEN. |
mbed_official | 146:f64d43ff0c18 | 2555 | #define BM_USB_ADDR_LSEN (0x80U) //!< Bit mask for USB_ADDR_LSEN. |
mbed_official | 146:f64d43ff0c18 | 2556 | #define BS_USB_ADDR_LSEN (1U) //!< Bit field size in bits for USB_ADDR_LSEN. |
mbed_official | 146:f64d43ff0c18 | 2557 | |
mbed_official | 146:f64d43ff0c18 | 2558 | #ifndef __LANGUAGE_ASM__ |
mbed_official | 146:f64d43ff0c18 | 2559 | //! @brief Read current value of the USB_ADDR_LSEN field. |
mbed_official | 146:f64d43ff0c18 | 2560 | #define BR_USB_ADDR_LSEN (BITBAND_ACCESS8(HW_USB_ADDR_ADDR, BP_USB_ADDR_LSEN)) |
mbed_official | 146:f64d43ff0c18 | 2561 | #endif |
mbed_official | 146:f64d43ff0c18 | 2562 | |
mbed_official | 146:f64d43ff0c18 | 2563 | //! @brief Format value for bitfield USB_ADDR_LSEN. |
mbed_official | 146:f64d43ff0c18 | 2564 | #define BF_USB_ADDR_LSEN(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint8_t) << BP_USB_ADDR_LSEN), uint8_t) & BM_USB_ADDR_LSEN) |
mbed_official | 146:f64d43ff0c18 | 2565 | |
mbed_official | 146:f64d43ff0c18 | 2566 | #ifndef __LANGUAGE_ASM__ |
mbed_official | 146:f64d43ff0c18 | 2567 | //! @brief Set the LSEN field to a new value. |
mbed_official | 146:f64d43ff0c18 | 2568 | #define BW_USB_ADDR_LSEN(v) (BITBAND_ACCESS8(HW_USB_ADDR_ADDR, BP_USB_ADDR_LSEN) = (v)) |
mbed_official | 146:f64d43ff0c18 | 2569 | #endif |
mbed_official | 146:f64d43ff0c18 | 2570 | //@} |
mbed_official | 146:f64d43ff0c18 | 2571 | |
mbed_official | 146:f64d43ff0c18 | 2572 | //------------------------------------------------------------------------------------------- |
mbed_official | 146:f64d43ff0c18 | 2573 | // HW_USB_BDTPAGE1 - BDT Page register 1 |
mbed_official | 146:f64d43ff0c18 | 2574 | //------------------------------------------------------------------------------------------- |
mbed_official | 146:f64d43ff0c18 | 2575 | |
mbed_official | 146:f64d43ff0c18 | 2576 | #ifndef __LANGUAGE_ASM__ |
mbed_official | 146:f64d43ff0c18 | 2577 | /*! |
mbed_official | 146:f64d43ff0c18 | 2578 | * @brief HW_USB_BDTPAGE1 - BDT Page register 1 (RW) |
mbed_official | 146:f64d43ff0c18 | 2579 | * |
mbed_official | 146:f64d43ff0c18 | 2580 | * Reset value: 0x00U |
mbed_official | 146:f64d43ff0c18 | 2581 | * |
mbed_official | 146:f64d43ff0c18 | 2582 | * Provides address bits 15 through 9 of the base address where the current |
mbed_official | 146:f64d43ff0c18 | 2583 | * Buffer Descriptor Table (BDT) resides in system memory. See Buffer Descriptor |
mbed_official | 146:f64d43ff0c18 | 2584 | * Table. The 32-bit BDT Base Address is always aligned on 512-byte boundaries, so |
mbed_official | 146:f64d43ff0c18 | 2585 | * bits 8 through 0 of the base address are always zero. |
mbed_official | 146:f64d43ff0c18 | 2586 | */ |
mbed_official | 146:f64d43ff0c18 | 2587 | typedef union _hw_usb_bdtpage1 |
mbed_official | 146:f64d43ff0c18 | 2588 | { |
mbed_official | 146:f64d43ff0c18 | 2589 | uint8_t U; |
mbed_official | 146:f64d43ff0c18 | 2590 | struct _hw_usb_bdtpage1_bitfields |
mbed_official | 146:f64d43ff0c18 | 2591 | { |
mbed_official | 146:f64d43ff0c18 | 2592 | uint8_t RESERVED0 : 1; //!< [0] |
mbed_official | 146:f64d43ff0c18 | 2593 | uint8_t BDTBA : 7; //!< [7:1] |
mbed_official | 146:f64d43ff0c18 | 2594 | } B; |
mbed_official | 146:f64d43ff0c18 | 2595 | } hw_usb_bdtpage1_t; |
mbed_official | 146:f64d43ff0c18 | 2596 | #endif |
mbed_official | 146:f64d43ff0c18 | 2597 | |
mbed_official | 146:f64d43ff0c18 | 2598 | /*! |
mbed_official | 146:f64d43ff0c18 | 2599 | * @name Constants and macros for entire USB_BDTPAGE1 register |
mbed_official | 146:f64d43ff0c18 | 2600 | */ |
mbed_official | 146:f64d43ff0c18 | 2601 | //@{ |
mbed_official | 146:f64d43ff0c18 | 2602 | #define HW_USB_BDTPAGE1_ADDR (REGS_USB_BASE + 0x9CU) |
mbed_official | 146:f64d43ff0c18 | 2603 | |
mbed_official | 146:f64d43ff0c18 | 2604 | #ifndef __LANGUAGE_ASM__ |
mbed_official | 146:f64d43ff0c18 | 2605 | #define HW_USB_BDTPAGE1 (*(__IO hw_usb_bdtpage1_t *) HW_USB_BDTPAGE1_ADDR) |
mbed_official | 146:f64d43ff0c18 | 2606 | #define HW_USB_BDTPAGE1_RD() (HW_USB_BDTPAGE1.U) |
mbed_official | 146:f64d43ff0c18 | 2607 | #define HW_USB_BDTPAGE1_WR(v) (HW_USB_BDTPAGE1.U = (v)) |
mbed_official | 146:f64d43ff0c18 | 2608 | #define HW_USB_BDTPAGE1_SET(v) (HW_USB_BDTPAGE1_WR(HW_USB_BDTPAGE1_RD() | (v))) |
mbed_official | 146:f64d43ff0c18 | 2609 | #define HW_USB_BDTPAGE1_CLR(v) (HW_USB_BDTPAGE1_WR(HW_USB_BDTPAGE1_RD() & ~(v))) |
mbed_official | 146:f64d43ff0c18 | 2610 | #define HW_USB_BDTPAGE1_TOG(v) (HW_USB_BDTPAGE1_WR(HW_USB_BDTPAGE1_RD() ^ (v))) |
mbed_official | 146:f64d43ff0c18 | 2611 | #endif |
mbed_official | 146:f64d43ff0c18 | 2612 | //@} |
mbed_official | 146:f64d43ff0c18 | 2613 | |
mbed_official | 146:f64d43ff0c18 | 2614 | /* |
mbed_official | 146:f64d43ff0c18 | 2615 | * Constants & macros for individual USB_BDTPAGE1 bitfields |
mbed_official | 146:f64d43ff0c18 | 2616 | */ |
mbed_official | 146:f64d43ff0c18 | 2617 | |
mbed_official | 146:f64d43ff0c18 | 2618 | /*! |
mbed_official | 146:f64d43ff0c18 | 2619 | * @name Register USB_BDTPAGE1, field BDTBA[7:1] (RW) |
mbed_official | 146:f64d43ff0c18 | 2620 | * |
mbed_official | 146:f64d43ff0c18 | 2621 | * Provides address bits 15 through 9 of the BDT base address. |
mbed_official | 146:f64d43ff0c18 | 2622 | */ |
mbed_official | 146:f64d43ff0c18 | 2623 | //@{ |
mbed_official | 146:f64d43ff0c18 | 2624 | #define BP_USB_BDTPAGE1_BDTBA (1U) //!< Bit position for USB_BDTPAGE1_BDTBA. |
mbed_official | 146:f64d43ff0c18 | 2625 | #define BM_USB_BDTPAGE1_BDTBA (0xFEU) //!< Bit mask for USB_BDTPAGE1_BDTBA. |
mbed_official | 146:f64d43ff0c18 | 2626 | #define BS_USB_BDTPAGE1_BDTBA (7U) //!< Bit field size in bits for USB_BDTPAGE1_BDTBA. |
mbed_official | 146:f64d43ff0c18 | 2627 | |
mbed_official | 146:f64d43ff0c18 | 2628 | #ifndef __LANGUAGE_ASM__ |
mbed_official | 146:f64d43ff0c18 | 2629 | //! @brief Read current value of the USB_BDTPAGE1_BDTBA field. |
mbed_official | 146:f64d43ff0c18 | 2630 | #define BR_USB_BDTPAGE1_BDTBA (HW_USB_BDTPAGE1.B.BDTBA) |
mbed_official | 146:f64d43ff0c18 | 2631 | #endif |
mbed_official | 146:f64d43ff0c18 | 2632 | |
mbed_official | 146:f64d43ff0c18 | 2633 | //! @brief Format value for bitfield USB_BDTPAGE1_BDTBA. |
mbed_official | 146:f64d43ff0c18 | 2634 | #define BF_USB_BDTPAGE1_BDTBA(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint8_t) << BP_USB_BDTPAGE1_BDTBA), uint8_t) & BM_USB_BDTPAGE1_BDTBA) |
mbed_official | 146:f64d43ff0c18 | 2635 | |
mbed_official | 146:f64d43ff0c18 | 2636 | #ifndef __LANGUAGE_ASM__ |
mbed_official | 146:f64d43ff0c18 | 2637 | //! @brief Set the BDTBA field to a new value. |
mbed_official | 146:f64d43ff0c18 | 2638 | #define BW_USB_BDTPAGE1_BDTBA(v) (HW_USB_BDTPAGE1_WR((HW_USB_BDTPAGE1_RD() & ~BM_USB_BDTPAGE1_BDTBA) | BF_USB_BDTPAGE1_BDTBA(v))) |
mbed_official | 146:f64d43ff0c18 | 2639 | #endif |
mbed_official | 146:f64d43ff0c18 | 2640 | //@} |
mbed_official | 146:f64d43ff0c18 | 2641 | |
mbed_official | 146:f64d43ff0c18 | 2642 | //------------------------------------------------------------------------------------------- |
mbed_official | 146:f64d43ff0c18 | 2643 | // HW_USB_FRMNUML - Frame Number register Low |
mbed_official | 146:f64d43ff0c18 | 2644 | //------------------------------------------------------------------------------------------- |
mbed_official | 146:f64d43ff0c18 | 2645 | |
mbed_official | 146:f64d43ff0c18 | 2646 | #ifndef __LANGUAGE_ASM__ |
mbed_official | 146:f64d43ff0c18 | 2647 | /*! |
mbed_official | 146:f64d43ff0c18 | 2648 | * @brief HW_USB_FRMNUML - Frame Number register Low (RW) |
mbed_official | 146:f64d43ff0c18 | 2649 | * |
mbed_official | 146:f64d43ff0c18 | 2650 | * Reset value: 0x00U |
mbed_official | 146:f64d43ff0c18 | 2651 | * |
mbed_official | 146:f64d43ff0c18 | 2652 | * The Frame Number registers (low and high) contain the 11-bit frame number. |
mbed_official | 146:f64d43ff0c18 | 2653 | * These registers are updated with the current frame number whenever a SOF TOKEN |
mbed_official | 146:f64d43ff0c18 | 2654 | * is received. |
mbed_official | 146:f64d43ff0c18 | 2655 | */ |
mbed_official | 146:f64d43ff0c18 | 2656 | typedef union _hw_usb_frmnuml |
mbed_official | 146:f64d43ff0c18 | 2657 | { |
mbed_official | 146:f64d43ff0c18 | 2658 | uint8_t U; |
mbed_official | 146:f64d43ff0c18 | 2659 | struct _hw_usb_frmnuml_bitfields |
mbed_official | 146:f64d43ff0c18 | 2660 | { |
mbed_official | 146:f64d43ff0c18 | 2661 | uint8_t FRM : 8; //!< [7:0] |
mbed_official | 146:f64d43ff0c18 | 2662 | } B; |
mbed_official | 146:f64d43ff0c18 | 2663 | } hw_usb_frmnuml_t; |
mbed_official | 146:f64d43ff0c18 | 2664 | #endif |
mbed_official | 146:f64d43ff0c18 | 2665 | |
mbed_official | 146:f64d43ff0c18 | 2666 | /*! |
mbed_official | 146:f64d43ff0c18 | 2667 | * @name Constants and macros for entire USB_FRMNUML register |
mbed_official | 146:f64d43ff0c18 | 2668 | */ |
mbed_official | 146:f64d43ff0c18 | 2669 | //@{ |
mbed_official | 146:f64d43ff0c18 | 2670 | #define HW_USB_FRMNUML_ADDR (REGS_USB_BASE + 0xA0U) |
mbed_official | 146:f64d43ff0c18 | 2671 | |
mbed_official | 146:f64d43ff0c18 | 2672 | #ifndef __LANGUAGE_ASM__ |
mbed_official | 146:f64d43ff0c18 | 2673 | #define HW_USB_FRMNUML (*(__IO hw_usb_frmnuml_t *) HW_USB_FRMNUML_ADDR) |
mbed_official | 146:f64d43ff0c18 | 2674 | #define HW_USB_FRMNUML_RD() (HW_USB_FRMNUML.U) |
mbed_official | 146:f64d43ff0c18 | 2675 | #define HW_USB_FRMNUML_WR(v) (HW_USB_FRMNUML.U = (v)) |
mbed_official | 146:f64d43ff0c18 | 2676 | #define HW_USB_FRMNUML_SET(v) (HW_USB_FRMNUML_WR(HW_USB_FRMNUML_RD() | (v))) |
mbed_official | 146:f64d43ff0c18 | 2677 | #define HW_USB_FRMNUML_CLR(v) (HW_USB_FRMNUML_WR(HW_USB_FRMNUML_RD() & ~(v))) |
mbed_official | 146:f64d43ff0c18 | 2678 | #define HW_USB_FRMNUML_TOG(v) (HW_USB_FRMNUML_WR(HW_USB_FRMNUML_RD() ^ (v))) |
mbed_official | 146:f64d43ff0c18 | 2679 | #endif |
mbed_official | 146:f64d43ff0c18 | 2680 | //@} |
mbed_official | 146:f64d43ff0c18 | 2681 | |
mbed_official | 146:f64d43ff0c18 | 2682 | /* |
mbed_official | 146:f64d43ff0c18 | 2683 | * Constants & macros for individual USB_FRMNUML bitfields |
mbed_official | 146:f64d43ff0c18 | 2684 | */ |
mbed_official | 146:f64d43ff0c18 | 2685 | |
mbed_official | 146:f64d43ff0c18 | 2686 | /*! |
mbed_official | 146:f64d43ff0c18 | 2687 | * @name Register USB_FRMNUML, field FRM[7:0] (RW) |
mbed_official | 146:f64d43ff0c18 | 2688 | * |
mbed_official | 146:f64d43ff0c18 | 2689 | * This 8-bit field and the 3-bit field in the Frame Number Register High are |
mbed_official | 146:f64d43ff0c18 | 2690 | * used to compute the address where the current Buffer Descriptor Table (BDT) |
mbed_official | 146:f64d43ff0c18 | 2691 | * resides in system memory. |
mbed_official | 146:f64d43ff0c18 | 2692 | */ |
mbed_official | 146:f64d43ff0c18 | 2693 | //@{ |
mbed_official | 146:f64d43ff0c18 | 2694 | #define BP_USB_FRMNUML_FRM (0U) //!< Bit position for USB_FRMNUML_FRM. |
mbed_official | 146:f64d43ff0c18 | 2695 | #define BM_USB_FRMNUML_FRM (0xFFU) //!< Bit mask for USB_FRMNUML_FRM. |
mbed_official | 146:f64d43ff0c18 | 2696 | #define BS_USB_FRMNUML_FRM (8U) //!< Bit field size in bits for USB_FRMNUML_FRM. |
mbed_official | 146:f64d43ff0c18 | 2697 | |
mbed_official | 146:f64d43ff0c18 | 2698 | #ifndef __LANGUAGE_ASM__ |
mbed_official | 146:f64d43ff0c18 | 2699 | //! @brief Read current value of the USB_FRMNUML_FRM field. |
mbed_official | 146:f64d43ff0c18 | 2700 | #define BR_USB_FRMNUML_FRM (HW_USB_FRMNUML.U) |
mbed_official | 146:f64d43ff0c18 | 2701 | #endif |
mbed_official | 146:f64d43ff0c18 | 2702 | |
mbed_official | 146:f64d43ff0c18 | 2703 | //! @brief Format value for bitfield USB_FRMNUML_FRM. |
mbed_official | 146:f64d43ff0c18 | 2704 | #define BF_USB_FRMNUML_FRM(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint8_t) << BP_USB_FRMNUML_FRM), uint8_t) & BM_USB_FRMNUML_FRM) |
mbed_official | 146:f64d43ff0c18 | 2705 | |
mbed_official | 146:f64d43ff0c18 | 2706 | #ifndef __LANGUAGE_ASM__ |
mbed_official | 146:f64d43ff0c18 | 2707 | //! @brief Set the FRM field to a new value. |
mbed_official | 146:f64d43ff0c18 | 2708 | #define BW_USB_FRMNUML_FRM(v) (HW_USB_FRMNUML_WR(v)) |
mbed_official | 146:f64d43ff0c18 | 2709 | #endif |
mbed_official | 146:f64d43ff0c18 | 2710 | //@} |
mbed_official | 146:f64d43ff0c18 | 2711 | |
mbed_official | 146:f64d43ff0c18 | 2712 | //------------------------------------------------------------------------------------------- |
mbed_official | 146:f64d43ff0c18 | 2713 | // HW_USB_FRMNUMH - Frame Number register High |
mbed_official | 146:f64d43ff0c18 | 2714 | //------------------------------------------------------------------------------------------- |
mbed_official | 146:f64d43ff0c18 | 2715 | |
mbed_official | 146:f64d43ff0c18 | 2716 | #ifndef __LANGUAGE_ASM__ |
mbed_official | 146:f64d43ff0c18 | 2717 | /*! |
mbed_official | 146:f64d43ff0c18 | 2718 | * @brief HW_USB_FRMNUMH - Frame Number register High (RW) |
mbed_official | 146:f64d43ff0c18 | 2719 | * |
mbed_official | 146:f64d43ff0c18 | 2720 | * Reset value: 0x00U |
mbed_official | 146:f64d43ff0c18 | 2721 | * |
mbed_official | 146:f64d43ff0c18 | 2722 | * The Frame Number registers (low and high) contain the 11-bit frame number. |
mbed_official | 146:f64d43ff0c18 | 2723 | * These registers are updated with the current frame number whenever a SOF TOKEN |
mbed_official | 146:f64d43ff0c18 | 2724 | * is received. |
mbed_official | 146:f64d43ff0c18 | 2725 | */ |
mbed_official | 146:f64d43ff0c18 | 2726 | typedef union _hw_usb_frmnumh |
mbed_official | 146:f64d43ff0c18 | 2727 | { |
mbed_official | 146:f64d43ff0c18 | 2728 | uint8_t U; |
mbed_official | 146:f64d43ff0c18 | 2729 | struct _hw_usb_frmnumh_bitfields |
mbed_official | 146:f64d43ff0c18 | 2730 | { |
mbed_official | 146:f64d43ff0c18 | 2731 | uint8_t FRM : 3; //!< [2:0] |
mbed_official | 146:f64d43ff0c18 | 2732 | uint8_t RESERVED0 : 5; //!< [7:3] |
mbed_official | 146:f64d43ff0c18 | 2733 | } B; |
mbed_official | 146:f64d43ff0c18 | 2734 | } hw_usb_frmnumh_t; |
mbed_official | 146:f64d43ff0c18 | 2735 | #endif |
mbed_official | 146:f64d43ff0c18 | 2736 | |
mbed_official | 146:f64d43ff0c18 | 2737 | /*! |
mbed_official | 146:f64d43ff0c18 | 2738 | * @name Constants and macros for entire USB_FRMNUMH register |
mbed_official | 146:f64d43ff0c18 | 2739 | */ |
mbed_official | 146:f64d43ff0c18 | 2740 | //@{ |
mbed_official | 146:f64d43ff0c18 | 2741 | #define HW_USB_FRMNUMH_ADDR (REGS_USB_BASE + 0xA4U) |
mbed_official | 146:f64d43ff0c18 | 2742 | |
mbed_official | 146:f64d43ff0c18 | 2743 | #ifndef __LANGUAGE_ASM__ |
mbed_official | 146:f64d43ff0c18 | 2744 | #define HW_USB_FRMNUMH (*(__IO hw_usb_frmnumh_t *) HW_USB_FRMNUMH_ADDR) |
mbed_official | 146:f64d43ff0c18 | 2745 | #define HW_USB_FRMNUMH_RD() (HW_USB_FRMNUMH.U) |
mbed_official | 146:f64d43ff0c18 | 2746 | #define HW_USB_FRMNUMH_WR(v) (HW_USB_FRMNUMH.U = (v)) |
mbed_official | 146:f64d43ff0c18 | 2747 | #define HW_USB_FRMNUMH_SET(v) (HW_USB_FRMNUMH_WR(HW_USB_FRMNUMH_RD() | (v))) |
mbed_official | 146:f64d43ff0c18 | 2748 | #define HW_USB_FRMNUMH_CLR(v) (HW_USB_FRMNUMH_WR(HW_USB_FRMNUMH_RD() & ~(v))) |
mbed_official | 146:f64d43ff0c18 | 2749 | #define HW_USB_FRMNUMH_TOG(v) (HW_USB_FRMNUMH_WR(HW_USB_FRMNUMH_RD() ^ (v))) |
mbed_official | 146:f64d43ff0c18 | 2750 | #endif |
mbed_official | 146:f64d43ff0c18 | 2751 | //@} |
mbed_official | 146:f64d43ff0c18 | 2752 | |
mbed_official | 146:f64d43ff0c18 | 2753 | /* |
mbed_official | 146:f64d43ff0c18 | 2754 | * Constants & macros for individual USB_FRMNUMH bitfields |
mbed_official | 146:f64d43ff0c18 | 2755 | */ |
mbed_official | 146:f64d43ff0c18 | 2756 | |
mbed_official | 146:f64d43ff0c18 | 2757 | /*! |
mbed_official | 146:f64d43ff0c18 | 2758 | * @name Register USB_FRMNUMH, field FRM[2:0] (RW) |
mbed_official | 146:f64d43ff0c18 | 2759 | * |
mbed_official | 146:f64d43ff0c18 | 2760 | * This 3-bit field and the 8-bit field in the Frame Number Register Low are |
mbed_official | 146:f64d43ff0c18 | 2761 | * used to compute the address where the current Buffer Descriptor Table (BDT) |
mbed_official | 146:f64d43ff0c18 | 2762 | * resides in system memory. |
mbed_official | 146:f64d43ff0c18 | 2763 | */ |
mbed_official | 146:f64d43ff0c18 | 2764 | //@{ |
mbed_official | 146:f64d43ff0c18 | 2765 | #define BP_USB_FRMNUMH_FRM (0U) //!< Bit position for USB_FRMNUMH_FRM. |
mbed_official | 146:f64d43ff0c18 | 2766 | #define BM_USB_FRMNUMH_FRM (0x07U) //!< Bit mask for USB_FRMNUMH_FRM. |
mbed_official | 146:f64d43ff0c18 | 2767 | #define BS_USB_FRMNUMH_FRM (3U) //!< Bit field size in bits for USB_FRMNUMH_FRM. |
mbed_official | 146:f64d43ff0c18 | 2768 | |
mbed_official | 146:f64d43ff0c18 | 2769 | #ifndef __LANGUAGE_ASM__ |
mbed_official | 146:f64d43ff0c18 | 2770 | //! @brief Read current value of the USB_FRMNUMH_FRM field. |
mbed_official | 146:f64d43ff0c18 | 2771 | #define BR_USB_FRMNUMH_FRM (HW_USB_FRMNUMH.B.FRM) |
mbed_official | 146:f64d43ff0c18 | 2772 | #endif |
mbed_official | 146:f64d43ff0c18 | 2773 | |
mbed_official | 146:f64d43ff0c18 | 2774 | //! @brief Format value for bitfield USB_FRMNUMH_FRM. |
mbed_official | 146:f64d43ff0c18 | 2775 | #define BF_USB_FRMNUMH_FRM(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint8_t) << BP_USB_FRMNUMH_FRM), uint8_t) & BM_USB_FRMNUMH_FRM) |
mbed_official | 146:f64d43ff0c18 | 2776 | |
mbed_official | 146:f64d43ff0c18 | 2777 | #ifndef __LANGUAGE_ASM__ |
mbed_official | 146:f64d43ff0c18 | 2778 | //! @brief Set the FRM field to a new value. |
mbed_official | 146:f64d43ff0c18 | 2779 | #define BW_USB_FRMNUMH_FRM(v) (HW_USB_FRMNUMH_WR((HW_USB_FRMNUMH_RD() & ~BM_USB_FRMNUMH_FRM) | BF_USB_FRMNUMH_FRM(v))) |
mbed_official | 146:f64d43ff0c18 | 2780 | #endif |
mbed_official | 146:f64d43ff0c18 | 2781 | //@} |
mbed_official | 146:f64d43ff0c18 | 2782 | |
mbed_official | 146:f64d43ff0c18 | 2783 | //------------------------------------------------------------------------------------------- |
mbed_official | 146:f64d43ff0c18 | 2784 | // HW_USB_TOKEN - Token register |
mbed_official | 146:f64d43ff0c18 | 2785 | //------------------------------------------------------------------------------------------- |
mbed_official | 146:f64d43ff0c18 | 2786 | |
mbed_official | 146:f64d43ff0c18 | 2787 | #ifndef __LANGUAGE_ASM__ |
mbed_official | 146:f64d43ff0c18 | 2788 | /*! |
mbed_official | 146:f64d43ff0c18 | 2789 | * @brief HW_USB_TOKEN - Token register (RW) |
mbed_official | 146:f64d43ff0c18 | 2790 | * |
mbed_official | 146:f64d43ff0c18 | 2791 | * Reset value: 0x00U |
mbed_official | 146:f64d43ff0c18 | 2792 | * |
mbed_official | 146:f64d43ff0c18 | 2793 | * Used to initiate USB transactions when in host mode (HOSTMODEEN=1). When the |
mbed_official | 146:f64d43ff0c18 | 2794 | * software needs to execute a USB transaction to a peripheral, it writes the |
mbed_official | 146:f64d43ff0c18 | 2795 | * TOKEN type and endpoint to this register. After this register has been written, |
mbed_official | 146:f64d43ff0c18 | 2796 | * the USB module begins the specified USB transaction to the address contained in |
mbed_official | 146:f64d43ff0c18 | 2797 | * the address register. The processor core must always check that the |
mbed_official | 146:f64d43ff0c18 | 2798 | * TOKEN_BUSY bit in the control register is not 1 before writing to the Token Register. |
mbed_official | 146:f64d43ff0c18 | 2799 | * This ensures that the token commands are not overwritten before they can be |
mbed_official | 146:f64d43ff0c18 | 2800 | * executed. The address register and endpoint control register 0 are also used when |
mbed_official | 146:f64d43ff0c18 | 2801 | * performing a token command and therefore must also be written before the |
mbed_official | 146:f64d43ff0c18 | 2802 | * Token Register. The address register is used to select the USB peripheral address |
mbed_official | 146:f64d43ff0c18 | 2803 | * transmitted by the token command. The endpoint control register determines the |
mbed_official | 146:f64d43ff0c18 | 2804 | * handshake and retry policies used during the transfer. |
mbed_official | 146:f64d43ff0c18 | 2805 | */ |
mbed_official | 146:f64d43ff0c18 | 2806 | typedef union _hw_usb_token |
mbed_official | 146:f64d43ff0c18 | 2807 | { |
mbed_official | 146:f64d43ff0c18 | 2808 | uint8_t U; |
mbed_official | 146:f64d43ff0c18 | 2809 | struct _hw_usb_token_bitfields |
mbed_official | 146:f64d43ff0c18 | 2810 | { |
mbed_official | 146:f64d43ff0c18 | 2811 | uint8_t TOKENENDPT : 4; //!< [3:0] |
mbed_official | 146:f64d43ff0c18 | 2812 | uint8_t TOKENPID : 4; //!< [7:4] |
mbed_official | 146:f64d43ff0c18 | 2813 | } B; |
mbed_official | 146:f64d43ff0c18 | 2814 | } hw_usb_token_t; |
mbed_official | 146:f64d43ff0c18 | 2815 | #endif |
mbed_official | 146:f64d43ff0c18 | 2816 | |
mbed_official | 146:f64d43ff0c18 | 2817 | /*! |
mbed_official | 146:f64d43ff0c18 | 2818 | * @name Constants and macros for entire USB_TOKEN register |
mbed_official | 146:f64d43ff0c18 | 2819 | */ |
mbed_official | 146:f64d43ff0c18 | 2820 | //@{ |
mbed_official | 146:f64d43ff0c18 | 2821 | #define HW_USB_TOKEN_ADDR (REGS_USB_BASE + 0xA8U) |
mbed_official | 146:f64d43ff0c18 | 2822 | |
mbed_official | 146:f64d43ff0c18 | 2823 | #ifndef __LANGUAGE_ASM__ |
mbed_official | 146:f64d43ff0c18 | 2824 | #define HW_USB_TOKEN (*(__IO hw_usb_token_t *) HW_USB_TOKEN_ADDR) |
mbed_official | 146:f64d43ff0c18 | 2825 | #define HW_USB_TOKEN_RD() (HW_USB_TOKEN.U) |
mbed_official | 146:f64d43ff0c18 | 2826 | #define HW_USB_TOKEN_WR(v) (HW_USB_TOKEN.U = (v)) |
mbed_official | 146:f64d43ff0c18 | 2827 | #define HW_USB_TOKEN_SET(v) (HW_USB_TOKEN_WR(HW_USB_TOKEN_RD() | (v))) |
mbed_official | 146:f64d43ff0c18 | 2828 | #define HW_USB_TOKEN_CLR(v) (HW_USB_TOKEN_WR(HW_USB_TOKEN_RD() & ~(v))) |
mbed_official | 146:f64d43ff0c18 | 2829 | #define HW_USB_TOKEN_TOG(v) (HW_USB_TOKEN_WR(HW_USB_TOKEN_RD() ^ (v))) |
mbed_official | 146:f64d43ff0c18 | 2830 | #endif |
mbed_official | 146:f64d43ff0c18 | 2831 | //@} |
mbed_official | 146:f64d43ff0c18 | 2832 | |
mbed_official | 146:f64d43ff0c18 | 2833 | /* |
mbed_official | 146:f64d43ff0c18 | 2834 | * Constants & macros for individual USB_TOKEN bitfields |
mbed_official | 146:f64d43ff0c18 | 2835 | */ |
mbed_official | 146:f64d43ff0c18 | 2836 | |
mbed_official | 146:f64d43ff0c18 | 2837 | /*! |
mbed_official | 146:f64d43ff0c18 | 2838 | * @name Register USB_TOKEN, field TOKENENDPT[3:0] (RW) |
mbed_official | 146:f64d43ff0c18 | 2839 | * |
mbed_official | 146:f64d43ff0c18 | 2840 | * Holds the Endpoint address for the token command. The four bit value written |
mbed_official | 146:f64d43ff0c18 | 2841 | * must be a valid endpoint. |
mbed_official | 146:f64d43ff0c18 | 2842 | */ |
mbed_official | 146:f64d43ff0c18 | 2843 | //@{ |
mbed_official | 146:f64d43ff0c18 | 2844 | #define BP_USB_TOKEN_TOKENENDPT (0U) //!< Bit position for USB_TOKEN_TOKENENDPT. |
mbed_official | 146:f64d43ff0c18 | 2845 | #define BM_USB_TOKEN_TOKENENDPT (0x0FU) //!< Bit mask for USB_TOKEN_TOKENENDPT. |
mbed_official | 146:f64d43ff0c18 | 2846 | #define BS_USB_TOKEN_TOKENENDPT (4U) //!< Bit field size in bits for USB_TOKEN_TOKENENDPT. |
mbed_official | 146:f64d43ff0c18 | 2847 | |
mbed_official | 146:f64d43ff0c18 | 2848 | #ifndef __LANGUAGE_ASM__ |
mbed_official | 146:f64d43ff0c18 | 2849 | //! @brief Read current value of the USB_TOKEN_TOKENENDPT field. |
mbed_official | 146:f64d43ff0c18 | 2850 | #define BR_USB_TOKEN_TOKENENDPT (HW_USB_TOKEN.B.TOKENENDPT) |
mbed_official | 146:f64d43ff0c18 | 2851 | #endif |
mbed_official | 146:f64d43ff0c18 | 2852 | |
mbed_official | 146:f64d43ff0c18 | 2853 | //! @brief Format value for bitfield USB_TOKEN_TOKENENDPT. |
mbed_official | 146:f64d43ff0c18 | 2854 | #define BF_USB_TOKEN_TOKENENDPT(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint8_t) << BP_USB_TOKEN_TOKENENDPT), uint8_t) & BM_USB_TOKEN_TOKENENDPT) |
mbed_official | 146:f64d43ff0c18 | 2855 | |
mbed_official | 146:f64d43ff0c18 | 2856 | #ifndef __LANGUAGE_ASM__ |
mbed_official | 146:f64d43ff0c18 | 2857 | //! @brief Set the TOKENENDPT field to a new value. |
mbed_official | 146:f64d43ff0c18 | 2858 | #define BW_USB_TOKEN_TOKENENDPT(v) (HW_USB_TOKEN_WR((HW_USB_TOKEN_RD() & ~BM_USB_TOKEN_TOKENENDPT) | BF_USB_TOKEN_TOKENENDPT(v))) |
mbed_official | 146:f64d43ff0c18 | 2859 | #endif |
mbed_official | 146:f64d43ff0c18 | 2860 | //@} |
mbed_official | 146:f64d43ff0c18 | 2861 | |
mbed_official | 146:f64d43ff0c18 | 2862 | /*! |
mbed_official | 146:f64d43ff0c18 | 2863 | * @name Register USB_TOKEN, field TOKENPID[7:4] (RW) |
mbed_official | 146:f64d43ff0c18 | 2864 | * |
mbed_official | 146:f64d43ff0c18 | 2865 | * Contains the token type executed by the USB module. |
mbed_official | 146:f64d43ff0c18 | 2866 | * |
mbed_official | 146:f64d43ff0c18 | 2867 | * Values: |
mbed_official | 146:f64d43ff0c18 | 2868 | * - 0001 - OUT Token. USB Module performs an OUT (TX) transaction. |
mbed_official | 146:f64d43ff0c18 | 2869 | * - 1001 - IN Token. USB Module performs an In (RX) transaction. |
mbed_official | 146:f64d43ff0c18 | 2870 | * - 1101 - SETUP Token. USB Module performs a SETUP (TX) transaction |
mbed_official | 146:f64d43ff0c18 | 2871 | */ |
mbed_official | 146:f64d43ff0c18 | 2872 | //@{ |
mbed_official | 146:f64d43ff0c18 | 2873 | #define BP_USB_TOKEN_TOKENPID (4U) //!< Bit position for USB_TOKEN_TOKENPID. |
mbed_official | 146:f64d43ff0c18 | 2874 | #define BM_USB_TOKEN_TOKENPID (0xF0U) //!< Bit mask for USB_TOKEN_TOKENPID. |
mbed_official | 146:f64d43ff0c18 | 2875 | #define BS_USB_TOKEN_TOKENPID (4U) //!< Bit field size in bits for USB_TOKEN_TOKENPID. |
mbed_official | 146:f64d43ff0c18 | 2876 | |
mbed_official | 146:f64d43ff0c18 | 2877 | #ifndef __LANGUAGE_ASM__ |
mbed_official | 146:f64d43ff0c18 | 2878 | //! @brief Read current value of the USB_TOKEN_TOKENPID field. |
mbed_official | 146:f64d43ff0c18 | 2879 | #define BR_USB_TOKEN_TOKENPID (HW_USB_TOKEN.B.TOKENPID) |
mbed_official | 146:f64d43ff0c18 | 2880 | #endif |
mbed_official | 146:f64d43ff0c18 | 2881 | |
mbed_official | 146:f64d43ff0c18 | 2882 | //! @brief Format value for bitfield USB_TOKEN_TOKENPID. |
mbed_official | 146:f64d43ff0c18 | 2883 | #define BF_USB_TOKEN_TOKENPID(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint8_t) << BP_USB_TOKEN_TOKENPID), uint8_t) & BM_USB_TOKEN_TOKENPID) |
mbed_official | 146:f64d43ff0c18 | 2884 | |
mbed_official | 146:f64d43ff0c18 | 2885 | #ifndef __LANGUAGE_ASM__ |
mbed_official | 146:f64d43ff0c18 | 2886 | //! @brief Set the TOKENPID field to a new value. |
mbed_official | 146:f64d43ff0c18 | 2887 | #define BW_USB_TOKEN_TOKENPID(v) (HW_USB_TOKEN_WR((HW_USB_TOKEN_RD() & ~BM_USB_TOKEN_TOKENPID) | BF_USB_TOKEN_TOKENPID(v))) |
mbed_official | 146:f64d43ff0c18 | 2888 | #endif |
mbed_official | 146:f64d43ff0c18 | 2889 | //@} |
mbed_official | 146:f64d43ff0c18 | 2890 | |
mbed_official | 146:f64d43ff0c18 | 2891 | //------------------------------------------------------------------------------------------- |
mbed_official | 146:f64d43ff0c18 | 2892 | // HW_USB_SOFTHLD - SOF Threshold register |
mbed_official | 146:f64d43ff0c18 | 2893 | //------------------------------------------------------------------------------------------- |
mbed_official | 146:f64d43ff0c18 | 2894 | |
mbed_official | 146:f64d43ff0c18 | 2895 | #ifndef __LANGUAGE_ASM__ |
mbed_official | 146:f64d43ff0c18 | 2896 | /*! |
mbed_official | 146:f64d43ff0c18 | 2897 | * @brief HW_USB_SOFTHLD - SOF Threshold register (RW) |
mbed_official | 146:f64d43ff0c18 | 2898 | * |
mbed_official | 146:f64d43ff0c18 | 2899 | * Reset value: 0x00U |
mbed_official | 146:f64d43ff0c18 | 2900 | * |
mbed_official | 146:f64d43ff0c18 | 2901 | * The SOF Threshold Register is used only in Host mode (HOSTMODEEN=1). When in |
mbed_official | 146:f64d43ff0c18 | 2902 | * Host mode, the 14-bit SOF counter counts the interval between SOF frames. The |
mbed_official | 146:f64d43ff0c18 | 2903 | * SOF must be transmitted every 1ms so therefore the SOF counter is loaded with |
mbed_official | 146:f64d43ff0c18 | 2904 | * a value of 12000. When the SOF counter reaches zero, a Start Of Frame (SOF) |
mbed_official | 146:f64d43ff0c18 | 2905 | * token is transmitted. The SOF threshold register is used to program the number |
mbed_official | 146:f64d43ff0c18 | 2906 | * of USB byte times before the SOF to stop initiating token packet transactions. |
mbed_official | 146:f64d43ff0c18 | 2907 | * This register must be set to a value that ensures that other packets are not |
mbed_official | 146:f64d43ff0c18 | 2908 | * actively being transmitted when the SOF time counts to zero. When the SOF |
mbed_official | 146:f64d43ff0c18 | 2909 | * counter reaches the threshold value, no more tokens are transmitted until after the |
mbed_official | 146:f64d43ff0c18 | 2910 | * SOF has been transmitted. The value programmed into the threshold register |
mbed_official | 146:f64d43ff0c18 | 2911 | * must reserve enough time to ensure the worst case transaction completes. In |
mbed_official | 146:f64d43ff0c18 | 2912 | * general the worst case transaction is an IN token followed by a data packet from |
mbed_official | 146:f64d43ff0c18 | 2913 | * the target followed by the response from the host. The actual time required is |
mbed_official | 146:f64d43ff0c18 | 2914 | * a function of the maximum packet size on the bus. Typical values for the SOF |
mbed_official | 146:f64d43ff0c18 | 2915 | * threshold are: 64-byte packets=74; 32-byte packets=42; 16-byte packets=26; |
mbed_official | 146:f64d43ff0c18 | 2916 | * 8-byte packets=18. |
mbed_official | 146:f64d43ff0c18 | 2917 | */ |
mbed_official | 146:f64d43ff0c18 | 2918 | typedef union _hw_usb_softhld |
mbed_official | 146:f64d43ff0c18 | 2919 | { |
mbed_official | 146:f64d43ff0c18 | 2920 | uint8_t U; |
mbed_official | 146:f64d43ff0c18 | 2921 | struct _hw_usb_softhld_bitfields |
mbed_official | 146:f64d43ff0c18 | 2922 | { |
mbed_official | 146:f64d43ff0c18 | 2923 | uint8_t CNT : 8; //!< [7:0] |
mbed_official | 146:f64d43ff0c18 | 2924 | } B; |
mbed_official | 146:f64d43ff0c18 | 2925 | } hw_usb_softhld_t; |
mbed_official | 146:f64d43ff0c18 | 2926 | #endif |
mbed_official | 146:f64d43ff0c18 | 2927 | |
mbed_official | 146:f64d43ff0c18 | 2928 | /*! |
mbed_official | 146:f64d43ff0c18 | 2929 | * @name Constants and macros for entire USB_SOFTHLD register |
mbed_official | 146:f64d43ff0c18 | 2930 | */ |
mbed_official | 146:f64d43ff0c18 | 2931 | //@{ |
mbed_official | 146:f64d43ff0c18 | 2932 | #define HW_USB_SOFTHLD_ADDR (REGS_USB_BASE + 0xACU) |
mbed_official | 146:f64d43ff0c18 | 2933 | |
mbed_official | 146:f64d43ff0c18 | 2934 | #ifndef __LANGUAGE_ASM__ |
mbed_official | 146:f64d43ff0c18 | 2935 | #define HW_USB_SOFTHLD (*(__IO hw_usb_softhld_t *) HW_USB_SOFTHLD_ADDR) |
mbed_official | 146:f64d43ff0c18 | 2936 | #define HW_USB_SOFTHLD_RD() (HW_USB_SOFTHLD.U) |
mbed_official | 146:f64d43ff0c18 | 2937 | #define HW_USB_SOFTHLD_WR(v) (HW_USB_SOFTHLD.U = (v)) |
mbed_official | 146:f64d43ff0c18 | 2938 | #define HW_USB_SOFTHLD_SET(v) (HW_USB_SOFTHLD_WR(HW_USB_SOFTHLD_RD() | (v))) |
mbed_official | 146:f64d43ff0c18 | 2939 | #define HW_USB_SOFTHLD_CLR(v) (HW_USB_SOFTHLD_WR(HW_USB_SOFTHLD_RD() & ~(v))) |
mbed_official | 146:f64d43ff0c18 | 2940 | #define HW_USB_SOFTHLD_TOG(v) (HW_USB_SOFTHLD_WR(HW_USB_SOFTHLD_RD() ^ (v))) |
mbed_official | 146:f64d43ff0c18 | 2941 | #endif |
mbed_official | 146:f64d43ff0c18 | 2942 | //@} |
mbed_official | 146:f64d43ff0c18 | 2943 | |
mbed_official | 146:f64d43ff0c18 | 2944 | /* |
mbed_official | 146:f64d43ff0c18 | 2945 | * Constants & macros for individual USB_SOFTHLD bitfields |
mbed_official | 146:f64d43ff0c18 | 2946 | */ |
mbed_official | 146:f64d43ff0c18 | 2947 | |
mbed_official | 146:f64d43ff0c18 | 2948 | /*! |
mbed_official | 146:f64d43ff0c18 | 2949 | * @name Register USB_SOFTHLD, field CNT[7:0] (RW) |
mbed_official | 146:f64d43ff0c18 | 2950 | * |
mbed_official | 146:f64d43ff0c18 | 2951 | * Represents the SOF count threshold in byte times. |
mbed_official | 146:f64d43ff0c18 | 2952 | */ |
mbed_official | 146:f64d43ff0c18 | 2953 | //@{ |
mbed_official | 146:f64d43ff0c18 | 2954 | #define BP_USB_SOFTHLD_CNT (0U) //!< Bit position for USB_SOFTHLD_CNT. |
mbed_official | 146:f64d43ff0c18 | 2955 | #define BM_USB_SOFTHLD_CNT (0xFFU) //!< Bit mask for USB_SOFTHLD_CNT. |
mbed_official | 146:f64d43ff0c18 | 2956 | #define BS_USB_SOFTHLD_CNT (8U) //!< Bit field size in bits for USB_SOFTHLD_CNT. |
mbed_official | 146:f64d43ff0c18 | 2957 | |
mbed_official | 146:f64d43ff0c18 | 2958 | #ifndef __LANGUAGE_ASM__ |
mbed_official | 146:f64d43ff0c18 | 2959 | //! @brief Read current value of the USB_SOFTHLD_CNT field. |
mbed_official | 146:f64d43ff0c18 | 2960 | #define BR_USB_SOFTHLD_CNT (HW_USB_SOFTHLD.U) |
mbed_official | 146:f64d43ff0c18 | 2961 | #endif |
mbed_official | 146:f64d43ff0c18 | 2962 | |
mbed_official | 146:f64d43ff0c18 | 2963 | //! @brief Format value for bitfield USB_SOFTHLD_CNT. |
mbed_official | 146:f64d43ff0c18 | 2964 | #define BF_USB_SOFTHLD_CNT(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint8_t) << BP_USB_SOFTHLD_CNT), uint8_t) & BM_USB_SOFTHLD_CNT) |
mbed_official | 146:f64d43ff0c18 | 2965 | |
mbed_official | 146:f64d43ff0c18 | 2966 | #ifndef __LANGUAGE_ASM__ |
mbed_official | 146:f64d43ff0c18 | 2967 | //! @brief Set the CNT field to a new value. |
mbed_official | 146:f64d43ff0c18 | 2968 | #define BW_USB_SOFTHLD_CNT(v) (HW_USB_SOFTHLD_WR(v)) |
mbed_official | 146:f64d43ff0c18 | 2969 | #endif |
mbed_official | 146:f64d43ff0c18 | 2970 | //@} |
mbed_official | 146:f64d43ff0c18 | 2971 | |
mbed_official | 146:f64d43ff0c18 | 2972 | //------------------------------------------------------------------------------------------- |
mbed_official | 146:f64d43ff0c18 | 2973 | // HW_USB_BDTPAGE2 - BDT Page Register 2 |
mbed_official | 146:f64d43ff0c18 | 2974 | //------------------------------------------------------------------------------------------- |
mbed_official | 146:f64d43ff0c18 | 2975 | |
mbed_official | 146:f64d43ff0c18 | 2976 | #ifndef __LANGUAGE_ASM__ |
mbed_official | 146:f64d43ff0c18 | 2977 | /*! |
mbed_official | 146:f64d43ff0c18 | 2978 | * @brief HW_USB_BDTPAGE2 - BDT Page Register 2 (RW) |
mbed_official | 146:f64d43ff0c18 | 2979 | * |
mbed_official | 146:f64d43ff0c18 | 2980 | * Reset value: 0x00U |
mbed_official | 146:f64d43ff0c18 | 2981 | * |
mbed_official | 146:f64d43ff0c18 | 2982 | * Contains an 8-bit value used to compute the address where the current Buffer |
mbed_official | 146:f64d43ff0c18 | 2983 | * Descriptor Table (BDT) resides in system memory. See Buffer Descriptor Table. |
mbed_official | 146:f64d43ff0c18 | 2984 | */ |
mbed_official | 146:f64d43ff0c18 | 2985 | typedef union _hw_usb_bdtpage2 |
mbed_official | 146:f64d43ff0c18 | 2986 | { |
mbed_official | 146:f64d43ff0c18 | 2987 | uint8_t U; |
mbed_official | 146:f64d43ff0c18 | 2988 | struct _hw_usb_bdtpage2_bitfields |
mbed_official | 146:f64d43ff0c18 | 2989 | { |
mbed_official | 146:f64d43ff0c18 | 2990 | uint8_t BDTBA : 8; //!< [7:0] |
mbed_official | 146:f64d43ff0c18 | 2991 | } B; |
mbed_official | 146:f64d43ff0c18 | 2992 | } hw_usb_bdtpage2_t; |
mbed_official | 146:f64d43ff0c18 | 2993 | #endif |
mbed_official | 146:f64d43ff0c18 | 2994 | |
mbed_official | 146:f64d43ff0c18 | 2995 | /*! |
mbed_official | 146:f64d43ff0c18 | 2996 | * @name Constants and macros for entire USB_BDTPAGE2 register |
mbed_official | 146:f64d43ff0c18 | 2997 | */ |
mbed_official | 146:f64d43ff0c18 | 2998 | //@{ |
mbed_official | 146:f64d43ff0c18 | 2999 | #define HW_USB_BDTPAGE2_ADDR (REGS_USB_BASE + 0xB0U) |
mbed_official | 146:f64d43ff0c18 | 3000 | |
mbed_official | 146:f64d43ff0c18 | 3001 | #ifndef __LANGUAGE_ASM__ |
mbed_official | 146:f64d43ff0c18 | 3002 | #define HW_USB_BDTPAGE2 (*(__IO hw_usb_bdtpage2_t *) HW_USB_BDTPAGE2_ADDR) |
mbed_official | 146:f64d43ff0c18 | 3003 | #define HW_USB_BDTPAGE2_RD() (HW_USB_BDTPAGE2.U) |
mbed_official | 146:f64d43ff0c18 | 3004 | #define HW_USB_BDTPAGE2_WR(v) (HW_USB_BDTPAGE2.U = (v)) |
mbed_official | 146:f64d43ff0c18 | 3005 | #define HW_USB_BDTPAGE2_SET(v) (HW_USB_BDTPAGE2_WR(HW_USB_BDTPAGE2_RD() | (v))) |
mbed_official | 146:f64d43ff0c18 | 3006 | #define HW_USB_BDTPAGE2_CLR(v) (HW_USB_BDTPAGE2_WR(HW_USB_BDTPAGE2_RD() & ~(v))) |
mbed_official | 146:f64d43ff0c18 | 3007 | #define HW_USB_BDTPAGE2_TOG(v) (HW_USB_BDTPAGE2_WR(HW_USB_BDTPAGE2_RD() ^ (v))) |
mbed_official | 146:f64d43ff0c18 | 3008 | #endif |
mbed_official | 146:f64d43ff0c18 | 3009 | //@} |
mbed_official | 146:f64d43ff0c18 | 3010 | |
mbed_official | 146:f64d43ff0c18 | 3011 | /* |
mbed_official | 146:f64d43ff0c18 | 3012 | * Constants & macros for individual USB_BDTPAGE2 bitfields |
mbed_official | 146:f64d43ff0c18 | 3013 | */ |
mbed_official | 146:f64d43ff0c18 | 3014 | |
mbed_official | 146:f64d43ff0c18 | 3015 | /*! |
mbed_official | 146:f64d43ff0c18 | 3016 | * @name Register USB_BDTPAGE2, field BDTBA[7:0] (RW) |
mbed_official | 146:f64d43ff0c18 | 3017 | * |
mbed_official | 146:f64d43ff0c18 | 3018 | * Provides address bits 23 through 16 of the BDT base address that defines the |
mbed_official | 146:f64d43ff0c18 | 3019 | * location of Buffer Descriptor Table resides in system memory. |
mbed_official | 146:f64d43ff0c18 | 3020 | */ |
mbed_official | 146:f64d43ff0c18 | 3021 | //@{ |
mbed_official | 146:f64d43ff0c18 | 3022 | #define BP_USB_BDTPAGE2_BDTBA (0U) //!< Bit position for USB_BDTPAGE2_BDTBA. |
mbed_official | 146:f64d43ff0c18 | 3023 | #define BM_USB_BDTPAGE2_BDTBA (0xFFU) //!< Bit mask for USB_BDTPAGE2_BDTBA. |
mbed_official | 146:f64d43ff0c18 | 3024 | #define BS_USB_BDTPAGE2_BDTBA (8U) //!< Bit field size in bits for USB_BDTPAGE2_BDTBA. |
mbed_official | 146:f64d43ff0c18 | 3025 | |
mbed_official | 146:f64d43ff0c18 | 3026 | #ifndef __LANGUAGE_ASM__ |
mbed_official | 146:f64d43ff0c18 | 3027 | //! @brief Read current value of the USB_BDTPAGE2_BDTBA field. |
mbed_official | 146:f64d43ff0c18 | 3028 | #define BR_USB_BDTPAGE2_BDTBA (HW_USB_BDTPAGE2.U) |
mbed_official | 146:f64d43ff0c18 | 3029 | #endif |
mbed_official | 146:f64d43ff0c18 | 3030 | |
mbed_official | 146:f64d43ff0c18 | 3031 | //! @brief Format value for bitfield USB_BDTPAGE2_BDTBA. |
mbed_official | 146:f64d43ff0c18 | 3032 | #define BF_USB_BDTPAGE2_BDTBA(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint8_t) << BP_USB_BDTPAGE2_BDTBA), uint8_t) & BM_USB_BDTPAGE2_BDTBA) |
mbed_official | 146:f64d43ff0c18 | 3033 | |
mbed_official | 146:f64d43ff0c18 | 3034 | #ifndef __LANGUAGE_ASM__ |
mbed_official | 146:f64d43ff0c18 | 3035 | //! @brief Set the BDTBA field to a new value. |
mbed_official | 146:f64d43ff0c18 | 3036 | #define BW_USB_BDTPAGE2_BDTBA(v) (HW_USB_BDTPAGE2_WR(v)) |
mbed_official | 146:f64d43ff0c18 | 3037 | #endif |
mbed_official | 146:f64d43ff0c18 | 3038 | //@} |
mbed_official | 146:f64d43ff0c18 | 3039 | |
mbed_official | 146:f64d43ff0c18 | 3040 | //------------------------------------------------------------------------------------------- |
mbed_official | 146:f64d43ff0c18 | 3041 | // HW_USB_BDTPAGE3 - BDT Page Register 3 |
mbed_official | 146:f64d43ff0c18 | 3042 | //------------------------------------------------------------------------------------------- |
mbed_official | 146:f64d43ff0c18 | 3043 | |
mbed_official | 146:f64d43ff0c18 | 3044 | #ifndef __LANGUAGE_ASM__ |
mbed_official | 146:f64d43ff0c18 | 3045 | /*! |
mbed_official | 146:f64d43ff0c18 | 3046 | * @brief HW_USB_BDTPAGE3 - BDT Page Register 3 (RW) |
mbed_official | 146:f64d43ff0c18 | 3047 | * |
mbed_official | 146:f64d43ff0c18 | 3048 | * Reset value: 0x00U |
mbed_official | 146:f64d43ff0c18 | 3049 | * |
mbed_official | 146:f64d43ff0c18 | 3050 | * Contains an 8-bit value used to compute the address where the current Buffer |
mbed_official | 146:f64d43ff0c18 | 3051 | * Descriptor Table (BDT) resides in system memory. See Buffer Descriptor Table. |
mbed_official | 146:f64d43ff0c18 | 3052 | */ |
mbed_official | 146:f64d43ff0c18 | 3053 | typedef union _hw_usb_bdtpage3 |
mbed_official | 146:f64d43ff0c18 | 3054 | { |
mbed_official | 146:f64d43ff0c18 | 3055 | uint8_t U; |
mbed_official | 146:f64d43ff0c18 | 3056 | struct _hw_usb_bdtpage3_bitfields |
mbed_official | 146:f64d43ff0c18 | 3057 | { |
mbed_official | 146:f64d43ff0c18 | 3058 | uint8_t BDTBA : 8; //!< [7:0] |
mbed_official | 146:f64d43ff0c18 | 3059 | } B; |
mbed_official | 146:f64d43ff0c18 | 3060 | } hw_usb_bdtpage3_t; |
mbed_official | 146:f64d43ff0c18 | 3061 | #endif |
mbed_official | 146:f64d43ff0c18 | 3062 | |
mbed_official | 146:f64d43ff0c18 | 3063 | /*! |
mbed_official | 146:f64d43ff0c18 | 3064 | * @name Constants and macros for entire USB_BDTPAGE3 register |
mbed_official | 146:f64d43ff0c18 | 3065 | */ |
mbed_official | 146:f64d43ff0c18 | 3066 | //@{ |
mbed_official | 146:f64d43ff0c18 | 3067 | #define HW_USB_BDTPAGE3_ADDR (REGS_USB_BASE + 0xB4U) |
mbed_official | 146:f64d43ff0c18 | 3068 | |
mbed_official | 146:f64d43ff0c18 | 3069 | #ifndef __LANGUAGE_ASM__ |
mbed_official | 146:f64d43ff0c18 | 3070 | #define HW_USB_BDTPAGE3 (*(__IO hw_usb_bdtpage3_t *) HW_USB_BDTPAGE3_ADDR) |
mbed_official | 146:f64d43ff0c18 | 3071 | #define HW_USB_BDTPAGE3_RD() (HW_USB_BDTPAGE3.U) |
mbed_official | 146:f64d43ff0c18 | 3072 | #define HW_USB_BDTPAGE3_WR(v) (HW_USB_BDTPAGE3.U = (v)) |
mbed_official | 146:f64d43ff0c18 | 3073 | #define HW_USB_BDTPAGE3_SET(v) (HW_USB_BDTPAGE3_WR(HW_USB_BDTPAGE3_RD() | (v))) |
mbed_official | 146:f64d43ff0c18 | 3074 | #define HW_USB_BDTPAGE3_CLR(v) (HW_USB_BDTPAGE3_WR(HW_USB_BDTPAGE3_RD() & ~(v))) |
mbed_official | 146:f64d43ff0c18 | 3075 | #define HW_USB_BDTPAGE3_TOG(v) (HW_USB_BDTPAGE3_WR(HW_USB_BDTPAGE3_RD() ^ (v))) |
mbed_official | 146:f64d43ff0c18 | 3076 | #endif |
mbed_official | 146:f64d43ff0c18 | 3077 | //@} |
mbed_official | 146:f64d43ff0c18 | 3078 | |
mbed_official | 146:f64d43ff0c18 | 3079 | /* |
mbed_official | 146:f64d43ff0c18 | 3080 | * Constants & macros for individual USB_BDTPAGE3 bitfields |
mbed_official | 146:f64d43ff0c18 | 3081 | */ |
mbed_official | 146:f64d43ff0c18 | 3082 | |
mbed_official | 146:f64d43ff0c18 | 3083 | /*! |
mbed_official | 146:f64d43ff0c18 | 3084 | * @name Register USB_BDTPAGE3, field BDTBA[7:0] (RW) |
mbed_official | 146:f64d43ff0c18 | 3085 | * |
mbed_official | 146:f64d43ff0c18 | 3086 | * Provides address bits 31 through 24 of the BDT base address that defines the |
mbed_official | 146:f64d43ff0c18 | 3087 | * location of Buffer Descriptor Table resides in system memory. |
mbed_official | 146:f64d43ff0c18 | 3088 | */ |
mbed_official | 146:f64d43ff0c18 | 3089 | //@{ |
mbed_official | 146:f64d43ff0c18 | 3090 | #define BP_USB_BDTPAGE3_BDTBA (0U) //!< Bit position for USB_BDTPAGE3_BDTBA. |
mbed_official | 146:f64d43ff0c18 | 3091 | #define BM_USB_BDTPAGE3_BDTBA (0xFFU) //!< Bit mask for USB_BDTPAGE3_BDTBA. |
mbed_official | 146:f64d43ff0c18 | 3092 | #define BS_USB_BDTPAGE3_BDTBA (8U) //!< Bit field size in bits for USB_BDTPAGE3_BDTBA. |
mbed_official | 146:f64d43ff0c18 | 3093 | |
mbed_official | 146:f64d43ff0c18 | 3094 | #ifndef __LANGUAGE_ASM__ |
mbed_official | 146:f64d43ff0c18 | 3095 | //! @brief Read current value of the USB_BDTPAGE3_BDTBA field. |
mbed_official | 146:f64d43ff0c18 | 3096 | #define BR_USB_BDTPAGE3_BDTBA (HW_USB_BDTPAGE3.U) |
mbed_official | 146:f64d43ff0c18 | 3097 | #endif |
mbed_official | 146:f64d43ff0c18 | 3098 | |
mbed_official | 146:f64d43ff0c18 | 3099 | //! @brief Format value for bitfield USB_BDTPAGE3_BDTBA. |
mbed_official | 146:f64d43ff0c18 | 3100 | #define BF_USB_BDTPAGE3_BDTBA(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint8_t) << BP_USB_BDTPAGE3_BDTBA), uint8_t) & BM_USB_BDTPAGE3_BDTBA) |
mbed_official | 146:f64d43ff0c18 | 3101 | |
mbed_official | 146:f64d43ff0c18 | 3102 | #ifndef __LANGUAGE_ASM__ |
mbed_official | 146:f64d43ff0c18 | 3103 | //! @brief Set the BDTBA field to a new value. |
mbed_official | 146:f64d43ff0c18 | 3104 | #define BW_USB_BDTPAGE3_BDTBA(v) (HW_USB_BDTPAGE3_WR(v)) |
mbed_official | 146:f64d43ff0c18 | 3105 | #endif |
mbed_official | 146:f64d43ff0c18 | 3106 | //@} |
mbed_official | 146:f64d43ff0c18 | 3107 | |
mbed_official | 146:f64d43ff0c18 | 3108 | //------------------------------------------------------------------------------------------- |
mbed_official | 146:f64d43ff0c18 | 3109 | // HW_USB_ENDPTn - Endpoint Control register |
mbed_official | 146:f64d43ff0c18 | 3110 | //------------------------------------------------------------------------------------------- |
mbed_official | 146:f64d43ff0c18 | 3111 | |
mbed_official | 146:f64d43ff0c18 | 3112 | #ifndef __LANGUAGE_ASM__ |
mbed_official | 146:f64d43ff0c18 | 3113 | /*! |
mbed_official | 146:f64d43ff0c18 | 3114 | * @brief HW_USB_ENDPTn - Endpoint Control register (RW) |
mbed_official | 146:f64d43ff0c18 | 3115 | * |
mbed_official | 146:f64d43ff0c18 | 3116 | * Reset value: 0x00U |
mbed_official | 146:f64d43ff0c18 | 3117 | * |
mbed_official | 146:f64d43ff0c18 | 3118 | * Contains the endpoint control bits for each of the 16 endpoints available |
mbed_official | 146:f64d43ff0c18 | 3119 | * within the USB module for a decoded address. The format for these registers is |
mbed_official | 146:f64d43ff0c18 | 3120 | * shown in the following figure. Endpoint 0 (ENDPT0) is associated with control |
mbed_official | 146:f64d43ff0c18 | 3121 | * pipe 0, which is required for all USB functions. Therefore, after a USBRST |
mbed_official | 146:f64d43ff0c18 | 3122 | * interrupt occurs the processor core should set ENDPT0 to contain 0x0D. In Host mode |
mbed_official | 146:f64d43ff0c18 | 3123 | * ENDPT0 is used to determine the handshake, retry and low speed |
mbed_official | 146:f64d43ff0c18 | 3124 | * characteristics of the host transfer. For Control, Bulk and Interrupt transfers, the EPHSHK |
mbed_official | 146:f64d43ff0c18 | 3125 | * bit should be 1. For Isochronous transfers it should be 0. Common values to |
mbed_official | 146:f64d43ff0c18 | 3126 | * use for ENDPT0 in host mode are 0x4D for Control, Bulk, and Interrupt transfers, |
mbed_official | 146:f64d43ff0c18 | 3127 | * and 0x4C for Isochronous transfers. The three bits EPCTLDIS, EPRXEN, and |
mbed_official | 146:f64d43ff0c18 | 3128 | * EPTXEN define if an endpoint is enabled and define the direction of the endpoint. |
mbed_official | 146:f64d43ff0c18 | 3129 | * The endpoint enable/direction control is defined in the following table. |
mbed_official | 146:f64d43ff0c18 | 3130 | * Endpoint enable and direction control EPCTLDIS EPRXEN EPTXEN Endpoint |
mbed_official | 146:f64d43ff0c18 | 3131 | * enable/direction control X 0 0 Disable endpoint X 0 1 Enable endpoint for Tx transfers only |
mbed_official | 146:f64d43ff0c18 | 3132 | * X 1 0 Enable endpoint for Rx transfers only 1 1 1 Enable endpoint for Rx and |
mbed_official | 146:f64d43ff0c18 | 3133 | * Tx transfers 0 1 1 Enable Endpoint for RX and TX as well as control (SETUP) |
mbed_official | 146:f64d43ff0c18 | 3134 | * transfers. |
mbed_official | 146:f64d43ff0c18 | 3135 | */ |
mbed_official | 146:f64d43ff0c18 | 3136 | typedef union _hw_usb_endptn |
mbed_official | 146:f64d43ff0c18 | 3137 | { |
mbed_official | 146:f64d43ff0c18 | 3138 | uint8_t U; |
mbed_official | 146:f64d43ff0c18 | 3139 | struct _hw_usb_endptn_bitfields |
mbed_official | 146:f64d43ff0c18 | 3140 | { |
mbed_official | 146:f64d43ff0c18 | 3141 | uint8_t EPHSHK : 1; //!< [0] |
mbed_official | 146:f64d43ff0c18 | 3142 | uint8_t EPSTALL : 1; //!< [1] |
mbed_official | 146:f64d43ff0c18 | 3143 | uint8_t EPTXEN : 1; //!< [2] |
mbed_official | 146:f64d43ff0c18 | 3144 | uint8_t EPRXEN : 1; //!< [3] |
mbed_official | 146:f64d43ff0c18 | 3145 | uint8_t EPCTLDIS : 1; //!< [4] |
mbed_official | 146:f64d43ff0c18 | 3146 | uint8_t RESERVED0 : 1; //!< [5] |
mbed_official | 146:f64d43ff0c18 | 3147 | uint8_t RETRYDIS : 1; //!< [6] |
mbed_official | 146:f64d43ff0c18 | 3148 | uint8_t HOSTWOHUB : 1; //!< [7] |
mbed_official | 146:f64d43ff0c18 | 3149 | } B; |
mbed_official | 146:f64d43ff0c18 | 3150 | } hw_usb_endptn_t; |
mbed_official | 146:f64d43ff0c18 | 3151 | #endif |
mbed_official | 146:f64d43ff0c18 | 3152 | |
mbed_official | 146:f64d43ff0c18 | 3153 | /*! |
mbed_official | 146:f64d43ff0c18 | 3154 | * @name Constants and macros for entire USB_ENDPTn register |
mbed_official | 146:f64d43ff0c18 | 3155 | */ |
mbed_official | 146:f64d43ff0c18 | 3156 | //@{ |
mbed_official | 146:f64d43ff0c18 | 3157 | #define HW_USB_ENDPTn_COUNT (16U) |
mbed_official | 146:f64d43ff0c18 | 3158 | |
mbed_official | 146:f64d43ff0c18 | 3159 | #define HW_USB_ENDPTn_ADDR(n) (REGS_USB_BASE + 0xC0U + (0x4U * n)) |
mbed_official | 146:f64d43ff0c18 | 3160 | |
mbed_official | 146:f64d43ff0c18 | 3161 | #ifndef __LANGUAGE_ASM__ |
mbed_official | 146:f64d43ff0c18 | 3162 | #define HW_USB_ENDPTn(n) (*(__IO hw_usb_endptn_t *) HW_USB_ENDPTn_ADDR(n)) |
mbed_official | 146:f64d43ff0c18 | 3163 | #define HW_USB_ENDPTn_RD(n) (HW_USB_ENDPTn(n).U) |
mbed_official | 146:f64d43ff0c18 | 3164 | #define HW_USB_ENDPTn_WR(n, v) (HW_USB_ENDPTn(n).U = (v)) |
mbed_official | 146:f64d43ff0c18 | 3165 | #define HW_USB_ENDPTn_SET(n, v) (HW_USB_ENDPTn_WR(n, HW_USB_ENDPTn_RD(n) | (v))) |
mbed_official | 146:f64d43ff0c18 | 3166 | #define HW_USB_ENDPTn_CLR(n, v) (HW_USB_ENDPTn_WR(n, HW_USB_ENDPTn_RD(n) & ~(v))) |
mbed_official | 146:f64d43ff0c18 | 3167 | #define HW_USB_ENDPTn_TOG(n, v) (HW_USB_ENDPTn_WR(n, HW_USB_ENDPTn_RD(n) ^ (v))) |
mbed_official | 146:f64d43ff0c18 | 3168 | #endif |
mbed_official | 146:f64d43ff0c18 | 3169 | //@} |
mbed_official | 146:f64d43ff0c18 | 3170 | |
mbed_official | 146:f64d43ff0c18 | 3171 | /* |
mbed_official | 146:f64d43ff0c18 | 3172 | * Constants & macros for individual USB_ENDPTn bitfields |
mbed_official | 146:f64d43ff0c18 | 3173 | */ |
mbed_official | 146:f64d43ff0c18 | 3174 | |
mbed_official | 146:f64d43ff0c18 | 3175 | /*! |
mbed_official | 146:f64d43ff0c18 | 3176 | * @name Register USB_ENDPTn, field EPHSHK[0] (RW) |
mbed_official | 146:f64d43ff0c18 | 3177 | * |
mbed_official | 146:f64d43ff0c18 | 3178 | * When set this bit enables an endpoint to perform handshaking during a |
mbed_official | 146:f64d43ff0c18 | 3179 | * transaction to this endpoint. This bit is generally 1 unless the endpoint is |
mbed_official | 146:f64d43ff0c18 | 3180 | * Isochronous. |
mbed_official | 146:f64d43ff0c18 | 3181 | */ |
mbed_official | 146:f64d43ff0c18 | 3182 | //@{ |
mbed_official | 146:f64d43ff0c18 | 3183 | #define BP_USB_ENDPTn_EPHSHK (0U) //!< Bit position for USB_ENDPTn_EPHSHK. |
mbed_official | 146:f64d43ff0c18 | 3184 | #define BM_USB_ENDPTn_EPHSHK (0x01U) //!< Bit mask for USB_ENDPTn_EPHSHK. |
mbed_official | 146:f64d43ff0c18 | 3185 | #define BS_USB_ENDPTn_EPHSHK (1U) //!< Bit field size in bits for USB_ENDPTn_EPHSHK. |
mbed_official | 146:f64d43ff0c18 | 3186 | |
mbed_official | 146:f64d43ff0c18 | 3187 | #ifndef __LANGUAGE_ASM__ |
mbed_official | 146:f64d43ff0c18 | 3188 | //! @brief Read current value of the USB_ENDPTn_EPHSHK field. |
mbed_official | 146:f64d43ff0c18 | 3189 | #define BR_USB_ENDPTn_EPHSHK(n) (BITBAND_ACCESS8(HW_USB_ENDPTn_ADDR(n), BP_USB_ENDPTn_EPHSHK)) |
mbed_official | 146:f64d43ff0c18 | 3190 | #endif |
mbed_official | 146:f64d43ff0c18 | 3191 | |
mbed_official | 146:f64d43ff0c18 | 3192 | //! @brief Format value for bitfield USB_ENDPTn_EPHSHK. |
mbed_official | 146:f64d43ff0c18 | 3193 | #define BF_USB_ENDPTn_EPHSHK(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint8_t) << BP_USB_ENDPTn_EPHSHK), uint8_t) & BM_USB_ENDPTn_EPHSHK) |
mbed_official | 146:f64d43ff0c18 | 3194 | |
mbed_official | 146:f64d43ff0c18 | 3195 | #ifndef __LANGUAGE_ASM__ |
mbed_official | 146:f64d43ff0c18 | 3196 | //! @brief Set the EPHSHK field to a new value. |
mbed_official | 146:f64d43ff0c18 | 3197 | #define BW_USB_ENDPTn_EPHSHK(n, v) (BITBAND_ACCESS8(HW_USB_ENDPTn_ADDR(n), BP_USB_ENDPTn_EPHSHK) = (v)) |
mbed_official | 146:f64d43ff0c18 | 3198 | #endif |
mbed_official | 146:f64d43ff0c18 | 3199 | //@} |
mbed_official | 146:f64d43ff0c18 | 3200 | |
mbed_official | 146:f64d43ff0c18 | 3201 | /*! |
mbed_official | 146:f64d43ff0c18 | 3202 | * @name Register USB_ENDPTn, field EPSTALL[1] (RW) |
mbed_official | 146:f64d43ff0c18 | 3203 | * |
mbed_official | 146:f64d43ff0c18 | 3204 | * When set this bit indicates that the endpoint is called. This bit has |
mbed_official | 146:f64d43ff0c18 | 3205 | * priority over all other control bits in the EndPoint Enable Register, but it is only |
mbed_official | 146:f64d43ff0c18 | 3206 | * valid if EPTXEN=1 or EPRXEN=1. Any access to this endpoint causes the USB |
mbed_official | 146:f64d43ff0c18 | 3207 | * Module to return a STALL handshake. After an endpoint is stalled it requires |
mbed_official | 146:f64d43ff0c18 | 3208 | * intervention from the Host Controller. |
mbed_official | 146:f64d43ff0c18 | 3209 | */ |
mbed_official | 146:f64d43ff0c18 | 3210 | //@{ |
mbed_official | 146:f64d43ff0c18 | 3211 | #define BP_USB_ENDPTn_EPSTALL (1U) //!< Bit position for USB_ENDPTn_EPSTALL. |
mbed_official | 146:f64d43ff0c18 | 3212 | #define BM_USB_ENDPTn_EPSTALL (0x02U) //!< Bit mask for USB_ENDPTn_EPSTALL. |
mbed_official | 146:f64d43ff0c18 | 3213 | #define BS_USB_ENDPTn_EPSTALL (1U) //!< Bit field size in bits for USB_ENDPTn_EPSTALL. |
mbed_official | 146:f64d43ff0c18 | 3214 | |
mbed_official | 146:f64d43ff0c18 | 3215 | #ifndef __LANGUAGE_ASM__ |
mbed_official | 146:f64d43ff0c18 | 3216 | //! @brief Read current value of the USB_ENDPTn_EPSTALL field. |
mbed_official | 146:f64d43ff0c18 | 3217 | #define BR_USB_ENDPTn_EPSTALL(n) (BITBAND_ACCESS8(HW_USB_ENDPTn_ADDR(n), BP_USB_ENDPTn_EPSTALL)) |
mbed_official | 146:f64d43ff0c18 | 3218 | #endif |
mbed_official | 146:f64d43ff0c18 | 3219 | |
mbed_official | 146:f64d43ff0c18 | 3220 | //! @brief Format value for bitfield USB_ENDPTn_EPSTALL. |
mbed_official | 146:f64d43ff0c18 | 3221 | #define BF_USB_ENDPTn_EPSTALL(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint8_t) << BP_USB_ENDPTn_EPSTALL), uint8_t) & BM_USB_ENDPTn_EPSTALL) |
mbed_official | 146:f64d43ff0c18 | 3222 | |
mbed_official | 146:f64d43ff0c18 | 3223 | #ifndef __LANGUAGE_ASM__ |
mbed_official | 146:f64d43ff0c18 | 3224 | //! @brief Set the EPSTALL field to a new value. |
mbed_official | 146:f64d43ff0c18 | 3225 | #define BW_USB_ENDPTn_EPSTALL(n, v) (BITBAND_ACCESS8(HW_USB_ENDPTn_ADDR(n), BP_USB_ENDPTn_EPSTALL) = (v)) |
mbed_official | 146:f64d43ff0c18 | 3226 | #endif |
mbed_official | 146:f64d43ff0c18 | 3227 | //@} |
mbed_official | 146:f64d43ff0c18 | 3228 | |
mbed_official | 146:f64d43ff0c18 | 3229 | /*! |
mbed_official | 146:f64d43ff0c18 | 3230 | * @name Register USB_ENDPTn, field EPTXEN[2] (RW) |
mbed_official | 146:f64d43ff0c18 | 3231 | * |
mbed_official | 146:f64d43ff0c18 | 3232 | * This bit, when set, enables the endpoint for TX transfers. |
mbed_official | 146:f64d43ff0c18 | 3233 | */ |
mbed_official | 146:f64d43ff0c18 | 3234 | //@{ |
mbed_official | 146:f64d43ff0c18 | 3235 | #define BP_USB_ENDPTn_EPTXEN (2U) //!< Bit position for USB_ENDPTn_EPTXEN. |
mbed_official | 146:f64d43ff0c18 | 3236 | #define BM_USB_ENDPTn_EPTXEN (0x04U) //!< Bit mask for USB_ENDPTn_EPTXEN. |
mbed_official | 146:f64d43ff0c18 | 3237 | #define BS_USB_ENDPTn_EPTXEN (1U) //!< Bit field size in bits for USB_ENDPTn_EPTXEN. |
mbed_official | 146:f64d43ff0c18 | 3238 | |
mbed_official | 146:f64d43ff0c18 | 3239 | #ifndef __LANGUAGE_ASM__ |
mbed_official | 146:f64d43ff0c18 | 3240 | //! @brief Read current value of the USB_ENDPTn_EPTXEN field. |
mbed_official | 146:f64d43ff0c18 | 3241 | #define BR_USB_ENDPTn_EPTXEN(n) (BITBAND_ACCESS8(HW_USB_ENDPTn_ADDR(n), BP_USB_ENDPTn_EPTXEN)) |
mbed_official | 146:f64d43ff0c18 | 3242 | #endif |
mbed_official | 146:f64d43ff0c18 | 3243 | |
mbed_official | 146:f64d43ff0c18 | 3244 | //! @brief Format value for bitfield USB_ENDPTn_EPTXEN. |
mbed_official | 146:f64d43ff0c18 | 3245 | #define BF_USB_ENDPTn_EPTXEN(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint8_t) << BP_USB_ENDPTn_EPTXEN), uint8_t) & BM_USB_ENDPTn_EPTXEN) |
mbed_official | 146:f64d43ff0c18 | 3246 | |
mbed_official | 146:f64d43ff0c18 | 3247 | #ifndef __LANGUAGE_ASM__ |
mbed_official | 146:f64d43ff0c18 | 3248 | //! @brief Set the EPTXEN field to a new value. |
mbed_official | 146:f64d43ff0c18 | 3249 | #define BW_USB_ENDPTn_EPTXEN(n, v) (BITBAND_ACCESS8(HW_USB_ENDPTn_ADDR(n), BP_USB_ENDPTn_EPTXEN) = (v)) |
mbed_official | 146:f64d43ff0c18 | 3250 | #endif |
mbed_official | 146:f64d43ff0c18 | 3251 | //@} |
mbed_official | 146:f64d43ff0c18 | 3252 | |
mbed_official | 146:f64d43ff0c18 | 3253 | /*! |
mbed_official | 146:f64d43ff0c18 | 3254 | * @name Register USB_ENDPTn, field EPRXEN[3] (RW) |
mbed_official | 146:f64d43ff0c18 | 3255 | * |
mbed_official | 146:f64d43ff0c18 | 3256 | * This bit, when set, enables the endpoint for RX transfers. |
mbed_official | 146:f64d43ff0c18 | 3257 | */ |
mbed_official | 146:f64d43ff0c18 | 3258 | //@{ |
mbed_official | 146:f64d43ff0c18 | 3259 | #define BP_USB_ENDPTn_EPRXEN (3U) //!< Bit position for USB_ENDPTn_EPRXEN. |
mbed_official | 146:f64d43ff0c18 | 3260 | #define BM_USB_ENDPTn_EPRXEN (0x08U) //!< Bit mask for USB_ENDPTn_EPRXEN. |
mbed_official | 146:f64d43ff0c18 | 3261 | #define BS_USB_ENDPTn_EPRXEN (1U) //!< Bit field size in bits for USB_ENDPTn_EPRXEN. |
mbed_official | 146:f64d43ff0c18 | 3262 | |
mbed_official | 146:f64d43ff0c18 | 3263 | #ifndef __LANGUAGE_ASM__ |
mbed_official | 146:f64d43ff0c18 | 3264 | //! @brief Read current value of the USB_ENDPTn_EPRXEN field. |
mbed_official | 146:f64d43ff0c18 | 3265 | #define BR_USB_ENDPTn_EPRXEN(n) (BITBAND_ACCESS8(HW_USB_ENDPTn_ADDR(n), BP_USB_ENDPTn_EPRXEN)) |
mbed_official | 146:f64d43ff0c18 | 3266 | #endif |
mbed_official | 146:f64d43ff0c18 | 3267 | |
mbed_official | 146:f64d43ff0c18 | 3268 | //! @brief Format value for bitfield USB_ENDPTn_EPRXEN. |
mbed_official | 146:f64d43ff0c18 | 3269 | #define BF_USB_ENDPTn_EPRXEN(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint8_t) << BP_USB_ENDPTn_EPRXEN), uint8_t) & BM_USB_ENDPTn_EPRXEN) |
mbed_official | 146:f64d43ff0c18 | 3270 | |
mbed_official | 146:f64d43ff0c18 | 3271 | #ifndef __LANGUAGE_ASM__ |
mbed_official | 146:f64d43ff0c18 | 3272 | //! @brief Set the EPRXEN field to a new value. |
mbed_official | 146:f64d43ff0c18 | 3273 | #define BW_USB_ENDPTn_EPRXEN(n, v) (BITBAND_ACCESS8(HW_USB_ENDPTn_ADDR(n), BP_USB_ENDPTn_EPRXEN) = (v)) |
mbed_official | 146:f64d43ff0c18 | 3274 | #endif |
mbed_official | 146:f64d43ff0c18 | 3275 | //@} |
mbed_official | 146:f64d43ff0c18 | 3276 | |
mbed_official | 146:f64d43ff0c18 | 3277 | /*! |
mbed_official | 146:f64d43ff0c18 | 3278 | * @name Register USB_ENDPTn, field EPCTLDIS[4] (RW) |
mbed_official | 146:f64d43ff0c18 | 3279 | * |
mbed_official | 146:f64d43ff0c18 | 3280 | * This bit, when set, disables control (SETUP) transfers. When cleared, control |
mbed_official | 146:f64d43ff0c18 | 3281 | * transfers are enabled. This applies if and only if the EPRXEN and EPTXEN bits |
mbed_official | 146:f64d43ff0c18 | 3282 | * are also set. |
mbed_official | 146:f64d43ff0c18 | 3283 | */ |
mbed_official | 146:f64d43ff0c18 | 3284 | //@{ |
mbed_official | 146:f64d43ff0c18 | 3285 | #define BP_USB_ENDPTn_EPCTLDIS (4U) //!< Bit position for USB_ENDPTn_EPCTLDIS. |
mbed_official | 146:f64d43ff0c18 | 3286 | #define BM_USB_ENDPTn_EPCTLDIS (0x10U) //!< Bit mask for USB_ENDPTn_EPCTLDIS. |
mbed_official | 146:f64d43ff0c18 | 3287 | #define BS_USB_ENDPTn_EPCTLDIS (1U) //!< Bit field size in bits for USB_ENDPTn_EPCTLDIS. |
mbed_official | 146:f64d43ff0c18 | 3288 | |
mbed_official | 146:f64d43ff0c18 | 3289 | #ifndef __LANGUAGE_ASM__ |
mbed_official | 146:f64d43ff0c18 | 3290 | //! @brief Read current value of the USB_ENDPTn_EPCTLDIS field. |
mbed_official | 146:f64d43ff0c18 | 3291 | #define BR_USB_ENDPTn_EPCTLDIS(n) (BITBAND_ACCESS8(HW_USB_ENDPTn_ADDR(n), BP_USB_ENDPTn_EPCTLDIS)) |
mbed_official | 146:f64d43ff0c18 | 3292 | #endif |
mbed_official | 146:f64d43ff0c18 | 3293 | |
mbed_official | 146:f64d43ff0c18 | 3294 | //! @brief Format value for bitfield USB_ENDPTn_EPCTLDIS. |
mbed_official | 146:f64d43ff0c18 | 3295 | #define BF_USB_ENDPTn_EPCTLDIS(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint8_t) << BP_USB_ENDPTn_EPCTLDIS), uint8_t) & BM_USB_ENDPTn_EPCTLDIS) |
mbed_official | 146:f64d43ff0c18 | 3296 | |
mbed_official | 146:f64d43ff0c18 | 3297 | #ifndef __LANGUAGE_ASM__ |
mbed_official | 146:f64d43ff0c18 | 3298 | //! @brief Set the EPCTLDIS field to a new value. |
mbed_official | 146:f64d43ff0c18 | 3299 | #define BW_USB_ENDPTn_EPCTLDIS(n, v) (BITBAND_ACCESS8(HW_USB_ENDPTn_ADDR(n), BP_USB_ENDPTn_EPCTLDIS) = (v)) |
mbed_official | 146:f64d43ff0c18 | 3300 | #endif |
mbed_official | 146:f64d43ff0c18 | 3301 | //@} |
mbed_official | 146:f64d43ff0c18 | 3302 | |
mbed_official | 146:f64d43ff0c18 | 3303 | /*! |
mbed_official | 146:f64d43ff0c18 | 3304 | * @name Register USB_ENDPTn, field RETRYDIS[6] (RW) |
mbed_official | 146:f64d43ff0c18 | 3305 | * |
mbed_official | 146:f64d43ff0c18 | 3306 | * This is a Host mode only bit and is present in the control register for |
mbed_official | 146:f64d43ff0c18 | 3307 | * endpoint 0 (ENDPT0) only. When set this bit causes the host to not retry NAK'ed |
mbed_official | 146:f64d43ff0c18 | 3308 | * (Negative Acknowledgement) transactions. When a transaction is NAKed, the BDT PID |
mbed_official | 146:f64d43ff0c18 | 3309 | * field is updated with the NAK PID, and the TOKEN_DNE interrupt is set. When |
mbed_official | 146:f64d43ff0c18 | 3310 | * this bit is cleared, NAKed transactions are retried in hardware. This bit must |
mbed_official | 146:f64d43ff0c18 | 3311 | * be set when the host is attempting to poll an interrupt endpoint. |
mbed_official | 146:f64d43ff0c18 | 3312 | */ |
mbed_official | 146:f64d43ff0c18 | 3313 | //@{ |
mbed_official | 146:f64d43ff0c18 | 3314 | #define BP_USB_ENDPTn_RETRYDIS (6U) //!< Bit position for USB_ENDPTn_RETRYDIS. |
mbed_official | 146:f64d43ff0c18 | 3315 | #define BM_USB_ENDPTn_RETRYDIS (0x40U) //!< Bit mask for USB_ENDPTn_RETRYDIS. |
mbed_official | 146:f64d43ff0c18 | 3316 | #define BS_USB_ENDPTn_RETRYDIS (1U) //!< Bit field size in bits for USB_ENDPTn_RETRYDIS. |
mbed_official | 146:f64d43ff0c18 | 3317 | |
mbed_official | 146:f64d43ff0c18 | 3318 | #ifndef __LANGUAGE_ASM__ |
mbed_official | 146:f64d43ff0c18 | 3319 | //! @brief Read current value of the USB_ENDPTn_RETRYDIS field. |
mbed_official | 146:f64d43ff0c18 | 3320 | #define BR_USB_ENDPTn_RETRYDIS(n) (BITBAND_ACCESS8(HW_USB_ENDPTn_ADDR(n), BP_USB_ENDPTn_RETRYDIS)) |
mbed_official | 146:f64d43ff0c18 | 3321 | #endif |
mbed_official | 146:f64d43ff0c18 | 3322 | |
mbed_official | 146:f64d43ff0c18 | 3323 | //! @brief Format value for bitfield USB_ENDPTn_RETRYDIS. |
mbed_official | 146:f64d43ff0c18 | 3324 | #define BF_USB_ENDPTn_RETRYDIS(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint8_t) << BP_USB_ENDPTn_RETRYDIS), uint8_t) & BM_USB_ENDPTn_RETRYDIS) |
mbed_official | 146:f64d43ff0c18 | 3325 | |
mbed_official | 146:f64d43ff0c18 | 3326 | #ifndef __LANGUAGE_ASM__ |
mbed_official | 146:f64d43ff0c18 | 3327 | //! @brief Set the RETRYDIS field to a new value. |
mbed_official | 146:f64d43ff0c18 | 3328 | #define BW_USB_ENDPTn_RETRYDIS(n, v) (BITBAND_ACCESS8(HW_USB_ENDPTn_ADDR(n), BP_USB_ENDPTn_RETRYDIS) = (v)) |
mbed_official | 146:f64d43ff0c18 | 3329 | #endif |
mbed_official | 146:f64d43ff0c18 | 3330 | //@} |
mbed_official | 146:f64d43ff0c18 | 3331 | |
mbed_official | 146:f64d43ff0c18 | 3332 | /*! |
mbed_official | 146:f64d43ff0c18 | 3333 | * @name Register USB_ENDPTn, field HOSTWOHUB[7] (RW) |
mbed_official | 146:f64d43ff0c18 | 3334 | * |
mbed_official | 146:f64d43ff0c18 | 3335 | * This is a Host mode only field and is present in the control register for |
mbed_official | 146:f64d43ff0c18 | 3336 | * endpoint 0 (ENDPT0) only. When set this bit allows the host to communicate to a |
mbed_official | 146:f64d43ff0c18 | 3337 | * directly connected low speed device. When cleared, the host produces the |
mbed_official | 146:f64d43ff0c18 | 3338 | * PRE_PID. It then switches to low-speed signaling when sending a token to a low speed |
mbed_official | 146:f64d43ff0c18 | 3339 | * device as required to communicate with a low speed device through a hub. |
mbed_official | 146:f64d43ff0c18 | 3340 | */ |
mbed_official | 146:f64d43ff0c18 | 3341 | //@{ |
mbed_official | 146:f64d43ff0c18 | 3342 | #define BP_USB_ENDPTn_HOSTWOHUB (7U) //!< Bit position for USB_ENDPTn_HOSTWOHUB. |
mbed_official | 146:f64d43ff0c18 | 3343 | #define BM_USB_ENDPTn_HOSTWOHUB (0x80U) //!< Bit mask for USB_ENDPTn_HOSTWOHUB. |
mbed_official | 146:f64d43ff0c18 | 3344 | #define BS_USB_ENDPTn_HOSTWOHUB (1U) //!< Bit field size in bits for USB_ENDPTn_HOSTWOHUB. |
mbed_official | 146:f64d43ff0c18 | 3345 | |
mbed_official | 146:f64d43ff0c18 | 3346 | #ifndef __LANGUAGE_ASM__ |
mbed_official | 146:f64d43ff0c18 | 3347 | //! @brief Read current value of the USB_ENDPTn_HOSTWOHUB field. |
mbed_official | 146:f64d43ff0c18 | 3348 | #define BR_USB_ENDPTn_HOSTWOHUB(n) (BITBAND_ACCESS8(HW_USB_ENDPTn_ADDR(n), BP_USB_ENDPTn_HOSTWOHUB)) |
mbed_official | 146:f64d43ff0c18 | 3349 | #endif |
mbed_official | 146:f64d43ff0c18 | 3350 | |
mbed_official | 146:f64d43ff0c18 | 3351 | //! @brief Format value for bitfield USB_ENDPTn_HOSTWOHUB. |
mbed_official | 146:f64d43ff0c18 | 3352 | #define BF_USB_ENDPTn_HOSTWOHUB(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint8_t) << BP_USB_ENDPTn_HOSTWOHUB), uint8_t) & BM_USB_ENDPTn_HOSTWOHUB) |
mbed_official | 146:f64d43ff0c18 | 3353 | |
mbed_official | 146:f64d43ff0c18 | 3354 | #ifndef __LANGUAGE_ASM__ |
mbed_official | 146:f64d43ff0c18 | 3355 | //! @brief Set the HOSTWOHUB field to a new value. |
mbed_official | 146:f64d43ff0c18 | 3356 | #define BW_USB_ENDPTn_HOSTWOHUB(n, v) (BITBAND_ACCESS8(HW_USB_ENDPTn_ADDR(n), BP_USB_ENDPTn_HOSTWOHUB) = (v)) |
mbed_official | 146:f64d43ff0c18 | 3357 | #endif |
mbed_official | 146:f64d43ff0c18 | 3358 | //@} |
mbed_official | 146:f64d43ff0c18 | 3359 | |
mbed_official | 146:f64d43ff0c18 | 3360 | //------------------------------------------------------------------------------------------- |
mbed_official | 146:f64d43ff0c18 | 3361 | // HW_USB_USBCTRL - USB Control register |
mbed_official | 146:f64d43ff0c18 | 3362 | //------------------------------------------------------------------------------------------- |
mbed_official | 146:f64d43ff0c18 | 3363 | |
mbed_official | 146:f64d43ff0c18 | 3364 | #ifndef __LANGUAGE_ASM__ |
mbed_official | 146:f64d43ff0c18 | 3365 | /*! |
mbed_official | 146:f64d43ff0c18 | 3366 | * @brief HW_USB_USBCTRL - USB Control register (RW) |
mbed_official | 146:f64d43ff0c18 | 3367 | * |
mbed_official | 146:f64d43ff0c18 | 3368 | * Reset value: 0xC0U |
mbed_official | 146:f64d43ff0c18 | 3369 | */ |
mbed_official | 146:f64d43ff0c18 | 3370 | typedef union _hw_usb_usbctrl |
mbed_official | 146:f64d43ff0c18 | 3371 | { |
mbed_official | 146:f64d43ff0c18 | 3372 | uint8_t U; |
mbed_official | 146:f64d43ff0c18 | 3373 | struct _hw_usb_usbctrl_bitfields |
mbed_official | 146:f64d43ff0c18 | 3374 | { |
mbed_official | 146:f64d43ff0c18 | 3375 | uint8_t RESERVED0 : 6; //!< [5:0] |
mbed_official | 146:f64d43ff0c18 | 3376 | uint8_t PDE : 1; //!< [6] |
mbed_official | 146:f64d43ff0c18 | 3377 | uint8_t SUSP : 1; //!< [7] |
mbed_official | 146:f64d43ff0c18 | 3378 | } B; |
mbed_official | 146:f64d43ff0c18 | 3379 | } hw_usb_usbctrl_t; |
mbed_official | 146:f64d43ff0c18 | 3380 | #endif |
mbed_official | 146:f64d43ff0c18 | 3381 | |
mbed_official | 146:f64d43ff0c18 | 3382 | /*! |
mbed_official | 146:f64d43ff0c18 | 3383 | * @name Constants and macros for entire USB_USBCTRL register |
mbed_official | 146:f64d43ff0c18 | 3384 | */ |
mbed_official | 146:f64d43ff0c18 | 3385 | //@{ |
mbed_official | 146:f64d43ff0c18 | 3386 | #define HW_USB_USBCTRL_ADDR (REGS_USB_BASE + 0x100U) |
mbed_official | 146:f64d43ff0c18 | 3387 | |
mbed_official | 146:f64d43ff0c18 | 3388 | #ifndef __LANGUAGE_ASM__ |
mbed_official | 146:f64d43ff0c18 | 3389 | #define HW_USB_USBCTRL (*(__IO hw_usb_usbctrl_t *) HW_USB_USBCTRL_ADDR) |
mbed_official | 146:f64d43ff0c18 | 3390 | #define HW_USB_USBCTRL_RD() (HW_USB_USBCTRL.U) |
mbed_official | 146:f64d43ff0c18 | 3391 | #define HW_USB_USBCTRL_WR(v) (HW_USB_USBCTRL.U = (v)) |
mbed_official | 146:f64d43ff0c18 | 3392 | #define HW_USB_USBCTRL_SET(v) (HW_USB_USBCTRL_WR(HW_USB_USBCTRL_RD() | (v))) |
mbed_official | 146:f64d43ff0c18 | 3393 | #define HW_USB_USBCTRL_CLR(v) (HW_USB_USBCTRL_WR(HW_USB_USBCTRL_RD() & ~(v))) |
mbed_official | 146:f64d43ff0c18 | 3394 | #define HW_USB_USBCTRL_TOG(v) (HW_USB_USBCTRL_WR(HW_USB_USBCTRL_RD() ^ (v))) |
mbed_official | 146:f64d43ff0c18 | 3395 | #endif |
mbed_official | 146:f64d43ff0c18 | 3396 | //@} |
mbed_official | 146:f64d43ff0c18 | 3397 | |
mbed_official | 146:f64d43ff0c18 | 3398 | /* |
mbed_official | 146:f64d43ff0c18 | 3399 | * Constants & macros for individual USB_USBCTRL bitfields |
mbed_official | 146:f64d43ff0c18 | 3400 | */ |
mbed_official | 146:f64d43ff0c18 | 3401 | |
mbed_official | 146:f64d43ff0c18 | 3402 | /*! |
mbed_official | 146:f64d43ff0c18 | 3403 | * @name Register USB_USBCTRL, field PDE[6] (RW) |
mbed_official | 146:f64d43ff0c18 | 3404 | * |
mbed_official | 146:f64d43ff0c18 | 3405 | * Enables the weak pulldowns on the USB transceiver. |
mbed_official | 146:f64d43ff0c18 | 3406 | * |
mbed_official | 146:f64d43ff0c18 | 3407 | * Values: |
mbed_official | 146:f64d43ff0c18 | 3408 | * - 0 - Weak pulldowns are disabled on D+ and D-. |
mbed_official | 146:f64d43ff0c18 | 3409 | * - 1 - Weak pulldowns are enabled on D+ and D-. |
mbed_official | 146:f64d43ff0c18 | 3410 | */ |
mbed_official | 146:f64d43ff0c18 | 3411 | //@{ |
mbed_official | 146:f64d43ff0c18 | 3412 | #define BP_USB_USBCTRL_PDE (6U) //!< Bit position for USB_USBCTRL_PDE. |
mbed_official | 146:f64d43ff0c18 | 3413 | #define BM_USB_USBCTRL_PDE (0x40U) //!< Bit mask for USB_USBCTRL_PDE. |
mbed_official | 146:f64d43ff0c18 | 3414 | #define BS_USB_USBCTRL_PDE (1U) //!< Bit field size in bits for USB_USBCTRL_PDE. |
mbed_official | 146:f64d43ff0c18 | 3415 | |
mbed_official | 146:f64d43ff0c18 | 3416 | #ifndef __LANGUAGE_ASM__ |
mbed_official | 146:f64d43ff0c18 | 3417 | //! @brief Read current value of the USB_USBCTRL_PDE field. |
mbed_official | 146:f64d43ff0c18 | 3418 | #define BR_USB_USBCTRL_PDE (BITBAND_ACCESS8(HW_USB_USBCTRL_ADDR, BP_USB_USBCTRL_PDE)) |
mbed_official | 146:f64d43ff0c18 | 3419 | #endif |
mbed_official | 146:f64d43ff0c18 | 3420 | |
mbed_official | 146:f64d43ff0c18 | 3421 | //! @brief Format value for bitfield USB_USBCTRL_PDE. |
mbed_official | 146:f64d43ff0c18 | 3422 | #define BF_USB_USBCTRL_PDE(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint8_t) << BP_USB_USBCTRL_PDE), uint8_t) & BM_USB_USBCTRL_PDE) |
mbed_official | 146:f64d43ff0c18 | 3423 | |
mbed_official | 146:f64d43ff0c18 | 3424 | #ifndef __LANGUAGE_ASM__ |
mbed_official | 146:f64d43ff0c18 | 3425 | //! @brief Set the PDE field to a new value. |
mbed_official | 146:f64d43ff0c18 | 3426 | #define BW_USB_USBCTRL_PDE(v) (BITBAND_ACCESS8(HW_USB_USBCTRL_ADDR, BP_USB_USBCTRL_PDE) = (v)) |
mbed_official | 146:f64d43ff0c18 | 3427 | #endif |
mbed_official | 146:f64d43ff0c18 | 3428 | //@} |
mbed_official | 146:f64d43ff0c18 | 3429 | |
mbed_official | 146:f64d43ff0c18 | 3430 | /*! |
mbed_official | 146:f64d43ff0c18 | 3431 | * @name Register USB_USBCTRL, field SUSP[7] (RW) |
mbed_official | 146:f64d43ff0c18 | 3432 | * |
mbed_official | 146:f64d43ff0c18 | 3433 | * Places the USB transceiver into the suspend state. |
mbed_official | 146:f64d43ff0c18 | 3434 | * |
mbed_official | 146:f64d43ff0c18 | 3435 | * Values: |
mbed_official | 146:f64d43ff0c18 | 3436 | * - 0 - USB transceiver is not in suspend state. |
mbed_official | 146:f64d43ff0c18 | 3437 | * - 1 - USB transceiver is in suspend state. |
mbed_official | 146:f64d43ff0c18 | 3438 | */ |
mbed_official | 146:f64d43ff0c18 | 3439 | //@{ |
mbed_official | 146:f64d43ff0c18 | 3440 | #define BP_USB_USBCTRL_SUSP (7U) //!< Bit position for USB_USBCTRL_SUSP. |
mbed_official | 146:f64d43ff0c18 | 3441 | #define BM_USB_USBCTRL_SUSP (0x80U) //!< Bit mask for USB_USBCTRL_SUSP. |
mbed_official | 146:f64d43ff0c18 | 3442 | #define BS_USB_USBCTRL_SUSP (1U) //!< Bit field size in bits for USB_USBCTRL_SUSP. |
mbed_official | 146:f64d43ff0c18 | 3443 | |
mbed_official | 146:f64d43ff0c18 | 3444 | #ifndef __LANGUAGE_ASM__ |
mbed_official | 146:f64d43ff0c18 | 3445 | //! @brief Read current value of the USB_USBCTRL_SUSP field. |
mbed_official | 146:f64d43ff0c18 | 3446 | #define BR_USB_USBCTRL_SUSP (BITBAND_ACCESS8(HW_USB_USBCTRL_ADDR, BP_USB_USBCTRL_SUSP)) |
mbed_official | 146:f64d43ff0c18 | 3447 | #endif |
mbed_official | 146:f64d43ff0c18 | 3448 | |
mbed_official | 146:f64d43ff0c18 | 3449 | //! @brief Format value for bitfield USB_USBCTRL_SUSP. |
mbed_official | 146:f64d43ff0c18 | 3450 | #define BF_USB_USBCTRL_SUSP(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint8_t) << BP_USB_USBCTRL_SUSP), uint8_t) & BM_USB_USBCTRL_SUSP) |
mbed_official | 146:f64d43ff0c18 | 3451 | |
mbed_official | 146:f64d43ff0c18 | 3452 | #ifndef __LANGUAGE_ASM__ |
mbed_official | 146:f64d43ff0c18 | 3453 | //! @brief Set the SUSP field to a new value. |
mbed_official | 146:f64d43ff0c18 | 3454 | #define BW_USB_USBCTRL_SUSP(v) (BITBAND_ACCESS8(HW_USB_USBCTRL_ADDR, BP_USB_USBCTRL_SUSP) = (v)) |
mbed_official | 146:f64d43ff0c18 | 3455 | #endif |
mbed_official | 146:f64d43ff0c18 | 3456 | //@} |
mbed_official | 146:f64d43ff0c18 | 3457 | |
mbed_official | 146:f64d43ff0c18 | 3458 | //------------------------------------------------------------------------------------------- |
mbed_official | 146:f64d43ff0c18 | 3459 | // HW_USB_OBSERVE - USB OTG Observe register |
mbed_official | 146:f64d43ff0c18 | 3460 | //------------------------------------------------------------------------------------------- |
mbed_official | 146:f64d43ff0c18 | 3461 | |
mbed_official | 146:f64d43ff0c18 | 3462 | #ifndef __LANGUAGE_ASM__ |
mbed_official | 146:f64d43ff0c18 | 3463 | /*! |
mbed_official | 146:f64d43ff0c18 | 3464 | * @brief HW_USB_OBSERVE - USB OTG Observe register (RO) |
mbed_official | 146:f64d43ff0c18 | 3465 | * |
mbed_official | 146:f64d43ff0c18 | 3466 | * Reset value: 0x50U |
mbed_official | 146:f64d43ff0c18 | 3467 | * |
mbed_official | 146:f64d43ff0c18 | 3468 | * Provides visibility on the state of the pull-ups and pull-downs at the |
mbed_official | 146:f64d43ff0c18 | 3469 | * transceiver. Useful when interfacing to an external OTG control module via a serial |
mbed_official | 146:f64d43ff0c18 | 3470 | * interface. |
mbed_official | 146:f64d43ff0c18 | 3471 | */ |
mbed_official | 146:f64d43ff0c18 | 3472 | typedef union _hw_usb_observe |
mbed_official | 146:f64d43ff0c18 | 3473 | { |
mbed_official | 146:f64d43ff0c18 | 3474 | uint8_t U; |
mbed_official | 146:f64d43ff0c18 | 3475 | struct _hw_usb_observe_bitfields |
mbed_official | 146:f64d43ff0c18 | 3476 | { |
mbed_official | 146:f64d43ff0c18 | 3477 | uint8_t RESERVED0 : 4; //!< [3:0] |
mbed_official | 146:f64d43ff0c18 | 3478 | uint8_t DMPD : 1; //!< [4] |
mbed_official | 146:f64d43ff0c18 | 3479 | uint8_t RESERVED1 : 1; //!< [5] |
mbed_official | 146:f64d43ff0c18 | 3480 | uint8_t DPPD : 1; //!< [6] |
mbed_official | 146:f64d43ff0c18 | 3481 | uint8_t DPPU : 1; //!< [7] |
mbed_official | 146:f64d43ff0c18 | 3482 | } B; |
mbed_official | 146:f64d43ff0c18 | 3483 | } hw_usb_observe_t; |
mbed_official | 146:f64d43ff0c18 | 3484 | #endif |
mbed_official | 146:f64d43ff0c18 | 3485 | |
mbed_official | 146:f64d43ff0c18 | 3486 | /*! |
mbed_official | 146:f64d43ff0c18 | 3487 | * @name Constants and macros for entire USB_OBSERVE register |
mbed_official | 146:f64d43ff0c18 | 3488 | */ |
mbed_official | 146:f64d43ff0c18 | 3489 | //@{ |
mbed_official | 146:f64d43ff0c18 | 3490 | #define HW_USB_OBSERVE_ADDR (REGS_USB_BASE + 0x104U) |
mbed_official | 146:f64d43ff0c18 | 3491 | |
mbed_official | 146:f64d43ff0c18 | 3492 | #ifndef __LANGUAGE_ASM__ |
mbed_official | 146:f64d43ff0c18 | 3493 | #define HW_USB_OBSERVE (*(__I hw_usb_observe_t *) HW_USB_OBSERVE_ADDR) |
mbed_official | 146:f64d43ff0c18 | 3494 | #define HW_USB_OBSERVE_RD() (HW_USB_OBSERVE.U) |
mbed_official | 146:f64d43ff0c18 | 3495 | #endif |
mbed_official | 146:f64d43ff0c18 | 3496 | //@} |
mbed_official | 146:f64d43ff0c18 | 3497 | |
mbed_official | 146:f64d43ff0c18 | 3498 | /* |
mbed_official | 146:f64d43ff0c18 | 3499 | * Constants & macros for individual USB_OBSERVE bitfields |
mbed_official | 146:f64d43ff0c18 | 3500 | */ |
mbed_official | 146:f64d43ff0c18 | 3501 | |
mbed_official | 146:f64d43ff0c18 | 3502 | /*! |
mbed_official | 146:f64d43ff0c18 | 3503 | * @name Register USB_OBSERVE, field DMPD[4] (RO) |
mbed_official | 146:f64d43ff0c18 | 3504 | * |
mbed_official | 146:f64d43ff0c18 | 3505 | * Provides observability of the D- Pulldown enable at the USB transceiver. |
mbed_official | 146:f64d43ff0c18 | 3506 | * |
mbed_official | 146:f64d43ff0c18 | 3507 | * Values: |
mbed_official | 146:f64d43ff0c18 | 3508 | * - 0 - D- pulldown disabled. |
mbed_official | 146:f64d43ff0c18 | 3509 | * - 1 - D- pulldown enabled. |
mbed_official | 146:f64d43ff0c18 | 3510 | */ |
mbed_official | 146:f64d43ff0c18 | 3511 | //@{ |
mbed_official | 146:f64d43ff0c18 | 3512 | #define BP_USB_OBSERVE_DMPD (4U) //!< Bit position for USB_OBSERVE_DMPD. |
mbed_official | 146:f64d43ff0c18 | 3513 | #define BM_USB_OBSERVE_DMPD (0x10U) //!< Bit mask for USB_OBSERVE_DMPD. |
mbed_official | 146:f64d43ff0c18 | 3514 | #define BS_USB_OBSERVE_DMPD (1U) //!< Bit field size in bits for USB_OBSERVE_DMPD. |
mbed_official | 146:f64d43ff0c18 | 3515 | |
mbed_official | 146:f64d43ff0c18 | 3516 | #ifndef __LANGUAGE_ASM__ |
mbed_official | 146:f64d43ff0c18 | 3517 | //! @brief Read current value of the USB_OBSERVE_DMPD field. |
mbed_official | 146:f64d43ff0c18 | 3518 | #define BR_USB_OBSERVE_DMPD (BITBAND_ACCESS8(HW_USB_OBSERVE_ADDR, BP_USB_OBSERVE_DMPD)) |
mbed_official | 146:f64d43ff0c18 | 3519 | #endif |
mbed_official | 146:f64d43ff0c18 | 3520 | //@} |
mbed_official | 146:f64d43ff0c18 | 3521 | |
mbed_official | 146:f64d43ff0c18 | 3522 | /*! |
mbed_official | 146:f64d43ff0c18 | 3523 | * @name Register USB_OBSERVE, field DPPD[6] (RO) |
mbed_official | 146:f64d43ff0c18 | 3524 | * |
mbed_official | 146:f64d43ff0c18 | 3525 | * Provides observability of the D+ Pulldown enable at the USB transceiver. |
mbed_official | 146:f64d43ff0c18 | 3526 | * |
mbed_official | 146:f64d43ff0c18 | 3527 | * Values: |
mbed_official | 146:f64d43ff0c18 | 3528 | * - 0 - D+ pulldown disabled. |
mbed_official | 146:f64d43ff0c18 | 3529 | * - 1 - D+ pulldown enabled. |
mbed_official | 146:f64d43ff0c18 | 3530 | */ |
mbed_official | 146:f64d43ff0c18 | 3531 | //@{ |
mbed_official | 146:f64d43ff0c18 | 3532 | #define BP_USB_OBSERVE_DPPD (6U) //!< Bit position for USB_OBSERVE_DPPD. |
mbed_official | 146:f64d43ff0c18 | 3533 | #define BM_USB_OBSERVE_DPPD (0x40U) //!< Bit mask for USB_OBSERVE_DPPD. |
mbed_official | 146:f64d43ff0c18 | 3534 | #define BS_USB_OBSERVE_DPPD (1U) //!< Bit field size in bits for USB_OBSERVE_DPPD. |
mbed_official | 146:f64d43ff0c18 | 3535 | |
mbed_official | 146:f64d43ff0c18 | 3536 | #ifndef __LANGUAGE_ASM__ |
mbed_official | 146:f64d43ff0c18 | 3537 | //! @brief Read current value of the USB_OBSERVE_DPPD field. |
mbed_official | 146:f64d43ff0c18 | 3538 | #define BR_USB_OBSERVE_DPPD (BITBAND_ACCESS8(HW_USB_OBSERVE_ADDR, BP_USB_OBSERVE_DPPD)) |
mbed_official | 146:f64d43ff0c18 | 3539 | #endif |
mbed_official | 146:f64d43ff0c18 | 3540 | //@} |
mbed_official | 146:f64d43ff0c18 | 3541 | |
mbed_official | 146:f64d43ff0c18 | 3542 | /*! |
mbed_official | 146:f64d43ff0c18 | 3543 | * @name Register USB_OBSERVE, field DPPU[7] (RO) |
mbed_official | 146:f64d43ff0c18 | 3544 | * |
mbed_official | 146:f64d43ff0c18 | 3545 | * Provides observability of the D+ Pullup enable at the USB transceiver. |
mbed_official | 146:f64d43ff0c18 | 3546 | * |
mbed_official | 146:f64d43ff0c18 | 3547 | * Values: |
mbed_official | 146:f64d43ff0c18 | 3548 | * - 0 - D+ pullup disabled. |
mbed_official | 146:f64d43ff0c18 | 3549 | * - 1 - D+ pullup enabled. |
mbed_official | 146:f64d43ff0c18 | 3550 | */ |
mbed_official | 146:f64d43ff0c18 | 3551 | //@{ |
mbed_official | 146:f64d43ff0c18 | 3552 | #define BP_USB_OBSERVE_DPPU (7U) //!< Bit position for USB_OBSERVE_DPPU. |
mbed_official | 146:f64d43ff0c18 | 3553 | #define BM_USB_OBSERVE_DPPU (0x80U) //!< Bit mask for USB_OBSERVE_DPPU. |
mbed_official | 146:f64d43ff0c18 | 3554 | #define BS_USB_OBSERVE_DPPU (1U) //!< Bit field size in bits for USB_OBSERVE_DPPU. |
mbed_official | 146:f64d43ff0c18 | 3555 | |
mbed_official | 146:f64d43ff0c18 | 3556 | #ifndef __LANGUAGE_ASM__ |
mbed_official | 146:f64d43ff0c18 | 3557 | //! @brief Read current value of the USB_OBSERVE_DPPU field. |
mbed_official | 146:f64d43ff0c18 | 3558 | #define BR_USB_OBSERVE_DPPU (BITBAND_ACCESS8(HW_USB_OBSERVE_ADDR, BP_USB_OBSERVE_DPPU)) |
mbed_official | 146:f64d43ff0c18 | 3559 | #endif |
mbed_official | 146:f64d43ff0c18 | 3560 | //@} |
mbed_official | 146:f64d43ff0c18 | 3561 | |
mbed_official | 146:f64d43ff0c18 | 3562 | //------------------------------------------------------------------------------------------- |
mbed_official | 146:f64d43ff0c18 | 3563 | // HW_USB_CONTROL - USB OTG Control register |
mbed_official | 146:f64d43ff0c18 | 3564 | //------------------------------------------------------------------------------------------- |
mbed_official | 146:f64d43ff0c18 | 3565 | |
mbed_official | 146:f64d43ff0c18 | 3566 | #ifndef __LANGUAGE_ASM__ |
mbed_official | 146:f64d43ff0c18 | 3567 | /*! |
mbed_official | 146:f64d43ff0c18 | 3568 | * @brief HW_USB_CONTROL - USB OTG Control register (RW) |
mbed_official | 146:f64d43ff0c18 | 3569 | * |
mbed_official | 146:f64d43ff0c18 | 3570 | * Reset value: 0x00U |
mbed_official | 146:f64d43ff0c18 | 3571 | */ |
mbed_official | 146:f64d43ff0c18 | 3572 | typedef union _hw_usb_control |
mbed_official | 146:f64d43ff0c18 | 3573 | { |
mbed_official | 146:f64d43ff0c18 | 3574 | uint8_t U; |
mbed_official | 146:f64d43ff0c18 | 3575 | struct _hw_usb_control_bitfields |
mbed_official | 146:f64d43ff0c18 | 3576 | { |
mbed_official | 146:f64d43ff0c18 | 3577 | uint8_t RESERVED0 : 4; //!< [3:0] |
mbed_official | 146:f64d43ff0c18 | 3578 | uint8_t DPPULLUPNONOTG : 1; //!< [4] |
mbed_official | 146:f64d43ff0c18 | 3579 | uint8_t RESERVED1 : 3; //!< [7:5] |
mbed_official | 146:f64d43ff0c18 | 3580 | } B; |
mbed_official | 146:f64d43ff0c18 | 3581 | } hw_usb_control_t; |
mbed_official | 146:f64d43ff0c18 | 3582 | #endif |
mbed_official | 146:f64d43ff0c18 | 3583 | |
mbed_official | 146:f64d43ff0c18 | 3584 | /*! |
mbed_official | 146:f64d43ff0c18 | 3585 | * @name Constants and macros for entire USB_CONTROL register |
mbed_official | 146:f64d43ff0c18 | 3586 | */ |
mbed_official | 146:f64d43ff0c18 | 3587 | //@{ |
mbed_official | 146:f64d43ff0c18 | 3588 | #define HW_USB_CONTROL_ADDR (REGS_USB_BASE + 0x108U) |
mbed_official | 146:f64d43ff0c18 | 3589 | |
mbed_official | 146:f64d43ff0c18 | 3590 | #ifndef __LANGUAGE_ASM__ |
mbed_official | 146:f64d43ff0c18 | 3591 | #define HW_USB_CONTROL (*(__IO hw_usb_control_t *) HW_USB_CONTROL_ADDR) |
mbed_official | 146:f64d43ff0c18 | 3592 | #define HW_USB_CONTROL_RD() (HW_USB_CONTROL.U) |
mbed_official | 146:f64d43ff0c18 | 3593 | #define HW_USB_CONTROL_WR(v) (HW_USB_CONTROL.U = (v)) |
mbed_official | 146:f64d43ff0c18 | 3594 | #define HW_USB_CONTROL_SET(v) (HW_USB_CONTROL_WR(HW_USB_CONTROL_RD() | (v))) |
mbed_official | 146:f64d43ff0c18 | 3595 | #define HW_USB_CONTROL_CLR(v) (HW_USB_CONTROL_WR(HW_USB_CONTROL_RD() & ~(v))) |
mbed_official | 146:f64d43ff0c18 | 3596 | #define HW_USB_CONTROL_TOG(v) (HW_USB_CONTROL_WR(HW_USB_CONTROL_RD() ^ (v))) |
mbed_official | 146:f64d43ff0c18 | 3597 | #endif |
mbed_official | 146:f64d43ff0c18 | 3598 | //@} |
mbed_official | 146:f64d43ff0c18 | 3599 | |
mbed_official | 146:f64d43ff0c18 | 3600 | /* |
mbed_official | 146:f64d43ff0c18 | 3601 | * Constants & macros for individual USB_CONTROL bitfields |
mbed_official | 146:f64d43ff0c18 | 3602 | */ |
mbed_official | 146:f64d43ff0c18 | 3603 | |
mbed_official | 146:f64d43ff0c18 | 3604 | /*! |
mbed_official | 146:f64d43ff0c18 | 3605 | * @name Register USB_CONTROL, field DPPULLUPNONOTG[4] (RW) |
mbed_official | 146:f64d43ff0c18 | 3606 | * |
mbed_official | 146:f64d43ff0c18 | 3607 | * Provides control of the DP Pullup in USBOTG, if USB is configured in non-OTG |
mbed_official | 146:f64d43ff0c18 | 3608 | * device mode. |
mbed_official | 146:f64d43ff0c18 | 3609 | * |
mbed_official | 146:f64d43ff0c18 | 3610 | * Values: |
mbed_official | 146:f64d43ff0c18 | 3611 | * - 0 - DP Pullup in non-OTG device mode is not enabled. |
mbed_official | 146:f64d43ff0c18 | 3612 | * - 1 - DP Pullup in non-OTG device mode is enabled. |
mbed_official | 146:f64d43ff0c18 | 3613 | */ |
mbed_official | 146:f64d43ff0c18 | 3614 | //@{ |
mbed_official | 146:f64d43ff0c18 | 3615 | #define BP_USB_CONTROL_DPPULLUPNONOTG (4U) //!< Bit position for USB_CONTROL_DPPULLUPNONOTG. |
mbed_official | 146:f64d43ff0c18 | 3616 | #define BM_USB_CONTROL_DPPULLUPNONOTG (0x10U) //!< Bit mask for USB_CONTROL_DPPULLUPNONOTG. |
mbed_official | 146:f64d43ff0c18 | 3617 | #define BS_USB_CONTROL_DPPULLUPNONOTG (1U) //!< Bit field size in bits for USB_CONTROL_DPPULLUPNONOTG. |
mbed_official | 146:f64d43ff0c18 | 3618 | |
mbed_official | 146:f64d43ff0c18 | 3619 | #ifndef __LANGUAGE_ASM__ |
mbed_official | 146:f64d43ff0c18 | 3620 | //! @brief Read current value of the USB_CONTROL_DPPULLUPNONOTG field. |
mbed_official | 146:f64d43ff0c18 | 3621 | #define BR_USB_CONTROL_DPPULLUPNONOTG (BITBAND_ACCESS8(HW_USB_CONTROL_ADDR, BP_USB_CONTROL_DPPULLUPNONOTG)) |
mbed_official | 146:f64d43ff0c18 | 3622 | #endif |
mbed_official | 146:f64d43ff0c18 | 3623 | |
mbed_official | 146:f64d43ff0c18 | 3624 | //! @brief Format value for bitfield USB_CONTROL_DPPULLUPNONOTG. |
mbed_official | 146:f64d43ff0c18 | 3625 | #define BF_USB_CONTROL_DPPULLUPNONOTG(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint8_t) << BP_USB_CONTROL_DPPULLUPNONOTG), uint8_t) & BM_USB_CONTROL_DPPULLUPNONOTG) |
mbed_official | 146:f64d43ff0c18 | 3626 | |
mbed_official | 146:f64d43ff0c18 | 3627 | #ifndef __LANGUAGE_ASM__ |
mbed_official | 146:f64d43ff0c18 | 3628 | //! @brief Set the DPPULLUPNONOTG field to a new value. |
mbed_official | 146:f64d43ff0c18 | 3629 | #define BW_USB_CONTROL_DPPULLUPNONOTG(v) (BITBAND_ACCESS8(HW_USB_CONTROL_ADDR, BP_USB_CONTROL_DPPULLUPNONOTG) = (v)) |
mbed_official | 146:f64d43ff0c18 | 3630 | #endif |
mbed_official | 146:f64d43ff0c18 | 3631 | //@} |
mbed_official | 146:f64d43ff0c18 | 3632 | |
mbed_official | 146:f64d43ff0c18 | 3633 | //------------------------------------------------------------------------------------------- |
mbed_official | 146:f64d43ff0c18 | 3634 | // HW_USB_USBTRC0 - USB Transceiver Control register 0 |
mbed_official | 146:f64d43ff0c18 | 3635 | //------------------------------------------------------------------------------------------- |
mbed_official | 146:f64d43ff0c18 | 3636 | |
mbed_official | 146:f64d43ff0c18 | 3637 | #ifndef __LANGUAGE_ASM__ |
mbed_official | 146:f64d43ff0c18 | 3638 | /*! |
mbed_official | 146:f64d43ff0c18 | 3639 | * @brief HW_USB_USBTRC0 - USB Transceiver Control register 0 (RW) |
mbed_official | 146:f64d43ff0c18 | 3640 | * |
mbed_official | 146:f64d43ff0c18 | 3641 | * Reset value: 0x00U |
mbed_official | 146:f64d43ff0c18 | 3642 | * |
mbed_official | 146:f64d43ff0c18 | 3643 | * Includes signals for basic operation of the on-chip USB Full Speed |
mbed_official | 146:f64d43ff0c18 | 3644 | * transceiver and configuration of the USB data connection that are not otherwise included |
mbed_official | 146:f64d43ff0c18 | 3645 | * in the USB Full Speed controller registers. |
mbed_official | 146:f64d43ff0c18 | 3646 | */ |
mbed_official | 146:f64d43ff0c18 | 3647 | typedef union _hw_usb_usbtrc0 |
mbed_official | 146:f64d43ff0c18 | 3648 | { |
mbed_official | 146:f64d43ff0c18 | 3649 | uint8_t U; |
mbed_official | 146:f64d43ff0c18 | 3650 | struct _hw_usb_usbtrc0_bitfields |
mbed_official | 146:f64d43ff0c18 | 3651 | { |
mbed_official | 146:f64d43ff0c18 | 3652 | uint8_t USB_RESUME_INT : 1; //!< [0] USB Asynchronous Interrupt |
mbed_official | 146:f64d43ff0c18 | 3653 | uint8_t SYNC_DET : 1; //!< [1] Synchronous USB Interrupt Detect |
mbed_official | 146:f64d43ff0c18 | 3654 | uint8_t USB_CLK_RECOVERY_INT : 1; //!< [2] Combined USB Clock |
mbed_official | 146:f64d43ff0c18 | 3655 | //! Recovery interrupt status |
mbed_official | 146:f64d43ff0c18 | 3656 | uint8_t RESERVED0 : 2; //!< [4:3] |
mbed_official | 146:f64d43ff0c18 | 3657 | uint8_t USBRESMEN : 1; //!< [5] Asynchronous Resume Interrupt Enable |
mbed_official | 146:f64d43ff0c18 | 3658 | uint8_t RESERVED1 : 1; //!< [6] |
mbed_official | 146:f64d43ff0c18 | 3659 | uint8_t USBRESET : 1; //!< [7] USB Reset |
mbed_official | 146:f64d43ff0c18 | 3660 | } B; |
mbed_official | 146:f64d43ff0c18 | 3661 | } hw_usb_usbtrc0_t; |
mbed_official | 146:f64d43ff0c18 | 3662 | #endif |
mbed_official | 146:f64d43ff0c18 | 3663 | |
mbed_official | 146:f64d43ff0c18 | 3664 | /*! |
mbed_official | 146:f64d43ff0c18 | 3665 | * @name Constants and macros for entire USB_USBTRC0 register |
mbed_official | 146:f64d43ff0c18 | 3666 | */ |
mbed_official | 146:f64d43ff0c18 | 3667 | //@{ |
mbed_official | 146:f64d43ff0c18 | 3668 | #define HW_USB_USBTRC0_ADDR (REGS_USB_BASE + 0x10CU) |
mbed_official | 146:f64d43ff0c18 | 3669 | |
mbed_official | 146:f64d43ff0c18 | 3670 | #ifndef __LANGUAGE_ASM__ |
mbed_official | 146:f64d43ff0c18 | 3671 | #define HW_USB_USBTRC0 (*(__IO hw_usb_usbtrc0_t *) HW_USB_USBTRC0_ADDR) |
mbed_official | 146:f64d43ff0c18 | 3672 | #define HW_USB_USBTRC0_RD() (HW_USB_USBTRC0.U) |
mbed_official | 146:f64d43ff0c18 | 3673 | #define HW_USB_USBTRC0_WR(v) (HW_USB_USBTRC0.U = (v)) |
mbed_official | 146:f64d43ff0c18 | 3674 | #define HW_USB_USBTRC0_SET(v) (HW_USB_USBTRC0_WR(HW_USB_USBTRC0_RD() | (v))) |
mbed_official | 146:f64d43ff0c18 | 3675 | #define HW_USB_USBTRC0_CLR(v) (HW_USB_USBTRC0_WR(HW_USB_USBTRC0_RD() & ~(v))) |
mbed_official | 146:f64d43ff0c18 | 3676 | #define HW_USB_USBTRC0_TOG(v) (HW_USB_USBTRC0_WR(HW_USB_USBTRC0_RD() ^ (v))) |
mbed_official | 146:f64d43ff0c18 | 3677 | #endif |
mbed_official | 146:f64d43ff0c18 | 3678 | //@} |
mbed_official | 146:f64d43ff0c18 | 3679 | |
mbed_official | 146:f64d43ff0c18 | 3680 | /* |
mbed_official | 146:f64d43ff0c18 | 3681 | * Constants & macros for individual USB_USBTRC0 bitfields |
mbed_official | 146:f64d43ff0c18 | 3682 | */ |
mbed_official | 146:f64d43ff0c18 | 3683 | |
mbed_official | 146:f64d43ff0c18 | 3684 | /*! |
mbed_official | 146:f64d43ff0c18 | 3685 | * @name Register USB_USBTRC0, field USB_RESUME_INT[0] (RO) |
mbed_official | 146:f64d43ff0c18 | 3686 | * |
mbed_official | 146:f64d43ff0c18 | 3687 | * Values: |
mbed_official | 146:f64d43ff0c18 | 3688 | * - 0 - No interrupt was generated. |
mbed_official | 146:f64d43ff0c18 | 3689 | * - 1 - Interrupt was generated because of the USB asynchronous interrupt. |
mbed_official | 146:f64d43ff0c18 | 3690 | */ |
mbed_official | 146:f64d43ff0c18 | 3691 | //@{ |
mbed_official | 146:f64d43ff0c18 | 3692 | #define BP_USB_USBTRC0_USB_RESUME_INT (0U) //!< Bit position for USB_USBTRC0_USB_RESUME_INT. |
mbed_official | 146:f64d43ff0c18 | 3693 | #define BM_USB_USBTRC0_USB_RESUME_INT (0x01U) //!< Bit mask for USB_USBTRC0_USB_RESUME_INT. |
mbed_official | 146:f64d43ff0c18 | 3694 | #define BS_USB_USBTRC0_USB_RESUME_INT (1U) //!< Bit field size in bits for USB_USBTRC0_USB_RESUME_INT. |
mbed_official | 146:f64d43ff0c18 | 3695 | |
mbed_official | 146:f64d43ff0c18 | 3696 | #ifndef __LANGUAGE_ASM__ |
mbed_official | 146:f64d43ff0c18 | 3697 | //! @brief Read current value of the USB_USBTRC0_USB_RESUME_INT field. |
mbed_official | 146:f64d43ff0c18 | 3698 | #define BR_USB_USBTRC0_USB_RESUME_INT (BITBAND_ACCESS8(HW_USB_USBTRC0_ADDR, BP_USB_USBTRC0_USB_RESUME_INT)) |
mbed_official | 146:f64d43ff0c18 | 3699 | #endif |
mbed_official | 146:f64d43ff0c18 | 3700 | //@} |
mbed_official | 146:f64d43ff0c18 | 3701 | |
mbed_official | 146:f64d43ff0c18 | 3702 | /*! |
mbed_official | 146:f64d43ff0c18 | 3703 | * @name Register USB_USBTRC0, field SYNC_DET[1] (RO) |
mbed_official | 146:f64d43ff0c18 | 3704 | * |
mbed_official | 146:f64d43ff0c18 | 3705 | * Values: |
mbed_official | 146:f64d43ff0c18 | 3706 | * - 0 - Synchronous interrupt has not been detected. |
mbed_official | 146:f64d43ff0c18 | 3707 | * - 1 - Synchronous interrupt has been detected. |
mbed_official | 146:f64d43ff0c18 | 3708 | */ |
mbed_official | 146:f64d43ff0c18 | 3709 | //@{ |
mbed_official | 146:f64d43ff0c18 | 3710 | #define BP_USB_USBTRC0_SYNC_DET (1U) //!< Bit position for USB_USBTRC0_SYNC_DET. |
mbed_official | 146:f64d43ff0c18 | 3711 | #define BM_USB_USBTRC0_SYNC_DET (0x02U) //!< Bit mask for USB_USBTRC0_SYNC_DET. |
mbed_official | 146:f64d43ff0c18 | 3712 | #define BS_USB_USBTRC0_SYNC_DET (1U) //!< Bit field size in bits for USB_USBTRC0_SYNC_DET. |
mbed_official | 146:f64d43ff0c18 | 3713 | |
mbed_official | 146:f64d43ff0c18 | 3714 | #ifndef __LANGUAGE_ASM__ |
mbed_official | 146:f64d43ff0c18 | 3715 | //! @brief Read current value of the USB_USBTRC0_SYNC_DET field. |
mbed_official | 146:f64d43ff0c18 | 3716 | #define BR_USB_USBTRC0_SYNC_DET (BITBAND_ACCESS8(HW_USB_USBTRC0_ADDR, BP_USB_USBTRC0_SYNC_DET)) |
mbed_official | 146:f64d43ff0c18 | 3717 | #endif |
mbed_official | 146:f64d43ff0c18 | 3718 | //@} |
mbed_official | 146:f64d43ff0c18 | 3719 | |
mbed_official | 146:f64d43ff0c18 | 3720 | /*! |
mbed_official | 146:f64d43ff0c18 | 3721 | * @name Register USB_USBTRC0, field USB_CLK_RECOVERY_INT[2] (RO) |
mbed_official | 146:f64d43ff0c18 | 3722 | * |
mbed_official | 146:f64d43ff0c18 | 3723 | * This read-only field will be set to value high at 1'b1 when any of USB clock |
mbed_official | 146:f64d43ff0c18 | 3724 | * recovery interrupt conditions are detected and those interrupts are unmasked. |
mbed_official | 146:f64d43ff0c18 | 3725 | * For customer use the only unmasked USB clock recovery interrupt condition |
mbed_official | 146:f64d43ff0c18 | 3726 | * results from an overflow of the frequency trim setting values indicating that the |
mbed_official | 146:f64d43ff0c18 | 3727 | * frequency trim calculated is out of the adjustment range of the IRC48M output |
mbed_official | 146:f64d43ff0c18 | 3728 | * clock. To clear this bit after it has been set, Write 0xFF to register |
mbed_official | 146:f64d43ff0c18 | 3729 | * USB_CLK_RECOVER_INT_STATUS. |
mbed_official | 146:f64d43ff0c18 | 3730 | */ |
mbed_official | 146:f64d43ff0c18 | 3731 | //@{ |
mbed_official | 146:f64d43ff0c18 | 3732 | #define BP_USB_USBTRC0_USB_CLK_RECOVERY_INT (2U) //!< Bit position for USB_USBTRC0_USB_CLK_RECOVERY_INT. |
mbed_official | 146:f64d43ff0c18 | 3733 | #define BM_USB_USBTRC0_USB_CLK_RECOVERY_INT (0x04U) //!< Bit mask for USB_USBTRC0_USB_CLK_RECOVERY_INT. |
mbed_official | 146:f64d43ff0c18 | 3734 | #define BS_USB_USBTRC0_USB_CLK_RECOVERY_INT (1U) //!< Bit field size in bits for USB_USBTRC0_USB_CLK_RECOVERY_INT. |
mbed_official | 146:f64d43ff0c18 | 3735 | |
mbed_official | 146:f64d43ff0c18 | 3736 | #ifndef __LANGUAGE_ASM__ |
mbed_official | 146:f64d43ff0c18 | 3737 | //! @brief Read current value of the USB_USBTRC0_USB_CLK_RECOVERY_INT field. |
mbed_official | 146:f64d43ff0c18 | 3738 | #define BR_USB_USBTRC0_USB_CLK_RECOVERY_INT (BITBAND_ACCESS8(HW_USB_USBTRC0_ADDR, BP_USB_USBTRC0_USB_CLK_RECOVERY_INT)) |
mbed_official | 146:f64d43ff0c18 | 3739 | #endif |
mbed_official | 146:f64d43ff0c18 | 3740 | //@} |
mbed_official | 146:f64d43ff0c18 | 3741 | |
mbed_official | 146:f64d43ff0c18 | 3742 | /*! |
mbed_official | 146:f64d43ff0c18 | 3743 | * @name Register USB_USBTRC0, field USBRESMEN[5] (RW) |
mbed_official | 146:f64d43ff0c18 | 3744 | * |
mbed_official | 146:f64d43ff0c18 | 3745 | * This bit, when set, allows the USB module to send an asynchronous wakeup |
mbed_official | 146:f64d43ff0c18 | 3746 | * event to the MCU upon detection of resume signaling on the USB bus. The MCU then |
mbed_official | 146:f64d43ff0c18 | 3747 | * re-enables clocks to the USB module. It is used for low-power suspend mode when |
mbed_official | 146:f64d43ff0c18 | 3748 | * USB module clocks are stopped or the USB transceiver is in Suspend mode. |
mbed_official | 146:f64d43ff0c18 | 3749 | * Async wakeup only works in device mode. |
mbed_official | 146:f64d43ff0c18 | 3750 | * |
mbed_official | 146:f64d43ff0c18 | 3751 | * Values: |
mbed_official | 146:f64d43ff0c18 | 3752 | * - 0 - USB asynchronous wakeup from suspend mode disabled. |
mbed_official | 146:f64d43ff0c18 | 3753 | * - 1 - USB asynchronous wakeup from suspend mode enabled. The asynchronous |
mbed_official | 146:f64d43ff0c18 | 3754 | * resume interrupt differs from the synchronous resume interrupt in that it |
mbed_official | 146:f64d43ff0c18 | 3755 | * asynchronously detects K-state using the unfiltered state of the D+ and D- |
mbed_official | 146:f64d43ff0c18 | 3756 | * pins. This interrupt should only be enabled when the Transceiver is |
mbed_official | 146:f64d43ff0c18 | 3757 | * suspended. |
mbed_official | 146:f64d43ff0c18 | 3758 | */ |
mbed_official | 146:f64d43ff0c18 | 3759 | //@{ |
mbed_official | 146:f64d43ff0c18 | 3760 | #define BP_USB_USBTRC0_USBRESMEN (5U) //!< Bit position for USB_USBTRC0_USBRESMEN. |
mbed_official | 146:f64d43ff0c18 | 3761 | #define BM_USB_USBTRC0_USBRESMEN (0x20U) //!< Bit mask for USB_USBTRC0_USBRESMEN. |
mbed_official | 146:f64d43ff0c18 | 3762 | #define BS_USB_USBTRC0_USBRESMEN (1U) //!< Bit field size in bits for USB_USBTRC0_USBRESMEN. |
mbed_official | 146:f64d43ff0c18 | 3763 | |
mbed_official | 146:f64d43ff0c18 | 3764 | #ifndef __LANGUAGE_ASM__ |
mbed_official | 146:f64d43ff0c18 | 3765 | //! @brief Read current value of the USB_USBTRC0_USBRESMEN field. |
mbed_official | 146:f64d43ff0c18 | 3766 | #define BR_USB_USBTRC0_USBRESMEN (BITBAND_ACCESS8(HW_USB_USBTRC0_ADDR, BP_USB_USBTRC0_USBRESMEN)) |
mbed_official | 146:f64d43ff0c18 | 3767 | #endif |
mbed_official | 146:f64d43ff0c18 | 3768 | |
mbed_official | 146:f64d43ff0c18 | 3769 | //! @brief Format value for bitfield USB_USBTRC0_USBRESMEN. |
mbed_official | 146:f64d43ff0c18 | 3770 | #define BF_USB_USBTRC0_USBRESMEN(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint8_t) << BP_USB_USBTRC0_USBRESMEN), uint8_t) & BM_USB_USBTRC0_USBRESMEN) |
mbed_official | 146:f64d43ff0c18 | 3771 | |
mbed_official | 146:f64d43ff0c18 | 3772 | #ifndef __LANGUAGE_ASM__ |
mbed_official | 146:f64d43ff0c18 | 3773 | //! @brief Set the USBRESMEN field to a new value. |
mbed_official | 146:f64d43ff0c18 | 3774 | #define BW_USB_USBTRC0_USBRESMEN(v) (BITBAND_ACCESS8(HW_USB_USBTRC0_ADDR, BP_USB_USBTRC0_USBRESMEN) = (v)) |
mbed_official | 146:f64d43ff0c18 | 3775 | #endif |
mbed_official | 146:f64d43ff0c18 | 3776 | //@} |
mbed_official | 146:f64d43ff0c18 | 3777 | |
mbed_official | 146:f64d43ff0c18 | 3778 | /*! |
mbed_official | 146:f64d43ff0c18 | 3779 | * @name Register USB_USBTRC0, field USBRESET[7] (WO) |
mbed_official | 146:f64d43ff0c18 | 3780 | * |
mbed_official | 146:f64d43ff0c18 | 3781 | * Generates a hard reset to USBOTG. After this bit is set and the reset occurs, |
mbed_official | 146:f64d43ff0c18 | 3782 | * this bit is automatically cleared. This bit is always read as zero. Wait two |
mbed_official | 146:f64d43ff0c18 | 3783 | * USB clock cycles after setting this bit. |
mbed_official | 146:f64d43ff0c18 | 3784 | * |
mbed_official | 146:f64d43ff0c18 | 3785 | * Values: |
mbed_official | 146:f64d43ff0c18 | 3786 | * - 0 - Normal USB module operation. |
mbed_official | 146:f64d43ff0c18 | 3787 | * - 1 - Returns the USB module to its reset state. |
mbed_official | 146:f64d43ff0c18 | 3788 | */ |
mbed_official | 146:f64d43ff0c18 | 3789 | //@{ |
mbed_official | 146:f64d43ff0c18 | 3790 | #define BP_USB_USBTRC0_USBRESET (7U) //!< Bit position for USB_USBTRC0_USBRESET. |
mbed_official | 146:f64d43ff0c18 | 3791 | #define BM_USB_USBTRC0_USBRESET (0x80U) //!< Bit mask for USB_USBTRC0_USBRESET. |
mbed_official | 146:f64d43ff0c18 | 3792 | #define BS_USB_USBTRC0_USBRESET (1U) //!< Bit field size in bits for USB_USBTRC0_USBRESET. |
mbed_official | 146:f64d43ff0c18 | 3793 | |
mbed_official | 146:f64d43ff0c18 | 3794 | //! @brief Format value for bitfield USB_USBTRC0_USBRESET. |
mbed_official | 146:f64d43ff0c18 | 3795 | #define BF_USB_USBTRC0_USBRESET(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint8_t) << BP_USB_USBTRC0_USBRESET), uint8_t) & BM_USB_USBTRC0_USBRESET) |
mbed_official | 146:f64d43ff0c18 | 3796 | //@} |
mbed_official | 146:f64d43ff0c18 | 3797 | |
mbed_official | 146:f64d43ff0c18 | 3798 | //------------------------------------------------------------------------------------------- |
mbed_official | 146:f64d43ff0c18 | 3799 | // HW_USB_USBFRMADJUST - Frame Adjust Register |
mbed_official | 146:f64d43ff0c18 | 3800 | //------------------------------------------------------------------------------------------- |
mbed_official | 146:f64d43ff0c18 | 3801 | |
mbed_official | 146:f64d43ff0c18 | 3802 | #ifndef __LANGUAGE_ASM__ |
mbed_official | 146:f64d43ff0c18 | 3803 | /*! |
mbed_official | 146:f64d43ff0c18 | 3804 | * @brief HW_USB_USBFRMADJUST - Frame Adjust Register (RW) |
mbed_official | 146:f64d43ff0c18 | 3805 | * |
mbed_official | 146:f64d43ff0c18 | 3806 | * Reset value: 0x00U |
mbed_official | 146:f64d43ff0c18 | 3807 | */ |
mbed_official | 146:f64d43ff0c18 | 3808 | typedef union _hw_usb_usbfrmadjust |
mbed_official | 146:f64d43ff0c18 | 3809 | { |
mbed_official | 146:f64d43ff0c18 | 3810 | uint8_t U; |
mbed_official | 146:f64d43ff0c18 | 3811 | struct _hw_usb_usbfrmadjust_bitfields |
mbed_official | 146:f64d43ff0c18 | 3812 | { |
mbed_official | 146:f64d43ff0c18 | 3813 | uint8_t ADJ : 8; //!< [7:0] Frame Adjustment |
mbed_official | 146:f64d43ff0c18 | 3814 | } B; |
mbed_official | 146:f64d43ff0c18 | 3815 | } hw_usb_usbfrmadjust_t; |
mbed_official | 146:f64d43ff0c18 | 3816 | #endif |
mbed_official | 146:f64d43ff0c18 | 3817 | |
mbed_official | 146:f64d43ff0c18 | 3818 | /*! |
mbed_official | 146:f64d43ff0c18 | 3819 | * @name Constants and macros for entire USB_USBFRMADJUST register |
mbed_official | 146:f64d43ff0c18 | 3820 | */ |
mbed_official | 146:f64d43ff0c18 | 3821 | //@{ |
mbed_official | 146:f64d43ff0c18 | 3822 | #define HW_USB_USBFRMADJUST_ADDR (REGS_USB_BASE + 0x114U) |
mbed_official | 146:f64d43ff0c18 | 3823 | |
mbed_official | 146:f64d43ff0c18 | 3824 | #ifndef __LANGUAGE_ASM__ |
mbed_official | 146:f64d43ff0c18 | 3825 | #define HW_USB_USBFRMADJUST (*(__IO hw_usb_usbfrmadjust_t *) HW_USB_USBFRMADJUST_ADDR) |
mbed_official | 146:f64d43ff0c18 | 3826 | #define HW_USB_USBFRMADJUST_RD() (HW_USB_USBFRMADJUST.U) |
mbed_official | 146:f64d43ff0c18 | 3827 | #define HW_USB_USBFRMADJUST_WR(v) (HW_USB_USBFRMADJUST.U = (v)) |
mbed_official | 146:f64d43ff0c18 | 3828 | #define HW_USB_USBFRMADJUST_SET(v) (HW_USB_USBFRMADJUST_WR(HW_USB_USBFRMADJUST_RD() | (v))) |
mbed_official | 146:f64d43ff0c18 | 3829 | #define HW_USB_USBFRMADJUST_CLR(v) (HW_USB_USBFRMADJUST_WR(HW_USB_USBFRMADJUST_RD() & ~(v))) |
mbed_official | 146:f64d43ff0c18 | 3830 | #define HW_USB_USBFRMADJUST_TOG(v) (HW_USB_USBFRMADJUST_WR(HW_USB_USBFRMADJUST_RD() ^ (v))) |
mbed_official | 146:f64d43ff0c18 | 3831 | #endif |
mbed_official | 146:f64d43ff0c18 | 3832 | //@} |
mbed_official | 146:f64d43ff0c18 | 3833 | |
mbed_official | 146:f64d43ff0c18 | 3834 | /* |
mbed_official | 146:f64d43ff0c18 | 3835 | * Constants & macros for individual USB_USBFRMADJUST bitfields |
mbed_official | 146:f64d43ff0c18 | 3836 | */ |
mbed_official | 146:f64d43ff0c18 | 3837 | |
mbed_official | 146:f64d43ff0c18 | 3838 | /*! |
mbed_official | 146:f64d43ff0c18 | 3839 | * @name Register USB_USBFRMADJUST, field ADJ[7:0] (RW) |
mbed_official | 146:f64d43ff0c18 | 3840 | * |
mbed_official | 146:f64d43ff0c18 | 3841 | * In Host mode, the frame adjustment is a twos complement number that adjusts |
mbed_official | 146:f64d43ff0c18 | 3842 | * the period of each USB frame in 12-MHz clock periods. A SOF is normally |
mbed_official | 146:f64d43ff0c18 | 3843 | * generated every 12,000 12-MHz clock cycles. The Frame Adjust Register can adjust this |
mbed_official | 146:f64d43ff0c18 | 3844 | * by -128 to +127 to compensate for inaccuracies in the USB 48-MHz clock. |
mbed_official | 146:f64d43ff0c18 | 3845 | * Changes to the ADJ bit take effect at the next start of the next frame. |
mbed_official | 146:f64d43ff0c18 | 3846 | */ |
mbed_official | 146:f64d43ff0c18 | 3847 | //@{ |
mbed_official | 146:f64d43ff0c18 | 3848 | #define BP_USB_USBFRMADJUST_ADJ (0U) //!< Bit position for USB_USBFRMADJUST_ADJ. |
mbed_official | 146:f64d43ff0c18 | 3849 | #define BM_USB_USBFRMADJUST_ADJ (0xFFU) //!< Bit mask for USB_USBFRMADJUST_ADJ. |
mbed_official | 146:f64d43ff0c18 | 3850 | #define BS_USB_USBFRMADJUST_ADJ (8U) //!< Bit field size in bits for USB_USBFRMADJUST_ADJ. |
mbed_official | 146:f64d43ff0c18 | 3851 | |
mbed_official | 146:f64d43ff0c18 | 3852 | #ifndef __LANGUAGE_ASM__ |
mbed_official | 146:f64d43ff0c18 | 3853 | //! @brief Read current value of the USB_USBFRMADJUST_ADJ field. |
mbed_official | 146:f64d43ff0c18 | 3854 | #define BR_USB_USBFRMADJUST_ADJ (HW_USB_USBFRMADJUST.U) |
mbed_official | 146:f64d43ff0c18 | 3855 | #endif |
mbed_official | 146:f64d43ff0c18 | 3856 | |
mbed_official | 146:f64d43ff0c18 | 3857 | //! @brief Format value for bitfield USB_USBFRMADJUST_ADJ. |
mbed_official | 146:f64d43ff0c18 | 3858 | #define BF_USB_USBFRMADJUST_ADJ(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint8_t) << BP_USB_USBFRMADJUST_ADJ), uint8_t) & BM_USB_USBFRMADJUST_ADJ) |
mbed_official | 146:f64d43ff0c18 | 3859 | |
mbed_official | 146:f64d43ff0c18 | 3860 | #ifndef __LANGUAGE_ASM__ |
mbed_official | 146:f64d43ff0c18 | 3861 | //! @brief Set the ADJ field to a new value. |
mbed_official | 146:f64d43ff0c18 | 3862 | #define BW_USB_USBFRMADJUST_ADJ(v) (HW_USB_USBFRMADJUST_WR(v)) |
mbed_official | 146:f64d43ff0c18 | 3863 | #endif |
mbed_official | 146:f64d43ff0c18 | 3864 | //@} |
mbed_official | 146:f64d43ff0c18 | 3865 | |
mbed_official | 146:f64d43ff0c18 | 3866 | //------------------------------------------------------------------------------------------- |
mbed_official | 146:f64d43ff0c18 | 3867 | // HW_USB_CLK_RECOVER_CTRL - USB Clock recovery control |
mbed_official | 146:f64d43ff0c18 | 3868 | //------------------------------------------------------------------------------------------- |
mbed_official | 146:f64d43ff0c18 | 3869 | |
mbed_official | 146:f64d43ff0c18 | 3870 | #ifndef __LANGUAGE_ASM__ |
mbed_official | 146:f64d43ff0c18 | 3871 | /*! |
mbed_official | 146:f64d43ff0c18 | 3872 | * @brief HW_USB_CLK_RECOVER_CTRL - USB Clock recovery control (RW) |
mbed_official | 146:f64d43ff0c18 | 3873 | * |
mbed_official | 146:f64d43ff0c18 | 3874 | * Reset value: 0x00U |
mbed_official | 146:f64d43ff0c18 | 3875 | * |
mbed_official | 146:f64d43ff0c18 | 3876 | * Signals in this register control the crystal-less USB clock mode in which the |
mbed_official | 146:f64d43ff0c18 | 3877 | * internal IRC48M oscillator is tuned to match the clock extracted from the |
mbed_official | 146:f64d43ff0c18 | 3878 | * incoming USB data stream. The IRC48M internal oscillator module must be enabled |
mbed_official | 146:f64d43ff0c18 | 3879 | * in register USB_CLK_RECOVER_IRC_EN for this mode. |
mbed_official | 146:f64d43ff0c18 | 3880 | */ |
mbed_official | 146:f64d43ff0c18 | 3881 | typedef union _hw_usb_clk_recover_ctrl |
mbed_official | 146:f64d43ff0c18 | 3882 | { |
mbed_official | 146:f64d43ff0c18 | 3883 | uint8_t U; |
mbed_official | 146:f64d43ff0c18 | 3884 | struct _hw_usb_clk_recover_ctrl_bitfields |
mbed_official | 146:f64d43ff0c18 | 3885 | { |
mbed_official | 146:f64d43ff0c18 | 3886 | uint8_t RESERVED0 : 5; //!< [4:0] |
mbed_official | 146:f64d43ff0c18 | 3887 | uint8_t RESTART_IFRTRIM_EN : 1; //!< [5] Restart from IFR trim value |
mbed_official | 146:f64d43ff0c18 | 3888 | uint8_t RESET_RESUME_ROUGH_EN : 1; //!< [6] Reset/resume to rough |
mbed_official | 146:f64d43ff0c18 | 3889 | //! phase enable |
mbed_official | 146:f64d43ff0c18 | 3890 | uint8_t CLOCK_RECOVER_EN : 1; //!< [7] Crystal-less USB enable |
mbed_official | 146:f64d43ff0c18 | 3891 | } B; |
mbed_official | 146:f64d43ff0c18 | 3892 | } hw_usb_clk_recover_ctrl_t; |
mbed_official | 146:f64d43ff0c18 | 3893 | #endif |
mbed_official | 146:f64d43ff0c18 | 3894 | |
mbed_official | 146:f64d43ff0c18 | 3895 | /*! |
mbed_official | 146:f64d43ff0c18 | 3896 | * @name Constants and macros for entire USB_CLK_RECOVER_CTRL register |
mbed_official | 146:f64d43ff0c18 | 3897 | */ |
mbed_official | 146:f64d43ff0c18 | 3898 | //@{ |
mbed_official | 146:f64d43ff0c18 | 3899 | #define HW_USB_CLK_RECOVER_CTRL_ADDR (REGS_USB_BASE + 0x140U) |
mbed_official | 146:f64d43ff0c18 | 3900 | |
mbed_official | 146:f64d43ff0c18 | 3901 | #ifndef __LANGUAGE_ASM__ |
mbed_official | 146:f64d43ff0c18 | 3902 | #define HW_USB_CLK_RECOVER_CTRL (*(__IO hw_usb_clk_recover_ctrl_t *) HW_USB_CLK_RECOVER_CTRL_ADDR) |
mbed_official | 146:f64d43ff0c18 | 3903 | #define HW_USB_CLK_RECOVER_CTRL_RD() (HW_USB_CLK_RECOVER_CTRL.U) |
mbed_official | 146:f64d43ff0c18 | 3904 | #define HW_USB_CLK_RECOVER_CTRL_WR(v) (HW_USB_CLK_RECOVER_CTRL.U = (v)) |
mbed_official | 146:f64d43ff0c18 | 3905 | #define HW_USB_CLK_RECOVER_CTRL_SET(v) (HW_USB_CLK_RECOVER_CTRL_WR(HW_USB_CLK_RECOVER_CTRL_RD() | (v))) |
mbed_official | 146:f64d43ff0c18 | 3906 | #define HW_USB_CLK_RECOVER_CTRL_CLR(v) (HW_USB_CLK_RECOVER_CTRL_WR(HW_USB_CLK_RECOVER_CTRL_RD() & ~(v))) |
mbed_official | 146:f64d43ff0c18 | 3907 | #define HW_USB_CLK_RECOVER_CTRL_TOG(v) (HW_USB_CLK_RECOVER_CTRL_WR(HW_USB_CLK_RECOVER_CTRL_RD() ^ (v))) |
mbed_official | 146:f64d43ff0c18 | 3908 | #endif |
mbed_official | 146:f64d43ff0c18 | 3909 | //@} |
mbed_official | 146:f64d43ff0c18 | 3910 | |
mbed_official | 146:f64d43ff0c18 | 3911 | /* |
mbed_official | 146:f64d43ff0c18 | 3912 | * Constants & macros for individual USB_CLK_RECOVER_CTRL bitfields |
mbed_official | 146:f64d43ff0c18 | 3913 | */ |
mbed_official | 146:f64d43ff0c18 | 3914 | |
mbed_official | 146:f64d43ff0c18 | 3915 | /*! |
mbed_official | 146:f64d43ff0c18 | 3916 | * @name Register USB_CLK_RECOVER_CTRL, field RESTART_IFRTRIM_EN[5] (RW) |
mbed_official | 146:f64d43ff0c18 | 3917 | * |
mbed_official | 146:f64d43ff0c18 | 3918 | * IRC48 has a default trim fine value whose default value is factory trimmed |
mbed_official | 146:f64d43ff0c18 | 3919 | * (the IFR trim value). Clock recover block tracks the accuracy of the clock 48Mhz |
mbed_official | 146:f64d43ff0c18 | 3920 | * and keeps updating the trim fine value accordingly |
mbed_official | 146:f64d43ff0c18 | 3921 | * |
mbed_official | 146:f64d43ff0c18 | 3922 | * Values: |
mbed_official | 146:f64d43ff0c18 | 3923 | * - 0 - Trim fine adjustment always works based on the previous updated trim |
mbed_official | 146:f64d43ff0c18 | 3924 | * fine value (default) |
mbed_official | 146:f64d43ff0c18 | 3925 | * - 1 - Trim fine restarts from the IFR trim value whenever |
mbed_official | 146:f64d43ff0c18 | 3926 | * bus_reset/bus_resume is detected or module enable is desasserted |
mbed_official | 146:f64d43ff0c18 | 3927 | */ |
mbed_official | 146:f64d43ff0c18 | 3928 | //@{ |
mbed_official | 146:f64d43ff0c18 | 3929 | #define BP_USB_CLK_RECOVER_CTRL_RESTART_IFRTRIM_EN (5U) //!< Bit position for USB_CLK_RECOVER_CTRL_RESTART_IFRTRIM_EN. |
mbed_official | 146:f64d43ff0c18 | 3930 | #define BM_USB_CLK_RECOVER_CTRL_RESTART_IFRTRIM_EN (0x20U) //!< Bit mask for USB_CLK_RECOVER_CTRL_RESTART_IFRTRIM_EN. |
mbed_official | 146:f64d43ff0c18 | 3931 | #define BS_USB_CLK_RECOVER_CTRL_RESTART_IFRTRIM_EN (1U) //!< Bit field size in bits for USB_CLK_RECOVER_CTRL_RESTART_IFRTRIM_EN. |
mbed_official | 146:f64d43ff0c18 | 3932 | |
mbed_official | 146:f64d43ff0c18 | 3933 | #ifndef __LANGUAGE_ASM__ |
mbed_official | 146:f64d43ff0c18 | 3934 | //! @brief Read current value of the USB_CLK_RECOVER_CTRL_RESTART_IFRTRIM_EN field. |
mbed_official | 146:f64d43ff0c18 | 3935 | #define BR_USB_CLK_RECOVER_CTRL_RESTART_IFRTRIM_EN (BITBAND_ACCESS8(HW_USB_CLK_RECOVER_CTRL_ADDR, BP_USB_CLK_RECOVER_CTRL_RESTART_IFRTRIM_EN)) |
mbed_official | 146:f64d43ff0c18 | 3936 | #endif |
mbed_official | 146:f64d43ff0c18 | 3937 | |
mbed_official | 146:f64d43ff0c18 | 3938 | //! @brief Format value for bitfield USB_CLK_RECOVER_CTRL_RESTART_IFRTRIM_EN. |
mbed_official | 146:f64d43ff0c18 | 3939 | #define BF_USB_CLK_RECOVER_CTRL_RESTART_IFRTRIM_EN(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint8_t) << BP_USB_CLK_RECOVER_CTRL_RESTART_IFRTRIM_EN), uint8_t) & BM_USB_CLK_RECOVER_CTRL_RESTART_IFRTRIM_EN) |
mbed_official | 146:f64d43ff0c18 | 3940 | |
mbed_official | 146:f64d43ff0c18 | 3941 | #ifndef __LANGUAGE_ASM__ |
mbed_official | 146:f64d43ff0c18 | 3942 | //! @brief Set the RESTART_IFRTRIM_EN field to a new value. |
mbed_official | 146:f64d43ff0c18 | 3943 | #define BW_USB_CLK_RECOVER_CTRL_RESTART_IFRTRIM_EN(v) (BITBAND_ACCESS8(HW_USB_CLK_RECOVER_CTRL_ADDR, BP_USB_CLK_RECOVER_CTRL_RESTART_IFRTRIM_EN) = (v)) |
mbed_official | 146:f64d43ff0c18 | 3944 | #endif |
mbed_official | 146:f64d43ff0c18 | 3945 | //@} |
mbed_official | 146:f64d43ff0c18 | 3946 | |
mbed_official | 146:f64d43ff0c18 | 3947 | /*! |
mbed_official | 146:f64d43ff0c18 | 3948 | * @name Register USB_CLK_RECOVER_CTRL, field RESET_RESUME_ROUGH_EN[6] (RW) |
mbed_official | 146:f64d43ff0c18 | 3949 | * |
mbed_official | 146:f64d43ff0c18 | 3950 | * The clock recovery block tracks the IRC48Mhz to get an accurate 48Mhz clock. |
mbed_official | 146:f64d43ff0c18 | 3951 | * It has two phases after user enables clock_recover_en bit, rough phase and |
mbed_official | 146:f64d43ff0c18 | 3952 | * tracking phase. The step to fine tune the IRC 48Mhz by adjusting the trim fine |
mbed_official | 146:f64d43ff0c18 | 3953 | * value is different during these two phases. The step in rough phase is larger |
mbed_official | 146:f64d43ff0c18 | 3954 | * than that in tracking phase. Switch back to rough stage whenever USB bus reset |
mbed_official | 146:f64d43ff0c18 | 3955 | * or bus resume occurs. |
mbed_official | 146:f64d43ff0c18 | 3956 | * |
mbed_official | 146:f64d43ff0c18 | 3957 | * Values: |
mbed_official | 146:f64d43ff0c18 | 3958 | * - 0 - Always works in tracking phase after the 1st time rough to track |
mbed_official | 146:f64d43ff0c18 | 3959 | * transition (default) |
mbed_official | 146:f64d43ff0c18 | 3960 | * - 1 - Go back to rough stage whenever bus reset or bus resume occurs |
mbed_official | 146:f64d43ff0c18 | 3961 | */ |
mbed_official | 146:f64d43ff0c18 | 3962 | //@{ |
mbed_official | 146:f64d43ff0c18 | 3963 | #define BP_USB_CLK_RECOVER_CTRL_RESET_RESUME_ROUGH_EN (6U) //!< Bit position for USB_CLK_RECOVER_CTRL_RESET_RESUME_ROUGH_EN. |
mbed_official | 146:f64d43ff0c18 | 3964 | #define BM_USB_CLK_RECOVER_CTRL_RESET_RESUME_ROUGH_EN (0x40U) //!< Bit mask for USB_CLK_RECOVER_CTRL_RESET_RESUME_ROUGH_EN. |
mbed_official | 146:f64d43ff0c18 | 3965 | #define BS_USB_CLK_RECOVER_CTRL_RESET_RESUME_ROUGH_EN (1U) //!< Bit field size in bits for USB_CLK_RECOVER_CTRL_RESET_RESUME_ROUGH_EN. |
mbed_official | 146:f64d43ff0c18 | 3966 | |
mbed_official | 146:f64d43ff0c18 | 3967 | #ifndef __LANGUAGE_ASM__ |
mbed_official | 146:f64d43ff0c18 | 3968 | //! @brief Read current value of the USB_CLK_RECOVER_CTRL_RESET_RESUME_ROUGH_EN field. |
mbed_official | 146:f64d43ff0c18 | 3969 | #define BR_USB_CLK_RECOVER_CTRL_RESET_RESUME_ROUGH_EN (BITBAND_ACCESS8(HW_USB_CLK_RECOVER_CTRL_ADDR, BP_USB_CLK_RECOVER_CTRL_RESET_RESUME_ROUGH_EN)) |
mbed_official | 146:f64d43ff0c18 | 3970 | #endif |
mbed_official | 146:f64d43ff0c18 | 3971 | |
mbed_official | 146:f64d43ff0c18 | 3972 | //! @brief Format value for bitfield USB_CLK_RECOVER_CTRL_RESET_RESUME_ROUGH_EN. |
mbed_official | 146:f64d43ff0c18 | 3973 | #define BF_USB_CLK_RECOVER_CTRL_RESET_RESUME_ROUGH_EN(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint8_t) << BP_USB_CLK_RECOVER_CTRL_RESET_RESUME_ROUGH_EN), uint8_t) & BM_USB_CLK_RECOVER_CTRL_RESET_RESUME_ROUGH_EN) |
mbed_official | 146:f64d43ff0c18 | 3974 | |
mbed_official | 146:f64d43ff0c18 | 3975 | #ifndef __LANGUAGE_ASM__ |
mbed_official | 146:f64d43ff0c18 | 3976 | //! @brief Set the RESET_RESUME_ROUGH_EN field to a new value. |
mbed_official | 146:f64d43ff0c18 | 3977 | #define BW_USB_CLK_RECOVER_CTRL_RESET_RESUME_ROUGH_EN(v) (BITBAND_ACCESS8(HW_USB_CLK_RECOVER_CTRL_ADDR, BP_USB_CLK_RECOVER_CTRL_RESET_RESUME_ROUGH_EN) = (v)) |
mbed_official | 146:f64d43ff0c18 | 3978 | #endif |
mbed_official | 146:f64d43ff0c18 | 3979 | //@} |
mbed_official | 146:f64d43ff0c18 | 3980 | |
mbed_official | 146:f64d43ff0c18 | 3981 | /*! |
mbed_official | 146:f64d43ff0c18 | 3982 | * @name Register USB_CLK_RECOVER_CTRL, field CLOCK_RECOVER_EN[7] (RW) |
mbed_official | 146:f64d43ff0c18 | 3983 | * |
mbed_official | 146:f64d43ff0c18 | 3984 | * This bit must be enabled if user wants to use the crystal-less USB mode for |
mbed_official | 146:f64d43ff0c18 | 3985 | * the Full Speed USB controller and transceiver. This bit should not be set for |
mbed_official | 146:f64d43ff0c18 | 3986 | * USB host mode or OTG. |
mbed_official | 146:f64d43ff0c18 | 3987 | * |
mbed_official | 146:f64d43ff0c18 | 3988 | * Values: |
mbed_official | 146:f64d43ff0c18 | 3989 | * - 0 - Disable clock recovery block (default) |
mbed_official | 146:f64d43ff0c18 | 3990 | * - 1 - Enable clock recovery block |
mbed_official | 146:f64d43ff0c18 | 3991 | */ |
mbed_official | 146:f64d43ff0c18 | 3992 | //@{ |
mbed_official | 146:f64d43ff0c18 | 3993 | #define BP_USB_CLK_RECOVER_CTRL_CLOCK_RECOVER_EN (7U) //!< Bit position for USB_CLK_RECOVER_CTRL_CLOCK_RECOVER_EN. |
mbed_official | 146:f64d43ff0c18 | 3994 | #define BM_USB_CLK_RECOVER_CTRL_CLOCK_RECOVER_EN (0x80U) //!< Bit mask for USB_CLK_RECOVER_CTRL_CLOCK_RECOVER_EN. |
mbed_official | 146:f64d43ff0c18 | 3995 | #define BS_USB_CLK_RECOVER_CTRL_CLOCK_RECOVER_EN (1U) //!< Bit field size in bits for USB_CLK_RECOVER_CTRL_CLOCK_RECOVER_EN. |
mbed_official | 146:f64d43ff0c18 | 3996 | |
mbed_official | 146:f64d43ff0c18 | 3997 | #ifndef __LANGUAGE_ASM__ |
mbed_official | 146:f64d43ff0c18 | 3998 | //! @brief Read current value of the USB_CLK_RECOVER_CTRL_CLOCK_RECOVER_EN field. |
mbed_official | 146:f64d43ff0c18 | 3999 | #define BR_USB_CLK_RECOVER_CTRL_CLOCK_RECOVER_EN (BITBAND_ACCESS8(HW_USB_CLK_RECOVER_CTRL_ADDR, BP_USB_CLK_RECOVER_CTRL_CLOCK_RECOVER_EN)) |
mbed_official | 146:f64d43ff0c18 | 4000 | #endif |
mbed_official | 146:f64d43ff0c18 | 4001 | |
mbed_official | 146:f64d43ff0c18 | 4002 | //! @brief Format value for bitfield USB_CLK_RECOVER_CTRL_CLOCK_RECOVER_EN. |
mbed_official | 146:f64d43ff0c18 | 4003 | #define BF_USB_CLK_RECOVER_CTRL_CLOCK_RECOVER_EN(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint8_t) << BP_USB_CLK_RECOVER_CTRL_CLOCK_RECOVER_EN), uint8_t) & BM_USB_CLK_RECOVER_CTRL_CLOCK_RECOVER_EN) |
mbed_official | 146:f64d43ff0c18 | 4004 | |
mbed_official | 146:f64d43ff0c18 | 4005 | #ifndef __LANGUAGE_ASM__ |
mbed_official | 146:f64d43ff0c18 | 4006 | //! @brief Set the CLOCK_RECOVER_EN field to a new value. |
mbed_official | 146:f64d43ff0c18 | 4007 | #define BW_USB_CLK_RECOVER_CTRL_CLOCK_RECOVER_EN(v) (BITBAND_ACCESS8(HW_USB_CLK_RECOVER_CTRL_ADDR, BP_USB_CLK_RECOVER_CTRL_CLOCK_RECOVER_EN) = (v)) |
mbed_official | 146:f64d43ff0c18 | 4008 | #endif |
mbed_official | 146:f64d43ff0c18 | 4009 | //@} |
mbed_official | 146:f64d43ff0c18 | 4010 | |
mbed_official | 146:f64d43ff0c18 | 4011 | //------------------------------------------------------------------------------------------- |
mbed_official | 146:f64d43ff0c18 | 4012 | // HW_USB_CLK_RECOVER_IRC_EN - IRC48M oscillator enable register |
mbed_official | 146:f64d43ff0c18 | 4013 | //------------------------------------------------------------------------------------------- |
mbed_official | 146:f64d43ff0c18 | 4014 | |
mbed_official | 146:f64d43ff0c18 | 4015 | #ifndef __LANGUAGE_ASM__ |
mbed_official | 146:f64d43ff0c18 | 4016 | /*! |
mbed_official | 146:f64d43ff0c18 | 4017 | * @brief HW_USB_CLK_RECOVER_IRC_EN - IRC48M oscillator enable register (RW) |
mbed_official | 146:f64d43ff0c18 | 4018 | * |
mbed_official | 146:f64d43ff0c18 | 4019 | * Reset value: 0x01U |
mbed_official | 146:f64d43ff0c18 | 4020 | * |
mbed_official | 146:f64d43ff0c18 | 4021 | * Controls basic operation of the on-chip IRC48M module used to produce nominal |
mbed_official | 146:f64d43ff0c18 | 4022 | * 48MHz clocks for USB crystal-less operation and other functions. See |
mbed_official | 146:f64d43ff0c18 | 4023 | * additional information about the IRC48M operation in the Clock Distribution chapter. |
mbed_official | 146:f64d43ff0c18 | 4024 | */ |
mbed_official | 146:f64d43ff0c18 | 4025 | typedef union _hw_usb_clk_recover_irc_en |
mbed_official | 146:f64d43ff0c18 | 4026 | { |
mbed_official | 146:f64d43ff0c18 | 4027 | uint8_t U; |
mbed_official | 146:f64d43ff0c18 | 4028 | struct _hw_usb_clk_recover_irc_en_bitfields |
mbed_official | 146:f64d43ff0c18 | 4029 | { |
mbed_official | 146:f64d43ff0c18 | 4030 | uint8_t REG_EN : 1; //!< [0] IRC48M regulator enable |
mbed_official | 146:f64d43ff0c18 | 4031 | uint8_t IRC_EN : 1; //!< [1] IRC48M enable |
mbed_official | 146:f64d43ff0c18 | 4032 | uint8_t RESERVED0 : 6; //!< [7:2] |
mbed_official | 146:f64d43ff0c18 | 4033 | } B; |
mbed_official | 146:f64d43ff0c18 | 4034 | } hw_usb_clk_recover_irc_en_t; |
mbed_official | 146:f64d43ff0c18 | 4035 | #endif |
mbed_official | 146:f64d43ff0c18 | 4036 | |
mbed_official | 146:f64d43ff0c18 | 4037 | /*! |
mbed_official | 146:f64d43ff0c18 | 4038 | * @name Constants and macros for entire USB_CLK_RECOVER_IRC_EN register |
mbed_official | 146:f64d43ff0c18 | 4039 | */ |
mbed_official | 146:f64d43ff0c18 | 4040 | //@{ |
mbed_official | 146:f64d43ff0c18 | 4041 | #define HW_USB_CLK_RECOVER_IRC_EN_ADDR (REGS_USB_BASE + 0x144U) |
mbed_official | 146:f64d43ff0c18 | 4042 | |
mbed_official | 146:f64d43ff0c18 | 4043 | #ifndef __LANGUAGE_ASM__ |
mbed_official | 146:f64d43ff0c18 | 4044 | #define HW_USB_CLK_RECOVER_IRC_EN (*(__IO hw_usb_clk_recover_irc_en_t *) HW_USB_CLK_RECOVER_IRC_EN_ADDR) |
mbed_official | 146:f64d43ff0c18 | 4045 | #define HW_USB_CLK_RECOVER_IRC_EN_RD() (HW_USB_CLK_RECOVER_IRC_EN.U) |
mbed_official | 146:f64d43ff0c18 | 4046 | #define HW_USB_CLK_RECOVER_IRC_EN_WR(v) (HW_USB_CLK_RECOVER_IRC_EN.U = (v)) |
mbed_official | 146:f64d43ff0c18 | 4047 | #define HW_USB_CLK_RECOVER_IRC_EN_SET(v) (HW_USB_CLK_RECOVER_IRC_EN_WR(HW_USB_CLK_RECOVER_IRC_EN_RD() | (v))) |
mbed_official | 146:f64d43ff0c18 | 4048 | #define HW_USB_CLK_RECOVER_IRC_EN_CLR(v) (HW_USB_CLK_RECOVER_IRC_EN_WR(HW_USB_CLK_RECOVER_IRC_EN_RD() & ~(v))) |
mbed_official | 146:f64d43ff0c18 | 4049 | #define HW_USB_CLK_RECOVER_IRC_EN_TOG(v) (HW_USB_CLK_RECOVER_IRC_EN_WR(HW_USB_CLK_RECOVER_IRC_EN_RD() ^ (v))) |
mbed_official | 146:f64d43ff0c18 | 4050 | #endif |
mbed_official | 146:f64d43ff0c18 | 4051 | //@} |
mbed_official | 146:f64d43ff0c18 | 4052 | |
mbed_official | 146:f64d43ff0c18 | 4053 | /* |
mbed_official | 146:f64d43ff0c18 | 4054 | * Constants & macros for individual USB_CLK_RECOVER_IRC_EN bitfields |
mbed_official | 146:f64d43ff0c18 | 4055 | */ |
mbed_official | 146:f64d43ff0c18 | 4056 | |
mbed_official | 146:f64d43ff0c18 | 4057 | /*! |
mbed_official | 146:f64d43ff0c18 | 4058 | * @name Register USB_CLK_RECOVER_IRC_EN, field REG_EN[0] (RW) |
mbed_official | 146:f64d43ff0c18 | 4059 | * |
mbed_official | 146:f64d43ff0c18 | 4060 | * This bit is used to enable the local analog regulator for IRC48Mhz module. |
mbed_official | 146:f64d43ff0c18 | 4061 | * This bit must be set if user wants to use the crystal-less USB clock |
mbed_official | 146:f64d43ff0c18 | 4062 | * configuration. |
mbed_official | 146:f64d43ff0c18 | 4063 | * |
mbed_official | 146:f64d43ff0c18 | 4064 | * Values: |
mbed_official | 146:f64d43ff0c18 | 4065 | * - 0 - IRC48M local regulator is disabled |
mbed_official | 146:f64d43ff0c18 | 4066 | * - 1 - IRC48M local regulator is enabled (default) |
mbed_official | 146:f64d43ff0c18 | 4067 | */ |
mbed_official | 146:f64d43ff0c18 | 4068 | //@{ |
mbed_official | 146:f64d43ff0c18 | 4069 | #define BP_USB_CLK_RECOVER_IRC_EN_REG_EN (0U) //!< Bit position for USB_CLK_RECOVER_IRC_EN_REG_EN. |
mbed_official | 146:f64d43ff0c18 | 4070 | #define BM_USB_CLK_RECOVER_IRC_EN_REG_EN (0x01U) //!< Bit mask for USB_CLK_RECOVER_IRC_EN_REG_EN. |
mbed_official | 146:f64d43ff0c18 | 4071 | #define BS_USB_CLK_RECOVER_IRC_EN_REG_EN (1U) //!< Bit field size in bits for USB_CLK_RECOVER_IRC_EN_REG_EN. |
mbed_official | 146:f64d43ff0c18 | 4072 | |
mbed_official | 146:f64d43ff0c18 | 4073 | #ifndef __LANGUAGE_ASM__ |
mbed_official | 146:f64d43ff0c18 | 4074 | //! @brief Read current value of the USB_CLK_RECOVER_IRC_EN_REG_EN field. |
mbed_official | 146:f64d43ff0c18 | 4075 | #define BR_USB_CLK_RECOVER_IRC_EN_REG_EN (BITBAND_ACCESS8(HW_USB_CLK_RECOVER_IRC_EN_ADDR, BP_USB_CLK_RECOVER_IRC_EN_REG_EN)) |
mbed_official | 146:f64d43ff0c18 | 4076 | #endif |
mbed_official | 146:f64d43ff0c18 | 4077 | |
mbed_official | 146:f64d43ff0c18 | 4078 | //! @brief Format value for bitfield USB_CLK_RECOVER_IRC_EN_REG_EN. |
mbed_official | 146:f64d43ff0c18 | 4079 | #define BF_USB_CLK_RECOVER_IRC_EN_REG_EN(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint8_t) << BP_USB_CLK_RECOVER_IRC_EN_REG_EN), uint8_t) & BM_USB_CLK_RECOVER_IRC_EN_REG_EN) |
mbed_official | 146:f64d43ff0c18 | 4080 | |
mbed_official | 146:f64d43ff0c18 | 4081 | #ifndef __LANGUAGE_ASM__ |
mbed_official | 146:f64d43ff0c18 | 4082 | //! @brief Set the REG_EN field to a new value. |
mbed_official | 146:f64d43ff0c18 | 4083 | #define BW_USB_CLK_RECOVER_IRC_EN_REG_EN(v) (BITBAND_ACCESS8(HW_USB_CLK_RECOVER_IRC_EN_ADDR, BP_USB_CLK_RECOVER_IRC_EN_REG_EN) = (v)) |
mbed_official | 146:f64d43ff0c18 | 4084 | #endif |
mbed_official | 146:f64d43ff0c18 | 4085 | //@} |
mbed_official | 146:f64d43ff0c18 | 4086 | |
mbed_official | 146:f64d43ff0c18 | 4087 | /*! |
mbed_official | 146:f64d43ff0c18 | 4088 | * @name Register USB_CLK_RECOVER_IRC_EN, field IRC_EN[1] (RW) |
mbed_official | 146:f64d43ff0c18 | 4089 | * |
mbed_official | 146:f64d43ff0c18 | 4090 | * This bit is used to enable the on-chip IRC48Mhz module to generate clocks for |
mbed_official | 146:f64d43ff0c18 | 4091 | * crystal-less USB. It can only be used for FS USB device mode operation. This |
mbed_official | 146:f64d43ff0c18 | 4092 | * bit must be set before using the crystal-less USB clock configuration. |
mbed_official | 146:f64d43ff0c18 | 4093 | * |
mbed_official | 146:f64d43ff0c18 | 4094 | * Values: |
mbed_official | 146:f64d43ff0c18 | 4095 | * - 0 - Disable the IRC48M module (default) |
mbed_official | 146:f64d43ff0c18 | 4096 | * - 1 - Enable the IRC48M module |
mbed_official | 146:f64d43ff0c18 | 4097 | */ |
mbed_official | 146:f64d43ff0c18 | 4098 | //@{ |
mbed_official | 146:f64d43ff0c18 | 4099 | #define BP_USB_CLK_RECOVER_IRC_EN_IRC_EN (1U) //!< Bit position for USB_CLK_RECOVER_IRC_EN_IRC_EN. |
mbed_official | 146:f64d43ff0c18 | 4100 | #define BM_USB_CLK_RECOVER_IRC_EN_IRC_EN (0x02U) //!< Bit mask for USB_CLK_RECOVER_IRC_EN_IRC_EN. |
mbed_official | 146:f64d43ff0c18 | 4101 | #define BS_USB_CLK_RECOVER_IRC_EN_IRC_EN (1U) //!< Bit field size in bits for USB_CLK_RECOVER_IRC_EN_IRC_EN. |
mbed_official | 146:f64d43ff0c18 | 4102 | |
mbed_official | 146:f64d43ff0c18 | 4103 | #ifndef __LANGUAGE_ASM__ |
mbed_official | 146:f64d43ff0c18 | 4104 | //! @brief Read current value of the USB_CLK_RECOVER_IRC_EN_IRC_EN field. |
mbed_official | 146:f64d43ff0c18 | 4105 | #define BR_USB_CLK_RECOVER_IRC_EN_IRC_EN (BITBAND_ACCESS8(HW_USB_CLK_RECOVER_IRC_EN_ADDR, BP_USB_CLK_RECOVER_IRC_EN_IRC_EN)) |
mbed_official | 146:f64d43ff0c18 | 4106 | #endif |
mbed_official | 146:f64d43ff0c18 | 4107 | |
mbed_official | 146:f64d43ff0c18 | 4108 | //! @brief Format value for bitfield USB_CLK_RECOVER_IRC_EN_IRC_EN. |
mbed_official | 146:f64d43ff0c18 | 4109 | #define BF_USB_CLK_RECOVER_IRC_EN_IRC_EN(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint8_t) << BP_USB_CLK_RECOVER_IRC_EN_IRC_EN), uint8_t) & BM_USB_CLK_RECOVER_IRC_EN_IRC_EN) |
mbed_official | 146:f64d43ff0c18 | 4110 | |
mbed_official | 146:f64d43ff0c18 | 4111 | #ifndef __LANGUAGE_ASM__ |
mbed_official | 146:f64d43ff0c18 | 4112 | //! @brief Set the IRC_EN field to a new value. |
mbed_official | 146:f64d43ff0c18 | 4113 | #define BW_USB_CLK_RECOVER_IRC_EN_IRC_EN(v) (BITBAND_ACCESS8(HW_USB_CLK_RECOVER_IRC_EN_ADDR, BP_USB_CLK_RECOVER_IRC_EN_IRC_EN) = (v)) |
mbed_official | 146:f64d43ff0c18 | 4114 | #endif |
mbed_official | 146:f64d43ff0c18 | 4115 | //@} |
mbed_official | 146:f64d43ff0c18 | 4116 | |
mbed_official | 146:f64d43ff0c18 | 4117 | //------------------------------------------------------------------------------------------- |
mbed_official | 146:f64d43ff0c18 | 4118 | // HW_USB_CLK_RECOVER_INT_STATUS - Clock recovery separated interrupt status |
mbed_official | 146:f64d43ff0c18 | 4119 | //------------------------------------------------------------------------------------------- |
mbed_official | 146:f64d43ff0c18 | 4120 | |
mbed_official | 146:f64d43ff0c18 | 4121 | #ifndef __LANGUAGE_ASM__ |
mbed_official | 146:f64d43ff0c18 | 4122 | /*! |
mbed_official | 146:f64d43ff0c18 | 4123 | * @brief HW_USB_CLK_RECOVER_INT_STATUS - Clock recovery separated interrupt status (W1C) |
mbed_official | 146:f64d43ff0c18 | 4124 | * |
mbed_official | 146:f64d43ff0c18 | 4125 | * Reset value: 0x00U |
mbed_official | 146:f64d43ff0c18 | 4126 | * |
mbed_official | 146:f64d43ff0c18 | 4127 | * A Write operation with value high at 1'b1 on any combination of individual |
mbed_official | 146:f64d43ff0c18 | 4128 | * bits will clear those bits. |
mbed_official | 146:f64d43ff0c18 | 4129 | */ |
mbed_official | 146:f64d43ff0c18 | 4130 | typedef union _hw_usb_clk_recover_int_status |
mbed_official | 146:f64d43ff0c18 | 4131 | { |
mbed_official | 146:f64d43ff0c18 | 4132 | uint8_t U; |
mbed_official | 146:f64d43ff0c18 | 4133 | struct _hw_usb_clk_recover_int_status_bitfields |
mbed_official | 146:f64d43ff0c18 | 4134 | { |
mbed_official | 146:f64d43ff0c18 | 4135 | uint8_t RESERVED0 : 4; //!< [3:0] |
mbed_official | 146:f64d43ff0c18 | 4136 | uint8_t OVF_ERROR : 1; //!< [4] |
mbed_official | 146:f64d43ff0c18 | 4137 | uint8_t RESERVED1 : 3; //!< [7:5] |
mbed_official | 146:f64d43ff0c18 | 4138 | } B; |
mbed_official | 146:f64d43ff0c18 | 4139 | } hw_usb_clk_recover_int_status_t; |
mbed_official | 146:f64d43ff0c18 | 4140 | #endif |
mbed_official | 146:f64d43ff0c18 | 4141 | |
mbed_official | 146:f64d43ff0c18 | 4142 | /*! |
mbed_official | 146:f64d43ff0c18 | 4143 | * @name Constants and macros for entire USB_CLK_RECOVER_INT_STATUS register |
mbed_official | 146:f64d43ff0c18 | 4144 | */ |
mbed_official | 146:f64d43ff0c18 | 4145 | //@{ |
mbed_official | 146:f64d43ff0c18 | 4146 | #define HW_USB_CLK_RECOVER_INT_STATUS_ADDR (REGS_USB_BASE + 0x15CU) |
mbed_official | 146:f64d43ff0c18 | 4147 | |
mbed_official | 146:f64d43ff0c18 | 4148 | #ifndef __LANGUAGE_ASM__ |
mbed_official | 146:f64d43ff0c18 | 4149 | #define HW_USB_CLK_RECOVER_INT_STATUS (*(__IO hw_usb_clk_recover_int_status_t *) HW_USB_CLK_RECOVER_INT_STATUS_ADDR) |
mbed_official | 146:f64d43ff0c18 | 4150 | #define HW_USB_CLK_RECOVER_INT_STATUS_RD() (HW_USB_CLK_RECOVER_INT_STATUS.U) |
mbed_official | 146:f64d43ff0c18 | 4151 | #define HW_USB_CLK_RECOVER_INT_STATUS_WR(v) (HW_USB_CLK_RECOVER_INT_STATUS.U = (v)) |
mbed_official | 146:f64d43ff0c18 | 4152 | #define HW_USB_CLK_RECOVER_INT_STATUS_SET(v) (HW_USB_CLK_RECOVER_INT_STATUS_WR(HW_USB_CLK_RECOVER_INT_STATUS_RD() | (v))) |
mbed_official | 146:f64d43ff0c18 | 4153 | #define HW_USB_CLK_RECOVER_INT_STATUS_CLR(v) (HW_USB_CLK_RECOVER_INT_STATUS_WR(HW_USB_CLK_RECOVER_INT_STATUS_RD() & ~(v))) |
mbed_official | 146:f64d43ff0c18 | 4154 | #define HW_USB_CLK_RECOVER_INT_STATUS_TOG(v) (HW_USB_CLK_RECOVER_INT_STATUS_WR(HW_USB_CLK_RECOVER_INT_STATUS_RD() ^ (v))) |
mbed_official | 146:f64d43ff0c18 | 4155 | #endif |
mbed_official | 146:f64d43ff0c18 | 4156 | //@} |
mbed_official | 146:f64d43ff0c18 | 4157 | |
mbed_official | 146:f64d43ff0c18 | 4158 | /* |
mbed_official | 146:f64d43ff0c18 | 4159 | * Constants & macros for individual USB_CLK_RECOVER_INT_STATUS bitfields |
mbed_official | 146:f64d43ff0c18 | 4160 | */ |
mbed_official | 146:f64d43ff0c18 | 4161 | |
mbed_official | 146:f64d43ff0c18 | 4162 | /*! |
mbed_official | 146:f64d43ff0c18 | 4163 | * @name Register USB_CLK_RECOVER_INT_STATUS, field OVF_ERROR[4] (W1C) |
mbed_official | 146:f64d43ff0c18 | 4164 | * |
mbed_official | 146:f64d43ff0c18 | 4165 | * Indicates that the USB clock recovery algorithm has detected that the |
mbed_official | 146:f64d43ff0c18 | 4166 | * frequency trim adjustment needed for the IRC48M output clock is outside the available |
mbed_official | 146:f64d43ff0c18 | 4167 | * TRIM_FINE adjustment range for the IRC48M module. |
mbed_official | 146:f64d43ff0c18 | 4168 | * |
mbed_official | 146:f64d43ff0c18 | 4169 | * Values: |
mbed_official | 146:f64d43ff0c18 | 4170 | * - 0 - No interrupt is reported |
mbed_official | 146:f64d43ff0c18 | 4171 | * - 1 - Unmasked interrupt has been generated |
mbed_official | 146:f64d43ff0c18 | 4172 | */ |
mbed_official | 146:f64d43ff0c18 | 4173 | //@{ |
mbed_official | 146:f64d43ff0c18 | 4174 | #define BP_USB_CLK_RECOVER_INT_STATUS_OVF_ERROR (4U) //!< Bit position for USB_CLK_RECOVER_INT_STATUS_OVF_ERROR. |
mbed_official | 146:f64d43ff0c18 | 4175 | #define BM_USB_CLK_RECOVER_INT_STATUS_OVF_ERROR (0x10U) //!< Bit mask for USB_CLK_RECOVER_INT_STATUS_OVF_ERROR. |
mbed_official | 146:f64d43ff0c18 | 4176 | #define BS_USB_CLK_RECOVER_INT_STATUS_OVF_ERROR (1U) //!< Bit field size in bits for USB_CLK_RECOVER_INT_STATUS_OVF_ERROR. |
mbed_official | 146:f64d43ff0c18 | 4177 | |
mbed_official | 146:f64d43ff0c18 | 4178 | #ifndef __LANGUAGE_ASM__ |
mbed_official | 146:f64d43ff0c18 | 4179 | //! @brief Read current value of the USB_CLK_RECOVER_INT_STATUS_OVF_ERROR field. |
mbed_official | 146:f64d43ff0c18 | 4180 | #define BR_USB_CLK_RECOVER_INT_STATUS_OVF_ERROR (BITBAND_ACCESS8(HW_USB_CLK_RECOVER_INT_STATUS_ADDR, BP_USB_CLK_RECOVER_INT_STATUS_OVF_ERROR)) |
mbed_official | 146:f64d43ff0c18 | 4181 | #endif |
mbed_official | 146:f64d43ff0c18 | 4182 | |
mbed_official | 146:f64d43ff0c18 | 4183 | //! @brief Format value for bitfield USB_CLK_RECOVER_INT_STATUS_OVF_ERROR. |
mbed_official | 146:f64d43ff0c18 | 4184 | #define BF_USB_CLK_RECOVER_INT_STATUS_OVF_ERROR(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint8_t) << BP_USB_CLK_RECOVER_INT_STATUS_OVF_ERROR), uint8_t) & BM_USB_CLK_RECOVER_INT_STATUS_OVF_ERROR) |
mbed_official | 146:f64d43ff0c18 | 4185 | |
mbed_official | 146:f64d43ff0c18 | 4186 | #ifndef __LANGUAGE_ASM__ |
mbed_official | 146:f64d43ff0c18 | 4187 | //! @brief Set the OVF_ERROR field to a new value. |
mbed_official | 146:f64d43ff0c18 | 4188 | #define BW_USB_CLK_RECOVER_INT_STATUS_OVF_ERROR(v) (BITBAND_ACCESS8(HW_USB_CLK_RECOVER_INT_STATUS_ADDR, BP_USB_CLK_RECOVER_INT_STATUS_OVF_ERROR) = (v)) |
mbed_official | 146:f64d43ff0c18 | 4189 | #endif |
mbed_official | 146:f64d43ff0c18 | 4190 | //@} |
mbed_official | 146:f64d43ff0c18 | 4191 | |
mbed_official | 146:f64d43ff0c18 | 4192 | //------------------------------------------------------------------------------------------- |
mbed_official | 146:f64d43ff0c18 | 4193 | // hw_usb_t - module struct |
mbed_official | 146:f64d43ff0c18 | 4194 | //------------------------------------------------------------------------------------------- |
mbed_official | 146:f64d43ff0c18 | 4195 | /*! |
mbed_official | 146:f64d43ff0c18 | 4196 | * @brief All USB module registers. |
mbed_official | 146:f64d43ff0c18 | 4197 | */ |
mbed_official | 146:f64d43ff0c18 | 4198 | #ifndef __LANGUAGE_ASM__ |
mbed_official | 146:f64d43ff0c18 | 4199 | #pragma pack(1) |
mbed_official | 146:f64d43ff0c18 | 4200 | typedef struct _hw_usb |
mbed_official | 146:f64d43ff0c18 | 4201 | { |
mbed_official | 146:f64d43ff0c18 | 4202 | __I hw_usb_perid_t PERID; //!< [0x0] Peripheral ID register |
mbed_official | 146:f64d43ff0c18 | 4203 | uint8_t _reserved0[3]; |
mbed_official | 146:f64d43ff0c18 | 4204 | __I hw_usb_idcomp_t IDCOMP; //!< [0x4] Peripheral ID Complement register |
mbed_official | 146:f64d43ff0c18 | 4205 | uint8_t _reserved1[3]; |
mbed_official | 146:f64d43ff0c18 | 4206 | __I hw_usb_rev_t REV; //!< [0x8] Peripheral Revision register |
mbed_official | 146:f64d43ff0c18 | 4207 | uint8_t _reserved2[3]; |
mbed_official | 146:f64d43ff0c18 | 4208 | __I hw_usb_addinfo_t ADDINFO; //!< [0xC] Peripheral Additional Info register |
mbed_official | 146:f64d43ff0c18 | 4209 | uint8_t _reserved3[3]; |
mbed_official | 146:f64d43ff0c18 | 4210 | __IO hw_usb_otgistat_t OTGISTAT; //!< [0x10] OTG Interrupt Status register |
mbed_official | 146:f64d43ff0c18 | 4211 | uint8_t _reserved4[3]; |
mbed_official | 146:f64d43ff0c18 | 4212 | __IO hw_usb_otgicr_t OTGICR; //!< [0x14] OTG Interrupt Control register |
mbed_official | 146:f64d43ff0c18 | 4213 | uint8_t _reserved5[3]; |
mbed_official | 146:f64d43ff0c18 | 4214 | __IO hw_usb_otgstat_t OTGSTAT; //!< [0x18] OTG Status register |
mbed_official | 146:f64d43ff0c18 | 4215 | uint8_t _reserved6[3]; |
mbed_official | 146:f64d43ff0c18 | 4216 | __IO hw_usb_otgctl_t OTGCTL; //!< [0x1C] OTG Control register |
mbed_official | 146:f64d43ff0c18 | 4217 | uint8_t _reserved7[99]; |
mbed_official | 146:f64d43ff0c18 | 4218 | __IO hw_usb_istat_t ISTAT; //!< [0x80] Interrupt Status register |
mbed_official | 146:f64d43ff0c18 | 4219 | uint8_t _reserved8[3]; |
mbed_official | 146:f64d43ff0c18 | 4220 | __IO hw_usb_inten_t INTEN; //!< [0x84] Interrupt Enable register |
mbed_official | 146:f64d43ff0c18 | 4221 | uint8_t _reserved9[3]; |
mbed_official | 146:f64d43ff0c18 | 4222 | __IO hw_usb_errstat_t ERRSTAT; //!< [0x88] Error Interrupt Status register |
mbed_official | 146:f64d43ff0c18 | 4223 | uint8_t _reserved10[3]; |
mbed_official | 146:f64d43ff0c18 | 4224 | __IO hw_usb_erren_t ERREN; //!< [0x8C] Error Interrupt Enable register |
mbed_official | 146:f64d43ff0c18 | 4225 | uint8_t _reserved11[3]; |
mbed_official | 146:f64d43ff0c18 | 4226 | __I hw_usb_stat_t STAT; //!< [0x90] Status register |
mbed_official | 146:f64d43ff0c18 | 4227 | uint8_t _reserved12[3]; |
mbed_official | 146:f64d43ff0c18 | 4228 | __IO hw_usb_ctl_t CTL; //!< [0x94] Control register |
mbed_official | 146:f64d43ff0c18 | 4229 | uint8_t _reserved13[3]; |
mbed_official | 146:f64d43ff0c18 | 4230 | __IO hw_usb_addr_t ADDR; //!< [0x98] Address register |
mbed_official | 146:f64d43ff0c18 | 4231 | uint8_t _reserved14[3]; |
mbed_official | 146:f64d43ff0c18 | 4232 | __IO hw_usb_bdtpage1_t BDTPAGE1; //!< [0x9C] BDT Page register 1 |
mbed_official | 146:f64d43ff0c18 | 4233 | uint8_t _reserved15[3]; |
mbed_official | 146:f64d43ff0c18 | 4234 | __IO hw_usb_frmnuml_t FRMNUML; //!< [0xA0] Frame Number register Low |
mbed_official | 146:f64d43ff0c18 | 4235 | uint8_t _reserved16[3]; |
mbed_official | 146:f64d43ff0c18 | 4236 | __IO hw_usb_frmnumh_t FRMNUMH; //!< [0xA4] Frame Number register High |
mbed_official | 146:f64d43ff0c18 | 4237 | uint8_t _reserved17[3]; |
mbed_official | 146:f64d43ff0c18 | 4238 | __IO hw_usb_token_t TOKEN; //!< [0xA8] Token register |
mbed_official | 146:f64d43ff0c18 | 4239 | uint8_t _reserved18[3]; |
mbed_official | 146:f64d43ff0c18 | 4240 | __IO hw_usb_softhld_t SOFTHLD; //!< [0xAC] SOF Threshold register |
mbed_official | 146:f64d43ff0c18 | 4241 | uint8_t _reserved19[3]; |
mbed_official | 146:f64d43ff0c18 | 4242 | __IO hw_usb_bdtpage2_t BDTPAGE2; //!< [0xB0] BDT Page Register 2 |
mbed_official | 146:f64d43ff0c18 | 4243 | uint8_t _reserved20[3]; |
mbed_official | 146:f64d43ff0c18 | 4244 | __IO hw_usb_bdtpage3_t BDTPAGE3; //!< [0xB4] BDT Page Register 3 |
mbed_official | 146:f64d43ff0c18 | 4245 | uint8_t _reserved21[11]; |
mbed_official | 146:f64d43ff0c18 | 4246 | struct { |
mbed_official | 146:f64d43ff0c18 | 4247 | __IO hw_usb_endptn_t ENDPTn; //!< [0xC0] Endpoint Control register |
mbed_official | 146:f64d43ff0c18 | 4248 | uint8_t _reserved0[3]; |
mbed_official | 146:f64d43ff0c18 | 4249 | } ENDPOINT[16]; |
mbed_official | 146:f64d43ff0c18 | 4250 | __IO hw_usb_usbctrl_t USBCTRL; //!< [0x100] USB Control register |
mbed_official | 146:f64d43ff0c18 | 4251 | uint8_t _reserved22[3]; |
mbed_official | 146:f64d43ff0c18 | 4252 | __I hw_usb_observe_t OBSERVE; //!< [0x104] USB OTG Observe register |
mbed_official | 146:f64d43ff0c18 | 4253 | uint8_t _reserved23[3]; |
mbed_official | 146:f64d43ff0c18 | 4254 | __IO hw_usb_control_t CONTROL; //!< [0x108] USB OTG Control register |
mbed_official | 146:f64d43ff0c18 | 4255 | uint8_t _reserved24[3]; |
mbed_official | 146:f64d43ff0c18 | 4256 | __IO hw_usb_usbtrc0_t USBTRC0; //!< [0x10C] USB Transceiver Control register 0 |
mbed_official | 146:f64d43ff0c18 | 4257 | uint8_t _reserved25[7]; |
mbed_official | 146:f64d43ff0c18 | 4258 | __IO hw_usb_usbfrmadjust_t USBFRMADJUST; //!< [0x114] Frame Adjust Register |
mbed_official | 146:f64d43ff0c18 | 4259 | uint8_t _reserved26[43]; |
mbed_official | 146:f64d43ff0c18 | 4260 | __IO hw_usb_clk_recover_ctrl_t CLK_RECOVER_CTRL; //!< [0x140] USB Clock recovery control |
mbed_official | 146:f64d43ff0c18 | 4261 | uint8_t _reserved27[3]; |
mbed_official | 146:f64d43ff0c18 | 4262 | __IO hw_usb_clk_recover_irc_en_t CLK_RECOVER_IRC_EN; //!< [0x144] IRC48M oscillator enable register |
mbed_official | 146:f64d43ff0c18 | 4263 | uint8_t _reserved28[23]; |
mbed_official | 146:f64d43ff0c18 | 4264 | __IO hw_usb_clk_recover_int_status_t CLK_RECOVER_INT_STATUS; //!< [0x15C] Clock recovery separated interrupt status |
mbed_official | 146:f64d43ff0c18 | 4265 | } hw_usb_t; |
mbed_official | 146:f64d43ff0c18 | 4266 | #pragma pack() |
mbed_official | 146:f64d43ff0c18 | 4267 | |
mbed_official | 146:f64d43ff0c18 | 4268 | //! @brief Macro to access all USB registers. |
mbed_official | 146:f64d43ff0c18 | 4269 | //! @return Reference (not a pointer) to the registers struct. To get a pointer to the struct, |
mbed_official | 146:f64d43ff0c18 | 4270 | //! use the '&' operator, like <code>&HW_USB</code>. |
mbed_official | 146:f64d43ff0c18 | 4271 | #define HW_USB (*(hw_usb_t *) REGS_USB_BASE) |
mbed_official | 146:f64d43ff0c18 | 4272 | #endif |
mbed_official | 146:f64d43ff0c18 | 4273 | |
mbed_official | 146:f64d43ff0c18 | 4274 | #endif // __HW_USB_REGISTERS_H__ |
mbed_official | 146:f64d43ff0c18 | 4275 | // v22/130726/0.9 |
mbed_official | 146:f64d43ff0c18 | 4276 | // EOF |