shao ziyang / mbed-src-kl05

mbed library sources

Dependents:   frdm_kl05z_gpio_test

Fork of mbed-src by mbed official

targets/hal/TARGET_Freescale/TARGET_K20D50M/clk_freqs.h@323:9e901b0a5aa1, 2014-09-13 (annotated)

Committer:
shaoziyang
Date:
Sat Sep 13 14:25:46 2014 +0000
Revision:
323:9e901b0a5aa1
Parent:
255:20b371a9491b 
test with CLOCK_SETUP = 0

Who changed what in which revision?

UserRevisionLine numberNew contents of line
mbed_official 73:299c67215126 1 /* mbed Microcontroller Library
mbed_official 73:299c67215126 2 * Copyright (c) 2006-2013 ARM Limited
mbed_official 73:299c67215126 3 *
mbed_official 73:299c67215126 4 * Licensed under the Apache License, Version 2.0 (the "License");
mbed_official 73:299c67215126 5 * you may not use this file except in compliance with the License.
mbed_official 73:299c67215126 6 * You may obtain a copy of the License at
mbed_official 73:299c67215126 7 *
mbed_official 73:299c67215126 8 * http://www.apache.org/licenses/LICENSE-2.0
mbed_official 73:299c67215126 9 *
mbed_official 73:299c67215126 10 * Unless required by applicable law or agreed to in writing, software
mbed_official 73:299c67215126 11 * distributed under the License is distributed on an "AS IS" BASIS,
mbed_official 73:299c67215126 12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
mbed_official 73:299c67215126 13 * See the License for the specific language governing permissions and
mbed_official 73:299c67215126 14 * limitations under the License.
mbed_official 73:299c67215126 15 */
mbed_official 73:299c67215126 16 #ifndef CLK_FREQS_H
mbed_official 73:299c67215126 17 #define CLK_FREQS_H
mbed_official 73:299c67215126 18
mbed_official 73:299c67215126 19 #ifdef __cplusplus
mbed_official 73:299c67215126 20 extern "C" {
mbed_official 73:299c67215126 21 #endif
mbed_official 73:299c67215126 22
mbed_official 73:299c67215126 23 /*!
mbed_official 73:299c67215126 24 * \brief Get the peripheral bus clock frequency
mbed_official 73:299c67215126 25 * \return Bus frequency
mbed_official 73:299c67215126 26 */
mbed_official 73:299c67215126 27 static inline uint32_t bus_frequency(void) {
mbed_official 161:09d8213f0000 28 return SystemCoreClock / (((SIM->CLKDIV1 & SIM_CLKDIV1_OUTDIV2_MASK) >> SIM_CLKDIV1_OUTDIV2_SHIFT) + 1);
mbed_official 73:299c67215126 29 }
mbed_official 73:299c67215126 30
mbed_official 73:299c67215126 31 /*!
mbed_official 73:299c67215126 32 * \brief Get external oscillator (crystal) frequency
mbed_official 73:299c67215126 33 * \return External osc frequency
mbed_official 73:299c67215126 34 */
mbed_official 73:299c67215126 35 static uint32_t extosc_frequency(void) {
mbed_official 73:299c67215126 36 uint32_t MCGClock = SystemCoreClock * (1u + ((SIM->CLKDIV1 & SIM_CLKDIV1_OUTDIV1_MASK) >> SIM_CLKDIV1_OUTDIV1_SHIFT));
mbed_official 73:299c67215126 37
mbed_official 73:299c67215126 38 if ((MCG->C1 & MCG_C1_CLKS_MASK) == MCG_C1_CLKS(2)) //MCG clock = external reference clock
mbed_official 73:299c67215126 39 return MCGClock;
mbed_official 73:299c67215126 40
mbed_official 73:299c67215126 41 if ((MCG->C1 & MCG_C1_CLKS_MASK) == MCG_C1_CLKS(0)) { //PLL/FLL is selected
mbed_official 73:299c67215126 42 uint32_t divider, multiplier;
mbed_official 73:299c67215126 43 if ((MCG->C6 & MCG_C6_PLLS_MASK) == 0x0u) { //FLL is selected
mbed_official 73:299c67215126 44 if ((MCG->S & MCG_S_IREFST_MASK) == 0x0u) { //FLL uses external reference
mbed_official 73:299c67215126 45 divider = (uint8_t)(1u << ((MCG->C1 & MCG_C1_FRDIV_MASK) >> MCG_C1_FRDIV_SHIFT));
mbed_official 73:299c67215126 46 if ((MCG->C2 & MCG_C2_RANGE0_MASK) != 0x0u)
mbed_official 73:299c67215126 47 divider <<= 5u;
mbed_official 73:299c67215126 48 /* Select correct multiplier to calculate the MCG output clock */
mbed_official 73:299c67215126 49 switch (MCG->C4 & (MCG_C4_DMX32_MASK | MCG_C4_DRST_DRS_MASK)) {
mbed_official 73:299c67215126 50 case 0x0u:
mbed_official 73:299c67215126 51 multiplier = 640u;
mbed_official 73:299c67215126 52 break;
mbed_official 73:299c67215126 53 case 0x20u:
mbed_official 73:299c67215126 54 multiplier = 1280u;
mbed_official 73:299c67215126 55 break;
mbed_official 73:299c67215126 56 case 0x40u:
mbed_official 73:299c67215126 57 multiplier = 1920u;
mbed_official 73:299c67215126 58 break;
mbed_official 73:299c67215126 59 case 0x60u:
mbed_official 73:299c67215126 60 multiplier = 2560u;
mbed_official 73:299c67215126 61 break;
mbed_official 73:299c67215126 62 case 0x80u:
mbed_official 73:299c67215126 63 multiplier = 732u;
mbed_official 73:299c67215126 64 break;
mbed_official 73:299c67215126 65 case 0xA0u:
mbed_official 73:299c67215126 66 multiplier = 1464u;
mbed_official 73:299c67215126 67 break;
mbed_official 73:299c67215126 68 case 0xC0u:
mbed_official 73:299c67215126 69 multiplier = 2197u;
mbed_official 73:299c67215126 70 break;
mbed_official 73:299c67215126 71 case 0xE0u:
mbed_official 73:299c67215126 72 default:
mbed_official 73:299c67215126 73 multiplier = 2929u;
mbed_official 73:299c67215126 74 break;
mbed_official 73:299c67215126 75 }
mbed_official 73:299c67215126 76
mbed_official 73:299c67215126 77 return MCGClock * divider / multiplier;
mbed_official 73:299c67215126 78 }
mbed_official 73:299c67215126 79 } else { //PLL is selected
mbed_official 73:299c67215126 80 divider = (1u + (MCG->C5 & MCG_C5_PRDIV0_MASK));
mbed_official 73:299c67215126 81 multiplier = ((MCG->C6 & MCG_C6_VDIV0_MASK) + 24u);
mbed_official 73:299c67215126 82 return MCGClock * divider / multiplier;
mbed_official 73:299c67215126 83 }
mbed_official 73:299c67215126 84 }
mbed_official 73:299c67215126 85
mbed_official 73:299c67215126 86 //In all other cases either there is no crystal or we cannot determine it
mbed_official 73:299c67215126 87 //For example when the FLL is running on the internal reference, and there is also an
mbed_official 73:299c67215126 88 //external crystal. However these are unlikely situations
mbed_official 73:299c67215126 89 return 0;
mbed_official 73:299c67215126 90 }
mbed_official 73:299c67215126 91
mbed_official 73:299c67215126 92
mbed_official 73:299c67215126 93 #ifdef __cplusplus
mbed_official 73:299c67215126 94 }
mbed_official 73:299c67215126 95 #endif
mbed_official 73:299c67215126 96
mbed_official 73:299c67215126 97 #endif