shao ziyang / mbed-src-kl05

mbed library sources

Dependents:   frdm_kl05z_gpio_test

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targets/cmsis/TARGET_STM/TARGET_STM32F407VG/stm32f4xx_hal_sdram.h@323:9e901b0a5aa1, 2014-09-13 (annotated)

Committer:
shaoziyang
Date:
Sat Sep 13 14:25:46 2014 +0000
Revision:
323:9e901b0a5aa1
Parent:
296:ec1b66a3d094 
test with CLOCK_SETUP = 0

Who changed what in which revision?

UserRevisionLine numberNew contents of line
mbed_official 133:d4dda5c437f0 1 /**
mbed_official 133:d4dda5c437f0 2 ******************************************************************************
mbed_official 133:d4dda5c437f0 3 * @file stm32f4xx_hal_sdram.h
mbed_official 133:d4dda5c437f0 4 * @author MCD Application Team
mbed_official 242:7074e42da0b2 5 * @version V1.1.0RC2
mbed_official 242:7074e42da0b2 6 * @date 14-May-2014
mbed_official 133:d4dda5c437f0 7 * @brief Header file of SDRAM HAL module.
mbed_official 133:d4dda5c437f0 8 ******************************************************************************
mbed_official 133:d4dda5c437f0 9 * @attention
mbed_official 133:d4dda5c437f0 10 *
mbed_official 133:d4dda5c437f0 11 * <h2><center>&copy; COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
mbed_official 133:d4dda5c437f0 12 *
mbed_official 133:d4dda5c437f0 13 * Redistribution and use in source and binary forms, with or without modification,
mbed_official 133:d4dda5c437f0 14 * are permitted provided that the following conditions are met:
mbed_official 133:d4dda5c437f0 15 * 1. Redistributions of source code must retain the above copyright notice,
mbed_official 133:d4dda5c437f0 16 * this list of conditions and the following disclaimer.
mbed_official 133:d4dda5c437f0 17 * 2. Redistributions in binary form must reproduce the above copyright notice,
mbed_official 133:d4dda5c437f0 18 * this list of conditions and the following disclaimer in the documentation
mbed_official 133:d4dda5c437f0 19 * and/or other materials provided with the distribution.
mbed_official 133:d4dda5c437f0 20 * 3. Neither the name of STMicroelectronics nor the names of its contributors
mbed_official 133:d4dda5c437f0 21 * may be used to endorse or promote products derived from this software
mbed_official 133:d4dda5c437f0 22 * without specific prior written permission.
mbed_official 133:d4dda5c437f0 23 *
mbed_official 133:d4dda5c437f0 24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
mbed_official 133:d4dda5c437f0 25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
mbed_official 133:d4dda5c437f0 26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
mbed_official 133:d4dda5c437f0 27 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
mbed_official 133:d4dda5c437f0 28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
mbed_official 133:d4dda5c437f0 29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
mbed_official 133:d4dda5c437f0 30 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
mbed_official 133:d4dda5c437f0 31 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
mbed_official 133:d4dda5c437f0 32 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
mbed_official 133:d4dda5c437f0 33 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
mbed_official 133:d4dda5c437f0 34 *
mbed_official 133:d4dda5c437f0 35 ******************************************************************************
mbed_official 133:d4dda5c437f0 36 */
mbed_official 133:d4dda5c437f0 37
mbed_official 133:d4dda5c437f0 38 /* Define to prevent recursive inclusion -------------------------------------*/
mbed_official 133:d4dda5c437f0 39 #ifndef __STM32F4xx_HAL_SDRAM_H
mbed_official 133:d4dda5c437f0 40 #define __STM32F4xx_HAL_SDRAM_H
mbed_official 133:d4dda5c437f0 41
mbed_official 133:d4dda5c437f0 42 #ifdef __cplusplus
mbed_official 133:d4dda5c437f0 43 extern "C" {
mbed_official 133:d4dda5c437f0 44 #endif
mbed_official 133:d4dda5c437f0 45
mbed_official 133:d4dda5c437f0 46 #if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx)
mbed_official 133:d4dda5c437f0 47
mbed_official 133:d4dda5c437f0 48 /* Includes ------------------------------------------------------------------*/
mbed_official 133:d4dda5c437f0 49 #include "stm32f4xx_ll_fmc.h"
mbed_official 133:d4dda5c437f0 50
mbed_official 133:d4dda5c437f0 51 /** @addtogroup STM32F4xx_HAL_Driver
mbed_official 133:d4dda5c437f0 52 * @{
mbed_official 133:d4dda5c437f0 53 */
mbed_official 133:d4dda5c437f0 54
mbed_official 133:d4dda5c437f0 55 /** @addtogroup SDRAM
mbed_official 133:d4dda5c437f0 56 * @{
mbed_official 133:d4dda5c437f0 57 */
mbed_official 133:d4dda5c437f0 58
mbed_official 133:d4dda5c437f0 59 /* Exported typedef ----------------------------------------------------------*/
mbed_official 133:d4dda5c437f0 60
mbed_official 133:d4dda5c437f0 61 /**
mbed_official 133:d4dda5c437f0 62 * @brief HAL SDRAM State structure definition
mbed_official 133:d4dda5c437f0 63 */
mbed_official 133:d4dda5c437f0 64 typedef enum
mbed_official 133:d4dda5c437f0 65 {
mbed_official 133:d4dda5c437f0 66 HAL_SDRAM_STATE_RESET = 0x00, /*!< SDRAM not yet initialized or disabled */
mbed_official 133:d4dda5c437f0 67 HAL_SDRAM_STATE_READY = 0x01, /*!< SDRAM initialized and ready for use */
mbed_official 133:d4dda5c437f0 68 HAL_SDRAM_STATE_BUSY = 0x02, /*!< SDRAM internal process is ongoing */
mbed_official 133:d4dda5c437f0 69 HAL_SDRAM_STATE_ERROR = 0x03, /*!< SDRAM error state */
mbed_official 133:d4dda5c437f0 70 HAL_SDRAM_STATE_WRITE_PROTECTED = 0x04, /*!< SDRAM device write protected */
mbed_official 133:d4dda5c437f0 71 HAL_SDRAM_STATE_PRECHARGED = 0x05 /*!< SDRAM device precharged */
mbed_official 133:d4dda5c437f0 72
mbed_official 133:d4dda5c437f0 73 }HAL_SDRAM_StateTypeDef;
mbed_official 133:d4dda5c437f0 74
mbed_official 133:d4dda5c437f0 75 /**
mbed_official 133:d4dda5c437f0 76 * @brief SDRAM handle Structure definition
mbed_official 133:d4dda5c437f0 77 */
mbed_official 133:d4dda5c437f0 78 typedef struct
mbed_official 133:d4dda5c437f0 79 {
mbed_official 133:d4dda5c437f0 80 FMC_SDRAM_TypeDef *Instance; /*!< Register base address */
mbed_official 133:d4dda5c437f0 81
mbed_official 133:d4dda5c437f0 82 FMC_SDRAM_InitTypeDef Init; /*!< SDRAM device configuration parameters */
mbed_official 133:d4dda5c437f0 83
mbed_official 133:d4dda5c437f0 84 __IO HAL_SDRAM_StateTypeDef State; /*!< SDRAM access state */
mbed_official 133:d4dda5c437f0 85
mbed_official 133:d4dda5c437f0 86 HAL_LockTypeDef Lock; /*!< SDRAM locking object */
mbed_official 133:d4dda5c437f0 87
mbed_official 133:d4dda5c437f0 88 DMA_HandleTypeDef *hdma; /*!< Pointer DMA handler */
mbed_official 133:d4dda5c437f0 89
mbed_official 133:d4dda5c437f0 90 }SDRAM_HandleTypeDef;
mbed_official 133:d4dda5c437f0 91
mbed_official 242:7074e42da0b2 92 /* Exported types ------------------------------------------------------------*/
mbed_official 133:d4dda5c437f0 93 /* Exported macro ------------------------------------------------------------*/
mbed_official 242:7074e42da0b2 94
mbed_official 242:7074e42da0b2 95 /** @brief Reset SDRAM handle state
mbed_official 242:7074e42da0b2 96 * @param __HANDLE__: specifies the SDRAM handle.
mbed_official 242:7074e42da0b2 97 * @retval None
mbed_official 242:7074e42da0b2 98 */
mbed_official 242:7074e42da0b2 99 #define __HAL_SDRAM_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_SDRAM_STATE_RESET)
mbed_official 242:7074e42da0b2 100
mbed_official 133:d4dda5c437f0 101 /* Exported functions --------------------------------------------------------*/
mbed_official 133:d4dda5c437f0 102
mbed_official 133:d4dda5c437f0 103 /* Initialization/de-initialization functions **********************************/
mbed_official 133:d4dda5c437f0 104 HAL_StatusTypeDef HAL_SDRAM_Init(SDRAM_HandleTypeDef *hsdram, FMC_SDRAM_TimingTypeDef *Timing);
mbed_official 133:d4dda5c437f0 105 HAL_StatusTypeDef HAL_SDRAM_DeInit(SDRAM_HandleTypeDef *hsdram);
mbed_official 133:d4dda5c437f0 106 void HAL_SDRAM_MspInit(SDRAM_HandleTypeDef *hsdram);
mbed_official 133:d4dda5c437f0 107 void HAL_SDRAM_MspDeInit(SDRAM_HandleTypeDef *hsdram);
mbed_official 133:d4dda5c437f0 108
mbed_official 133:d4dda5c437f0 109 void HAL_SDRAM_IRQHandler(SDRAM_HandleTypeDef *hsdram);
mbed_official 133:d4dda5c437f0 110 void HAL_SDRAM_RefreshErrorCallback(SDRAM_HandleTypeDef *hsdram);
mbed_official 133:d4dda5c437f0 111 void HAL_SDRAM_DMA_XferCpltCallback(DMA_HandleTypeDef *hdma);
mbed_official 133:d4dda5c437f0 112 void HAL_SDRAM_DMA_XferErrorCallback(DMA_HandleTypeDef *hdma);
mbed_official 133:d4dda5c437f0 113
mbed_official 133:d4dda5c437f0 114 /* I/O operation functions *****************************************************/
mbed_official 133:d4dda5c437f0 115 HAL_StatusTypeDef HAL_SDRAM_Read_8b(SDRAM_HandleTypeDef *hsdram, uint32_t *pAddress, uint8_t *pDstBuffer, uint32_t BufferSize);
mbed_official 133:d4dda5c437f0 116 HAL_StatusTypeDef HAL_SDRAM_Write_8b(SDRAM_HandleTypeDef *hsdram, uint32_t *pAddress, uint8_t *pSrcBuffer, uint32_t BufferSize);
mbed_official 133:d4dda5c437f0 117 HAL_StatusTypeDef HAL_SDRAM_Read_16b(SDRAM_HandleTypeDef *hsdram, uint32_t *pAddress, uint16_t *pDstBuffer, uint32_t BufferSize);
mbed_official 133:d4dda5c437f0 118 HAL_StatusTypeDef HAL_SDRAM_Write_16b(SDRAM_HandleTypeDef *hsdram, uint32_t *pAddress, uint16_t *pSrcBuffer, uint32_t BufferSize);
mbed_official 133:d4dda5c437f0 119 HAL_StatusTypeDef HAL_SDRAM_Read_32b(SDRAM_HandleTypeDef *hsdram, uint32_t *pAddress, uint32_t *pDstBuffer, uint32_t BufferSize);
mbed_official 133:d4dda5c437f0 120 HAL_StatusTypeDef HAL_SDRAM_Write_32b(SDRAM_HandleTypeDef *hsdram, uint32_t *pAddress, uint32_t *pSrcBuffer, uint32_t BufferSize);
mbed_official 133:d4dda5c437f0 121
mbed_official 133:d4dda5c437f0 122 HAL_StatusTypeDef HAL_SDRAM_Read_DMA(SDRAM_HandleTypeDef *hsdram, uint32_t * pAddress, uint32_t *pDstBuffer, uint32_t BufferSize);
mbed_official 133:d4dda5c437f0 123 HAL_StatusTypeDef HAL_SDRAM_Write_DMA(SDRAM_HandleTypeDef *hsdram, uint32_t *pAddress, uint32_t *pSrcBuffer, uint32_t BufferSize);
mbed_official 133:d4dda5c437f0 124
mbed_official 133:d4dda5c437f0 125 /* SDRAM Control functions *****************************************************/
mbed_official 133:d4dda5c437f0 126 HAL_StatusTypeDef HAL_SDRAM_WriteProtection_Enable(SDRAM_HandleTypeDef *hsdram);
mbed_official 133:d4dda5c437f0 127 HAL_StatusTypeDef HAL_SDRAM_WriteProtection_Disable(SDRAM_HandleTypeDef *hsdram);
mbed_official 133:d4dda5c437f0 128 HAL_StatusTypeDef HAL_SDRAM_SendCommand(SDRAM_HandleTypeDef *hsdram, FMC_SDRAM_CommandTypeDef *Command, uint32_t Timeout);
mbed_official 133:d4dda5c437f0 129 HAL_StatusTypeDef HAL_SDRAM_ProgramRefreshRate(SDRAM_HandleTypeDef *hsdram, uint32_t RefreshRate);
mbed_official 133:d4dda5c437f0 130 HAL_StatusTypeDef HAL_SDRAM_SetAutoRefreshNumber(SDRAM_HandleTypeDef *hsdram, uint32_t AutoRefreshNumber);
mbed_official 133:d4dda5c437f0 131 uint32_t HAL_SDRAM_GetModeStatus(SDRAM_HandleTypeDef *hsdram);
mbed_official 133:d4dda5c437f0 132
mbed_official 133:d4dda5c437f0 133 /* SDRAM State functions ********************************************************/
mbed_official 133:d4dda5c437f0 134 HAL_SDRAM_StateTypeDef HAL_SDRAM_GetState(SDRAM_HandleTypeDef *hsdram);
mbed_official 133:d4dda5c437f0 135
mbed_official 133:d4dda5c437f0 136 #endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx */
mbed_official 133:d4dda5c437f0 137 /**
mbed_official 133:d4dda5c437f0 138 * @}
mbed_official 133:d4dda5c437f0 139 */
mbed_official 133:d4dda5c437f0 140
mbed_official 133:d4dda5c437f0 141 /**
mbed_official 133:d4dda5c437f0 142 * @}
mbed_official 133:d4dda5c437f0 143 */
mbed_official 133:d4dda5c437f0 144
mbed_official 133:d4dda5c437f0 145 #ifdef __cplusplus
mbed_official 133:d4dda5c437f0 146 }
mbed_official 133:d4dda5c437f0 147 #endif
mbed_official 133:d4dda5c437f0 148
mbed_official 133:d4dda5c437f0 149 #endif /* __STM32F4xx_HAL_SDRAM_H */
mbed_official 133:d4dda5c437f0 150
mbed_official 133:d4dda5c437f0 151 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/