mbed library sources

Dependents:   frdm_kl05z_gpio_test

Fork of mbed-src by mbed official

Committer:
shaoziyang
Date:
Sat Sep 13 14:25:46 2014 +0000
Revision:
323:9e901b0a5aa1
Parent:
296:ec1b66a3d094
test with CLOCK_SETUP = 0

Who changed what in which revision?

UserRevisionLine numberNew contents of line
mbed_official 133:d4dda5c437f0 1 /**
mbed_official 133:d4dda5c437f0 2 ******************************************************************************
mbed_official 133:d4dda5c437f0 3 * @file stm32f4xx_hal_pwr.h
mbed_official 133:d4dda5c437f0 4 * @author MCD Application Team
mbed_official 242:7074e42da0b2 5 * @version V1.1.0RC2
mbed_official 242:7074e42da0b2 6 * @date 14-May-2014
mbed_official 133:d4dda5c437f0 7 * @brief Header file of PWR HAL module.
mbed_official 133:d4dda5c437f0 8 ******************************************************************************
mbed_official 133:d4dda5c437f0 9 * @attention
mbed_official 133:d4dda5c437f0 10 *
mbed_official 133:d4dda5c437f0 11 * <h2><center>&copy; COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
mbed_official 133:d4dda5c437f0 12 *
mbed_official 133:d4dda5c437f0 13 * Redistribution and use in source and binary forms, with or without modification,
mbed_official 133:d4dda5c437f0 14 * are permitted provided that the following conditions are met:
mbed_official 133:d4dda5c437f0 15 * 1. Redistributions of source code must retain the above copyright notice,
mbed_official 133:d4dda5c437f0 16 * this list of conditions and the following disclaimer.
mbed_official 133:d4dda5c437f0 17 * 2. Redistributions in binary form must reproduce the above copyright notice,
mbed_official 133:d4dda5c437f0 18 * this list of conditions and the following disclaimer in the documentation
mbed_official 133:d4dda5c437f0 19 * and/or other materials provided with the distribution.
mbed_official 133:d4dda5c437f0 20 * 3. Neither the name of STMicroelectronics nor the names of its contributors
mbed_official 133:d4dda5c437f0 21 * may be used to endorse or promote products derived from this software
mbed_official 133:d4dda5c437f0 22 * without specific prior written permission.
mbed_official 133:d4dda5c437f0 23 *
mbed_official 133:d4dda5c437f0 24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
mbed_official 133:d4dda5c437f0 25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
mbed_official 133:d4dda5c437f0 26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
mbed_official 133:d4dda5c437f0 27 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
mbed_official 133:d4dda5c437f0 28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
mbed_official 133:d4dda5c437f0 29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
mbed_official 133:d4dda5c437f0 30 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
mbed_official 133:d4dda5c437f0 31 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
mbed_official 133:d4dda5c437f0 32 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
mbed_official 133:d4dda5c437f0 33 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
mbed_official 133:d4dda5c437f0 34 *
mbed_official 133:d4dda5c437f0 35 ******************************************************************************
mbed_official 133:d4dda5c437f0 36 */
mbed_official 133:d4dda5c437f0 37
mbed_official 133:d4dda5c437f0 38 /* Define to prevent recursive inclusion -------------------------------------*/
mbed_official 133:d4dda5c437f0 39 #ifndef __STM32F4xx_HAL_PWR_H
mbed_official 133:d4dda5c437f0 40 #define __STM32F4xx_HAL_PWR_H
mbed_official 133:d4dda5c437f0 41
mbed_official 133:d4dda5c437f0 42 #ifdef __cplusplus
mbed_official 133:d4dda5c437f0 43 extern "C" {
mbed_official 133:d4dda5c437f0 44 #endif
mbed_official 133:d4dda5c437f0 45
mbed_official 133:d4dda5c437f0 46 /* Includes ------------------------------------------------------------------*/
mbed_official 133:d4dda5c437f0 47 #include "stm32f4xx_hal_def.h"
mbed_official 133:d4dda5c437f0 48
mbed_official 133:d4dda5c437f0 49 /** @addtogroup STM32F4xx_HAL_Driver
mbed_official 133:d4dda5c437f0 50 * @{
mbed_official 133:d4dda5c437f0 51 */
mbed_official 133:d4dda5c437f0 52
mbed_official 133:d4dda5c437f0 53 /** @addtogroup PWR
mbed_official 133:d4dda5c437f0 54 * @{
mbed_official 133:d4dda5c437f0 55 */
mbed_official 133:d4dda5c437f0 56
mbed_official 133:d4dda5c437f0 57 /* Exported types ------------------------------------------------------------*/
mbed_official 133:d4dda5c437f0 58 /**
mbed_official 133:d4dda5c437f0 59 * @brief PWR PVD configuration structure definition
mbed_official 133:d4dda5c437f0 60 */
mbed_official 133:d4dda5c437f0 61 typedef struct
mbed_official 133:d4dda5c437f0 62 {
mbed_official 242:7074e42da0b2 63 uint32_t PVDLevel; /*!< PVDLevel: Specifies the PVD detection level.
mbed_official 133:d4dda5c437f0 64 This parameter can be a value of @ref PWR_PVD_detection_level */
mbed_official 133:d4dda5c437f0 65
mbed_official 133:d4dda5c437f0 66 uint32_t Mode; /*!< Mode: Specifies the operating mode for the selected pins.
mbed_official 133:d4dda5c437f0 67 This parameter can be a value of @ref PWR_PVD_Mode */
mbed_official 133:d4dda5c437f0 68 }PWR_PVDTypeDef;
mbed_official 133:d4dda5c437f0 69
mbed_official 133:d4dda5c437f0 70 /* Exported constants --------------------------------------------------------*/
mbed_official 133:d4dda5c437f0 71 /* ------------- PWR registers bit address in the alias region ---------------*/
mbed_official 133:d4dda5c437f0 72 #define PWR_OFFSET (PWR_BASE - PERIPH_BASE)
mbed_official 133:d4dda5c437f0 73
mbed_official 133:d4dda5c437f0 74 /* --- CR Register ---*/
mbed_official 133:d4dda5c437f0 75 /* Alias word address of DBP bit */
mbed_official 133:d4dda5c437f0 76 #define CR_OFFSET (PWR_OFFSET + 0x00)
mbed_official 133:d4dda5c437f0 77 #define DBP_BitNumber 0x08
mbed_official 133:d4dda5c437f0 78 #define CR_DBP_BB (PERIPH_BB_BASE + (CR_OFFSET * 32) + (DBP_BitNumber * 4))
mbed_official 133:d4dda5c437f0 79
mbed_official 133:d4dda5c437f0 80 /* Alias word address of PVDE bit */
mbed_official 133:d4dda5c437f0 81 #define PVDE_BitNumber 0x04
mbed_official 133:d4dda5c437f0 82 #define CR_PVDE_BB (PERIPH_BB_BASE + (CR_OFFSET * 32) + (PVDE_BitNumber * 4))
mbed_official 133:d4dda5c437f0 83
mbed_official 133:d4dda5c437f0 84 /* Alias word address of FPDS bit */
mbed_official 133:d4dda5c437f0 85 #define FPDS_BitNumber 0x09
mbed_official 133:d4dda5c437f0 86 #define CR_FPDS_BB (PERIPH_BB_BASE + (CR_OFFSET * 32) + (FPDS_BitNumber * 4))
mbed_official 133:d4dda5c437f0 87
mbed_official 133:d4dda5c437f0 88 /* Alias word address of PMODE bit */
mbed_official 133:d4dda5c437f0 89 #define PMODE_BitNumber 0x0E
mbed_official 133:d4dda5c437f0 90 #define CR_PMODE_BB (PERIPH_BB_BASE + (CR_OFFSET * 32) + (PMODE_BitNumber * 4))
mbed_official 133:d4dda5c437f0 91
mbed_official 133:d4dda5c437f0 92 /* --- CSR Register ---*/
mbed_official 133:d4dda5c437f0 93 /* Alias word address of EWUP bit */
mbed_official 133:d4dda5c437f0 94 #define CSR_OFFSET (PWR_OFFSET + 0x04)
mbed_official 133:d4dda5c437f0 95 #define EWUP_BitNumber 0x08
mbed_official 133:d4dda5c437f0 96 #define CSR_EWUP_BB (PERIPH_BB_BASE + (CSR_OFFSET * 32) + (EWUP_BitNumber * 4))
mbed_official 133:d4dda5c437f0 97
mbed_official 133:d4dda5c437f0 98 /* Alias word address of BRE bit */
mbed_official 133:d4dda5c437f0 99 #define BRE_BitNumber 0x09
mbed_official 133:d4dda5c437f0 100 #define CSR_BRE_BB (PERIPH_BB_BASE + (CSR_OFFSET * 32) + (BRE_BitNumber * 4))
mbed_official 133:d4dda5c437f0 101
mbed_official 133:d4dda5c437f0 102 /** @defgroup PWR_Exported_Constants
mbed_official 133:d4dda5c437f0 103 * @{
mbed_official 133:d4dda5c437f0 104 */
mbed_official 133:d4dda5c437f0 105
mbed_official 133:d4dda5c437f0 106 /** @defgroup PWR_WakeUp_Pins
mbed_official 133:d4dda5c437f0 107 * @{
mbed_official 133:d4dda5c437f0 108 */
mbed_official 133:d4dda5c437f0 109
mbed_official 133:d4dda5c437f0 110 #define PWR_WAKEUP_PIN1 PWR_CSR_EWUP
mbed_official 133:d4dda5c437f0 111 #define IS_PWR_WAKEUP_PIN(PIN) ((PIN) == PWR_WAKEUP_PIN1)
mbed_official 133:d4dda5c437f0 112 /**
mbed_official 133:d4dda5c437f0 113 * @}
mbed_official 133:d4dda5c437f0 114 */
mbed_official 133:d4dda5c437f0 115
mbed_official 133:d4dda5c437f0 116 /** @defgroup PWR_PVD_detection_level
mbed_official 133:d4dda5c437f0 117 * @{
mbed_official 133:d4dda5c437f0 118 */
mbed_official 133:d4dda5c437f0 119 #define PWR_PVDLEVEL_0 PWR_CR_PLS_LEV0
mbed_official 133:d4dda5c437f0 120 #define PWR_PVDLEVEL_1 PWR_CR_PLS_LEV1
mbed_official 133:d4dda5c437f0 121 #define PWR_PVDLEVEL_2 PWR_CR_PLS_LEV2
mbed_official 133:d4dda5c437f0 122 #define PWR_PVDLEVEL_3 PWR_CR_PLS_LEV3
mbed_official 133:d4dda5c437f0 123 #define PWR_PVDLEVEL_4 PWR_CR_PLS_LEV4
mbed_official 133:d4dda5c437f0 124 #define PWR_PVDLEVEL_5 PWR_CR_PLS_LEV5
mbed_official 133:d4dda5c437f0 125 #define PWR_PVDLEVEL_6 PWR_CR_PLS_LEV6
mbed_official 133:d4dda5c437f0 126 #define PWR_PVDLEVEL_7 PWR_CR_PLS_LEV7
mbed_official 133:d4dda5c437f0 127 #define IS_PWR_PVD_LEVEL(LEVEL) (((LEVEL) == PWR_PVDLEVEL_0) || ((LEVEL) == PWR_PVDLEVEL_1)|| \
mbed_official 133:d4dda5c437f0 128 ((LEVEL) == PWR_PVDLEVEL_2) || ((LEVEL) == PWR_PVDLEVEL_3)|| \
mbed_official 133:d4dda5c437f0 129 ((LEVEL) == PWR_PVDLEVEL_4) || ((LEVEL) == PWR_PVDLEVEL_5)|| \
mbed_official 133:d4dda5c437f0 130 ((LEVEL) == PWR_PVDLEVEL_6) || ((LEVEL) == PWR_PVDLEVEL_7))
mbed_official 133:d4dda5c437f0 131 /**
mbed_official 133:d4dda5c437f0 132 * @}
mbed_official 133:d4dda5c437f0 133 */
mbed_official 133:d4dda5c437f0 134
mbed_official 133:d4dda5c437f0 135 /** @defgroup PWR_PVD_Mode
mbed_official 133:d4dda5c437f0 136 * @{
mbed_official 133:d4dda5c437f0 137 */
mbed_official 133:d4dda5c437f0 138 #define PWR_MODE_EVT ((uint32_t)0x00000000) /*!< No Interrupt */
mbed_official 133:d4dda5c437f0 139 #define PWR_MODE_IT_RISING ((uint32_t)0x00000001) /*!< External Interrupt Mode with Rising edge trigger detection */
mbed_official 133:d4dda5c437f0 140 #define PWR_MODE_IT_FALLING ((uint32_t)0x00000002) /*!< External Interrupt Mode with Falling edge trigger detection */
mbed_official 133:d4dda5c437f0 141 #define PWR_MODE_IT_RISING_FALLING ((uint32_t)0x00000003) /*!< External Interrupt Mode with Rising/Falling edge trigger detection */
mbed_official 133:d4dda5c437f0 142 #define IS_PWR_PVD_MODE(MODE) (((MODE) == PWR_MODE_EVT) || ((MODE) == PWR_MODE_IT_RISING)|| \
mbed_official 133:d4dda5c437f0 143 ((MODE) == PWR_MODE_IT_FALLING) || ((MODE) == PWR_MODE_IT_RISING_FALLING))
mbed_official 133:d4dda5c437f0 144 /**
mbed_official 133:d4dda5c437f0 145 * @}
mbed_official 133:d4dda5c437f0 146 */
mbed_official 133:d4dda5c437f0 147
mbed_official 133:d4dda5c437f0 148 /** @defgroup PWR_Regulator_state_in_STOP_mode
mbed_official 133:d4dda5c437f0 149 * @{
mbed_official 133:d4dda5c437f0 150 */
mbed_official 133:d4dda5c437f0 151 #define PWR_MAINREGULATOR_ON ((uint32_t)0x00000000)
mbed_official 133:d4dda5c437f0 152 #define PWR_LOWPOWERREGULATOR_ON PWR_CR_LPDS
mbed_official 133:d4dda5c437f0 153
mbed_official 133:d4dda5c437f0 154 #define IS_PWR_REGULATOR(REGULATOR) (((REGULATOR) == PWR_MAINREGULATOR_ON) || \
mbed_official 133:d4dda5c437f0 155 ((REGULATOR) == PWR_LOWPOWERREGULATOR_ON))
mbed_official 133:d4dda5c437f0 156 /**
mbed_official 133:d4dda5c437f0 157 * @}
mbed_official 133:d4dda5c437f0 158 */
mbed_official 133:d4dda5c437f0 159
mbed_official 133:d4dda5c437f0 160 /** @defgroup PWR_SLEEP_mode_entry
mbed_official 133:d4dda5c437f0 161 * @{
mbed_official 133:d4dda5c437f0 162 */
mbed_official 133:d4dda5c437f0 163 #define PWR_SLEEPENTRY_WFI ((uint8_t)0x01)
mbed_official 133:d4dda5c437f0 164 #define PWR_SLEEPENTRY_WFE ((uint8_t)0x02)
mbed_official 133:d4dda5c437f0 165 #define IS_PWR_SLEEP_ENTRY(ENTRY) (((ENTRY) == PWR_SLEEPENTRY_WFI) || ((ENTRY) == PWR_SLEEPENTRY_WFE))
mbed_official 133:d4dda5c437f0 166 /**
mbed_official 133:d4dda5c437f0 167 * @}
mbed_official 133:d4dda5c437f0 168 */
mbed_official 133:d4dda5c437f0 169
mbed_official 133:d4dda5c437f0 170 /** @defgroup PWR_STOP_mode_entry
mbed_official 133:d4dda5c437f0 171 * @{
mbed_official 133:d4dda5c437f0 172 */
mbed_official 133:d4dda5c437f0 173 #define PWR_STOPENTRY_WFI ((uint8_t)0x01)
mbed_official 133:d4dda5c437f0 174 #define PWR_STOPENTRY_WFE ((uint8_t)0x02)
mbed_official 133:d4dda5c437f0 175 #define IS_PWR_STOP_ENTRY(ENTRY) (((ENTRY) == PWR_STOPENTRY_WFI) || ((ENTRY) == PWR_STOPENTRY_WFE))
mbed_official 133:d4dda5c437f0 176 /**
mbed_official 133:d4dda5c437f0 177 * @}
mbed_official 133:d4dda5c437f0 178 */
mbed_official 133:d4dda5c437f0 179
mbed_official 133:d4dda5c437f0 180 /** @defgroup PWR_Regulator_Voltage_Scale
mbed_official 133:d4dda5c437f0 181 * @{
mbed_official 133:d4dda5c437f0 182 */
mbed_official 133:d4dda5c437f0 183 #define PWR_REGULATOR_VOLTAGE_SCALE1 ((uint32_t)0x0000C000)
mbed_official 133:d4dda5c437f0 184 #define PWR_REGULATOR_VOLTAGE_SCALE2 ((uint32_t)0x00008000)
mbed_official 133:d4dda5c437f0 185 #define PWR_REGULATOR_VOLTAGE_SCALE3 ((uint32_t)0x00004000)
mbed_official 133:d4dda5c437f0 186 #define IS_PWR_REGULATOR_VOLTAGE(VOLTAGE) (((VOLTAGE) == PWR_REGULATOR_VOLTAGE_SCALE1) || \
mbed_official 133:d4dda5c437f0 187 ((VOLTAGE) == PWR_REGULATOR_VOLTAGE_SCALE2) || \
mbed_official 133:d4dda5c437f0 188 ((VOLTAGE) == PWR_REGULATOR_VOLTAGE_SCALE3))
mbed_official 133:d4dda5c437f0 189 /**
mbed_official 133:d4dda5c437f0 190 * @}
mbed_official 133:d4dda5c437f0 191 */
mbed_official 133:d4dda5c437f0 192
mbed_official 133:d4dda5c437f0 193 /** @defgroup PWR_Flag
mbed_official 133:d4dda5c437f0 194 * @{
mbed_official 133:d4dda5c437f0 195 */
mbed_official 133:d4dda5c437f0 196 #define PWR_FLAG_WU PWR_CSR_WUF
mbed_official 133:d4dda5c437f0 197 #define PWR_FLAG_SB PWR_CSR_SBF
mbed_official 133:d4dda5c437f0 198 #define PWR_FLAG_PVDO PWR_CSR_PVDO
mbed_official 133:d4dda5c437f0 199 #define PWR_FLAG_BRR PWR_CSR_BRR
mbed_official 133:d4dda5c437f0 200 #define PWR_FLAG_VOSRDY PWR_CSR_VOSRDY
mbed_official 133:d4dda5c437f0 201
mbed_official 133:d4dda5c437f0 202 /**
mbed_official 133:d4dda5c437f0 203 * @}
mbed_official 133:d4dda5c437f0 204 */
mbed_official 133:d4dda5c437f0 205
mbed_official 133:d4dda5c437f0 206 /**
mbed_official 133:d4dda5c437f0 207 * @}
mbed_official 133:d4dda5c437f0 208 */
mbed_official 133:d4dda5c437f0 209
mbed_official 133:d4dda5c437f0 210 /* Exported macro ------------------------------------------------------------*/
mbed_official 133:d4dda5c437f0 211
mbed_official 133:d4dda5c437f0 212 /** @brief macros configure the main internal regulator output voltage.
mbed_official 133:d4dda5c437f0 213 * @param __REGULATOR__: specifies the regulator output voltage to achieve
mbed_official 133:d4dda5c437f0 214 * a tradeoff between performance and power consumption when the device does
mbed_official 133:d4dda5c437f0 215 * not operate at the maximum frequency (refer to the datasheets for more details).
mbed_official 133:d4dda5c437f0 216 * This parameter can be one of the following values:
mbed_official 133:d4dda5c437f0 217 * @arg PWR_REGULATOR_VOLTAGE_SCALE1: Regulator voltage output Scale 1 mode
mbed_official 133:d4dda5c437f0 218 * @arg PWR_REGULATOR_VOLTAGE_SCALE2: Regulator voltage output Scale 2 mode
mbed_official 133:d4dda5c437f0 219 * @arg PWR_REGULATOR_VOLTAGE_SCALE3: Regulator voltage output Scale 3 mode
mbed_official 133:d4dda5c437f0 220 * @retval None
mbed_official 133:d4dda5c437f0 221 */
mbed_official 133:d4dda5c437f0 222 #define __HAL_PWR_VOLTAGESCALING_CONFIG(__REGULATOR__) (MODIFY_REG(PWR->CR, PWR_CR_VOS, (__REGULATOR__)))
mbed_official 133:d4dda5c437f0 223
mbed_official 133:d4dda5c437f0 224 /** @brief Check PWR flag is set or not.
mbed_official 133:d4dda5c437f0 225 * @param __FLAG__: specifies the flag to check.
mbed_official 133:d4dda5c437f0 226 * This parameter can be one of the following values:
mbed_official 133:d4dda5c437f0 227 * @arg PWR_FLAG_WU: Wake Up flag. This flag indicates that a wakeup event
mbed_official 133:d4dda5c437f0 228 * was received from the WKUP pin or from the RTC alarm (Alarm A
mbed_official 133:d4dda5c437f0 229 * or Alarm B), RTC Tamper event, RTC TimeStamp event or RTC Wakeup.
mbed_official 133:d4dda5c437f0 230 * An additional wakeup event is detected if the WKUP pin is enabled
mbed_official 133:d4dda5c437f0 231 * (by setting the EWUP bit) when the WKUP pin level is already high.
mbed_official 133:d4dda5c437f0 232 * @arg PWR_FLAG_SB: StandBy flag. This flag indicates that the system was
mbed_official 133:d4dda5c437f0 233 * resumed from StandBy mode.
mbed_official 133:d4dda5c437f0 234 * @arg PWR_FLAG_PVDO: PVD Output. This flag is valid only if PVD is enabled
mbed_official 133:d4dda5c437f0 235 * by the HAL_PWR_EnablePVD() function. The PVD is stopped by Standby mode
mbed_official 133:d4dda5c437f0 236 * For this reason, this bit is equal to 0 after Standby or reset
mbed_official 133:d4dda5c437f0 237 * until the PVDE bit is set.
mbed_official 133:d4dda5c437f0 238 * @arg PWR_FLAG_BRR: Backup regulator ready flag. This bit is not reset
mbed_official 133:d4dda5c437f0 239 * when the device wakes up from Standby mode or by a system reset
mbed_official 133:d4dda5c437f0 240 * or power reset.
mbed_official 133:d4dda5c437f0 241 * @arg PWR_FLAG_VOSRDY: This flag indicates that the Regulator voltage
mbed_official 133:d4dda5c437f0 242 * scaling output selection is ready.
mbed_official 133:d4dda5c437f0 243 * @retval The new state of __FLAG__ (TRUE or FALSE).
mbed_official 133:d4dda5c437f0 244 */
mbed_official 133:d4dda5c437f0 245 #define __HAL_PWR_GET_FLAG(__FLAG__) ((PWR->CSR & (__FLAG__)) == (__FLAG__))
mbed_official 133:d4dda5c437f0 246
mbed_official 133:d4dda5c437f0 247 /** @brief Clear the PWR's pending flags.
mbed_official 133:d4dda5c437f0 248 * @param __FLAG__: specifies the flag to clear.
mbed_official 133:d4dda5c437f0 249 * This parameter can be one of the following values:
mbed_official 133:d4dda5c437f0 250 * @arg PWR_FLAG_WU: Wake Up flag
mbed_official 133:d4dda5c437f0 251 * @arg PWR_FLAG_SB: StandBy flag
mbed_official 133:d4dda5c437f0 252 */
mbed_official 133:d4dda5c437f0 253 #define __HAL_PWR_CLEAR_FLAG(__FLAG__) (PWR->CR |= (__FLAG__) << 2)
mbed_official 133:d4dda5c437f0 254
mbed_official 133:d4dda5c437f0 255 #define PWR_EXTI_LINE_PVD ((uint32_t)0x00010000) /*!< External interrupt line 16 Connected to the PVD EXTI Line */
mbed_official 133:d4dda5c437f0 256 /**
mbed_official 133:d4dda5c437f0 257 * @brief Enable the PVD Exti Line.
mbed_official 133:d4dda5c437f0 258 * @param __EXTILINE__: specifies the PVD Exti sources to be enabled.
mbed_official 133:d4dda5c437f0 259 * This parameter can be:
mbed_official 133:d4dda5c437f0 260 * @arg PWR_EXTI_LINE_PVD
mbed_official 133:d4dda5c437f0 261 * @retval None.
mbed_official 133:d4dda5c437f0 262 */
mbed_official 133:d4dda5c437f0 263 #define __HAL_PVD_EXTI_ENABLE_IT(__EXTILINE__) (EXTI->IMR |= (__EXTILINE__))
mbed_official 133:d4dda5c437f0 264
mbed_official 133:d4dda5c437f0 265 /**
mbed_official 133:d4dda5c437f0 266 * @brief Disable the PVD EXTI Line.
mbed_official 133:d4dda5c437f0 267 * @param __EXTILINE__: specifies the PVD EXTI sources to be disabled.
mbed_official 133:d4dda5c437f0 268 * This parameter can be:
mbed_official 133:d4dda5c437f0 269 * @arg PWR_EXTI_LINE_PVD
mbed_official 133:d4dda5c437f0 270 * @retval None.
mbed_official 133:d4dda5c437f0 271 */
mbed_official 133:d4dda5c437f0 272 #define __HAL_PVD_EXTI_DISABLE_IT(__EXTILINE__) (EXTI->IMR &= ~(__EXTILINE__))
mbed_official 133:d4dda5c437f0 273
mbed_official 133:d4dda5c437f0 274 /**
mbed_official 133:d4dda5c437f0 275 * @brief checks whether the specified PVD Exti interrupt flag is set or not.
mbed_official 133:d4dda5c437f0 276 * @param __EXTILINE__: specifies the PVD Exti sources to be cleared.
mbed_official 133:d4dda5c437f0 277 * This parameter can be:
mbed_official 133:d4dda5c437f0 278 * @arg PWR_EXTI_LINE_PVD
mbed_official 133:d4dda5c437f0 279 * @retval EXTI PVD Line Status.
mbed_official 133:d4dda5c437f0 280 */
mbed_official 133:d4dda5c437f0 281 #define __HAL_PVD_EXTI_GET_FLAG(__EXTILINE__) (EXTI->PR & (__EXTILINE__))
mbed_official 133:d4dda5c437f0 282
mbed_official 133:d4dda5c437f0 283 /**
mbed_official 133:d4dda5c437f0 284 * @brief Clear the PVD Exti flag.
mbed_official 133:d4dda5c437f0 285 * @param __EXTILINE__: specifies the PVD Exti sources to be cleared.
mbed_official 133:d4dda5c437f0 286 * This parameter can be:
mbed_official 133:d4dda5c437f0 287 * @arg PWR_EXTI_LINE_PVD
mbed_official 133:d4dda5c437f0 288 * @retval None.
mbed_official 133:d4dda5c437f0 289 */
mbed_official 133:d4dda5c437f0 290 #define __HAL_PVD_EXTI_CLEAR_FLAG(__EXTILINE__) (EXTI->PR = (__EXTILINE__))
mbed_official 133:d4dda5c437f0 291
mbed_official 133:d4dda5c437f0 292
mbed_official 133:d4dda5c437f0 293 /* Include PWR HAL Extension module */
mbed_official 133:d4dda5c437f0 294 #include "stm32f4xx_hal_pwr_ex.h"
mbed_official 133:d4dda5c437f0 295
mbed_official 133:d4dda5c437f0 296 /* Exported functions --------------------------------------------------------*/
mbed_official 133:d4dda5c437f0 297
mbed_official 133:d4dda5c437f0 298 /* Initialization and de-initialization functions *******************************/
mbed_official 133:d4dda5c437f0 299 void HAL_PWR_DeInit(void);
mbed_official 133:d4dda5c437f0 300 void HAL_PWR_EnableBkUpAccess(void);
mbed_official 133:d4dda5c437f0 301 void HAL_PWR_DisableBkUpAccess(void);
mbed_official 133:d4dda5c437f0 302
mbed_official 133:d4dda5c437f0 303 /* Peripheral Control functions ************************************************/
mbed_official 133:d4dda5c437f0 304 void HAL_PWR_PVDConfig(PWR_PVDTypeDef *sConfigPVD);
mbed_official 133:d4dda5c437f0 305 void HAL_PWR_EnablePVD(void);
mbed_official 133:d4dda5c437f0 306 void HAL_PWR_DisablePVD(void);
mbed_official 133:d4dda5c437f0 307 void HAL_PWR_EnableWakeUpPin(uint32_t WakeUpPinx);
mbed_official 133:d4dda5c437f0 308 void HAL_PWR_DisableWakeUpPin(uint32_t WakeUpPinx);
mbed_official 133:d4dda5c437f0 309
mbed_official 133:d4dda5c437f0 310 void HAL_PWR_EnterSTOPMode(uint32_t Regulator, uint8_t STOPEntry);
mbed_official 133:d4dda5c437f0 311 void HAL_PWR_EnterSLEEPMode(uint32_t Regulator, uint8_t SLEEPEntry);
mbed_official 133:d4dda5c437f0 312 void HAL_PWR_EnterSTANDBYMode(void);
mbed_official 133:d4dda5c437f0 313
mbed_official 133:d4dda5c437f0 314 void HAL_PWR_PVD_IRQHandler(void);
mbed_official 133:d4dda5c437f0 315 void HAL_PWR_PVDCallback(void);
mbed_official 133:d4dda5c437f0 316
mbed_official 133:d4dda5c437f0 317
mbed_official 133:d4dda5c437f0 318 /**
mbed_official 133:d4dda5c437f0 319 * @}
mbed_official 133:d4dda5c437f0 320 */
mbed_official 133:d4dda5c437f0 321
mbed_official 133:d4dda5c437f0 322 /**
mbed_official 133:d4dda5c437f0 323 * @}
mbed_official 133:d4dda5c437f0 324 */
mbed_official 133:d4dda5c437f0 325
mbed_official 133:d4dda5c437f0 326 #ifdef __cplusplus
mbed_official 133:d4dda5c437f0 327 }
mbed_official 133:d4dda5c437f0 328 #endif
mbed_official 133:d4dda5c437f0 329
mbed_official 133:d4dda5c437f0 330
mbed_official 133:d4dda5c437f0 331 #endif /* __STM32F4xx_HAL_PWR_H */
mbed_official 133:d4dda5c437f0 332
mbed_official 133:d4dda5c437f0 333 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/