mbed library sources
Dependents: frdm_kl05z_gpio_test
Fork of mbed-src by
targets/cmsis/TARGET_STM/TARGET_STM32F407VG/stm32f4xx_hal_i2c.c@323:9e901b0a5aa1, 2014-09-13 (annotated)
- Committer:
- shaoziyang
- Date:
- Sat Sep 13 14:25:46 2014 +0000
- Revision:
- 323:9e901b0a5aa1
- Parent:
- 296:ec1b66a3d094
test with CLOCK_SETUP = 0
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
mbed_official | 133:d4dda5c437f0 | 1 | /** |
mbed_official | 133:d4dda5c437f0 | 2 | ****************************************************************************** |
mbed_official | 133:d4dda5c437f0 | 3 | * @file stm32f4xx_hal_i2c.c |
mbed_official | 133:d4dda5c437f0 | 4 | * @author MCD Application Team |
mbed_official | 242:7074e42da0b2 | 5 | * @version V1.1.0RC2 |
mbed_official | 242:7074e42da0b2 | 6 | * @date 14-May-2014 |
mbed_official | 133:d4dda5c437f0 | 7 | * @brief I2C HAL module driver. |
mbed_official | 133:d4dda5c437f0 | 8 | * This file provides firmware functions to manage the following |
mbed_official | 133:d4dda5c437f0 | 9 | * functionalities of the Inter Integrated Circuit (I2C) peripheral: |
mbed_official | 133:d4dda5c437f0 | 10 | * + Initialization and de-initialization functions |
mbed_official | 133:d4dda5c437f0 | 11 | * + IO operation functions |
mbed_official | 133:d4dda5c437f0 | 12 | * + Peripheral Control functions |
mbed_official | 133:d4dda5c437f0 | 13 | * + Peripheral State functions |
mbed_official | 133:d4dda5c437f0 | 14 | * |
mbed_official | 133:d4dda5c437f0 | 15 | @verbatim |
mbed_official | 133:d4dda5c437f0 | 16 | ============================================================================== |
mbed_official | 133:d4dda5c437f0 | 17 | ##### How to use this driver ##### |
mbed_official | 133:d4dda5c437f0 | 18 | ============================================================================== |
mbed_official | 133:d4dda5c437f0 | 19 | [..] |
mbed_official | 133:d4dda5c437f0 | 20 | The I2C HAL driver can be used as follows: |
mbed_official | 133:d4dda5c437f0 | 21 | |
mbed_official | 133:d4dda5c437f0 | 22 | (#) Declare a I2C_HandleTypeDef handle structure, for example: |
mbed_official | 133:d4dda5c437f0 | 23 | I2C_HandleTypeDef hi2c; |
mbed_official | 133:d4dda5c437f0 | 24 | |
mbed_official | 133:d4dda5c437f0 | 25 | (#)Initialize the I2C low level resources by implement the HAL_I2C_MspInit() API: |
mbed_official | 133:d4dda5c437f0 | 26 | (##) Enable the I2Cx interface clock |
mbed_official | 133:d4dda5c437f0 | 27 | (##) I2C pins configuration |
mbed_official | 133:d4dda5c437f0 | 28 | (+++) Enable the clock for the I2C GPIOs |
mbed_official | 133:d4dda5c437f0 | 29 | (+++) Configure I2C pins as alternate function open-drain |
mbed_official | 133:d4dda5c437f0 | 30 | (##) NVIC configuration if you need to use interrupt process |
mbed_official | 133:d4dda5c437f0 | 31 | (+++) Configure the I2Cx interrupt priority |
mbed_official | 133:d4dda5c437f0 | 32 | (+++) Enable the NVIC I2C IRQ Channel |
mbed_official | 133:d4dda5c437f0 | 33 | (##) DMA Configuration if you need to use DMA process |
mbed_official | 133:d4dda5c437f0 | 34 | (+++) Declare a DMA_HandleTypeDef handle structure for the transmit or receive stream |
mbed_official | 133:d4dda5c437f0 | 35 | (+++) Enable the DMAx interface clock using |
mbed_official | 133:d4dda5c437f0 | 36 | (+++) Configure the DMA handle parameters |
mbed_official | 133:d4dda5c437f0 | 37 | (+++) Configure the DMA Tx or Rx Stream |
mbed_official | 133:d4dda5c437f0 | 38 | (+++) Associate the initilalized DMA handle to the hi2c DMA Tx or Rx handle |
mbed_official | 242:7074e42da0b2 | 39 | (+++) Configure the priority and enable the NVIC for the transfer complete interrupt on |
mbed_official | 242:7074e42da0b2 | 40 | the DMA Tx or Rx Stream |
mbed_official | 133:d4dda5c437f0 | 41 | |
mbed_official | 133:d4dda5c437f0 | 42 | (#) Configure the Communication Speed, Duty cycle, Addressing mode, Own Address1, |
mbed_official | 133:d4dda5c437f0 | 43 | Dual Addressing mode, Own Address2, General call and Nostretch mode in the hi2c Init structure. |
mbed_official | 133:d4dda5c437f0 | 44 | |
mbed_official | 242:7074e42da0b2 | 45 | (#) Initialize the I2C registers by calling the HAL_I2C_Init(), configures also the low level Hardware |
mbed_official | 242:7074e42da0b2 | 46 | (GPIO, CLOCK, NVIC...etc) by calling the customed HAL_I2C_MspInit(&hi2c) API. |
mbed_official | 133:d4dda5c437f0 | 47 | |
mbed_official | 133:d4dda5c437f0 | 48 | (#) To check if target device is ready for communication, use the function HAL_I2C_IsDeviceReady() |
mbed_official | 133:d4dda5c437f0 | 49 | |
mbed_official | 242:7074e42da0b2 | 50 | (#) For I2C IO and IO MEM operations, three operation modes are available within this driver : |
mbed_official | 133:d4dda5c437f0 | 51 | |
mbed_official | 133:d4dda5c437f0 | 52 | *** Polling mode IO operation *** |
mbed_official | 133:d4dda5c437f0 | 53 | ================================= |
mbed_official | 133:d4dda5c437f0 | 54 | [..] |
mbed_official | 133:d4dda5c437f0 | 55 | (+) Transmit in master mode an amount of data in blocking mode using HAL_I2C_Master_Transmit() |
mbed_official | 133:d4dda5c437f0 | 56 | (+) Receive in master mode an amount of data in blocking mode using HAL_I2C_Master_Receive() |
mbed_official | 133:d4dda5c437f0 | 57 | (+) Transmit in slave mode an amount of data in blocking mode using HAL_I2C_Slave_Transmit() |
mbed_official | 133:d4dda5c437f0 | 58 | (+) Receive in slave mode an amount of data in blocking mode using HAL_I2C_Slave_Receive() |
mbed_official | 133:d4dda5c437f0 | 59 | |
mbed_official | 133:d4dda5c437f0 | 60 | *** Polling mode IO MEM operation *** |
mbed_official | 133:d4dda5c437f0 | 61 | ===================================== |
mbed_official | 133:d4dda5c437f0 | 62 | [..] |
mbed_official | 133:d4dda5c437f0 | 63 | (+) Write an amount of data in blocking mode to a specific memory address using HAL_I2C_Mem_Write() |
mbed_official | 133:d4dda5c437f0 | 64 | (+) Read an amount of data in blocking mode from a specific memory address using HAL_I2C_Mem_Read() |
mbed_official | 133:d4dda5c437f0 | 65 | |
mbed_official | 133:d4dda5c437f0 | 66 | |
mbed_official | 133:d4dda5c437f0 | 67 | *** Interrupt mode IO operation *** |
mbed_official | 133:d4dda5c437f0 | 68 | =================================== |
mbed_official | 133:d4dda5c437f0 | 69 | [..] |
mbed_official | 133:d4dda5c437f0 | 70 | (+) Transmit in master mode an amount of data in non blocking mode using HAL_I2C_Master_Transmit_IT() |
mbed_official | 133:d4dda5c437f0 | 71 | (+) At transmission end of transfer HAL_I2C_MasterTxCpltCallback is executed and user can |
mbed_official | 133:d4dda5c437f0 | 72 | add his own code by customization of function pointer HAL_I2C_MasterTxCpltCallback |
mbed_official | 133:d4dda5c437f0 | 73 | (+) Receive in master mode an amount of data in non blocking mode using HAL_I2C_Master_Receive_IT() |
mbed_official | 133:d4dda5c437f0 | 74 | (+) At reception end of transfer HAL_I2C_MasterRxCpltCallback is executed and user can |
mbed_official | 133:d4dda5c437f0 | 75 | add his own code by customization of function pointer HAL_I2C_MasterRxCpltCallback |
mbed_official | 133:d4dda5c437f0 | 76 | (+) Transmit in slave mode an amount of data in non blocking mode using HAL_I2C_Slave_Transmit_IT() |
mbed_official | 133:d4dda5c437f0 | 77 | (+) At transmission end of transfer HAL_I2C_SlaveTxCpltCallback is executed and user can |
mbed_official | 133:d4dda5c437f0 | 78 | add his own code by customization of function pointer HAL_I2C_SlaveTxCpltCallback |
mbed_official | 133:d4dda5c437f0 | 79 | (+) Receive in slave mode an amount of data in non blocking mode using HAL_I2C_Slave_Receive_IT() |
mbed_official | 133:d4dda5c437f0 | 80 | (+) At reception end of transfer HAL_I2C_SlaveRxCpltCallback is executed and user can |
mbed_official | 133:d4dda5c437f0 | 81 | add his own code by customization of function pointer HAL_I2C_SlaveRxCpltCallback |
mbed_official | 133:d4dda5c437f0 | 82 | (+) In case of transfer Error, HAL_I2C_ErrorCallback() function is executed and user can |
mbed_official | 133:d4dda5c437f0 | 83 | add his own code by customization of function pointer HAL_I2C_ErrorCallback |
mbed_official | 133:d4dda5c437f0 | 84 | |
mbed_official | 133:d4dda5c437f0 | 85 | *** Interrupt mode IO MEM operation *** |
mbed_official | 133:d4dda5c437f0 | 86 | ======================================= |
mbed_official | 133:d4dda5c437f0 | 87 | [..] |
mbed_official | 133:d4dda5c437f0 | 88 | (+) Write an amount of data in no-blocking mode with Interrupt to a specific memory address using |
mbed_official | 133:d4dda5c437f0 | 89 | HAL_I2C_Mem_Write_IT() |
mbed_official | 133:d4dda5c437f0 | 90 | (+) At MEM end of write transfer HAL_I2C_MemTxCpltCallback is executed and user can |
mbed_official | 133:d4dda5c437f0 | 91 | add his own code by customization of function pointer HAL_I2C_MemTxCpltCallback |
mbed_official | 133:d4dda5c437f0 | 92 | (+) Read an amount of data in no-blocking mode with Interrupt from a specific memory address using |
mbed_official | 133:d4dda5c437f0 | 93 | HAL_I2C_Mem_Read_IT() |
mbed_official | 133:d4dda5c437f0 | 94 | (+) At MEM end of read transfer HAL_I2C_MemRxCpltCallback is executed and user can |
mbed_official | 133:d4dda5c437f0 | 95 | add his own code by customization of function pointer HAL_I2C_MemRxCpltCallback |
mbed_official | 133:d4dda5c437f0 | 96 | (+) In case of transfer Error, HAL_I2C_ErrorCallback() function is executed and user can |
mbed_official | 133:d4dda5c437f0 | 97 | add his own code by customization of function pointer HAL_I2C_ErrorCallback |
mbed_official | 133:d4dda5c437f0 | 98 | |
mbed_official | 133:d4dda5c437f0 | 99 | *** DMA mode IO operation *** |
mbed_official | 133:d4dda5c437f0 | 100 | ============================== |
mbed_official | 133:d4dda5c437f0 | 101 | [..] |
mbed_official | 133:d4dda5c437f0 | 102 | (+) Transmit in master mode an amount of data in non blocking mode (DMA) using |
mbed_official | 133:d4dda5c437f0 | 103 | HAL_I2C_Master_Transmit_DMA() |
mbed_official | 133:d4dda5c437f0 | 104 | (+) At transmission end of transfer HAL_I2C_MasterTxCpltCallback is executed and user can |
mbed_official | 133:d4dda5c437f0 | 105 | add his own code by customization of function pointer HAL_I2C_MasterTxCpltCallback |
mbed_official | 133:d4dda5c437f0 | 106 | (+) Receive in master mode an amount of data in non blocking mode (DMA) using |
mbed_official | 133:d4dda5c437f0 | 107 | HAL_I2C_Master_Receive_DMA() |
mbed_official | 133:d4dda5c437f0 | 108 | (+) At reception end of transfer HAL_I2C_MasterRxCpltCallback is executed and user can |
mbed_official | 133:d4dda5c437f0 | 109 | add his own code by customization of function pointer HAL_I2C_MasterRxCpltCallback |
mbed_official | 133:d4dda5c437f0 | 110 | (+) Transmit in slave mode an amount of data in non blocking mode (DMA) using |
mbed_official | 133:d4dda5c437f0 | 111 | HAL_I2C_Slave_Transmit_DMA() |
mbed_official | 133:d4dda5c437f0 | 112 | (+) At transmission end of transfer HAL_I2C_SlaveTxCpltCallback is executed and user can |
mbed_official | 133:d4dda5c437f0 | 113 | add his own code by customization of function pointer HAL_I2C_SlaveTxCpltCallback |
mbed_official | 133:d4dda5c437f0 | 114 | (+) Receive in slave mode an amount of data in non blocking mode (DMA) using |
mbed_official | 133:d4dda5c437f0 | 115 | HAL_I2C_Slave_Receive_DMA() |
mbed_official | 133:d4dda5c437f0 | 116 | (+) At reception end of transfer HAL_I2C_SlaveRxCpltCallback is executed and user can |
mbed_official | 133:d4dda5c437f0 | 117 | add his own code by customization of function pointer HAL_I2C_SlaveRxCpltCallback |
mbed_official | 133:d4dda5c437f0 | 118 | (+) In case of transfer Error, HAL_I2C_ErrorCallback() function is executed and user can |
mbed_official | 133:d4dda5c437f0 | 119 | add his own code by customization of function pointer HAL_I2C_ErrorCallback |
mbed_official | 133:d4dda5c437f0 | 120 | |
mbed_official | 133:d4dda5c437f0 | 121 | *** DMA mode IO MEM operation *** |
mbed_official | 133:d4dda5c437f0 | 122 | ================================= |
mbed_official | 133:d4dda5c437f0 | 123 | [..] |
mbed_official | 133:d4dda5c437f0 | 124 | (+) Write an amount of data in no-blocking mode with DMA to a specific memory address using |
mbed_official | 133:d4dda5c437f0 | 125 | HAL_I2C_Mem_Write_DMA() |
mbed_official | 133:d4dda5c437f0 | 126 | (+) At MEM end of write transfer HAL_I2C_MemTxCpltCallback is executed and user can |
mbed_official | 133:d4dda5c437f0 | 127 | add his own code by customization of function pointer HAL_I2C_MemTxCpltCallback |
mbed_official | 133:d4dda5c437f0 | 128 | (+) Read an amount of data in no-blocking mode with DMA from a specific memory address using |
mbed_official | 133:d4dda5c437f0 | 129 | HAL_I2C_Mem_Read_DMA() |
mbed_official | 133:d4dda5c437f0 | 130 | (+) At MEM end of read transfer HAL_I2C_MemRxCpltCallback is executed and user can |
mbed_official | 133:d4dda5c437f0 | 131 | add his own code by customization of function pointer HAL_I2C_MemRxCpltCallback |
mbed_official | 133:d4dda5c437f0 | 132 | (+) In case of transfer Error, HAL_I2C_ErrorCallback() function is executed and user can |
mbed_official | 133:d4dda5c437f0 | 133 | add his own code by customization of function pointer HAL_I2C_ErrorCallback |
mbed_official | 133:d4dda5c437f0 | 134 | |
mbed_official | 133:d4dda5c437f0 | 135 | |
mbed_official | 133:d4dda5c437f0 | 136 | *** I2C HAL driver macros list *** |
mbed_official | 133:d4dda5c437f0 | 137 | ================================== |
mbed_official | 133:d4dda5c437f0 | 138 | [..] |
mbed_official | 133:d4dda5c437f0 | 139 | Below the list of most used macros in I2C HAL driver. |
mbed_official | 133:d4dda5c437f0 | 140 | |
mbed_official | 133:d4dda5c437f0 | 141 | (+) __HAL_I2C_ENABLE: Enable the I2C peripheral |
mbed_official | 133:d4dda5c437f0 | 142 | (+) __HAL_I2C_DISABLE: Disable the I2C peripheral |
mbed_official | 133:d4dda5c437f0 | 143 | (+) __HAL_I2C_GET_FLAG : Checks whether the specified I2C flag is set or not |
mbed_official | 242:7074e42da0b2 | 144 | (+) __HAL_I2C_CLEAR_FLAG : Clear the specified I2C pending flag |
mbed_official | 242:7074e42da0b2 | 145 | (+) __HAL_I2C_ENABLE_IT: Enable the specified I2C interrupt |
mbed_official | 242:7074e42da0b2 | 146 | (+) __HAL_I2C_DISABLE_IT: Disable the specified I2C interrupt |
mbed_official | 133:d4dda5c437f0 | 147 | |
mbed_official | 133:d4dda5c437f0 | 148 | [..] |
mbed_official | 133:d4dda5c437f0 | 149 | (@) You can refer to the I2C HAL driver header file for more useful macros |
mbed_official | 133:d4dda5c437f0 | 150 | |
mbed_official | 133:d4dda5c437f0 | 151 | |
mbed_official | 133:d4dda5c437f0 | 152 | @endverbatim |
mbed_official | 133:d4dda5c437f0 | 153 | ****************************************************************************** |
mbed_official | 133:d4dda5c437f0 | 154 | * @attention |
mbed_official | 133:d4dda5c437f0 | 155 | * |
mbed_official | 133:d4dda5c437f0 | 156 | * <h2><center>© COPYRIGHT(c) 2014 STMicroelectronics</center></h2> |
mbed_official | 133:d4dda5c437f0 | 157 | * |
mbed_official | 133:d4dda5c437f0 | 158 | * Redistribution and use in source and binary forms, with or without modification, |
mbed_official | 133:d4dda5c437f0 | 159 | * are permitted provided that the following conditions are met: |
mbed_official | 133:d4dda5c437f0 | 160 | * 1. Redistributions of source code must retain the above copyright notice, |
mbed_official | 133:d4dda5c437f0 | 161 | * this list of conditions and the following disclaimer. |
mbed_official | 133:d4dda5c437f0 | 162 | * 2. Redistributions in binary form must reproduce the above copyright notice, |
mbed_official | 133:d4dda5c437f0 | 163 | * this list of conditions and the following disclaimer in the documentation |
mbed_official | 133:d4dda5c437f0 | 164 | * and/or other materials provided with the distribution. |
mbed_official | 133:d4dda5c437f0 | 165 | * 3. Neither the name of STMicroelectronics nor the names of its contributors |
mbed_official | 133:d4dda5c437f0 | 166 | * may be used to endorse or promote products derived from this software |
mbed_official | 133:d4dda5c437f0 | 167 | * without specific prior written permission. |
mbed_official | 133:d4dda5c437f0 | 168 | * |
mbed_official | 133:d4dda5c437f0 | 169 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
mbed_official | 133:d4dda5c437f0 | 170 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
mbed_official | 133:d4dda5c437f0 | 171 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
mbed_official | 133:d4dda5c437f0 | 172 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE |
mbed_official | 133:d4dda5c437f0 | 173 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
mbed_official | 133:d4dda5c437f0 | 174 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR |
mbed_official | 133:d4dda5c437f0 | 175 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
mbed_official | 133:d4dda5c437f0 | 176 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, |
mbed_official | 133:d4dda5c437f0 | 177 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
mbed_official | 133:d4dda5c437f0 | 178 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
mbed_official | 133:d4dda5c437f0 | 179 | * |
mbed_official | 133:d4dda5c437f0 | 180 | ****************************************************************************** |
mbed_official | 133:d4dda5c437f0 | 181 | */ |
mbed_official | 133:d4dda5c437f0 | 182 | |
mbed_official | 133:d4dda5c437f0 | 183 | /* Includes ------------------------------------------------------------------*/ |
mbed_official | 133:d4dda5c437f0 | 184 | #include "stm32f4xx_hal.h" |
mbed_official | 133:d4dda5c437f0 | 185 | |
mbed_official | 133:d4dda5c437f0 | 186 | /** @addtogroup STM32F4xx_HAL_Driver |
mbed_official | 133:d4dda5c437f0 | 187 | * @{ |
mbed_official | 133:d4dda5c437f0 | 188 | */ |
mbed_official | 133:d4dda5c437f0 | 189 | |
mbed_official | 133:d4dda5c437f0 | 190 | /** @defgroup I2C |
mbed_official | 133:d4dda5c437f0 | 191 | * @brief I2C HAL module driver |
mbed_official | 133:d4dda5c437f0 | 192 | * @{ |
mbed_official | 133:d4dda5c437f0 | 193 | */ |
mbed_official | 133:d4dda5c437f0 | 194 | |
mbed_official | 133:d4dda5c437f0 | 195 | #ifdef HAL_I2C_MODULE_ENABLED |
mbed_official | 133:d4dda5c437f0 | 196 | |
mbed_official | 133:d4dda5c437f0 | 197 | /* Private typedef -----------------------------------------------------------*/ |
mbed_official | 133:d4dda5c437f0 | 198 | /* Private define ------------------------------------------------------------*/ |
mbed_official | 133:d4dda5c437f0 | 199 | #define I2C_TIMEOUT_FLAG ((uint32_t)35) /* 35 ms */ |
mbed_official | 133:d4dda5c437f0 | 200 | #define I2C_TIMEOUT_ADDR_SLAVE ((uint32_t)10000) /* 10 s */ |
mbed_official | 133:d4dda5c437f0 | 201 | |
mbed_official | 133:d4dda5c437f0 | 202 | /* Private macro -------------------------------------------------------------*/ |
mbed_official | 133:d4dda5c437f0 | 203 | /* Private variables ---------------------------------------------------------*/ |
mbed_official | 133:d4dda5c437f0 | 204 | /* Private function prototypes -----------------------------------------------*/ |
mbed_official | 133:d4dda5c437f0 | 205 | static void I2C_DMAMasterTransmitCplt(DMA_HandleTypeDef *hdma); |
mbed_official | 133:d4dda5c437f0 | 206 | static void I2C_DMAMasterReceiveCplt(DMA_HandleTypeDef *hdma); |
mbed_official | 133:d4dda5c437f0 | 207 | static void I2C_DMASlaveTransmitCplt(DMA_HandleTypeDef *hdma); |
mbed_official | 133:d4dda5c437f0 | 208 | static void I2C_DMASlaveReceiveCplt(DMA_HandleTypeDef *hdma); |
mbed_official | 133:d4dda5c437f0 | 209 | static void I2C_DMAMemTransmitCplt(DMA_HandleTypeDef *hdma); |
mbed_official | 133:d4dda5c437f0 | 210 | static void I2C_DMAMemReceiveCplt(DMA_HandleTypeDef *hdma); |
mbed_official | 133:d4dda5c437f0 | 211 | static void I2C_DMAError(DMA_HandleTypeDef *hdma); |
mbed_official | 133:d4dda5c437f0 | 212 | |
mbed_official | 133:d4dda5c437f0 | 213 | static HAL_StatusTypeDef I2C_MasterRequestWrite(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint32_t Timeout); |
mbed_official | 133:d4dda5c437f0 | 214 | static HAL_StatusTypeDef I2C_MasterRequestRead(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint32_t Timeout); |
mbed_official | 133:d4dda5c437f0 | 215 | static HAL_StatusTypeDef I2C_RequestMemoryWrite(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint32_t Timeout); |
mbed_official | 133:d4dda5c437f0 | 216 | static HAL_StatusTypeDef I2C_RequestMemoryRead(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint32_t Timeout); |
mbed_official | 133:d4dda5c437f0 | 217 | static HAL_StatusTypeDef I2C_WaitOnFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Flag, FlagStatus Status, uint32_t Timeout); |
mbed_official | 133:d4dda5c437f0 | 218 | static HAL_StatusTypeDef I2C_WaitOnMasterAddressFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Flag, uint32_t Timeout); |
mbed_official | 133:d4dda5c437f0 | 219 | |
mbed_official | 133:d4dda5c437f0 | 220 | static HAL_StatusTypeDef I2C_MasterTransmit_TXE(I2C_HandleTypeDef *hi2c); |
mbed_official | 133:d4dda5c437f0 | 221 | static HAL_StatusTypeDef I2C_MasterTransmit_BTF(I2C_HandleTypeDef *hi2c); |
mbed_official | 133:d4dda5c437f0 | 222 | static HAL_StatusTypeDef I2C_MasterReceive_RXNE(I2C_HandleTypeDef *hi2c); |
mbed_official | 133:d4dda5c437f0 | 223 | static HAL_StatusTypeDef I2C_MasterReceive_BTF(I2C_HandleTypeDef *hi2c); |
mbed_official | 133:d4dda5c437f0 | 224 | |
mbed_official | 133:d4dda5c437f0 | 225 | static HAL_StatusTypeDef I2C_SlaveTransmit_TXE(I2C_HandleTypeDef *hi2c); |
mbed_official | 133:d4dda5c437f0 | 226 | static HAL_StatusTypeDef I2C_SlaveTransmit_BTF(I2C_HandleTypeDef *hi2c); |
mbed_official | 133:d4dda5c437f0 | 227 | static HAL_StatusTypeDef I2C_SlaveReceive_RXNE(I2C_HandleTypeDef *hi2c); |
mbed_official | 133:d4dda5c437f0 | 228 | static HAL_StatusTypeDef I2C_SlaveReceive_BTF(I2C_HandleTypeDef *hi2c); |
mbed_official | 133:d4dda5c437f0 | 229 | static HAL_StatusTypeDef I2C_Slave_ADDR(I2C_HandleTypeDef *hi2c); |
mbed_official | 133:d4dda5c437f0 | 230 | static HAL_StatusTypeDef I2C_Slave_STOPF(I2C_HandleTypeDef *hi2c); |
mbed_official | 133:d4dda5c437f0 | 231 | static HAL_StatusTypeDef I2C_Slave_AF(I2C_HandleTypeDef *hi2c); |
mbed_official | 133:d4dda5c437f0 | 232 | |
mbed_official | 133:d4dda5c437f0 | 233 | /* Private functions ---------------------------------------------------------*/ |
mbed_official | 133:d4dda5c437f0 | 234 | |
mbed_official | 133:d4dda5c437f0 | 235 | /** @defgroup I2C_Private_Functions |
mbed_official | 133:d4dda5c437f0 | 236 | * @{ |
mbed_official | 133:d4dda5c437f0 | 237 | */ |
mbed_official | 133:d4dda5c437f0 | 238 | |
mbed_official | 133:d4dda5c437f0 | 239 | /** @defgroup I2C_Group1 Initialization and de-initialization functions |
mbed_official | 133:d4dda5c437f0 | 240 | * @brief Initialization and Configuration functions |
mbed_official | 133:d4dda5c437f0 | 241 | * |
mbed_official | 133:d4dda5c437f0 | 242 | @verbatim |
mbed_official | 133:d4dda5c437f0 | 243 | =============================================================================== |
mbed_official | 133:d4dda5c437f0 | 244 | ##### Initialization and de-initialization functions ##### |
mbed_official | 133:d4dda5c437f0 | 245 | =============================================================================== |
mbed_official | 133:d4dda5c437f0 | 246 | [..] This subsection provides a set of functions allowing to initialize and |
mbed_official | 133:d4dda5c437f0 | 247 | de-initialiaze the I2Cx peripheral: |
mbed_official | 133:d4dda5c437f0 | 248 | |
mbed_official | 133:d4dda5c437f0 | 249 | (+) User must Implement HAL_I2C_MspInit() function in which he configures |
mbed_official | 133:d4dda5c437f0 | 250 | all related peripherals resources (CLOCK, GPIO, DMA, IT and NVIC). |
mbed_official | 133:d4dda5c437f0 | 251 | |
mbed_official | 133:d4dda5c437f0 | 252 | (+) Call the function HAL_I2C_Init() to configure the selected device with |
mbed_official | 133:d4dda5c437f0 | 253 | the selected configuration: |
mbed_official | 133:d4dda5c437f0 | 254 | (++) Communication Speed |
mbed_official | 133:d4dda5c437f0 | 255 | (++) Duty cycle |
mbed_official | 133:d4dda5c437f0 | 256 | (++) Addressing mode |
mbed_official | 133:d4dda5c437f0 | 257 | (++) Own Address 1 |
mbed_official | 133:d4dda5c437f0 | 258 | (++) Dual Addressing mode |
mbed_official | 133:d4dda5c437f0 | 259 | (++) Own Address 2 |
mbed_official | 133:d4dda5c437f0 | 260 | (++) General call mode |
mbed_official | 133:d4dda5c437f0 | 261 | (++) Nostretch mode |
mbed_official | 133:d4dda5c437f0 | 262 | |
mbed_official | 133:d4dda5c437f0 | 263 | (+) Call the function HAL_I2C_DeInit() to restore the default configuration |
mbed_official | 133:d4dda5c437f0 | 264 | of the selected I2Cx periperal. |
mbed_official | 133:d4dda5c437f0 | 265 | |
mbed_official | 133:d4dda5c437f0 | 266 | @endverbatim |
mbed_official | 133:d4dda5c437f0 | 267 | * @{ |
mbed_official | 133:d4dda5c437f0 | 268 | */ |
mbed_official | 133:d4dda5c437f0 | 269 | |
mbed_official | 133:d4dda5c437f0 | 270 | /** |
mbed_official | 133:d4dda5c437f0 | 271 | * @brief Initializes the I2C according to the specified parameters |
mbed_official | 133:d4dda5c437f0 | 272 | * in the I2C_InitTypeDef and create the associated handle. |
mbed_official | 242:7074e42da0b2 | 273 | * @param hi2c: pointer to a I2C_HandleTypeDef structure that contains |
mbed_official | 242:7074e42da0b2 | 274 | * the configuration information for I2C module |
mbed_official | 133:d4dda5c437f0 | 275 | * @retval HAL status |
mbed_official | 133:d4dda5c437f0 | 276 | */ |
mbed_official | 133:d4dda5c437f0 | 277 | HAL_StatusTypeDef HAL_I2C_Init(I2C_HandleTypeDef *hi2c) |
mbed_official | 133:d4dda5c437f0 | 278 | { |
mbed_official | 133:d4dda5c437f0 | 279 | uint32_t freqrange = 0; |
mbed_official | 133:d4dda5c437f0 | 280 | uint32_t pclk1 = 0; |
mbed_official | 133:d4dda5c437f0 | 281 | |
mbed_official | 133:d4dda5c437f0 | 282 | /* Check the I2C handle allocation */ |
mbed_official | 133:d4dda5c437f0 | 283 | if(hi2c == NULL) |
mbed_official | 133:d4dda5c437f0 | 284 | { |
mbed_official | 133:d4dda5c437f0 | 285 | return HAL_ERROR; |
mbed_official | 133:d4dda5c437f0 | 286 | } |
mbed_official | 133:d4dda5c437f0 | 287 | |
mbed_official | 133:d4dda5c437f0 | 288 | /* Check the parameters */ |
mbed_official | 133:d4dda5c437f0 | 289 | assert_param(IS_I2C_ALL_INSTANCE(hi2c->Instance)); |
mbed_official | 133:d4dda5c437f0 | 290 | assert_param(IS_I2C_CLOCK_SPEED(hi2c->Init.ClockSpeed)); |
mbed_official | 133:d4dda5c437f0 | 291 | assert_param(IS_I2C_DUTY_CYCLE(hi2c->Init.DutyCycle)); |
mbed_official | 133:d4dda5c437f0 | 292 | assert_param(IS_I2C_OWN_ADDRESS1(hi2c->Init.OwnAddress1)); |
mbed_official | 133:d4dda5c437f0 | 293 | assert_param(IS_I2C_ADDRESSING_MODE(hi2c->Init.AddressingMode)); |
mbed_official | 133:d4dda5c437f0 | 294 | assert_param(IS_I2C_DUAL_ADDRESS(hi2c->Init.DualAddressMode)); |
mbed_official | 133:d4dda5c437f0 | 295 | assert_param(IS_I2C_OWN_ADDRESS2(hi2c->Init.OwnAddress2)); |
mbed_official | 133:d4dda5c437f0 | 296 | assert_param(IS_I2C_GENERAL_CALL(hi2c->Init.GeneralCallMode)); |
mbed_official | 133:d4dda5c437f0 | 297 | assert_param(IS_I2C_NO_STRETCH(hi2c->Init.NoStretchMode)); |
mbed_official | 133:d4dda5c437f0 | 298 | |
mbed_official | 133:d4dda5c437f0 | 299 | if(hi2c->State == HAL_I2C_STATE_RESET) |
mbed_official | 133:d4dda5c437f0 | 300 | { |
mbed_official | 133:d4dda5c437f0 | 301 | /* Init the low level hardware : GPIO, CLOCK, NVIC */ |
mbed_official | 133:d4dda5c437f0 | 302 | HAL_I2C_MspInit(hi2c); |
mbed_official | 133:d4dda5c437f0 | 303 | } |
mbed_official | 133:d4dda5c437f0 | 304 | |
mbed_official | 133:d4dda5c437f0 | 305 | hi2c->State = HAL_I2C_STATE_BUSY; |
mbed_official | 133:d4dda5c437f0 | 306 | |
mbed_official | 133:d4dda5c437f0 | 307 | /* Disble the selected I2C peripheral */ |
mbed_official | 133:d4dda5c437f0 | 308 | __HAL_I2C_DISABLE(hi2c); |
mbed_official | 133:d4dda5c437f0 | 309 | |
mbed_official | 133:d4dda5c437f0 | 310 | /* Get PCLK1 frequency */ |
mbed_official | 133:d4dda5c437f0 | 311 | pclk1 = HAL_RCC_GetPCLK1Freq(); |
mbed_official | 133:d4dda5c437f0 | 312 | |
mbed_official | 133:d4dda5c437f0 | 313 | /* Calculate frequency range */ |
mbed_official | 133:d4dda5c437f0 | 314 | freqrange = __HAL_I2C_FREQRANGE(pclk1); |
mbed_official | 133:d4dda5c437f0 | 315 | |
mbed_official | 133:d4dda5c437f0 | 316 | /*---------------------------- I2Cx CR2 Configuration ----------------------*/ |
mbed_official | 133:d4dda5c437f0 | 317 | /* Configure I2Cx: Frequency range */ |
mbed_official | 133:d4dda5c437f0 | 318 | hi2c->Instance->CR2 = freqrange; |
mbed_official | 133:d4dda5c437f0 | 319 | |
mbed_official | 133:d4dda5c437f0 | 320 | /*---------------------------- I2Cx TRISE Configuration --------------------*/ |
mbed_official | 133:d4dda5c437f0 | 321 | /* Configure I2Cx: Rise Time */ |
mbed_official | 133:d4dda5c437f0 | 322 | hi2c->Instance->TRISE = __HAL_I2C_RISE_TIME(freqrange, hi2c->Init.ClockSpeed); |
mbed_official | 133:d4dda5c437f0 | 323 | |
mbed_official | 133:d4dda5c437f0 | 324 | /*---------------------------- I2Cx CCR Configuration ----------------------*/ |
mbed_official | 133:d4dda5c437f0 | 325 | /* Configure I2Cx: Speed */ |
mbed_official | 133:d4dda5c437f0 | 326 | hi2c->Instance->CCR = __HAL_I2C_SPEED(pclk1, hi2c->Init.ClockSpeed, hi2c->Init.DutyCycle); |
mbed_official | 133:d4dda5c437f0 | 327 | |
mbed_official | 133:d4dda5c437f0 | 328 | /*---------------------------- I2Cx CR1 Configuration ----------------------*/ |
mbed_official | 133:d4dda5c437f0 | 329 | /* Configure I2Cx: Generalcall and NoStretch mode */ |
mbed_official | 133:d4dda5c437f0 | 330 | hi2c->Instance->CR1 = (hi2c->Init.GeneralCallMode | hi2c->Init.NoStretchMode); |
mbed_official | 133:d4dda5c437f0 | 331 | |
mbed_official | 133:d4dda5c437f0 | 332 | /*---------------------------- I2Cx OAR1 Configuration ---------------------*/ |
mbed_official | 133:d4dda5c437f0 | 333 | /* Configure I2Cx: Own Address1 and addressing mode */ |
mbed_official | 133:d4dda5c437f0 | 334 | hi2c->Instance->OAR1 = (hi2c->Init.AddressingMode | hi2c->Init.OwnAddress1); |
mbed_official | 133:d4dda5c437f0 | 335 | |
mbed_official | 133:d4dda5c437f0 | 336 | /*---------------------------- I2Cx OAR2 Configuration ---------------------*/ |
mbed_official | 133:d4dda5c437f0 | 337 | /* Configure I2Cx: Dual mode and Own Address2 */ |
mbed_official | 133:d4dda5c437f0 | 338 | hi2c->Instance->OAR2 = (hi2c->Init.DualAddressMode | hi2c->Init.OwnAddress2); |
mbed_official | 133:d4dda5c437f0 | 339 | |
mbed_official | 133:d4dda5c437f0 | 340 | /* Enable the selected I2C peripheral */ |
mbed_official | 133:d4dda5c437f0 | 341 | __HAL_I2C_ENABLE(hi2c); |
mbed_official | 133:d4dda5c437f0 | 342 | |
mbed_official | 133:d4dda5c437f0 | 343 | hi2c->ErrorCode = HAL_I2C_ERROR_NONE; |
mbed_official | 133:d4dda5c437f0 | 344 | hi2c->State = HAL_I2C_STATE_READY; |
mbed_official | 133:d4dda5c437f0 | 345 | |
mbed_official | 133:d4dda5c437f0 | 346 | return HAL_OK; |
mbed_official | 133:d4dda5c437f0 | 347 | } |
mbed_official | 133:d4dda5c437f0 | 348 | |
mbed_official | 133:d4dda5c437f0 | 349 | /** |
mbed_official | 133:d4dda5c437f0 | 350 | * @brief DeInitializes the I2C peripheral. |
mbed_official | 242:7074e42da0b2 | 351 | * @param hi2c: pointer to a I2C_HandleTypeDef structure that contains |
mbed_official | 242:7074e42da0b2 | 352 | * the configuration information for I2C module |
mbed_official | 133:d4dda5c437f0 | 353 | * @retval HAL status |
mbed_official | 133:d4dda5c437f0 | 354 | */ |
mbed_official | 133:d4dda5c437f0 | 355 | HAL_StatusTypeDef HAL_I2C_DeInit(I2C_HandleTypeDef *hi2c) |
mbed_official | 133:d4dda5c437f0 | 356 | { |
mbed_official | 133:d4dda5c437f0 | 357 | /* Check the I2C handle allocation */ |
mbed_official | 133:d4dda5c437f0 | 358 | if(hi2c == NULL) |
mbed_official | 133:d4dda5c437f0 | 359 | { |
mbed_official | 133:d4dda5c437f0 | 360 | return HAL_ERROR; |
mbed_official | 133:d4dda5c437f0 | 361 | } |
mbed_official | 133:d4dda5c437f0 | 362 | |
mbed_official | 133:d4dda5c437f0 | 363 | /* Check the parameters */ |
mbed_official | 133:d4dda5c437f0 | 364 | assert_param(IS_I2C_ALL_INSTANCE(hi2c->Instance)); |
mbed_official | 133:d4dda5c437f0 | 365 | |
mbed_official | 133:d4dda5c437f0 | 366 | hi2c->State = HAL_I2C_STATE_BUSY; |
mbed_official | 133:d4dda5c437f0 | 367 | |
mbed_official | 133:d4dda5c437f0 | 368 | /* Disable the I2C Peripheral Clock */ |
mbed_official | 133:d4dda5c437f0 | 369 | __HAL_I2C_DISABLE(hi2c); |
mbed_official | 133:d4dda5c437f0 | 370 | |
mbed_official | 133:d4dda5c437f0 | 371 | /* DeInit the low level hardware: GPIO, CLOCK, NVIC */ |
mbed_official | 133:d4dda5c437f0 | 372 | HAL_I2C_MspDeInit(hi2c); |
mbed_official | 133:d4dda5c437f0 | 373 | |
mbed_official | 133:d4dda5c437f0 | 374 | hi2c->ErrorCode = HAL_I2C_ERROR_NONE; |
mbed_official | 133:d4dda5c437f0 | 375 | |
mbed_official | 133:d4dda5c437f0 | 376 | hi2c->State = HAL_I2C_STATE_RESET; |
mbed_official | 133:d4dda5c437f0 | 377 | |
mbed_official | 133:d4dda5c437f0 | 378 | /* Release Lock */ |
mbed_official | 133:d4dda5c437f0 | 379 | __HAL_UNLOCK(hi2c); |
mbed_official | 133:d4dda5c437f0 | 380 | |
mbed_official | 133:d4dda5c437f0 | 381 | return HAL_OK; |
mbed_official | 133:d4dda5c437f0 | 382 | } |
mbed_official | 133:d4dda5c437f0 | 383 | |
mbed_official | 133:d4dda5c437f0 | 384 | /** |
mbed_official | 133:d4dda5c437f0 | 385 | * @brief I2C MSP Init. |
mbed_official | 242:7074e42da0b2 | 386 | * @param hi2c: pointer to a I2C_HandleTypeDef structure that contains |
mbed_official | 242:7074e42da0b2 | 387 | * the configuration information for I2C module |
mbed_official | 133:d4dda5c437f0 | 388 | * @retval None |
mbed_official | 133:d4dda5c437f0 | 389 | */ |
mbed_official | 133:d4dda5c437f0 | 390 | __weak void HAL_I2C_MspInit(I2C_HandleTypeDef *hi2c) |
mbed_official | 133:d4dda5c437f0 | 391 | { |
mbed_official | 133:d4dda5c437f0 | 392 | /* NOTE : This function Should not be modified, when the callback is needed, |
mbed_official | 133:d4dda5c437f0 | 393 | the HAL_I2C_MspInit could be implemented in the user file |
mbed_official | 133:d4dda5c437f0 | 394 | */ |
mbed_official | 133:d4dda5c437f0 | 395 | } |
mbed_official | 133:d4dda5c437f0 | 396 | |
mbed_official | 133:d4dda5c437f0 | 397 | /** |
mbed_official | 133:d4dda5c437f0 | 398 | * @brief I2C MSP DeInit |
mbed_official | 242:7074e42da0b2 | 399 | * @param hi2c: pointer to a I2C_HandleTypeDef structure that contains |
mbed_official | 242:7074e42da0b2 | 400 | * the configuration information for I2C module |
mbed_official | 133:d4dda5c437f0 | 401 | * @retval None |
mbed_official | 133:d4dda5c437f0 | 402 | */ |
mbed_official | 133:d4dda5c437f0 | 403 | __weak void HAL_I2C_MspDeInit(I2C_HandleTypeDef *hi2c) |
mbed_official | 133:d4dda5c437f0 | 404 | { |
mbed_official | 133:d4dda5c437f0 | 405 | /* NOTE : This function Should not be modified, when the callback is needed, |
mbed_official | 133:d4dda5c437f0 | 406 | the HAL_I2C_MspDeInit could be implemented in the user file |
mbed_official | 133:d4dda5c437f0 | 407 | */ |
mbed_official | 133:d4dda5c437f0 | 408 | } |
mbed_official | 133:d4dda5c437f0 | 409 | |
mbed_official | 133:d4dda5c437f0 | 410 | /** |
mbed_official | 133:d4dda5c437f0 | 411 | * @} |
mbed_official | 133:d4dda5c437f0 | 412 | */ |
mbed_official | 133:d4dda5c437f0 | 413 | |
mbed_official | 133:d4dda5c437f0 | 414 | /** @defgroup I2C_Group2 IO operation functions |
mbed_official | 133:d4dda5c437f0 | 415 | * @brief Data transfers functions |
mbed_official | 133:d4dda5c437f0 | 416 | * |
mbed_official | 133:d4dda5c437f0 | 417 | @verbatim |
mbed_official | 133:d4dda5c437f0 | 418 | =============================================================================== |
mbed_official | 133:d4dda5c437f0 | 419 | ##### IO operation functions ##### |
mbed_official | 133:d4dda5c437f0 | 420 | =============================================================================== |
mbed_official | 133:d4dda5c437f0 | 421 | [..] |
mbed_official | 133:d4dda5c437f0 | 422 | This subsection provides a set of functions allowing to manage the I2C data |
mbed_official | 133:d4dda5c437f0 | 423 | transfers. |
mbed_official | 133:d4dda5c437f0 | 424 | |
mbed_official | 242:7074e42da0b2 | 425 | (#) There are two modes of transfer: |
mbed_official | 133:d4dda5c437f0 | 426 | (++) Blocking mode : The communication is performed in the polling mode. |
mbed_official | 133:d4dda5c437f0 | 427 | The status of all data processing is returned by the same function |
mbed_official | 133:d4dda5c437f0 | 428 | after finishing transfer. |
mbed_official | 133:d4dda5c437f0 | 429 | (++) No-Blocking mode : The communication is performed using Interrupts |
mbed_official | 133:d4dda5c437f0 | 430 | or DMA. These functions return the status of the transfer startup. |
mbed_official | 133:d4dda5c437f0 | 431 | The end of the data processing will be indicated through the |
mbed_official | 133:d4dda5c437f0 | 432 | dedicated I2C IRQ when using Interrupt mode or the DMA IRQ when |
mbed_official | 133:d4dda5c437f0 | 433 | using DMA mode. |
mbed_official | 133:d4dda5c437f0 | 434 | |
mbed_official | 133:d4dda5c437f0 | 435 | (#) Blocking mode functions are : |
mbed_official | 133:d4dda5c437f0 | 436 | (++) HAL_I2C_Master_Transmit() |
mbed_official | 133:d4dda5c437f0 | 437 | (++) HAL_I2C_Master_Receive() |
mbed_official | 133:d4dda5c437f0 | 438 | (++) HAL_I2C_Slave_Transmit() |
mbed_official | 133:d4dda5c437f0 | 439 | (++) HAL_I2C_Slave_Receive() |
mbed_official | 133:d4dda5c437f0 | 440 | (++) HAL_I2C_Mem_Write() |
mbed_official | 133:d4dda5c437f0 | 441 | (++) HAL_I2C_Mem_Read() |
mbed_official | 133:d4dda5c437f0 | 442 | (++) HAL_I2C_IsDeviceReady() |
mbed_official | 133:d4dda5c437f0 | 443 | |
mbed_official | 133:d4dda5c437f0 | 444 | (#) No-Blocking mode functions with Interrupt are : |
mbed_official | 133:d4dda5c437f0 | 445 | (++) HAL_I2C_Master_Transmit_IT() |
mbed_official | 133:d4dda5c437f0 | 446 | (++) HAL_I2C_Master_Receive_IT() |
mbed_official | 133:d4dda5c437f0 | 447 | (++) HAL_I2C_Slave_Transmit_IT() |
mbed_official | 133:d4dda5c437f0 | 448 | (++) HAL_I2C_Slave_Receive_IT() |
mbed_official | 133:d4dda5c437f0 | 449 | (++) HAL_I2C_Mem_Write_IT() |
mbed_official | 133:d4dda5c437f0 | 450 | (++) HAL_I2C_Mem_Read_IT() |
mbed_official | 133:d4dda5c437f0 | 451 | |
mbed_official | 133:d4dda5c437f0 | 452 | (#) No-Blocking mode functions with DMA are : |
mbed_official | 133:d4dda5c437f0 | 453 | (++) HAL_I2C_Master_Transmit_DMA() |
mbed_official | 133:d4dda5c437f0 | 454 | (++) HAL_I2C_Master_Receive_DMA() |
mbed_official | 133:d4dda5c437f0 | 455 | (++) HAL_I2C_Slave_Transmit_DMA() |
mbed_official | 133:d4dda5c437f0 | 456 | (++) HAL_I2C_Slave_Receive_DMA() |
mbed_official | 133:d4dda5c437f0 | 457 | (++) HAL_I2C_Mem_Write_DMA() |
mbed_official | 133:d4dda5c437f0 | 458 | (++) HAL_I2C_Mem_Read_DMA() |
mbed_official | 133:d4dda5c437f0 | 459 | |
mbed_official | 242:7074e42da0b2 | 460 | (#) A set of Transfer Complete Callbacks are provided in non Blocking mode: |
mbed_official | 133:d4dda5c437f0 | 461 | (++) HAL_I2C_MemTxCpltCallback() |
mbed_official | 133:d4dda5c437f0 | 462 | (++) HAL_I2C_MemRxCpltCallback() |
mbed_official | 133:d4dda5c437f0 | 463 | (++) HAL_I2C_MasterTxCpltCallback() |
mbed_official | 133:d4dda5c437f0 | 464 | (++) HAL_I2C_MasterRxCpltCallback() |
mbed_official | 133:d4dda5c437f0 | 465 | (++) HAL_I2C_SlaveTxCpltCallback() |
mbed_official | 133:d4dda5c437f0 | 466 | (++) HAL_I2C_SlaveRxCpltCallback() |
mbed_official | 133:d4dda5c437f0 | 467 | (++) HAL_I2C_ErrorCallback() |
mbed_official | 133:d4dda5c437f0 | 468 | |
mbed_official | 133:d4dda5c437f0 | 469 | @endverbatim |
mbed_official | 133:d4dda5c437f0 | 470 | * @{ |
mbed_official | 133:d4dda5c437f0 | 471 | */ |
mbed_official | 133:d4dda5c437f0 | 472 | |
mbed_official | 133:d4dda5c437f0 | 473 | /** |
mbed_official | 133:d4dda5c437f0 | 474 | * @brief Transmits in master mode an amount of data in blocking mode. |
mbed_official | 242:7074e42da0b2 | 475 | * @param hi2c: pointer to a I2C_HandleTypeDef structure that contains |
mbed_official | 242:7074e42da0b2 | 476 | * the configuration information for I2C module |
mbed_official | 133:d4dda5c437f0 | 477 | * @param DevAddress: Target device address |
mbed_official | 133:d4dda5c437f0 | 478 | * @param pData: Pointer to data buffer |
mbed_official | 133:d4dda5c437f0 | 479 | * @param Size: Amount of data to be sent |
mbed_official | 133:d4dda5c437f0 | 480 | * @param Timeout: Timeout duration |
mbed_official | 133:d4dda5c437f0 | 481 | * @retval HAL status |
mbed_official | 133:d4dda5c437f0 | 482 | */ |
mbed_official | 133:d4dda5c437f0 | 483 | HAL_StatusTypeDef HAL_I2C_Master_Transmit(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t Timeout) |
mbed_official | 133:d4dda5c437f0 | 484 | { |
mbed_official | 133:d4dda5c437f0 | 485 | if(hi2c->State == HAL_I2C_STATE_READY) |
mbed_official | 133:d4dda5c437f0 | 486 | { |
mbed_official | 133:d4dda5c437f0 | 487 | if((pData == NULL) || (Size == 0)) |
mbed_official | 133:d4dda5c437f0 | 488 | { |
mbed_official | 133:d4dda5c437f0 | 489 | return HAL_ERROR; |
mbed_official | 133:d4dda5c437f0 | 490 | } |
mbed_official | 133:d4dda5c437f0 | 491 | |
mbed_official | 133:d4dda5c437f0 | 492 | if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) == SET) |
mbed_official | 133:d4dda5c437f0 | 493 | { |
mbed_official | 133:d4dda5c437f0 | 494 | return HAL_BUSY; |
mbed_official | 133:d4dda5c437f0 | 495 | } |
mbed_official | 133:d4dda5c437f0 | 496 | |
mbed_official | 133:d4dda5c437f0 | 497 | /* Process Locked */ |
mbed_official | 133:d4dda5c437f0 | 498 | __HAL_LOCK(hi2c); |
mbed_official | 133:d4dda5c437f0 | 499 | |
mbed_official | 133:d4dda5c437f0 | 500 | hi2c->State = HAL_I2C_STATE_BUSY_TX; |
mbed_official | 133:d4dda5c437f0 | 501 | hi2c->ErrorCode = HAL_I2C_ERROR_NONE; |
mbed_official | 133:d4dda5c437f0 | 502 | |
mbed_official | 133:d4dda5c437f0 | 503 | /* Send Slave Address */ |
mbed_official | 133:d4dda5c437f0 | 504 | if(I2C_MasterRequestWrite(hi2c, DevAddress, Timeout) != HAL_OK) |
mbed_official | 133:d4dda5c437f0 | 505 | { |
mbed_official | 133:d4dda5c437f0 | 506 | if(hi2c->ErrorCode == HAL_I2C_ERROR_AF) |
mbed_official | 133:d4dda5c437f0 | 507 | { |
mbed_official | 133:d4dda5c437f0 | 508 | /* Process Unlocked */ |
mbed_official | 133:d4dda5c437f0 | 509 | __HAL_UNLOCK(hi2c); |
mbed_official | 133:d4dda5c437f0 | 510 | return HAL_ERROR; |
mbed_official | 133:d4dda5c437f0 | 511 | } |
mbed_official | 133:d4dda5c437f0 | 512 | else |
mbed_official | 133:d4dda5c437f0 | 513 | { |
mbed_official | 133:d4dda5c437f0 | 514 | /* Process Unlocked */ |
mbed_official | 133:d4dda5c437f0 | 515 | __HAL_UNLOCK(hi2c); |
mbed_official | 133:d4dda5c437f0 | 516 | return HAL_TIMEOUT; |
mbed_official | 133:d4dda5c437f0 | 517 | } |
mbed_official | 133:d4dda5c437f0 | 518 | } |
mbed_official | 133:d4dda5c437f0 | 519 | |
mbed_official | 133:d4dda5c437f0 | 520 | /* Clear ADDR flag */ |
mbed_official | 133:d4dda5c437f0 | 521 | __HAL_I2C_CLEAR_ADDRFLAG(hi2c); |
mbed_official | 133:d4dda5c437f0 | 522 | |
mbed_official | 133:d4dda5c437f0 | 523 | while(Size > 0) |
mbed_official | 133:d4dda5c437f0 | 524 | { |
mbed_official | 133:d4dda5c437f0 | 525 | /* Wait until TXE flag is set */ |
mbed_official | 133:d4dda5c437f0 | 526 | if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_TXE, RESET, Timeout) != HAL_OK) |
mbed_official | 133:d4dda5c437f0 | 527 | { |
mbed_official | 133:d4dda5c437f0 | 528 | return HAL_TIMEOUT; |
mbed_official | 133:d4dda5c437f0 | 529 | } |
mbed_official | 133:d4dda5c437f0 | 530 | |
mbed_official | 133:d4dda5c437f0 | 531 | /* Write data to DR */ |
mbed_official | 133:d4dda5c437f0 | 532 | hi2c->Instance->DR = (*pData++); |
mbed_official | 133:d4dda5c437f0 | 533 | Size--; |
mbed_official | 133:d4dda5c437f0 | 534 | |
mbed_official | 133:d4dda5c437f0 | 535 | if((__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BTF) == SET) && (Size != 0)) |
mbed_official | 133:d4dda5c437f0 | 536 | { |
mbed_official | 133:d4dda5c437f0 | 537 | /* Write data to DR */ |
mbed_official | 133:d4dda5c437f0 | 538 | hi2c->Instance->DR = (*pData++); |
mbed_official | 133:d4dda5c437f0 | 539 | Size--; |
mbed_official | 133:d4dda5c437f0 | 540 | } |
mbed_official | 133:d4dda5c437f0 | 541 | } |
mbed_official | 133:d4dda5c437f0 | 542 | |
mbed_official | 133:d4dda5c437f0 | 543 | /* Wait until TXE flag is set */ |
mbed_official | 133:d4dda5c437f0 | 544 | if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_TXE, RESET, Timeout) != HAL_OK) |
mbed_official | 133:d4dda5c437f0 | 545 | { |
mbed_official | 133:d4dda5c437f0 | 546 | return HAL_TIMEOUT; |
mbed_official | 133:d4dda5c437f0 | 547 | } |
mbed_official | 133:d4dda5c437f0 | 548 | |
mbed_official | 133:d4dda5c437f0 | 549 | /* Generate Stop */ |
mbed_official | 133:d4dda5c437f0 | 550 | hi2c->Instance->CR1 |= I2C_CR1_STOP; |
mbed_official | 133:d4dda5c437f0 | 551 | |
mbed_official | 133:d4dda5c437f0 | 552 | /* Wait until BUSY flag is reset */ |
mbed_official | 133:d4dda5c437f0 | 553 | if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, Timeout) != HAL_OK) |
mbed_official | 133:d4dda5c437f0 | 554 | { |
mbed_official | 133:d4dda5c437f0 | 555 | return HAL_TIMEOUT; |
mbed_official | 133:d4dda5c437f0 | 556 | } |
mbed_official | 133:d4dda5c437f0 | 557 | |
mbed_official | 133:d4dda5c437f0 | 558 | hi2c->State = HAL_I2C_STATE_READY; |
mbed_official | 133:d4dda5c437f0 | 559 | |
mbed_official | 133:d4dda5c437f0 | 560 | /* Process Unlocked */ |
mbed_official | 133:d4dda5c437f0 | 561 | __HAL_UNLOCK(hi2c); |
mbed_official | 133:d4dda5c437f0 | 562 | |
mbed_official | 133:d4dda5c437f0 | 563 | return HAL_OK; |
mbed_official | 133:d4dda5c437f0 | 564 | } |
mbed_official | 133:d4dda5c437f0 | 565 | else |
mbed_official | 133:d4dda5c437f0 | 566 | { |
mbed_official | 133:d4dda5c437f0 | 567 | return HAL_BUSY; |
mbed_official | 133:d4dda5c437f0 | 568 | } |
mbed_official | 133:d4dda5c437f0 | 569 | } |
mbed_official | 133:d4dda5c437f0 | 570 | |
mbed_official | 133:d4dda5c437f0 | 571 | /** |
mbed_official | 133:d4dda5c437f0 | 572 | * @brief Receives in master mode an amount of data in blocking mode. |
mbed_official | 242:7074e42da0b2 | 573 | * @param hi2c: pointer to a I2C_HandleTypeDef structure that contains |
mbed_official | 242:7074e42da0b2 | 574 | * the configuration information for I2C module |
mbed_official | 133:d4dda5c437f0 | 575 | * @param DevAddress: Target device address |
mbed_official | 133:d4dda5c437f0 | 576 | * @param pData: Pointer to data buffer |
mbed_official | 133:d4dda5c437f0 | 577 | * @param Size: Amount of data to be sent |
mbed_official | 133:d4dda5c437f0 | 578 | * @param Timeout: Timeout duration |
mbed_official | 133:d4dda5c437f0 | 579 | * @retval HAL status |
mbed_official | 133:d4dda5c437f0 | 580 | */ |
mbed_official | 133:d4dda5c437f0 | 581 | HAL_StatusTypeDef HAL_I2C_Master_Receive(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t Timeout) |
mbed_official | 133:d4dda5c437f0 | 582 | { |
mbed_official | 133:d4dda5c437f0 | 583 | if(hi2c->State == HAL_I2C_STATE_READY) |
mbed_official | 133:d4dda5c437f0 | 584 | { |
mbed_official | 133:d4dda5c437f0 | 585 | if((pData == NULL) || (Size == 0)) |
mbed_official | 133:d4dda5c437f0 | 586 | { |
mbed_official | 133:d4dda5c437f0 | 587 | return HAL_ERROR; |
mbed_official | 133:d4dda5c437f0 | 588 | } |
mbed_official | 133:d4dda5c437f0 | 589 | |
mbed_official | 133:d4dda5c437f0 | 590 | if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) == SET) |
mbed_official | 133:d4dda5c437f0 | 591 | { |
mbed_official | 133:d4dda5c437f0 | 592 | return HAL_BUSY; |
mbed_official | 133:d4dda5c437f0 | 593 | } |
mbed_official | 133:d4dda5c437f0 | 594 | |
mbed_official | 133:d4dda5c437f0 | 595 | /* Process Locked */ |
mbed_official | 133:d4dda5c437f0 | 596 | __HAL_LOCK(hi2c); |
mbed_official | 133:d4dda5c437f0 | 597 | |
mbed_official | 133:d4dda5c437f0 | 598 | hi2c->State = HAL_I2C_STATE_BUSY_RX; |
mbed_official | 133:d4dda5c437f0 | 599 | hi2c->ErrorCode = HAL_I2C_ERROR_NONE; |
mbed_official | 133:d4dda5c437f0 | 600 | |
mbed_official | 133:d4dda5c437f0 | 601 | /* Send Slave Address */ |
mbed_official | 133:d4dda5c437f0 | 602 | if(I2C_MasterRequestRead(hi2c, DevAddress, Timeout) != HAL_OK) |
mbed_official | 133:d4dda5c437f0 | 603 | { |
mbed_official | 133:d4dda5c437f0 | 604 | if(hi2c->ErrorCode == HAL_I2C_ERROR_AF) |
mbed_official | 133:d4dda5c437f0 | 605 | { |
mbed_official | 133:d4dda5c437f0 | 606 | /* Process Unlocked */ |
mbed_official | 133:d4dda5c437f0 | 607 | __HAL_UNLOCK(hi2c); |
mbed_official | 133:d4dda5c437f0 | 608 | return HAL_ERROR; |
mbed_official | 133:d4dda5c437f0 | 609 | } |
mbed_official | 133:d4dda5c437f0 | 610 | else |
mbed_official | 133:d4dda5c437f0 | 611 | { |
mbed_official | 133:d4dda5c437f0 | 612 | /* Process Unlocked */ |
mbed_official | 133:d4dda5c437f0 | 613 | __HAL_UNLOCK(hi2c); |
mbed_official | 133:d4dda5c437f0 | 614 | return HAL_TIMEOUT; |
mbed_official | 133:d4dda5c437f0 | 615 | } |
mbed_official | 133:d4dda5c437f0 | 616 | } |
mbed_official | 133:d4dda5c437f0 | 617 | |
mbed_official | 133:d4dda5c437f0 | 618 | if(Size == 1) |
mbed_official | 133:d4dda5c437f0 | 619 | { |
mbed_official | 133:d4dda5c437f0 | 620 | /* Disable Acknowledge */ |
mbed_official | 133:d4dda5c437f0 | 621 | hi2c->Instance->CR1 &= ~I2C_CR1_ACK; |
mbed_official | 133:d4dda5c437f0 | 622 | |
mbed_official | 133:d4dda5c437f0 | 623 | /* Clear ADDR flag */ |
mbed_official | 133:d4dda5c437f0 | 624 | __HAL_I2C_CLEAR_ADDRFLAG(hi2c); |
mbed_official | 133:d4dda5c437f0 | 625 | |
mbed_official | 133:d4dda5c437f0 | 626 | /* Generate Stop */ |
mbed_official | 133:d4dda5c437f0 | 627 | hi2c->Instance->CR1 |= I2C_CR1_STOP; |
mbed_official | 133:d4dda5c437f0 | 628 | } |
mbed_official | 133:d4dda5c437f0 | 629 | else if(Size == 2) |
mbed_official | 133:d4dda5c437f0 | 630 | { |
mbed_official | 133:d4dda5c437f0 | 631 | /* Disable Acknowledge */ |
mbed_official | 133:d4dda5c437f0 | 632 | hi2c->Instance->CR1 &= ~I2C_CR1_ACK; |
mbed_official | 133:d4dda5c437f0 | 633 | |
mbed_official | 133:d4dda5c437f0 | 634 | /* Enable Pos */ |
mbed_official | 133:d4dda5c437f0 | 635 | hi2c->Instance->CR1 |= I2C_CR1_POS; |
mbed_official | 133:d4dda5c437f0 | 636 | |
mbed_official | 133:d4dda5c437f0 | 637 | /* Clear ADDR flag */ |
mbed_official | 133:d4dda5c437f0 | 638 | __HAL_I2C_CLEAR_ADDRFLAG(hi2c); |
mbed_official | 133:d4dda5c437f0 | 639 | } |
mbed_official | 133:d4dda5c437f0 | 640 | else |
mbed_official | 133:d4dda5c437f0 | 641 | { |
mbed_official | 133:d4dda5c437f0 | 642 | /* Enable Acknowledge */ |
mbed_official | 133:d4dda5c437f0 | 643 | hi2c->Instance->CR1 |= I2C_CR1_ACK; |
mbed_official | 133:d4dda5c437f0 | 644 | |
mbed_official | 133:d4dda5c437f0 | 645 | /* Clear ADDR flag */ |
mbed_official | 133:d4dda5c437f0 | 646 | __HAL_I2C_CLEAR_ADDRFLAG(hi2c); |
mbed_official | 133:d4dda5c437f0 | 647 | } |
mbed_official | 133:d4dda5c437f0 | 648 | |
mbed_official | 133:d4dda5c437f0 | 649 | while(Size > 0) |
mbed_official | 133:d4dda5c437f0 | 650 | { |
mbed_official | 133:d4dda5c437f0 | 651 | if(Size <= 3) |
mbed_official | 133:d4dda5c437f0 | 652 | { |
mbed_official | 133:d4dda5c437f0 | 653 | /* One byte */ |
mbed_official | 133:d4dda5c437f0 | 654 | if(Size == 1) |
mbed_official | 133:d4dda5c437f0 | 655 | { |
mbed_official | 133:d4dda5c437f0 | 656 | /* Wait until RXNE flag is set */ |
mbed_official | 133:d4dda5c437f0 | 657 | if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_RXNE, RESET, Timeout) != HAL_OK) |
mbed_official | 133:d4dda5c437f0 | 658 | { |
mbed_official | 133:d4dda5c437f0 | 659 | return HAL_TIMEOUT; |
mbed_official | 133:d4dda5c437f0 | 660 | } |
mbed_official | 133:d4dda5c437f0 | 661 | |
mbed_official | 133:d4dda5c437f0 | 662 | /* Read data from DR */ |
mbed_official | 133:d4dda5c437f0 | 663 | (*pData++) = hi2c->Instance->DR; |
mbed_official | 133:d4dda5c437f0 | 664 | Size--; |
mbed_official | 133:d4dda5c437f0 | 665 | } |
mbed_official | 133:d4dda5c437f0 | 666 | /* Two bytes */ |
mbed_official | 133:d4dda5c437f0 | 667 | else if(Size == 2) |
mbed_official | 133:d4dda5c437f0 | 668 | { |
mbed_official | 133:d4dda5c437f0 | 669 | /* Wait until BTF flag is set */ |
mbed_official | 133:d4dda5c437f0 | 670 | if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BTF, RESET, Timeout) != HAL_OK) |
mbed_official | 133:d4dda5c437f0 | 671 | { |
mbed_official | 133:d4dda5c437f0 | 672 | return HAL_TIMEOUT; |
mbed_official | 133:d4dda5c437f0 | 673 | } |
mbed_official | 133:d4dda5c437f0 | 674 | |
mbed_official | 133:d4dda5c437f0 | 675 | /* Generate Stop */ |
mbed_official | 133:d4dda5c437f0 | 676 | hi2c->Instance->CR1 |= I2C_CR1_STOP; |
mbed_official | 133:d4dda5c437f0 | 677 | |
mbed_official | 133:d4dda5c437f0 | 678 | /* Read data from DR */ |
mbed_official | 133:d4dda5c437f0 | 679 | (*pData++) = hi2c->Instance->DR; |
mbed_official | 133:d4dda5c437f0 | 680 | Size--; |
mbed_official | 133:d4dda5c437f0 | 681 | |
mbed_official | 133:d4dda5c437f0 | 682 | /* Read data from DR */ |
mbed_official | 133:d4dda5c437f0 | 683 | (*pData++) = hi2c->Instance->DR; |
mbed_official | 133:d4dda5c437f0 | 684 | Size--; |
mbed_official | 133:d4dda5c437f0 | 685 | } |
mbed_official | 133:d4dda5c437f0 | 686 | /* 3 Last bytes */ |
mbed_official | 133:d4dda5c437f0 | 687 | else |
mbed_official | 133:d4dda5c437f0 | 688 | { |
mbed_official | 133:d4dda5c437f0 | 689 | /* Wait until BTF flag is set */ |
mbed_official | 133:d4dda5c437f0 | 690 | if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BTF, RESET, Timeout) != HAL_OK) |
mbed_official | 133:d4dda5c437f0 | 691 | { |
mbed_official | 133:d4dda5c437f0 | 692 | return HAL_TIMEOUT; |
mbed_official | 133:d4dda5c437f0 | 693 | } |
mbed_official | 133:d4dda5c437f0 | 694 | |
mbed_official | 133:d4dda5c437f0 | 695 | /* Disable Acknowledge */ |
mbed_official | 133:d4dda5c437f0 | 696 | hi2c->Instance->CR1 &= ~I2C_CR1_ACK; |
mbed_official | 133:d4dda5c437f0 | 697 | |
mbed_official | 133:d4dda5c437f0 | 698 | /* Read data from DR */ |
mbed_official | 133:d4dda5c437f0 | 699 | (*pData++) = hi2c->Instance->DR; |
mbed_official | 133:d4dda5c437f0 | 700 | Size--; |
mbed_official | 133:d4dda5c437f0 | 701 | |
mbed_official | 133:d4dda5c437f0 | 702 | /* Wait until BTF flag is set */ |
mbed_official | 133:d4dda5c437f0 | 703 | if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BTF, RESET, Timeout) != HAL_OK) |
mbed_official | 133:d4dda5c437f0 | 704 | { |
mbed_official | 133:d4dda5c437f0 | 705 | return HAL_TIMEOUT; |
mbed_official | 133:d4dda5c437f0 | 706 | } |
mbed_official | 133:d4dda5c437f0 | 707 | |
mbed_official | 133:d4dda5c437f0 | 708 | /* Generate Stop */ |
mbed_official | 133:d4dda5c437f0 | 709 | hi2c->Instance->CR1 |= I2C_CR1_STOP; |
mbed_official | 133:d4dda5c437f0 | 710 | |
mbed_official | 133:d4dda5c437f0 | 711 | /* Read data from DR */ |
mbed_official | 133:d4dda5c437f0 | 712 | (*pData++) = hi2c->Instance->DR; |
mbed_official | 133:d4dda5c437f0 | 713 | Size--; |
mbed_official | 133:d4dda5c437f0 | 714 | |
mbed_official | 133:d4dda5c437f0 | 715 | /* Read data from DR */ |
mbed_official | 133:d4dda5c437f0 | 716 | (*pData++) = hi2c->Instance->DR; |
mbed_official | 133:d4dda5c437f0 | 717 | Size--; |
mbed_official | 133:d4dda5c437f0 | 718 | } |
mbed_official | 133:d4dda5c437f0 | 719 | } |
mbed_official | 133:d4dda5c437f0 | 720 | else |
mbed_official | 133:d4dda5c437f0 | 721 | { |
mbed_official | 133:d4dda5c437f0 | 722 | /* Wait until RXNE flag is set */ |
mbed_official | 133:d4dda5c437f0 | 723 | if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_RXNE, RESET, Timeout) != HAL_OK) |
mbed_official | 133:d4dda5c437f0 | 724 | { |
mbed_official | 133:d4dda5c437f0 | 725 | return HAL_TIMEOUT; |
mbed_official | 133:d4dda5c437f0 | 726 | } |
mbed_official | 133:d4dda5c437f0 | 727 | |
mbed_official | 133:d4dda5c437f0 | 728 | /* Read data from DR */ |
mbed_official | 133:d4dda5c437f0 | 729 | (*pData++) = hi2c->Instance->DR; |
mbed_official | 133:d4dda5c437f0 | 730 | Size--; |
mbed_official | 133:d4dda5c437f0 | 731 | |
mbed_official | 133:d4dda5c437f0 | 732 | if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BTF) == SET) |
mbed_official | 133:d4dda5c437f0 | 733 | { |
mbed_official | 133:d4dda5c437f0 | 734 | /* Read data from DR */ |
mbed_official | 133:d4dda5c437f0 | 735 | (*pData++) = hi2c->Instance->DR; |
mbed_official | 133:d4dda5c437f0 | 736 | Size--; |
mbed_official | 133:d4dda5c437f0 | 737 | } |
mbed_official | 133:d4dda5c437f0 | 738 | } |
mbed_official | 133:d4dda5c437f0 | 739 | } |
mbed_official | 133:d4dda5c437f0 | 740 | |
mbed_official | 133:d4dda5c437f0 | 741 | /* Disable Pos */ |
mbed_official | 133:d4dda5c437f0 | 742 | hi2c->Instance->CR1 &= ~I2C_CR1_POS; |
mbed_official | 133:d4dda5c437f0 | 743 | |
mbed_official | 133:d4dda5c437f0 | 744 | /* Wait until BUSY flag is reset */ |
mbed_official | 133:d4dda5c437f0 | 745 | if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, Timeout) != HAL_OK) |
mbed_official | 133:d4dda5c437f0 | 746 | { |
mbed_official | 133:d4dda5c437f0 | 747 | return HAL_TIMEOUT; |
mbed_official | 133:d4dda5c437f0 | 748 | } |
mbed_official | 133:d4dda5c437f0 | 749 | |
mbed_official | 133:d4dda5c437f0 | 750 | hi2c->State = HAL_I2C_STATE_READY; |
mbed_official | 133:d4dda5c437f0 | 751 | |
mbed_official | 133:d4dda5c437f0 | 752 | /* Process Unlocked */ |
mbed_official | 133:d4dda5c437f0 | 753 | __HAL_UNLOCK(hi2c); |
mbed_official | 133:d4dda5c437f0 | 754 | |
mbed_official | 133:d4dda5c437f0 | 755 | return HAL_OK; |
mbed_official | 133:d4dda5c437f0 | 756 | } |
mbed_official | 133:d4dda5c437f0 | 757 | else |
mbed_official | 133:d4dda5c437f0 | 758 | { |
mbed_official | 133:d4dda5c437f0 | 759 | return HAL_BUSY; |
mbed_official | 133:d4dda5c437f0 | 760 | } |
mbed_official | 133:d4dda5c437f0 | 761 | } |
mbed_official | 133:d4dda5c437f0 | 762 | |
mbed_official | 133:d4dda5c437f0 | 763 | /** |
mbed_official | 133:d4dda5c437f0 | 764 | * @brief Transmits in slave mode an amount of data in blocking mode. |
mbed_official | 242:7074e42da0b2 | 765 | * @param hi2c: pointer to a I2C_HandleTypeDef structure that contains |
mbed_official | 242:7074e42da0b2 | 766 | * the configuration information for I2C module |
mbed_official | 133:d4dda5c437f0 | 767 | * @param pData: Pointer to data buffer |
mbed_official | 133:d4dda5c437f0 | 768 | * @param Size: Amount of data to be sent |
mbed_official | 133:d4dda5c437f0 | 769 | * @param Timeout: Timeout duration |
mbed_official | 133:d4dda5c437f0 | 770 | * @retval HAL status |
mbed_official | 133:d4dda5c437f0 | 771 | */ |
mbed_official | 133:d4dda5c437f0 | 772 | HAL_StatusTypeDef HAL_I2C_Slave_Transmit(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size, uint32_t Timeout) |
mbed_official | 133:d4dda5c437f0 | 773 | { |
mbed_official | 133:d4dda5c437f0 | 774 | if(hi2c->State == HAL_I2C_STATE_READY) |
mbed_official | 133:d4dda5c437f0 | 775 | { |
mbed_official | 133:d4dda5c437f0 | 776 | if((pData == NULL) || (Size == 0)) |
mbed_official | 133:d4dda5c437f0 | 777 | { |
mbed_official | 133:d4dda5c437f0 | 778 | return HAL_ERROR; |
mbed_official | 133:d4dda5c437f0 | 779 | } |
mbed_official | 133:d4dda5c437f0 | 780 | |
mbed_official | 133:d4dda5c437f0 | 781 | if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) == SET) |
mbed_official | 133:d4dda5c437f0 | 782 | { |
mbed_official | 133:d4dda5c437f0 | 783 | return HAL_BUSY; |
mbed_official | 133:d4dda5c437f0 | 784 | } |
mbed_official | 133:d4dda5c437f0 | 785 | |
mbed_official | 133:d4dda5c437f0 | 786 | /* Process Locked */ |
mbed_official | 133:d4dda5c437f0 | 787 | __HAL_LOCK(hi2c); |
mbed_official | 133:d4dda5c437f0 | 788 | |
mbed_official | 133:d4dda5c437f0 | 789 | hi2c->State = HAL_I2C_STATE_BUSY_TX; |
mbed_official | 133:d4dda5c437f0 | 790 | hi2c->ErrorCode = HAL_I2C_ERROR_NONE; |
mbed_official | 133:d4dda5c437f0 | 791 | |
mbed_official | 133:d4dda5c437f0 | 792 | /* Enable Address Acknowledge */ |
mbed_official | 133:d4dda5c437f0 | 793 | hi2c->Instance->CR1 |= I2C_CR1_ACK; |
mbed_official | 133:d4dda5c437f0 | 794 | |
mbed_official | 133:d4dda5c437f0 | 795 | /* Wait until ADDR flag is set */ |
mbed_official | 133:d4dda5c437f0 | 796 | if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_ADDR, RESET, Timeout) != HAL_OK) |
mbed_official | 133:d4dda5c437f0 | 797 | { |
mbed_official | 133:d4dda5c437f0 | 798 | return HAL_TIMEOUT; |
mbed_official | 133:d4dda5c437f0 | 799 | } |
mbed_official | 133:d4dda5c437f0 | 800 | |
mbed_official | 133:d4dda5c437f0 | 801 | /* Clear ADDR flag */ |
mbed_official | 133:d4dda5c437f0 | 802 | __HAL_I2C_CLEAR_ADDRFLAG(hi2c); |
mbed_official | 133:d4dda5c437f0 | 803 | |
mbed_official | 133:d4dda5c437f0 | 804 | /* If 10bit addressing mode is selected */ |
mbed_official | 133:d4dda5c437f0 | 805 | if(hi2c->Init.AddressingMode == I2C_ADDRESSINGMODE_10BIT) |
mbed_official | 133:d4dda5c437f0 | 806 | { |
mbed_official | 133:d4dda5c437f0 | 807 | /* Wait until ADDR flag is set */ |
mbed_official | 133:d4dda5c437f0 | 808 | if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_ADDR, RESET, Timeout) != HAL_OK) |
mbed_official | 133:d4dda5c437f0 | 809 | { |
mbed_official | 133:d4dda5c437f0 | 810 | return HAL_TIMEOUT; |
mbed_official | 133:d4dda5c437f0 | 811 | } |
mbed_official | 133:d4dda5c437f0 | 812 | |
mbed_official | 133:d4dda5c437f0 | 813 | /* Clear ADDR flag */ |
mbed_official | 133:d4dda5c437f0 | 814 | __HAL_I2C_CLEAR_ADDRFLAG(hi2c); |
mbed_official | 133:d4dda5c437f0 | 815 | } |
mbed_official | 133:d4dda5c437f0 | 816 | |
mbed_official | 133:d4dda5c437f0 | 817 | while(Size > 0) |
mbed_official | 133:d4dda5c437f0 | 818 | { |
mbed_official | 133:d4dda5c437f0 | 819 | /* Wait until TXE flag is set */ |
mbed_official | 133:d4dda5c437f0 | 820 | if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_TXE, RESET, Timeout) != HAL_OK) |
mbed_official | 133:d4dda5c437f0 | 821 | { |
mbed_official | 133:d4dda5c437f0 | 822 | return HAL_TIMEOUT; |
mbed_official | 133:d4dda5c437f0 | 823 | } |
mbed_official | 133:d4dda5c437f0 | 824 | |
mbed_official | 133:d4dda5c437f0 | 825 | /* Write data to DR */ |
mbed_official | 133:d4dda5c437f0 | 826 | hi2c->Instance->DR = (*pData++); |
mbed_official | 133:d4dda5c437f0 | 827 | Size--; |
mbed_official | 133:d4dda5c437f0 | 828 | |
mbed_official | 133:d4dda5c437f0 | 829 | if((__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BTF) == SET) && (Size != 0)) |
mbed_official | 133:d4dda5c437f0 | 830 | { |
mbed_official | 133:d4dda5c437f0 | 831 | /* Write data to DR */ |
mbed_official | 133:d4dda5c437f0 | 832 | hi2c->Instance->DR = (*pData++); |
mbed_official | 133:d4dda5c437f0 | 833 | Size--; |
mbed_official | 133:d4dda5c437f0 | 834 | } |
mbed_official | 133:d4dda5c437f0 | 835 | } |
mbed_official | 133:d4dda5c437f0 | 836 | |
mbed_official | 133:d4dda5c437f0 | 837 | /* Wait until AF flag is set */ |
mbed_official | 133:d4dda5c437f0 | 838 | if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_AF, RESET, Timeout) != HAL_OK) |
mbed_official | 133:d4dda5c437f0 | 839 | { |
mbed_official | 133:d4dda5c437f0 | 840 | return HAL_TIMEOUT; |
mbed_official | 133:d4dda5c437f0 | 841 | } |
mbed_official | 133:d4dda5c437f0 | 842 | |
mbed_official | 133:d4dda5c437f0 | 843 | /* Clear AF flag */ |
mbed_official | 133:d4dda5c437f0 | 844 | __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF); |
mbed_official | 133:d4dda5c437f0 | 845 | |
mbed_official | 133:d4dda5c437f0 | 846 | /* Disable Address Acknowledge */ |
mbed_official | 133:d4dda5c437f0 | 847 | hi2c->Instance->CR1 &= ~I2C_CR1_ACK; |
mbed_official | 133:d4dda5c437f0 | 848 | |
mbed_official | 133:d4dda5c437f0 | 849 | /* Wait until BUSY flag is reset */ |
mbed_official | 133:d4dda5c437f0 | 850 | if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, Timeout) != HAL_OK) |
mbed_official | 133:d4dda5c437f0 | 851 | { |
mbed_official | 133:d4dda5c437f0 | 852 | return HAL_TIMEOUT; |
mbed_official | 133:d4dda5c437f0 | 853 | } |
mbed_official | 133:d4dda5c437f0 | 854 | |
mbed_official | 133:d4dda5c437f0 | 855 | hi2c->State = HAL_I2C_STATE_READY; |
mbed_official | 133:d4dda5c437f0 | 856 | |
mbed_official | 133:d4dda5c437f0 | 857 | /* Process Unlocked */ |
mbed_official | 133:d4dda5c437f0 | 858 | __HAL_UNLOCK(hi2c); |
mbed_official | 133:d4dda5c437f0 | 859 | |
mbed_official | 133:d4dda5c437f0 | 860 | return HAL_OK; |
mbed_official | 133:d4dda5c437f0 | 861 | } |
mbed_official | 133:d4dda5c437f0 | 862 | else |
mbed_official | 133:d4dda5c437f0 | 863 | { |
mbed_official | 133:d4dda5c437f0 | 864 | return HAL_BUSY; |
mbed_official | 133:d4dda5c437f0 | 865 | } |
mbed_official | 133:d4dda5c437f0 | 866 | } |
mbed_official | 133:d4dda5c437f0 | 867 | |
mbed_official | 133:d4dda5c437f0 | 868 | /** |
mbed_official | 133:d4dda5c437f0 | 869 | * @brief Receive in slave mode an amount of data in blocking mode |
mbed_official | 242:7074e42da0b2 | 870 | * @param hi2c: pointer to a I2C_HandleTypeDef structure that contains |
mbed_official | 242:7074e42da0b2 | 871 | * the configuration information for I2C module |
mbed_official | 133:d4dda5c437f0 | 872 | * @param pData: Pointer to data buffer |
mbed_official | 133:d4dda5c437f0 | 873 | * @param Size: Amount of data to be sent |
mbed_official | 133:d4dda5c437f0 | 874 | * @param Timeout: Timeout duration |
mbed_official | 133:d4dda5c437f0 | 875 | * @retval HAL status |
mbed_official | 133:d4dda5c437f0 | 876 | */ |
mbed_official | 133:d4dda5c437f0 | 877 | HAL_StatusTypeDef HAL_I2C_Slave_Receive(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size, uint32_t Timeout) |
mbed_official | 133:d4dda5c437f0 | 878 | { |
mbed_official | 133:d4dda5c437f0 | 879 | if(hi2c->State == HAL_I2C_STATE_READY) |
mbed_official | 133:d4dda5c437f0 | 880 | { |
mbed_official | 133:d4dda5c437f0 | 881 | if((pData == NULL) || (Size == 0)) |
mbed_official | 133:d4dda5c437f0 | 882 | { |
mbed_official | 133:d4dda5c437f0 | 883 | return HAL_ERROR; |
mbed_official | 133:d4dda5c437f0 | 884 | } |
mbed_official | 133:d4dda5c437f0 | 885 | |
mbed_official | 133:d4dda5c437f0 | 886 | if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) == SET) |
mbed_official | 133:d4dda5c437f0 | 887 | { |
mbed_official | 133:d4dda5c437f0 | 888 | return HAL_BUSY; |
mbed_official | 133:d4dda5c437f0 | 889 | } |
mbed_official | 133:d4dda5c437f0 | 890 | |
mbed_official | 133:d4dda5c437f0 | 891 | /* Process Locked */ |
mbed_official | 133:d4dda5c437f0 | 892 | __HAL_LOCK(hi2c); |
mbed_official | 133:d4dda5c437f0 | 893 | |
mbed_official | 133:d4dda5c437f0 | 894 | hi2c->State = HAL_I2C_STATE_BUSY_RX; |
mbed_official | 133:d4dda5c437f0 | 895 | hi2c->ErrorCode = HAL_I2C_ERROR_NONE; |
mbed_official | 133:d4dda5c437f0 | 896 | |
mbed_official | 133:d4dda5c437f0 | 897 | /* Enable Address Acknowledge */ |
mbed_official | 133:d4dda5c437f0 | 898 | hi2c->Instance->CR1 |= I2C_CR1_ACK; |
mbed_official | 133:d4dda5c437f0 | 899 | |
mbed_official | 133:d4dda5c437f0 | 900 | /* Wait until ADDR flag is set */ |
mbed_official | 133:d4dda5c437f0 | 901 | if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_ADDR, RESET, Timeout) != HAL_OK) |
mbed_official | 133:d4dda5c437f0 | 902 | { |
mbed_official | 133:d4dda5c437f0 | 903 | return HAL_TIMEOUT; |
mbed_official | 133:d4dda5c437f0 | 904 | } |
mbed_official | 133:d4dda5c437f0 | 905 | |
mbed_official | 133:d4dda5c437f0 | 906 | /* Clear ADDR flag */ |
mbed_official | 133:d4dda5c437f0 | 907 | __HAL_I2C_CLEAR_ADDRFLAG(hi2c); |
mbed_official | 133:d4dda5c437f0 | 908 | |
mbed_official | 133:d4dda5c437f0 | 909 | while(Size > 0) |
mbed_official | 133:d4dda5c437f0 | 910 | { |
mbed_official | 133:d4dda5c437f0 | 911 | /* Wait until RXNE flag is set */ |
mbed_official | 133:d4dda5c437f0 | 912 | if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_RXNE, RESET, Timeout) != HAL_OK) |
mbed_official | 133:d4dda5c437f0 | 913 | { |
mbed_official | 133:d4dda5c437f0 | 914 | return HAL_TIMEOUT; |
mbed_official | 133:d4dda5c437f0 | 915 | } |
mbed_official | 133:d4dda5c437f0 | 916 | |
mbed_official | 133:d4dda5c437f0 | 917 | /* Read data from DR */ |
mbed_official | 133:d4dda5c437f0 | 918 | (*pData++) = hi2c->Instance->DR; |
mbed_official | 133:d4dda5c437f0 | 919 | Size--; |
mbed_official | 133:d4dda5c437f0 | 920 | |
mbed_official | 133:d4dda5c437f0 | 921 | if((__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BTF) == SET) && (Size != 0)) |
mbed_official | 133:d4dda5c437f0 | 922 | { |
mbed_official | 133:d4dda5c437f0 | 923 | /* Read data from DR */ |
mbed_official | 133:d4dda5c437f0 | 924 | (*pData++) = hi2c->Instance->DR; |
mbed_official | 133:d4dda5c437f0 | 925 | Size--; |
mbed_official | 133:d4dda5c437f0 | 926 | } |
mbed_official | 133:d4dda5c437f0 | 927 | } |
mbed_official | 133:d4dda5c437f0 | 928 | |
mbed_official | 133:d4dda5c437f0 | 929 | /* Wait until STOP flag is set */ |
mbed_official | 133:d4dda5c437f0 | 930 | if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_STOPF, RESET, Timeout) != HAL_OK) |
mbed_official | 133:d4dda5c437f0 | 931 | { |
mbed_official | 133:d4dda5c437f0 | 932 | return HAL_TIMEOUT; |
mbed_official | 133:d4dda5c437f0 | 933 | } |
mbed_official | 133:d4dda5c437f0 | 934 | |
mbed_official | 133:d4dda5c437f0 | 935 | /* Clear STOP flag */ |
mbed_official | 133:d4dda5c437f0 | 936 | __HAL_I2C_CLEAR_STOPFLAG(hi2c); |
mbed_official | 133:d4dda5c437f0 | 937 | |
mbed_official | 133:d4dda5c437f0 | 938 | /* Disable Address Acknowledge */ |
mbed_official | 133:d4dda5c437f0 | 939 | hi2c->Instance->CR1 &= ~I2C_CR1_ACK; |
mbed_official | 133:d4dda5c437f0 | 940 | |
mbed_official | 133:d4dda5c437f0 | 941 | /* Wait until BUSY flag is reset */ |
mbed_official | 133:d4dda5c437f0 | 942 | if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, Timeout) != HAL_OK) |
mbed_official | 133:d4dda5c437f0 | 943 | { |
mbed_official | 133:d4dda5c437f0 | 944 | return HAL_TIMEOUT; |
mbed_official | 133:d4dda5c437f0 | 945 | } |
mbed_official | 133:d4dda5c437f0 | 946 | |
mbed_official | 133:d4dda5c437f0 | 947 | hi2c->State = HAL_I2C_STATE_READY; |
mbed_official | 133:d4dda5c437f0 | 948 | |
mbed_official | 133:d4dda5c437f0 | 949 | /* Process Unlocked */ |
mbed_official | 133:d4dda5c437f0 | 950 | __HAL_UNLOCK(hi2c); |
mbed_official | 133:d4dda5c437f0 | 951 | |
mbed_official | 133:d4dda5c437f0 | 952 | return HAL_OK; |
mbed_official | 133:d4dda5c437f0 | 953 | } |
mbed_official | 133:d4dda5c437f0 | 954 | else |
mbed_official | 133:d4dda5c437f0 | 955 | { |
mbed_official | 133:d4dda5c437f0 | 956 | return HAL_BUSY; |
mbed_official | 133:d4dda5c437f0 | 957 | } |
mbed_official | 133:d4dda5c437f0 | 958 | } |
mbed_official | 133:d4dda5c437f0 | 959 | |
mbed_official | 133:d4dda5c437f0 | 960 | /** |
mbed_official | 133:d4dda5c437f0 | 961 | * @brief Transmit in master mode an amount of data in no-blocking mode with Interrupt |
mbed_official | 242:7074e42da0b2 | 962 | * @param hi2c: pointer to a I2C_HandleTypeDef structure that contains |
mbed_official | 242:7074e42da0b2 | 963 | * the configuration information for I2C module |
mbed_official | 133:d4dda5c437f0 | 964 | * @param DevAddress: Target device address |
mbed_official | 133:d4dda5c437f0 | 965 | * @param pData: Pointer to data buffer |
mbed_official | 133:d4dda5c437f0 | 966 | * @param Size: Amount of data to be sent |
mbed_official | 133:d4dda5c437f0 | 967 | * @retval HAL status |
mbed_official | 133:d4dda5c437f0 | 968 | */ |
mbed_official | 133:d4dda5c437f0 | 969 | HAL_StatusTypeDef HAL_I2C_Master_Transmit_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size) |
mbed_official | 133:d4dda5c437f0 | 970 | { |
mbed_official | 133:d4dda5c437f0 | 971 | if(hi2c->State == HAL_I2C_STATE_READY) |
mbed_official | 133:d4dda5c437f0 | 972 | { |
mbed_official | 133:d4dda5c437f0 | 973 | if((pData == NULL) || (Size == 0)) |
mbed_official | 133:d4dda5c437f0 | 974 | { |
mbed_official | 133:d4dda5c437f0 | 975 | return HAL_ERROR; |
mbed_official | 133:d4dda5c437f0 | 976 | } |
mbed_official | 133:d4dda5c437f0 | 977 | |
mbed_official | 133:d4dda5c437f0 | 978 | if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) == SET) |
mbed_official | 133:d4dda5c437f0 | 979 | { |
mbed_official | 133:d4dda5c437f0 | 980 | return HAL_BUSY; |
mbed_official | 133:d4dda5c437f0 | 981 | } |
mbed_official | 133:d4dda5c437f0 | 982 | |
mbed_official | 133:d4dda5c437f0 | 983 | /* Process Locked */ |
mbed_official | 133:d4dda5c437f0 | 984 | __HAL_LOCK(hi2c); |
mbed_official | 133:d4dda5c437f0 | 985 | |
mbed_official | 133:d4dda5c437f0 | 986 | hi2c->State = HAL_I2C_STATE_BUSY_TX; |
mbed_official | 133:d4dda5c437f0 | 987 | hi2c->ErrorCode = HAL_I2C_ERROR_NONE; |
mbed_official | 133:d4dda5c437f0 | 988 | |
mbed_official | 133:d4dda5c437f0 | 989 | hi2c->pBuffPtr = pData; |
mbed_official | 133:d4dda5c437f0 | 990 | hi2c->XferSize = Size; |
mbed_official | 133:d4dda5c437f0 | 991 | hi2c->XferCount = Size; |
mbed_official | 133:d4dda5c437f0 | 992 | |
mbed_official | 133:d4dda5c437f0 | 993 | /* Send Slave Address */ |
mbed_official | 133:d4dda5c437f0 | 994 | if(I2C_MasterRequestWrite(hi2c, DevAddress, I2C_TIMEOUT_FLAG) != HAL_OK) |
mbed_official | 133:d4dda5c437f0 | 995 | { |
mbed_official | 133:d4dda5c437f0 | 996 | if(hi2c->ErrorCode == HAL_I2C_ERROR_AF) |
mbed_official | 133:d4dda5c437f0 | 997 | { |
mbed_official | 133:d4dda5c437f0 | 998 | /* Process Unlocked */ |
mbed_official | 133:d4dda5c437f0 | 999 | __HAL_UNLOCK(hi2c); |
mbed_official | 133:d4dda5c437f0 | 1000 | return HAL_ERROR; |
mbed_official | 133:d4dda5c437f0 | 1001 | } |
mbed_official | 133:d4dda5c437f0 | 1002 | else |
mbed_official | 133:d4dda5c437f0 | 1003 | { |
mbed_official | 133:d4dda5c437f0 | 1004 | /* Process Unlocked */ |
mbed_official | 133:d4dda5c437f0 | 1005 | __HAL_UNLOCK(hi2c); |
mbed_official | 133:d4dda5c437f0 | 1006 | return HAL_TIMEOUT; |
mbed_official | 133:d4dda5c437f0 | 1007 | } |
mbed_official | 133:d4dda5c437f0 | 1008 | } |
mbed_official | 133:d4dda5c437f0 | 1009 | |
mbed_official | 133:d4dda5c437f0 | 1010 | /* Clear ADDR flag */ |
mbed_official | 133:d4dda5c437f0 | 1011 | __HAL_I2C_CLEAR_ADDRFLAG(hi2c); |
mbed_official | 133:d4dda5c437f0 | 1012 | |
mbed_official | 133:d4dda5c437f0 | 1013 | /* Process Unlocked */ |
mbed_official | 133:d4dda5c437f0 | 1014 | __HAL_UNLOCK(hi2c); |
mbed_official | 133:d4dda5c437f0 | 1015 | |
mbed_official | 133:d4dda5c437f0 | 1016 | /* Note : The I2C interrupts must be enabled after unlocking current process |
mbed_official | 133:d4dda5c437f0 | 1017 | to avoid the risk of I2C interrupt handle execution before current |
mbed_official | 133:d4dda5c437f0 | 1018 | process unlock */ |
mbed_official | 133:d4dda5c437f0 | 1019 | |
mbed_official | 133:d4dda5c437f0 | 1020 | /* Enable EVT, BUF and ERR interrupt */ |
mbed_official | 133:d4dda5c437f0 | 1021 | __HAL_I2C_ENABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_BUF | I2C_IT_ERR); |
mbed_official | 133:d4dda5c437f0 | 1022 | |
mbed_official | 133:d4dda5c437f0 | 1023 | return HAL_OK; |
mbed_official | 133:d4dda5c437f0 | 1024 | } |
mbed_official | 133:d4dda5c437f0 | 1025 | else |
mbed_official | 133:d4dda5c437f0 | 1026 | { |
mbed_official | 133:d4dda5c437f0 | 1027 | return HAL_BUSY; |
mbed_official | 133:d4dda5c437f0 | 1028 | } |
mbed_official | 133:d4dda5c437f0 | 1029 | } |
mbed_official | 133:d4dda5c437f0 | 1030 | |
mbed_official | 133:d4dda5c437f0 | 1031 | /** |
mbed_official | 133:d4dda5c437f0 | 1032 | * @brief Receive in master mode an amount of data in no-blocking mode with Interrupt |
mbed_official | 242:7074e42da0b2 | 1033 | * @param hi2c: pointer to a I2C_HandleTypeDef structure that contains |
mbed_official | 242:7074e42da0b2 | 1034 | * the configuration information for I2C module |
mbed_official | 133:d4dda5c437f0 | 1035 | * @param DevAddress: Target device address |
mbed_official | 133:d4dda5c437f0 | 1036 | * @param pData: Pointer to data buffer |
mbed_official | 133:d4dda5c437f0 | 1037 | * @param Size: Amount of data to be sent |
mbed_official | 133:d4dda5c437f0 | 1038 | * @retval HAL status |
mbed_official | 133:d4dda5c437f0 | 1039 | */ |
mbed_official | 133:d4dda5c437f0 | 1040 | HAL_StatusTypeDef HAL_I2C_Master_Receive_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size) |
mbed_official | 133:d4dda5c437f0 | 1041 | { |
mbed_official | 133:d4dda5c437f0 | 1042 | if(hi2c->State == HAL_I2C_STATE_READY) |
mbed_official | 133:d4dda5c437f0 | 1043 | { |
mbed_official | 133:d4dda5c437f0 | 1044 | if((pData == NULL) || (Size == 0)) |
mbed_official | 133:d4dda5c437f0 | 1045 | { |
mbed_official | 133:d4dda5c437f0 | 1046 | return HAL_ERROR; |
mbed_official | 133:d4dda5c437f0 | 1047 | } |
mbed_official | 133:d4dda5c437f0 | 1048 | |
mbed_official | 133:d4dda5c437f0 | 1049 | if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) == SET) |
mbed_official | 133:d4dda5c437f0 | 1050 | { |
mbed_official | 133:d4dda5c437f0 | 1051 | return HAL_BUSY; |
mbed_official | 133:d4dda5c437f0 | 1052 | } |
mbed_official | 133:d4dda5c437f0 | 1053 | |
mbed_official | 133:d4dda5c437f0 | 1054 | /* Process Locked */ |
mbed_official | 133:d4dda5c437f0 | 1055 | __HAL_LOCK(hi2c); |
mbed_official | 133:d4dda5c437f0 | 1056 | |
mbed_official | 133:d4dda5c437f0 | 1057 | hi2c->State = HAL_I2C_STATE_BUSY_RX; |
mbed_official | 133:d4dda5c437f0 | 1058 | hi2c->ErrorCode = HAL_I2C_ERROR_NONE; |
mbed_official | 133:d4dda5c437f0 | 1059 | |
mbed_official | 133:d4dda5c437f0 | 1060 | hi2c->pBuffPtr = pData; |
mbed_official | 133:d4dda5c437f0 | 1061 | hi2c->XferSize = Size; |
mbed_official | 133:d4dda5c437f0 | 1062 | hi2c->XferCount = Size; |
mbed_official | 133:d4dda5c437f0 | 1063 | |
mbed_official | 133:d4dda5c437f0 | 1064 | /* Send Slave Address */ |
mbed_official | 133:d4dda5c437f0 | 1065 | if(I2C_MasterRequestRead(hi2c, DevAddress, I2C_TIMEOUT_FLAG) != HAL_OK) |
mbed_official | 133:d4dda5c437f0 | 1066 | { |
mbed_official | 133:d4dda5c437f0 | 1067 | if(hi2c->ErrorCode == HAL_I2C_ERROR_AF) |
mbed_official | 133:d4dda5c437f0 | 1068 | { |
mbed_official | 133:d4dda5c437f0 | 1069 | /* Process Unlocked */ |
mbed_official | 133:d4dda5c437f0 | 1070 | __HAL_UNLOCK(hi2c); |
mbed_official | 133:d4dda5c437f0 | 1071 | return HAL_ERROR; |
mbed_official | 133:d4dda5c437f0 | 1072 | } |
mbed_official | 133:d4dda5c437f0 | 1073 | else |
mbed_official | 133:d4dda5c437f0 | 1074 | { |
mbed_official | 133:d4dda5c437f0 | 1075 | /* Process Unlocked */ |
mbed_official | 133:d4dda5c437f0 | 1076 | __HAL_UNLOCK(hi2c); |
mbed_official | 133:d4dda5c437f0 | 1077 | return HAL_TIMEOUT; |
mbed_official | 133:d4dda5c437f0 | 1078 | } |
mbed_official | 133:d4dda5c437f0 | 1079 | } |
mbed_official | 133:d4dda5c437f0 | 1080 | |
mbed_official | 133:d4dda5c437f0 | 1081 | if(hi2c->XferCount == 1) |
mbed_official | 133:d4dda5c437f0 | 1082 | { |
mbed_official | 133:d4dda5c437f0 | 1083 | /* Disable Acknowledge */ |
mbed_official | 133:d4dda5c437f0 | 1084 | hi2c->Instance->CR1 &= ~I2C_CR1_ACK; |
mbed_official | 133:d4dda5c437f0 | 1085 | |
mbed_official | 133:d4dda5c437f0 | 1086 | /* Clear ADDR flag */ |
mbed_official | 133:d4dda5c437f0 | 1087 | __HAL_I2C_CLEAR_ADDRFLAG(hi2c); |
mbed_official | 133:d4dda5c437f0 | 1088 | |
mbed_official | 133:d4dda5c437f0 | 1089 | /* Generate Stop */ |
mbed_official | 133:d4dda5c437f0 | 1090 | hi2c->Instance->CR1 |= I2C_CR1_STOP; |
mbed_official | 133:d4dda5c437f0 | 1091 | } |
mbed_official | 133:d4dda5c437f0 | 1092 | else if(hi2c->XferCount == 2) |
mbed_official | 133:d4dda5c437f0 | 1093 | { |
mbed_official | 133:d4dda5c437f0 | 1094 | /* Disable Acknowledge */ |
mbed_official | 133:d4dda5c437f0 | 1095 | hi2c->Instance->CR1 &= ~I2C_CR1_ACK; |
mbed_official | 133:d4dda5c437f0 | 1096 | |
mbed_official | 133:d4dda5c437f0 | 1097 | /* Enable Pos */ |
mbed_official | 133:d4dda5c437f0 | 1098 | hi2c->Instance->CR1 |= I2C_CR1_POS; |
mbed_official | 133:d4dda5c437f0 | 1099 | |
mbed_official | 133:d4dda5c437f0 | 1100 | /* Clear ADDR flag */ |
mbed_official | 133:d4dda5c437f0 | 1101 | __HAL_I2C_CLEAR_ADDRFLAG(hi2c); |
mbed_official | 133:d4dda5c437f0 | 1102 | } |
mbed_official | 133:d4dda5c437f0 | 1103 | else |
mbed_official | 133:d4dda5c437f0 | 1104 | { |
mbed_official | 133:d4dda5c437f0 | 1105 | /* Enable Acknowledge */ |
mbed_official | 133:d4dda5c437f0 | 1106 | hi2c->Instance->CR1 |= I2C_CR1_ACK; |
mbed_official | 133:d4dda5c437f0 | 1107 | |
mbed_official | 133:d4dda5c437f0 | 1108 | /* Clear ADDR flag */ |
mbed_official | 133:d4dda5c437f0 | 1109 | __HAL_I2C_CLEAR_ADDRFLAG(hi2c); |
mbed_official | 133:d4dda5c437f0 | 1110 | } |
mbed_official | 133:d4dda5c437f0 | 1111 | |
mbed_official | 133:d4dda5c437f0 | 1112 | /* Process Unlocked */ |
mbed_official | 133:d4dda5c437f0 | 1113 | __HAL_UNLOCK(hi2c); |
mbed_official | 133:d4dda5c437f0 | 1114 | |
mbed_official | 133:d4dda5c437f0 | 1115 | /* Note : The I2C interrupts must be enabled after unlocking current process |
mbed_official | 133:d4dda5c437f0 | 1116 | to avoid the risk of I2C interrupt handle execution before current |
mbed_official | 133:d4dda5c437f0 | 1117 | process unlock */ |
mbed_official | 133:d4dda5c437f0 | 1118 | |
mbed_official | 133:d4dda5c437f0 | 1119 | /* Enable EVT, BUF and ERR interrupt */ |
mbed_official | 133:d4dda5c437f0 | 1120 | __HAL_I2C_ENABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_BUF | I2C_IT_ERR); |
mbed_official | 133:d4dda5c437f0 | 1121 | |
mbed_official | 133:d4dda5c437f0 | 1122 | return HAL_OK; |
mbed_official | 133:d4dda5c437f0 | 1123 | } |
mbed_official | 133:d4dda5c437f0 | 1124 | else |
mbed_official | 133:d4dda5c437f0 | 1125 | { |
mbed_official | 133:d4dda5c437f0 | 1126 | return HAL_BUSY; |
mbed_official | 133:d4dda5c437f0 | 1127 | } |
mbed_official | 133:d4dda5c437f0 | 1128 | } |
mbed_official | 133:d4dda5c437f0 | 1129 | |
mbed_official | 133:d4dda5c437f0 | 1130 | /** |
mbed_official | 133:d4dda5c437f0 | 1131 | * @brief Transmit in slave mode an amount of data in no-blocking mode with Interrupt |
mbed_official | 242:7074e42da0b2 | 1132 | * @param hi2c: pointer to a I2C_HandleTypeDef structure that contains |
mbed_official | 242:7074e42da0b2 | 1133 | * the configuration information for I2C module |
mbed_official | 133:d4dda5c437f0 | 1134 | * @param pData: Pointer to data buffer |
mbed_official | 133:d4dda5c437f0 | 1135 | * @param Size: Amount of data to be sent |
mbed_official | 133:d4dda5c437f0 | 1136 | * @retval HAL status |
mbed_official | 133:d4dda5c437f0 | 1137 | */ |
mbed_official | 133:d4dda5c437f0 | 1138 | HAL_StatusTypeDef HAL_I2C_Slave_Transmit_IT(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size) |
mbed_official | 133:d4dda5c437f0 | 1139 | { |
mbed_official | 133:d4dda5c437f0 | 1140 | if(hi2c->State == HAL_I2C_STATE_READY) |
mbed_official | 133:d4dda5c437f0 | 1141 | { |
mbed_official | 133:d4dda5c437f0 | 1142 | if((pData == NULL) || (Size == 0)) |
mbed_official | 133:d4dda5c437f0 | 1143 | { |
mbed_official | 133:d4dda5c437f0 | 1144 | return HAL_ERROR; |
mbed_official | 133:d4dda5c437f0 | 1145 | } |
mbed_official | 133:d4dda5c437f0 | 1146 | |
mbed_official | 133:d4dda5c437f0 | 1147 | if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) == SET) |
mbed_official | 133:d4dda5c437f0 | 1148 | { |
mbed_official | 133:d4dda5c437f0 | 1149 | return HAL_BUSY; |
mbed_official | 133:d4dda5c437f0 | 1150 | } |
mbed_official | 133:d4dda5c437f0 | 1151 | |
mbed_official | 133:d4dda5c437f0 | 1152 | /* Process Locked */ |
mbed_official | 133:d4dda5c437f0 | 1153 | __HAL_LOCK(hi2c); |
mbed_official | 133:d4dda5c437f0 | 1154 | |
mbed_official | 133:d4dda5c437f0 | 1155 | hi2c->State = HAL_I2C_STATE_BUSY_TX; |
mbed_official | 133:d4dda5c437f0 | 1156 | hi2c->ErrorCode = HAL_I2C_ERROR_NONE; |
mbed_official | 133:d4dda5c437f0 | 1157 | |
mbed_official | 133:d4dda5c437f0 | 1158 | hi2c->pBuffPtr = pData; |
mbed_official | 133:d4dda5c437f0 | 1159 | hi2c->XferSize = Size; |
mbed_official | 133:d4dda5c437f0 | 1160 | hi2c->XferCount = Size; |
mbed_official | 133:d4dda5c437f0 | 1161 | |
mbed_official | 133:d4dda5c437f0 | 1162 | /* Enable Address Acknowledge */ |
mbed_official | 133:d4dda5c437f0 | 1163 | hi2c->Instance->CR1 |= I2C_CR1_ACK; |
mbed_official | 133:d4dda5c437f0 | 1164 | |
mbed_official | 133:d4dda5c437f0 | 1165 | /* Process Unlocked */ |
mbed_official | 133:d4dda5c437f0 | 1166 | __HAL_UNLOCK(hi2c); |
mbed_official | 133:d4dda5c437f0 | 1167 | |
mbed_official | 133:d4dda5c437f0 | 1168 | /* Note : The I2C interrupts must be enabled after unlocking current process |
mbed_official | 133:d4dda5c437f0 | 1169 | to avoid the risk of I2C interrupt handle execution before current |
mbed_official | 133:d4dda5c437f0 | 1170 | process unlock */ |
mbed_official | 133:d4dda5c437f0 | 1171 | |
mbed_official | 133:d4dda5c437f0 | 1172 | /* Enable EVT, BUF and ERR interrupt */ |
mbed_official | 133:d4dda5c437f0 | 1173 | __HAL_I2C_ENABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_BUF | I2C_IT_ERR); |
mbed_official | 133:d4dda5c437f0 | 1174 | |
mbed_official | 133:d4dda5c437f0 | 1175 | return HAL_OK; |
mbed_official | 133:d4dda5c437f0 | 1176 | } |
mbed_official | 133:d4dda5c437f0 | 1177 | else |
mbed_official | 133:d4dda5c437f0 | 1178 | { |
mbed_official | 133:d4dda5c437f0 | 1179 | return HAL_BUSY; |
mbed_official | 133:d4dda5c437f0 | 1180 | } |
mbed_official | 133:d4dda5c437f0 | 1181 | } |
mbed_official | 133:d4dda5c437f0 | 1182 | |
mbed_official | 133:d4dda5c437f0 | 1183 | /** |
mbed_official | 133:d4dda5c437f0 | 1184 | * @brief Receive in slave mode an amount of data in no-blocking mode with Interrupt |
mbed_official | 242:7074e42da0b2 | 1185 | * @param hi2c: pointer to a I2C_HandleTypeDef structure that contains |
mbed_official | 242:7074e42da0b2 | 1186 | * the configuration information for I2C module |
mbed_official | 133:d4dda5c437f0 | 1187 | * @param pData: Pointer to data buffer |
mbed_official | 133:d4dda5c437f0 | 1188 | * @param Size: Amount of data to be sent |
mbed_official | 133:d4dda5c437f0 | 1189 | * @retval HAL status |
mbed_official | 133:d4dda5c437f0 | 1190 | */ |
mbed_official | 133:d4dda5c437f0 | 1191 | HAL_StatusTypeDef HAL_I2C_Slave_Receive_IT(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size) |
mbed_official | 133:d4dda5c437f0 | 1192 | { |
mbed_official | 133:d4dda5c437f0 | 1193 | if(hi2c->State == HAL_I2C_STATE_READY) |
mbed_official | 133:d4dda5c437f0 | 1194 | { |
mbed_official | 133:d4dda5c437f0 | 1195 | if((pData == NULL) || (Size == 0)) |
mbed_official | 133:d4dda5c437f0 | 1196 | { |
mbed_official | 133:d4dda5c437f0 | 1197 | return HAL_ERROR; |
mbed_official | 133:d4dda5c437f0 | 1198 | } |
mbed_official | 133:d4dda5c437f0 | 1199 | |
mbed_official | 133:d4dda5c437f0 | 1200 | if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) == SET) |
mbed_official | 133:d4dda5c437f0 | 1201 | { |
mbed_official | 133:d4dda5c437f0 | 1202 | return HAL_BUSY; |
mbed_official | 133:d4dda5c437f0 | 1203 | } |
mbed_official | 133:d4dda5c437f0 | 1204 | |
mbed_official | 133:d4dda5c437f0 | 1205 | /* Process Locked */ |
mbed_official | 133:d4dda5c437f0 | 1206 | __HAL_LOCK(hi2c); |
mbed_official | 133:d4dda5c437f0 | 1207 | |
mbed_official | 133:d4dda5c437f0 | 1208 | hi2c->State = HAL_I2C_STATE_BUSY_RX; |
mbed_official | 133:d4dda5c437f0 | 1209 | hi2c->ErrorCode = HAL_I2C_ERROR_NONE; |
mbed_official | 133:d4dda5c437f0 | 1210 | |
mbed_official | 133:d4dda5c437f0 | 1211 | hi2c->pBuffPtr = pData; |
mbed_official | 133:d4dda5c437f0 | 1212 | hi2c->XferSize = Size; |
mbed_official | 133:d4dda5c437f0 | 1213 | hi2c->XferCount = Size; |
mbed_official | 133:d4dda5c437f0 | 1214 | |
mbed_official | 133:d4dda5c437f0 | 1215 | /* Enable Address Acknowledge */ |
mbed_official | 133:d4dda5c437f0 | 1216 | hi2c->Instance->CR1 |= I2C_CR1_ACK; |
mbed_official | 133:d4dda5c437f0 | 1217 | |
mbed_official | 133:d4dda5c437f0 | 1218 | /* Process Unlocked */ |
mbed_official | 133:d4dda5c437f0 | 1219 | __HAL_UNLOCK(hi2c); |
mbed_official | 133:d4dda5c437f0 | 1220 | |
mbed_official | 133:d4dda5c437f0 | 1221 | /* Note : The I2C interrupts must be enabled after unlocking current process |
mbed_official | 133:d4dda5c437f0 | 1222 | to avoid the risk of I2C interrupt handle execution before current |
mbed_official | 133:d4dda5c437f0 | 1223 | process unlock */ |
mbed_official | 133:d4dda5c437f0 | 1224 | |
mbed_official | 133:d4dda5c437f0 | 1225 | /* Enable EVT, BUF and ERR interrupt */ |
mbed_official | 133:d4dda5c437f0 | 1226 | __HAL_I2C_ENABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_BUF | I2C_IT_ERR); |
mbed_official | 133:d4dda5c437f0 | 1227 | |
mbed_official | 133:d4dda5c437f0 | 1228 | return HAL_OK; |
mbed_official | 133:d4dda5c437f0 | 1229 | } |
mbed_official | 133:d4dda5c437f0 | 1230 | else |
mbed_official | 133:d4dda5c437f0 | 1231 | { |
mbed_official | 133:d4dda5c437f0 | 1232 | return HAL_BUSY; |
mbed_official | 133:d4dda5c437f0 | 1233 | } |
mbed_official | 133:d4dda5c437f0 | 1234 | } |
mbed_official | 133:d4dda5c437f0 | 1235 | |
mbed_official | 133:d4dda5c437f0 | 1236 | /** |
mbed_official | 133:d4dda5c437f0 | 1237 | * @brief Transmit in master mode an amount of data in no-blocking mode with DMA |
mbed_official | 242:7074e42da0b2 | 1238 | * @param hi2c: pointer to a I2C_HandleTypeDef structure that contains |
mbed_official | 242:7074e42da0b2 | 1239 | * the configuration information for I2C module |
mbed_official | 133:d4dda5c437f0 | 1240 | * @param DevAddress: Target device address |
mbed_official | 133:d4dda5c437f0 | 1241 | * @param pData: Pointer to data buffer |
mbed_official | 133:d4dda5c437f0 | 1242 | * @param Size: Amount of data to be sent |
mbed_official | 133:d4dda5c437f0 | 1243 | * @retval HAL status |
mbed_official | 133:d4dda5c437f0 | 1244 | */ |
mbed_official | 133:d4dda5c437f0 | 1245 | HAL_StatusTypeDef HAL_I2C_Master_Transmit_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size) |
mbed_official | 133:d4dda5c437f0 | 1246 | { |
mbed_official | 133:d4dda5c437f0 | 1247 | if(hi2c->State == HAL_I2C_STATE_READY) |
mbed_official | 133:d4dda5c437f0 | 1248 | { |
mbed_official | 133:d4dda5c437f0 | 1249 | if((pData == NULL) || (Size == 0)) |
mbed_official | 133:d4dda5c437f0 | 1250 | { |
mbed_official | 133:d4dda5c437f0 | 1251 | return HAL_ERROR; |
mbed_official | 133:d4dda5c437f0 | 1252 | } |
mbed_official | 133:d4dda5c437f0 | 1253 | |
mbed_official | 133:d4dda5c437f0 | 1254 | if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) == SET) |
mbed_official | 133:d4dda5c437f0 | 1255 | { |
mbed_official | 133:d4dda5c437f0 | 1256 | return HAL_BUSY; |
mbed_official | 133:d4dda5c437f0 | 1257 | } |
mbed_official | 133:d4dda5c437f0 | 1258 | |
mbed_official | 133:d4dda5c437f0 | 1259 | /* Process Locked */ |
mbed_official | 133:d4dda5c437f0 | 1260 | __HAL_LOCK(hi2c); |
mbed_official | 133:d4dda5c437f0 | 1261 | |
mbed_official | 133:d4dda5c437f0 | 1262 | hi2c->State = HAL_I2C_STATE_BUSY_TX; |
mbed_official | 133:d4dda5c437f0 | 1263 | hi2c->ErrorCode = HAL_I2C_ERROR_NONE; |
mbed_official | 133:d4dda5c437f0 | 1264 | |
mbed_official | 133:d4dda5c437f0 | 1265 | hi2c->pBuffPtr = pData; |
mbed_official | 133:d4dda5c437f0 | 1266 | hi2c->XferSize = Size; |
mbed_official | 133:d4dda5c437f0 | 1267 | hi2c->XferCount = Size; |
mbed_official | 133:d4dda5c437f0 | 1268 | |
mbed_official | 133:d4dda5c437f0 | 1269 | /* Set the I2C DMA transfert complete callback */ |
mbed_official | 133:d4dda5c437f0 | 1270 | hi2c->hdmatx->XferCpltCallback = I2C_DMAMasterTransmitCplt; |
mbed_official | 133:d4dda5c437f0 | 1271 | |
mbed_official | 133:d4dda5c437f0 | 1272 | /* Set the DMA error callback */ |
mbed_official | 133:d4dda5c437f0 | 1273 | hi2c->hdmatx->XferErrorCallback = I2C_DMAError; |
mbed_official | 133:d4dda5c437f0 | 1274 | |
mbed_official | 133:d4dda5c437f0 | 1275 | /* Enable the DMA Stream */ |
mbed_official | 133:d4dda5c437f0 | 1276 | HAL_DMA_Start_IT(hi2c->hdmatx, (uint32_t)pData, (uint32_t)&hi2c->Instance->DR, Size); |
mbed_official | 133:d4dda5c437f0 | 1277 | |
mbed_official | 133:d4dda5c437f0 | 1278 | /* Send Slave Address */ |
mbed_official | 133:d4dda5c437f0 | 1279 | if(I2C_MasterRequestWrite(hi2c, DevAddress, I2C_TIMEOUT_FLAG) != HAL_OK) |
mbed_official | 133:d4dda5c437f0 | 1280 | { |
mbed_official | 133:d4dda5c437f0 | 1281 | if(hi2c->ErrorCode == HAL_I2C_ERROR_AF) |
mbed_official | 133:d4dda5c437f0 | 1282 | { |
mbed_official | 133:d4dda5c437f0 | 1283 | /* Process Unlocked */ |
mbed_official | 133:d4dda5c437f0 | 1284 | __HAL_UNLOCK(hi2c); |
mbed_official | 133:d4dda5c437f0 | 1285 | return HAL_ERROR; |
mbed_official | 133:d4dda5c437f0 | 1286 | } |
mbed_official | 133:d4dda5c437f0 | 1287 | else |
mbed_official | 133:d4dda5c437f0 | 1288 | { |
mbed_official | 133:d4dda5c437f0 | 1289 | /* Process Unlocked */ |
mbed_official | 133:d4dda5c437f0 | 1290 | __HAL_UNLOCK(hi2c); |
mbed_official | 133:d4dda5c437f0 | 1291 | return HAL_TIMEOUT; |
mbed_official | 133:d4dda5c437f0 | 1292 | } |
mbed_official | 133:d4dda5c437f0 | 1293 | } |
mbed_official | 133:d4dda5c437f0 | 1294 | |
mbed_official | 133:d4dda5c437f0 | 1295 | /* Enable DMA Request */ |
mbed_official | 133:d4dda5c437f0 | 1296 | hi2c->Instance->CR2 |= I2C_CR2_DMAEN; |
mbed_official | 133:d4dda5c437f0 | 1297 | |
mbed_official | 133:d4dda5c437f0 | 1298 | /* Clear ADDR flag */ |
mbed_official | 133:d4dda5c437f0 | 1299 | __HAL_I2C_CLEAR_ADDRFLAG(hi2c); |
mbed_official | 133:d4dda5c437f0 | 1300 | |
mbed_official | 133:d4dda5c437f0 | 1301 | /* Process Unlocked */ |
mbed_official | 133:d4dda5c437f0 | 1302 | __HAL_UNLOCK(hi2c); |
mbed_official | 133:d4dda5c437f0 | 1303 | |
mbed_official | 133:d4dda5c437f0 | 1304 | return HAL_OK; |
mbed_official | 133:d4dda5c437f0 | 1305 | } |
mbed_official | 133:d4dda5c437f0 | 1306 | else |
mbed_official | 133:d4dda5c437f0 | 1307 | { |
mbed_official | 133:d4dda5c437f0 | 1308 | return HAL_BUSY; |
mbed_official | 133:d4dda5c437f0 | 1309 | } |
mbed_official | 133:d4dda5c437f0 | 1310 | } |
mbed_official | 133:d4dda5c437f0 | 1311 | |
mbed_official | 133:d4dda5c437f0 | 1312 | /** |
mbed_official | 133:d4dda5c437f0 | 1313 | * @brief Receive in master mode an amount of data in no-blocking mode with DMA |
mbed_official | 242:7074e42da0b2 | 1314 | * @param hi2c: pointer to a I2C_HandleTypeDef structure that contains |
mbed_official | 242:7074e42da0b2 | 1315 | * the configuration information for I2C module |
mbed_official | 133:d4dda5c437f0 | 1316 | * @param DevAddress: Target device address |
mbed_official | 133:d4dda5c437f0 | 1317 | * @param pData: Pointer to data buffer |
mbed_official | 133:d4dda5c437f0 | 1318 | * @param Size: Amount of data to be sent |
mbed_official | 133:d4dda5c437f0 | 1319 | * @retval HAL status |
mbed_official | 133:d4dda5c437f0 | 1320 | */ |
mbed_official | 133:d4dda5c437f0 | 1321 | HAL_StatusTypeDef HAL_I2C_Master_Receive_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size) |
mbed_official | 133:d4dda5c437f0 | 1322 | { |
mbed_official | 133:d4dda5c437f0 | 1323 | if(hi2c->State == HAL_I2C_STATE_READY) |
mbed_official | 133:d4dda5c437f0 | 1324 | { |
mbed_official | 133:d4dda5c437f0 | 1325 | if((pData == NULL) || (Size == 0)) |
mbed_official | 133:d4dda5c437f0 | 1326 | { |
mbed_official | 133:d4dda5c437f0 | 1327 | return HAL_ERROR; |
mbed_official | 133:d4dda5c437f0 | 1328 | } |
mbed_official | 133:d4dda5c437f0 | 1329 | |
mbed_official | 133:d4dda5c437f0 | 1330 | if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) == SET) |
mbed_official | 133:d4dda5c437f0 | 1331 | { |
mbed_official | 133:d4dda5c437f0 | 1332 | return HAL_BUSY; |
mbed_official | 133:d4dda5c437f0 | 1333 | } |
mbed_official | 133:d4dda5c437f0 | 1334 | |
mbed_official | 133:d4dda5c437f0 | 1335 | /* Process Locked */ |
mbed_official | 133:d4dda5c437f0 | 1336 | __HAL_LOCK(hi2c); |
mbed_official | 133:d4dda5c437f0 | 1337 | |
mbed_official | 133:d4dda5c437f0 | 1338 | hi2c->State = HAL_I2C_STATE_BUSY_RX; |
mbed_official | 133:d4dda5c437f0 | 1339 | hi2c->ErrorCode = HAL_I2C_ERROR_NONE; |
mbed_official | 133:d4dda5c437f0 | 1340 | |
mbed_official | 133:d4dda5c437f0 | 1341 | hi2c->pBuffPtr = pData; |
mbed_official | 133:d4dda5c437f0 | 1342 | hi2c->XferSize = Size; |
mbed_official | 133:d4dda5c437f0 | 1343 | hi2c->XferCount = Size; |
mbed_official | 133:d4dda5c437f0 | 1344 | |
mbed_official | 133:d4dda5c437f0 | 1345 | /* Set the I2C DMA transfert complete callback */ |
mbed_official | 133:d4dda5c437f0 | 1346 | hi2c->hdmarx->XferCpltCallback = I2C_DMAMasterReceiveCplt; |
mbed_official | 133:d4dda5c437f0 | 1347 | |
mbed_official | 133:d4dda5c437f0 | 1348 | /* Set the DMA error callback */ |
mbed_official | 133:d4dda5c437f0 | 1349 | hi2c->hdmarx->XferErrorCallback = I2C_DMAError; |
mbed_official | 133:d4dda5c437f0 | 1350 | |
mbed_official | 133:d4dda5c437f0 | 1351 | /* Enable the DMA Stream */ |
mbed_official | 133:d4dda5c437f0 | 1352 | HAL_DMA_Start_IT(hi2c->hdmarx, (uint32_t)&hi2c->Instance->DR, (uint32_t)pData, Size); |
mbed_official | 133:d4dda5c437f0 | 1353 | |
mbed_official | 133:d4dda5c437f0 | 1354 | /* Send Slave Address */ |
mbed_official | 133:d4dda5c437f0 | 1355 | if(I2C_MasterRequestRead(hi2c, DevAddress, I2C_TIMEOUT_FLAG) != HAL_OK) |
mbed_official | 133:d4dda5c437f0 | 1356 | { |
mbed_official | 133:d4dda5c437f0 | 1357 | if(hi2c->ErrorCode == HAL_I2C_ERROR_AF) |
mbed_official | 133:d4dda5c437f0 | 1358 | { |
mbed_official | 133:d4dda5c437f0 | 1359 | /* Process Unlocked */ |
mbed_official | 133:d4dda5c437f0 | 1360 | __HAL_UNLOCK(hi2c); |
mbed_official | 133:d4dda5c437f0 | 1361 | return HAL_ERROR; |
mbed_official | 133:d4dda5c437f0 | 1362 | } |
mbed_official | 133:d4dda5c437f0 | 1363 | else |
mbed_official | 133:d4dda5c437f0 | 1364 | { |
mbed_official | 133:d4dda5c437f0 | 1365 | /* Process Unlocked */ |
mbed_official | 133:d4dda5c437f0 | 1366 | __HAL_UNLOCK(hi2c); |
mbed_official | 133:d4dda5c437f0 | 1367 | return HAL_TIMEOUT; |
mbed_official | 133:d4dda5c437f0 | 1368 | } |
mbed_official | 133:d4dda5c437f0 | 1369 | } |
mbed_official | 133:d4dda5c437f0 | 1370 | |
mbed_official | 133:d4dda5c437f0 | 1371 | if(Size == 1) |
mbed_official | 133:d4dda5c437f0 | 1372 | { |
mbed_official | 133:d4dda5c437f0 | 1373 | /* Disable Acknowledge */ |
mbed_official | 133:d4dda5c437f0 | 1374 | hi2c->Instance->CR1 &= ~I2C_CR1_ACK; |
mbed_official | 133:d4dda5c437f0 | 1375 | } |
mbed_official | 133:d4dda5c437f0 | 1376 | else |
mbed_official | 133:d4dda5c437f0 | 1377 | { |
mbed_official | 133:d4dda5c437f0 | 1378 | /* Enable Last DMA bit */ |
mbed_official | 133:d4dda5c437f0 | 1379 | hi2c->Instance->CR2 |= I2C_CR2_LAST; |
mbed_official | 133:d4dda5c437f0 | 1380 | } |
mbed_official | 133:d4dda5c437f0 | 1381 | |
mbed_official | 133:d4dda5c437f0 | 1382 | /* Enable DMA Request */ |
mbed_official | 133:d4dda5c437f0 | 1383 | hi2c->Instance->CR2 |= I2C_CR2_DMAEN; |
mbed_official | 133:d4dda5c437f0 | 1384 | |
mbed_official | 133:d4dda5c437f0 | 1385 | /* Clear ADDR flag */ |
mbed_official | 133:d4dda5c437f0 | 1386 | __HAL_I2C_CLEAR_ADDRFLAG(hi2c); |
mbed_official | 133:d4dda5c437f0 | 1387 | |
mbed_official | 133:d4dda5c437f0 | 1388 | /* Process Unlocked */ |
mbed_official | 133:d4dda5c437f0 | 1389 | __HAL_UNLOCK(hi2c); |
mbed_official | 133:d4dda5c437f0 | 1390 | |
mbed_official | 133:d4dda5c437f0 | 1391 | return HAL_OK; |
mbed_official | 133:d4dda5c437f0 | 1392 | } |
mbed_official | 133:d4dda5c437f0 | 1393 | else |
mbed_official | 133:d4dda5c437f0 | 1394 | { |
mbed_official | 133:d4dda5c437f0 | 1395 | return HAL_BUSY; |
mbed_official | 133:d4dda5c437f0 | 1396 | } |
mbed_official | 133:d4dda5c437f0 | 1397 | } |
mbed_official | 133:d4dda5c437f0 | 1398 | |
mbed_official | 133:d4dda5c437f0 | 1399 | /** |
mbed_official | 133:d4dda5c437f0 | 1400 | * @brief Transmit in slave mode an amount of data in no-blocking mode with DMA |
mbed_official | 242:7074e42da0b2 | 1401 | * @param hi2c: pointer to a I2C_HandleTypeDef structure that contains |
mbed_official | 242:7074e42da0b2 | 1402 | * the configuration information for I2C module |
mbed_official | 133:d4dda5c437f0 | 1403 | * @param pData: Pointer to data buffer |
mbed_official | 133:d4dda5c437f0 | 1404 | * @param Size: Amount of data to be sent |
mbed_official | 133:d4dda5c437f0 | 1405 | * @retval HAL status |
mbed_official | 133:d4dda5c437f0 | 1406 | */ |
mbed_official | 133:d4dda5c437f0 | 1407 | HAL_StatusTypeDef HAL_I2C_Slave_Transmit_DMA(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size) |
mbed_official | 133:d4dda5c437f0 | 1408 | { |
mbed_official | 133:d4dda5c437f0 | 1409 | if(hi2c->State == HAL_I2C_STATE_READY) |
mbed_official | 133:d4dda5c437f0 | 1410 | { |
mbed_official | 133:d4dda5c437f0 | 1411 | if((pData == NULL) || (Size == 0)) |
mbed_official | 133:d4dda5c437f0 | 1412 | { |
mbed_official | 133:d4dda5c437f0 | 1413 | return HAL_ERROR; |
mbed_official | 133:d4dda5c437f0 | 1414 | } |
mbed_official | 133:d4dda5c437f0 | 1415 | |
mbed_official | 133:d4dda5c437f0 | 1416 | if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) == SET) |
mbed_official | 133:d4dda5c437f0 | 1417 | { |
mbed_official | 133:d4dda5c437f0 | 1418 | return HAL_BUSY; |
mbed_official | 133:d4dda5c437f0 | 1419 | } |
mbed_official | 133:d4dda5c437f0 | 1420 | |
mbed_official | 133:d4dda5c437f0 | 1421 | /* Process Locked */ |
mbed_official | 133:d4dda5c437f0 | 1422 | __HAL_LOCK(hi2c); |
mbed_official | 133:d4dda5c437f0 | 1423 | |
mbed_official | 133:d4dda5c437f0 | 1424 | hi2c->State = HAL_I2C_STATE_BUSY_TX; |
mbed_official | 133:d4dda5c437f0 | 1425 | hi2c->ErrorCode = HAL_I2C_ERROR_NONE; |
mbed_official | 133:d4dda5c437f0 | 1426 | |
mbed_official | 133:d4dda5c437f0 | 1427 | hi2c->pBuffPtr = pData; |
mbed_official | 133:d4dda5c437f0 | 1428 | hi2c->XferSize = Size; |
mbed_official | 133:d4dda5c437f0 | 1429 | hi2c->XferCount = Size; |
mbed_official | 133:d4dda5c437f0 | 1430 | |
mbed_official | 133:d4dda5c437f0 | 1431 | /* Set the I2C DMA transfert complete callback */ |
mbed_official | 133:d4dda5c437f0 | 1432 | hi2c->hdmatx->XferCpltCallback = I2C_DMASlaveTransmitCplt; |
mbed_official | 133:d4dda5c437f0 | 1433 | |
mbed_official | 133:d4dda5c437f0 | 1434 | /* Set the DMA error callback */ |
mbed_official | 133:d4dda5c437f0 | 1435 | hi2c->hdmatx->XferErrorCallback = I2C_DMAError; |
mbed_official | 133:d4dda5c437f0 | 1436 | |
mbed_official | 133:d4dda5c437f0 | 1437 | /* Enable the DMA Stream */ |
mbed_official | 133:d4dda5c437f0 | 1438 | HAL_DMA_Start_IT(hi2c->hdmatx, (uint32_t)pData, (uint32_t)&hi2c->Instance->DR, Size); |
mbed_official | 133:d4dda5c437f0 | 1439 | |
mbed_official | 133:d4dda5c437f0 | 1440 | /* Enable DMA Request */ |
mbed_official | 133:d4dda5c437f0 | 1441 | hi2c->Instance->CR2 |= I2C_CR2_DMAEN; |
mbed_official | 133:d4dda5c437f0 | 1442 | |
mbed_official | 133:d4dda5c437f0 | 1443 | /* Enable Address Acknowledge */ |
mbed_official | 133:d4dda5c437f0 | 1444 | hi2c->Instance->CR1 |= I2C_CR1_ACK; |
mbed_official | 133:d4dda5c437f0 | 1445 | |
mbed_official | 133:d4dda5c437f0 | 1446 | /* Wait until ADDR flag is set */ |
mbed_official | 133:d4dda5c437f0 | 1447 | if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_ADDR, RESET, I2C_TIMEOUT_ADDR_SLAVE) != HAL_OK) |
mbed_official | 133:d4dda5c437f0 | 1448 | { |
mbed_official | 133:d4dda5c437f0 | 1449 | return HAL_TIMEOUT; |
mbed_official | 133:d4dda5c437f0 | 1450 | } |
mbed_official | 133:d4dda5c437f0 | 1451 | |
mbed_official | 133:d4dda5c437f0 | 1452 | /* If 7bit addressing mode is selected */ |
mbed_official | 133:d4dda5c437f0 | 1453 | if(hi2c->Init.AddressingMode == I2C_ADDRESSINGMODE_7BIT) |
mbed_official | 133:d4dda5c437f0 | 1454 | { |
mbed_official | 133:d4dda5c437f0 | 1455 | /* Clear ADDR flag */ |
mbed_official | 133:d4dda5c437f0 | 1456 | __HAL_I2C_CLEAR_ADDRFLAG(hi2c); |
mbed_official | 133:d4dda5c437f0 | 1457 | } |
mbed_official | 133:d4dda5c437f0 | 1458 | else |
mbed_official | 133:d4dda5c437f0 | 1459 | { |
mbed_official | 133:d4dda5c437f0 | 1460 | /* Clear ADDR flag */ |
mbed_official | 133:d4dda5c437f0 | 1461 | __HAL_I2C_CLEAR_ADDRFLAG(hi2c); |
mbed_official | 133:d4dda5c437f0 | 1462 | |
mbed_official | 133:d4dda5c437f0 | 1463 | /* Wait until ADDR flag is set */ |
mbed_official | 133:d4dda5c437f0 | 1464 | if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_ADDR, RESET, I2C_TIMEOUT_ADDR_SLAVE) != HAL_OK) |
mbed_official | 133:d4dda5c437f0 | 1465 | { |
mbed_official | 133:d4dda5c437f0 | 1466 | return HAL_TIMEOUT; |
mbed_official | 133:d4dda5c437f0 | 1467 | } |
mbed_official | 133:d4dda5c437f0 | 1468 | |
mbed_official | 133:d4dda5c437f0 | 1469 | /* Clear ADDR flag */ |
mbed_official | 133:d4dda5c437f0 | 1470 | __HAL_I2C_CLEAR_ADDRFLAG(hi2c); |
mbed_official | 133:d4dda5c437f0 | 1471 | } |
mbed_official | 133:d4dda5c437f0 | 1472 | |
mbed_official | 133:d4dda5c437f0 | 1473 | /* Process Unlocked */ |
mbed_official | 133:d4dda5c437f0 | 1474 | __HAL_UNLOCK(hi2c); |
mbed_official | 133:d4dda5c437f0 | 1475 | |
mbed_official | 133:d4dda5c437f0 | 1476 | return HAL_OK; |
mbed_official | 133:d4dda5c437f0 | 1477 | } |
mbed_official | 133:d4dda5c437f0 | 1478 | else |
mbed_official | 133:d4dda5c437f0 | 1479 | { |
mbed_official | 133:d4dda5c437f0 | 1480 | return HAL_BUSY; |
mbed_official | 133:d4dda5c437f0 | 1481 | } |
mbed_official | 133:d4dda5c437f0 | 1482 | } |
mbed_official | 133:d4dda5c437f0 | 1483 | |
mbed_official | 133:d4dda5c437f0 | 1484 | /** |
mbed_official | 133:d4dda5c437f0 | 1485 | * @brief Receive in slave mode an amount of data in no-blocking mode with DMA |
mbed_official | 242:7074e42da0b2 | 1486 | * @param hi2c: pointer to a I2C_HandleTypeDef structure that contains |
mbed_official | 242:7074e42da0b2 | 1487 | * the configuration information for I2C module |
mbed_official | 133:d4dda5c437f0 | 1488 | * @param pData: Pointer to data buffer |
mbed_official | 133:d4dda5c437f0 | 1489 | * @param Size: Amount of data to be sent |
mbed_official | 133:d4dda5c437f0 | 1490 | * @retval HAL status |
mbed_official | 133:d4dda5c437f0 | 1491 | */ |
mbed_official | 133:d4dda5c437f0 | 1492 | HAL_StatusTypeDef HAL_I2C_Slave_Receive_DMA(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size) |
mbed_official | 133:d4dda5c437f0 | 1493 | { |
mbed_official | 133:d4dda5c437f0 | 1494 | if(hi2c->State == HAL_I2C_STATE_READY) |
mbed_official | 133:d4dda5c437f0 | 1495 | { |
mbed_official | 133:d4dda5c437f0 | 1496 | if((pData == NULL) || (Size == 0)) |
mbed_official | 133:d4dda5c437f0 | 1497 | { |
mbed_official | 133:d4dda5c437f0 | 1498 | return HAL_ERROR; |
mbed_official | 133:d4dda5c437f0 | 1499 | } |
mbed_official | 133:d4dda5c437f0 | 1500 | |
mbed_official | 133:d4dda5c437f0 | 1501 | if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) == SET) |
mbed_official | 133:d4dda5c437f0 | 1502 | { |
mbed_official | 133:d4dda5c437f0 | 1503 | return HAL_BUSY; |
mbed_official | 133:d4dda5c437f0 | 1504 | } |
mbed_official | 133:d4dda5c437f0 | 1505 | |
mbed_official | 133:d4dda5c437f0 | 1506 | /* Process Locked */ |
mbed_official | 133:d4dda5c437f0 | 1507 | __HAL_LOCK(hi2c); |
mbed_official | 133:d4dda5c437f0 | 1508 | |
mbed_official | 133:d4dda5c437f0 | 1509 | hi2c->State = HAL_I2C_STATE_BUSY_RX; |
mbed_official | 133:d4dda5c437f0 | 1510 | hi2c->ErrorCode = HAL_I2C_ERROR_NONE; |
mbed_official | 133:d4dda5c437f0 | 1511 | |
mbed_official | 133:d4dda5c437f0 | 1512 | hi2c->pBuffPtr = pData; |
mbed_official | 133:d4dda5c437f0 | 1513 | hi2c->XferSize = Size; |
mbed_official | 133:d4dda5c437f0 | 1514 | hi2c->XferCount = Size; |
mbed_official | 133:d4dda5c437f0 | 1515 | |
mbed_official | 133:d4dda5c437f0 | 1516 | /* Set the I2C DMA transfert complete callback */ |
mbed_official | 133:d4dda5c437f0 | 1517 | hi2c->hdmarx->XferCpltCallback = I2C_DMASlaveReceiveCplt; |
mbed_official | 133:d4dda5c437f0 | 1518 | |
mbed_official | 133:d4dda5c437f0 | 1519 | /* Set the DMA error callback */ |
mbed_official | 133:d4dda5c437f0 | 1520 | hi2c->hdmarx->XferErrorCallback = I2C_DMAError; |
mbed_official | 133:d4dda5c437f0 | 1521 | |
mbed_official | 133:d4dda5c437f0 | 1522 | /* Enable the DMA Stream */ |
mbed_official | 133:d4dda5c437f0 | 1523 | HAL_DMA_Start_IT(hi2c->hdmarx, (uint32_t)&hi2c->Instance->DR, (uint32_t)pData, Size); |
mbed_official | 133:d4dda5c437f0 | 1524 | |
mbed_official | 133:d4dda5c437f0 | 1525 | /* Enable DMA Request */ |
mbed_official | 133:d4dda5c437f0 | 1526 | hi2c->Instance->CR2 |= I2C_CR2_DMAEN; |
mbed_official | 133:d4dda5c437f0 | 1527 | |
mbed_official | 133:d4dda5c437f0 | 1528 | /* Enable Address Acknowledge */ |
mbed_official | 133:d4dda5c437f0 | 1529 | hi2c->Instance->CR1 |= I2C_CR1_ACK; |
mbed_official | 133:d4dda5c437f0 | 1530 | |
mbed_official | 133:d4dda5c437f0 | 1531 | /* Wait until ADDR flag is set */ |
mbed_official | 133:d4dda5c437f0 | 1532 | if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_ADDR, RESET, I2C_TIMEOUT_ADDR_SLAVE) != HAL_OK) |
mbed_official | 133:d4dda5c437f0 | 1533 | { |
mbed_official | 133:d4dda5c437f0 | 1534 | return HAL_TIMEOUT; |
mbed_official | 133:d4dda5c437f0 | 1535 | } |
mbed_official | 133:d4dda5c437f0 | 1536 | |
mbed_official | 133:d4dda5c437f0 | 1537 | /* Clear ADDR flag */ |
mbed_official | 133:d4dda5c437f0 | 1538 | __HAL_I2C_CLEAR_ADDRFLAG(hi2c); |
mbed_official | 133:d4dda5c437f0 | 1539 | |
mbed_official | 133:d4dda5c437f0 | 1540 | /* Process Unlocked */ |
mbed_official | 133:d4dda5c437f0 | 1541 | __HAL_UNLOCK(hi2c); |
mbed_official | 133:d4dda5c437f0 | 1542 | |
mbed_official | 133:d4dda5c437f0 | 1543 | return HAL_OK; |
mbed_official | 133:d4dda5c437f0 | 1544 | } |
mbed_official | 133:d4dda5c437f0 | 1545 | else |
mbed_official | 133:d4dda5c437f0 | 1546 | { |
mbed_official | 133:d4dda5c437f0 | 1547 | return HAL_BUSY; |
mbed_official | 133:d4dda5c437f0 | 1548 | } |
mbed_official | 133:d4dda5c437f0 | 1549 | } |
mbed_official | 133:d4dda5c437f0 | 1550 | /** |
mbed_official | 133:d4dda5c437f0 | 1551 | * @brief Write an amount of data in blocking mode to a specific memory address |
mbed_official | 242:7074e42da0b2 | 1552 | * @param hi2c: pointer to a I2C_HandleTypeDef structure that contains |
mbed_official | 242:7074e42da0b2 | 1553 | * the configuration information for I2C module |
mbed_official | 133:d4dda5c437f0 | 1554 | * @param DevAddress: Target device address |
mbed_official | 133:d4dda5c437f0 | 1555 | * @param MemAddress: Internal memory address |
mbed_official | 133:d4dda5c437f0 | 1556 | * @param MemAddSize: Size of internal memory address |
mbed_official | 133:d4dda5c437f0 | 1557 | * @param pData: Pointer to data buffer |
mbed_official | 133:d4dda5c437f0 | 1558 | * @param Size: Amount of data to be sent |
mbed_official | 133:d4dda5c437f0 | 1559 | * @param Timeout: Timeout duration |
mbed_official | 133:d4dda5c437f0 | 1560 | * @retval HAL status |
mbed_official | 133:d4dda5c437f0 | 1561 | */ |
mbed_official | 133:d4dda5c437f0 | 1562 | HAL_StatusTypeDef HAL_I2C_Mem_Write(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size, uint32_t Timeout) |
mbed_official | 133:d4dda5c437f0 | 1563 | { |
mbed_official | 133:d4dda5c437f0 | 1564 | /* Check the parameters */ |
mbed_official | 133:d4dda5c437f0 | 1565 | assert_param(IS_I2C_MEMADD_SIZE(MemAddSize)); |
mbed_official | 133:d4dda5c437f0 | 1566 | |
mbed_official | 133:d4dda5c437f0 | 1567 | if(hi2c->State == HAL_I2C_STATE_READY) |
mbed_official | 133:d4dda5c437f0 | 1568 | { |
mbed_official | 133:d4dda5c437f0 | 1569 | if((pData == NULL) || (Size == 0)) |
mbed_official | 133:d4dda5c437f0 | 1570 | { |
mbed_official | 133:d4dda5c437f0 | 1571 | return HAL_ERROR; |
mbed_official | 133:d4dda5c437f0 | 1572 | } |
mbed_official | 133:d4dda5c437f0 | 1573 | |
mbed_official | 133:d4dda5c437f0 | 1574 | if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) == SET) |
mbed_official | 133:d4dda5c437f0 | 1575 | { |
mbed_official | 133:d4dda5c437f0 | 1576 | return HAL_BUSY; |
mbed_official | 133:d4dda5c437f0 | 1577 | } |
mbed_official | 133:d4dda5c437f0 | 1578 | |
mbed_official | 133:d4dda5c437f0 | 1579 | /* Process Locked */ |
mbed_official | 133:d4dda5c437f0 | 1580 | __HAL_LOCK(hi2c); |
mbed_official | 133:d4dda5c437f0 | 1581 | |
mbed_official | 133:d4dda5c437f0 | 1582 | hi2c->State = HAL_I2C_STATE_MEM_BUSY_TX; |
mbed_official | 133:d4dda5c437f0 | 1583 | hi2c->ErrorCode = HAL_I2C_ERROR_NONE; |
mbed_official | 133:d4dda5c437f0 | 1584 | |
mbed_official | 133:d4dda5c437f0 | 1585 | /* Send Slave Address and Memory Address */ |
mbed_official | 133:d4dda5c437f0 | 1586 | if(I2C_RequestMemoryWrite(hi2c, DevAddress, MemAddress, MemAddSize, Timeout) != HAL_OK) |
mbed_official | 133:d4dda5c437f0 | 1587 | { |
mbed_official | 133:d4dda5c437f0 | 1588 | if(hi2c->ErrorCode == HAL_I2C_ERROR_AF) |
mbed_official | 133:d4dda5c437f0 | 1589 | { |
mbed_official | 133:d4dda5c437f0 | 1590 | /* Process Unlocked */ |
mbed_official | 133:d4dda5c437f0 | 1591 | __HAL_UNLOCK(hi2c); |
mbed_official | 133:d4dda5c437f0 | 1592 | return HAL_ERROR; |
mbed_official | 133:d4dda5c437f0 | 1593 | } |
mbed_official | 133:d4dda5c437f0 | 1594 | else |
mbed_official | 133:d4dda5c437f0 | 1595 | { |
mbed_official | 133:d4dda5c437f0 | 1596 | /* Process Unlocked */ |
mbed_official | 133:d4dda5c437f0 | 1597 | __HAL_UNLOCK(hi2c); |
mbed_official | 133:d4dda5c437f0 | 1598 | return HAL_TIMEOUT; |
mbed_official | 133:d4dda5c437f0 | 1599 | } |
mbed_official | 133:d4dda5c437f0 | 1600 | } |
mbed_official | 133:d4dda5c437f0 | 1601 | |
mbed_official | 133:d4dda5c437f0 | 1602 | while(Size > 0) |
mbed_official | 133:d4dda5c437f0 | 1603 | { |
mbed_official | 133:d4dda5c437f0 | 1604 | /* Wait until TXE flag is set */ |
mbed_official | 133:d4dda5c437f0 | 1605 | if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_TXE, RESET, Timeout) != HAL_OK) |
mbed_official | 133:d4dda5c437f0 | 1606 | { |
mbed_official | 133:d4dda5c437f0 | 1607 | return HAL_TIMEOUT; |
mbed_official | 133:d4dda5c437f0 | 1608 | } |
mbed_official | 133:d4dda5c437f0 | 1609 | |
mbed_official | 133:d4dda5c437f0 | 1610 | /* Write data to DR */ |
mbed_official | 133:d4dda5c437f0 | 1611 | hi2c->Instance->DR = (*pData++); |
mbed_official | 133:d4dda5c437f0 | 1612 | Size--; |
mbed_official | 133:d4dda5c437f0 | 1613 | |
mbed_official | 133:d4dda5c437f0 | 1614 | if((__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BTF) == SET) && (Size != 0)) |
mbed_official | 133:d4dda5c437f0 | 1615 | { |
mbed_official | 133:d4dda5c437f0 | 1616 | /* Write data to DR */ |
mbed_official | 133:d4dda5c437f0 | 1617 | hi2c->Instance->DR = (*pData++); |
mbed_official | 133:d4dda5c437f0 | 1618 | Size--; |
mbed_official | 133:d4dda5c437f0 | 1619 | } |
mbed_official | 133:d4dda5c437f0 | 1620 | } |
mbed_official | 133:d4dda5c437f0 | 1621 | |
mbed_official | 133:d4dda5c437f0 | 1622 | /* Wait until TXE flag is set */ |
mbed_official | 133:d4dda5c437f0 | 1623 | if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_TXE, RESET, Timeout) != HAL_OK) |
mbed_official | 133:d4dda5c437f0 | 1624 | { |
mbed_official | 133:d4dda5c437f0 | 1625 | return HAL_TIMEOUT; |
mbed_official | 133:d4dda5c437f0 | 1626 | } |
mbed_official | 133:d4dda5c437f0 | 1627 | |
mbed_official | 133:d4dda5c437f0 | 1628 | /* Generate Stop */ |
mbed_official | 133:d4dda5c437f0 | 1629 | hi2c->Instance->CR1 |= I2C_CR1_STOP; |
mbed_official | 133:d4dda5c437f0 | 1630 | |
mbed_official | 133:d4dda5c437f0 | 1631 | /* Wait until BUSY flag is reset */ |
mbed_official | 133:d4dda5c437f0 | 1632 | if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, Timeout) != HAL_OK) |
mbed_official | 133:d4dda5c437f0 | 1633 | { |
mbed_official | 133:d4dda5c437f0 | 1634 | return HAL_TIMEOUT; |
mbed_official | 133:d4dda5c437f0 | 1635 | } |
mbed_official | 133:d4dda5c437f0 | 1636 | |
mbed_official | 133:d4dda5c437f0 | 1637 | hi2c->State = HAL_I2C_STATE_READY; |
mbed_official | 133:d4dda5c437f0 | 1638 | |
mbed_official | 133:d4dda5c437f0 | 1639 | /* Process Unlocked */ |
mbed_official | 133:d4dda5c437f0 | 1640 | __HAL_UNLOCK(hi2c); |
mbed_official | 133:d4dda5c437f0 | 1641 | |
mbed_official | 133:d4dda5c437f0 | 1642 | return HAL_OK; |
mbed_official | 133:d4dda5c437f0 | 1643 | } |
mbed_official | 133:d4dda5c437f0 | 1644 | else |
mbed_official | 133:d4dda5c437f0 | 1645 | { |
mbed_official | 133:d4dda5c437f0 | 1646 | return HAL_BUSY; |
mbed_official | 133:d4dda5c437f0 | 1647 | } |
mbed_official | 133:d4dda5c437f0 | 1648 | } |
mbed_official | 133:d4dda5c437f0 | 1649 | |
mbed_official | 133:d4dda5c437f0 | 1650 | /** |
mbed_official | 133:d4dda5c437f0 | 1651 | * @brief Read an amount of data in blocking mode from a specific memory address |
mbed_official | 242:7074e42da0b2 | 1652 | * @param hi2c: pointer to a I2C_HandleTypeDef structure that contains |
mbed_official | 242:7074e42da0b2 | 1653 | * the configuration information for I2C module |
mbed_official | 133:d4dda5c437f0 | 1654 | * @param DevAddress: Target device address |
mbed_official | 133:d4dda5c437f0 | 1655 | * @param MemAddress: Internal memory address |
mbed_official | 133:d4dda5c437f0 | 1656 | * @param MemAddSize: Size of internal memory address |
mbed_official | 133:d4dda5c437f0 | 1657 | * @param pData: Pointer to data buffer |
mbed_official | 133:d4dda5c437f0 | 1658 | * @param Size: Amount of data to be sent |
mbed_official | 133:d4dda5c437f0 | 1659 | * @param Timeout: Timeout duration |
mbed_official | 133:d4dda5c437f0 | 1660 | * @retval HAL status |
mbed_official | 133:d4dda5c437f0 | 1661 | */ |
mbed_official | 133:d4dda5c437f0 | 1662 | HAL_StatusTypeDef HAL_I2C_Mem_Read(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size, uint32_t Timeout) |
mbed_official | 133:d4dda5c437f0 | 1663 | { |
mbed_official | 133:d4dda5c437f0 | 1664 | /* Check the parameters */ |
mbed_official | 133:d4dda5c437f0 | 1665 | assert_param(IS_I2C_MEMADD_SIZE(MemAddSize)); |
mbed_official | 133:d4dda5c437f0 | 1666 | |
mbed_official | 133:d4dda5c437f0 | 1667 | if(hi2c->State == HAL_I2C_STATE_READY) |
mbed_official | 133:d4dda5c437f0 | 1668 | { |
mbed_official | 133:d4dda5c437f0 | 1669 | if((pData == NULL) || (Size == 0)) |
mbed_official | 133:d4dda5c437f0 | 1670 | { |
mbed_official | 133:d4dda5c437f0 | 1671 | return HAL_ERROR; |
mbed_official | 133:d4dda5c437f0 | 1672 | } |
mbed_official | 133:d4dda5c437f0 | 1673 | |
mbed_official | 133:d4dda5c437f0 | 1674 | if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) == SET) |
mbed_official | 133:d4dda5c437f0 | 1675 | { |
mbed_official | 133:d4dda5c437f0 | 1676 | return HAL_BUSY; |
mbed_official | 133:d4dda5c437f0 | 1677 | } |
mbed_official | 133:d4dda5c437f0 | 1678 | |
mbed_official | 133:d4dda5c437f0 | 1679 | /* Process Locked */ |
mbed_official | 133:d4dda5c437f0 | 1680 | __HAL_LOCK(hi2c); |
mbed_official | 133:d4dda5c437f0 | 1681 | |
mbed_official | 133:d4dda5c437f0 | 1682 | hi2c->State = HAL_I2C_STATE_MEM_BUSY_RX; |
mbed_official | 133:d4dda5c437f0 | 1683 | hi2c->ErrorCode = HAL_I2C_ERROR_NONE; |
mbed_official | 133:d4dda5c437f0 | 1684 | |
mbed_official | 133:d4dda5c437f0 | 1685 | /* Send Slave Address and Memory Address */ |
mbed_official | 133:d4dda5c437f0 | 1686 | if(I2C_RequestMemoryRead(hi2c, DevAddress, MemAddress, MemAddSize, Timeout) != HAL_OK) |
mbed_official | 133:d4dda5c437f0 | 1687 | { |
mbed_official | 133:d4dda5c437f0 | 1688 | if(hi2c->ErrorCode == HAL_I2C_ERROR_AF) |
mbed_official | 133:d4dda5c437f0 | 1689 | { |
mbed_official | 133:d4dda5c437f0 | 1690 | /* Process Unlocked */ |
mbed_official | 133:d4dda5c437f0 | 1691 | __HAL_UNLOCK(hi2c); |
mbed_official | 133:d4dda5c437f0 | 1692 | return HAL_ERROR; |
mbed_official | 133:d4dda5c437f0 | 1693 | } |
mbed_official | 133:d4dda5c437f0 | 1694 | else |
mbed_official | 133:d4dda5c437f0 | 1695 | { |
mbed_official | 133:d4dda5c437f0 | 1696 | /* Process Unlocked */ |
mbed_official | 133:d4dda5c437f0 | 1697 | __HAL_UNLOCK(hi2c); |
mbed_official | 133:d4dda5c437f0 | 1698 | return HAL_TIMEOUT; |
mbed_official | 133:d4dda5c437f0 | 1699 | } |
mbed_official | 133:d4dda5c437f0 | 1700 | } |
mbed_official | 133:d4dda5c437f0 | 1701 | |
mbed_official | 133:d4dda5c437f0 | 1702 | if(Size == 1) |
mbed_official | 133:d4dda5c437f0 | 1703 | { |
mbed_official | 133:d4dda5c437f0 | 1704 | /* Disable Acknowledge */ |
mbed_official | 133:d4dda5c437f0 | 1705 | hi2c->Instance->CR1 &= ~I2C_CR1_ACK; |
mbed_official | 133:d4dda5c437f0 | 1706 | |
mbed_official | 133:d4dda5c437f0 | 1707 | /* Clear ADDR flag */ |
mbed_official | 133:d4dda5c437f0 | 1708 | __HAL_I2C_CLEAR_ADDRFLAG(hi2c); |
mbed_official | 133:d4dda5c437f0 | 1709 | |
mbed_official | 133:d4dda5c437f0 | 1710 | /* Generate Stop */ |
mbed_official | 133:d4dda5c437f0 | 1711 | hi2c->Instance->CR1 |= I2C_CR1_STOP; |
mbed_official | 133:d4dda5c437f0 | 1712 | } |
mbed_official | 133:d4dda5c437f0 | 1713 | else if(Size == 2) |
mbed_official | 133:d4dda5c437f0 | 1714 | { |
mbed_official | 133:d4dda5c437f0 | 1715 | /* Disable Acknowledge */ |
mbed_official | 133:d4dda5c437f0 | 1716 | hi2c->Instance->CR1 &= ~I2C_CR1_ACK; |
mbed_official | 133:d4dda5c437f0 | 1717 | |
mbed_official | 133:d4dda5c437f0 | 1718 | /* Enable Pos */ |
mbed_official | 133:d4dda5c437f0 | 1719 | hi2c->Instance->CR1 |= I2C_CR1_POS; |
mbed_official | 133:d4dda5c437f0 | 1720 | |
mbed_official | 133:d4dda5c437f0 | 1721 | /* Clear ADDR flag */ |
mbed_official | 133:d4dda5c437f0 | 1722 | __HAL_I2C_CLEAR_ADDRFLAG(hi2c); |
mbed_official | 133:d4dda5c437f0 | 1723 | } |
mbed_official | 133:d4dda5c437f0 | 1724 | else |
mbed_official | 133:d4dda5c437f0 | 1725 | { |
mbed_official | 133:d4dda5c437f0 | 1726 | /* Clear ADDR flag */ |
mbed_official | 133:d4dda5c437f0 | 1727 | __HAL_I2C_CLEAR_ADDRFLAG(hi2c); |
mbed_official | 133:d4dda5c437f0 | 1728 | } |
mbed_official | 133:d4dda5c437f0 | 1729 | |
mbed_official | 133:d4dda5c437f0 | 1730 | while(Size > 0) |
mbed_official | 133:d4dda5c437f0 | 1731 | { |
mbed_official | 133:d4dda5c437f0 | 1732 | if(Size <= 3) |
mbed_official | 133:d4dda5c437f0 | 1733 | { |
mbed_official | 133:d4dda5c437f0 | 1734 | /* One byte */ |
mbed_official | 133:d4dda5c437f0 | 1735 | if(Size== 1) |
mbed_official | 133:d4dda5c437f0 | 1736 | { |
mbed_official | 133:d4dda5c437f0 | 1737 | /* Wait until RXNE flag is set */ |
mbed_official | 133:d4dda5c437f0 | 1738 | if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_RXNE, RESET, Timeout) != HAL_OK) |
mbed_official | 133:d4dda5c437f0 | 1739 | { |
mbed_official | 133:d4dda5c437f0 | 1740 | return HAL_TIMEOUT; |
mbed_official | 133:d4dda5c437f0 | 1741 | } |
mbed_official | 133:d4dda5c437f0 | 1742 | |
mbed_official | 133:d4dda5c437f0 | 1743 | /* Read data from DR */ |
mbed_official | 133:d4dda5c437f0 | 1744 | (*pData++) = hi2c->Instance->DR; |
mbed_official | 133:d4dda5c437f0 | 1745 | Size--; |
mbed_official | 133:d4dda5c437f0 | 1746 | } |
mbed_official | 133:d4dda5c437f0 | 1747 | /* Two bytes */ |
mbed_official | 133:d4dda5c437f0 | 1748 | else if(Size == 2) |
mbed_official | 133:d4dda5c437f0 | 1749 | { |
mbed_official | 133:d4dda5c437f0 | 1750 | /* Wait until BTF flag is set */ |
mbed_official | 133:d4dda5c437f0 | 1751 | if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BTF, RESET, Timeout) != HAL_OK) |
mbed_official | 133:d4dda5c437f0 | 1752 | { |
mbed_official | 133:d4dda5c437f0 | 1753 | return HAL_TIMEOUT; |
mbed_official | 133:d4dda5c437f0 | 1754 | } |
mbed_official | 133:d4dda5c437f0 | 1755 | |
mbed_official | 133:d4dda5c437f0 | 1756 | /* Generate Stop */ |
mbed_official | 133:d4dda5c437f0 | 1757 | hi2c->Instance->CR1 |= I2C_CR1_STOP; |
mbed_official | 133:d4dda5c437f0 | 1758 | |
mbed_official | 133:d4dda5c437f0 | 1759 | /* Read data from DR */ |
mbed_official | 133:d4dda5c437f0 | 1760 | (*pData++) = hi2c->Instance->DR; |
mbed_official | 133:d4dda5c437f0 | 1761 | Size--; |
mbed_official | 133:d4dda5c437f0 | 1762 | |
mbed_official | 133:d4dda5c437f0 | 1763 | /* Read data from DR */ |
mbed_official | 133:d4dda5c437f0 | 1764 | (*pData++) = hi2c->Instance->DR; |
mbed_official | 133:d4dda5c437f0 | 1765 | Size--; |
mbed_official | 133:d4dda5c437f0 | 1766 | } |
mbed_official | 133:d4dda5c437f0 | 1767 | /* 3 Last bytes */ |
mbed_official | 133:d4dda5c437f0 | 1768 | else |
mbed_official | 133:d4dda5c437f0 | 1769 | { |
mbed_official | 133:d4dda5c437f0 | 1770 | /* Wait until BTF flag is set */ |
mbed_official | 133:d4dda5c437f0 | 1771 | if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BTF, RESET, Timeout) != HAL_OK) |
mbed_official | 133:d4dda5c437f0 | 1772 | { |
mbed_official | 133:d4dda5c437f0 | 1773 | return HAL_TIMEOUT; |
mbed_official | 133:d4dda5c437f0 | 1774 | } |
mbed_official | 133:d4dda5c437f0 | 1775 | |
mbed_official | 133:d4dda5c437f0 | 1776 | /* Disable Acknowledge */ |
mbed_official | 133:d4dda5c437f0 | 1777 | hi2c->Instance->CR1 &= ~I2C_CR1_ACK; |
mbed_official | 133:d4dda5c437f0 | 1778 | |
mbed_official | 133:d4dda5c437f0 | 1779 | /* Read data from DR */ |
mbed_official | 133:d4dda5c437f0 | 1780 | (*pData++) = hi2c->Instance->DR; |
mbed_official | 133:d4dda5c437f0 | 1781 | Size--; |
mbed_official | 133:d4dda5c437f0 | 1782 | |
mbed_official | 133:d4dda5c437f0 | 1783 | /* Wait until BTF flag is set */ |
mbed_official | 133:d4dda5c437f0 | 1784 | if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BTF, RESET, Timeout) != HAL_OK) |
mbed_official | 133:d4dda5c437f0 | 1785 | { |
mbed_official | 133:d4dda5c437f0 | 1786 | return HAL_TIMEOUT; |
mbed_official | 133:d4dda5c437f0 | 1787 | } |
mbed_official | 133:d4dda5c437f0 | 1788 | |
mbed_official | 133:d4dda5c437f0 | 1789 | /* Generate Stop */ |
mbed_official | 133:d4dda5c437f0 | 1790 | hi2c->Instance->CR1 |= I2C_CR1_STOP; |
mbed_official | 133:d4dda5c437f0 | 1791 | |
mbed_official | 133:d4dda5c437f0 | 1792 | /* Read data from DR */ |
mbed_official | 133:d4dda5c437f0 | 1793 | (*pData++) = hi2c->Instance->DR; |
mbed_official | 133:d4dda5c437f0 | 1794 | Size--; |
mbed_official | 133:d4dda5c437f0 | 1795 | |
mbed_official | 133:d4dda5c437f0 | 1796 | /* Read data from DR */ |
mbed_official | 133:d4dda5c437f0 | 1797 | (*pData++) = hi2c->Instance->DR; |
mbed_official | 133:d4dda5c437f0 | 1798 | Size--; |
mbed_official | 133:d4dda5c437f0 | 1799 | } |
mbed_official | 133:d4dda5c437f0 | 1800 | } |
mbed_official | 133:d4dda5c437f0 | 1801 | else |
mbed_official | 133:d4dda5c437f0 | 1802 | { |
mbed_official | 133:d4dda5c437f0 | 1803 | /* Wait until RXNE flag is set */ |
mbed_official | 133:d4dda5c437f0 | 1804 | if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_RXNE, RESET, Timeout) != HAL_OK) |
mbed_official | 133:d4dda5c437f0 | 1805 | { |
mbed_official | 133:d4dda5c437f0 | 1806 | return HAL_TIMEOUT; |
mbed_official | 133:d4dda5c437f0 | 1807 | } |
mbed_official | 133:d4dda5c437f0 | 1808 | |
mbed_official | 133:d4dda5c437f0 | 1809 | /* Read data from DR */ |
mbed_official | 133:d4dda5c437f0 | 1810 | (*pData++) = hi2c->Instance->DR; |
mbed_official | 133:d4dda5c437f0 | 1811 | Size--; |
mbed_official | 133:d4dda5c437f0 | 1812 | |
mbed_official | 133:d4dda5c437f0 | 1813 | if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BTF) == SET) |
mbed_official | 133:d4dda5c437f0 | 1814 | { |
mbed_official | 133:d4dda5c437f0 | 1815 | /* Read data from DR */ |
mbed_official | 133:d4dda5c437f0 | 1816 | (*pData++) = hi2c->Instance->DR; |
mbed_official | 133:d4dda5c437f0 | 1817 | Size--; |
mbed_official | 133:d4dda5c437f0 | 1818 | } |
mbed_official | 133:d4dda5c437f0 | 1819 | } |
mbed_official | 133:d4dda5c437f0 | 1820 | } |
mbed_official | 133:d4dda5c437f0 | 1821 | |
mbed_official | 133:d4dda5c437f0 | 1822 | /* Disable Pos */ |
mbed_official | 133:d4dda5c437f0 | 1823 | hi2c->Instance->CR1 &= ~I2C_CR1_POS; |
mbed_official | 133:d4dda5c437f0 | 1824 | |
mbed_official | 133:d4dda5c437f0 | 1825 | /* Wait until BUSY flag is reset */ |
mbed_official | 133:d4dda5c437f0 | 1826 | if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, Timeout) != HAL_OK) |
mbed_official | 133:d4dda5c437f0 | 1827 | { |
mbed_official | 133:d4dda5c437f0 | 1828 | return HAL_TIMEOUT; |
mbed_official | 133:d4dda5c437f0 | 1829 | } |
mbed_official | 133:d4dda5c437f0 | 1830 | |
mbed_official | 133:d4dda5c437f0 | 1831 | hi2c->State = HAL_I2C_STATE_READY; |
mbed_official | 133:d4dda5c437f0 | 1832 | |
mbed_official | 133:d4dda5c437f0 | 1833 | /* Process Unlocked */ |
mbed_official | 133:d4dda5c437f0 | 1834 | __HAL_UNLOCK(hi2c); |
mbed_official | 133:d4dda5c437f0 | 1835 | |
mbed_official | 133:d4dda5c437f0 | 1836 | return HAL_OK; |
mbed_official | 133:d4dda5c437f0 | 1837 | } |
mbed_official | 133:d4dda5c437f0 | 1838 | else |
mbed_official | 133:d4dda5c437f0 | 1839 | { |
mbed_official | 133:d4dda5c437f0 | 1840 | return HAL_BUSY; |
mbed_official | 133:d4dda5c437f0 | 1841 | } |
mbed_official | 133:d4dda5c437f0 | 1842 | } |
mbed_official | 133:d4dda5c437f0 | 1843 | /** |
mbed_official | 133:d4dda5c437f0 | 1844 | * @brief Write an amount of data in no-blocking mode with Interrupt to a specific memory address |
mbed_official | 242:7074e42da0b2 | 1845 | * @param hi2c: pointer to a I2C_HandleTypeDef structure that contains |
mbed_official | 242:7074e42da0b2 | 1846 | * the configuration information for I2C module |
mbed_official | 133:d4dda5c437f0 | 1847 | * @param DevAddress: Target device address |
mbed_official | 133:d4dda5c437f0 | 1848 | * @param MemAddress: Internal memory address |
mbed_official | 133:d4dda5c437f0 | 1849 | * @param MemAddSize: Size of internal memory address |
mbed_official | 133:d4dda5c437f0 | 1850 | * @param pData: Pointer to data buffer |
mbed_official | 133:d4dda5c437f0 | 1851 | * @param Size: Amount of data to be sent |
mbed_official | 133:d4dda5c437f0 | 1852 | * @retval HAL status |
mbed_official | 133:d4dda5c437f0 | 1853 | */ |
mbed_official | 133:d4dda5c437f0 | 1854 | HAL_StatusTypeDef HAL_I2C_Mem_Write_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size) |
mbed_official | 133:d4dda5c437f0 | 1855 | { |
mbed_official | 133:d4dda5c437f0 | 1856 | /* Check the parameters */ |
mbed_official | 133:d4dda5c437f0 | 1857 | assert_param(IS_I2C_MEMADD_SIZE(MemAddSize)); |
mbed_official | 133:d4dda5c437f0 | 1858 | |
mbed_official | 133:d4dda5c437f0 | 1859 | if(hi2c->State == HAL_I2C_STATE_READY) |
mbed_official | 133:d4dda5c437f0 | 1860 | { |
mbed_official | 133:d4dda5c437f0 | 1861 | if((pData == NULL) || (Size == 0)) |
mbed_official | 133:d4dda5c437f0 | 1862 | { |
mbed_official | 133:d4dda5c437f0 | 1863 | return HAL_ERROR; |
mbed_official | 133:d4dda5c437f0 | 1864 | } |
mbed_official | 133:d4dda5c437f0 | 1865 | |
mbed_official | 133:d4dda5c437f0 | 1866 | if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) == SET) |
mbed_official | 133:d4dda5c437f0 | 1867 | { |
mbed_official | 133:d4dda5c437f0 | 1868 | return HAL_BUSY; |
mbed_official | 133:d4dda5c437f0 | 1869 | } |
mbed_official | 133:d4dda5c437f0 | 1870 | |
mbed_official | 133:d4dda5c437f0 | 1871 | /* Process Locked */ |
mbed_official | 133:d4dda5c437f0 | 1872 | __HAL_LOCK(hi2c); |
mbed_official | 133:d4dda5c437f0 | 1873 | |
mbed_official | 133:d4dda5c437f0 | 1874 | hi2c->State = HAL_I2C_STATE_MEM_BUSY_TX; |
mbed_official | 133:d4dda5c437f0 | 1875 | hi2c->ErrorCode = HAL_I2C_ERROR_NONE; |
mbed_official | 133:d4dda5c437f0 | 1876 | |
mbed_official | 133:d4dda5c437f0 | 1877 | hi2c->pBuffPtr = pData; |
mbed_official | 133:d4dda5c437f0 | 1878 | hi2c->XferSize = Size; |
mbed_official | 133:d4dda5c437f0 | 1879 | hi2c->XferCount = Size; |
mbed_official | 133:d4dda5c437f0 | 1880 | |
mbed_official | 133:d4dda5c437f0 | 1881 | /* Send Slave Address and Memory Address */ |
mbed_official | 133:d4dda5c437f0 | 1882 | if(I2C_RequestMemoryWrite(hi2c, DevAddress, MemAddress, MemAddSize, I2C_TIMEOUT_FLAG) != HAL_OK) |
mbed_official | 133:d4dda5c437f0 | 1883 | { |
mbed_official | 133:d4dda5c437f0 | 1884 | if(hi2c->ErrorCode == HAL_I2C_ERROR_AF) |
mbed_official | 133:d4dda5c437f0 | 1885 | { |
mbed_official | 133:d4dda5c437f0 | 1886 | /* Process Unlocked */ |
mbed_official | 133:d4dda5c437f0 | 1887 | __HAL_UNLOCK(hi2c); |
mbed_official | 133:d4dda5c437f0 | 1888 | return HAL_ERROR; |
mbed_official | 133:d4dda5c437f0 | 1889 | } |
mbed_official | 133:d4dda5c437f0 | 1890 | else |
mbed_official | 133:d4dda5c437f0 | 1891 | { |
mbed_official | 133:d4dda5c437f0 | 1892 | /* Process Unlocked */ |
mbed_official | 133:d4dda5c437f0 | 1893 | __HAL_UNLOCK(hi2c); |
mbed_official | 133:d4dda5c437f0 | 1894 | return HAL_TIMEOUT; |
mbed_official | 133:d4dda5c437f0 | 1895 | } |
mbed_official | 133:d4dda5c437f0 | 1896 | } |
mbed_official | 133:d4dda5c437f0 | 1897 | |
mbed_official | 133:d4dda5c437f0 | 1898 | /* Process Unlocked */ |
mbed_official | 133:d4dda5c437f0 | 1899 | __HAL_UNLOCK(hi2c); |
mbed_official | 133:d4dda5c437f0 | 1900 | |
mbed_official | 133:d4dda5c437f0 | 1901 | /* Note : The I2C interrupts must be enabled after unlocking current process |
mbed_official | 133:d4dda5c437f0 | 1902 | to avoid the risk of I2C interrupt handle execution before current |
mbed_official | 133:d4dda5c437f0 | 1903 | process unlock */ |
mbed_official | 133:d4dda5c437f0 | 1904 | |
mbed_official | 133:d4dda5c437f0 | 1905 | /* Enable EVT, BUF and ERR interrupt */ |
mbed_official | 133:d4dda5c437f0 | 1906 | __HAL_I2C_ENABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_BUF | I2C_IT_ERR); |
mbed_official | 133:d4dda5c437f0 | 1907 | |
mbed_official | 133:d4dda5c437f0 | 1908 | return HAL_OK; |
mbed_official | 133:d4dda5c437f0 | 1909 | } |
mbed_official | 133:d4dda5c437f0 | 1910 | else |
mbed_official | 133:d4dda5c437f0 | 1911 | { |
mbed_official | 133:d4dda5c437f0 | 1912 | return HAL_BUSY; |
mbed_official | 133:d4dda5c437f0 | 1913 | } |
mbed_official | 133:d4dda5c437f0 | 1914 | } |
mbed_official | 133:d4dda5c437f0 | 1915 | |
mbed_official | 133:d4dda5c437f0 | 1916 | /** |
mbed_official | 133:d4dda5c437f0 | 1917 | * @brief Read an amount of data in no-blocking mode with Interrupt from a specific memory address |
mbed_official | 242:7074e42da0b2 | 1918 | * @param hi2c: pointer to a I2C_HandleTypeDef structure that contains |
mbed_official | 242:7074e42da0b2 | 1919 | * the configuration information for I2C module |
mbed_official | 133:d4dda5c437f0 | 1920 | * @param DevAddress: Target device address |
mbed_official | 133:d4dda5c437f0 | 1921 | * @param MemAddress: Internal memory address |
mbed_official | 133:d4dda5c437f0 | 1922 | * @param MemAddSize: Size of internal memory address |
mbed_official | 133:d4dda5c437f0 | 1923 | * @param pData: Pointer to data buffer |
mbed_official | 133:d4dda5c437f0 | 1924 | * @param Size: Amount of data to be sent |
mbed_official | 133:d4dda5c437f0 | 1925 | * @retval HAL status |
mbed_official | 133:d4dda5c437f0 | 1926 | */ |
mbed_official | 133:d4dda5c437f0 | 1927 | HAL_StatusTypeDef HAL_I2C_Mem_Read_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size) |
mbed_official | 133:d4dda5c437f0 | 1928 | { |
mbed_official | 133:d4dda5c437f0 | 1929 | /* Check the parameters */ |
mbed_official | 133:d4dda5c437f0 | 1930 | assert_param(IS_I2C_MEMADD_SIZE(MemAddSize)); |
mbed_official | 133:d4dda5c437f0 | 1931 | |
mbed_official | 133:d4dda5c437f0 | 1932 | if(hi2c->State == HAL_I2C_STATE_READY) |
mbed_official | 133:d4dda5c437f0 | 1933 | { |
mbed_official | 133:d4dda5c437f0 | 1934 | if((pData == NULL) || (Size == 0)) |
mbed_official | 133:d4dda5c437f0 | 1935 | { |
mbed_official | 133:d4dda5c437f0 | 1936 | return HAL_ERROR; |
mbed_official | 133:d4dda5c437f0 | 1937 | } |
mbed_official | 133:d4dda5c437f0 | 1938 | |
mbed_official | 133:d4dda5c437f0 | 1939 | if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) == SET) |
mbed_official | 133:d4dda5c437f0 | 1940 | { |
mbed_official | 133:d4dda5c437f0 | 1941 | return HAL_BUSY; |
mbed_official | 133:d4dda5c437f0 | 1942 | } |
mbed_official | 133:d4dda5c437f0 | 1943 | |
mbed_official | 133:d4dda5c437f0 | 1944 | /* Process Locked */ |
mbed_official | 133:d4dda5c437f0 | 1945 | __HAL_LOCK(hi2c); |
mbed_official | 133:d4dda5c437f0 | 1946 | |
mbed_official | 133:d4dda5c437f0 | 1947 | hi2c->State = HAL_I2C_STATE_MEM_BUSY_RX; |
mbed_official | 133:d4dda5c437f0 | 1948 | hi2c->ErrorCode = HAL_I2C_ERROR_NONE; |
mbed_official | 133:d4dda5c437f0 | 1949 | |
mbed_official | 133:d4dda5c437f0 | 1950 | hi2c->pBuffPtr = pData; |
mbed_official | 133:d4dda5c437f0 | 1951 | hi2c->XferSize = Size; |
mbed_official | 133:d4dda5c437f0 | 1952 | hi2c->XferCount = Size; |
mbed_official | 133:d4dda5c437f0 | 1953 | |
mbed_official | 133:d4dda5c437f0 | 1954 | /* Send Slave Address and Memory Address */ |
mbed_official | 133:d4dda5c437f0 | 1955 | if(I2C_RequestMemoryRead(hi2c, DevAddress, MemAddress, MemAddSize, I2C_TIMEOUT_FLAG) != HAL_OK) |
mbed_official | 133:d4dda5c437f0 | 1956 | { |
mbed_official | 133:d4dda5c437f0 | 1957 | if(hi2c->ErrorCode == HAL_I2C_ERROR_AF) |
mbed_official | 133:d4dda5c437f0 | 1958 | { |
mbed_official | 133:d4dda5c437f0 | 1959 | /* Process Unlocked */ |
mbed_official | 133:d4dda5c437f0 | 1960 | __HAL_UNLOCK(hi2c); |
mbed_official | 133:d4dda5c437f0 | 1961 | return HAL_ERROR; |
mbed_official | 133:d4dda5c437f0 | 1962 | } |
mbed_official | 133:d4dda5c437f0 | 1963 | else |
mbed_official | 133:d4dda5c437f0 | 1964 | { |
mbed_official | 133:d4dda5c437f0 | 1965 | /* Process Unlocked */ |
mbed_official | 133:d4dda5c437f0 | 1966 | __HAL_UNLOCK(hi2c); |
mbed_official | 133:d4dda5c437f0 | 1967 | return HAL_TIMEOUT; |
mbed_official | 133:d4dda5c437f0 | 1968 | } |
mbed_official | 133:d4dda5c437f0 | 1969 | } |
mbed_official | 133:d4dda5c437f0 | 1970 | |
mbed_official | 133:d4dda5c437f0 | 1971 | if(hi2c->XferCount == 1) |
mbed_official | 133:d4dda5c437f0 | 1972 | { |
mbed_official | 133:d4dda5c437f0 | 1973 | /* Disable Acknowledge */ |
mbed_official | 133:d4dda5c437f0 | 1974 | hi2c->Instance->CR1 &= ~I2C_CR1_ACK; |
mbed_official | 133:d4dda5c437f0 | 1975 | |
mbed_official | 133:d4dda5c437f0 | 1976 | /* Clear ADDR flag */ |
mbed_official | 133:d4dda5c437f0 | 1977 | __HAL_I2C_CLEAR_ADDRFLAG(hi2c); |
mbed_official | 133:d4dda5c437f0 | 1978 | |
mbed_official | 133:d4dda5c437f0 | 1979 | /* Generate Stop */ |
mbed_official | 133:d4dda5c437f0 | 1980 | hi2c->Instance->CR1 |= I2C_CR1_STOP; |
mbed_official | 133:d4dda5c437f0 | 1981 | } |
mbed_official | 133:d4dda5c437f0 | 1982 | else if(hi2c->XferCount == 2) |
mbed_official | 133:d4dda5c437f0 | 1983 | { |
mbed_official | 133:d4dda5c437f0 | 1984 | /* Disable Acknowledge */ |
mbed_official | 133:d4dda5c437f0 | 1985 | hi2c->Instance->CR1 &= ~I2C_CR1_ACK; |
mbed_official | 133:d4dda5c437f0 | 1986 | |
mbed_official | 133:d4dda5c437f0 | 1987 | /* Enable Pos */ |
mbed_official | 133:d4dda5c437f0 | 1988 | hi2c->Instance->CR1 |= I2C_CR1_POS; |
mbed_official | 133:d4dda5c437f0 | 1989 | |
mbed_official | 133:d4dda5c437f0 | 1990 | /* Clear ADDR flag */ |
mbed_official | 133:d4dda5c437f0 | 1991 | __HAL_I2C_CLEAR_ADDRFLAG(hi2c); |
mbed_official | 133:d4dda5c437f0 | 1992 | } |
mbed_official | 133:d4dda5c437f0 | 1993 | else |
mbed_official | 133:d4dda5c437f0 | 1994 | { |
mbed_official | 133:d4dda5c437f0 | 1995 | /* Enable Acknowledge */ |
mbed_official | 133:d4dda5c437f0 | 1996 | hi2c->Instance->CR1 |= I2C_CR1_ACK; |
mbed_official | 133:d4dda5c437f0 | 1997 | |
mbed_official | 133:d4dda5c437f0 | 1998 | /* Clear ADDR flag */ |
mbed_official | 133:d4dda5c437f0 | 1999 | __HAL_I2C_CLEAR_ADDRFLAG(hi2c); |
mbed_official | 133:d4dda5c437f0 | 2000 | } |
mbed_official | 133:d4dda5c437f0 | 2001 | |
mbed_official | 133:d4dda5c437f0 | 2002 | /* Process Unlocked */ |
mbed_official | 133:d4dda5c437f0 | 2003 | __HAL_UNLOCK(hi2c); |
mbed_official | 133:d4dda5c437f0 | 2004 | |
mbed_official | 133:d4dda5c437f0 | 2005 | /* Note : The I2C interrupts must be enabled after unlocking current process |
mbed_official | 133:d4dda5c437f0 | 2006 | to avoid the risk of I2C interrupt handle execution before current |
mbed_official | 133:d4dda5c437f0 | 2007 | process unlock */ |
mbed_official | 133:d4dda5c437f0 | 2008 | |
mbed_official | 133:d4dda5c437f0 | 2009 | /* Enable EVT, BUF and ERR interrupt */ |
mbed_official | 133:d4dda5c437f0 | 2010 | __HAL_I2C_ENABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_BUF | I2C_IT_ERR); |
mbed_official | 133:d4dda5c437f0 | 2011 | |
mbed_official | 133:d4dda5c437f0 | 2012 | return HAL_OK; |
mbed_official | 133:d4dda5c437f0 | 2013 | } |
mbed_official | 133:d4dda5c437f0 | 2014 | else |
mbed_official | 133:d4dda5c437f0 | 2015 | { |
mbed_official | 133:d4dda5c437f0 | 2016 | return HAL_BUSY; |
mbed_official | 133:d4dda5c437f0 | 2017 | } |
mbed_official | 133:d4dda5c437f0 | 2018 | } |
mbed_official | 133:d4dda5c437f0 | 2019 | /** |
mbed_official | 133:d4dda5c437f0 | 2020 | * @brief Write an amount of data in no-blocking mode with DMA to a specific memory address |
mbed_official | 242:7074e42da0b2 | 2021 | * @param hi2c: pointer to a I2C_HandleTypeDef structure that contains |
mbed_official | 242:7074e42da0b2 | 2022 | * the configuration information for I2C module |
mbed_official | 133:d4dda5c437f0 | 2023 | * @param DevAddress: Target device address |
mbed_official | 133:d4dda5c437f0 | 2024 | * @param MemAddress: Internal memory address |
mbed_official | 133:d4dda5c437f0 | 2025 | * @param MemAddSize: Size of internal memory address |
mbed_official | 133:d4dda5c437f0 | 2026 | * @param pData: Pointer to data buffer |
mbed_official | 133:d4dda5c437f0 | 2027 | * @param Size: Amount of data to be sent |
mbed_official | 133:d4dda5c437f0 | 2028 | * @retval HAL status |
mbed_official | 133:d4dda5c437f0 | 2029 | */ |
mbed_official | 133:d4dda5c437f0 | 2030 | HAL_StatusTypeDef HAL_I2C_Mem_Write_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size) |
mbed_official | 133:d4dda5c437f0 | 2031 | { |
mbed_official | 133:d4dda5c437f0 | 2032 | /* Check the parameters */ |
mbed_official | 133:d4dda5c437f0 | 2033 | assert_param(IS_I2C_MEMADD_SIZE(MemAddSize)); |
mbed_official | 133:d4dda5c437f0 | 2034 | |
mbed_official | 133:d4dda5c437f0 | 2035 | if(hi2c->State == HAL_I2C_STATE_READY) |
mbed_official | 133:d4dda5c437f0 | 2036 | { |
mbed_official | 133:d4dda5c437f0 | 2037 | if((pData == NULL) || (Size == 0)) |
mbed_official | 133:d4dda5c437f0 | 2038 | { |
mbed_official | 133:d4dda5c437f0 | 2039 | return HAL_ERROR; |
mbed_official | 133:d4dda5c437f0 | 2040 | } |
mbed_official | 133:d4dda5c437f0 | 2041 | |
mbed_official | 133:d4dda5c437f0 | 2042 | if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) == SET) |
mbed_official | 133:d4dda5c437f0 | 2043 | { |
mbed_official | 133:d4dda5c437f0 | 2044 | return HAL_BUSY; |
mbed_official | 133:d4dda5c437f0 | 2045 | } |
mbed_official | 133:d4dda5c437f0 | 2046 | |
mbed_official | 133:d4dda5c437f0 | 2047 | /* Process Locked */ |
mbed_official | 133:d4dda5c437f0 | 2048 | __HAL_LOCK(hi2c); |
mbed_official | 133:d4dda5c437f0 | 2049 | |
mbed_official | 133:d4dda5c437f0 | 2050 | hi2c->State = HAL_I2C_STATE_MEM_BUSY_TX; |
mbed_official | 133:d4dda5c437f0 | 2051 | hi2c->ErrorCode = HAL_I2C_ERROR_NONE; |
mbed_official | 133:d4dda5c437f0 | 2052 | |
mbed_official | 133:d4dda5c437f0 | 2053 | hi2c->pBuffPtr = pData; |
mbed_official | 133:d4dda5c437f0 | 2054 | hi2c->XferSize = Size; |
mbed_official | 133:d4dda5c437f0 | 2055 | hi2c->XferCount = Size; |
mbed_official | 133:d4dda5c437f0 | 2056 | |
mbed_official | 133:d4dda5c437f0 | 2057 | /* Set the I2C DMA transfert complete callback */ |
mbed_official | 133:d4dda5c437f0 | 2058 | hi2c->hdmatx->XferCpltCallback = I2C_DMAMemTransmitCplt; |
mbed_official | 133:d4dda5c437f0 | 2059 | |
mbed_official | 133:d4dda5c437f0 | 2060 | /* Set the DMA error callback */ |
mbed_official | 133:d4dda5c437f0 | 2061 | hi2c->hdmatx->XferErrorCallback = I2C_DMAError; |
mbed_official | 133:d4dda5c437f0 | 2062 | |
mbed_official | 133:d4dda5c437f0 | 2063 | /* Enable the DMA Stream */ |
mbed_official | 133:d4dda5c437f0 | 2064 | HAL_DMA_Start_IT(hi2c->hdmatx, (uint32_t)pData, (uint32_t)&hi2c->Instance->DR, Size); |
mbed_official | 133:d4dda5c437f0 | 2065 | |
mbed_official | 133:d4dda5c437f0 | 2066 | /* Send Slave Address and Memory Address */ |
mbed_official | 133:d4dda5c437f0 | 2067 | if(I2C_RequestMemoryWrite(hi2c, DevAddress, MemAddress, MemAddSize, I2C_TIMEOUT_FLAG) != HAL_OK) |
mbed_official | 133:d4dda5c437f0 | 2068 | { |
mbed_official | 133:d4dda5c437f0 | 2069 | if(hi2c->ErrorCode == HAL_I2C_ERROR_AF) |
mbed_official | 133:d4dda5c437f0 | 2070 | { |
mbed_official | 133:d4dda5c437f0 | 2071 | /* Process Unlocked */ |
mbed_official | 133:d4dda5c437f0 | 2072 | __HAL_UNLOCK(hi2c); |
mbed_official | 133:d4dda5c437f0 | 2073 | return HAL_ERROR; |
mbed_official | 133:d4dda5c437f0 | 2074 | } |
mbed_official | 133:d4dda5c437f0 | 2075 | else |
mbed_official | 133:d4dda5c437f0 | 2076 | { |
mbed_official | 133:d4dda5c437f0 | 2077 | /* Process Unlocked */ |
mbed_official | 133:d4dda5c437f0 | 2078 | __HAL_UNLOCK(hi2c); |
mbed_official | 133:d4dda5c437f0 | 2079 | return HAL_TIMEOUT; |
mbed_official | 133:d4dda5c437f0 | 2080 | } |
mbed_official | 133:d4dda5c437f0 | 2081 | } |
mbed_official | 133:d4dda5c437f0 | 2082 | |
mbed_official | 133:d4dda5c437f0 | 2083 | /* Enable DMA Request */ |
mbed_official | 133:d4dda5c437f0 | 2084 | hi2c->Instance->CR2 |= I2C_CR2_DMAEN; |
mbed_official | 133:d4dda5c437f0 | 2085 | |
mbed_official | 133:d4dda5c437f0 | 2086 | /* Process Unlocked */ |
mbed_official | 133:d4dda5c437f0 | 2087 | __HAL_UNLOCK(hi2c); |
mbed_official | 133:d4dda5c437f0 | 2088 | |
mbed_official | 133:d4dda5c437f0 | 2089 | return HAL_OK; |
mbed_official | 133:d4dda5c437f0 | 2090 | } |
mbed_official | 133:d4dda5c437f0 | 2091 | else |
mbed_official | 133:d4dda5c437f0 | 2092 | { |
mbed_official | 133:d4dda5c437f0 | 2093 | return HAL_BUSY; |
mbed_official | 133:d4dda5c437f0 | 2094 | } |
mbed_official | 133:d4dda5c437f0 | 2095 | } |
mbed_official | 133:d4dda5c437f0 | 2096 | |
mbed_official | 133:d4dda5c437f0 | 2097 | /** |
mbed_official | 133:d4dda5c437f0 | 2098 | * @brief Reads an amount of data in no-blocking mode with DMA from a specific memory address. |
mbed_official | 242:7074e42da0b2 | 2099 | * @param hi2c: pointer to a I2C_HandleTypeDef structure that contains |
mbed_official | 242:7074e42da0b2 | 2100 | * the configuration information for I2C module |
mbed_official | 133:d4dda5c437f0 | 2101 | * @param DevAddress: Target device address |
mbed_official | 133:d4dda5c437f0 | 2102 | * @param MemAddress: Internal memory address |
mbed_official | 133:d4dda5c437f0 | 2103 | * @param MemAddSize: Size of internal memory address |
mbed_official | 133:d4dda5c437f0 | 2104 | * @param pData: Pointer to data buffer |
mbed_official | 133:d4dda5c437f0 | 2105 | * @param Size: Amount of data to be read |
mbed_official | 133:d4dda5c437f0 | 2106 | * @retval HAL status |
mbed_official | 133:d4dda5c437f0 | 2107 | */ |
mbed_official | 133:d4dda5c437f0 | 2108 | HAL_StatusTypeDef HAL_I2C_Mem_Read_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size) |
mbed_official | 133:d4dda5c437f0 | 2109 | { |
mbed_official | 133:d4dda5c437f0 | 2110 | /* Check the parameters */ |
mbed_official | 133:d4dda5c437f0 | 2111 | assert_param(IS_I2C_MEMADD_SIZE(MemAddSize)); |
mbed_official | 133:d4dda5c437f0 | 2112 | |
mbed_official | 133:d4dda5c437f0 | 2113 | if(hi2c->State == HAL_I2C_STATE_READY) |
mbed_official | 133:d4dda5c437f0 | 2114 | { |
mbed_official | 133:d4dda5c437f0 | 2115 | if((pData == NULL) || (Size == 0)) |
mbed_official | 133:d4dda5c437f0 | 2116 | { |
mbed_official | 133:d4dda5c437f0 | 2117 | return HAL_ERROR; |
mbed_official | 133:d4dda5c437f0 | 2118 | } |
mbed_official | 133:d4dda5c437f0 | 2119 | |
mbed_official | 133:d4dda5c437f0 | 2120 | if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) == SET) |
mbed_official | 133:d4dda5c437f0 | 2121 | { |
mbed_official | 133:d4dda5c437f0 | 2122 | return HAL_BUSY; |
mbed_official | 133:d4dda5c437f0 | 2123 | } |
mbed_official | 133:d4dda5c437f0 | 2124 | |
mbed_official | 133:d4dda5c437f0 | 2125 | /* Process Locked */ |
mbed_official | 133:d4dda5c437f0 | 2126 | __HAL_LOCK(hi2c); |
mbed_official | 133:d4dda5c437f0 | 2127 | |
mbed_official | 133:d4dda5c437f0 | 2128 | hi2c->State = HAL_I2C_STATE_MEM_BUSY_RX; |
mbed_official | 133:d4dda5c437f0 | 2129 | hi2c->ErrorCode = HAL_I2C_ERROR_NONE; |
mbed_official | 133:d4dda5c437f0 | 2130 | |
mbed_official | 133:d4dda5c437f0 | 2131 | hi2c->pBuffPtr = pData; |
mbed_official | 133:d4dda5c437f0 | 2132 | hi2c->XferSize = Size; |
mbed_official | 133:d4dda5c437f0 | 2133 | hi2c->XferCount = Size; |
mbed_official | 133:d4dda5c437f0 | 2134 | |
mbed_official | 133:d4dda5c437f0 | 2135 | /* Set the I2C DMA transfert complete callback */ |
mbed_official | 133:d4dda5c437f0 | 2136 | hi2c->hdmarx->XferCpltCallback = I2C_DMAMemReceiveCplt; |
mbed_official | 133:d4dda5c437f0 | 2137 | |
mbed_official | 133:d4dda5c437f0 | 2138 | /* Set the DMA error callback */ |
mbed_official | 133:d4dda5c437f0 | 2139 | hi2c->hdmarx->XferErrorCallback = I2C_DMAError; |
mbed_official | 133:d4dda5c437f0 | 2140 | |
mbed_official | 133:d4dda5c437f0 | 2141 | /* Enable the DMA Stream */ |
mbed_official | 133:d4dda5c437f0 | 2142 | HAL_DMA_Start_IT(hi2c->hdmarx, (uint32_t)&hi2c->Instance->DR, (uint32_t)pData, Size); |
mbed_official | 133:d4dda5c437f0 | 2143 | |
mbed_official | 133:d4dda5c437f0 | 2144 | /* Send Slave Address and Memory Address */ |
mbed_official | 133:d4dda5c437f0 | 2145 | if(I2C_RequestMemoryRead(hi2c, DevAddress, MemAddress, MemAddSize, I2C_TIMEOUT_FLAG) != HAL_OK) |
mbed_official | 133:d4dda5c437f0 | 2146 | { |
mbed_official | 133:d4dda5c437f0 | 2147 | if(hi2c->ErrorCode == HAL_I2C_ERROR_AF) |
mbed_official | 133:d4dda5c437f0 | 2148 | { |
mbed_official | 133:d4dda5c437f0 | 2149 | /* Process Unlocked */ |
mbed_official | 133:d4dda5c437f0 | 2150 | __HAL_UNLOCK(hi2c); |
mbed_official | 133:d4dda5c437f0 | 2151 | return HAL_ERROR; |
mbed_official | 133:d4dda5c437f0 | 2152 | } |
mbed_official | 133:d4dda5c437f0 | 2153 | else |
mbed_official | 133:d4dda5c437f0 | 2154 | { |
mbed_official | 133:d4dda5c437f0 | 2155 | /* Process Unlocked */ |
mbed_official | 133:d4dda5c437f0 | 2156 | __HAL_UNLOCK(hi2c); |
mbed_official | 133:d4dda5c437f0 | 2157 | return HAL_TIMEOUT; |
mbed_official | 133:d4dda5c437f0 | 2158 | } |
mbed_official | 133:d4dda5c437f0 | 2159 | } |
mbed_official | 133:d4dda5c437f0 | 2160 | |
mbed_official | 133:d4dda5c437f0 | 2161 | if(Size == 1) |
mbed_official | 133:d4dda5c437f0 | 2162 | { |
mbed_official | 133:d4dda5c437f0 | 2163 | /* Disable Acknowledge */ |
mbed_official | 133:d4dda5c437f0 | 2164 | hi2c->Instance->CR1 &= ~I2C_CR1_ACK; |
mbed_official | 133:d4dda5c437f0 | 2165 | } |
mbed_official | 133:d4dda5c437f0 | 2166 | else |
mbed_official | 133:d4dda5c437f0 | 2167 | { |
mbed_official | 133:d4dda5c437f0 | 2168 | /* Enable Last DMA bit */ |
mbed_official | 133:d4dda5c437f0 | 2169 | hi2c->Instance->CR2 |= I2C_CR2_LAST; |
mbed_official | 133:d4dda5c437f0 | 2170 | } |
mbed_official | 133:d4dda5c437f0 | 2171 | |
mbed_official | 133:d4dda5c437f0 | 2172 | /* Enable DMA Request */ |
mbed_official | 133:d4dda5c437f0 | 2173 | hi2c->Instance->CR2 |= I2C_CR2_DMAEN; |
mbed_official | 133:d4dda5c437f0 | 2174 | |
mbed_official | 133:d4dda5c437f0 | 2175 | /* Clear ADDR flag */ |
mbed_official | 133:d4dda5c437f0 | 2176 | __HAL_I2C_CLEAR_ADDRFLAG(hi2c); |
mbed_official | 133:d4dda5c437f0 | 2177 | |
mbed_official | 133:d4dda5c437f0 | 2178 | /* Process Unlocked */ |
mbed_official | 133:d4dda5c437f0 | 2179 | __HAL_UNLOCK(hi2c); |
mbed_official | 133:d4dda5c437f0 | 2180 | |
mbed_official | 133:d4dda5c437f0 | 2181 | return HAL_OK; |
mbed_official | 133:d4dda5c437f0 | 2182 | } |
mbed_official | 133:d4dda5c437f0 | 2183 | else |
mbed_official | 133:d4dda5c437f0 | 2184 | { |
mbed_official | 133:d4dda5c437f0 | 2185 | return HAL_BUSY; |
mbed_official | 133:d4dda5c437f0 | 2186 | } |
mbed_official | 133:d4dda5c437f0 | 2187 | } |
mbed_official | 133:d4dda5c437f0 | 2188 | |
mbed_official | 133:d4dda5c437f0 | 2189 | /** |
mbed_official | 133:d4dda5c437f0 | 2190 | * @brief Checks if target device is ready for communication. |
mbed_official | 133:d4dda5c437f0 | 2191 | * @note This function is used with Memory devices |
mbed_official | 242:7074e42da0b2 | 2192 | * @param hi2c: pointer to a I2C_HandleTypeDef structure that contains |
mbed_official | 242:7074e42da0b2 | 2193 | * the configuration information for I2C module |
mbed_official | 133:d4dda5c437f0 | 2194 | * @param DevAddress: Target device address |
mbed_official | 133:d4dda5c437f0 | 2195 | * @param Trials: Number of trials |
mbed_official | 133:d4dda5c437f0 | 2196 | * @param Timeout: Timeout duration |
mbed_official | 133:d4dda5c437f0 | 2197 | * @retval HAL status |
mbed_official | 133:d4dda5c437f0 | 2198 | */ |
mbed_official | 133:d4dda5c437f0 | 2199 | HAL_StatusTypeDef HAL_I2C_IsDeviceReady(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint32_t Trials, uint32_t Timeout) |
mbed_official | 133:d4dda5c437f0 | 2200 | { |
mbed_official | 133:d4dda5c437f0 | 2201 | uint32_t timeout = 0, tmp1 = 0, tmp2 = 0, tmp3 = 0, I2C_Trials = 1; |
mbed_official | 133:d4dda5c437f0 | 2202 | |
mbed_official | 133:d4dda5c437f0 | 2203 | if(hi2c->State == HAL_I2C_STATE_READY) |
mbed_official | 133:d4dda5c437f0 | 2204 | { |
mbed_official | 133:d4dda5c437f0 | 2205 | if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) == SET) |
mbed_official | 133:d4dda5c437f0 | 2206 | { |
mbed_official | 133:d4dda5c437f0 | 2207 | return HAL_BUSY; |
mbed_official | 133:d4dda5c437f0 | 2208 | } |
mbed_official | 133:d4dda5c437f0 | 2209 | |
mbed_official | 133:d4dda5c437f0 | 2210 | /* Process Locked */ |
mbed_official | 133:d4dda5c437f0 | 2211 | __HAL_LOCK(hi2c); |
mbed_official | 133:d4dda5c437f0 | 2212 | |
mbed_official | 133:d4dda5c437f0 | 2213 | hi2c->State = HAL_I2C_STATE_BUSY; |
mbed_official | 133:d4dda5c437f0 | 2214 | hi2c->ErrorCode = HAL_I2C_ERROR_NONE; |
mbed_official | 133:d4dda5c437f0 | 2215 | |
mbed_official | 133:d4dda5c437f0 | 2216 | do |
mbed_official | 133:d4dda5c437f0 | 2217 | { |
mbed_official | 133:d4dda5c437f0 | 2218 | /* Generate Start */ |
mbed_official | 133:d4dda5c437f0 | 2219 | hi2c->Instance->CR1 |= I2C_CR1_START; |
mbed_official | 133:d4dda5c437f0 | 2220 | |
mbed_official | 133:d4dda5c437f0 | 2221 | /* Wait until SB flag is set */ |
mbed_official | 133:d4dda5c437f0 | 2222 | if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_SB, RESET, Timeout) != HAL_OK) |
mbed_official | 133:d4dda5c437f0 | 2223 | { |
mbed_official | 133:d4dda5c437f0 | 2224 | return HAL_TIMEOUT; |
mbed_official | 133:d4dda5c437f0 | 2225 | } |
mbed_official | 133:d4dda5c437f0 | 2226 | |
mbed_official | 133:d4dda5c437f0 | 2227 | /* Send slave address */ |
mbed_official | 133:d4dda5c437f0 | 2228 | hi2c->Instance->DR = __HAL_I2C_7BIT_ADD_WRITE(DevAddress); |
mbed_official | 133:d4dda5c437f0 | 2229 | |
mbed_official | 133:d4dda5c437f0 | 2230 | /* Wait until ADDR or AF flag are set */ |
mbed_official | 133:d4dda5c437f0 | 2231 | timeout = HAL_GetTick() + Timeout; |
mbed_official | 133:d4dda5c437f0 | 2232 | |
mbed_official | 133:d4dda5c437f0 | 2233 | tmp1 = __HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_ADDR); |
mbed_official | 133:d4dda5c437f0 | 2234 | tmp2 = __HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_AF); |
mbed_official | 133:d4dda5c437f0 | 2235 | tmp3 = hi2c->State; |
mbed_official | 133:d4dda5c437f0 | 2236 | while((tmp1 == RESET) && (tmp2 == RESET) && (tmp3 != HAL_I2C_STATE_TIMEOUT)) |
mbed_official | 133:d4dda5c437f0 | 2237 | { |
mbed_official | 133:d4dda5c437f0 | 2238 | if(HAL_GetTick() >= timeout) |
mbed_official | 133:d4dda5c437f0 | 2239 | { |
mbed_official | 133:d4dda5c437f0 | 2240 | hi2c->State = HAL_I2C_STATE_TIMEOUT; |
mbed_official | 133:d4dda5c437f0 | 2241 | } |
mbed_official | 133:d4dda5c437f0 | 2242 | tmp1 = __HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_ADDR); |
mbed_official | 133:d4dda5c437f0 | 2243 | tmp2 = __HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_AF); |
mbed_official | 133:d4dda5c437f0 | 2244 | tmp3 = hi2c->State; |
mbed_official | 133:d4dda5c437f0 | 2245 | } |
mbed_official | 133:d4dda5c437f0 | 2246 | |
mbed_official | 133:d4dda5c437f0 | 2247 | hi2c->State = HAL_I2C_STATE_READY; |
mbed_official | 133:d4dda5c437f0 | 2248 | |
mbed_official | 133:d4dda5c437f0 | 2249 | /* Check if the ADDR flag has been set */ |
mbed_official | 133:d4dda5c437f0 | 2250 | if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_ADDR) == SET) |
mbed_official | 133:d4dda5c437f0 | 2251 | { |
mbed_official | 133:d4dda5c437f0 | 2252 | /* Generate Stop */ |
mbed_official | 133:d4dda5c437f0 | 2253 | hi2c->Instance->CR1 |= I2C_CR1_STOP; |
mbed_official | 133:d4dda5c437f0 | 2254 | |
mbed_official | 133:d4dda5c437f0 | 2255 | /* Clear ADDR Flag */ |
mbed_official | 133:d4dda5c437f0 | 2256 | __HAL_I2C_CLEAR_ADDRFLAG(hi2c); |
mbed_official | 133:d4dda5c437f0 | 2257 | |
mbed_official | 133:d4dda5c437f0 | 2258 | /* Wait until BUSY flag is reset */ |
mbed_official | 133:d4dda5c437f0 | 2259 | if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, Timeout) != HAL_OK) |
mbed_official | 133:d4dda5c437f0 | 2260 | { |
mbed_official | 133:d4dda5c437f0 | 2261 | return HAL_TIMEOUT; |
mbed_official | 133:d4dda5c437f0 | 2262 | } |
mbed_official | 133:d4dda5c437f0 | 2263 | |
mbed_official | 133:d4dda5c437f0 | 2264 | hi2c->State = HAL_I2C_STATE_READY; |
mbed_official | 133:d4dda5c437f0 | 2265 | |
mbed_official | 133:d4dda5c437f0 | 2266 | /* Process Unlocked */ |
mbed_official | 133:d4dda5c437f0 | 2267 | __HAL_UNLOCK(hi2c); |
mbed_official | 133:d4dda5c437f0 | 2268 | |
mbed_official | 133:d4dda5c437f0 | 2269 | return HAL_OK; |
mbed_official | 133:d4dda5c437f0 | 2270 | } |
mbed_official | 133:d4dda5c437f0 | 2271 | else |
mbed_official | 133:d4dda5c437f0 | 2272 | { |
mbed_official | 133:d4dda5c437f0 | 2273 | /* Generate Stop */ |
mbed_official | 133:d4dda5c437f0 | 2274 | hi2c->Instance->CR1 |= I2C_CR1_STOP; |
mbed_official | 133:d4dda5c437f0 | 2275 | |
mbed_official | 133:d4dda5c437f0 | 2276 | /* Clear AF Flag */ |
mbed_official | 133:d4dda5c437f0 | 2277 | __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF); |
mbed_official | 133:d4dda5c437f0 | 2278 | |
mbed_official | 133:d4dda5c437f0 | 2279 | /* Wait until BUSY flag is reset */ |
mbed_official | 133:d4dda5c437f0 | 2280 | if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, Timeout) != HAL_OK) |
mbed_official | 133:d4dda5c437f0 | 2281 | { |
mbed_official | 133:d4dda5c437f0 | 2282 | return HAL_TIMEOUT; |
mbed_official | 133:d4dda5c437f0 | 2283 | } |
mbed_official | 133:d4dda5c437f0 | 2284 | } |
mbed_official | 133:d4dda5c437f0 | 2285 | }while(I2C_Trials++ < Trials); |
mbed_official | 133:d4dda5c437f0 | 2286 | |
mbed_official | 133:d4dda5c437f0 | 2287 | hi2c->State = HAL_I2C_STATE_READY; |
mbed_official | 133:d4dda5c437f0 | 2288 | |
mbed_official | 133:d4dda5c437f0 | 2289 | /* Process Unlocked */ |
mbed_official | 133:d4dda5c437f0 | 2290 | __HAL_UNLOCK(hi2c); |
mbed_official | 133:d4dda5c437f0 | 2291 | |
mbed_official | 133:d4dda5c437f0 | 2292 | return HAL_ERROR; |
mbed_official | 133:d4dda5c437f0 | 2293 | } |
mbed_official | 133:d4dda5c437f0 | 2294 | else |
mbed_official | 133:d4dda5c437f0 | 2295 | { |
mbed_official | 133:d4dda5c437f0 | 2296 | return HAL_BUSY; |
mbed_official | 133:d4dda5c437f0 | 2297 | } |
mbed_official | 133:d4dda5c437f0 | 2298 | } |
mbed_official | 133:d4dda5c437f0 | 2299 | |
mbed_official | 133:d4dda5c437f0 | 2300 | /** |
mbed_official | 133:d4dda5c437f0 | 2301 | * @brief This function handles I2C event interrupt request. |
mbed_official | 242:7074e42da0b2 | 2302 | * @param hi2c: pointer to a I2C_HandleTypeDef structure that contains |
mbed_official | 242:7074e42da0b2 | 2303 | * the configuration information for I2C module |
mbed_official | 133:d4dda5c437f0 | 2304 | * @retval HAL status |
mbed_official | 133:d4dda5c437f0 | 2305 | */ |
mbed_official | 133:d4dda5c437f0 | 2306 | void HAL_I2C_EV_IRQHandler(I2C_HandleTypeDef *hi2c) |
mbed_official | 133:d4dda5c437f0 | 2307 | { |
mbed_official | 133:d4dda5c437f0 | 2308 | uint32_t tmp1 = 0, tmp2 = 0, tmp3 = 0, tmp4 = 0; |
mbed_official | 133:d4dda5c437f0 | 2309 | /* Master mode selected */ |
mbed_official | 133:d4dda5c437f0 | 2310 | if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_MSL) == SET) |
mbed_official | 133:d4dda5c437f0 | 2311 | { |
mbed_official | 133:d4dda5c437f0 | 2312 | /* I2C in mode Transmitter -----------------------------------------------*/ |
mbed_official | 133:d4dda5c437f0 | 2313 | if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_TRA) == SET) |
mbed_official | 133:d4dda5c437f0 | 2314 | { |
mbed_official | 133:d4dda5c437f0 | 2315 | tmp1 = __HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_TXE); |
mbed_official | 133:d4dda5c437f0 | 2316 | tmp2 = __HAL_I2C_GET_IT_SOURCE(hi2c, I2C_IT_BUF); |
mbed_official | 133:d4dda5c437f0 | 2317 | tmp3 = __HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BTF); |
mbed_official | 133:d4dda5c437f0 | 2318 | tmp4 = __HAL_I2C_GET_IT_SOURCE(hi2c, I2C_IT_EVT); |
mbed_official | 133:d4dda5c437f0 | 2319 | /* TXE set and BTF reset -----------------------------------------------*/ |
mbed_official | 133:d4dda5c437f0 | 2320 | if((tmp1 == SET) && (tmp2 == SET) && (tmp3 == RESET)) |
mbed_official | 133:d4dda5c437f0 | 2321 | { |
mbed_official | 133:d4dda5c437f0 | 2322 | I2C_MasterTransmit_TXE(hi2c); |
mbed_official | 133:d4dda5c437f0 | 2323 | } |
mbed_official | 133:d4dda5c437f0 | 2324 | /* BTF set -------------------------------------------------------------*/ |
mbed_official | 133:d4dda5c437f0 | 2325 | else if((tmp3 == SET) && (tmp4 == SET)) |
mbed_official | 133:d4dda5c437f0 | 2326 | { |
mbed_official | 133:d4dda5c437f0 | 2327 | I2C_MasterTransmit_BTF(hi2c); |
mbed_official | 133:d4dda5c437f0 | 2328 | } |
mbed_official | 133:d4dda5c437f0 | 2329 | } |
mbed_official | 133:d4dda5c437f0 | 2330 | /* I2C in mode Receiver --------------------------------------------------*/ |
mbed_official | 133:d4dda5c437f0 | 2331 | else |
mbed_official | 133:d4dda5c437f0 | 2332 | { |
mbed_official | 133:d4dda5c437f0 | 2333 | tmp1 = __HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_RXNE); |
mbed_official | 133:d4dda5c437f0 | 2334 | tmp2 = __HAL_I2C_GET_IT_SOURCE(hi2c, I2C_IT_BUF); |
mbed_official | 133:d4dda5c437f0 | 2335 | tmp3 = __HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BTF); |
mbed_official | 133:d4dda5c437f0 | 2336 | tmp4 = __HAL_I2C_GET_IT_SOURCE(hi2c, I2C_IT_EVT); |
mbed_official | 133:d4dda5c437f0 | 2337 | /* RXNE set and BTF reset -----------------------------------------------*/ |
mbed_official | 133:d4dda5c437f0 | 2338 | if((tmp1 == SET) && (tmp2 == SET) && (tmp3 == RESET)) |
mbed_official | 133:d4dda5c437f0 | 2339 | { |
mbed_official | 133:d4dda5c437f0 | 2340 | I2C_MasterReceive_RXNE(hi2c); |
mbed_official | 133:d4dda5c437f0 | 2341 | } |
mbed_official | 133:d4dda5c437f0 | 2342 | /* BTF set -------------------------------------------------------------*/ |
mbed_official | 133:d4dda5c437f0 | 2343 | else if((tmp3 == SET) && (tmp4 == SET)) |
mbed_official | 133:d4dda5c437f0 | 2344 | { |
mbed_official | 133:d4dda5c437f0 | 2345 | I2C_MasterReceive_BTF(hi2c); |
mbed_official | 133:d4dda5c437f0 | 2346 | } |
mbed_official | 133:d4dda5c437f0 | 2347 | } |
mbed_official | 133:d4dda5c437f0 | 2348 | } |
mbed_official | 133:d4dda5c437f0 | 2349 | /* Slave mode selected */ |
mbed_official | 133:d4dda5c437f0 | 2350 | else |
mbed_official | 133:d4dda5c437f0 | 2351 | { |
mbed_official | 133:d4dda5c437f0 | 2352 | tmp1 = __HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_ADDR); |
mbed_official | 133:d4dda5c437f0 | 2353 | tmp2 = __HAL_I2C_GET_IT_SOURCE(hi2c, (I2C_IT_EVT)); |
mbed_official | 133:d4dda5c437f0 | 2354 | tmp3 = __HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_STOPF); |
mbed_official | 133:d4dda5c437f0 | 2355 | tmp4 = __HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_TRA); |
mbed_official | 133:d4dda5c437f0 | 2356 | /* ADDR set --------------------------------------------------------------*/ |
mbed_official | 133:d4dda5c437f0 | 2357 | if((tmp1 == SET) && (tmp2 == SET)) |
mbed_official | 133:d4dda5c437f0 | 2358 | { |
mbed_official | 133:d4dda5c437f0 | 2359 | I2C_Slave_ADDR(hi2c); |
mbed_official | 133:d4dda5c437f0 | 2360 | } |
mbed_official | 133:d4dda5c437f0 | 2361 | /* STOPF set --------------------------------------------------------------*/ |
mbed_official | 133:d4dda5c437f0 | 2362 | else if((tmp3 == SET) && (tmp2 == SET)) |
mbed_official | 133:d4dda5c437f0 | 2363 | { |
mbed_official | 133:d4dda5c437f0 | 2364 | I2C_Slave_STOPF(hi2c); |
mbed_official | 133:d4dda5c437f0 | 2365 | } |
mbed_official | 133:d4dda5c437f0 | 2366 | /* I2C in mode Transmitter -----------------------------------------------*/ |
mbed_official | 133:d4dda5c437f0 | 2367 | else if(tmp4 == SET) |
mbed_official | 133:d4dda5c437f0 | 2368 | { |
mbed_official | 133:d4dda5c437f0 | 2369 | tmp1 = __HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_TXE); |
mbed_official | 133:d4dda5c437f0 | 2370 | tmp2 = __HAL_I2C_GET_IT_SOURCE(hi2c, I2C_IT_BUF); |
mbed_official | 133:d4dda5c437f0 | 2371 | tmp3 = __HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BTF); |
mbed_official | 133:d4dda5c437f0 | 2372 | tmp4 = __HAL_I2C_GET_IT_SOURCE(hi2c, I2C_IT_EVT); |
mbed_official | 133:d4dda5c437f0 | 2373 | /* TXE set and BTF reset -----------------------------------------------*/ |
mbed_official | 133:d4dda5c437f0 | 2374 | if((tmp1 == SET) && (tmp2 == SET) && (tmp3 == RESET)) |
mbed_official | 133:d4dda5c437f0 | 2375 | { |
mbed_official | 133:d4dda5c437f0 | 2376 | I2C_SlaveTransmit_TXE(hi2c); |
mbed_official | 133:d4dda5c437f0 | 2377 | } |
mbed_official | 133:d4dda5c437f0 | 2378 | /* BTF set -------------------------------------------------------------*/ |
mbed_official | 133:d4dda5c437f0 | 2379 | else if((tmp3 == SET) && (tmp4 == SET)) |
mbed_official | 133:d4dda5c437f0 | 2380 | { |
mbed_official | 133:d4dda5c437f0 | 2381 | I2C_SlaveTransmit_BTF(hi2c); |
mbed_official | 133:d4dda5c437f0 | 2382 | } |
mbed_official | 133:d4dda5c437f0 | 2383 | } |
mbed_official | 133:d4dda5c437f0 | 2384 | /* I2C in mode Receiver --------------------------------------------------*/ |
mbed_official | 133:d4dda5c437f0 | 2385 | else |
mbed_official | 133:d4dda5c437f0 | 2386 | { |
mbed_official | 133:d4dda5c437f0 | 2387 | tmp1 = __HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_RXNE); |
mbed_official | 133:d4dda5c437f0 | 2388 | tmp2 = __HAL_I2C_GET_IT_SOURCE(hi2c, I2C_IT_BUF); |
mbed_official | 133:d4dda5c437f0 | 2389 | tmp3 = __HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BTF); |
mbed_official | 133:d4dda5c437f0 | 2390 | tmp4 = __HAL_I2C_GET_IT_SOURCE(hi2c, I2C_IT_EVT); |
mbed_official | 133:d4dda5c437f0 | 2391 | /* RXNE set and BTF reset ----------------------------------------------*/ |
mbed_official | 133:d4dda5c437f0 | 2392 | if((tmp1 == SET) && (tmp2 == SET) && (tmp3 == RESET)) |
mbed_official | 133:d4dda5c437f0 | 2393 | { |
mbed_official | 133:d4dda5c437f0 | 2394 | I2C_SlaveReceive_RXNE(hi2c); |
mbed_official | 133:d4dda5c437f0 | 2395 | } |
mbed_official | 133:d4dda5c437f0 | 2396 | /* BTF set -------------------------------------------------------------*/ |
mbed_official | 133:d4dda5c437f0 | 2397 | else if((tmp3 == SET) && (tmp4 == SET)) |
mbed_official | 133:d4dda5c437f0 | 2398 | { |
mbed_official | 133:d4dda5c437f0 | 2399 | I2C_SlaveReceive_BTF(hi2c); |
mbed_official | 133:d4dda5c437f0 | 2400 | } |
mbed_official | 133:d4dda5c437f0 | 2401 | } |
mbed_official | 133:d4dda5c437f0 | 2402 | } |
mbed_official | 133:d4dda5c437f0 | 2403 | } |
mbed_official | 133:d4dda5c437f0 | 2404 | |
mbed_official | 133:d4dda5c437f0 | 2405 | /** |
mbed_official | 133:d4dda5c437f0 | 2406 | * @brief This function handles I2C error interrupt request. |
mbed_official | 242:7074e42da0b2 | 2407 | * @param hi2c: pointer to a I2C_HandleTypeDef structure that contains |
mbed_official | 242:7074e42da0b2 | 2408 | * the configuration information for I2C module |
mbed_official | 133:d4dda5c437f0 | 2409 | * @retval HAL status |
mbed_official | 133:d4dda5c437f0 | 2410 | */ |
mbed_official | 133:d4dda5c437f0 | 2411 | void HAL_I2C_ER_IRQHandler(I2C_HandleTypeDef *hi2c) |
mbed_official | 133:d4dda5c437f0 | 2412 | { |
mbed_official | 133:d4dda5c437f0 | 2413 | uint32_t tmp1 = 0, tmp2 = 0, tmp3 = 0; |
mbed_official | 133:d4dda5c437f0 | 2414 | |
mbed_official | 133:d4dda5c437f0 | 2415 | tmp1 = __HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BERR); |
mbed_official | 133:d4dda5c437f0 | 2416 | tmp2 = __HAL_I2C_GET_IT_SOURCE(hi2c, I2C_IT_ERR); |
mbed_official | 133:d4dda5c437f0 | 2417 | /* I2C Bus error interrupt occurred ----------------------------------------*/ |
mbed_official | 133:d4dda5c437f0 | 2418 | if((tmp1 == SET) && (tmp2 == SET)) |
mbed_official | 133:d4dda5c437f0 | 2419 | { |
mbed_official | 133:d4dda5c437f0 | 2420 | hi2c->ErrorCode |= HAL_I2C_ERROR_BERR; |
mbed_official | 133:d4dda5c437f0 | 2421 | |
mbed_official | 133:d4dda5c437f0 | 2422 | /* Clear BERR flag */ |
mbed_official | 133:d4dda5c437f0 | 2423 | __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_BERR); |
mbed_official | 133:d4dda5c437f0 | 2424 | } |
mbed_official | 133:d4dda5c437f0 | 2425 | |
mbed_official | 133:d4dda5c437f0 | 2426 | tmp1 = __HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_ARLO); |
mbed_official | 133:d4dda5c437f0 | 2427 | tmp2 = __HAL_I2C_GET_IT_SOURCE(hi2c, I2C_IT_ERR); |
mbed_official | 133:d4dda5c437f0 | 2428 | /* I2C Arbitration Loss error interrupt occurred ---------------------------*/ |
mbed_official | 133:d4dda5c437f0 | 2429 | if((tmp1 == SET) && (tmp2 == SET)) |
mbed_official | 133:d4dda5c437f0 | 2430 | { |
mbed_official | 133:d4dda5c437f0 | 2431 | hi2c->ErrorCode |= HAL_I2C_ERROR_ARLO; |
mbed_official | 133:d4dda5c437f0 | 2432 | |
mbed_official | 133:d4dda5c437f0 | 2433 | /* Clear ARLO flag */ |
mbed_official | 133:d4dda5c437f0 | 2434 | __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_ARLO); |
mbed_official | 133:d4dda5c437f0 | 2435 | } |
mbed_official | 133:d4dda5c437f0 | 2436 | |
mbed_official | 133:d4dda5c437f0 | 2437 | tmp1 = __HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_AF); |
mbed_official | 133:d4dda5c437f0 | 2438 | tmp2 = __HAL_I2C_GET_IT_SOURCE(hi2c, I2C_IT_ERR); |
mbed_official | 133:d4dda5c437f0 | 2439 | /* I2C Acknowledge failure error interrupt occurred ------------------------*/ |
mbed_official | 133:d4dda5c437f0 | 2440 | if((tmp1 == SET) && (tmp2 == SET)) |
mbed_official | 133:d4dda5c437f0 | 2441 | { |
mbed_official | 133:d4dda5c437f0 | 2442 | tmp1 = __HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_MSL); |
mbed_official | 133:d4dda5c437f0 | 2443 | tmp2 = hi2c->XferCount; |
mbed_official | 133:d4dda5c437f0 | 2444 | tmp3 = hi2c->State; |
mbed_official | 133:d4dda5c437f0 | 2445 | if((tmp1 == RESET) && (tmp2 == 0) && (tmp3 == HAL_I2C_STATE_BUSY_TX)) |
mbed_official | 133:d4dda5c437f0 | 2446 | { |
mbed_official | 133:d4dda5c437f0 | 2447 | I2C_Slave_AF(hi2c); |
mbed_official | 133:d4dda5c437f0 | 2448 | } |
mbed_official | 133:d4dda5c437f0 | 2449 | else |
mbed_official | 133:d4dda5c437f0 | 2450 | { |
mbed_official | 133:d4dda5c437f0 | 2451 | hi2c->ErrorCode |= HAL_I2C_ERROR_AF; |
mbed_official | 133:d4dda5c437f0 | 2452 | /* Clear AF flag */ |
mbed_official | 133:d4dda5c437f0 | 2453 | __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF); |
mbed_official | 133:d4dda5c437f0 | 2454 | } |
mbed_official | 133:d4dda5c437f0 | 2455 | } |
mbed_official | 133:d4dda5c437f0 | 2456 | |
mbed_official | 133:d4dda5c437f0 | 2457 | tmp1 = __HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_OVR); |
mbed_official | 133:d4dda5c437f0 | 2458 | tmp2 = __HAL_I2C_GET_IT_SOURCE(hi2c, I2C_IT_ERR); |
mbed_official | 133:d4dda5c437f0 | 2459 | /* I2C Over-Run/Under-Run interrupt occurred -------------------------------*/ |
mbed_official | 133:d4dda5c437f0 | 2460 | if((tmp1 == SET) && (tmp2 == SET)) |
mbed_official | 133:d4dda5c437f0 | 2461 | { |
mbed_official | 133:d4dda5c437f0 | 2462 | hi2c->ErrorCode |= HAL_I2C_ERROR_OVR; |
mbed_official | 133:d4dda5c437f0 | 2463 | /* Clear OVR flag */ |
mbed_official | 133:d4dda5c437f0 | 2464 | __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_OVR); |
mbed_official | 133:d4dda5c437f0 | 2465 | } |
mbed_official | 133:d4dda5c437f0 | 2466 | |
mbed_official | 133:d4dda5c437f0 | 2467 | if(hi2c->ErrorCode != HAL_I2C_ERROR_NONE) |
mbed_official | 133:d4dda5c437f0 | 2468 | { |
mbed_official | 133:d4dda5c437f0 | 2469 | hi2c->State = HAL_I2C_STATE_READY; |
mbed_official | 133:d4dda5c437f0 | 2470 | |
mbed_official | 133:d4dda5c437f0 | 2471 | HAL_I2C_ErrorCallback(hi2c); |
mbed_official | 133:d4dda5c437f0 | 2472 | } |
mbed_official | 133:d4dda5c437f0 | 2473 | } |
mbed_official | 133:d4dda5c437f0 | 2474 | |
mbed_official | 133:d4dda5c437f0 | 2475 | /** |
mbed_official | 133:d4dda5c437f0 | 2476 | * @brief Master Tx Transfer completed callbacks. |
mbed_official | 242:7074e42da0b2 | 2477 | * @param hi2c: pointer to a I2C_HandleTypeDef structure that contains |
mbed_official | 242:7074e42da0b2 | 2478 | * the configuration information for I2C module |
mbed_official | 133:d4dda5c437f0 | 2479 | * @retval None |
mbed_official | 133:d4dda5c437f0 | 2480 | */ |
mbed_official | 133:d4dda5c437f0 | 2481 | __weak void HAL_I2C_MasterTxCpltCallback(I2C_HandleTypeDef *hi2c) |
mbed_official | 133:d4dda5c437f0 | 2482 | { |
mbed_official | 133:d4dda5c437f0 | 2483 | /* NOTE : This function Should not be modified, when the callback is needed, |
mbed_official | 133:d4dda5c437f0 | 2484 | the HAL_I2C_TxCpltCallback could be implemented in the user file |
mbed_official | 133:d4dda5c437f0 | 2485 | */ |
mbed_official | 133:d4dda5c437f0 | 2486 | } |
mbed_official | 133:d4dda5c437f0 | 2487 | |
mbed_official | 133:d4dda5c437f0 | 2488 | /** |
mbed_official | 133:d4dda5c437f0 | 2489 | * @brief Master Rx Transfer completed callbacks. |
mbed_official | 242:7074e42da0b2 | 2490 | * @param hi2c: pointer to a I2C_HandleTypeDef structure that contains |
mbed_official | 242:7074e42da0b2 | 2491 | * the configuration information for I2C module |
mbed_official | 133:d4dda5c437f0 | 2492 | * @retval None |
mbed_official | 133:d4dda5c437f0 | 2493 | */ |
mbed_official | 133:d4dda5c437f0 | 2494 | __weak void HAL_I2C_MasterRxCpltCallback(I2C_HandleTypeDef *hi2c) |
mbed_official | 133:d4dda5c437f0 | 2495 | { |
mbed_official | 133:d4dda5c437f0 | 2496 | /* NOTE : This function Should not be modified, when the callback is needed, |
mbed_official | 133:d4dda5c437f0 | 2497 | the HAL_I2C_TxCpltCallback could be implemented in the user file |
mbed_official | 133:d4dda5c437f0 | 2498 | */ |
mbed_official | 133:d4dda5c437f0 | 2499 | } |
mbed_official | 133:d4dda5c437f0 | 2500 | |
mbed_official | 133:d4dda5c437f0 | 2501 | /** @brief Slave Tx Transfer completed callbacks. |
mbed_official | 242:7074e42da0b2 | 2502 | * @param hi2c: pointer to a I2C_HandleTypeDef structure that contains |
mbed_official | 242:7074e42da0b2 | 2503 | * the configuration information for I2C module |
mbed_official | 133:d4dda5c437f0 | 2504 | * @retval None |
mbed_official | 133:d4dda5c437f0 | 2505 | */ |
mbed_official | 133:d4dda5c437f0 | 2506 | __weak void HAL_I2C_SlaveTxCpltCallback(I2C_HandleTypeDef *hi2c) |
mbed_official | 133:d4dda5c437f0 | 2507 | { |
mbed_official | 133:d4dda5c437f0 | 2508 | /* NOTE : This function Should not be modified, when the callback is needed, |
mbed_official | 133:d4dda5c437f0 | 2509 | the HAL_I2C_TxCpltCallback could be implemented in the user file |
mbed_official | 133:d4dda5c437f0 | 2510 | */ |
mbed_official | 133:d4dda5c437f0 | 2511 | } |
mbed_official | 133:d4dda5c437f0 | 2512 | |
mbed_official | 133:d4dda5c437f0 | 2513 | /** |
mbed_official | 133:d4dda5c437f0 | 2514 | * @brief Slave Rx Transfer completed callbacks. |
mbed_official | 242:7074e42da0b2 | 2515 | * @param hi2c: pointer to a I2C_HandleTypeDef structure that contains |
mbed_official | 242:7074e42da0b2 | 2516 | * the configuration information for I2C module |
mbed_official | 133:d4dda5c437f0 | 2517 | * @retval None |
mbed_official | 133:d4dda5c437f0 | 2518 | */ |
mbed_official | 133:d4dda5c437f0 | 2519 | __weak void HAL_I2C_SlaveRxCpltCallback(I2C_HandleTypeDef *hi2c) |
mbed_official | 133:d4dda5c437f0 | 2520 | { |
mbed_official | 133:d4dda5c437f0 | 2521 | /* NOTE : This function Should not be modified, when the callback is needed, |
mbed_official | 133:d4dda5c437f0 | 2522 | the HAL_I2C_TxCpltCallback could be implemented in the user file |
mbed_official | 133:d4dda5c437f0 | 2523 | */ |
mbed_official | 133:d4dda5c437f0 | 2524 | } |
mbed_official | 133:d4dda5c437f0 | 2525 | |
mbed_official | 133:d4dda5c437f0 | 2526 | /** |
mbed_official | 133:d4dda5c437f0 | 2527 | * @brief Memory Tx Transfer completed callbacks. |
mbed_official | 242:7074e42da0b2 | 2528 | * @param hi2c: pointer to a I2C_HandleTypeDef structure that contains |
mbed_official | 242:7074e42da0b2 | 2529 | * the configuration information for I2C module |
mbed_official | 133:d4dda5c437f0 | 2530 | * @retval None |
mbed_official | 133:d4dda5c437f0 | 2531 | */ |
mbed_official | 133:d4dda5c437f0 | 2532 | __weak void HAL_I2C_MemTxCpltCallback(I2C_HandleTypeDef *hi2c) |
mbed_official | 133:d4dda5c437f0 | 2533 | { |
mbed_official | 133:d4dda5c437f0 | 2534 | /* NOTE : This function Should not be modified, when the callback is needed, |
mbed_official | 133:d4dda5c437f0 | 2535 | the HAL_I2C_TxCpltCallback could be implemented in the user file |
mbed_official | 133:d4dda5c437f0 | 2536 | */ |
mbed_official | 133:d4dda5c437f0 | 2537 | } |
mbed_official | 133:d4dda5c437f0 | 2538 | |
mbed_official | 133:d4dda5c437f0 | 2539 | /** |
mbed_official | 133:d4dda5c437f0 | 2540 | * @brief Memory Rx Transfer completed callbacks. |
mbed_official | 242:7074e42da0b2 | 2541 | * @param hi2c: pointer to a I2C_HandleTypeDef structure that contains |
mbed_official | 242:7074e42da0b2 | 2542 | * the configuration information for I2C module |
mbed_official | 133:d4dda5c437f0 | 2543 | * @retval None |
mbed_official | 133:d4dda5c437f0 | 2544 | */ |
mbed_official | 133:d4dda5c437f0 | 2545 | __weak void HAL_I2C_MemRxCpltCallback(I2C_HandleTypeDef *hi2c) |
mbed_official | 133:d4dda5c437f0 | 2546 | { |
mbed_official | 133:d4dda5c437f0 | 2547 | /* NOTE : This function Should not be modified, when the callback is needed, |
mbed_official | 133:d4dda5c437f0 | 2548 | the HAL_I2C_TxCpltCallback could be implemented in the user file |
mbed_official | 133:d4dda5c437f0 | 2549 | */ |
mbed_official | 133:d4dda5c437f0 | 2550 | } |
mbed_official | 133:d4dda5c437f0 | 2551 | |
mbed_official | 133:d4dda5c437f0 | 2552 | /** |
mbed_official | 133:d4dda5c437f0 | 2553 | * @brief I2C error callbacks. |
mbed_official | 242:7074e42da0b2 | 2554 | * @param hi2c: pointer to a I2C_HandleTypeDef structure that contains |
mbed_official | 242:7074e42da0b2 | 2555 | * the configuration information for I2C module |
mbed_official | 133:d4dda5c437f0 | 2556 | * @retval None |
mbed_official | 133:d4dda5c437f0 | 2557 | */ |
mbed_official | 133:d4dda5c437f0 | 2558 | __weak void HAL_I2C_ErrorCallback(I2C_HandleTypeDef *hi2c) |
mbed_official | 133:d4dda5c437f0 | 2559 | { |
mbed_official | 133:d4dda5c437f0 | 2560 | /* NOTE : This function Should not be modified, when the callback is needed, |
mbed_official | 133:d4dda5c437f0 | 2561 | the HAL_I2C_ErrorCallback could be implemented in the user file |
mbed_official | 133:d4dda5c437f0 | 2562 | */ |
mbed_official | 133:d4dda5c437f0 | 2563 | } |
mbed_official | 133:d4dda5c437f0 | 2564 | |
mbed_official | 133:d4dda5c437f0 | 2565 | /** |
mbed_official | 133:d4dda5c437f0 | 2566 | * @} |
mbed_official | 133:d4dda5c437f0 | 2567 | */ |
mbed_official | 133:d4dda5c437f0 | 2568 | |
mbed_official | 133:d4dda5c437f0 | 2569 | /** @defgroup I2C_Group3 Peripheral State and Errors functions |
mbed_official | 133:d4dda5c437f0 | 2570 | * @brief Peripheral State and Errors functions |
mbed_official | 133:d4dda5c437f0 | 2571 | * |
mbed_official | 133:d4dda5c437f0 | 2572 | @verbatim |
mbed_official | 133:d4dda5c437f0 | 2573 | =============================================================================== |
mbed_official | 133:d4dda5c437f0 | 2574 | ##### Peripheral State and Errors functions ##### |
mbed_official | 133:d4dda5c437f0 | 2575 | =============================================================================== |
mbed_official | 133:d4dda5c437f0 | 2576 | [..] |
mbed_official | 242:7074e42da0b2 | 2577 | This subsection permits to get in run-time the status of the peripheral |
mbed_official | 133:d4dda5c437f0 | 2578 | and the data flow. |
mbed_official | 133:d4dda5c437f0 | 2579 | |
mbed_official | 133:d4dda5c437f0 | 2580 | @endverbatim |
mbed_official | 133:d4dda5c437f0 | 2581 | * @{ |
mbed_official | 133:d4dda5c437f0 | 2582 | */ |
mbed_official | 133:d4dda5c437f0 | 2583 | |
mbed_official | 133:d4dda5c437f0 | 2584 | /** |
mbed_official | 133:d4dda5c437f0 | 2585 | * @brief Returns the I2C state. |
mbed_official | 242:7074e42da0b2 | 2586 | * @param hi2c: pointer to a I2C_HandleTypeDef structure that contains |
mbed_official | 242:7074e42da0b2 | 2587 | * the configuration information for I2C module |
mbed_official | 133:d4dda5c437f0 | 2588 | * @retval HAL state |
mbed_official | 133:d4dda5c437f0 | 2589 | */ |
mbed_official | 133:d4dda5c437f0 | 2590 | HAL_I2C_StateTypeDef HAL_I2C_GetState(I2C_HandleTypeDef *hi2c) |
mbed_official | 133:d4dda5c437f0 | 2591 | { |
mbed_official | 133:d4dda5c437f0 | 2592 | return hi2c->State; |
mbed_official | 133:d4dda5c437f0 | 2593 | } |
mbed_official | 133:d4dda5c437f0 | 2594 | |
mbed_official | 133:d4dda5c437f0 | 2595 | /** |
mbed_official | 133:d4dda5c437f0 | 2596 | * @brief Return the I2C error code |
mbed_official | 133:d4dda5c437f0 | 2597 | * @param hi2c : pointer to a I2C_HandleTypeDef structure that contains |
mbed_official | 133:d4dda5c437f0 | 2598 | * the configuration information for the specified I2C. |
mbed_official | 133:d4dda5c437f0 | 2599 | * @retval I2C Error Code |
mbed_official | 133:d4dda5c437f0 | 2600 | */ |
mbed_official | 133:d4dda5c437f0 | 2601 | uint32_t HAL_I2C_GetError(I2C_HandleTypeDef *hi2c) |
mbed_official | 133:d4dda5c437f0 | 2602 | { |
mbed_official | 133:d4dda5c437f0 | 2603 | return hi2c->ErrorCode; |
mbed_official | 133:d4dda5c437f0 | 2604 | } |
mbed_official | 133:d4dda5c437f0 | 2605 | |
mbed_official | 133:d4dda5c437f0 | 2606 | /** |
mbed_official | 133:d4dda5c437f0 | 2607 | * @} |
mbed_official | 133:d4dda5c437f0 | 2608 | */ |
mbed_official | 133:d4dda5c437f0 | 2609 | |
mbed_official | 133:d4dda5c437f0 | 2610 | /** |
mbed_official | 133:d4dda5c437f0 | 2611 | * @brief Handle TXE flag for Master |
mbed_official | 242:7074e42da0b2 | 2612 | * @param hi2c: pointer to a I2C_HandleTypeDef structure that contains |
mbed_official | 242:7074e42da0b2 | 2613 | * the configuration information for I2C module |
mbed_official | 133:d4dda5c437f0 | 2614 | * @retval HAL status |
mbed_official | 133:d4dda5c437f0 | 2615 | */ |
mbed_official | 133:d4dda5c437f0 | 2616 | static HAL_StatusTypeDef I2C_MasterTransmit_TXE(I2C_HandleTypeDef *hi2c) |
mbed_official | 133:d4dda5c437f0 | 2617 | { |
mbed_official | 133:d4dda5c437f0 | 2618 | /* Process Locked */ |
mbed_official | 133:d4dda5c437f0 | 2619 | __HAL_LOCK(hi2c); |
mbed_official | 133:d4dda5c437f0 | 2620 | |
mbed_official | 133:d4dda5c437f0 | 2621 | /* Write data to DR */ |
mbed_official | 133:d4dda5c437f0 | 2622 | hi2c->Instance->DR = (*hi2c->pBuffPtr++); |
mbed_official | 133:d4dda5c437f0 | 2623 | hi2c->XferCount--; |
mbed_official | 133:d4dda5c437f0 | 2624 | |
mbed_official | 133:d4dda5c437f0 | 2625 | if(hi2c->XferCount == 0) |
mbed_official | 133:d4dda5c437f0 | 2626 | { |
mbed_official | 133:d4dda5c437f0 | 2627 | /* Disable BUF interrupt */ |
mbed_official | 133:d4dda5c437f0 | 2628 | __HAL_I2C_DISABLE_IT(hi2c, I2C_IT_BUF); |
mbed_official | 133:d4dda5c437f0 | 2629 | } |
mbed_official | 133:d4dda5c437f0 | 2630 | |
mbed_official | 133:d4dda5c437f0 | 2631 | /* Process Unlocked */ |
mbed_official | 133:d4dda5c437f0 | 2632 | __HAL_UNLOCK(hi2c); |
mbed_official | 133:d4dda5c437f0 | 2633 | |
mbed_official | 133:d4dda5c437f0 | 2634 | return HAL_OK; |
mbed_official | 133:d4dda5c437f0 | 2635 | } |
mbed_official | 133:d4dda5c437f0 | 2636 | |
mbed_official | 133:d4dda5c437f0 | 2637 | /** |
mbed_official | 133:d4dda5c437f0 | 2638 | * @brief Handle BTF flag for Master transmitter |
mbed_official | 242:7074e42da0b2 | 2639 | * @param hi2c: pointer to a I2C_HandleTypeDef structure that contains |
mbed_official | 242:7074e42da0b2 | 2640 | * the configuration information for I2C module |
mbed_official | 133:d4dda5c437f0 | 2641 | * @retval HAL status |
mbed_official | 133:d4dda5c437f0 | 2642 | */ |
mbed_official | 133:d4dda5c437f0 | 2643 | static HAL_StatusTypeDef I2C_MasterTransmit_BTF(I2C_HandleTypeDef *hi2c) |
mbed_official | 133:d4dda5c437f0 | 2644 | { |
mbed_official | 133:d4dda5c437f0 | 2645 | /* Process Locked */ |
mbed_official | 133:d4dda5c437f0 | 2646 | __HAL_LOCK(hi2c); |
mbed_official | 133:d4dda5c437f0 | 2647 | |
mbed_official | 133:d4dda5c437f0 | 2648 | if(hi2c->XferCount != 0) |
mbed_official | 133:d4dda5c437f0 | 2649 | { |
mbed_official | 133:d4dda5c437f0 | 2650 | /* Write data to DR */ |
mbed_official | 133:d4dda5c437f0 | 2651 | hi2c->Instance->DR = (*hi2c->pBuffPtr++); |
mbed_official | 133:d4dda5c437f0 | 2652 | hi2c->XferCount--; |
mbed_official | 133:d4dda5c437f0 | 2653 | |
mbed_official | 133:d4dda5c437f0 | 2654 | /* Process Unlocked */ |
mbed_official | 133:d4dda5c437f0 | 2655 | __HAL_UNLOCK(hi2c); |
mbed_official | 133:d4dda5c437f0 | 2656 | } |
mbed_official | 133:d4dda5c437f0 | 2657 | else |
mbed_official | 133:d4dda5c437f0 | 2658 | { |
mbed_official | 133:d4dda5c437f0 | 2659 | /* Disable EVT, BUF and ERR interrupt */ |
mbed_official | 133:d4dda5c437f0 | 2660 | __HAL_I2C_DISABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_BUF | I2C_IT_ERR); |
mbed_official | 133:d4dda5c437f0 | 2661 | |
mbed_official | 133:d4dda5c437f0 | 2662 | /* Generate Stop */ |
mbed_official | 133:d4dda5c437f0 | 2663 | hi2c->Instance->CR1 |= I2C_CR1_STOP; |
mbed_official | 133:d4dda5c437f0 | 2664 | |
mbed_official | 133:d4dda5c437f0 | 2665 | /* Wait until BUSY flag is reset */ |
mbed_official | 133:d4dda5c437f0 | 2666 | if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_FLAG) != HAL_OK) |
mbed_official | 133:d4dda5c437f0 | 2667 | { |
mbed_official | 133:d4dda5c437f0 | 2668 | return HAL_TIMEOUT; |
mbed_official | 133:d4dda5c437f0 | 2669 | } |
mbed_official | 133:d4dda5c437f0 | 2670 | |
mbed_official | 133:d4dda5c437f0 | 2671 | if(hi2c->State == HAL_I2C_STATE_MEM_BUSY_TX) |
mbed_official | 133:d4dda5c437f0 | 2672 | { |
mbed_official | 133:d4dda5c437f0 | 2673 | hi2c->State = HAL_I2C_STATE_READY; |
mbed_official | 133:d4dda5c437f0 | 2674 | |
mbed_official | 133:d4dda5c437f0 | 2675 | /* Process Unlocked */ |
mbed_official | 133:d4dda5c437f0 | 2676 | __HAL_UNLOCK(hi2c); |
mbed_official | 133:d4dda5c437f0 | 2677 | |
mbed_official | 133:d4dda5c437f0 | 2678 | HAL_I2C_MemTxCpltCallback(hi2c); |
mbed_official | 133:d4dda5c437f0 | 2679 | } |
mbed_official | 133:d4dda5c437f0 | 2680 | else |
mbed_official | 133:d4dda5c437f0 | 2681 | { |
mbed_official | 133:d4dda5c437f0 | 2682 | hi2c->State = HAL_I2C_STATE_READY; |
mbed_official | 133:d4dda5c437f0 | 2683 | |
mbed_official | 133:d4dda5c437f0 | 2684 | /* Process Unlocked */ |
mbed_official | 133:d4dda5c437f0 | 2685 | __HAL_UNLOCK(hi2c); |
mbed_official | 133:d4dda5c437f0 | 2686 | |
mbed_official | 133:d4dda5c437f0 | 2687 | HAL_I2C_MasterTxCpltCallback(hi2c); |
mbed_official | 133:d4dda5c437f0 | 2688 | } |
mbed_official | 133:d4dda5c437f0 | 2689 | } |
mbed_official | 133:d4dda5c437f0 | 2690 | return HAL_OK; |
mbed_official | 133:d4dda5c437f0 | 2691 | } |
mbed_official | 133:d4dda5c437f0 | 2692 | |
mbed_official | 133:d4dda5c437f0 | 2693 | /** |
mbed_official | 133:d4dda5c437f0 | 2694 | * @brief Handle RXNE flag for Master |
mbed_official | 242:7074e42da0b2 | 2695 | * @param hi2c: pointer to a I2C_HandleTypeDef structure that contains |
mbed_official | 242:7074e42da0b2 | 2696 | * the configuration information for I2C module |
mbed_official | 133:d4dda5c437f0 | 2697 | * @retval HAL status |
mbed_official | 133:d4dda5c437f0 | 2698 | */ |
mbed_official | 133:d4dda5c437f0 | 2699 | static HAL_StatusTypeDef I2C_MasterReceive_RXNE(I2C_HandleTypeDef *hi2c) |
mbed_official | 133:d4dda5c437f0 | 2700 | { |
mbed_official | 133:d4dda5c437f0 | 2701 | uint32_t tmp = 0; |
mbed_official | 133:d4dda5c437f0 | 2702 | |
mbed_official | 133:d4dda5c437f0 | 2703 | /* Process Locked */ |
mbed_official | 133:d4dda5c437f0 | 2704 | __HAL_LOCK(hi2c); |
mbed_official | 133:d4dda5c437f0 | 2705 | |
mbed_official | 133:d4dda5c437f0 | 2706 | tmp = hi2c->XferCount; |
mbed_official | 133:d4dda5c437f0 | 2707 | if(tmp > 3) |
mbed_official | 133:d4dda5c437f0 | 2708 | { |
mbed_official | 133:d4dda5c437f0 | 2709 | /* Read data from DR */ |
mbed_official | 133:d4dda5c437f0 | 2710 | (*hi2c->pBuffPtr++) = hi2c->Instance->DR; |
mbed_official | 133:d4dda5c437f0 | 2711 | hi2c->XferCount--; |
mbed_official | 133:d4dda5c437f0 | 2712 | |
mbed_official | 133:d4dda5c437f0 | 2713 | /* Process Unlocked */ |
mbed_official | 133:d4dda5c437f0 | 2714 | __HAL_UNLOCK(hi2c); |
mbed_official | 133:d4dda5c437f0 | 2715 | } |
mbed_official | 133:d4dda5c437f0 | 2716 | else if((tmp == 2) || (tmp == 3)) |
mbed_official | 133:d4dda5c437f0 | 2717 | { |
mbed_official | 133:d4dda5c437f0 | 2718 | /* Disable BUF interrupt */ |
mbed_official | 133:d4dda5c437f0 | 2719 | __HAL_I2C_DISABLE_IT(hi2c, I2C_IT_BUF); |
mbed_official | 133:d4dda5c437f0 | 2720 | |
mbed_official | 133:d4dda5c437f0 | 2721 | /* Process Unlocked */ |
mbed_official | 133:d4dda5c437f0 | 2722 | __HAL_UNLOCK(hi2c); |
mbed_official | 133:d4dda5c437f0 | 2723 | } |
mbed_official | 133:d4dda5c437f0 | 2724 | else |
mbed_official | 133:d4dda5c437f0 | 2725 | { |
mbed_official | 133:d4dda5c437f0 | 2726 | /* Disable EVT, BUF and ERR interrupt */ |
mbed_official | 133:d4dda5c437f0 | 2727 | __HAL_I2C_DISABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_BUF | I2C_IT_ERR); |
mbed_official | 133:d4dda5c437f0 | 2728 | |
mbed_official | 133:d4dda5c437f0 | 2729 | /* Read data from DR */ |
mbed_official | 133:d4dda5c437f0 | 2730 | (*hi2c->pBuffPtr++) = hi2c->Instance->DR; |
mbed_official | 133:d4dda5c437f0 | 2731 | hi2c->XferCount--; |
mbed_official | 133:d4dda5c437f0 | 2732 | |
mbed_official | 133:d4dda5c437f0 | 2733 | /* Wait until BUSY flag is reset */ |
mbed_official | 133:d4dda5c437f0 | 2734 | if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_FLAG) != HAL_OK) |
mbed_official | 133:d4dda5c437f0 | 2735 | { |
mbed_official | 133:d4dda5c437f0 | 2736 | return HAL_TIMEOUT; |
mbed_official | 133:d4dda5c437f0 | 2737 | } |
mbed_official | 133:d4dda5c437f0 | 2738 | |
mbed_official | 133:d4dda5c437f0 | 2739 | if(hi2c->State == HAL_I2C_STATE_MEM_BUSY_RX) |
mbed_official | 133:d4dda5c437f0 | 2740 | { |
mbed_official | 133:d4dda5c437f0 | 2741 | hi2c->State = HAL_I2C_STATE_READY; |
mbed_official | 133:d4dda5c437f0 | 2742 | |
mbed_official | 133:d4dda5c437f0 | 2743 | /* Process Unlocked */ |
mbed_official | 133:d4dda5c437f0 | 2744 | __HAL_UNLOCK(hi2c); |
mbed_official | 133:d4dda5c437f0 | 2745 | |
mbed_official | 133:d4dda5c437f0 | 2746 | HAL_I2C_MemRxCpltCallback(hi2c); |
mbed_official | 133:d4dda5c437f0 | 2747 | } |
mbed_official | 133:d4dda5c437f0 | 2748 | else |
mbed_official | 133:d4dda5c437f0 | 2749 | { |
mbed_official | 133:d4dda5c437f0 | 2750 | hi2c->State = HAL_I2C_STATE_READY; |
mbed_official | 133:d4dda5c437f0 | 2751 | |
mbed_official | 133:d4dda5c437f0 | 2752 | /* Process Unlocked */ |
mbed_official | 133:d4dda5c437f0 | 2753 | __HAL_UNLOCK(hi2c); |
mbed_official | 133:d4dda5c437f0 | 2754 | |
mbed_official | 133:d4dda5c437f0 | 2755 | HAL_I2C_MasterRxCpltCallback(hi2c); |
mbed_official | 133:d4dda5c437f0 | 2756 | } |
mbed_official | 133:d4dda5c437f0 | 2757 | } |
mbed_official | 133:d4dda5c437f0 | 2758 | return HAL_OK; |
mbed_official | 133:d4dda5c437f0 | 2759 | } |
mbed_official | 133:d4dda5c437f0 | 2760 | |
mbed_official | 133:d4dda5c437f0 | 2761 | /** |
mbed_official | 133:d4dda5c437f0 | 2762 | * @brief Handle BTF flag for Master receiver |
mbed_official | 242:7074e42da0b2 | 2763 | * @param hi2c: pointer to a I2C_HandleTypeDef structure that contains |
mbed_official | 242:7074e42da0b2 | 2764 | * the configuration information for I2C module |
mbed_official | 133:d4dda5c437f0 | 2765 | * @retval HAL status |
mbed_official | 133:d4dda5c437f0 | 2766 | */ |
mbed_official | 133:d4dda5c437f0 | 2767 | static HAL_StatusTypeDef I2C_MasterReceive_BTF(I2C_HandleTypeDef *hi2c) |
mbed_official | 133:d4dda5c437f0 | 2768 | { |
mbed_official | 133:d4dda5c437f0 | 2769 | /* Process Locked */ |
mbed_official | 133:d4dda5c437f0 | 2770 | __HAL_LOCK(hi2c); |
mbed_official | 133:d4dda5c437f0 | 2771 | |
mbed_official | 133:d4dda5c437f0 | 2772 | if(hi2c->XferCount == 3) |
mbed_official | 133:d4dda5c437f0 | 2773 | { |
mbed_official | 133:d4dda5c437f0 | 2774 | /* Disable Acknowledge */ |
mbed_official | 133:d4dda5c437f0 | 2775 | hi2c->Instance->CR1 &= ~I2C_CR1_ACK; |
mbed_official | 133:d4dda5c437f0 | 2776 | |
mbed_official | 133:d4dda5c437f0 | 2777 | /* Read data from DR */ |
mbed_official | 133:d4dda5c437f0 | 2778 | (*hi2c->pBuffPtr++) = hi2c->Instance->DR; |
mbed_official | 133:d4dda5c437f0 | 2779 | hi2c->XferCount--; |
mbed_official | 133:d4dda5c437f0 | 2780 | |
mbed_official | 133:d4dda5c437f0 | 2781 | /* Process Unlocked */ |
mbed_official | 133:d4dda5c437f0 | 2782 | __HAL_UNLOCK(hi2c); |
mbed_official | 133:d4dda5c437f0 | 2783 | } |
mbed_official | 133:d4dda5c437f0 | 2784 | else if(hi2c->XferCount == 2) |
mbed_official | 133:d4dda5c437f0 | 2785 | { |
mbed_official | 133:d4dda5c437f0 | 2786 | /* Generate Stop */ |
mbed_official | 133:d4dda5c437f0 | 2787 | hi2c->Instance->CR1 |= I2C_CR1_STOP; |
mbed_official | 133:d4dda5c437f0 | 2788 | |
mbed_official | 133:d4dda5c437f0 | 2789 | /* Read data from DR */ |
mbed_official | 133:d4dda5c437f0 | 2790 | (*hi2c->pBuffPtr++) = hi2c->Instance->DR; |
mbed_official | 133:d4dda5c437f0 | 2791 | hi2c->XferCount--; |
mbed_official | 133:d4dda5c437f0 | 2792 | |
mbed_official | 133:d4dda5c437f0 | 2793 | /* Read data from DR */ |
mbed_official | 133:d4dda5c437f0 | 2794 | (*hi2c->pBuffPtr++) = hi2c->Instance->DR; |
mbed_official | 133:d4dda5c437f0 | 2795 | hi2c->XferCount--; |
mbed_official | 133:d4dda5c437f0 | 2796 | |
mbed_official | 133:d4dda5c437f0 | 2797 | /* Disable EVT and ERR interrupt */ |
mbed_official | 133:d4dda5c437f0 | 2798 | __HAL_I2C_DISABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_ERR); |
mbed_official | 133:d4dda5c437f0 | 2799 | |
mbed_official | 133:d4dda5c437f0 | 2800 | /* Wait until BUSY flag is reset */ |
mbed_official | 133:d4dda5c437f0 | 2801 | if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_FLAG) != HAL_OK) |
mbed_official | 133:d4dda5c437f0 | 2802 | { |
mbed_official | 133:d4dda5c437f0 | 2803 | return HAL_TIMEOUT; |
mbed_official | 133:d4dda5c437f0 | 2804 | } |
mbed_official | 133:d4dda5c437f0 | 2805 | |
mbed_official | 133:d4dda5c437f0 | 2806 | if(hi2c->State == HAL_I2C_STATE_MEM_BUSY_RX) |
mbed_official | 133:d4dda5c437f0 | 2807 | { |
mbed_official | 133:d4dda5c437f0 | 2808 | hi2c->State = HAL_I2C_STATE_READY; |
mbed_official | 133:d4dda5c437f0 | 2809 | |
mbed_official | 133:d4dda5c437f0 | 2810 | /* Process Unlocked */ |
mbed_official | 133:d4dda5c437f0 | 2811 | __HAL_UNLOCK(hi2c); |
mbed_official | 133:d4dda5c437f0 | 2812 | |
mbed_official | 133:d4dda5c437f0 | 2813 | HAL_I2C_MemRxCpltCallback(hi2c); |
mbed_official | 133:d4dda5c437f0 | 2814 | } |
mbed_official | 133:d4dda5c437f0 | 2815 | else |
mbed_official | 133:d4dda5c437f0 | 2816 | { |
mbed_official | 133:d4dda5c437f0 | 2817 | hi2c->State = HAL_I2C_STATE_READY; |
mbed_official | 133:d4dda5c437f0 | 2818 | |
mbed_official | 133:d4dda5c437f0 | 2819 | /* Process Unlocked */ |
mbed_official | 133:d4dda5c437f0 | 2820 | __HAL_UNLOCK(hi2c); |
mbed_official | 133:d4dda5c437f0 | 2821 | |
mbed_official | 133:d4dda5c437f0 | 2822 | HAL_I2C_MasterRxCpltCallback(hi2c); |
mbed_official | 133:d4dda5c437f0 | 2823 | } |
mbed_official | 133:d4dda5c437f0 | 2824 | } |
mbed_official | 133:d4dda5c437f0 | 2825 | else |
mbed_official | 133:d4dda5c437f0 | 2826 | { |
mbed_official | 133:d4dda5c437f0 | 2827 | /* Read data from DR */ |
mbed_official | 133:d4dda5c437f0 | 2828 | (*hi2c->pBuffPtr++) = hi2c->Instance->DR; |
mbed_official | 133:d4dda5c437f0 | 2829 | hi2c->XferCount--; |
mbed_official | 133:d4dda5c437f0 | 2830 | |
mbed_official | 133:d4dda5c437f0 | 2831 | /* Process Unlocked */ |
mbed_official | 133:d4dda5c437f0 | 2832 | __HAL_UNLOCK(hi2c); |
mbed_official | 133:d4dda5c437f0 | 2833 | } |
mbed_official | 133:d4dda5c437f0 | 2834 | return HAL_OK; |
mbed_official | 133:d4dda5c437f0 | 2835 | } |
mbed_official | 133:d4dda5c437f0 | 2836 | |
mbed_official | 133:d4dda5c437f0 | 2837 | /** |
mbed_official | 133:d4dda5c437f0 | 2838 | * @brief Handle TXE flag for Slave |
mbed_official | 242:7074e42da0b2 | 2839 | * @param hi2c: pointer to a I2C_HandleTypeDef structure that contains |
mbed_official | 242:7074e42da0b2 | 2840 | * the configuration information for I2C module |
mbed_official | 133:d4dda5c437f0 | 2841 | * @retval HAL status |
mbed_official | 133:d4dda5c437f0 | 2842 | */ |
mbed_official | 133:d4dda5c437f0 | 2843 | static HAL_StatusTypeDef I2C_SlaveTransmit_TXE(I2C_HandleTypeDef *hi2c) |
mbed_official | 133:d4dda5c437f0 | 2844 | { |
mbed_official | 133:d4dda5c437f0 | 2845 | /* Process Locked */ |
mbed_official | 133:d4dda5c437f0 | 2846 | __HAL_LOCK(hi2c); |
mbed_official | 133:d4dda5c437f0 | 2847 | |
mbed_official | 133:d4dda5c437f0 | 2848 | if(hi2c->XferCount != 0) |
mbed_official | 133:d4dda5c437f0 | 2849 | { |
mbed_official | 133:d4dda5c437f0 | 2850 | /* Write data to DR */ |
mbed_official | 133:d4dda5c437f0 | 2851 | hi2c->Instance->DR = (*hi2c->pBuffPtr++); |
mbed_official | 133:d4dda5c437f0 | 2852 | hi2c->XferCount--; |
mbed_official | 133:d4dda5c437f0 | 2853 | } |
mbed_official | 133:d4dda5c437f0 | 2854 | |
mbed_official | 133:d4dda5c437f0 | 2855 | /* Process Unlocked */ |
mbed_official | 133:d4dda5c437f0 | 2856 | __HAL_UNLOCK(hi2c); |
mbed_official | 133:d4dda5c437f0 | 2857 | return HAL_OK; |
mbed_official | 133:d4dda5c437f0 | 2858 | } |
mbed_official | 133:d4dda5c437f0 | 2859 | |
mbed_official | 133:d4dda5c437f0 | 2860 | /** |
mbed_official | 133:d4dda5c437f0 | 2861 | * @brief Handle BTF flag for Slave transmitter |
mbed_official | 242:7074e42da0b2 | 2862 | * @param hi2c: pointer to a I2C_HandleTypeDef structure that contains |
mbed_official | 242:7074e42da0b2 | 2863 | * the configuration information for I2C module |
mbed_official | 133:d4dda5c437f0 | 2864 | * @retval HAL status |
mbed_official | 133:d4dda5c437f0 | 2865 | */ |
mbed_official | 133:d4dda5c437f0 | 2866 | static HAL_StatusTypeDef I2C_SlaveTransmit_BTF(I2C_HandleTypeDef *hi2c) |
mbed_official | 133:d4dda5c437f0 | 2867 | { |
mbed_official | 133:d4dda5c437f0 | 2868 | /* Process Locked */ |
mbed_official | 133:d4dda5c437f0 | 2869 | __HAL_LOCK(hi2c); |
mbed_official | 133:d4dda5c437f0 | 2870 | |
mbed_official | 133:d4dda5c437f0 | 2871 | if(hi2c->XferCount != 0) |
mbed_official | 133:d4dda5c437f0 | 2872 | { |
mbed_official | 133:d4dda5c437f0 | 2873 | /* Write data to DR */ |
mbed_official | 133:d4dda5c437f0 | 2874 | hi2c->Instance->DR = (*hi2c->pBuffPtr++); |
mbed_official | 133:d4dda5c437f0 | 2875 | hi2c->XferCount--; |
mbed_official | 133:d4dda5c437f0 | 2876 | } |
mbed_official | 133:d4dda5c437f0 | 2877 | |
mbed_official | 133:d4dda5c437f0 | 2878 | /* Process Unlocked */ |
mbed_official | 133:d4dda5c437f0 | 2879 | __HAL_UNLOCK(hi2c); |
mbed_official | 133:d4dda5c437f0 | 2880 | return HAL_OK; |
mbed_official | 133:d4dda5c437f0 | 2881 | } |
mbed_official | 133:d4dda5c437f0 | 2882 | |
mbed_official | 133:d4dda5c437f0 | 2883 | /** |
mbed_official | 133:d4dda5c437f0 | 2884 | * @brief Handle RXNE flag for Slave |
mbed_official | 242:7074e42da0b2 | 2885 | * @param hi2c: pointer to a I2C_HandleTypeDef structure that contains |
mbed_official | 242:7074e42da0b2 | 2886 | * the configuration information for I2C module |
mbed_official | 133:d4dda5c437f0 | 2887 | * @retval HAL status |
mbed_official | 133:d4dda5c437f0 | 2888 | */ |
mbed_official | 133:d4dda5c437f0 | 2889 | static HAL_StatusTypeDef I2C_SlaveReceive_RXNE(I2C_HandleTypeDef *hi2c) |
mbed_official | 133:d4dda5c437f0 | 2890 | { |
mbed_official | 133:d4dda5c437f0 | 2891 | /* Process Locked */ |
mbed_official | 133:d4dda5c437f0 | 2892 | __HAL_LOCK(hi2c); |
mbed_official | 133:d4dda5c437f0 | 2893 | |
mbed_official | 133:d4dda5c437f0 | 2894 | if(hi2c->XferCount != 0) |
mbed_official | 133:d4dda5c437f0 | 2895 | { |
mbed_official | 133:d4dda5c437f0 | 2896 | /* Read data from DR */ |
mbed_official | 133:d4dda5c437f0 | 2897 | (*hi2c->pBuffPtr++) = hi2c->Instance->DR; |
mbed_official | 133:d4dda5c437f0 | 2898 | hi2c->XferCount--; |
mbed_official | 133:d4dda5c437f0 | 2899 | } |
mbed_official | 133:d4dda5c437f0 | 2900 | |
mbed_official | 133:d4dda5c437f0 | 2901 | /* Process Unlocked */ |
mbed_official | 133:d4dda5c437f0 | 2902 | __HAL_UNLOCK(hi2c); |
mbed_official | 133:d4dda5c437f0 | 2903 | return HAL_OK; |
mbed_official | 133:d4dda5c437f0 | 2904 | } |
mbed_official | 133:d4dda5c437f0 | 2905 | |
mbed_official | 133:d4dda5c437f0 | 2906 | /** |
mbed_official | 133:d4dda5c437f0 | 2907 | * @brief Handle BTF flag for Slave receiver |
mbed_official | 242:7074e42da0b2 | 2908 | * @param hi2c: pointer to a I2C_HandleTypeDef structure that contains |
mbed_official | 242:7074e42da0b2 | 2909 | * the configuration information for I2C module |
mbed_official | 133:d4dda5c437f0 | 2910 | * @retval HAL status |
mbed_official | 133:d4dda5c437f0 | 2911 | */ |
mbed_official | 133:d4dda5c437f0 | 2912 | static HAL_StatusTypeDef I2C_SlaveReceive_BTF(I2C_HandleTypeDef *hi2c) |
mbed_official | 133:d4dda5c437f0 | 2913 | { |
mbed_official | 133:d4dda5c437f0 | 2914 | /* Process Locked */ |
mbed_official | 133:d4dda5c437f0 | 2915 | __HAL_LOCK(hi2c); |
mbed_official | 133:d4dda5c437f0 | 2916 | |
mbed_official | 133:d4dda5c437f0 | 2917 | if(hi2c->XferCount != 0) |
mbed_official | 133:d4dda5c437f0 | 2918 | { |
mbed_official | 133:d4dda5c437f0 | 2919 | /* Read data from DR */ |
mbed_official | 133:d4dda5c437f0 | 2920 | (*hi2c->pBuffPtr++) = hi2c->Instance->DR; |
mbed_official | 133:d4dda5c437f0 | 2921 | hi2c->XferCount--; |
mbed_official | 133:d4dda5c437f0 | 2922 | } |
mbed_official | 133:d4dda5c437f0 | 2923 | |
mbed_official | 133:d4dda5c437f0 | 2924 | /* Process Unlocked */ |
mbed_official | 133:d4dda5c437f0 | 2925 | __HAL_UNLOCK(hi2c); |
mbed_official | 133:d4dda5c437f0 | 2926 | return HAL_OK; |
mbed_official | 133:d4dda5c437f0 | 2927 | } |
mbed_official | 133:d4dda5c437f0 | 2928 | |
mbed_official | 133:d4dda5c437f0 | 2929 | /** |
mbed_official | 133:d4dda5c437f0 | 2930 | * @brief Handle ADD flag for Slave |
mbed_official | 242:7074e42da0b2 | 2931 | * @param hi2c: pointer to a I2C_HandleTypeDef structure that contains |
mbed_official | 242:7074e42da0b2 | 2932 | * the configuration information for I2C module |
mbed_official | 133:d4dda5c437f0 | 2933 | * @retval HAL status |
mbed_official | 133:d4dda5c437f0 | 2934 | */ |
mbed_official | 133:d4dda5c437f0 | 2935 | static HAL_StatusTypeDef I2C_Slave_ADDR(I2C_HandleTypeDef *hi2c) |
mbed_official | 133:d4dda5c437f0 | 2936 | { |
mbed_official | 133:d4dda5c437f0 | 2937 | /* Process Locked */ |
mbed_official | 133:d4dda5c437f0 | 2938 | __HAL_LOCK(hi2c); |
mbed_official | 133:d4dda5c437f0 | 2939 | |
mbed_official | 133:d4dda5c437f0 | 2940 | /* Clear ADDR flag */ |
mbed_official | 133:d4dda5c437f0 | 2941 | __HAL_I2C_CLEAR_ADDRFLAG(hi2c); |
mbed_official | 133:d4dda5c437f0 | 2942 | |
mbed_official | 133:d4dda5c437f0 | 2943 | /* Process Unlocked */ |
mbed_official | 133:d4dda5c437f0 | 2944 | __HAL_UNLOCK(hi2c); |
mbed_official | 133:d4dda5c437f0 | 2945 | return HAL_OK; |
mbed_official | 133:d4dda5c437f0 | 2946 | } |
mbed_official | 133:d4dda5c437f0 | 2947 | |
mbed_official | 133:d4dda5c437f0 | 2948 | /** |
mbed_official | 133:d4dda5c437f0 | 2949 | * @brief Handle STOPF flag for Slave |
mbed_official | 242:7074e42da0b2 | 2950 | * @param hi2c: pointer to a I2C_HandleTypeDef structure that contains |
mbed_official | 242:7074e42da0b2 | 2951 | * the configuration information for I2C module |
mbed_official | 133:d4dda5c437f0 | 2952 | * @retval HAL status |
mbed_official | 133:d4dda5c437f0 | 2953 | */ |
mbed_official | 133:d4dda5c437f0 | 2954 | static HAL_StatusTypeDef I2C_Slave_STOPF(I2C_HandleTypeDef *hi2c) |
mbed_official | 133:d4dda5c437f0 | 2955 | { |
mbed_official | 133:d4dda5c437f0 | 2956 | /* Process Locked */ |
mbed_official | 133:d4dda5c437f0 | 2957 | __HAL_LOCK(hi2c); |
mbed_official | 133:d4dda5c437f0 | 2958 | |
mbed_official | 133:d4dda5c437f0 | 2959 | /* Disable EVT, BUF and ERR interrupt */ |
mbed_official | 133:d4dda5c437f0 | 2960 | __HAL_I2C_DISABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_BUF | I2C_IT_ERR); |
mbed_official | 133:d4dda5c437f0 | 2961 | |
mbed_official | 133:d4dda5c437f0 | 2962 | /* Clear STOPF flag */ |
mbed_official | 133:d4dda5c437f0 | 2963 | __HAL_I2C_CLEAR_STOPFLAG(hi2c); |
mbed_official | 133:d4dda5c437f0 | 2964 | |
mbed_official | 133:d4dda5c437f0 | 2965 | /* Disable Acknowledge */ |
mbed_official | 133:d4dda5c437f0 | 2966 | hi2c->Instance->CR1 &= ~I2C_CR1_ACK; |
mbed_official | 133:d4dda5c437f0 | 2967 | |
mbed_official | 133:d4dda5c437f0 | 2968 | /* Wait until BUSY flag is reset */ |
mbed_official | 133:d4dda5c437f0 | 2969 | if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_FLAG) != HAL_OK) |
mbed_official | 133:d4dda5c437f0 | 2970 | { |
mbed_official | 133:d4dda5c437f0 | 2971 | return HAL_TIMEOUT; |
mbed_official | 133:d4dda5c437f0 | 2972 | } |
mbed_official | 133:d4dda5c437f0 | 2973 | |
mbed_official | 133:d4dda5c437f0 | 2974 | hi2c->State = HAL_I2C_STATE_READY; |
mbed_official | 133:d4dda5c437f0 | 2975 | |
mbed_official | 133:d4dda5c437f0 | 2976 | /* Process Unlocked */ |
mbed_official | 133:d4dda5c437f0 | 2977 | __HAL_UNLOCK(hi2c); |
mbed_official | 133:d4dda5c437f0 | 2978 | |
mbed_official | 133:d4dda5c437f0 | 2979 | HAL_I2C_SlaveRxCpltCallback(hi2c); |
mbed_official | 133:d4dda5c437f0 | 2980 | |
mbed_official | 133:d4dda5c437f0 | 2981 | return HAL_OK; |
mbed_official | 133:d4dda5c437f0 | 2982 | } |
mbed_official | 133:d4dda5c437f0 | 2983 | |
mbed_official | 133:d4dda5c437f0 | 2984 | /** |
mbed_official | 242:7074e42da0b2 | 2985 | * @param hi2c: pointer to a I2C_HandleTypeDef structure that contains |
mbed_official | 242:7074e42da0b2 | 2986 | * the configuration information for I2C module |
mbed_official | 133:d4dda5c437f0 | 2987 | * @retval HAL status |
mbed_official | 133:d4dda5c437f0 | 2988 | */ |
mbed_official | 133:d4dda5c437f0 | 2989 | static HAL_StatusTypeDef I2C_Slave_AF(I2C_HandleTypeDef *hi2c) |
mbed_official | 133:d4dda5c437f0 | 2990 | { |
mbed_official | 133:d4dda5c437f0 | 2991 | /* Process Locked */ |
mbed_official | 133:d4dda5c437f0 | 2992 | __HAL_LOCK(hi2c); |
mbed_official | 133:d4dda5c437f0 | 2993 | |
mbed_official | 133:d4dda5c437f0 | 2994 | /* Disable EVT, BUF and ERR interrupt */ |
mbed_official | 133:d4dda5c437f0 | 2995 | __HAL_I2C_DISABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_BUF | I2C_IT_ERR); |
mbed_official | 133:d4dda5c437f0 | 2996 | |
mbed_official | 133:d4dda5c437f0 | 2997 | /* Clear AF flag */ |
mbed_official | 133:d4dda5c437f0 | 2998 | __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF); |
mbed_official | 133:d4dda5c437f0 | 2999 | |
mbed_official | 133:d4dda5c437f0 | 3000 | /* Disable Acknowledge */ |
mbed_official | 133:d4dda5c437f0 | 3001 | hi2c->Instance->CR1 &= ~I2C_CR1_ACK; |
mbed_official | 133:d4dda5c437f0 | 3002 | |
mbed_official | 133:d4dda5c437f0 | 3003 | /* Wait until BUSY flag is reset */ |
mbed_official | 133:d4dda5c437f0 | 3004 | if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_FLAG) != HAL_OK) |
mbed_official | 133:d4dda5c437f0 | 3005 | { |
mbed_official | 133:d4dda5c437f0 | 3006 | return HAL_TIMEOUT; |
mbed_official | 133:d4dda5c437f0 | 3007 | } |
mbed_official | 133:d4dda5c437f0 | 3008 | |
mbed_official | 133:d4dda5c437f0 | 3009 | hi2c->State = HAL_I2C_STATE_READY; |
mbed_official | 133:d4dda5c437f0 | 3010 | |
mbed_official | 133:d4dda5c437f0 | 3011 | /* Process Unlocked */ |
mbed_official | 133:d4dda5c437f0 | 3012 | __HAL_UNLOCK(hi2c); |
mbed_official | 133:d4dda5c437f0 | 3013 | |
mbed_official | 133:d4dda5c437f0 | 3014 | HAL_I2C_SlaveTxCpltCallback(hi2c); |
mbed_official | 133:d4dda5c437f0 | 3015 | |
mbed_official | 133:d4dda5c437f0 | 3016 | return HAL_OK; |
mbed_official | 133:d4dda5c437f0 | 3017 | } |
mbed_official | 133:d4dda5c437f0 | 3018 | |
mbed_official | 133:d4dda5c437f0 | 3019 | /** |
mbed_official | 242:7074e42da0b2 | 3020 | * @param hi2c: pointer to a I2C_HandleTypeDef structure that contains |
mbed_official | 242:7074e42da0b2 | 3021 | * the configuration information for I2C module |
mbed_official | 133:d4dda5c437f0 | 3022 | * @param DevAddress: Target device address |
mbed_official | 133:d4dda5c437f0 | 3023 | * @retval HAL status |
mbed_official | 133:d4dda5c437f0 | 3024 | */ |
mbed_official | 133:d4dda5c437f0 | 3025 | static HAL_StatusTypeDef I2C_MasterRequestWrite(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint32_t Timeout) |
mbed_official | 133:d4dda5c437f0 | 3026 | { |
mbed_official | 133:d4dda5c437f0 | 3027 | /* Generate Start */ |
mbed_official | 133:d4dda5c437f0 | 3028 | hi2c->Instance->CR1 |= I2C_CR1_START; |
mbed_official | 133:d4dda5c437f0 | 3029 | |
mbed_official | 133:d4dda5c437f0 | 3030 | /* Wait until SB flag is set */ |
mbed_official | 133:d4dda5c437f0 | 3031 | if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_SB, RESET, Timeout) != HAL_OK) |
mbed_official | 133:d4dda5c437f0 | 3032 | { |
mbed_official | 133:d4dda5c437f0 | 3033 | return HAL_TIMEOUT; |
mbed_official | 133:d4dda5c437f0 | 3034 | } |
mbed_official | 133:d4dda5c437f0 | 3035 | |
mbed_official | 133:d4dda5c437f0 | 3036 | if(hi2c->Init.AddressingMode == I2C_ADDRESSINGMODE_7BIT) |
mbed_official | 133:d4dda5c437f0 | 3037 | { |
mbed_official | 133:d4dda5c437f0 | 3038 | /* Send slave address */ |
mbed_official | 133:d4dda5c437f0 | 3039 | hi2c->Instance->DR = __HAL_I2C_7BIT_ADD_WRITE(DevAddress); |
mbed_official | 133:d4dda5c437f0 | 3040 | } |
mbed_official | 133:d4dda5c437f0 | 3041 | else |
mbed_official | 133:d4dda5c437f0 | 3042 | { |
mbed_official | 133:d4dda5c437f0 | 3043 | /* Send header of slave address */ |
mbed_official | 133:d4dda5c437f0 | 3044 | hi2c->Instance->DR = __HAL_I2C_10BIT_HEADER_WRITE(DevAddress); |
mbed_official | 133:d4dda5c437f0 | 3045 | |
mbed_official | 133:d4dda5c437f0 | 3046 | /* Wait until ADD10 flag is set */ |
mbed_official | 133:d4dda5c437f0 | 3047 | if(I2C_WaitOnMasterAddressFlagUntilTimeout(hi2c, I2C_FLAG_ADD10, Timeout) != HAL_OK) |
mbed_official | 133:d4dda5c437f0 | 3048 | { |
mbed_official | 133:d4dda5c437f0 | 3049 | if(hi2c->ErrorCode == HAL_I2C_ERROR_AF) |
mbed_official | 133:d4dda5c437f0 | 3050 | { |
mbed_official | 133:d4dda5c437f0 | 3051 | return HAL_ERROR; |
mbed_official | 133:d4dda5c437f0 | 3052 | } |
mbed_official | 133:d4dda5c437f0 | 3053 | else |
mbed_official | 133:d4dda5c437f0 | 3054 | { |
mbed_official | 133:d4dda5c437f0 | 3055 | return HAL_TIMEOUT; |
mbed_official | 133:d4dda5c437f0 | 3056 | } |
mbed_official | 133:d4dda5c437f0 | 3057 | } |
mbed_official | 133:d4dda5c437f0 | 3058 | |
mbed_official | 133:d4dda5c437f0 | 3059 | /* Send slave address */ |
mbed_official | 133:d4dda5c437f0 | 3060 | hi2c->Instance->DR = __HAL_I2C_10BIT_ADDRESS(DevAddress); |
mbed_official | 133:d4dda5c437f0 | 3061 | } |
mbed_official | 133:d4dda5c437f0 | 3062 | |
mbed_official | 133:d4dda5c437f0 | 3063 | /* Wait until ADDR flag is set */ |
mbed_official | 133:d4dda5c437f0 | 3064 | if(I2C_WaitOnMasterAddressFlagUntilTimeout(hi2c, I2C_FLAG_ADDR, Timeout) != HAL_OK) |
mbed_official | 133:d4dda5c437f0 | 3065 | { |
mbed_official | 133:d4dda5c437f0 | 3066 | if(hi2c->ErrorCode == HAL_I2C_ERROR_AF) |
mbed_official | 133:d4dda5c437f0 | 3067 | { |
mbed_official | 133:d4dda5c437f0 | 3068 | return HAL_ERROR; |
mbed_official | 133:d4dda5c437f0 | 3069 | } |
mbed_official | 133:d4dda5c437f0 | 3070 | else |
mbed_official | 133:d4dda5c437f0 | 3071 | { |
mbed_official | 133:d4dda5c437f0 | 3072 | return HAL_TIMEOUT; |
mbed_official | 133:d4dda5c437f0 | 3073 | } |
mbed_official | 133:d4dda5c437f0 | 3074 | } |
mbed_official | 133:d4dda5c437f0 | 3075 | |
mbed_official | 133:d4dda5c437f0 | 3076 | return HAL_OK; |
mbed_official | 133:d4dda5c437f0 | 3077 | } |
mbed_official | 133:d4dda5c437f0 | 3078 | |
mbed_official | 133:d4dda5c437f0 | 3079 | /** |
mbed_official | 133:d4dda5c437f0 | 3080 | * @brief Master sends target device address for read request. |
mbed_official | 242:7074e42da0b2 | 3081 | * @param hi2c: pointer to a I2C_HandleTypeDef structure that contains |
mbed_official | 242:7074e42da0b2 | 3082 | * the configuration information for I2C module |
mbed_official | 133:d4dda5c437f0 | 3083 | * @param DevAddress: Target device address |
mbed_official | 133:d4dda5c437f0 | 3084 | * @retval HAL status |
mbed_official | 133:d4dda5c437f0 | 3085 | */ |
mbed_official | 133:d4dda5c437f0 | 3086 | static HAL_StatusTypeDef I2C_MasterRequestRead(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint32_t Timeout) |
mbed_official | 133:d4dda5c437f0 | 3087 | { |
mbed_official | 133:d4dda5c437f0 | 3088 | /* Enable Acknowledge */ |
mbed_official | 133:d4dda5c437f0 | 3089 | hi2c->Instance->CR1 |= I2C_CR1_ACK; |
mbed_official | 133:d4dda5c437f0 | 3090 | |
mbed_official | 133:d4dda5c437f0 | 3091 | /* Generate Start */ |
mbed_official | 133:d4dda5c437f0 | 3092 | hi2c->Instance->CR1 |= I2C_CR1_START; |
mbed_official | 133:d4dda5c437f0 | 3093 | |
mbed_official | 133:d4dda5c437f0 | 3094 | /* Wait until SB flag is set */ |
mbed_official | 133:d4dda5c437f0 | 3095 | if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_SB, RESET, Timeout) != HAL_OK) |
mbed_official | 133:d4dda5c437f0 | 3096 | { |
mbed_official | 133:d4dda5c437f0 | 3097 | return HAL_TIMEOUT; |
mbed_official | 133:d4dda5c437f0 | 3098 | } |
mbed_official | 133:d4dda5c437f0 | 3099 | |
mbed_official | 133:d4dda5c437f0 | 3100 | if(hi2c->Init.AddressingMode == I2C_ADDRESSINGMODE_7BIT) |
mbed_official | 133:d4dda5c437f0 | 3101 | { |
mbed_official | 133:d4dda5c437f0 | 3102 | /* Send slave address */ |
mbed_official | 133:d4dda5c437f0 | 3103 | hi2c->Instance->DR = __HAL_I2C_7BIT_ADD_READ(DevAddress); |
mbed_official | 133:d4dda5c437f0 | 3104 | } |
mbed_official | 133:d4dda5c437f0 | 3105 | else |
mbed_official | 133:d4dda5c437f0 | 3106 | { |
mbed_official | 133:d4dda5c437f0 | 3107 | /* Send header of slave address */ |
mbed_official | 133:d4dda5c437f0 | 3108 | hi2c->Instance->DR = __HAL_I2C_10BIT_HEADER_WRITE(DevAddress); |
mbed_official | 133:d4dda5c437f0 | 3109 | |
mbed_official | 133:d4dda5c437f0 | 3110 | /* Wait until ADD10 flag is set */ |
mbed_official | 133:d4dda5c437f0 | 3111 | if(I2C_WaitOnMasterAddressFlagUntilTimeout(hi2c, I2C_FLAG_ADD10, Timeout) != HAL_OK) |
mbed_official | 133:d4dda5c437f0 | 3112 | { |
mbed_official | 133:d4dda5c437f0 | 3113 | if(hi2c->ErrorCode == HAL_I2C_ERROR_AF) |
mbed_official | 133:d4dda5c437f0 | 3114 | { |
mbed_official | 133:d4dda5c437f0 | 3115 | return HAL_ERROR; |
mbed_official | 133:d4dda5c437f0 | 3116 | } |
mbed_official | 133:d4dda5c437f0 | 3117 | else |
mbed_official | 133:d4dda5c437f0 | 3118 | { |
mbed_official | 133:d4dda5c437f0 | 3119 | return HAL_TIMEOUT; |
mbed_official | 133:d4dda5c437f0 | 3120 | } |
mbed_official | 133:d4dda5c437f0 | 3121 | } |
mbed_official | 133:d4dda5c437f0 | 3122 | |
mbed_official | 133:d4dda5c437f0 | 3123 | /* Send slave address */ |
mbed_official | 133:d4dda5c437f0 | 3124 | hi2c->Instance->DR = __HAL_I2C_10BIT_ADDRESS(DevAddress); |
mbed_official | 133:d4dda5c437f0 | 3125 | |
mbed_official | 133:d4dda5c437f0 | 3126 | /* Wait until ADDR flag is set */ |
mbed_official | 133:d4dda5c437f0 | 3127 | if(I2C_WaitOnMasterAddressFlagUntilTimeout(hi2c, I2C_FLAG_ADDR, Timeout) != HAL_OK) |
mbed_official | 133:d4dda5c437f0 | 3128 | { |
mbed_official | 133:d4dda5c437f0 | 3129 | if(hi2c->ErrorCode == HAL_I2C_ERROR_AF) |
mbed_official | 133:d4dda5c437f0 | 3130 | { |
mbed_official | 133:d4dda5c437f0 | 3131 | return HAL_ERROR; |
mbed_official | 133:d4dda5c437f0 | 3132 | } |
mbed_official | 133:d4dda5c437f0 | 3133 | else |
mbed_official | 133:d4dda5c437f0 | 3134 | { |
mbed_official | 133:d4dda5c437f0 | 3135 | return HAL_TIMEOUT; |
mbed_official | 133:d4dda5c437f0 | 3136 | } |
mbed_official | 133:d4dda5c437f0 | 3137 | } |
mbed_official | 133:d4dda5c437f0 | 3138 | |
mbed_official | 133:d4dda5c437f0 | 3139 | /* Clear ADDR flag */ |
mbed_official | 133:d4dda5c437f0 | 3140 | __HAL_I2C_CLEAR_ADDRFLAG(hi2c); |
mbed_official | 133:d4dda5c437f0 | 3141 | |
mbed_official | 133:d4dda5c437f0 | 3142 | /* Generate Restart */ |
mbed_official | 133:d4dda5c437f0 | 3143 | hi2c->Instance->CR1 |= I2C_CR1_START; |
mbed_official | 133:d4dda5c437f0 | 3144 | |
mbed_official | 133:d4dda5c437f0 | 3145 | /* Wait until SB flag is set */ |
mbed_official | 133:d4dda5c437f0 | 3146 | if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_SB, RESET, Timeout) != HAL_OK) |
mbed_official | 133:d4dda5c437f0 | 3147 | { |
mbed_official | 133:d4dda5c437f0 | 3148 | return HAL_TIMEOUT; |
mbed_official | 133:d4dda5c437f0 | 3149 | } |
mbed_official | 133:d4dda5c437f0 | 3150 | |
mbed_official | 133:d4dda5c437f0 | 3151 | /* Send header of slave address */ |
mbed_official | 133:d4dda5c437f0 | 3152 | hi2c->Instance->DR = __HAL_I2C_10BIT_HEADER_READ(DevAddress); |
mbed_official | 133:d4dda5c437f0 | 3153 | } |
mbed_official | 133:d4dda5c437f0 | 3154 | |
mbed_official | 133:d4dda5c437f0 | 3155 | /* Wait until ADDR flag is set */ |
mbed_official | 133:d4dda5c437f0 | 3156 | if(I2C_WaitOnMasterAddressFlagUntilTimeout(hi2c, I2C_FLAG_ADDR, Timeout) != HAL_OK) |
mbed_official | 133:d4dda5c437f0 | 3157 | { |
mbed_official | 133:d4dda5c437f0 | 3158 | if(hi2c->ErrorCode == HAL_I2C_ERROR_AF) |
mbed_official | 133:d4dda5c437f0 | 3159 | { |
mbed_official | 133:d4dda5c437f0 | 3160 | return HAL_ERROR; |
mbed_official | 133:d4dda5c437f0 | 3161 | } |
mbed_official | 133:d4dda5c437f0 | 3162 | else |
mbed_official | 133:d4dda5c437f0 | 3163 | { |
mbed_official | 133:d4dda5c437f0 | 3164 | return HAL_TIMEOUT; |
mbed_official | 133:d4dda5c437f0 | 3165 | } |
mbed_official | 133:d4dda5c437f0 | 3166 | } |
mbed_official | 133:d4dda5c437f0 | 3167 | |
mbed_official | 133:d4dda5c437f0 | 3168 | return HAL_OK; |
mbed_official | 133:d4dda5c437f0 | 3169 | } |
mbed_official | 133:d4dda5c437f0 | 3170 | |
mbed_official | 133:d4dda5c437f0 | 3171 | /** |
mbed_official | 133:d4dda5c437f0 | 3172 | * @brief Master sends target device address followed by internal memory address for write request. |
mbed_official | 242:7074e42da0b2 | 3173 | * @param hi2c: pointer to a I2C_HandleTypeDef structure that contains |
mbed_official | 242:7074e42da0b2 | 3174 | * the configuration information for I2C module |
mbed_official | 133:d4dda5c437f0 | 3175 | * @param DevAddress: Target device address |
mbed_official | 133:d4dda5c437f0 | 3176 | * @param MemAddress: Internal memory address |
mbed_official | 133:d4dda5c437f0 | 3177 | * @param MemAddSize: Size of internal memory address |
mbed_official | 133:d4dda5c437f0 | 3178 | * @retval HAL status |
mbed_official | 133:d4dda5c437f0 | 3179 | */ |
mbed_official | 133:d4dda5c437f0 | 3180 | static HAL_StatusTypeDef I2C_RequestMemoryWrite(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint32_t Timeout) |
mbed_official | 133:d4dda5c437f0 | 3181 | { |
mbed_official | 133:d4dda5c437f0 | 3182 | /* Generate Start */ |
mbed_official | 133:d4dda5c437f0 | 3183 | hi2c->Instance->CR1 |= I2C_CR1_START; |
mbed_official | 133:d4dda5c437f0 | 3184 | |
mbed_official | 133:d4dda5c437f0 | 3185 | /* Wait until SB flag is set */ |
mbed_official | 133:d4dda5c437f0 | 3186 | if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_SB, RESET, Timeout) != HAL_OK) |
mbed_official | 133:d4dda5c437f0 | 3187 | { |
mbed_official | 133:d4dda5c437f0 | 3188 | return HAL_TIMEOUT; |
mbed_official | 133:d4dda5c437f0 | 3189 | } |
mbed_official | 133:d4dda5c437f0 | 3190 | |
mbed_official | 133:d4dda5c437f0 | 3191 | /* Send slave address */ |
mbed_official | 133:d4dda5c437f0 | 3192 | hi2c->Instance->DR = __HAL_I2C_7BIT_ADD_WRITE(DevAddress); |
mbed_official | 133:d4dda5c437f0 | 3193 | |
mbed_official | 133:d4dda5c437f0 | 3194 | /* Wait until ADDR flag is set */ |
mbed_official | 133:d4dda5c437f0 | 3195 | if(I2C_WaitOnMasterAddressFlagUntilTimeout(hi2c, I2C_FLAG_ADDR, Timeout) != HAL_OK) |
mbed_official | 133:d4dda5c437f0 | 3196 | { |
mbed_official | 133:d4dda5c437f0 | 3197 | if(hi2c->ErrorCode == HAL_I2C_ERROR_AF) |
mbed_official | 133:d4dda5c437f0 | 3198 | { |
mbed_official | 133:d4dda5c437f0 | 3199 | return HAL_ERROR; |
mbed_official | 133:d4dda5c437f0 | 3200 | } |
mbed_official | 133:d4dda5c437f0 | 3201 | else |
mbed_official | 133:d4dda5c437f0 | 3202 | { |
mbed_official | 133:d4dda5c437f0 | 3203 | return HAL_TIMEOUT; |
mbed_official | 133:d4dda5c437f0 | 3204 | } |
mbed_official | 133:d4dda5c437f0 | 3205 | } |
mbed_official | 133:d4dda5c437f0 | 3206 | |
mbed_official | 133:d4dda5c437f0 | 3207 | /* Clear ADDR flag */ |
mbed_official | 133:d4dda5c437f0 | 3208 | __HAL_I2C_CLEAR_ADDRFLAG(hi2c); |
mbed_official | 133:d4dda5c437f0 | 3209 | |
mbed_official | 133:d4dda5c437f0 | 3210 | /* Wait until TXE flag is set */ |
mbed_official | 133:d4dda5c437f0 | 3211 | if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_TXE, RESET, Timeout) != HAL_OK) |
mbed_official | 133:d4dda5c437f0 | 3212 | { |
mbed_official | 133:d4dda5c437f0 | 3213 | return HAL_TIMEOUT; |
mbed_official | 133:d4dda5c437f0 | 3214 | } |
mbed_official | 133:d4dda5c437f0 | 3215 | |
mbed_official | 133:d4dda5c437f0 | 3216 | /* If Memory address size is 8Bit */ |
mbed_official | 133:d4dda5c437f0 | 3217 | if(MemAddSize == I2C_MEMADD_SIZE_8BIT) |
mbed_official | 133:d4dda5c437f0 | 3218 | { |
mbed_official | 133:d4dda5c437f0 | 3219 | /* Send Memory Address */ |
mbed_official | 133:d4dda5c437f0 | 3220 | hi2c->Instance->DR = __HAL_I2C_MEM_ADD_LSB(MemAddress); |
mbed_official | 133:d4dda5c437f0 | 3221 | } |
mbed_official | 133:d4dda5c437f0 | 3222 | /* If Memory address size is 16Bit */ |
mbed_official | 133:d4dda5c437f0 | 3223 | else |
mbed_official | 133:d4dda5c437f0 | 3224 | { |
mbed_official | 133:d4dda5c437f0 | 3225 | /* Send MSB of Memory Address */ |
mbed_official | 133:d4dda5c437f0 | 3226 | hi2c->Instance->DR = __HAL_I2C_MEM_ADD_MSB(MemAddress); |
mbed_official | 133:d4dda5c437f0 | 3227 | |
mbed_official | 133:d4dda5c437f0 | 3228 | /* Wait until TXE flag is set */ |
mbed_official | 133:d4dda5c437f0 | 3229 | if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_TXE, RESET, Timeout) != HAL_OK) |
mbed_official | 133:d4dda5c437f0 | 3230 | { |
mbed_official | 133:d4dda5c437f0 | 3231 | return HAL_TIMEOUT; |
mbed_official | 133:d4dda5c437f0 | 3232 | } |
mbed_official | 133:d4dda5c437f0 | 3233 | |
mbed_official | 133:d4dda5c437f0 | 3234 | /* Send LSB of Memory Address */ |
mbed_official | 133:d4dda5c437f0 | 3235 | hi2c->Instance->DR = __HAL_I2C_MEM_ADD_LSB(MemAddress); |
mbed_official | 133:d4dda5c437f0 | 3236 | } |
mbed_official | 133:d4dda5c437f0 | 3237 | |
mbed_official | 133:d4dda5c437f0 | 3238 | return HAL_OK; |
mbed_official | 133:d4dda5c437f0 | 3239 | } |
mbed_official | 133:d4dda5c437f0 | 3240 | |
mbed_official | 133:d4dda5c437f0 | 3241 | /** |
mbed_official | 133:d4dda5c437f0 | 3242 | * @brief Master sends target device address followed by internal memory address for read request. |
mbed_official | 242:7074e42da0b2 | 3243 | * @param hi2c: pointer to a I2C_HandleTypeDef structure that contains |
mbed_official | 242:7074e42da0b2 | 3244 | * the configuration information for I2C module |
mbed_official | 133:d4dda5c437f0 | 3245 | * @param DevAddress: Target device address |
mbed_official | 133:d4dda5c437f0 | 3246 | * @param MemAddress: Internal memory address |
mbed_official | 133:d4dda5c437f0 | 3247 | * @param MemAddSize: Size of internal memory address |
mbed_official | 133:d4dda5c437f0 | 3248 | * @retval HAL status |
mbed_official | 133:d4dda5c437f0 | 3249 | */ |
mbed_official | 133:d4dda5c437f0 | 3250 | static HAL_StatusTypeDef I2C_RequestMemoryRead(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint32_t Timeout) |
mbed_official | 133:d4dda5c437f0 | 3251 | { |
mbed_official | 133:d4dda5c437f0 | 3252 | /* Enable Acknowledge */ |
mbed_official | 133:d4dda5c437f0 | 3253 | hi2c->Instance->CR1 |= I2C_CR1_ACK; |
mbed_official | 133:d4dda5c437f0 | 3254 | |
mbed_official | 133:d4dda5c437f0 | 3255 | /* Generate Start */ |
mbed_official | 133:d4dda5c437f0 | 3256 | hi2c->Instance->CR1 |= I2C_CR1_START; |
mbed_official | 133:d4dda5c437f0 | 3257 | |
mbed_official | 133:d4dda5c437f0 | 3258 | /* Wait until SB flag is set */ |
mbed_official | 133:d4dda5c437f0 | 3259 | if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_SB, RESET, Timeout) != HAL_OK) |
mbed_official | 133:d4dda5c437f0 | 3260 | { |
mbed_official | 133:d4dda5c437f0 | 3261 | return HAL_TIMEOUT; |
mbed_official | 133:d4dda5c437f0 | 3262 | } |
mbed_official | 133:d4dda5c437f0 | 3263 | |
mbed_official | 133:d4dda5c437f0 | 3264 | /* Send slave address */ |
mbed_official | 133:d4dda5c437f0 | 3265 | hi2c->Instance->DR = __HAL_I2C_7BIT_ADD_WRITE(DevAddress); |
mbed_official | 133:d4dda5c437f0 | 3266 | |
mbed_official | 133:d4dda5c437f0 | 3267 | /* Wait until ADDR flag is set */ |
mbed_official | 133:d4dda5c437f0 | 3268 | if(I2C_WaitOnMasterAddressFlagUntilTimeout(hi2c, I2C_FLAG_ADDR, Timeout) != HAL_OK) |
mbed_official | 133:d4dda5c437f0 | 3269 | { |
mbed_official | 133:d4dda5c437f0 | 3270 | if(hi2c->ErrorCode == HAL_I2C_ERROR_AF) |
mbed_official | 133:d4dda5c437f0 | 3271 | { |
mbed_official | 133:d4dda5c437f0 | 3272 | return HAL_ERROR; |
mbed_official | 133:d4dda5c437f0 | 3273 | } |
mbed_official | 133:d4dda5c437f0 | 3274 | else |
mbed_official | 133:d4dda5c437f0 | 3275 | { |
mbed_official | 133:d4dda5c437f0 | 3276 | return HAL_TIMEOUT; |
mbed_official | 133:d4dda5c437f0 | 3277 | } |
mbed_official | 133:d4dda5c437f0 | 3278 | } |
mbed_official | 133:d4dda5c437f0 | 3279 | |
mbed_official | 133:d4dda5c437f0 | 3280 | /* Clear ADDR flag */ |
mbed_official | 133:d4dda5c437f0 | 3281 | __HAL_I2C_CLEAR_ADDRFLAG(hi2c); |
mbed_official | 133:d4dda5c437f0 | 3282 | |
mbed_official | 133:d4dda5c437f0 | 3283 | /* Wait until TXE flag is set */ |
mbed_official | 133:d4dda5c437f0 | 3284 | if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_TXE, RESET, Timeout) != HAL_OK) |
mbed_official | 133:d4dda5c437f0 | 3285 | { |
mbed_official | 133:d4dda5c437f0 | 3286 | return HAL_TIMEOUT; |
mbed_official | 133:d4dda5c437f0 | 3287 | } |
mbed_official | 133:d4dda5c437f0 | 3288 | |
mbed_official | 133:d4dda5c437f0 | 3289 | /* If Memory address size is 8Bit */ |
mbed_official | 133:d4dda5c437f0 | 3290 | if(MemAddSize == I2C_MEMADD_SIZE_8BIT) |
mbed_official | 133:d4dda5c437f0 | 3291 | { |
mbed_official | 133:d4dda5c437f0 | 3292 | /* Send Memory Address */ |
mbed_official | 133:d4dda5c437f0 | 3293 | hi2c->Instance->DR = __HAL_I2C_MEM_ADD_LSB(MemAddress); |
mbed_official | 133:d4dda5c437f0 | 3294 | } |
mbed_official | 133:d4dda5c437f0 | 3295 | /* If Memory address size is 16Bit */ |
mbed_official | 133:d4dda5c437f0 | 3296 | else |
mbed_official | 133:d4dda5c437f0 | 3297 | { |
mbed_official | 133:d4dda5c437f0 | 3298 | /* Send MSB of Memory Address */ |
mbed_official | 133:d4dda5c437f0 | 3299 | hi2c->Instance->DR = __HAL_I2C_MEM_ADD_MSB(MemAddress); |
mbed_official | 133:d4dda5c437f0 | 3300 | |
mbed_official | 133:d4dda5c437f0 | 3301 | /* Wait until TXE flag is set */ |
mbed_official | 133:d4dda5c437f0 | 3302 | if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_TXE, RESET, Timeout) != HAL_OK) |
mbed_official | 133:d4dda5c437f0 | 3303 | { |
mbed_official | 133:d4dda5c437f0 | 3304 | return HAL_TIMEOUT; |
mbed_official | 133:d4dda5c437f0 | 3305 | } |
mbed_official | 133:d4dda5c437f0 | 3306 | |
mbed_official | 133:d4dda5c437f0 | 3307 | /* Send LSB of Memory Address */ |
mbed_official | 133:d4dda5c437f0 | 3308 | hi2c->Instance->DR = __HAL_I2C_MEM_ADD_LSB(MemAddress); |
mbed_official | 133:d4dda5c437f0 | 3309 | } |
mbed_official | 133:d4dda5c437f0 | 3310 | |
mbed_official | 133:d4dda5c437f0 | 3311 | /* Wait until TXE flag is set */ |
mbed_official | 133:d4dda5c437f0 | 3312 | if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_TXE, RESET, Timeout) != HAL_OK) |
mbed_official | 133:d4dda5c437f0 | 3313 | { |
mbed_official | 133:d4dda5c437f0 | 3314 | return HAL_TIMEOUT; |
mbed_official | 133:d4dda5c437f0 | 3315 | } |
mbed_official | 133:d4dda5c437f0 | 3316 | |
mbed_official | 133:d4dda5c437f0 | 3317 | /* Generate Restart */ |
mbed_official | 133:d4dda5c437f0 | 3318 | hi2c->Instance->CR1 |= I2C_CR1_START; |
mbed_official | 133:d4dda5c437f0 | 3319 | |
mbed_official | 133:d4dda5c437f0 | 3320 | /* Wait until SB flag is set */ |
mbed_official | 133:d4dda5c437f0 | 3321 | if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_SB, RESET, Timeout) != HAL_OK) |
mbed_official | 133:d4dda5c437f0 | 3322 | { |
mbed_official | 133:d4dda5c437f0 | 3323 | return HAL_TIMEOUT; |
mbed_official | 133:d4dda5c437f0 | 3324 | } |
mbed_official | 133:d4dda5c437f0 | 3325 | |
mbed_official | 133:d4dda5c437f0 | 3326 | /* Send slave address */ |
mbed_official | 133:d4dda5c437f0 | 3327 | hi2c->Instance->DR = __HAL_I2C_7BIT_ADD_READ(DevAddress); |
mbed_official | 133:d4dda5c437f0 | 3328 | |
mbed_official | 133:d4dda5c437f0 | 3329 | /* Wait until ADDR flag is set */ |
mbed_official | 133:d4dda5c437f0 | 3330 | if(I2C_WaitOnMasterAddressFlagUntilTimeout(hi2c, I2C_FLAG_ADDR, Timeout) != HAL_OK) |
mbed_official | 133:d4dda5c437f0 | 3331 | { |
mbed_official | 133:d4dda5c437f0 | 3332 | if(hi2c->ErrorCode == HAL_I2C_ERROR_AF) |
mbed_official | 133:d4dda5c437f0 | 3333 | { |
mbed_official | 133:d4dda5c437f0 | 3334 | return HAL_ERROR; |
mbed_official | 133:d4dda5c437f0 | 3335 | } |
mbed_official | 133:d4dda5c437f0 | 3336 | else |
mbed_official | 133:d4dda5c437f0 | 3337 | { |
mbed_official | 133:d4dda5c437f0 | 3338 | return HAL_TIMEOUT; |
mbed_official | 133:d4dda5c437f0 | 3339 | } |
mbed_official | 133:d4dda5c437f0 | 3340 | } |
mbed_official | 133:d4dda5c437f0 | 3341 | |
mbed_official | 133:d4dda5c437f0 | 3342 | return HAL_OK; |
mbed_official | 133:d4dda5c437f0 | 3343 | } |
mbed_official | 133:d4dda5c437f0 | 3344 | |
mbed_official | 133:d4dda5c437f0 | 3345 | /** |
mbed_official | 133:d4dda5c437f0 | 3346 | * @brief DMA I2C master transmit process complete callback. |
mbed_official | 133:d4dda5c437f0 | 3347 | * @param hdma: DMA handle |
mbed_official | 133:d4dda5c437f0 | 3348 | * @retval None |
mbed_official | 133:d4dda5c437f0 | 3349 | */ |
mbed_official | 133:d4dda5c437f0 | 3350 | static void I2C_DMAMasterTransmitCplt(DMA_HandleTypeDef *hdma) |
mbed_official | 133:d4dda5c437f0 | 3351 | { |
mbed_official | 133:d4dda5c437f0 | 3352 | I2C_HandleTypeDef* hi2c = (I2C_HandleTypeDef*)((DMA_HandleTypeDef*)hdma)->Parent; |
mbed_official | 133:d4dda5c437f0 | 3353 | |
mbed_official | 133:d4dda5c437f0 | 3354 | /* Wait until BTF flag is reset */ |
mbed_official | 133:d4dda5c437f0 | 3355 | if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BTF, RESET, I2C_TIMEOUT_FLAG) != HAL_OK) |
mbed_official | 133:d4dda5c437f0 | 3356 | { |
mbed_official | 133:d4dda5c437f0 | 3357 | hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT; |
mbed_official | 133:d4dda5c437f0 | 3358 | } |
mbed_official | 133:d4dda5c437f0 | 3359 | |
mbed_official | 133:d4dda5c437f0 | 3360 | /* Generate Stop */ |
mbed_official | 133:d4dda5c437f0 | 3361 | hi2c->Instance->CR1 |= I2C_CR1_STOP; |
mbed_official | 133:d4dda5c437f0 | 3362 | |
mbed_official | 133:d4dda5c437f0 | 3363 | /* Disable DMA Request */ |
mbed_official | 133:d4dda5c437f0 | 3364 | hi2c->Instance->CR2 &= ~I2C_CR2_DMAEN; |
mbed_official | 133:d4dda5c437f0 | 3365 | |
mbed_official | 133:d4dda5c437f0 | 3366 | hi2c->XferCount = 0; |
mbed_official | 133:d4dda5c437f0 | 3367 | |
mbed_official | 133:d4dda5c437f0 | 3368 | /* Wait until BUSY flag is reset */ |
mbed_official | 133:d4dda5c437f0 | 3369 | if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_FLAG) != HAL_OK) |
mbed_official | 133:d4dda5c437f0 | 3370 | { |
mbed_official | 133:d4dda5c437f0 | 3371 | hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT; |
mbed_official | 133:d4dda5c437f0 | 3372 | } |
mbed_official | 133:d4dda5c437f0 | 3373 | |
mbed_official | 133:d4dda5c437f0 | 3374 | hi2c->State = HAL_I2C_STATE_READY; |
mbed_official | 133:d4dda5c437f0 | 3375 | |
mbed_official | 133:d4dda5c437f0 | 3376 | /* Check if Errors has been detected during transfer */ |
mbed_official | 133:d4dda5c437f0 | 3377 | if(hi2c->ErrorCode != HAL_I2C_ERROR_NONE) |
mbed_official | 133:d4dda5c437f0 | 3378 | { |
mbed_official | 133:d4dda5c437f0 | 3379 | HAL_I2C_ErrorCallback(hi2c); |
mbed_official | 133:d4dda5c437f0 | 3380 | } |
mbed_official | 133:d4dda5c437f0 | 3381 | else |
mbed_official | 133:d4dda5c437f0 | 3382 | { |
mbed_official | 133:d4dda5c437f0 | 3383 | HAL_I2C_MasterTxCpltCallback(hi2c); |
mbed_official | 133:d4dda5c437f0 | 3384 | } |
mbed_official | 133:d4dda5c437f0 | 3385 | } |
mbed_official | 133:d4dda5c437f0 | 3386 | |
mbed_official | 133:d4dda5c437f0 | 3387 | /** |
mbed_official | 133:d4dda5c437f0 | 3388 | * @brief DMA I2C slave transmit process complete callback. |
mbed_official | 133:d4dda5c437f0 | 3389 | * @param hdma: DMA handle |
mbed_official | 133:d4dda5c437f0 | 3390 | * @retval None |
mbed_official | 133:d4dda5c437f0 | 3391 | */ |
mbed_official | 133:d4dda5c437f0 | 3392 | static void I2C_DMASlaveTransmitCplt(DMA_HandleTypeDef *hdma) |
mbed_official | 133:d4dda5c437f0 | 3393 | { |
mbed_official | 133:d4dda5c437f0 | 3394 | I2C_HandleTypeDef* hi2c = (I2C_HandleTypeDef*)((DMA_HandleTypeDef*)hdma)->Parent; |
mbed_official | 133:d4dda5c437f0 | 3395 | |
mbed_official | 133:d4dda5c437f0 | 3396 | /* Wait until AF flag is reset */ |
mbed_official | 133:d4dda5c437f0 | 3397 | if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_AF, RESET, I2C_TIMEOUT_FLAG) != HAL_OK) |
mbed_official | 133:d4dda5c437f0 | 3398 | { |
mbed_official | 133:d4dda5c437f0 | 3399 | hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT; |
mbed_official | 133:d4dda5c437f0 | 3400 | } |
mbed_official | 133:d4dda5c437f0 | 3401 | |
mbed_official | 133:d4dda5c437f0 | 3402 | /* Clear AF flag */ |
mbed_official | 133:d4dda5c437f0 | 3403 | __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF); |
mbed_official | 133:d4dda5c437f0 | 3404 | |
mbed_official | 133:d4dda5c437f0 | 3405 | /* Disable Address Acknowledge */ |
mbed_official | 133:d4dda5c437f0 | 3406 | hi2c->Instance->CR1 &= ~I2C_CR1_ACK; |
mbed_official | 133:d4dda5c437f0 | 3407 | |
mbed_official | 133:d4dda5c437f0 | 3408 | /* Disable DMA Request */ |
mbed_official | 133:d4dda5c437f0 | 3409 | hi2c->Instance->CR2 &= ~I2C_CR2_DMAEN; |
mbed_official | 133:d4dda5c437f0 | 3410 | |
mbed_official | 133:d4dda5c437f0 | 3411 | hi2c->XferCount = 0; |
mbed_official | 133:d4dda5c437f0 | 3412 | |
mbed_official | 133:d4dda5c437f0 | 3413 | /* Wait until BUSY flag is reset */ |
mbed_official | 133:d4dda5c437f0 | 3414 | if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_FLAG) != HAL_OK) |
mbed_official | 133:d4dda5c437f0 | 3415 | { |
mbed_official | 133:d4dda5c437f0 | 3416 | hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT; |
mbed_official | 133:d4dda5c437f0 | 3417 | } |
mbed_official | 133:d4dda5c437f0 | 3418 | |
mbed_official | 133:d4dda5c437f0 | 3419 | hi2c->State = HAL_I2C_STATE_READY; |
mbed_official | 133:d4dda5c437f0 | 3420 | |
mbed_official | 133:d4dda5c437f0 | 3421 | /* Check if Errors has been detected during transfer */ |
mbed_official | 133:d4dda5c437f0 | 3422 | if(hi2c->ErrorCode != HAL_I2C_ERROR_NONE) |
mbed_official | 133:d4dda5c437f0 | 3423 | { |
mbed_official | 133:d4dda5c437f0 | 3424 | HAL_I2C_ErrorCallback(hi2c); |
mbed_official | 133:d4dda5c437f0 | 3425 | } |
mbed_official | 133:d4dda5c437f0 | 3426 | else |
mbed_official | 133:d4dda5c437f0 | 3427 | { |
mbed_official | 133:d4dda5c437f0 | 3428 | HAL_I2C_SlaveTxCpltCallback(hi2c); |
mbed_official | 133:d4dda5c437f0 | 3429 | } |
mbed_official | 133:d4dda5c437f0 | 3430 | } |
mbed_official | 133:d4dda5c437f0 | 3431 | |
mbed_official | 133:d4dda5c437f0 | 3432 | /** |
mbed_official | 133:d4dda5c437f0 | 3433 | * @brief DMA I2C master receive process complete callback |
mbed_official | 133:d4dda5c437f0 | 3434 | * @param hdma: DMA handle |
mbed_official | 133:d4dda5c437f0 | 3435 | * @retval None |
mbed_official | 133:d4dda5c437f0 | 3436 | */ |
mbed_official | 133:d4dda5c437f0 | 3437 | static void I2C_DMAMasterReceiveCplt(DMA_HandleTypeDef *hdma) |
mbed_official | 133:d4dda5c437f0 | 3438 | { |
mbed_official | 133:d4dda5c437f0 | 3439 | I2C_HandleTypeDef* hi2c = (I2C_HandleTypeDef*)((DMA_HandleTypeDef*)hdma)->Parent; |
mbed_official | 133:d4dda5c437f0 | 3440 | |
mbed_official | 133:d4dda5c437f0 | 3441 | /* Generate Stop */ |
mbed_official | 133:d4dda5c437f0 | 3442 | hi2c->Instance->CR1 |= I2C_CR1_STOP; |
mbed_official | 133:d4dda5c437f0 | 3443 | |
mbed_official | 133:d4dda5c437f0 | 3444 | /* Disable Last DMA */ |
mbed_official | 133:d4dda5c437f0 | 3445 | hi2c->Instance->CR2 &= ~I2C_CR2_LAST; |
mbed_official | 133:d4dda5c437f0 | 3446 | |
mbed_official | 133:d4dda5c437f0 | 3447 | /* Disable Acknowledge */ |
mbed_official | 133:d4dda5c437f0 | 3448 | hi2c->Instance->CR1 &= ~I2C_CR1_ACK; |
mbed_official | 133:d4dda5c437f0 | 3449 | |
mbed_official | 133:d4dda5c437f0 | 3450 | /* Disable DMA Request */ |
mbed_official | 133:d4dda5c437f0 | 3451 | hi2c->Instance->CR2 &= ~I2C_CR2_DMAEN; |
mbed_official | 133:d4dda5c437f0 | 3452 | |
mbed_official | 133:d4dda5c437f0 | 3453 | hi2c->XferCount = 0; |
mbed_official | 133:d4dda5c437f0 | 3454 | |
mbed_official | 133:d4dda5c437f0 | 3455 | /* Wait until BUSY flag is reset */ |
mbed_official | 133:d4dda5c437f0 | 3456 | if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_FLAG) != HAL_OK) |
mbed_official | 133:d4dda5c437f0 | 3457 | { |
mbed_official | 133:d4dda5c437f0 | 3458 | hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT; |
mbed_official | 133:d4dda5c437f0 | 3459 | } |
mbed_official | 133:d4dda5c437f0 | 3460 | |
mbed_official | 133:d4dda5c437f0 | 3461 | hi2c->State = HAL_I2C_STATE_READY; |
mbed_official | 133:d4dda5c437f0 | 3462 | |
mbed_official | 133:d4dda5c437f0 | 3463 | /* Check if Errors has been detected during transfer */ |
mbed_official | 133:d4dda5c437f0 | 3464 | if(hi2c->ErrorCode != HAL_I2C_ERROR_NONE) |
mbed_official | 133:d4dda5c437f0 | 3465 | { |
mbed_official | 133:d4dda5c437f0 | 3466 | HAL_I2C_ErrorCallback(hi2c); |
mbed_official | 133:d4dda5c437f0 | 3467 | } |
mbed_official | 133:d4dda5c437f0 | 3468 | else |
mbed_official | 133:d4dda5c437f0 | 3469 | { |
mbed_official | 133:d4dda5c437f0 | 3470 | HAL_I2C_MasterRxCpltCallback(hi2c); |
mbed_official | 133:d4dda5c437f0 | 3471 | } |
mbed_official | 133:d4dda5c437f0 | 3472 | } |
mbed_official | 133:d4dda5c437f0 | 3473 | |
mbed_official | 133:d4dda5c437f0 | 3474 | /** |
mbed_official | 133:d4dda5c437f0 | 3475 | * @brief DMA I2C slave receive process complete callback. |
mbed_official | 133:d4dda5c437f0 | 3476 | * @param hdma: DMA handle |
mbed_official | 133:d4dda5c437f0 | 3477 | * @retval None |
mbed_official | 133:d4dda5c437f0 | 3478 | */ |
mbed_official | 133:d4dda5c437f0 | 3479 | static void I2C_DMASlaveReceiveCplt(DMA_HandleTypeDef *hdma) |
mbed_official | 133:d4dda5c437f0 | 3480 | { |
mbed_official | 133:d4dda5c437f0 | 3481 | I2C_HandleTypeDef* hi2c = (I2C_HandleTypeDef*)((DMA_HandleTypeDef*)hdma)->Parent; |
mbed_official | 133:d4dda5c437f0 | 3482 | |
mbed_official | 133:d4dda5c437f0 | 3483 | /* Wait until STOPF flag is reset */ |
mbed_official | 133:d4dda5c437f0 | 3484 | if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_STOPF, RESET, I2C_TIMEOUT_FLAG) != HAL_OK) |
mbed_official | 133:d4dda5c437f0 | 3485 | { |
mbed_official | 133:d4dda5c437f0 | 3486 | hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT; |
mbed_official | 133:d4dda5c437f0 | 3487 | } |
mbed_official | 133:d4dda5c437f0 | 3488 | |
mbed_official | 133:d4dda5c437f0 | 3489 | /* Clear STOPF flag */ |
mbed_official | 133:d4dda5c437f0 | 3490 | __HAL_I2C_CLEAR_STOPFLAG(hi2c); |
mbed_official | 133:d4dda5c437f0 | 3491 | |
mbed_official | 133:d4dda5c437f0 | 3492 | /* Disable Address Acknowledge */ |
mbed_official | 133:d4dda5c437f0 | 3493 | hi2c->Instance->CR1 &= ~I2C_CR1_ACK; |
mbed_official | 133:d4dda5c437f0 | 3494 | |
mbed_official | 133:d4dda5c437f0 | 3495 | /* Disable DMA Request */ |
mbed_official | 133:d4dda5c437f0 | 3496 | hi2c->Instance->CR2 &= ~I2C_CR2_DMAEN; |
mbed_official | 133:d4dda5c437f0 | 3497 | |
mbed_official | 133:d4dda5c437f0 | 3498 | hi2c->XferCount = 0; |
mbed_official | 133:d4dda5c437f0 | 3499 | |
mbed_official | 133:d4dda5c437f0 | 3500 | /* Wait until BUSY flag is reset */ |
mbed_official | 133:d4dda5c437f0 | 3501 | if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_FLAG) != HAL_OK) |
mbed_official | 133:d4dda5c437f0 | 3502 | { |
mbed_official | 133:d4dda5c437f0 | 3503 | hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT; |
mbed_official | 133:d4dda5c437f0 | 3504 | } |
mbed_official | 133:d4dda5c437f0 | 3505 | |
mbed_official | 133:d4dda5c437f0 | 3506 | hi2c->State = HAL_I2C_STATE_READY; |
mbed_official | 133:d4dda5c437f0 | 3507 | |
mbed_official | 133:d4dda5c437f0 | 3508 | /* Check if Errors has been detected during transfer */ |
mbed_official | 133:d4dda5c437f0 | 3509 | if(hi2c->ErrorCode != HAL_I2C_ERROR_NONE) |
mbed_official | 133:d4dda5c437f0 | 3510 | { |
mbed_official | 133:d4dda5c437f0 | 3511 | HAL_I2C_ErrorCallback(hi2c); |
mbed_official | 133:d4dda5c437f0 | 3512 | } |
mbed_official | 133:d4dda5c437f0 | 3513 | else |
mbed_official | 133:d4dda5c437f0 | 3514 | { |
mbed_official | 133:d4dda5c437f0 | 3515 | HAL_I2C_SlaveRxCpltCallback(hi2c); |
mbed_official | 133:d4dda5c437f0 | 3516 | } |
mbed_official | 133:d4dda5c437f0 | 3517 | } |
mbed_official | 133:d4dda5c437f0 | 3518 | |
mbed_official | 133:d4dda5c437f0 | 3519 | /** |
mbed_official | 133:d4dda5c437f0 | 3520 | * @brief DMA I2C Memory Write process complete callback |
mbed_official | 133:d4dda5c437f0 | 3521 | * @param hdma: DMA handle |
mbed_official | 133:d4dda5c437f0 | 3522 | * @retval None |
mbed_official | 133:d4dda5c437f0 | 3523 | */ |
mbed_official | 133:d4dda5c437f0 | 3524 | static void I2C_DMAMemTransmitCplt(DMA_HandleTypeDef *hdma) |
mbed_official | 133:d4dda5c437f0 | 3525 | { |
mbed_official | 133:d4dda5c437f0 | 3526 | I2C_HandleTypeDef* hi2c = (I2C_HandleTypeDef*)((DMA_HandleTypeDef*)hdma)->Parent; |
mbed_official | 133:d4dda5c437f0 | 3527 | |
mbed_official | 133:d4dda5c437f0 | 3528 | /* Wait until BTF flag is reset */ |
mbed_official | 133:d4dda5c437f0 | 3529 | if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BTF, RESET, I2C_TIMEOUT_FLAG) != HAL_OK) |
mbed_official | 133:d4dda5c437f0 | 3530 | { |
mbed_official | 133:d4dda5c437f0 | 3531 | hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT; |
mbed_official | 133:d4dda5c437f0 | 3532 | } |
mbed_official | 133:d4dda5c437f0 | 3533 | |
mbed_official | 133:d4dda5c437f0 | 3534 | /* Generate Stop */ |
mbed_official | 133:d4dda5c437f0 | 3535 | hi2c->Instance->CR1 |= I2C_CR1_STOP; |
mbed_official | 133:d4dda5c437f0 | 3536 | |
mbed_official | 133:d4dda5c437f0 | 3537 | /* Disable DMA Request */ |
mbed_official | 133:d4dda5c437f0 | 3538 | hi2c->Instance->CR2 &= ~I2C_CR2_DMAEN; |
mbed_official | 133:d4dda5c437f0 | 3539 | |
mbed_official | 133:d4dda5c437f0 | 3540 | hi2c->XferCount = 0; |
mbed_official | 133:d4dda5c437f0 | 3541 | |
mbed_official | 133:d4dda5c437f0 | 3542 | /* Wait until BUSY flag is reset */ |
mbed_official | 133:d4dda5c437f0 | 3543 | if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_FLAG) != HAL_OK) |
mbed_official | 133:d4dda5c437f0 | 3544 | { |
mbed_official | 133:d4dda5c437f0 | 3545 | hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT; |
mbed_official | 133:d4dda5c437f0 | 3546 | } |
mbed_official | 133:d4dda5c437f0 | 3547 | |
mbed_official | 133:d4dda5c437f0 | 3548 | hi2c->State = HAL_I2C_STATE_READY; |
mbed_official | 133:d4dda5c437f0 | 3549 | |
mbed_official | 133:d4dda5c437f0 | 3550 | /* Check if Errors has been detected during transfer */ |
mbed_official | 133:d4dda5c437f0 | 3551 | if(hi2c->ErrorCode != HAL_I2C_ERROR_NONE) |
mbed_official | 133:d4dda5c437f0 | 3552 | { |
mbed_official | 133:d4dda5c437f0 | 3553 | HAL_I2C_ErrorCallback(hi2c); |
mbed_official | 133:d4dda5c437f0 | 3554 | } |
mbed_official | 133:d4dda5c437f0 | 3555 | else |
mbed_official | 133:d4dda5c437f0 | 3556 | { |
mbed_official | 133:d4dda5c437f0 | 3557 | HAL_I2C_MemTxCpltCallback(hi2c); |
mbed_official | 133:d4dda5c437f0 | 3558 | } |
mbed_official | 133:d4dda5c437f0 | 3559 | } |
mbed_official | 133:d4dda5c437f0 | 3560 | |
mbed_official | 133:d4dda5c437f0 | 3561 | /** |
mbed_official | 133:d4dda5c437f0 | 3562 | * @brief DMA I2C Memory Read process complete callback |
mbed_official | 133:d4dda5c437f0 | 3563 | * @param hdma: DMA handle |
mbed_official | 133:d4dda5c437f0 | 3564 | * @retval None |
mbed_official | 133:d4dda5c437f0 | 3565 | */ |
mbed_official | 133:d4dda5c437f0 | 3566 | static void I2C_DMAMemReceiveCplt(DMA_HandleTypeDef *hdma) |
mbed_official | 133:d4dda5c437f0 | 3567 | { |
mbed_official | 133:d4dda5c437f0 | 3568 | I2C_HandleTypeDef* hi2c = (I2C_HandleTypeDef*)((DMA_HandleTypeDef*)hdma)->Parent; |
mbed_official | 133:d4dda5c437f0 | 3569 | |
mbed_official | 133:d4dda5c437f0 | 3570 | /* Generate Stop */ |
mbed_official | 133:d4dda5c437f0 | 3571 | hi2c->Instance->CR1 |= I2C_CR1_STOP; |
mbed_official | 133:d4dda5c437f0 | 3572 | |
mbed_official | 133:d4dda5c437f0 | 3573 | /* Disable Last DMA */ |
mbed_official | 133:d4dda5c437f0 | 3574 | hi2c->Instance->CR2 &= ~I2C_CR2_LAST; |
mbed_official | 133:d4dda5c437f0 | 3575 | |
mbed_official | 133:d4dda5c437f0 | 3576 | /* Disable Acknowledge */ |
mbed_official | 133:d4dda5c437f0 | 3577 | hi2c->Instance->CR1 &= ~I2C_CR1_ACK; |
mbed_official | 133:d4dda5c437f0 | 3578 | |
mbed_official | 133:d4dda5c437f0 | 3579 | /* Disable DMA Request */ |
mbed_official | 133:d4dda5c437f0 | 3580 | hi2c->Instance->CR2 &= ~I2C_CR2_DMAEN; |
mbed_official | 133:d4dda5c437f0 | 3581 | |
mbed_official | 133:d4dda5c437f0 | 3582 | hi2c->XferCount = 0; |
mbed_official | 133:d4dda5c437f0 | 3583 | |
mbed_official | 133:d4dda5c437f0 | 3584 | /* Wait until BUSY flag is reset */ |
mbed_official | 133:d4dda5c437f0 | 3585 | if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_FLAG) != HAL_OK) |
mbed_official | 133:d4dda5c437f0 | 3586 | { |
mbed_official | 133:d4dda5c437f0 | 3587 | hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT; |
mbed_official | 133:d4dda5c437f0 | 3588 | } |
mbed_official | 133:d4dda5c437f0 | 3589 | |
mbed_official | 133:d4dda5c437f0 | 3590 | hi2c->State = HAL_I2C_STATE_READY; |
mbed_official | 133:d4dda5c437f0 | 3591 | |
mbed_official | 133:d4dda5c437f0 | 3592 | /* Check if Errors has been detected during transfer */ |
mbed_official | 133:d4dda5c437f0 | 3593 | if(hi2c->ErrorCode != HAL_I2C_ERROR_NONE) |
mbed_official | 133:d4dda5c437f0 | 3594 | { |
mbed_official | 133:d4dda5c437f0 | 3595 | HAL_I2C_ErrorCallback(hi2c); |
mbed_official | 133:d4dda5c437f0 | 3596 | } |
mbed_official | 133:d4dda5c437f0 | 3597 | else |
mbed_official | 133:d4dda5c437f0 | 3598 | { |
mbed_official | 133:d4dda5c437f0 | 3599 | HAL_I2C_MemRxCpltCallback(hi2c); |
mbed_official | 133:d4dda5c437f0 | 3600 | } |
mbed_official | 133:d4dda5c437f0 | 3601 | } |
mbed_official | 133:d4dda5c437f0 | 3602 | |
mbed_official | 133:d4dda5c437f0 | 3603 | /** |
mbed_official | 133:d4dda5c437f0 | 3604 | * @brief DMA I2C communication error callback. |
mbed_official | 133:d4dda5c437f0 | 3605 | * @param hdma: DMA handle |
mbed_official | 133:d4dda5c437f0 | 3606 | * @retval None |
mbed_official | 133:d4dda5c437f0 | 3607 | */ |
mbed_official | 133:d4dda5c437f0 | 3608 | static void I2C_DMAError(DMA_HandleTypeDef *hdma) |
mbed_official | 133:d4dda5c437f0 | 3609 | { |
mbed_official | 133:d4dda5c437f0 | 3610 | I2C_HandleTypeDef* hi2c = (I2C_HandleTypeDef*)((DMA_HandleTypeDef*)hdma)->Parent; |
mbed_official | 133:d4dda5c437f0 | 3611 | |
mbed_official | 133:d4dda5c437f0 | 3612 | /* Disable Acknowledge */ |
mbed_official | 133:d4dda5c437f0 | 3613 | hi2c->Instance->CR1 &= ~I2C_CR1_ACK; |
mbed_official | 133:d4dda5c437f0 | 3614 | |
mbed_official | 133:d4dda5c437f0 | 3615 | hi2c->XferCount = 0; |
mbed_official | 133:d4dda5c437f0 | 3616 | |
mbed_official | 133:d4dda5c437f0 | 3617 | hi2c->State = HAL_I2C_STATE_READY; |
mbed_official | 133:d4dda5c437f0 | 3618 | |
mbed_official | 133:d4dda5c437f0 | 3619 | hi2c->ErrorCode |= HAL_I2C_ERROR_DMA; |
mbed_official | 133:d4dda5c437f0 | 3620 | |
mbed_official | 133:d4dda5c437f0 | 3621 | HAL_I2C_ErrorCallback(hi2c); |
mbed_official | 133:d4dda5c437f0 | 3622 | } |
mbed_official | 133:d4dda5c437f0 | 3623 | |
mbed_official | 133:d4dda5c437f0 | 3624 | /** |
mbed_official | 133:d4dda5c437f0 | 3625 | * @brief This function handles I2C Communication Timeout. |
mbed_official | 242:7074e42da0b2 | 3626 | * @param hi2c: pointer to a I2C_HandleTypeDef structure that contains |
mbed_official | 242:7074e42da0b2 | 3627 | * the configuration information for I2C module |
mbed_official | 133:d4dda5c437f0 | 3628 | * @param Flag: specifies the I2C flag to check. |
mbed_official | 133:d4dda5c437f0 | 3629 | * @param Status: The new Flag status (SET or RESET). |
mbed_official | 133:d4dda5c437f0 | 3630 | * @param Timeout: Timeout duration |
mbed_official | 133:d4dda5c437f0 | 3631 | * @retval HAL status |
mbed_official | 133:d4dda5c437f0 | 3632 | */ |
mbed_official | 133:d4dda5c437f0 | 3633 | static HAL_StatusTypeDef I2C_WaitOnFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Flag, FlagStatus Status, uint32_t Timeout) |
mbed_official | 133:d4dda5c437f0 | 3634 | { |
mbed_official | 133:d4dda5c437f0 | 3635 | uint32_t timeout = 0; |
mbed_official | 133:d4dda5c437f0 | 3636 | |
mbed_official | 133:d4dda5c437f0 | 3637 | timeout = HAL_GetTick() + Timeout; |
mbed_official | 133:d4dda5c437f0 | 3638 | |
mbed_official | 133:d4dda5c437f0 | 3639 | /* Wait until flag is set */ |
mbed_official | 133:d4dda5c437f0 | 3640 | if(Status == RESET) |
mbed_official | 133:d4dda5c437f0 | 3641 | { |
mbed_official | 133:d4dda5c437f0 | 3642 | while(__HAL_I2C_GET_FLAG(hi2c, Flag) == RESET) |
mbed_official | 133:d4dda5c437f0 | 3643 | { |
mbed_official | 133:d4dda5c437f0 | 3644 | /* Check for the Timeout */ |
mbed_official | 133:d4dda5c437f0 | 3645 | if(Timeout != HAL_MAX_DELAY) |
mbed_official | 133:d4dda5c437f0 | 3646 | { |
mbed_official | 133:d4dda5c437f0 | 3647 | if(HAL_GetTick() >= timeout) |
mbed_official | 133:d4dda5c437f0 | 3648 | { |
mbed_official | 133:d4dda5c437f0 | 3649 | hi2c->State= HAL_I2C_STATE_READY; |
mbed_official | 133:d4dda5c437f0 | 3650 | |
mbed_official | 133:d4dda5c437f0 | 3651 | /* Process Unlocked */ |
mbed_official | 133:d4dda5c437f0 | 3652 | __HAL_UNLOCK(hi2c); |
mbed_official | 133:d4dda5c437f0 | 3653 | |
mbed_official | 133:d4dda5c437f0 | 3654 | return HAL_TIMEOUT; |
mbed_official | 133:d4dda5c437f0 | 3655 | } |
mbed_official | 133:d4dda5c437f0 | 3656 | } |
mbed_official | 133:d4dda5c437f0 | 3657 | } |
mbed_official | 133:d4dda5c437f0 | 3658 | } |
mbed_official | 133:d4dda5c437f0 | 3659 | else |
mbed_official | 133:d4dda5c437f0 | 3660 | { |
mbed_official | 133:d4dda5c437f0 | 3661 | while(__HAL_I2C_GET_FLAG(hi2c, Flag) != RESET) |
mbed_official | 133:d4dda5c437f0 | 3662 | { |
mbed_official | 133:d4dda5c437f0 | 3663 | /* Check for the Timeout */ |
mbed_official | 133:d4dda5c437f0 | 3664 | if(Timeout != HAL_MAX_DELAY) |
mbed_official | 133:d4dda5c437f0 | 3665 | { |
mbed_official | 133:d4dda5c437f0 | 3666 | if(HAL_GetTick() >= timeout) |
mbed_official | 133:d4dda5c437f0 | 3667 | { |
mbed_official | 133:d4dda5c437f0 | 3668 | hi2c->State= HAL_I2C_STATE_READY; |
mbed_official | 133:d4dda5c437f0 | 3669 | |
mbed_official | 133:d4dda5c437f0 | 3670 | /* Process Unlocked */ |
mbed_official | 133:d4dda5c437f0 | 3671 | __HAL_UNLOCK(hi2c); |
mbed_official | 133:d4dda5c437f0 | 3672 | |
mbed_official | 133:d4dda5c437f0 | 3673 | return HAL_TIMEOUT; |
mbed_official | 133:d4dda5c437f0 | 3674 | } |
mbed_official | 133:d4dda5c437f0 | 3675 | } |
mbed_official | 133:d4dda5c437f0 | 3676 | } |
mbed_official | 133:d4dda5c437f0 | 3677 | } |
mbed_official | 133:d4dda5c437f0 | 3678 | return HAL_OK; |
mbed_official | 133:d4dda5c437f0 | 3679 | } |
mbed_official | 133:d4dda5c437f0 | 3680 | |
mbed_official | 133:d4dda5c437f0 | 3681 | /** |
mbed_official | 133:d4dda5c437f0 | 3682 | * @brief This function handles I2C Communication Timeout for Master addressing phase. |
mbed_official | 242:7074e42da0b2 | 3683 | * @param hi2c: pointer to a I2C_HandleTypeDef structure that contains |
mbed_official | 242:7074e42da0b2 | 3684 | * the configuration information for I2C module |
mbed_official | 133:d4dda5c437f0 | 3685 | * @param Flag: specifies the I2C flag to check. |
mbed_official | 133:d4dda5c437f0 | 3686 | * @param Timeout: Timeout duration |
mbed_official | 133:d4dda5c437f0 | 3687 | * @retval HAL status |
mbed_official | 133:d4dda5c437f0 | 3688 | */ |
mbed_official | 133:d4dda5c437f0 | 3689 | static HAL_StatusTypeDef I2C_WaitOnMasterAddressFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Flag, uint32_t Timeout) |
mbed_official | 133:d4dda5c437f0 | 3690 | { |
mbed_official | 133:d4dda5c437f0 | 3691 | uint32_t timeout = 0; |
mbed_official | 133:d4dda5c437f0 | 3692 | |
mbed_official | 133:d4dda5c437f0 | 3693 | timeout = HAL_GetTick() + Timeout; |
mbed_official | 133:d4dda5c437f0 | 3694 | |
mbed_official | 133:d4dda5c437f0 | 3695 | while(__HAL_I2C_GET_FLAG(hi2c, Flag) == RESET) |
mbed_official | 133:d4dda5c437f0 | 3696 | { |
mbed_official | 133:d4dda5c437f0 | 3697 | if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_AF) == SET) |
mbed_official | 133:d4dda5c437f0 | 3698 | { |
mbed_official | 133:d4dda5c437f0 | 3699 | /* Generate Stop */ |
mbed_official | 133:d4dda5c437f0 | 3700 | hi2c->Instance->CR1 |= I2C_CR1_STOP; |
mbed_official | 133:d4dda5c437f0 | 3701 | |
mbed_official | 133:d4dda5c437f0 | 3702 | /* Clear AF Flag */ |
mbed_official | 133:d4dda5c437f0 | 3703 | __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF); |
mbed_official | 133:d4dda5c437f0 | 3704 | |
mbed_official | 133:d4dda5c437f0 | 3705 | hi2c->ErrorCode = HAL_I2C_ERROR_AF; |
mbed_official | 133:d4dda5c437f0 | 3706 | hi2c->State= HAL_I2C_STATE_READY; |
mbed_official | 133:d4dda5c437f0 | 3707 | |
mbed_official | 133:d4dda5c437f0 | 3708 | /* Process Unlocked */ |
mbed_official | 133:d4dda5c437f0 | 3709 | __HAL_UNLOCK(hi2c); |
mbed_official | 133:d4dda5c437f0 | 3710 | |
mbed_official | 133:d4dda5c437f0 | 3711 | return HAL_ERROR; |
mbed_official | 133:d4dda5c437f0 | 3712 | } |
mbed_official | 133:d4dda5c437f0 | 3713 | |
mbed_official | 133:d4dda5c437f0 | 3714 | /* Check for the Timeout */ |
mbed_official | 133:d4dda5c437f0 | 3715 | if(Timeout != HAL_MAX_DELAY) |
mbed_official | 133:d4dda5c437f0 | 3716 | { |
mbed_official | 133:d4dda5c437f0 | 3717 | if(HAL_GetTick() >= timeout) |
mbed_official | 133:d4dda5c437f0 | 3718 | { |
mbed_official | 133:d4dda5c437f0 | 3719 | hi2c->State= HAL_I2C_STATE_READY; |
mbed_official | 133:d4dda5c437f0 | 3720 | |
mbed_official | 133:d4dda5c437f0 | 3721 | /* Process Unlocked */ |
mbed_official | 133:d4dda5c437f0 | 3722 | __HAL_UNLOCK(hi2c); |
mbed_official | 133:d4dda5c437f0 | 3723 | |
mbed_official | 133:d4dda5c437f0 | 3724 | return HAL_TIMEOUT; |
mbed_official | 133:d4dda5c437f0 | 3725 | } |
mbed_official | 133:d4dda5c437f0 | 3726 | } |
mbed_official | 133:d4dda5c437f0 | 3727 | } |
mbed_official | 133:d4dda5c437f0 | 3728 | return HAL_OK; |
mbed_official | 133:d4dda5c437f0 | 3729 | } |
mbed_official | 133:d4dda5c437f0 | 3730 | |
mbed_official | 133:d4dda5c437f0 | 3731 | /** |
mbed_official | 133:d4dda5c437f0 | 3732 | * @} |
mbed_official | 133:d4dda5c437f0 | 3733 | */ |
mbed_official | 133:d4dda5c437f0 | 3734 | |
mbed_official | 133:d4dda5c437f0 | 3735 | #endif /* HAL_I2C_MODULE_ENABLED */ |
mbed_official | 133:d4dda5c437f0 | 3736 | |
mbed_official | 133:d4dda5c437f0 | 3737 | /** |
mbed_official | 133:d4dda5c437f0 | 3738 | * @} |
mbed_official | 133:d4dda5c437f0 | 3739 | */ |
mbed_official | 133:d4dda5c437f0 | 3740 | |
mbed_official | 133:d4dda5c437f0 | 3741 | /** |
mbed_official | 133:d4dda5c437f0 | 3742 | * @} |
mbed_official | 133:d4dda5c437f0 | 3743 | */ |
mbed_official | 133:d4dda5c437f0 | 3744 | |
mbed_official | 133:d4dda5c437f0 | 3745 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |