mbed library sources
Dependents: frdm_kl05z_gpio_test
Fork of mbed-src by
targets/cmsis/TARGET_STM/TARGET_NUCLEO_L053R8/stm32l0xx_hal_usart.c@323:9e901b0a5aa1, 2014-09-13 (annotated)
- Committer:
- shaoziyang
- Date:
- Sat Sep 13 14:25:46 2014 +0000
- Revision:
- 323:9e901b0a5aa1
- Parent:
- 181:a4cbdfbbd2f4
test with CLOCK_SETUP = 0
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
mbed_official | 181:a4cbdfbbd2f4 | 1 | /** |
mbed_official | 181:a4cbdfbbd2f4 | 2 | ****************************************************************************** |
mbed_official | 181:a4cbdfbbd2f4 | 3 | * @file stm32l0xx_hal_usart.c |
mbed_official | 181:a4cbdfbbd2f4 | 4 | * @author MCD Application Team |
mbed_official | 181:a4cbdfbbd2f4 | 5 | * @version V1.0.0 |
mbed_official | 181:a4cbdfbbd2f4 | 6 | * @date 22-April-2014 |
mbed_official | 181:a4cbdfbbd2f4 | 7 | * @brief USART HAL module driver. |
mbed_official | 181:a4cbdfbbd2f4 | 8 | * |
mbed_official | 181:a4cbdfbbd2f4 | 9 | * This file provides firmware functions to manage the following |
mbed_official | 181:a4cbdfbbd2f4 | 10 | * functionalities of the Universal Synchronous/Asynchronous Receiver Transmitter |
mbed_official | 181:a4cbdfbbd2f4 | 11 | * Peripheral (USART). |
mbed_official | 181:a4cbdfbbd2f4 | 12 | * + Initialization and de-initialization functions |
mbed_official | 181:a4cbdfbbd2f4 | 13 | * + IO operation functions |
mbed_official | 181:a4cbdfbbd2f4 | 14 | * + Peripheral Control functions |
mbed_official | 181:a4cbdfbbd2f4 | 15 | * |
mbed_official | 181:a4cbdfbbd2f4 | 16 | @verbatim |
mbed_official | 181:a4cbdfbbd2f4 | 17 | =============================================================================== |
mbed_official | 181:a4cbdfbbd2f4 | 18 | ##### How to use this driver ##### |
mbed_official | 181:a4cbdfbbd2f4 | 19 | =============================================================================== |
mbed_official | 181:a4cbdfbbd2f4 | 20 | [..] |
mbed_official | 181:a4cbdfbbd2f4 | 21 | The USART HAL driver can be used as follows: |
mbed_official | 181:a4cbdfbbd2f4 | 22 | |
mbed_official | 181:a4cbdfbbd2f4 | 23 | (#) Declare a USART_HandleTypeDef handle structure. |
mbed_official | 181:a4cbdfbbd2f4 | 24 | (#) Initialize the USART low level resources by implement the HAL_USART_MspInit ()API: |
mbed_official | 181:a4cbdfbbd2f4 | 25 | (##) Enable the USARTx interface clock. |
mbed_official | 181:a4cbdfbbd2f4 | 26 | (##) USART pins configuration: |
mbed_official | 181:a4cbdfbbd2f4 | 27 | (+) Enable the clock for the USART GPIOs. |
mbed_official | 181:a4cbdfbbd2f4 | 28 | (+) Configure these USART pins as alternate function pull-up. |
mbed_official | 181:a4cbdfbbd2f4 | 29 | (##) NVIC configuration if you need to use interrupt process (HAL_USART_Transmit_IT(), |
mbed_official | 181:a4cbdfbbd2f4 | 30 | HAL_USART_Receive_IT() and HAL_USART_TransmitReceive_IT() APIs): |
mbed_official | 181:a4cbdfbbd2f4 | 31 | (+) Configure the USARTx interrupt priority. |
mbed_official | 181:a4cbdfbbd2f4 | 32 | (+) Enable the NVIC USART IRQ handle. |
mbed_official | 181:a4cbdfbbd2f4 | 33 | (@) The specific USART interrupts (Transmission complete interrupt, |
mbed_official | 181:a4cbdfbbd2f4 | 34 | RXNE interrupt and Error Interrupts) will be managed using the macros |
mbed_official | 181:a4cbdfbbd2f4 | 35 | __HAL_USART_ENABLE_IT() and __HAL_USART_DISABLE_IT() inside the transmit and receive process. |
mbed_official | 181:a4cbdfbbd2f4 | 36 | (##) DMA Configuration if you need to use DMA process (HAL_USART_Transmit_DMA() |
mbed_official | 181:a4cbdfbbd2f4 | 37 | HAL_USART_Receive_IT() and HAL_USART_TransmitReceive_IT() APIs): |
mbed_official | 181:a4cbdfbbd2f4 | 38 | (+) Declare a DMA handle structure for the Tx/Rx stream. |
mbed_official | 181:a4cbdfbbd2f4 | 39 | (+) Enable the DMAx interface clock. |
mbed_official | 181:a4cbdfbbd2f4 | 40 | (+) Configure the declared DMA handle structure with the required Tx/Rx parameters. |
mbed_official | 181:a4cbdfbbd2f4 | 41 | (+) Configure the DMA Tx/Rx Stream. |
mbed_official | 181:a4cbdfbbd2f4 | 42 | (+) Associate the initilalized DMA handle to the USART DMA Tx/Rx handle. |
mbed_official | 181:a4cbdfbbd2f4 | 43 | (+) Configure the priority and enable the NVIC for the transfer complete interrupt on the DMA Tx/Rx Stream. |
mbed_official | 181:a4cbdfbbd2f4 | 44 | |
mbed_official | 181:a4cbdfbbd2f4 | 45 | (#) Program the Baud Rate, Word Length, Stop Bit, Parity, Hardware |
mbed_official | 181:a4cbdfbbd2f4 | 46 | flow control and Mode(Receiver/Transmitter) in the husart Init structure. |
mbed_official | 181:a4cbdfbbd2f4 | 47 | |
mbed_official | 181:a4cbdfbbd2f4 | 48 | (#) Initialize the USART registers by calling the HAL_USART_Init() API: |
mbed_official | 181:a4cbdfbbd2f4 | 49 | (+) These API's configures also the low level Hardware GPIO, CLOCK, CORTEX...etc) |
mbed_official | 181:a4cbdfbbd2f4 | 50 | by calling the customed HAL_USART_MspInit(&husart) API. |
mbed_official | 181:a4cbdfbbd2f4 | 51 | |
mbed_official | 181:a4cbdfbbd2f4 | 52 | @endverbatim |
mbed_official | 181:a4cbdfbbd2f4 | 53 | ****************************************************************************** |
mbed_official | 181:a4cbdfbbd2f4 | 54 | * @attention |
mbed_official | 181:a4cbdfbbd2f4 | 55 | * |
mbed_official | 181:a4cbdfbbd2f4 | 56 | * <h2><center>© COPYRIGHT(c) 2014 STMicroelectronics</center></h2> |
mbed_official | 181:a4cbdfbbd2f4 | 57 | * |
mbed_official | 181:a4cbdfbbd2f4 | 58 | * Redistribution and use in source and binary forms, with or without modification, |
mbed_official | 181:a4cbdfbbd2f4 | 59 | * are permitted provided that the following conditions are met: |
mbed_official | 181:a4cbdfbbd2f4 | 60 | * 1. Redistributions of source code must retain the above copyright notice, |
mbed_official | 181:a4cbdfbbd2f4 | 61 | * this list of conditions and the following disclaimer. |
mbed_official | 181:a4cbdfbbd2f4 | 62 | * 2. Redistributions in binary form must reproduce the above copyright notice, |
mbed_official | 181:a4cbdfbbd2f4 | 63 | * this list of conditions and the following disclaimer in the documentation |
mbed_official | 181:a4cbdfbbd2f4 | 64 | * and/or other materials provided with the distribution. |
mbed_official | 181:a4cbdfbbd2f4 | 65 | * 3. Neither the name of STMicroelectronics nor the names of its contributors |
mbed_official | 181:a4cbdfbbd2f4 | 66 | * may be used to endorse or promote products derived from this software |
mbed_official | 181:a4cbdfbbd2f4 | 67 | * without specific prior written permission. |
mbed_official | 181:a4cbdfbbd2f4 | 68 | * |
mbed_official | 181:a4cbdfbbd2f4 | 69 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
mbed_official | 181:a4cbdfbbd2f4 | 70 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
mbed_official | 181:a4cbdfbbd2f4 | 71 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
mbed_official | 181:a4cbdfbbd2f4 | 72 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE |
mbed_official | 181:a4cbdfbbd2f4 | 73 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
mbed_official | 181:a4cbdfbbd2f4 | 74 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR |
mbed_official | 181:a4cbdfbbd2f4 | 75 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
mbed_official | 181:a4cbdfbbd2f4 | 76 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, |
mbed_official | 181:a4cbdfbbd2f4 | 77 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
mbed_official | 181:a4cbdfbbd2f4 | 78 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
mbed_official | 181:a4cbdfbbd2f4 | 79 | * |
mbed_official | 181:a4cbdfbbd2f4 | 80 | ****************************************************************************** |
mbed_official | 181:a4cbdfbbd2f4 | 81 | */ |
mbed_official | 181:a4cbdfbbd2f4 | 82 | |
mbed_official | 181:a4cbdfbbd2f4 | 83 | /* Includes ------------------------------------------------------------------*/ |
mbed_official | 181:a4cbdfbbd2f4 | 84 | #include "stm32l0xx_hal.h" |
mbed_official | 181:a4cbdfbbd2f4 | 85 | |
mbed_official | 181:a4cbdfbbd2f4 | 86 | /** @addtogroup STM32L0xx_HAL_Driver |
mbed_official | 181:a4cbdfbbd2f4 | 87 | * @{ |
mbed_official | 181:a4cbdfbbd2f4 | 88 | */ |
mbed_official | 181:a4cbdfbbd2f4 | 89 | |
mbed_official | 181:a4cbdfbbd2f4 | 90 | /** @defgroup USART |
mbed_official | 181:a4cbdfbbd2f4 | 91 | * @brief HAL USART Synchronous module driver |
mbed_official | 181:a4cbdfbbd2f4 | 92 | * @{ |
mbed_official | 181:a4cbdfbbd2f4 | 93 | */ |
mbed_official | 181:a4cbdfbbd2f4 | 94 | #ifdef HAL_USART_MODULE_ENABLED |
mbed_official | 181:a4cbdfbbd2f4 | 95 | /* Private typedef -----------------------------------------------------------*/ |
mbed_official | 181:a4cbdfbbd2f4 | 96 | /* Private define ------------------------------------------------------------*/ |
mbed_official | 181:a4cbdfbbd2f4 | 97 | #define DUMMY_DATA ((uint16_t) 0xFFFF) |
mbed_official | 181:a4cbdfbbd2f4 | 98 | #define TEACK_REACK_TIMEOUT ((uint32_t) 1000) |
mbed_official | 181:a4cbdfbbd2f4 | 99 | #define HAL_USART_TXDMA_TIMEOUTVALUE ((uint32_t) 22000) |
mbed_official | 181:a4cbdfbbd2f4 | 100 | |
mbed_official | 181:a4cbdfbbd2f4 | 101 | #define USART_CR1_FIELDS ((uint32_t)(USART_CR1_M | USART_CR1_PCE | \ |
mbed_official | 181:a4cbdfbbd2f4 | 102 | USART_CR1_PS | USART_CR1_TE | USART_CR1_RE)) |
mbed_official | 181:a4cbdfbbd2f4 | 103 | #define USART_CR2_FIELDS ((uint32_t)(USART_CR2_CPHA | USART_CR2_CPOL | \ |
mbed_official | 181:a4cbdfbbd2f4 | 104 | USART_CR2_CLKEN | USART_CR2_LBCL | USART_CR2_STOP)) |
mbed_official | 181:a4cbdfbbd2f4 | 105 | /* Private macro -------------------------------------------------------------*/ |
mbed_official | 181:a4cbdfbbd2f4 | 106 | /* Private variables ---------------------------------------------------------*/ |
mbed_official | 181:a4cbdfbbd2f4 | 107 | /* Private function prototypes -----------------------------------------------*/ |
mbed_official | 181:a4cbdfbbd2f4 | 108 | static void USART_DMATransmitCplt(DMA_HandleTypeDef *hdma); |
mbed_official | 181:a4cbdfbbd2f4 | 109 | static void USART_DMATxHalfCplt(DMA_HandleTypeDef *hdma); |
mbed_official | 181:a4cbdfbbd2f4 | 110 | static void USART_DMAReceiveCplt(DMA_HandleTypeDef *hdma); |
mbed_official | 181:a4cbdfbbd2f4 | 111 | static void USART_DMARxHalfCplt(DMA_HandleTypeDef *hdma); |
mbed_official | 181:a4cbdfbbd2f4 | 112 | static void USART_DMAError(DMA_HandleTypeDef *hdma); |
mbed_official | 181:a4cbdfbbd2f4 | 113 | static HAL_StatusTypeDef USART_WaitOnFlagUntilTimeout(USART_HandleTypeDef *husart, uint32_t Flag, FlagStatus Status, uint32_t Timeout); |
mbed_official | 181:a4cbdfbbd2f4 | 114 | static void USART_SetConfig (USART_HandleTypeDef *husart); |
mbed_official | 181:a4cbdfbbd2f4 | 115 | static HAL_StatusTypeDef USART_CheckIdleState(USART_HandleTypeDef *husart); |
mbed_official | 181:a4cbdfbbd2f4 | 116 | static HAL_StatusTypeDef USART_Transmit_IT(USART_HandleTypeDef *husart); |
mbed_official | 181:a4cbdfbbd2f4 | 117 | static HAL_StatusTypeDef USART_Receive_IT(USART_HandleTypeDef *husart); |
mbed_official | 181:a4cbdfbbd2f4 | 118 | static HAL_StatusTypeDef USART_TransmitReceive_IT(USART_HandleTypeDef *husart); |
mbed_official | 181:a4cbdfbbd2f4 | 119 | /* Private functions ---------------------------------------------------------*/ |
mbed_official | 181:a4cbdfbbd2f4 | 120 | |
mbed_official | 181:a4cbdfbbd2f4 | 121 | |
mbed_official | 181:a4cbdfbbd2f4 | 122 | /** @defgroup USART_Private_Functions |
mbed_official | 181:a4cbdfbbd2f4 | 123 | * @{ |
mbed_official | 181:a4cbdfbbd2f4 | 124 | */ |
mbed_official | 181:a4cbdfbbd2f4 | 125 | |
mbed_official | 181:a4cbdfbbd2f4 | 126 | /** @defgroup USART_Group1 USART Initialization/de-initialization functions |
mbed_official | 181:a4cbdfbbd2f4 | 127 | * @brief Initialization and Configuration functions |
mbed_official | 181:a4cbdfbbd2f4 | 128 | * |
mbed_official | 181:a4cbdfbbd2f4 | 129 | @verbatim |
mbed_official | 181:a4cbdfbbd2f4 | 130 | =============================================================================== |
mbed_official | 181:a4cbdfbbd2f4 | 131 | ##### Initialization and Configuration functions ##### |
mbed_official | 181:a4cbdfbbd2f4 | 132 | =============================================================================== |
mbed_official | 181:a4cbdfbbd2f4 | 133 | [..] |
mbed_official | 181:a4cbdfbbd2f4 | 134 | This subsection provides a set of functions allowing to initialize the USART |
mbed_official | 181:a4cbdfbbd2f4 | 135 | in asynchronous and in synchronous modes. |
mbed_official | 181:a4cbdfbbd2f4 | 136 | (+) For the asynchronous mode only these parameters can be configured: |
mbed_official | 181:a4cbdfbbd2f4 | 137 | (++) Baud Rate |
mbed_official | 181:a4cbdfbbd2f4 | 138 | (++) Word Length |
mbed_official | 181:a4cbdfbbd2f4 | 139 | (++) Stop Bit |
mbed_official | 181:a4cbdfbbd2f4 | 140 | (++) Parity: If the parity is enabled, then the MSB bit of the data written |
mbed_official | 181:a4cbdfbbd2f4 | 141 | in the data register is transmitted but is changed by the parity bit. |
mbed_official | 181:a4cbdfbbd2f4 | 142 | Depending on the frame length defined by the M bit (8-bits or 9-bits), |
mbed_official | 181:a4cbdfbbd2f4 | 143 | the possible USART frame formats are as listed in the following table: |
mbed_official | 181:a4cbdfbbd2f4 | 144 | +-------------------------------------------------------------+ |
mbed_official | 181:a4cbdfbbd2f4 | 145 | | M0 bit | PCE bit | USART frame | |
mbed_official | 181:a4cbdfbbd2f4 | 146 | |---------------------|---------------------------------------| |
mbed_official | 181:a4cbdfbbd2f4 | 147 | | 0 | 0 | | SB | 8 bit data | STB | | |
mbed_official | 181:a4cbdfbbd2f4 | 148 | |---------|-----------|---------------------------------------| |
mbed_official | 181:a4cbdfbbd2f4 | 149 | | 0 | 1 | | SB | 7 bit data | PB | STB | | |
mbed_official | 181:a4cbdfbbd2f4 | 150 | |---------|-----------|---------------------------------------| |
mbed_official | 181:a4cbdfbbd2f4 | 151 | | 1 | 0 | | SB | 9 bit data | STB | | |
mbed_official | 181:a4cbdfbbd2f4 | 152 | |---------|-----------|---------------------------------------| |
mbed_official | 181:a4cbdfbbd2f4 | 153 | | 1 | 1 | | SB | 8 bit data | PB | STB | | |
mbed_official | 181:a4cbdfbbd2f4 | 154 | +-------------------------------------------------------------+ |
mbed_official | 181:a4cbdfbbd2f4 | 155 | (++) USART polarity |
mbed_official | 181:a4cbdfbbd2f4 | 156 | (++) USART phase |
mbed_official | 181:a4cbdfbbd2f4 | 157 | (++) USART LastBit |
mbed_official | 181:a4cbdfbbd2f4 | 158 | (++) Receiver/transmitter modes |
mbed_official | 181:a4cbdfbbd2f4 | 159 | |
mbed_official | 181:a4cbdfbbd2f4 | 160 | [..] |
mbed_official | 181:a4cbdfbbd2f4 | 161 | The HAL_USART_Init() function follows the USART synchronous configuration |
mbed_official | 181:a4cbdfbbd2f4 | 162 | procedure (details for the procedure are available in reference manual (RM0329)). |
mbed_official | 181:a4cbdfbbd2f4 | 163 | |
mbed_official | 181:a4cbdfbbd2f4 | 164 | @endverbatim |
mbed_official | 181:a4cbdfbbd2f4 | 165 | * @{ |
mbed_official | 181:a4cbdfbbd2f4 | 166 | */ |
mbed_official | 181:a4cbdfbbd2f4 | 167 | |
mbed_official | 181:a4cbdfbbd2f4 | 168 | /** |
mbed_official | 181:a4cbdfbbd2f4 | 169 | * @brief Initializes the USART mode according to the specified |
mbed_official | 181:a4cbdfbbd2f4 | 170 | * parameters in the USART_InitTypeDef and create the associated handle. |
mbed_official | 181:a4cbdfbbd2f4 | 171 | * @param husart: USART handle |
mbed_official | 181:a4cbdfbbd2f4 | 172 | * @retval HAL status |
mbed_official | 181:a4cbdfbbd2f4 | 173 | */ |
mbed_official | 181:a4cbdfbbd2f4 | 174 | HAL_StatusTypeDef HAL_USART_Init(USART_HandleTypeDef *husart) |
mbed_official | 181:a4cbdfbbd2f4 | 175 | { |
mbed_official | 181:a4cbdfbbd2f4 | 176 | /* Check the USART handle allocation */ |
mbed_official | 181:a4cbdfbbd2f4 | 177 | if(husart == NULL) |
mbed_official | 181:a4cbdfbbd2f4 | 178 | { |
mbed_official | 181:a4cbdfbbd2f4 | 179 | return HAL_ERROR; |
mbed_official | 181:a4cbdfbbd2f4 | 180 | } |
mbed_official | 181:a4cbdfbbd2f4 | 181 | |
mbed_official | 181:a4cbdfbbd2f4 | 182 | /* Check the parameters */ |
mbed_official | 181:a4cbdfbbd2f4 | 183 | assert_param(IS_USART_INSTANCE(husart->Instance)); |
mbed_official | 181:a4cbdfbbd2f4 | 184 | |
mbed_official | 181:a4cbdfbbd2f4 | 185 | if(husart->State == HAL_USART_STATE_RESET) |
mbed_official | 181:a4cbdfbbd2f4 | 186 | { |
mbed_official | 181:a4cbdfbbd2f4 | 187 | /* Init the low level hardware : GPIO, CLOCK, CORTEX */ |
mbed_official | 181:a4cbdfbbd2f4 | 188 | HAL_USART_MspInit(husart); |
mbed_official | 181:a4cbdfbbd2f4 | 189 | } |
mbed_official | 181:a4cbdfbbd2f4 | 190 | |
mbed_official | 181:a4cbdfbbd2f4 | 191 | husart->State = HAL_USART_STATE_BUSY; |
mbed_official | 181:a4cbdfbbd2f4 | 192 | |
mbed_official | 181:a4cbdfbbd2f4 | 193 | /* Disable the Peripheral */ |
mbed_official | 181:a4cbdfbbd2f4 | 194 | __HAL_USART_DISABLE(husart); |
mbed_official | 181:a4cbdfbbd2f4 | 195 | |
mbed_official | 181:a4cbdfbbd2f4 | 196 | /* Set the Usart Communication parameters */ |
mbed_official | 181:a4cbdfbbd2f4 | 197 | USART_SetConfig(husart); |
mbed_official | 181:a4cbdfbbd2f4 | 198 | |
mbed_official | 181:a4cbdfbbd2f4 | 199 | /* In Synchronous mode, the following bits must be kept cleared: |
mbed_official | 181:a4cbdfbbd2f4 | 200 | - LINEN bit in the USART_CR2 register |
mbed_official | 181:a4cbdfbbd2f4 | 201 | - HDSEL, SCEN and IREN bits in the USART_CR3 register.*/ |
mbed_official | 181:a4cbdfbbd2f4 | 202 | husart->Instance->CR2 &= ~USART_CR2_LINEN; |
mbed_official | 181:a4cbdfbbd2f4 | 203 | husart->Instance->CR3 &= ~(USART_CR3_SCEN | USART_CR3_HDSEL | USART_CR3_IREN); |
mbed_official | 181:a4cbdfbbd2f4 | 204 | |
mbed_official | 181:a4cbdfbbd2f4 | 205 | /* Enable the Peripharal */ |
mbed_official | 181:a4cbdfbbd2f4 | 206 | __HAL_USART_ENABLE(husart); |
mbed_official | 181:a4cbdfbbd2f4 | 207 | |
mbed_official | 181:a4cbdfbbd2f4 | 208 | /* TEACK and/or REACK to check before moving husart->State to Ready */ |
mbed_official | 181:a4cbdfbbd2f4 | 209 | return (USART_CheckIdleState(husart)); |
mbed_official | 181:a4cbdfbbd2f4 | 210 | } |
mbed_official | 181:a4cbdfbbd2f4 | 211 | |
mbed_official | 181:a4cbdfbbd2f4 | 212 | /** |
mbed_official | 181:a4cbdfbbd2f4 | 213 | * @brief DeInitializes the USART peripheral. |
mbed_official | 181:a4cbdfbbd2f4 | 214 | * @param husart: USART handle |
mbed_official | 181:a4cbdfbbd2f4 | 215 | * @retval HAL status |
mbed_official | 181:a4cbdfbbd2f4 | 216 | */ |
mbed_official | 181:a4cbdfbbd2f4 | 217 | HAL_StatusTypeDef HAL_USART_DeInit(USART_HandleTypeDef *husart) |
mbed_official | 181:a4cbdfbbd2f4 | 218 | { |
mbed_official | 181:a4cbdfbbd2f4 | 219 | /* Check the USART handle allocation */ |
mbed_official | 181:a4cbdfbbd2f4 | 220 | if(husart == NULL) |
mbed_official | 181:a4cbdfbbd2f4 | 221 | { |
mbed_official | 181:a4cbdfbbd2f4 | 222 | return HAL_ERROR; |
mbed_official | 181:a4cbdfbbd2f4 | 223 | } |
mbed_official | 181:a4cbdfbbd2f4 | 224 | |
mbed_official | 181:a4cbdfbbd2f4 | 225 | /* Check the parameters */ |
mbed_official | 181:a4cbdfbbd2f4 | 226 | assert_param(IS_USART_INSTANCE(husart->Instance)); |
mbed_official | 181:a4cbdfbbd2f4 | 227 | |
mbed_official | 181:a4cbdfbbd2f4 | 228 | husart->State = HAL_USART_STATE_BUSY; |
mbed_official | 181:a4cbdfbbd2f4 | 229 | |
mbed_official | 181:a4cbdfbbd2f4 | 230 | husart->Instance->CR1 = 0x0; |
mbed_official | 181:a4cbdfbbd2f4 | 231 | husart->Instance->CR2 = 0x0; |
mbed_official | 181:a4cbdfbbd2f4 | 232 | husart->Instance->CR3 = 0x0; |
mbed_official | 181:a4cbdfbbd2f4 | 233 | |
mbed_official | 181:a4cbdfbbd2f4 | 234 | /* DeInit the low level hardware */ |
mbed_official | 181:a4cbdfbbd2f4 | 235 | HAL_USART_MspDeInit(husart); |
mbed_official | 181:a4cbdfbbd2f4 | 236 | |
mbed_official | 181:a4cbdfbbd2f4 | 237 | husart->ErrorCode = HAL_USART_ERROR_NONE; |
mbed_official | 181:a4cbdfbbd2f4 | 238 | husart->State = HAL_USART_STATE_RESET; |
mbed_official | 181:a4cbdfbbd2f4 | 239 | |
mbed_official | 181:a4cbdfbbd2f4 | 240 | /* Release Lock */ |
mbed_official | 181:a4cbdfbbd2f4 | 241 | __HAL_UNLOCK(husart); |
mbed_official | 181:a4cbdfbbd2f4 | 242 | |
mbed_official | 181:a4cbdfbbd2f4 | 243 | return HAL_OK; |
mbed_official | 181:a4cbdfbbd2f4 | 244 | } |
mbed_official | 181:a4cbdfbbd2f4 | 245 | |
mbed_official | 181:a4cbdfbbd2f4 | 246 | /** |
mbed_official | 181:a4cbdfbbd2f4 | 247 | * @brief USART MSP Init. |
mbed_official | 181:a4cbdfbbd2f4 | 248 | * @param husart: USART handle |
mbed_official | 181:a4cbdfbbd2f4 | 249 | * @retval None |
mbed_official | 181:a4cbdfbbd2f4 | 250 | */ |
mbed_official | 181:a4cbdfbbd2f4 | 251 | __weak void HAL_USART_MspInit(USART_HandleTypeDef *husart) |
mbed_official | 181:a4cbdfbbd2f4 | 252 | { |
mbed_official | 181:a4cbdfbbd2f4 | 253 | /* NOTE: This function Should not be modified, when the callback is needed, |
mbed_official | 181:a4cbdfbbd2f4 | 254 | the HAL_USART_MspInit could be implenetd in the user file |
mbed_official | 181:a4cbdfbbd2f4 | 255 | */ |
mbed_official | 181:a4cbdfbbd2f4 | 256 | } |
mbed_official | 181:a4cbdfbbd2f4 | 257 | |
mbed_official | 181:a4cbdfbbd2f4 | 258 | /** |
mbed_official | 181:a4cbdfbbd2f4 | 259 | * @brief USART MSP DeInit. |
mbed_official | 181:a4cbdfbbd2f4 | 260 | * @param husart: USART handle |
mbed_official | 181:a4cbdfbbd2f4 | 261 | * @retval None |
mbed_official | 181:a4cbdfbbd2f4 | 262 | */ |
mbed_official | 181:a4cbdfbbd2f4 | 263 | __weak void HAL_USART_MspDeInit(USART_HandleTypeDef *husart) |
mbed_official | 181:a4cbdfbbd2f4 | 264 | { |
mbed_official | 181:a4cbdfbbd2f4 | 265 | /* NOTE: This function Should not be modified, when the callback is needed, |
mbed_official | 181:a4cbdfbbd2f4 | 266 | the HAL_USART_MspDeInit could be implenetd in the user file |
mbed_official | 181:a4cbdfbbd2f4 | 267 | */ |
mbed_official | 181:a4cbdfbbd2f4 | 268 | } |
mbed_official | 181:a4cbdfbbd2f4 | 269 | |
mbed_official | 181:a4cbdfbbd2f4 | 270 | /** |
mbed_official | 181:a4cbdfbbd2f4 | 271 | * @} |
mbed_official | 181:a4cbdfbbd2f4 | 272 | */ |
mbed_official | 181:a4cbdfbbd2f4 | 273 | |
mbed_official | 181:a4cbdfbbd2f4 | 274 | /** @defgroup HAL_USART_Group2 IO operation functions |
mbed_official | 181:a4cbdfbbd2f4 | 275 | * @brief USART Transmit/Receive functions |
mbed_official | 181:a4cbdfbbd2f4 | 276 | * |
mbed_official | 181:a4cbdfbbd2f4 | 277 | @verbatim |
mbed_official | 181:a4cbdfbbd2f4 | 278 | =============================================================================== |
mbed_official | 181:a4cbdfbbd2f4 | 279 | ##### I/O operation functions ##### |
mbed_official | 181:a4cbdfbbd2f4 | 280 | =============================================================================== |
mbed_official | 181:a4cbdfbbd2f4 | 281 | This subsection provides a set of functions allowing to manage the USART synchronous |
mbed_official | 181:a4cbdfbbd2f4 | 282 | data transfers. |
mbed_official | 181:a4cbdfbbd2f4 | 283 | |
mbed_official | 181:a4cbdfbbd2f4 | 284 | [..] The USART supports master mode only: it cannot receive or send data related to an input |
mbed_official | 181:a4cbdfbbd2f4 | 285 | clock (SCLK is always an output). |
mbed_official | 181:a4cbdfbbd2f4 | 286 | |
mbed_official | 181:a4cbdfbbd2f4 | 287 | (#) There are two mode of transfer: |
mbed_official | 181:a4cbdfbbd2f4 | 288 | (+) Blocking mode: The communication is performed in polling mode. |
mbed_official | 181:a4cbdfbbd2f4 | 289 | The HAL status of all data processing is returned by the same function |
mbed_official | 181:a4cbdfbbd2f4 | 290 | after finishing transfer. |
mbed_official | 181:a4cbdfbbd2f4 | 291 | (+) No-Blocking mode: The communication is performed using Interrupts |
mbed_official | 181:a4cbdfbbd2f4 | 292 | or DMA, These API's return the HAL status. |
mbed_official | 181:a4cbdfbbd2f4 | 293 | The end of the data processing will be indicated through the |
mbed_official | 181:a4cbdfbbd2f4 | 294 | dedicated USART IRQ when using Interrupt mode or the DMA IRQ when |
mbed_official | 181:a4cbdfbbd2f4 | 295 | using DMA mode. |
mbed_official | 181:a4cbdfbbd2f4 | 296 | The HAL_USART_TxCpltCallback(), HAL_USART_RxCpltCallback() and HAL_USART_TxRxCpltCallback() user callbacks |
mbed_official | 181:a4cbdfbbd2f4 | 297 | will be executed respectivelly at the end of the transmit or Receive process |
mbed_official | 181:a4cbdfbbd2f4 | 298 | The HAL_USART_ErrorCallback()user callback will be executed when a communication error is detected |
mbed_official | 181:a4cbdfbbd2f4 | 299 | |
mbed_official | 181:a4cbdfbbd2f4 | 300 | (#) Blocking mode API's are : |
mbed_official | 181:a4cbdfbbd2f4 | 301 | (+) HAL_USART_Transmit()in simplex mode |
mbed_official | 181:a4cbdfbbd2f4 | 302 | (+) HAL_USART_Receive() in full duplex receive only |
mbed_official | 181:a4cbdfbbd2f4 | 303 | (+) HAL_USART_TransmitReceive() in full duplex mode |
mbed_official | 181:a4cbdfbbd2f4 | 304 | |
mbed_official | 181:a4cbdfbbd2f4 | 305 | (#) Non-Blocking mode API's with Interrupt are : |
mbed_official | 181:a4cbdfbbd2f4 | 306 | (+) HAL_USART_Transmit_IT()in simplex mode |
mbed_official | 181:a4cbdfbbd2f4 | 307 | (+) HAL_USART_Receive_IT() in full duplex receive only |
mbed_official | 181:a4cbdfbbd2f4 | 308 | (+) HAL_USART_TransmitReceive_IT()in full duplex mode |
mbed_official | 181:a4cbdfbbd2f4 | 309 | (+) HAL_USART_IRQHandler() |
mbed_official | 181:a4cbdfbbd2f4 | 310 | |
mbed_official | 181:a4cbdfbbd2f4 | 311 | (#) No-Blocking mode functions with DMA are : |
mbed_official | 181:a4cbdfbbd2f4 | 312 | (+) HAL_USART_Transmit_DMA()in simplex mode |
mbed_official | 181:a4cbdfbbd2f4 | 313 | (+) HAL_USART_Receive_DMA() in full duplex receive only |
mbed_official | 181:a4cbdfbbd2f4 | 314 | (+) HAL_USART_TransmitReceive_DMA() in full duplex mode |
mbed_official | 181:a4cbdfbbd2f4 | 315 | (+) HAL_USART_DMAPause() |
mbed_official | 181:a4cbdfbbd2f4 | 316 | (+) HAL_USART_DMAResume() |
mbed_official | 181:a4cbdfbbd2f4 | 317 | (+) HAL_USART_DMAStop() |
mbed_official | 181:a4cbdfbbd2f4 | 318 | |
mbed_official | 181:a4cbdfbbd2f4 | 319 | (#) A set of Transfer Complete Callbacks are provided in No_Blocking mode: |
mbed_official | 181:a4cbdfbbd2f4 | 320 | (+) HAL_USART_TxCpltCallback() |
mbed_official | 181:a4cbdfbbd2f4 | 321 | (+) HAL_USART_RxCpltCallback() |
mbed_official | 181:a4cbdfbbd2f4 | 322 | (+) HAL_USART_TxHalfCpltCallback() |
mbed_official | 181:a4cbdfbbd2f4 | 323 | (+) HAL_USART_RxHalfCpltCallback() |
mbed_official | 181:a4cbdfbbd2f4 | 324 | (+) HAL_USART_ErrorCallback() |
mbed_official | 181:a4cbdfbbd2f4 | 325 | (+) HAL_USART_TxRxCpltCallback() |
mbed_official | 181:a4cbdfbbd2f4 | 326 | |
mbed_official | 181:a4cbdfbbd2f4 | 327 | @endverbatim |
mbed_official | 181:a4cbdfbbd2f4 | 328 | * @{ |
mbed_official | 181:a4cbdfbbd2f4 | 329 | */ |
mbed_official | 181:a4cbdfbbd2f4 | 330 | |
mbed_official | 181:a4cbdfbbd2f4 | 331 | /** |
mbed_official | 181:a4cbdfbbd2f4 | 332 | * @brief Simplex Send an amount of data in blocking mode |
mbed_official | 181:a4cbdfbbd2f4 | 333 | * @param husart: USART handle |
mbed_official | 181:a4cbdfbbd2f4 | 334 | * @param pTxData: Pointer to data buffer |
mbed_official | 181:a4cbdfbbd2f4 | 335 | * @param Size: Amount of data to be sent |
mbed_official | 181:a4cbdfbbd2f4 | 336 | * @param Timeout : Timeout duration |
mbed_official | 181:a4cbdfbbd2f4 | 337 | * @retval HAL status |
mbed_official | 181:a4cbdfbbd2f4 | 338 | */ |
mbed_official | 181:a4cbdfbbd2f4 | 339 | HAL_StatusTypeDef HAL_USART_Transmit(USART_HandleTypeDef *husart, uint8_t *pTxData, uint16_t Size, uint32_t Timeout) |
mbed_official | 181:a4cbdfbbd2f4 | 340 | { |
mbed_official | 181:a4cbdfbbd2f4 | 341 | uint16_t* tmp; |
mbed_official | 181:a4cbdfbbd2f4 | 342 | |
mbed_official | 181:a4cbdfbbd2f4 | 343 | if(husart->State == HAL_USART_STATE_READY) |
mbed_official | 181:a4cbdfbbd2f4 | 344 | { |
mbed_official | 181:a4cbdfbbd2f4 | 345 | if((pTxData == NULL) || (Size == 0)) |
mbed_official | 181:a4cbdfbbd2f4 | 346 | { |
mbed_official | 181:a4cbdfbbd2f4 | 347 | return HAL_ERROR; |
mbed_official | 181:a4cbdfbbd2f4 | 348 | } |
mbed_official | 181:a4cbdfbbd2f4 | 349 | |
mbed_official | 181:a4cbdfbbd2f4 | 350 | /* Process Locked */ |
mbed_official | 181:a4cbdfbbd2f4 | 351 | __HAL_LOCK(husart); |
mbed_official | 181:a4cbdfbbd2f4 | 352 | |
mbed_official | 181:a4cbdfbbd2f4 | 353 | husart->ErrorCode = HAL_USART_ERROR_NONE; |
mbed_official | 181:a4cbdfbbd2f4 | 354 | husart->State = HAL_USART_STATE_BUSY_TX; |
mbed_official | 181:a4cbdfbbd2f4 | 355 | |
mbed_official | 181:a4cbdfbbd2f4 | 356 | husart->TxXferSize = Size; |
mbed_official | 181:a4cbdfbbd2f4 | 357 | husart->TxXferCount = Size; |
mbed_official | 181:a4cbdfbbd2f4 | 358 | |
mbed_official | 181:a4cbdfbbd2f4 | 359 | /* Check the remaining data to be sent */ |
mbed_official | 181:a4cbdfbbd2f4 | 360 | while(husart->TxXferCount > 0) |
mbed_official | 181:a4cbdfbbd2f4 | 361 | { |
mbed_official | 181:a4cbdfbbd2f4 | 362 | husart->TxXferCount--; |
mbed_official | 181:a4cbdfbbd2f4 | 363 | if(USART_WaitOnFlagUntilTimeout(husart, USART_FLAG_TC, RESET, Timeout) != HAL_OK) |
mbed_official | 181:a4cbdfbbd2f4 | 364 | { |
mbed_official | 181:a4cbdfbbd2f4 | 365 | return HAL_TIMEOUT; |
mbed_official | 181:a4cbdfbbd2f4 | 366 | } |
mbed_official | 181:a4cbdfbbd2f4 | 367 | if((husart->Init.WordLength == USART_WORDLENGTH_9B) && (husart->Init.Parity == USART_PARITY_NONE)) |
mbed_official | 181:a4cbdfbbd2f4 | 368 | { |
mbed_official | 181:a4cbdfbbd2f4 | 369 | tmp = (uint16_t*) pTxData; |
mbed_official | 181:a4cbdfbbd2f4 | 370 | husart->Instance->TDR = (*tmp & (uint16_t)0x01FF); |
mbed_official | 181:a4cbdfbbd2f4 | 371 | pTxData += 2; |
mbed_official | 181:a4cbdfbbd2f4 | 372 | } |
mbed_official | 181:a4cbdfbbd2f4 | 373 | else |
mbed_official | 181:a4cbdfbbd2f4 | 374 | { |
mbed_official | 181:a4cbdfbbd2f4 | 375 | husart->Instance->TDR = (*pTxData++ & (uint8_t)0xFF); |
mbed_official | 181:a4cbdfbbd2f4 | 376 | } |
mbed_official | 181:a4cbdfbbd2f4 | 377 | } |
mbed_official | 181:a4cbdfbbd2f4 | 378 | |
mbed_official | 181:a4cbdfbbd2f4 | 379 | if(USART_WaitOnFlagUntilTimeout(husart, USART_FLAG_TC, RESET, Timeout) != HAL_OK) |
mbed_official | 181:a4cbdfbbd2f4 | 380 | { |
mbed_official | 181:a4cbdfbbd2f4 | 381 | return HAL_TIMEOUT; |
mbed_official | 181:a4cbdfbbd2f4 | 382 | } |
mbed_official | 181:a4cbdfbbd2f4 | 383 | |
mbed_official | 181:a4cbdfbbd2f4 | 384 | husart->State = HAL_USART_STATE_READY; |
mbed_official | 181:a4cbdfbbd2f4 | 385 | |
mbed_official | 181:a4cbdfbbd2f4 | 386 | /* Process Unlocked */ |
mbed_official | 181:a4cbdfbbd2f4 | 387 | __HAL_UNLOCK(husart); |
mbed_official | 181:a4cbdfbbd2f4 | 388 | |
mbed_official | 181:a4cbdfbbd2f4 | 389 | return HAL_OK; |
mbed_official | 181:a4cbdfbbd2f4 | 390 | } |
mbed_official | 181:a4cbdfbbd2f4 | 391 | else |
mbed_official | 181:a4cbdfbbd2f4 | 392 | { |
mbed_official | 181:a4cbdfbbd2f4 | 393 | return HAL_BUSY; |
mbed_official | 181:a4cbdfbbd2f4 | 394 | } |
mbed_official | 181:a4cbdfbbd2f4 | 395 | } |
mbed_official | 181:a4cbdfbbd2f4 | 396 | |
mbed_official | 181:a4cbdfbbd2f4 | 397 | /** |
mbed_official | 181:a4cbdfbbd2f4 | 398 | * @brief Receive an amount of data in blocking mode |
mbed_official | 181:a4cbdfbbd2f4 | 399 | * To receive synchronous data, dummy data are simultaneously transmitted |
mbed_official | 181:a4cbdfbbd2f4 | 400 | * @param husart: USART handle |
mbed_official | 181:a4cbdfbbd2f4 | 401 | * @param pRxData: pointer to data buffer |
mbed_official | 181:a4cbdfbbd2f4 | 402 | * @param Size: amount of data to be received |
mbed_official | 181:a4cbdfbbd2f4 | 403 | * @param Timeout : Timeout duration |
mbed_official | 181:a4cbdfbbd2f4 | 404 | * @retval HAL status |
mbed_official | 181:a4cbdfbbd2f4 | 405 | */ |
mbed_official | 181:a4cbdfbbd2f4 | 406 | HAL_StatusTypeDef HAL_USART_Receive(USART_HandleTypeDef *husart, uint8_t *pRxData, uint16_t Size, uint32_t Timeout) |
mbed_official | 181:a4cbdfbbd2f4 | 407 | { |
mbed_official | 181:a4cbdfbbd2f4 | 408 | uint16_t* tmp; |
mbed_official | 181:a4cbdfbbd2f4 | 409 | uint16_t uhMask; |
mbed_official | 181:a4cbdfbbd2f4 | 410 | |
mbed_official | 181:a4cbdfbbd2f4 | 411 | if(husart->State == HAL_USART_STATE_READY) |
mbed_official | 181:a4cbdfbbd2f4 | 412 | { |
mbed_official | 181:a4cbdfbbd2f4 | 413 | if((pRxData == NULL) || (Size == 0)) |
mbed_official | 181:a4cbdfbbd2f4 | 414 | { |
mbed_official | 181:a4cbdfbbd2f4 | 415 | return HAL_ERROR; |
mbed_official | 181:a4cbdfbbd2f4 | 416 | } |
mbed_official | 181:a4cbdfbbd2f4 | 417 | /* Process Locked */ |
mbed_official | 181:a4cbdfbbd2f4 | 418 | __HAL_LOCK(husart); |
mbed_official | 181:a4cbdfbbd2f4 | 419 | |
mbed_official | 181:a4cbdfbbd2f4 | 420 | husart->ErrorCode = HAL_USART_ERROR_NONE; |
mbed_official | 181:a4cbdfbbd2f4 | 421 | husart->State = HAL_USART_STATE_BUSY_RX; |
mbed_official | 181:a4cbdfbbd2f4 | 422 | |
mbed_official | 181:a4cbdfbbd2f4 | 423 | husart->RxXferSize = Size; |
mbed_official | 181:a4cbdfbbd2f4 | 424 | husart->RxXferCount = Size; |
mbed_official | 181:a4cbdfbbd2f4 | 425 | |
mbed_official | 181:a4cbdfbbd2f4 | 426 | /* Computation of USART mask to apply to RDR register */ |
mbed_official | 181:a4cbdfbbd2f4 | 427 | __HAL_USART_MASK_COMPUTATION(husart); |
mbed_official | 181:a4cbdfbbd2f4 | 428 | uhMask = husart->Mask; |
mbed_official | 181:a4cbdfbbd2f4 | 429 | |
mbed_official | 181:a4cbdfbbd2f4 | 430 | /* as long as data have to be received */ |
mbed_official | 181:a4cbdfbbd2f4 | 431 | while(husart->RxXferCount > 0) |
mbed_official | 181:a4cbdfbbd2f4 | 432 | { |
mbed_official | 181:a4cbdfbbd2f4 | 433 | husart->RxXferCount--; |
mbed_official | 181:a4cbdfbbd2f4 | 434 | |
mbed_official | 181:a4cbdfbbd2f4 | 435 | /* Wait until TC flag is set to send dummy byte in order to generate the |
mbed_official | 181:a4cbdfbbd2f4 | 436 | * clock for the slave to send data. |
mbed_official | 181:a4cbdfbbd2f4 | 437 | * Whatever the frame length (7, 8 or 9-bit long), the same dummy value |
mbed_official | 181:a4cbdfbbd2f4 | 438 | * can be written for all the cases. */ |
mbed_official | 181:a4cbdfbbd2f4 | 439 | if(USART_WaitOnFlagUntilTimeout(husart, USART_FLAG_TC, RESET, Timeout) != HAL_OK) |
mbed_official | 181:a4cbdfbbd2f4 | 440 | { |
mbed_official | 181:a4cbdfbbd2f4 | 441 | return HAL_TIMEOUT; |
mbed_official | 181:a4cbdfbbd2f4 | 442 | } |
mbed_official | 181:a4cbdfbbd2f4 | 443 | husart->Instance->TDR = (DUMMY_DATA & (uint16_t)0x0FF); |
mbed_official | 181:a4cbdfbbd2f4 | 444 | |
mbed_official | 181:a4cbdfbbd2f4 | 445 | /* Wait for RXNE Flag */ |
mbed_official | 181:a4cbdfbbd2f4 | 446 | if(USART_WaitOnFlagUntilTimeout(husart, USART_FLAG_RXNE, RESET, Timeout) != HAL_OK) |
mbed_official | 181:a4cbdfbbd2f4 | 447 | { |
mbed_official | 181:a4cbdfbbd2f4 | 448 | return HAL_TIMEOUT; |
mbed_official | 181:a4cbdfbbd2f4 | 449 | } |
mbed_official | 181:a4cbdfbbd2f4 | 450 | |
mbed_official | 181:a4cbdfbbd2f4 | 451 | if((husart->Init.WordLength == USART_WORDLENGTH_9B) && (husart->Init.Parity == USART_PARITY_NONE)) |
mbed_official | 181:a4cbdfbbd2f4 | 452 | { |
mbed_official | 181:a4cbdfbbd2f4 | 453 | tmp = (uint16_t*) pRxData ; |
mbed_official | 181:a4cbdfbbd2f4 | 454 | *tmp = (uint16_t)(husart->Instance->RDR & uhMask); |
mbed_official | 181:a4cbdfbbd2f4 | 455 | pRxData +=2; |
mbed_official | 181:a4cbdfbbd2f4 | 456 | } |
mbed_official | 181:a4cbdfbbd2f4 | 457 | else |
mbed_official | 181:a4cbdfbbd2f4 | 458 | { |
mbed_official | 181:a4cbdfbbd2f4 | 459 | *pRxData++ = (uint8_t)(husart->Instance->RDR & (uint8_t)uhMask); |
mbed_official | 181:a4cbdfbbd2f4 | 460 | } |
mbed_official | 181:a4cbdfbbd2f4 | 461 | } |
mbed_official | 181:a4cbdfbbd2f4 | 462 | |
mbed_official | 181:a4cbdfbbd2f4 | 463 | husart->State = HAL_USART_STATE_READY; |
mbed_official | 181:a4cbdfbbd2f4 | 464 | |
mbed_official | 181:a4cbdfbbd2f4 | 465 | /* Process Unlocked */ |
mbed_official | 181:a4cbdfbbd2f4 | 466 | __HAL_UNLOCK(husart); |
mbed_official | 181:a4cbdfbbd2f4 | 467 | |
mbed_official | 181:a4cbdfbbd2f4 | 468 | return HAL_OK; |
mbed_official | 181:a4cbdfbbd2f4 | 469 | } |
mbed_official | 181:a4cbdfbbd2f4 | 470 | else |
mbed_official | 181:a4cbdfbbd2f4 | 471 | { |
mbed_official | 181:a4cbdfbbd2f4 | 472 | return HAL_BUSY; |
mbed_official | 181:a4cbdfbbd2f4 | 473 | } |
mbed_official | 181:a4cbdfbbd2f4 | 474 | } |
mbed_official | 181:a4cbdfbbd2f4 | 475 | |
mbed_official | 181:a4cbdfbbd2f4 | 476 | /** |
mbed_official | 181:a4cbdfbbd2f4 | 477 | * @brief Full-Duplex Send and Receive an amount of data in blocking mode |
mbed_official | 181:a4cbdfbbd2f4 | 478 | * @param husart: USART handle |
mbed_official | 181:a4cbdfbbd2f4 | 479 | * @param pTxData: pointer to TX data buffer |
mbed_official | 181:a4cbdfbbd2f4 | 480 | * @param pRxData: pointer to RX data buffer |
mbed_official | 181:a4cbdfbbd2f4 | 481 | * @param Size: amount of data to be sent (same amount to be received) |
mbed_official | 181:a4cbdfbbd2f4 | 482 | * @param Timeout : Timeout duration |
mbed_official | 181:a4cbdfbbd2f4 | 483 | * @retval HAL status |
mbed_official | 181:a4cbdfbbd2f4 | 484 | */ |
mbed_official | 181:a4cbdfbbd2f4 | 485 | HAL_StatusTypeDef HAL_USART_TransmitReceive(USART_HandleTypeDef *husart, uint8_t *pTxData, uint8_t *pRxData, uint16_t Size, uint32_t Timeout) |
mbed_official | 181:a4cbdfbbd2f4 | 486 | { |
mbed_official | 181:a4cbdfbbd2f4 | 487 | uint16_t* tmp; |
mbed_official | 181:a4cbdfbbd2f4 | 488 | uint16_t uhMask; |
mbed_official | 181:a4cbdfbbd2f4 | 489 | |
mbed_official | 181:a4cbdfbbd2f4 | 490 | if(husart->State == HAL_USART_STATE_READY) |
mbed_official | 181:a4cbdfbbd2f4 | 491 | { |
mbed_official | 181:a4cbdfbbd2f4 | 492 | if((pTxData == NULL) || (pRxData == NULL) || (Size == 0)) |
mbed_official | 181:a4cbdfbbd2f4 | 493 | { |
mbed_official | 181:a4cbdfbbd2f4 | 494 | return HAL_ERROR; |
mbed_official | 181:a4cbdfbbd2f4 | 495 | } |
mbed_official | 181:a4cbdfbbd2f4 | 496 | /* Process Locked */ |
mbed_official | 181:a4cbdfbbd2f4 | 497 | __HAL_LOCK(husart); |
mbed_official | 181:a4cbdfbbd2f4 | 498 | |
mbed_official | 181:a4cbdfbbd2f4 | 499 | husart->ErrorCode = HAL_USART_ERROR_NONE; |
mbed_official | 181:a4cbdfbbd2f4 | 500 | husart->State = HAL_USART_STATE_BUSY_RX; |
mbed_official | 181:a4cbdfbbd2f4 | 501 | |
mbed_official | 181:a4cbdfbbd2f4 | 502 | husart->RxXferSize = Size; |
mbed_official | 181:a4cbdfbbd2f4 | 503 | husart->TxXferSize = Size; |
mbed_official | 181:a4cbdfbbd2f4 | 504 | husart->TxXferCount = Size; |
mbed_official | 181:a4cbdfbbd2f4 | 505 | husart->RxXferCount = Size; |
mbed_official | 181:a4cbdfbbd2f4 | 506 | |
mbed_official | 181:a4cbdfbbd2f4 | 507 | /* Computation of USART mask to apply to RDR register */ |
mbed_official | 181:a4cbdfbbd2f4 | 508 | __HAL_USART_MASK_COMPUTATION(husart); |
mbed_official | 181:a4cbdfbbd2f4 | 509 | uhMask = husart->Mask; |
mbed_official | 181:a4cbdfbbd2f4 | 510 | |
mbed_official | 181:a4cbdfbbd2f4 | 511 | /* Check the remain data to be sent */ |
mbed_official | 181:a4cbdfbbd2f4 | 512 | while(husart->TxXferCount > 0) |
mbed_official | 181:a4cbdfbbd2f4 | 513 | { |
mbed_official | 181:a4cbdfbbd2f4 | 514 | husart->TxXferCount--; |
mbed_official | 181:a4cbdfbbd2f4 | 515 | husart->RxXferCount--; |
mbed_official | 181:a4cbdfbbd2f4 | 516 | |
mbed_official | 181:a4cbdfbbd2f4 | 517 | /* Wait until TC flag is set to send data */ |
mbed_official | 181:a4cbdfbbd2f4 | 518 | if(USART_WaitOnFlagUntilTimeout(husart, USART_FLAG_TC, RESET, Timeout) != HAL_OK) |
mbed_official | 181:a4cbdfbbd2f4 | 519 | { |
mbed_official | 181:a4cbdfbbd2f4 | 520 | return HAL_TIMEOUT; |
mbed_official | 181:a4cbdfbbd2f4 | 521 | } |
mbed_official | 181:a4cbdfbbd2f4 | 522 | if((husart->Init.WordLength == USART_WORDLENGTH_9B) && (husart->Init.Parity == USART_PARITY_NONE)) |
mbed_official | 181:a4cbdfbbd2f4 | 523 | { |
mbed_official | 181:a4cbdfbbd2f4 | 524 | tmp = (uint16_t*) pTxData; |
mbed_official | 181:a4cbdfbbd2f4 | 525 | husart->Instance->TDR = (*tmp & uhMask); |
mbed_official | 181:a4cbdfbbd2f4 | 526 | pTxData += 2; |
mbed_official | 181:a4cbdfbbd2f4 | 527 | } |
mbed_official | 181:a4cbdfbbd2f4 | 528 | else |
mbed_official | 181:a4cbdfbbd2f4 | 529 | { |
mbed_official | 181:a4cbdfbbd2f4 | 530 | husart->Instance->TDR = (*pTxData++ & (uint8_t)uhMask); |
mbed_official | 181:a4cbdfbbd2f4 | 531 | } |
mbed_official | 181:a4cbdfbbd2f4 | 532 | |
mbed_official | 181:a4cbdfbbd2f4 | 533 | /* Wait for RXNE Flag */ |
mbed_official | 181:a4cbdfbbd2f4 | 534 | if(USART_WaitOnFlagUntilTimeout(husart, USART_FLAG_RXNE, RESET, Timeout) != HAL_OK) |
mbed_official | 181:a4cbdfbbd2f4 | 535 | { |
mbed_official | 181:a4cbdfbbd2f4 | 536 | return HAL_TIMEOUT; |
mbed_official | 181:a4cbdfbbd2f4 | 537 | } |
mbed_official | 181:a4cbdfbbd2f4 | 538 | |
mbed_official | 181:a4cbdfbbd2f4 | 539 | if((husart->Init.WordLength == USART_WORDLENGTH_9B) && (husart->Init.Parity == USART_PARITY_NONE)) |
mbed_official | 181:a4cbdfbbd2f4 | 540 | { |
mbed_official | 181:a4cbdfbbd2f4 | 541 | tmp = (uint16_t*) pRxData ; |
mbed_official | 181:a4cbdfbbd2f4 | 542 | *tmp = (uint16_t)(husart->Instance->RDR & uhMask); |
mbed_official | 181:a4cbdfbbd2f4 | 543 | pRxData +=2; |
mbed_official | 181:a4cbdfbbd2f4 | 544 | } |
mbed_official | 181:a4cbdfbbd2f4 | 545 | else |
mbed_official | 181:a4cbdfbbd2f4 | 546 | { |
mbed_official | 181:a4cbdfbbd2f4 | 547 | *pRxData++ = (uint8_t)(husart->Instance->RDR & (uint8_t)uhMask); |
mbed_official | 181:a4cbdfbbd2f4 | 548 | } |
mbed_official | 181:a4cbdfbbd2f4 | 549 | } |
mbed_official | 181:a4cbdfbbd2f4 | 550 | |
mbed_official | 181:a4cbdfbbd2f4 | 551 | husart->State = HAL_USART_STATE_READY; |
mbed_official | 181:a4cbdfbbd2f4 | 552 | |
mbed_official | 181:a4cbdfbbd2f4 | 553 | /* Process Unlocked */ |
mbed_official | 181:a4cbdfbbd2f4 | 554 | __HAL_UNLOCK(husart); |
mbed_official | 181:a4cbdfbbd2f4 | 555 | |
mbed_official | 181:a4cbdfbbd2f4 | 556 | return HAL_OK; |
mbed_official | 181:a4cbdfbbd2f4 | 557 | } |
mbed_official | 181:a4cbdfbbd2f4 | 558 | else |
mbed_official | 181:a4cbdfbbd2f4 | 559 | { |
mbed_official | 181:a4cbdfbbd2f4 | 560 | return HAL_BUSY; |
mbed_official | 181:a4cbdfbbd2f4 | 561 | } |
mbed_official | 181:a4cbdfbbd2f4 | 562 | } |
mbed_official | 181:a4cbdfbbd2f4 | 563 | |
mbed_official | 181:a4cbdfbbd2f4 | 564 | /** |
mbed_official | 181:a4cbdfbbd2f4 | 565 | * @brief Send an amount of data in interrupt mode |
mbed_official | 181:a4cbdfbbd2f4 | 566 | * @param husart: USART handle |
mbed_official | 181:a4cbdfbbd2f4 | 567 | * @param pTxData: Pointer to data buffer |
mbed_official | 181:a4cbdfbbd2f4 | 568 | * @param Size: Amount of data to be sent |
mbed_official | 181:a4cbdfbbd2f4 | 569 | * @retval HAL status |
mbed_official | 181:a4cbdfbbd2f4 | 570 | */ |
mbed_official | 181:a4cbdfbbd2f4 | 571 | HAL_StatusTypeDef HAL_USART_Transmit_IT(USART_HandleTypeDef *husart, uint8_t *pTxData, uint16_t Size) |
mbed_official | 181:a4cbdfbbd2f4 | 572 | { |
mbed_official | 181:a4cbdfbbd2f4 | 573 | if(husart->State == HAL_USART_STATE_READY) |
mbed_official | 181:a4cbdfbbd2f4 | 574 | { |
mbed_official | 181:a4cbdfbbd2f4 | 575 | if((pTxData == NULL ) || (Size == 0)) |
mbed_official | 181:a4cbdfbbd2f4 | 576 | { |
mbed_official | 181:a4cbdfbbd2f4 | 577 | return HAL_ERROR; |
mbed_official | 181:a4cbdfbbd2f4 | 578 | } |
mbed_official | 181:a4cbdfbbd2f4 | 579 | |
mbed_official | 181:a4cbdfbbd2f4 | 580 | /* Process Locked */ |
mbed_official | 181:a4cbdfbbd2f4 | 581 | __HAL_LOCK(husart); |
mbed_official | 181:a4cbdfbbd2f4 | 582 | |
mbed_official | 181:a4cbdfbbd2f4 | 583 | husart->pTxBuffPtr = pTxData; |
mbed_official | 181:a4cbdfbbd2f4 | 584 | husart->TxXferSize = Size; |
mbed_official | 181:a4cbdfbbd2f4 | 585 | husart->TxXferCount = Size; |
mbed_official | 181:a4cbdfbbd2f4 | 586 | |
mbed_official | 181:a4cbdfbbd2f4 | 587 | husart->ErrorCode = HAL_USART_ERROR_NONE; |
mbed_official | 181:a4cbdfbbd2f4 | 588 | husart->State = HAL_USART_STATE_BUSY_TX; |
mbed_official | 181:a4cbdfbbd2f4 | 589 | |
mbed_official | 181:a4cbdfbbd2f4 | 590 | /* The USART Error Interrupts: (Frame error, noise error, overrun error) |
mbed_official | 181:a4cbdfbbd2f4 | 591 | are not managed by the USART Transmit Process to avoid the overrun interrupt |
mbed_official | 181:a4cbdfbbd2f4 | 592 | when the usart mode is configured for transmit and receive "USART_MODE_TX_RX" |
mbed_official | 181:a4cbdfbbd2f4 | 593 | to benefit for the frame error and noise interrupts the usart mode should be |
mbed_official | 181:a4cbdfbbd2f4 | 594 | configured only for transmit "USART_MODE_TX" */ |
mbed_official | 181:a4cbdfbbd2f4 | 595 | |
mbed_official | 181:a4cbdfbbd2f4 | 596 | /* Process Unlocked */ |
mbed_official | 181:a4cbdfbbd2f4 | 597 | __HAL_UNLOCK(husart); |
mbed_official | 181:a4cbdfbbd2f4 | 598 | |
mbed_official | 181:a4cbdfbbd2f4 | 599 | /* Enable the USART Transmit Complete Interrupt */ |
mbed_official | 181:a4cbdfbbd2f4 | 600 | __HAL_USART_ENABLE_IT(husart, USART_IT_TC); |
mbed_official | 181:a4cbdfbbd2f4 | 601 | |
mbed_official | 181:a4cbdfbbd2f4 | 602 | return HAL_OK; |
mbed_official | 181:a4cbdfbbd2f4 | 603 | } |
mbed_official | 181:a4cbdfbbd2f4 | 604 | else |
mbed_official | 181:a4cbdfbbd2f4 | 605 | { |
mbed_official | 181:a4cbdfbbd2f4 | 606 | return HAL_BUSY; |
mbed_official | 181:a4cbdfbbd2f4 | 607 | } |
mbed_official | 181:a4cbdfbbd2f4 | 608 | } |
mbed_official | 181:a4cbdfbbd2f4 | 609 | |
mbed_official | 181:a4cbdfbbd2f4 | 610 | /** |
mbed_official | 181:a4cbdfbbd2f4 | 611 | * @brief Receive an amount of data in blocking mode |
mbed_official | 181:a4cbdfbbd2f4 | 612 | * To receive synchronous data, dummy data are simultaneously transmitted |
mbed_official | 181:a4cbdfbbd2f4 | 613 | * @param husart: usart handle |
mbed_official | 181:a4cbdfbbd2f4 | 614 | * @param pRxData: pointer to data buffer |
mbed_official | 181:a4cbdfbbd2f4 | 615 | * @param Size: amount of data to be received |
mbed_official | 181:a4cbdfbbd2f4 | 616 | * @retval HAL status |
mbed_official | 181:a4cbdfbbd2f4 | 617 | */ |
mbed_official | 181:a4cbdfbbd2f4 | 618 | HAL_StatusTypeDef HAL_USART_Receive_IT(USART_HandleTypeDef *husart, uint8_t *pRxData, uint16_t Size) |
mbed_official | 181:a4cbdfbbd2f4 | 619 | { |
mbed_official | 181:a4cbdfbbd2f4 | 620 | if(husart->State == HAL_USART_STATE_READY) |
mbed_official | 181:a4cbdfbbd2f4 | 621 | { |
mbed_official | 181:a4cbdfbbd2f4 | 622 | if((pRxData == NULL ) || (Size == 0)) |
mbed_official | 181:a4cbdfbbd2f4 | 623 | { |
mbed_official | 181:a4cbdfbbd2f4 | 624 | return HAL_ERROR; |
mbed_official | 181:a4cbdfbbd2f4 | 625 | } |
mbed_official | 181:a4cbdfbbd2f4 | 626 | /* Process Locked */ |
mbed_official | 181:a4cbdfbbd2f4 | 627 | __HAL_LOCK(husart); |
mbed_official | 181:a4cbdfbbd2f4 | 628 | |
mbed_official | 181:a4cbdfbbd2f4 | 629 | husart->pRxBuffPtr = pRxData; |
mbed_official | 181:a4cbdfbbd2f4 | 630 | husart->RxXferSize = Size; |
mbed_official | 181:a4cbdfbbd2f4 | 631 | husart->RxXferCount = Size; |
mbed_official | 181:a4cbdfbbd2f4 | 632 | |
mbed_official | 181:a4cbdfbbd2f4 | 633 | __HAL_USART_MASK_COMPUTATION(husart); |
mbed_official | 181:a4cbdfbbd2f4 | 634 | |
mbed_official | 181:a4cbdfbbd2f4 | 635 | husart->ErrorCode = HAL_USART_ERROR_NONE; |
mbed_official | 181:a4cbdfbbd2f4 | 636 | husart->State = HAL_USART_STATE_BUSY_RX; |
mbed_official | 181:a4cbdfbbd2f4 | 637 | |
mbed_official | 181:a4cbdfbbd2f4 | 638 | /* Enable the USART Parity Error Interrupt */ |
mbed_official | 181:a4cbdfbbd2f4 | 639 | __HAL_USART_ENABLE_IT(husart, USART_IT_PE); |
mbed_official | 181:a4cbdfbbd2f4 | 640 | |
mbed_official | 181:a4cbdfbbd2f4 | 641 | /* Enable the USART Error Interrupt: (Frame error, noise error, overrun error) */ |
mbed_official | 181:a4cbdfbbd2f4 | 642 | __HAL_USART_ENABLE_IT(husart, USART_IT_ERR); |
mbed_official | 181:a4cbdfbbd2f4 | 643 | |
mbed_official | 181:a4cbdfbbd2f4 | 644 | /* Enable the USART Data Register not empty Interrupt */ |
mbed_official | 181:a4cbdfbbd2f4 | 645 | __HAL_USART_ENABLE_IT(husart, USART_IT_RXNE); |
mbed_official | 181:a4cbdfbbd2f4 | 646 | |
mbed_official | 181:a4cbdfbbd2f4 | 647 | /* Process Unlocked */ |
mbed_official | 181:a4cbdfbbd2f4 | 648 | __HAL_UNLOCK(husart); |
mbed_official | 181:a4cbdfbbd2f4 | 649 | |
mbed_official | 181:a4cbdfbbd2f4 | 650 | /* Send dummy byte in order to generate the clock for the Slave to send the next data */ |
mbed_official | 181:a4cbdfbbd2f4 | 651 | if(husart->Init.WordLength == USART_WORDLENGTH_9B) |
mbed_official | 181:a4cbdfbbd2f4 | 652 | { |
mbed_official | 181:a4cbdfbbd2f4 | 653 | husart->Instance->TDR = (DUMMY_DATA & (uint16_t)0x01FF); |
mbed_official | 181:a4cbdfbbd2f4 | 654 | } |
mbed_official | 181:a4cbdfbbd2f4 | 655 | else |
mbed_official | 181:a4cbdfbbd2f4 | 656 | { |
mbed_official | 181:a4cbdfbbd2f4 | 657 | husart->Instance->TDR = (DUMMY_DATA & (uint16_t)0x00FF); |
mbed_official | 181:a4cbdfbbd2f4 | 658 | } |
mbed_official | 181:a4cbdfbbd2f4 | 659 | |
mbed_official | 181:a4cbdfbbd2f4 | 660 | return HAL_OK; |
mbed_official | 181:a4cbdfbbd2f4 | 661 | } |
mbed_official | 181:a4cbdfbbd2f4 | 662 | else |
mbed_official | 181:a4cbdfbbd2f4 | 663 | { |
mbed_official | 181:a4cbdfbbd2f4 | 664 | return HAL_BUSY; |
mbed_official | 181:a4cbdfbbd2f4 | 665 | } |
mbed_official | 181:a4cbdfbbd2f4 | 666 | } |
mbed_official | 181:a4cbdfbbd2f4 | 667 | |
mbed_official | 181:a4cbdfbbd2f4 | 668 | /** |
mbed_official | 181:a4cbdfbbd2f4 | 669 | * @brief Full-Duplex Send and Receive an amount of data in interrupt mode |
mbed_official | 181:a4cbdfbbd2f4 | 670 | * @param husart: USART handle |
mbed_official | 181:a4cbdfbbd2f4 | 671 | * @param pTxData: pointer to TX data buffer |
mbed_official | 181:a4cbdfbbd2f4 | 672 | * @param pRxData: pointer to RX data buffer |
mbed_official | 181:a4cbdfbbd2f4 | 673 | * @param Size: amount of data to be sent (same amount to be received) |
mbed_official | 181:a4cbdfbbd2f4 | 674 | * @retval HAL status |
mbed_official | 181:a4cbdfbbd2f4 | 675 | */ |
mbed_official | 181:a4cbdfbbd2f4 | 676 | HAL_StatusTypeDef HAL_USART_TransmitReceive_IT(USART_HandleTypeDef *husart, uint8_t *pTxData, uint8_t *pRxData, uint16_t Size) |
mbed_official | 181:a4cbdfbbd2f4 | 677 | { |
mbed_official | 181:a4cbdfbbd2f4 | 678 | if(husart->State == HAL_USART_STATE_READY) |
mbed_official | 181:a4cbdfbbd2f4 | 679 | { |
mbed_official | 181:a4cbdfbbd2f4 | 680 | if((pTxData == NULL) || (pRxData == NULL) || (Size == 0)) |
mbed_official | 181:a4cbdfbbd2f4 | 681 | { |
mbed_official | 181:a4cbdfbbd2f4 | 682 | return HAL_ERROR; |
mbed_official | 181:a4cbdfbbd2f4 | 683 | } |
mbed_official | 181:a4cbdfbbd2f4 | 684 | /* Process Locked */ |
mbed_official | 181:a4cbdfbbd2f4 | 685 | __HAL_LOCK(husart); |
mbed_official | 181:a4cbdfbbd2f4 | 686 | |
mbed_official | 181:a4cbdfbbd2f4 | 687 | husart->pRxBuffPtr = pRxData; |
mbed_official | 181:a4cbdfbbd2f4 | 688 | husart->RxXferSize = Size; |
mbed_official | 181:a4cbdfbbd2f4 | 689 | husart->RxXferCount = Size; |
mbed_official | 181:a4cbdfbbd2f4 | 690 | husart->pTxBuffPtr = pTxData; |
mbed_official | 181:a4cbdfbbd2f4 | 691 | husart->TxXferSize = Size; |
mbed_official | 181:a4cbdfbbd2f4 | 692 | husart->TxXferCount = Size; |
mbed_official | 181:a4cbdfbbd2f4 | 693 | |
mbed_official | 181:a4cbdfbbd2f4 | 694 | /* Computation of USART mask to apply to RDR register */ |
mbed_official | 181:a4cbdfbbd2f4 | 695 | __HAL_USART_MASK_COMPUTATION(husart); |
mbed_official | 181:a4cbdfbbd2f4 | 696 | |
mbed_official | 181:a4cbdfbbd2f4 | 697 | husart->ErrorCode = HAL_USART_ERROR_NONE; |
mbed_official | 181:a4cbdfbbd2f4 | 698 | husart->State = HAL_USART_STATE_BUSY_TX_RX; |
mbed_official | 181:a4cbdfbbd2f4 | 699 | |
mbed_official | 181:a4cbdfbbd2f4 | 700 | /* Enable the USART Data Register not empty Interrupt */ |
mbed_official | 181:a4cbdfbbd2f4 | 701 | __HAL_USART_ENABLE_IT(husart, USART_IT_RXNE); |
mbed_official | 181:a4cbdfbbd2f4 | 702 | |
mbed_official | 181:a4cbdfbbd2f4 | 703 | /* Enable the USART Parity Error Interrupt */ |
mbed_official | 181:a4cbdfbbd2f4 | 704 | __HAL_USART_ENABLE_IT(husart, USART_IT_PE); |
mbed_official | 181:a4cbdfbbd2f4 | 705 | |
mbed_official | 181:a4cbdfbbd2f4 | 706 | /* Enable the USART Error Interrupt: (Frame error, noise error, overrun error) */ |
mbed_official | 181:a4cbdfbbd2f4 | 707 | __HAL_USART_ENABLE_IT(husart, USART_IT_ERR); |
mbed_official | 181:a4cbdfbbd2f4 | 708 | |
mbed_official | 181:a4cbdfbbd2f4 | 709 | /* Process Unlocked */ |
mbed_official | 181:a4cbdfbbd2f4 | 710 | __HAL_UNLOCK(husart); |
mbed_official | 181:a4cbdfbbd2f4 | 711 | |
mbed_official | 181:a4cbdfbbd2f4 | 712 | /* Enable the USART Transmit Complete Interrupt */ |
mbed_official | 181:a4cbdfbbd2f4 | 713 | __HAL_USART_ENABLE_IT(husart, USART_IT_TC); |
mbed_official | 181:a4cbdfbbd2f4 | 714 | |
mbed_official | 181:a4cbdfbbd2f4 | 715 | return HAL_OK; |
mbed_official | 181:a4cbdfbbd2f4 | 716 | } |
mbed_official | 181:a4cbdfbbd2f4 | 717 | else |
mbed_official | 181:a4cbdfbbd2f4 | 718 | { |
mbed_official | 181:a4cbdfbbd2f4 | 719 | return HAL_BUSY; |
mbed_official | 181:a4cbdfbbd2f4 | 720 | } |
mbed_official | 181:a4cbdfbbd2f4 | 721 | } |
mbed_official | 181:a4cbdfbbd2f4 | 722 | |
mbed_official | 181:a4cbdfbbd2f4 | 723 | /** |
mbed_official | 181:a4cbdfbbd2f4 | 724 | * @brief Send an amount of data in DMA mode |
mbed_official | 181:a4cbdfbbd2f4 | 725 | * @param husart: USART handle |
mbed_official | 181:a4cbdfbbd2f4 | 726 | * @param pTxData: pointer to data buffer |
mbed_official | 181:a4cbdfbbd2f4 | 727 | * @param Size: amount of data to be sent |
mbed_official | 181:a4cbdfbbd2f4 | 728 | * @retval HAL status |
mbed_official | 181:a4cbdfbbd2f4 | 729 | */ |
mbed_official | 181:a4cbdfbbd2f4 | 730 | HAL_StatusTypeDef HAL_USART_Transmit_DMA(USART_HandleTypeDef *husart, uint8_t *pTxData, uint16_t Size) |
mbed_official | 181:a4cbdfbbd2f4 | 731 | { |
mbed_official | 181:a4cbdfbbd2f4 | 732 | uint32_t *tmp; |
mbed_official | 181:a4cbdfbbd2f4 | 733 | |
mbed_official | 181:a4cbdfbbd2f4 | 734 | if(husart->State == HAL_USART_STATE_READY) |
mbed_official | 181:a4cbdfbbd2f4 | 735 | { |
mbed_official | 181:a4cbdfbbd2f4 | 736 | if((pTxData == NULL ) || (Size == 0)) |
mbed_official | 181:a4cbdfbbd2f4 | 737 | { |
mbed_official | 181:a4cbdfbbd2f4 | 738 | return HAL_ERROR; |
mbed_official | 181:a4cbdfbbd2f4 | 739 | } |
mbed_official | 181:a4cbdfbbd2f4 | 740 | /* Process Locked */ |
mbed_official | 181:a4cbdfbbd2f4 | 741 | __HAL_LOCK(husart); |
mbed_official | 181:a4cbdfbbd2f4 | 742 | |
mbed_official | 181:a4cbdfbbd2f4 | 743 | husart->pTxBuffPtr = pTxData; |
mbed_official | 181:a4cbdfbbd2f4 | 744 | husart->TxXferSize = Size; |
mbed_official | 181:a4cbdfbbd2f4 | 745 | husart->TxXferCount = Size; |
mbed_official | 181:a4cbdfbbd2f4 | 746 | |
mbed_official | 181:a4cbdfbbd2f4 | 747 | husart->ErrorCode = HAL_USART_ERROR_NONE; |
mbed_official | 181:a4cbdfbbd2f4 | 748 | husart->State = HAL_USART_STATE_BUSY_TX; |
mbed_official | 181:a4cbdfbbd2f4 | 749 | |
mbed_official | 181:a4cbdfbbd2f4 | 750 | /* Set the USART DMA transfer complete callback */ |
mbed_official | 181:a4cbdfbbd2f4 | 751 | husart->hdmatx->XferCpltCallback = USART_DMATransmitCplt; |
mbed_official | 181:a4cbdfbbd2f4 | 752 | |
mbed_official | 181:a4cbdfbbd2f4 | 753 | /* Set the USART DMA Half transfer complete callback */ |
mbed_official | 181:a4cbdfbbd2f4 | 754 | husart->hdmatx->XferHalfCpltCallback = USART_DMATxHalfCplt; |
mbed_official | 181:a4cbdfbbd2f4 | 755 | |
mbed_official | 181:a4cbdfbbd2f4 | 756 | /* Set the DMA error callback */ |
mbed_official | 181:a4cbdfbbd2f4 | 757 | husart->hdmatx->XferErrorCallback = USART_DMAError; |
mbed_official | 181:a4cbdfbbd2f4 | 758 | |
mbed_official | 181:a4cbdfbbd2f4 | 759 | /* Enable the USART transmit DMA Stream */ |
mbed_official | 181:a4cbdfbbd2f4 | 760 | tmp = (uint32_t*)&pTxData; |
mbed_official | 181:a4cbdfbbd2f4 | 761 | HAL_DMA_Start_IT(husart->hdmatx, *(uint32_t*)tmp, (uint32_t)&husart->Instance->TDR, Size); |
mbed_official | 181:a4cbdfbbd2f4 | 762 | |
mbed_official | 181:a4cbdfbbd2f4 | 763 | /* Enable the DMA transfer for transmit request by setting the DMAT bit |
mbed_official | 181:a4cbdfbbd2f4 | 764 | in the USART CR3 register */ |
mbed_official | 181:a4cbdfbbd2f4 | 765 | husart->Instance->CR3 |= USART_CR3_DMAT; |
mbed_official | 181:a4cbdfbbd2f4 | 766 | |
mbed_official | 181:a4cbdfbbd2f4 | 767 | /* Process Unlocked */ |
mbed_official | 181:a4cbdfbbd2f4 | 768 | __HAL_UNLOCK(husart); |
mbed_official | 181:a4cbdfbbd2f4 | 769 | |
mbed_official | 181:a4cbdfbbd2f4 | 770 | return HAL_OK; |
mbed_official | 181:a4cbdfbbd2f4 | 771 | } |
mbed_official | 181:a4cbdfbbd2f4 | 772 | else |
mbed_official | 181:a4cbdfbbd2f4 | 773 | { |
mbed_official | 181:a4cbdfbbd2f4 | 774 | return HAL_BUSY; |
mbed_official | 181:a4cbdfbbd2f4 | 775 | } |
mbed_official | 181:a4cbdfbbd2f4 | 776 | } |
mbed_official | 181:a4cbdfbbd2f4 | 777 | |
mbed_official | 181:a4cbdfbbd2f4 | 778 | /** |
mbed_official | 181:a4cbdfbbd2f4 | 779 | * @brief Receive an amount of data in DMA mode |
mbed_official | 181:a4cbdfbbd2f4 | 780 | * @param husart: USART handle |
mbed_official | 181:a4cbdfbbd2f4 | 781 | * @param pRxData: pointer to data buffer |
mbed_official | 181:a4cbdfbbd2f4 | 782 | * @param Size: amount of data to be received |
mbed_official | 181:a4cbdfbbd2f4 | 783 | * @note When the USART parity is enabled (PCE = 1), the received data contain |
mbed_official | 181:a4cbdfbbd2f4 | 784 | * the parity bit (MSB position) |
mbed_official | 181:a4cbdfbbd2f4 | 785 | * @retval HAL status |
mbed_official | 181:a4cbdfbbd2f4 | 786 | * @note The USART DMA transmit stream must be configured in order to generate the clock for the slave. |
mbed_official | 181:a4cbdfbbd2f4 | 787 | */ |
mbed_official | 181:a4cbdfbbd2f4 | 788 | HAL_StatusTypeDef HAL_USART_Receive_DMA(USART_HandleTypeDef *husart, uint8_t *pRxData, uint16_t Size) |
mbed_official | 181:a4cbdfbbd2f4 | 789 | { |
mbed_official | 181:a4cbdfbbd2f4 | 790 | uint32_t *tmp; |
mbed_official | 181:a4cbdfbbd2f4 | 791 | |
mbed_official | 181:a4cbdfbbd2f4 | 792 | if(husart->State == HAL_USART_STATE_READY) |
mbed_official | 181:a4cbdfbbd2f4 | 793 | { |
mbed_official | 181:a4cbdfbbd2f4 | 794 | if((pRxData == NULL ) || (Size == 0)) |
mbed_official | 181:a4cbdfbbd2f4 | 795 | { |
mbed_official | 181:a4cbdfbbd2f4 | 796 | return HAL_ERROR; |
mbed_official | 181:a4cbdfbbd2f4 | 797 | } |
mbed_official | 181:a4cbdfbbd2f4 | 798 | |
mbed_official | 181:a4cbdfbbd2f4 | 799 | /* Process Locked */ |
mbed_official | 181:a4cbdfbbd2f4 | 800 | __HAL_LOCK(husart); |
mbed_official | 181:a4cbdfbbd2f4 | 801 | |
mbed_official | 181:a4cbdfbbd2f4 | 802 | husart->pRxBuffPtr = pRxData; |
mbed_official | 181:a4cbdfbbd2f4 | 803 | husart->RxXferSize = Size; |
mbed_official | 181:a4cbdfbbd2f4 | 804 | husart->pTxBuffPtr = pRxData; |
mbed_official | 181:a4cbdfbbd2f4 | 805 | husart->TxXferSize = Size; |
mbed_official | 181:a4cbdfbbd2f4 | 806 | |
mbed_official | 181:a4cbdfbbd2f4 | 807 | husart->ErrorCode = HAL_USART_ERROR_NONE; |
mbed_official | 181:a4cbdfbbd2f4 | 808 | husart->State = HAL_USART_STATE_BUSY_RX; |
mbed_official | 181:a4cbdfbbd2f4 | 809 | |
mbed_official | 181:a4cbdfbbd2f4 | 810 | /* Set the USART DMA Rx transfer complete callback */ |
mbed_official | 181:a4cbdfbbd2f4 | 811 | husart->hdmarx->XferCpltCallback = USART_DMAReceiveCplt; |
mbed_official | 181:a4cbdfbbd2f4 | 812 | |
mbed_official | 181:a4cbdfbbd2f4 | 813 | /* Set the USART DMA Half transfer complete callback */ |
mbed_official | 181:a4cbdfbbd2f4 | 814 | husart->hdmarx->XferHalfCpltCallback = USART_DMARxHalfCplt; |
mbed_official | 181:a4cbdfbbd2f4 | 815 | |
mbed_official | 181:a4cbdfbbd2f4 | 816 | /* Set the USART DMA Rx transfer error callback */ |
mbed_official | 181:a4cbdfbbd2f4 | 817 | husart->hdmarx->XferErrorCallback = USART_DMAError; |
mbed_official | 181:a4cbdfbbd2f4 | 818 | |
mbed_official | 181:a4cbdfbbd2f4 | 819 | /* Enable the USART receive DMA Stream */ |
mbed_official | 181:a4cbdfbbd2f4 | 820 | tmp = (uint32_t*)&pRxData; |
mbed_official | 181:a4cbdfbbd2f4 | 821 | HAL_DMA_Start_IT(husart->hdmarx, (uint32_t)&husart->Instance->RDR, *(uint32_t*)tmp, Size); |
mbed_official | 181:a4cbdfbbd2f4 | 822 | |
mbed_official | 181:a4cbdfbbd2f4 | 823 | /* Enable the USART transmit DMA Stream: the transmit stream is used in order |
mbed_official | 181:a4cbdfbbd2f4 | 824 | to generate in the non-blocking mode the clock to the slave device, |
mbed_official | 181:a4cbdfbbd2f4 | 825 | this mode isn't a simplex receive mode but a full-duplex receive mode */ |
mbed_official | 181:a4cbdfbbd2f4 | 826 | tmp = (uint32_t*)&pRxData; |
mbed_official | 181:a4cbdfbbd2f4 | 827 | HAL_DMA_Start_IT(husart->hdmatx, *(uint32_t*)tmp, (uint32_t)&husart->Instance->TDR, Size); |
mbed_official | 181:a4cbdfbbd2f4 | 828 | |
mbed_official | 181:a4cbdfbbd2f4 | 829 | /* Enable the DMA transfer for the receiver request by setting the DMAR bit |
mbed_official | 181:a4cbdfbbd2f4 | 830 | in the USART CR3 register */ |
mbed_official | 181:a4cbdfbbd2f4 | 831 | husart->Instance->CR3 |= USART_CR3_DMAR; |
mbed_official | 181:a4cbdfbbd2f4 | 832 | |
mbed_official | 181:a4cbdfbbd2f4 | 833 | /* Enable the DMA transfer for transmit request by setting the DMAT bit |
mbed_official | 181:a4cbdfbbd2f4 | 834 | in the USART CR3 register */ |
mbed_official | 181:a4cbdfbbd2f4 | 835 | husart->Instance->CR3 |= USART_CR3_DMAT; |
mbed_official | 181:a4cbdfbbd2f4 | 836 | |
mbed_official | 181:a4cbdfbbd2f4 | 837 | /* Process Unlocked */ |
mbed_official | 181:a4cbdfbbd2f4 | 838 | __HAL_UNLOCK(husart); |
mbed_official | 181:a4cbdfbbd2f4 | 839 | |
mbed_official | 181:a4cbdfbbd2f4 | 840 | return HAL_OK; |
mbed_official | 181:a4cbdfbbd2f4 | 841 | } |
mbed_official | 181:a4cbdfbbd2f4 | 842 | else |
mbed_official | 181:a4cbdfbbd2f4 | 843 | { |
mbed_official | 181:a4cbdfbbd2f4 | 844 | return HAL_BUSY; |
mbed_official | 181:a4cbdfbbd2f4 | 845 | } |
mbed_official | 181:a4cbdfbbd2f4 | 846 | } |
mbed_official | 181:a4cbdfbbd2f4 | 847 | |
mbed_official | 181:a4cbdfbbd2f4 | 848 | /** |
mbed_official | 181:a4cbdfbbd2f4 | 849 | * @brief Full-Duplex Transmit Receive an amount of data in non blocking mode |
mbed_official | 181:a4cbdfbbd2f4 | 850 | * @param husart: usart handle |
mbed_official | 181:a4cbdfbbd2f4 | 851 | * @param pTxData: pointer to TX data buffer |
mbed_official | 181:a4cbdfbbd2f4 | 852 | * @param pRxData: pointer to RX data buffer |
mbed_official | 181:a4cbdfbbd2f4 | 853 | * @param Size: amount of data to be received/sent |
mbed_official | 181:a4cbdfbbd2f4 | 854 | * @note When the USART parity is enabled (PCE = 1) the data received contain the parity bit. |
mbed_official | 181:a4cbdfbbd2f4 | 855 | * @retval HAL status |
mbed_official | 181:a4cbdfbbd2f4 | 856 | */ |
mbed_official | 181:a4cbdfbbd2f4 | 857 | HAL_StatusTypeDef HAL_USART_TransmitReceive_DMA(USART_HandleTypeDef *husart, uint8_t *pTxData, uint8_t *pRxData, uint16_t Size) |
mbed_official | 181:a4cbdfbbd2f4 | 858 | { |
mbed_official | 181:a4cbdfbbd2f4 | 859 | uint32_t *tmp; |
mbed_official | 181:a4cbdfbbd2f4 | 860 | |
mbed_official | 181:a4cbdfbbd2f4 | 861 | if(husart->State == HAL_USART_STATE_READY) |
mbed_official | 181:a4cbdfbbd2f4 | 862 | { |
mbed_official | 181:a4cbdfbbd2f4 | 863 | if((pTxData == NULL) || (pRxData == NULL) || (Size == 0)) |
mbed_official | 181:a4cbdfbbd2f4 | 864 | { |
mbed_official | 181:a4cbdfbbd2f4 | 865 | return HAL_ERROR; |
mbed_official | 181:a4cbdfbbd2f4 | 866 | } |
mbed_official | 181:a4cbdfbbd2f4 | 867 | /* Process Locked */ |
mbed_official | 181:a4cbdfbbd2f4 | 868 | __HAL_LOCK(husart); |
mbed_official | 181:a4cbdfbbd2f4 | 869 | |
mbed_official | 181:a4cbdfbbd2f4 | 870 | husart->pRxBuffPtr = pRxData; |
mbed_official | 181:a4cbdfbbd2f4 | 871 | husart->RxXferSize = Size; |
mbed_official | 181:a4cbdfbbd2f4 | 872 | husart->pTxBuffPtr = pTxData; |
mbed_official | 181:a4cbdfbbd2f4 | 873 | husart->TxXferSize = Size; |
mbed_official | 181:a4cbdfbbd2f4 | 874 | |
mbed_official | 181:a4cbdfbbd2f4 | 875 | husart->ErrorCode = HAL_USART_ERROR_NONE; |
mbed_official | 181:a4cbdfbbd2f4 | 876 | husart->State = HAL_USART_STATE_BUSY_TX_RX; |
mbed_official | 181:a4cbdfbbd2f4 | 877 | |
mbed_official | 181:a4cbdfbbd2f4 | 878 | /* Set the USART DMA Rx transfer complete callback */ |
mbed_official | 181:a4cbdfbbd2f4 | 879 | husart->hdmarx->XferCpltCallback = USART_DMAReceiveCplt; |
mbed_official | 181:a4cbdfbbd2f4 | 880 | |
mbed_official | 181:a4cbdfbbd2f4 | 881 | /* Set the USART DMA Half transfer complete callback */ |
mbed_official | 181:a4cbdfbbd2f4 | 882 | husart->hdmarx->XferHalfCpltCallback = USART_DMARxHalfCplt; |
mbed_official | 181:a4cbdfbbd2f4 | 883 | |
mbed_official | 181:a4cbdfbbd2f4 | 884 | /* Set the USART DMA Tx transfer complete callback */ |
mbed_official | 181:a4cbdfbbd2f4 | 885 | husart->hdmatx->XferCpltCallback = USART_DMATransmitCplt; |
mbed_official | 181:a4cbdfbbd2f4 | 886 | |
mbed_official | 181:a4cbdfbbd2f4 | 887 | /* Set the USART DMA Half transfer complete callback */ |
mbed_official | 181:a4cbdfbbd2f4 | 888 | husart->hdmatx->XferHalfCpltCallback = USART_DMATxHalfCplt; |
mbed_official | 181:a4cbdfbbd2f4 | 889 | |
mbed_official | 181:a4cbdfbbd2f4 | 890 | /* Set the USART DMA Tx transfer error callback */ |
mbed_official | 181:a4cbdfbbd2f4 | 891 | husart->hdmatx->XferErrorCallback = USART_DMAError; |
mbed_official | 181:a4cbdfbbd2f4 | 892 | |
mbed_official | 181:a4cbdfbbd2f4 | 893 | /* Set the USART DMA Rx transfer error callback */ |
mbed_official | 181:a4cbdfbbd2f4 | 894 | husart->hdmarx->XferErrorCallback = USART_DMAError; |
mbed_official | 181:a4cbdfbbd2f4 | 895 | |
mbed_official | 181:a4cbdfbbd2f4 | 896 | /* Enable the USART receive DMA Stream */ |
mbed_official | 181:a4cbdfbbd2f4 | 897 | tmp = (uint32_t*)&pRxData; |
mbed_official | 181:a4cbdfbbd2f4 | 898 | HAL_DMA_Start_IT(husart->hdmarx, (uint32_t)&husart->Instance->RDR, *(uint32_t*)tmp, Size); |
mbed_official | 181:a4cbdfbbd2f4 | 899 | |
mbed_official | 181:a4cbdfbbd2f4 | 900 | /* Enable the USART transmit DMA Stream */ |
mbed_official | 181:a4cbdfbbd2f4 | 901 | tmp = (uint32_t*)&pTxData; |
mbed_official | 181:a4cbdfbbd2f4 | 902 | HAL_DMA_Start_IT(husart->hdmatx, *(uint32_t*)tmp, (uint32_t)&husart->Instance->TDR, Size); |
mbed_official | 181:a4cbdfbbd2f4 | 903 | |
mbed_official | 181:a4cbdfbbd2f4 | 904 | /* Enable the DMA transfer for the receiver request by setting the DMAR bit |
mbed_official | 181:a4cbdfbbd2f4 | 905 | in the USART CR3 register */ |
mbed_official | 181:a4cbdfbbd2f4 | 906 | husart->Instance->CR3 |= USART_CR3_DMAR; |
mbed_official | 181:a4cbdfbbd2f4 | 907 | |
mbed_official | 181:a4cbdfbbd2f4 | 908 | /* Enable the DMA transfer for transmit request by setting the DMAT bit |
mbed_official | 181:a4cbdfbbd2f4 | 909 | in the USART CR3 register */ |
mbed_official | 181:a4cbdfbbd2f4 | 910 | husart->Instance->CR3 |= USART_CR3_DMAT; |
mbed_official | 181:a4cbdfbbd2f4 | 911 | |
mbed_official | 181:a4cbdfbbd2f4 | 912 | /* Process Unlocked */ |
mbed_official | 181:a4cbdfbbd2f4 | 913 | __HAL_UNLOCK(husart); |
mbed_official | 181:a4cbdfbbd2f4 | 914 | |
mbed_official | 181:a4cbdfbbd2f4 | 915 | return HAL_OK; |
mbed_official | 181:a4cbdfbbd2f4 | 916 | } |
mbed_official | 181:a4cbdfbbd2f4 | 917 | else |
mbed_official | 181:a4cbdfbbd2f4 | 918 | { |
mbed_official | 181:a4cbdfbbd2f4 | 919 | return HAL_BUSY; |
mbed_official | 181:a4cbdfbbd2f4 | 920 | } |
mbed_official | 181:a4cbdfbbd2f4 | 921 | } |
mbed_official | 181:a4cbdfbbd2f4 | 922 | |
mbed_official | 181:a4cbdfbbd2f4 | 923 | /** |
mbed_official | 181:a4cbdfbbd2f4 | 924 | * @brief Pauses the DMA Transfer. |
mbed_official | 181:a4cbdfbbd2f4 | 925 | * @param husart: USART handle |
mbed_official | 181:a4cbdfbbd2f4 | 926 | * @retval None |
mbed_official | 181:a4cbdfbbd2f4 | 927 | */ |
mbed_official | 181:a4cbdfbbd2f4 | 928 | HAL_StatusTypeDef HAL_USART_DMAPause(USART_HandleTypeDef *husart) |
mbed_official | 181:a4cbdfbbd2f4 | 929 | { |
mbed_official | 181:a4cbdfbbd2f4 | 930 | /* Process Locked */ |
mbed_official | 181:a4cbdfbbd2f4 | 931 | __HAL_LOCK(husart); |
mbed_official | 181:a4cbdfbbd2f4 | 932 | |
mbed_official | 181:a4cbdfbbd2f4 | 933 | if(husart->State == HAL_USART_STATE_BUSY_TX) |
mbed_official | 181:a4cbdfbbd2f4 | 934 | { |
mbed_official | 181:a4cbdfbbd2f4 | 935 | /* Disable the USART DMA Tx request */ |
mbed_official | 181:a4cbdfbbd2f4 | 936 | husart->Instance->CR3 &= (uint32_t)(~USART_CR3_DMAT); |
mbed_official | 181:a4cbdfbbd2f4 | 937 | } |
mbed_official | 181:a4cbdfbbd2f4 | 938 | else if(husart->State == HAL_USART_STATE_BUSY_RX) |
mbed_official | 181:a4cbdfbbd2f4 | 939 | { |
mbed_official | 181:a4cbdfbbd2f4 | 940 | /* Disable the USART DMA Rx request */ |
mbed_official | 181:a4cbdfbbd2f4 | 941 | husart->Instance->CR3 &= (uint32_t)(~USART_CR3_DMAR); |
mbed_official | 181:a4cbdfbbd2f4 | 942 | } |
mbed_official | 181:a4cbdfbbd2f4 | 943 | else if(husart->State == HAL_USART_STATE_BUSY_TX_RX) |
mbed_official | 181:a4cbdfbbd2f4 | 944 | { |
mbed_official | 181:a4cbdfbbd2f4 | 945 | /* Disable the USART DMA Tx request */ |
mbed_official | 181:a4cbdfbbd2f4 | 946 | husart->Instance->CR3 &= (uint32_t)(~USART_CR3_DMAT); |
mbed_official | 181:a4cbdfbbd2f4 | 947 | /* Disable the USART DMA Rx request */ |
mbed_official | 181:a4cbdfbbd2f4 | 948 | husart->Instance->CR3 &= (uint32_t)(~USART_CR3_DMAR); |
mbed_official | 181:a4cbdfbbd2f4 | 949 | } |
mbed_official | 181:a4cbdfbbd2f4 | 950 | |
mbed_official | 181:a4cbdfbbd2f4 | 951 | /* Process Unlocked */ |
mbed_official | 181:a4cbdfbbd2f4 | 952 | __HAL_UNLOCK(husart); |
mbed_official | 181:a4cbdfbbd2f4 | 953 | |
mbed_official | 181:a4cbdfbbd2f4 | 954 | return HAL_OK; |
mbed_official | 181:a4cbdfbbd2f4 | 955 | } |
mbed_official | 181:a4cbdfbbd2f4 | 956 | |
mbed_official | 181:a4cbdfbbd2f4 | 957 | /** |
mbed_official | 181:a4cbdfbbd2f4 | 958 | * @brief Resumes the DMA Transfer. |
mbed_official | 181:a4cbdfbbd2f4 | 959 | * @param husart: USART handle |
mbed_official | 181:a4cbdfbbd2f4 | 960 | * @retval None |
mbed_official | 181:a4cbdfbbd2f4 | 961 | */ |
mbed_official | 181:a4cbdfbbd2f4 | 962 | HAL_StatusTypeDef HAL_USART_DMAResume(USART_HandleTypeDef *husart) |
mbed_official | 181:a4cbdfbbd2f4 | 963 | { |
mbed_official | 181:a4cbdfbbd2f4 | 964 | /* Process Locked */ |
mbed_official | 181:a4cbdfbbd2f4 | 965 | __HAL_LOCK(husart); |
mbed_official | 181:a4cbdfbbd2f4 | 966 | |
mbed_official | 181:a4cbdfbbd2f4 | 967 | if(husart->State == HAL_USART_STATE_BUSY_TX) |
mbed_official | 181:a4cbdfbbd2f4 | 968 | { |
mbed_official | 181:a4cbdfbbd2f4 | 969 | /* Enable the USART DMA Tx request */ |
mbed_official | 181:a4cbdfbbd2f4 | 970 | husart->Instance->CR3 |= USART_CR3_DMAT; |
mbed_official | 181:a4cbdfbbd2f4 | 971 | } |
mbed_official | 181:a4cbdfbbd2f4 | 972 | else if(husart->State == HAL_USART_STATE_BUSY_RX) |
mbed_official | 181:a4cbdfbbd2f4 | 973 | { |
mbed_official | 181:a4cbdfbbd2f4 | 974 | /* Enable the USART DMA Rx request */ |
mbed_official | 181:a4cbdfbbd2f4 | 975 | husart->Instance->CR3 |= USART_CR3_DMAR; |
mbed_official | 181:a4cbdfbbd2f4 | 976 | } |
mbed_official | 181:a4cbdfbbd2f4 | 977 | else if(husart->State == HAL_USART_STATE_BUSY_TX_RX) |
mbed_official | 181:a4cbdfbbd2f4 | 978 | { |
mbed_official | 181:a4cbdfbbd2f4 | 979 | /* Enable the USART DMA Rx request before the DMA Tx request */ |
mbed_official | 181:a4cbdfbbd2f4 | 980 | husart->Instance->CR3 |= USART_CR3_DMAR; |
mbed_official | 181:a4cbdfbbd2f4 | 981 | /* Enable the USART DMA Tx request */ |
mbed_official | 181:a4cbdfbbd2f4 | 982 | husart->Instance->CR3 |= USART_CR3_DMAT; |
mbed_official | 181:a4cbdfbbd2f4 | 983 | } |
mbed_official | 181:a4cbdfbbd2f4 | 984 | |
mbed_official | 181:a4cbdfbbd2f4 | 985 | /* If the USART peripheral is still not enabled, enable it */ |
mbed_official | 181:a4cbdfbbd2f4 | 986 | if((husart->Instance->CR1 & USART_CR1_UE) == 0) |
mbed_official | 181:a4cbdfbbd2f4 | 987 | { |
mbed_official | 181:a4cbdfbbd2f4 | 988 | /* Enable USART peripheral */ |
mbed_official | 181:a4cbdfbbd2f4 | 989 | __HAL_USART_ENABLE(husart); |
mbed_official | 181:a4cbdfbbd2f4 | 990 | } |
mbed_official | 181:a4cbdfbbd2f4 | 991 | |
mbed_official | 181:a4cbdfbbd2f4 | 992 | /* Process Unlocked */ |
mbed_official | 181:a4cbdfbbd2f4 | 993 | __HAL_UNLOCK(husart); |
mbed_official | 181:a4cbdfbbd2f4 | 994 | |
mbed_official | 181:a4cbdfbbd2f4 | 995 | return HAL_OK; |
mbed_official | 181:a4cbdfbbd2f4 | 996 | } |
mbed_official | 181:a4cbdfbbd2f4 | 997 | |
mbed_official | 181:a4cbdfbbd2f4 | 998 | /** |
mbed_official | 181:a4cbdfbbd2f4 | 999 | * @brief Stops the DMA Transfer. |
mbed_official | 181:a4cbdfbbd2f4 | 1000 | * @param husart: USART handle |
mbed_official | 181:a4cbdfbbd2f4 | 1001 | * @retval None |
mbed_official | 181:a4cbdfbbd2f4 | 1002 | */ |
mbed_official | 181:a4cbdfbbd2f4 | 1003 | HAL_StatusTypeDef HAL_USART_DMAStop(USART_HandleTypeDef *husart) |
mbed_official | 181:a4cbdfbbd2f4 | 1004 | { |
mbed_official | 181:a4cbdfbbd2f4 | 1005 | /* Process Locked */ |
mbed_official | 181:a4cbdfbbd2f4 | 1006 | __HAL_LOCK(husart); |
mbed_official | 181:a4cbdfbbd2f4 | 1007 | |
mbed_official | 181:a4cbdfbbd2f4 | 1008 | /* Disable the USART Tx/Rx DMA requests */ |
mbed_official | 181:a4cbdfbbd2f4 | 1009 | husart->Instance->CR3 &= ~USART_CR3_DMAT; |
mbed_official | 181:a4cbdfbbd2f4 | 1010 | husart->Instance->CR3 &= ~USART_CR3_DMAR; |
mbed_official | 181:a4cbdfbbd2f4 | 1011 | |
mbed_official | 181:a4cbdfbbd2f4 | 1012 | /* Abort the USART DMA tx Stream */ |
mbed_official | 181:a4cbdfbbd2f4 | 1013 | if(husart->hdmatx != NULL) |
mbed_official | 181:a4cbdfbbd2f4 | 1014 | { |
mbed_official | 181:a4cbdfbbd2f4 | 1015 | HAL_DMA_Abort(husart->hdmatx); |
mbed_official | 181:a4cbdfbbd2f4 | 1016 | } |
mbed_official | 181:a4cbdfbbd2f4 | 1017 | /* Abort the USART DMA rx Stream */ |
mbed_official | 181:a4cbdfbbd2f4 | 1018 | if(husart->hdmarx != NULL) |
mbed_official | 181:a4cbdfbbd2f4 | 1019 | { |
mbed_official | 181:a4cbdfbbd2f4 | 1020 | HAL_DMA_Abort(husart->hdmarx); |
mbed_official | 181:a4cbdfbbd2f4 | 1021 | } |
mbed_official | 181:a4cbdfbbd2f4 | 1022 | |
mbed_official | 181:a4cbdfbbd2f4 | 1023 | /* Disable USART peripheral */ |
mbed_official | 181:a4cbdfbbd2f4 | 1024 | __HAL_USART_DISABLE(husart); |
mbed_official | 181:a4cbdfbbd2f4 | 1025 | |
mbed_official | 181:a4cbdfbbd2f4 | 1026 | husart->State = HAL_USART_STATE_READY; |
mbed_official | 181:a4cbdfbbd2f4 | 1027 | |
mbed_official | 181:a4cbdfbbd2f4 | 1028 | /* Process Unlocked */ |
mbed_official | 181:a4cbdfbbd2f4 | 1029 | __HAL_UNLOCK(husart); |
mbed_official | 181:a4cbdfbbd2f4 | 1030 | |
mbed_official | 181:a4cbdfbbd2f4 | 1031 | return HAL_OK; |
mbed_official | 181:a4cbdfbbd2f4 | 1032 | } |
mbed_official | 181:a4cbdfbbd2f4 | 1033 | |
mbed_official | 181:a4cbdfbbd2f4 | 1034 | /** |
mbed_official | 181:a4cbdfbbd2f4 | 1035 | * @brief This function handles USART interrupt request. |
mbed_official | 181:a4cbdfbbd2f4 | 1036 | * @param husart: USART handle |
mbed_official | 181:a4cbdfbbd2f4 | 1037 | * @retval None |
mbed_official | 181:a4cbdfbbd2f4 | 1038 | */ |
mbed_official | 181:a4cbdfbbd2f4 | 1039 | void HAL_USART_IRQHandler(USART_HandleTypeDef *husart) |
mbed_official | 181:a4cbdfbbd2f4 | 1040 | { |
mbed_official | 181:a4cbdfbbd2f4 | 1041 | |
mbed_official | 181:a4cbdfbbd2f4 | 1042 | /* USART parity error interrupt occured ------------------------------------*/ |
mbed_official | 181:a4cbdfbbd2f4 | 1043 | if((__HAL_USART_GET_IT(husart, USART_IT_PE) != RESET) && (__HAL_USART_GET_IT_SOURCE(husart, USART_IT_PE) != RESET)) |
mbed_official | 181:a4cbdfbbd2f4 | 1044 | { |
mbed_official | 181:a4cbdfbbd2f4 | 1045 | __HAL_USART_CLEAR_IT(husart, USART_IT_PE); |
mbed_official | 181:a4cbdfbbd2f4 | 1046 | husart->ErrorCode |= HAL_USART_ERROR_PE; |
mbed_official | 181:a4cbdfbbd2f4 | 1047 | /* Set the USART state ready to be able to start again the process */ |
mbed_official | 181:a4cbdfbbd2f4 | 1048 | husart->State = HAL_USART_STATE_READY; |
mbed_official | 181:a4cbdfbbd2f4 | 1049 | } |
mbed_official | 181:a4cbdfbbd2f4 | 1050 | |
mbed_official | 181:a4cbdfbbd2f4 | 1051 | /* USART frame error interrupt occured -------------------------------------*/ |
mbed_official | 181:a4cbdfbbd2f4 | 1052 | if((__HAL_USART_GET_IT(husart, USART_IT_FE) != RESET) && (__HAL_USART_GET_IT_SOURCE(husart, USART_IT_ERR) != RESET)) |
mbed_official | 181:a4cbdfbbd2f4 | 1053 | { |
mbed_official | 181:a4cbdfbbd2f4 | 1054 | __HAL_USART_CLEAR_IT(husart, USART_IT_FE); |
mbed_official | 181:a4cbdfbbd2f4 | 1055 | husart->ErrorCode |= HAL_USART_ERROR_FE; |
mbed_official | 181:a4cbdfbbd2f4 | 1056 | /* Set the USART state ready to be able to start again the process */ |
mbed_official | 181:a4cbdfbbd2f4 | 1057 | husart->State = HAL_USART_STATE_READY; |
mbed_official | 181:a4cbdfbbd2f4 | 1058 | } |
mbed_official | 181:a4cbdfbbd2f4 | 1059 | |
mbed_official | 181:a4cbdfbbd2f4 | 1060 | /* USART noise error interrupt occured -------------------------------------*/ |
mbed_official | 181:a4cbdfbbd2f4 | 1061 | if((__HAL_USART_GET_IT(husart, USART_IT_NE) != RESET) && (__HAL_USART_GET_IT_SOURCE(husart, USART_IT_ERR) != RESET)) |
mbed_official | 181:a4cbdfbbd2f4 | 1062 | { |
mbed_official | 181:a4cbdfbbd2f4 | 1063 | __HAL_USART_CLEAR_IT(husart, USART_IT_NE); |
mbed_official | 181:a4cbdfbbd2f4 | 1064 | husart->ErrorCode |= HAL_USART_ERROR_NE; |
mbed_official | 181:a4cbdfbbd2f4 | 1065 | /* Set the USART state ready to be able to start again the process */ |
mbed_official | 181:a4cbdfbbd2f4 | 1066 | husart->State = HAL_USART_STATE_READY; |
mbed_official | 181:a4cbdfbbd2f4 | 1067 | } |
mbed_official | 181:a4cbdfbbd2f4 | 1068 | |
mbed_official | 181:a4cbdfbbd2f4 | 1069 | /* USART Over-Run interrupt occured ----------------------------------------*/ |
mbed_official | 181:a4cbdfbbd2f4 | 1070 | if((__HAL_USART_GET_IT(husart, USART_IT_ORE) != RESET) && (__HAL_USART_GET_IT_SOURCE(husart, USART_IT_ERR) != RESET)) |
mbed_official | 181:a4cbdfbbd2f4 | 1071 | { |
mbed_official | 181:a4cbdfbbd2f4 | 1072 | __HAL_USART_CLEAR_IT(husart, USART_IT_ORE); |
mbed_official | 181:a4cbdfbbd2f4 | 1073 | husart->ErrorCode |= HAL_USART_ERROR_ORE; |
mbed_official | 181:a4cbdfbbd2f4 | 1074 | /* Set the USART state ready to be able to start again the process */ |
mbed_official | 181:a4cbdfbbd2f4 | 1075 | husart->State = HAL_USART_STATE_READY; |
mbed_official | 181:a4cbdfbbd2f4 | 1076 | } |
mbed_official | 181:a4cbdfbbd2f4 | 1077 | |
mbed_official | 181:a4cbdfbbd2f4 | 1078 | /* Call USART Error Call back function if need be --------------------------*/ |
mbed_official | 181:a4cbdfbbd2f4 | 1079 | if(husart->ErrorCode != HAL_USART_ERROR_NONE) |
mbed_official | 181:a4cbdfbbd2f4 | 1080 | { |
mbed_official | 181:a4cbdfbbd2f4 | 1081 | HAL_USART_ErrorCallback(husart); |
mbed_official | 181:a4cbdfbbd2f4 | 1082 | } |
mbed_official | 181:a4cbdfbbd2f4 | 1083 | |
mbed_official | 181:a4cbdfbbd2f4 | 1084 | /* USART in mode Receiver --------------------------------------------------*/ |
mbed_official | 181:a4cbdfbbd2f4 | 1085 | if((__HAL_USART_GET_IT(husart, USART_IT_RXNE) != RESET) && (__HAL_USART_GET_IT_SOURCE(husart, USART_IT_RXNE) != RESET)) |
mbed_official | 181:a4cbdfbbd2f4 | 1086 | { |
mbed_official | 181:a4cbdfbbd2f4 | 1087 | if(husart->State == HAL_USART_STATE_BUSY_RX) |
mbed_official | 181:a4cbdfbbd2f4 | 1088 | { |
mbed_official | 181:a4cbdfbbd2f4 | 1089 | USART_Receive_IT(husart); |
mbed_official | 181:a4cbdfbbd2f4 | 1090 | } |
mbed_official | 181:a4cbdfbbd2f4 | 1091 | else |
mbed_official | 181:a4cbdfbbd2f4 | 1092 | { |
mbed_official | 181:a4cbdfbbd2f4 | 1093 | USART_TransmitReceive_IT(husart); |
mbed_official | 181:a4cbdfbbd2f4 | 1094 | } |
mbed_official | 181:a4cbdfbbd2f4 | 1095 | } |
mbed_official | 181:a4cbdfbbd2f4 | 1096 | |
mbed_official | 181:a4cbdfbbd2f4 | 1097 | /* USART in mode Transmitter -----------------------------------------------*/ |
mbed_official | 181:a4cbdfbbd2f4 | 1098 | if((__HAL_USART_GET_IT(husart, USART_IT_TC) != RESET) &&(__HAL_USART_GET_IT_SOURCE(husart, USART_IT_TC) != RESET)) |
mbed_official | 181:a4cbdfbbd2f4 | 1099 | { |
mbed_official | 181:a4cbdfbbd2f4 | 1100 | if(husart->State == HAL_USART_STATE_BUSY_TX) |
mbed_official | 181:a4cbdfbbd2f4 | 1101 | { |
mbed_official | 181:a4cbdfbbd2f4 | 1102 | USART_Transmit_IT(husart); |
mbed_official | 181:a4cbdfbbd2f4 | 1103 | } |
mbed_official | 181:a4cbdfbbd2f4 | 1104 | else |
mbed_official | 181:a4cbdfbbd2f4 | 1105 | { |
mbed_official | 181:a4cbdfbbd2f4 | 1106 | USART_TransmitReceive_IT(husart); |
mbed_official | 181:a4cbdfbbd2f4 | 1107 | } |
mbed_official | 181:a4cbdfbbd2f4 | 1108 | } |
mbed_official | 181:a4cbdfbbd2f4 | 1109 | } |
mbed_official | 181:a4cbdfbbd2f4 | 1110 | |
mbed_official | 181:a4cbdfbbd2f4 | 1111 | /** |
mbed_official | 181:a4cbdfbbd2f4 | 1112 | * @brief This function handles USART Communication Timeout. |
mbed_official | 181:a4cbdfbbd2f4 | 1113 | * @param husart: USART handle |
mbed_official | 181:a4cbdfbbd2f4 | 1114 | * @param Flag: specifies the USART flag to check. |
mbed_official | 181:a4cbdfbbd2f4 | 1115 | * @param Status: The new Flag status (SET or RESET). |
mbed_official | 181:a4cbdfbbd2f4 | 1116 | * @param Timeout: Timeout duration |
mbed_official | 181:a4cbdfbbd2f4 | 1117 | * @retval HAL status |
mbed_official | 181:a4cbdfbbd2f4 | 1118 | */ |
mbed_official | 181:a4cbdfbbd2f4 | 1119 | static HAL_StatusTypeDef USART_WaitOnFlagUntilTimeout(USART_HandleTypeDef *husart, uint32_t Flag, FlagStatus Status, uint32_t Timeout) |
mbed_official | 181:a4cbdfbbd2f4 | 1120 | { |
mbed_official | 181:a4cbdfbbd2f4 | 1121 | uint32_t tickstart = 0x00; |
mbed_official | 181:a4cbdfbbd2f4 | 1122 | tickstart = HAL_GetTick(); |
mbed_official | 181:a4cbdfbbd2f4 | 1123 | |
mbed_official | 181:a4cbdfbbd2f4 | 1124 | /* Wait until flag is set */ |
mbed_official | 181:a4cbdfbbd2f4 | 1125 | if(Status == RESET) |
mbed_official | 181:a4cbdfbbd2f4 | 1126 | { |
mbed_official | 181:a4cbdfbbd2f4 | 1127 | while(__HAL_USART_GET_FLAG(husart, Flag) == RESET) |
mbed_official | 181:a4cbdfbbd2f4 | 1128 | { |
mbed_official | 181:a4cbdfbbd2f4 | 1129 | /* Check for the Timeout */ |
mbed_official | 181:a4cbdfbbd2f4 | 1130 | if(Timeout != HAL_MAX_DELAY) |
mbed_official | 181:a4cbdfbbd2f4 | 1131 | { |
mbed_official | 181:a4cbdfbbd2f4 | 1132 | if((HAL_GetTick() - tickstart ) > Timeout) |
mbed_official | 181:a4cbdfbbd2f4 | 1133 | { |
mbed_official | 181:a4cbdfbbd2f4 | 1134 | /* Disable TXE, RXNE, PE and ERR (Frame error, noise error, overrun error) interrupts for the interrupt process */ |
mbed_official | 181:a4cbdfbbd2f4 | 1135 | __HAL_USART_DISABLE_IT(husart, USART_IT_TXE); |
mbed_official | 181:a4cbdfbbd2f4 | 1136 | __HAL_USART_DISABLE_IT(husart, USART_IT_RXNE); |
mbed_official | 181:a4cbdfbbd2f4 | 1137 | __HAL_USART_DISABLE_IT(husart, USART_IT_PE); |
mbed_official | 181:a4cbdfbbd2f4 | 1138 | __HAL_USART_DISABLE_IT(husart, USART_IT_ERR); |
mbed_official | 181:a4cbdfbbd2f4 | 1139 | |
mbed_official | 181:a4cbdfbbd2f4 | 1140 | husart->State= HAL_USART_STATE_READY; |
mbed_official | 181:a4cbdfbbd2f4 | 1141 | |
mbed_official | 181:a4cbdfbbd2f4 | 1142 | /* Process Unlocked */ |
mbed_official | 181:a4cbdfbbd2f4 | 1143 | __HAL_UNLOCK(husart); |
mbed_official | 181:a4cbdfbbd2f4 | 1144 | |
mbed_official | 181:a4cbdfbbd2f4 | 1145 | return HAL_TIMEOUT; |
mbed_official | 181:a4cbdfbbd2f4 | 1146 | } |
mbed_official | 181:a4cbdfbbd2f4 | 1147 | } |
mbed_official | 181:a4cbdfbbd2f4 | 1148 | } |
mbed_official | 181:a4cbdfbbd2f4 | 1149 | } |
mbed_official | 181:a4cbdfbbd2f4 | 1150 | else |
mbed_official | 181:a4cbdfbbd2f4 | 1151 | { |
mbed_official | 181:a4cbdfbbd2f4 | 1152 | while(__HAL_USART_GET_FLAG(husart, Flag) != RESET) |
mbed_official | 181:a4cbdfbbd2f4 | 1153 | { |
mbed_official | 181:a4cbdfbbd2f4 | 1154 | /* Check for the Timeout */ |
mbed_official | 181:a4cbdfbbd2f4 | 1155 | if(Timeout != HAL_MAX_DELAY) |
mbed_official | 181:a4cbdfbbd2f4 | 1156 | { |
mbed_official | 181:a4cbdfbbd2f4 | 1157 | if((HAL_GetTick() - tickstart ) > Timeout) |
mbed_official | 181:a4cbdfbbd2f4 | 1158 | { |
mbed_official | 181:a4cbdfbbd2f4 | 1159 | /* Disable TXE, RXNE, PE and ERR (Frame error, noise error, overrun error) interrupts for the interrupt process */ |
mbed_official | 181:a4cbdfbbd2f4 | 1160 | __HAL_USART_DISABLE_IT(husart, USART_IT_TXE); |
mbed_official | 181:a4cbdfbbd2f4 | 1161 | __HAL_USART_DISABLE_IT(husart, USART_IT_RXNE); |
mbed_official | 181:a4cbdfbbd2f4 | 1162 | __HAL_USART_DISABLE_IT(husart, USART_IT_PE); |
mbed_official | 181:a4cbdfbbd2f4 | 1163 | __HAL_USART_DISABLE_IT(husart, USART_IT_ERR); |
mbed_official | 181:a4cbdfbbd2f4 | 1164 | |
mbed_official | 181:a4cbdfbbd2f4 | 1165 | husart->State= HAL_USART_STATE_READY; |
mbed_official | 181:a4cbdfbbd2f4 | 1166 | |
mbed_official | 181:a4cbdfbbd2f4 | 1167 | /* Process Unlocked */ |
mbed_official | 181:a4cbdfbbd2f4 | 1168 | __HAL_UNLOCK(husart); |
mbed_official | 181:a4cbdfbbd2f4 | 1169 | |
mbed_official | 181:a4cbdfbbd2f4 | 1170 | return HAL_TIMEOUT; |
mbed_official | 181:a4cbdfbbd2f4 | 1171 | } |
mbed_official | 181:a4cbdfbbd2f4 | 1172 | } |
mbed_official | 181:a4cbdfbbd2f4 | 1173 | } |
mbed_official | 181:a4cbdfbbd2f4 | 1174 | } |
mbed_official | 181:a4cbdfbbd2f4 | 1175 | return HAL_OK; |
mbed_official | 181:a4cbdfbbd2f4 | 1176 | } |
mbed_official | 181:a4cbdfbbd2f4 | 1177 | |
mbed_official | 181:a4cbdfbbd2f4 | 1178 | /** |
mbed_official | 181:a4cbdfbbd2f4 | 1179 | * @brief DMA USART transmit process complete callback. |
mbed_official | 181:a4cbdfbbd2f4 | 1180 | * @param hdma: DMA handle |
mbed_official | 181:a4cbdfbbd2f4 | 1181 | * @retval None |
mbed_official | 181:a4cbdfbbd2f4 | 1182 | */ |
mbed_official | 181:a4cbdfbbd2f4 | 1183 | static void USART_DMATransmitCplt(DMA_HandleTypeDef *hdma) |
mbed_official | 181:a4cbdfbbd2f4 | 1184 | { |
mbed_official | 181:a4cbdfbbd2f4 | 1185 | USART_HandleTypeDef* husart = ( USART_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent; |
mbed_official | 181:a4cbdfbbd2f4 | 1186 | |
mbed_official | 181:a4cbdfbbd2f4 | 1187 | husart->TxXferCount = 0; |
mbed_official | 181:a4cbdfbbd2f4 | 1188 | if(husart->State == HAL_USART_STATE_BUSY_TX) |
mbed_official | 181:a4cbdfbbd2f4 | 1189 | { |
mbed_official | 181:a4cbdfbbd2f4 | 1190 | /* Wait for USART TC Flag */ |
mbed_official | 181:a4cbdfbbd2f4 | 1191 | if(USART_WaitOnFlagUntilTimeout(husart, USART_FLAG_TC, RESET, HAL_USART_TXDMA_TIMEOUTVALUE) != HAL_OK) |
mbed_official | 181:a4cbdfbbd2f4 | 1192 | { |
mbed_official | 181:a4cbdfbbd2f4 | 1193 | /* Timeout Occured */ |
mbed_official | 181:a4cbdfbbd2f4 | 1194 | husart->State = HAL_USART_STATE_TIMEOUT; |
mbed_official | 181:a4cbdfbbd2f4 | 1195 | HAL_USART_ErrorCallback(husart); |
mbed_official | 181:a4cbdfbbd2f4 | 1196 | } |
mbed_official | 181:a4cbdfbbd2f4 | 1197 | else |
mbed_official | 181:a4cbdfbbd2f4 | 1198 | { |
mbed_official | 181:a4cbdfbbd2f4 | 1199 | /* No Timeout */ |
mbed_official | 181:a4cbdfbbd2f4 | 1200 | /* Disable the DMA transfer for transmit request by setting the DMAT bit |
mbed_official | 181:a4cbdfbbd2f4 | 1201 | in the USART CR3 register */ |
mbed_official | 181:a4cbdfbbd2f4 | 1202 | husart->Instance->CR3 &= ~(USART_CR3_DMAT); |
mbed_official | 181:a4cbdfbbd2f4 | 1203 | husart->State= HAL_USART_STATE_READY; |
mbed_official | 181:a4cbdfbbd2f4 | 1204 | } |
mbed_official | 181:a4cbdfbbd2f4 | 1205 | } |
mbed_official | 181:a4cbdfbbd2f4 | 1206 | /* the usart state is HAL_USART_STATE_BUSY_TX_RX*/ |
mbed_official | 181:a4cbdfbbd2f4 | 1207 | else |
mbed_official | 181:a4cbdfbbd2f4 | 1208 | { |
mbed_official | 181:a4cbdfbbd2f4 | 1209 | husart->State= HAL_USART_STATE_BUSY_RX; |
mbed_official | 181:a4cbdfbbd2f4 | 1210 | HAL_USART_TxCpltCallback(husart); |
mbed_official | 181:a4cbdfbbd2f4 | 1211 | } |
mbed_official | 181:a4cbdfbbd2f4 | 1212 | } |
mbed_official | 181:a4cbdfbbd2f4 | 1213 | |
mbed_official | 181:a4cbdfbbd2f4 | 1214 | /** |
mbed_official | 181:a4cbdfbbd2f4 | 1215 | * @brief DMA USART transmit process half complete callback |
mbed_official | 181:a4cbdfbbd2f4 | 1216 | * @param hdma : DMA handle |
mbed_official | 181:a4cbdfbbd2f4 | 1217 | * @retval None |
mbed_official | 181:a4cbdfbbd2f4 | 1218 | */ |
mbed_official | 181:a4cbdfbbd2f4 | 1219 | static void USART_DMATxHalfCplt(DMA_HandleTypeDef *hdma) |
mbed_official | 181:a4cbdfbbd2f4 | 1220 | { |
mbed_official | 181:a4cbdfbbd2f4 | 1221 | USART_HandleTypeDef* husart = (USART_HandleTypeDef*)((DMA_HandleTypeDef*)hdma)->Parent; |
mbed_official | 181:a4cbdfbbd2f4 | 1222 | |
mbed_official | 181:a4cbdfbbd2f4 | 1223 | HAL_USART_TxHalfCpltCallback(husart); |
mbed_official | 181:a4cbdfbbd2f4 | 1224 | } |
mbed_official | 181:a4cbdfbbd2f4 | 1225 | |
mbed_official | 181:a4cbdfbbd2f4 | 1226 | /** |
mbed_official | 181:a4cbdfbbd2f4 | 1227 | * @brief DMA USART receive process complete callback. |
mbed_official | 181:a4cbdfbbd2f4 | 1228 | * @param hdma: DMA handle |
mbed_official | 181:a4cbdfbbd2f4 | 1229 | * @retval None |
mbed_official | 181:a4cbdfbbd2f4 | 1230 | */ |
mbed_official | 181:a4cbdfbbd2f4 | 1231 | static void USART_DMAReceiveCplt(DMA_HandleTypeDef *hdma) |
mbed_official | 181:a4cbdfbbd2f4 | 1232 | { |
mbed_official | 181:a4cbdfbbd2f4 | 1233 | USART_HandleTypeDef* husart = ( USART_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent; |
mbed_official | 181:a4cbdfbbd2f4 | 1234 | |
mbed_official | 181:a4cbdfbbd2f4 | 1235 | husart->RxXferCount = 0; |
mbed_official | 181:a4cbdfbbd2f4 | 1236 | |
mbed_official | 181:a4cbdfbbd2f4 | 1237 | /* Disable the DMA RX transfer for the Transmit/receiver request by resetting the DMAR bit |
mbed_official | 181:a4cbdfbbd2f4 | 1238 | in USART CR3 register */ |
mbed_official | 181:a4cbdfbbd2f4 | 1239 | husart->Instance->CR3 &= (uint32_t)~((uint32_t)USART_CR3_DMAR); |
mbed_official | 181:a4cbdfbbd2f4 | 1240 | /* similarly, disable the DMA TX transfer that was started to provide the |
mbed_official | 181:a4cbdfbbd2f4 | 1241 | clock to the slave device */ |
mbed_official | 181:a4cbdfbbd2f4 | 1242 | husart->Instance->CR3 &= (uint32_t)~((uint32_t)USART_CR3_DMAT); |
mbed_official | 181:a4cbdfbbd2f4 | 1243 | |
mbed_official | 181:a4cbdfbbd2f4 | 1244 | husart->State= HAL_USART_STATE_READY; |
mbed_official | 181:a4cbdfbbd2f4 | 1245 | |
mbed_official | 181:a4cbdfbbd2f4 | 1246 | HAL_USART_RxCpltCallback(husart); |
mbed_official | 181:a4cbdfbbd2f4 | 1247 | } |
mbed_official | 181:a4cbdfbbd2f4 | 1248 | |
mbed_official | 181:a4cbdfbbd2f4 | 1249 | /** |
mbed_official | 181:a4cbdfbbd2f4 | 1250 | * @brief DMA USART receive process half complete callback |
mbed_official | 181:a4cbdfbbd2f4 | 1251 | * @param hdma : DMA handle |
mbed_official | 181:a4cbdfbbd2f4 | 1252 | * @retval None |
mbed_official | 181:a4cbdfbbd2f4 | 1253 | */ |
mbed_official | 181:a4cbdfbbd2f4 | 1254 | static void USART_DMARxHalfCplt(DMA_HandleTypeDef *hdma) |
mbed_official | 181:a4cbdfbbd2f4 | 1255 | { |
mbed_official | 181:a4cbdfbbd2f4 | 1256 | USART_HandleTypeDef* husart = (USART_HandleTypeDef*)((DMA_HandleTypeDef*)hdma)->Parent; |
mbed_official | 181:a4cbdfbbd2f4 | 1257 | |
mbed_official | 181:a4cbdfbbd2f4 | 1258 | HAL_USART_RxHalfCpltCallback(husart); |
mbed_official | 181:a4cbdfbbd2f4 | 1259 | } |
mbed_official | 181:a4cbdfbbd2f4 | 1260 | |
mbed_official | 181:a4cbdfbbd2f4 | 1261 | /** |
mbed_official | 181:a4cbdfbbd2f4 | 1262 | * @brief DMA USART communication error callback. |
mbed_official | 181:a4cbdfbbd2f4 | 1263 | * @param hdma: DMA handle |
mbed_official | 181:a4cbdfbbd2f4 | 1264 | * @retval None |
mbed_official | 181:a4cbdfbbd2f4 | 1265 | */ |
mbed_official | 181:a4cbdfbbd2f4 | 1266 | static void USART_DMAError(DMA_HandleTypeDef *hdma) |
mbed_official | 181:a4cbdfbbd2f4 | 1267 | { |
mbed_official | 181:a4cbdfbbd2f4 | 1268 | USART_HandleTypeDef* husart = ( USART_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent; |
mbed_official | 181:a4cbdfbbd2f4 | 1269 | |
mbed_official | 181:a4cbdfbbd2f4 | 1270 | husart->RxXferCount = 0; |
mbed_official | 181:a4cbdfbbd2f4 | 1271 | husart->TxXferCount = 0; |
mbed_official | 181:a4cbdfbbd2f4 | 1272 | husart->ErrorCode |= HAL_USART_ERROR_DMA; |
mbed_official | 181:a4cbdfbbd2f4 | 1273 | husart->State= HAL_USART_STATE_READY; |
mbed_official | 181:a4cbdfbbd2f4 | 1274 | |
mbed_official | 181:a4cbdfbbd2f4 | 1275 | HAL_USART_ErrorCallback(husart); |
mbed_official | 181:a4cbdfbbd2f4 | 1276 | } |
mbed_official | 181:a4cbdfbbd2f4 | 1277 | |
mbed_official | 181:a4cbdfbbd2f4 | 1278 | /** |
mbed_official | 181:a4cbdfbbd2f4 | 1279 | * @brief Tx Transfer completed callbacks. |
mbed_official | 181:a4cbdfbbd2f4 | 1280 | * @param husart: USART handle |
mbed_official | 181:a4cbdfbbd2f4 | 1281 | * @retval None |
mbed_official | 181:a4cbdfbbd2f4 | 1282 | */ |
mbed_official | 181:a4cbdfbbd2f4 | 1283 | __weak void HAL_USART_TxCpltCallback(USART_HandleTypeDef *husart) |
mbed_official | 181:a4cbdfbbd2f4 | 1284 | { |
mbed_official | 181:a4cbdfbbd2f4 | 1285 | /* NOTE: This function Should not be modified, when the callback is needed, |
mbed_official | 181:a4cbdfbbd2f4 | 1286 | the HAL_USART_TxCpltCallback could be implemented in the user file |
mbed_official | 181:a4cbdfbbd2f4 | 1287 | */ |
mbed_official | 181:a4cbdfbbd2f4 | 1288 | } |
mbed_official | 181:a4cbdfbbd2f4 | 1289 | |
mbed_official | 181:a4cbdfbbd2f4 | 1290 | /** |
mbed_official | 181:a4cbdfbbd2f4 | 1291 | * @brief Tx Half Transfer completed callbacks. |
mbed_official | 181:a4cbdfbbd2f4 | 1292 | * @param husart: USART handle |
mbed_official | 181:a4cbdfbbd2f4 | 1293 | * @retval None |
mbed_official | 181:a4cbdfbbd2f4 | 1294 | */ |
mbed_official | 181:a4cbdfbbd2f4 | 1295 | __weak void HAL_USART_TxHalfCpltCallback(USART_HandleTypeDef *husart) |
mbed_official | 181:a4cbdfbbd2f4 | 1296 | { |
mbed_official | 181:a4cbdfbbd2f4 | 1297 | /* NOTE: This function Should not be modified, when the callback is needed, |
mbed_official | 181:a4cbdfbbd2f4 | 1298 | the HAL_USART_TxCpltCallback could be implemented in the user file |
mbed_official | 181:a4cbdfbbd2f4 | 1299 | */ |
mbed_official | 181:a4cbdfbbd2f4 | 1300 | } |
mbed_official | 181:a4cbdfbbd2f4 | 1301 | |
mbed_official | 181:a4cbdfbbd2f4 | 1302 | /** |
mbed_official | 181:a4cbdfbbd2f4 | 1303 | * @brief Rx Transfer completed callbacks. |
mbed_official | 181:a4cbdfbbd2f4 | 1304 | * @param husart: USART handle |
mbed_official | 181:a4cbdfbbd2f4 | 1305 | * @retval None |
mbed_official | 181:a4cbdfbbd2f4 | 1306 | */ |
mbed_official | 181:a4cbdfbbd2f4 | 1307 | __weak void HAL_USART_RxCpltCallback(USART_HandleTypeDef *husart) |
mbed_official | 181:a4cbdfbbd2f4 | 1308 | { |
mbed_official | 181:a4cbdfbbd2f4 | 1309 | /* NOTE: This function Should not be modified, when the callback is needed, |
mbed_official | 181:a4cbdfbbd2f4 | 1310 | the HAL_USART_TxCpltCallback could be implemented in the user file |
mbed_official | 181:a4cbdfbbd2f4 | 1311 | */ |
mbed_official | 181:a4cbdfbbd2f4 | 1312 | } |
mbed_official | 181:a4cbdfbbd2f4 | 1313 | |
mbed_official | 181:a4cbdfbbd2f4 | 1314 | /** |
mbed_official | 181:a4cbdfbbd2f4 | 1315 | * @brief Rx Half Transfer completed callbacks. |
mbed_official | 181:a4cbdfbbd2f4 | 1316 | * @param husart: USART handle |
mbed_official | 181:a4cbdfbbd2f4 | 1317 | * @retval None |
mbed_official | 181:a4cbdfbbd2f4 | 1318 | */ |
mbed_official | 181:a4cbdfbbd2f4 | 1319 | __weak void HAL_USART_RxHalfCpltCallback(USART_HandleTypeDef *husart) |
mbed_official | 181:a4cbdfbbd2f4 | 1320 | { |
mbed_official | 181:a4cbdfbbd2f4 | 1321 | /* NOTE: This function Should not be modified, when the callback is needed, |
mbed_official | 181:a4cbdfbbd2f4 | 1322 | the HAL_USART_TxCpltCallback could be implemented in the user file |
mbed_official | 181:a4cbdfbbd2f4 | 1323 | */ |
mbed_official | 181:a4cbdfbbd2f4 | 1324 | } |
mbed_official | 181:a4cbdfbbd2f4 | 1325 | |
mbed_official | 181:a4cbdfbbd2f4 | 1326 | /** |
mbed_official | 181:a4cbdfbbd2f4 | 1327 | * @brief Tx/Rx Transfers completed callback for the non-blocking process. |
mbed_official | 181:a4cbdfbbd2f4 | 1328 | * @param husart: USART handle |
mbed_official | 181:a4cbdfbbd2f4 | 1329 | * @retval None |
mbed_official | 181:a4cbdfbbd2f4 | 1330 | */ |
mbed_official | 181:a4cbdfbbd2f4 | 1331 | __weak void HAL_USART_TxRxCpltCallback(USART_HandleTypeDef *husart) |
mbed_official | 181:a4cbdfbbd2f4 | 1332 | { |
mbed_official | 181:a4cbdfbbd2f4 | 1333 | /* NOTE: This function Should not be modified, when the callback is needed, |
mbed_official | 181:a4cbdfbbd2f4 | 1334 | the HAL_USART_TxCpltCallback could be implemented in the user file |
mbed_official | 181:a4cbdfbbd2f4 | 1335 | */ |
mbed_official | 181:a4cbdfbbd2f4 | 1336 | } |
mbed_official | 181:a4cbdfbbd2f4 | 1337 | |
mbed_official | 181:a4cbdfbbd2f4 | 1338 | /** |
mbed_official | 181:a4cbdfbbd2f4 | 1339 | * @brief USART error callbacks. |
mbed_official | 181:a4cbdfbbd2f4 | 1340 | * @param husart: USART handle |
mbed_official | 181:a4cbdfbbd2f4 | 1341 | * @retval None |
mbed_official | 181:a4cbdfbbd2f4 | 1342 | */ |
mbed_official | 181:a4cbdfbbd2f4 | 1343 | __weak void HAL_USART_ErrorCallback(USART_HandleTypeDef *husart) |
mbed_official | 181:a4cbdfbbd2f4 | 1344 | { |
mbed_official | 181:a4cbdfbbd2f4 | 1345 | /* NOTE: This function Should not be modified, when the callback is needed, |
mbed_official | 181:a4cbdfbbd2f4 | 1346 | the HAL_USART_ErrorCallback could be implemented in the user file |
mbed_official | 181:a4cbdfbbd2f4 | 1347 | */ |
mbed_official | 181:a4cbdfbbd2f4 | 1348 | } |
mbed_official | 181:a4cbdfbbd2f4 | 1349 | |
mbed_official | 181:a4cbdfbbd2f4 | 1350 | /** |
mbed_official | 181:a4cbdfbbd2f4 | 1351 | * @brief Simplex Send an amount of data in non-blocking mode. |
mbed_official | 181:a4cbdfbbd2f4 | 1352 | * Function called under interruption only, once |
mbed_official | 181:a4cbdfbbd2f4 | 1353 | * interruptions have been enabled by HAL_USART_Transmit_IT() |
mbed_official | 181:a4cbdfbbd2f4 | 1354 | * @param husart: USART handle |
mbed_official | 181:a4cbdfbbd2f4 | 1355 | * @retval HAL status |
mbed_official | 181:a4cbdfbbd2f4 | 1356 | * @note The USART errors are not managed to avoid the overrun error. |
mbed_official | 181:a4cbdfbbd2f4 | 1357 | */ |
mbed_official | 181:a4cbdfbbd2f4 | 1358 | static HAL_StatusTypeDef USART_Transmit_IT(USART_HandleTypeDef *husart) |
mbed_official | 181:a4cbdfbbd2f4 | 1359 | { |
mbed_official | 181:a4cbdfbbd2f4 | 1360 | uint16_t* tmp; |
mbed_official | 181:a4cbdfbbd2f4 | 1361 | |
mbed_official | 181:a4cbdfbbd2f4 | 1362 | if(husart->State == HAL_USART_STATE_BUSY_TX) |
mbed_official | 181:a4cbdfbbd2f4 | 1363 | { |
mbed_official | 181:a4cbdfbbd2f4 | 1364 | /* Process Locked */ |
mbed_official | 181:a4cbdfbbd2f4 | 1365 | __HAL_LOCK(husart); |
mbed_official | 181:a4cbdfbbd2f4 | 1366 | |
mbed_official | 181:a4cbdfbbd2f4 | 1367 | if(husart->TxXferCount == 0) |
mbed_official | 181:a4cbdfbbd2f4 | 1368 | { |
mbed_official | 181:a4cbdfbbd2f4 | 1369 | /* Disable the USART Transmit Complete Interrupt */ |
mbed_official | 181:a4cbdfbbd2f4 | 1370 | __HAL_USART_DISABLE_IT(husart, USART_IT_TC); |
mbed_official | 181:a4cbdfbbd2f4 | 1371 | |
mbed_official | 181:a4cbdfbbd2f4 | 1372 | /* Disable the USART Error Interrupt: (Frame error, noise error, overrun error) */ |
mbed_official | 181:a4cbdfbbd2f4 | 1373 | __HAL_USART_DISABLE_IT(husart, USART_IT_ERR); |
mbed_official | 181:a4cbdfbbd2f4 | 1374 | |
mbed_official | 181:a4cbdfbbd2f4 | 1375 | husart->State = HAL_USART_STATE_READY; |
mbed_official | 181:a4cbdfbbd2f4 | 1376 | |
mbed_official | 181:a4cbdfbbd2f4 | 1377 | /* Call the Process Unlocked before calling the Tx call back API to give the possibiity to |
mbed_official | 181:a4cbdfbbd2f4 | 1378 | start again the Transmission under the Tx call back API */ |
mbed_official | 181:a4cbdfbbd2f4 | 1379 | __HAL_UNLOCK(husart); |
mbed_official | 181:a4cbdfbbd2f4 | 1380 | |
mbed_official | 181:a4cbdfbbd2f4 | 1381 | HAL_USART_TxCpltCallback(husart); |
mbed_official | 181:a4cbdfbbd2f4 | 1382 | |
mbed_official | 181:a4cbdfbbd2f4 | 1383 | return HAL_OK; |
mbed_official | 181:a4cbdfbbd2f4 | 1384 | } |
mbed_official | 181:a4cbdfbbd2f4 | 1385 | else |
mbed_official | 181:a4cbdfbbd2f4 | 1386 | { |
mbed_official | 181:a4cbdfbbd2f4 | 1387 | if((husart->Init.WordLength == USART_WORDLENGTH_9B) && (husart->Init.Parity == USART_PARITY_NONE)) |
mbed_official | 181:a4cbdfbbd2f4 | 1388 | { |
mbed_official | 181:a4cbdfbbd2f4 | 1389 | tmp = (uint16_t*) husart->pTxBuffPtr; |
mbed_official | 181:a4cbdfbbd2f4 | 1390 | husart->Instance->TDR = (*tmp & (uint16_t)0x01FF); |
mbed_official | 181:a4cbdfbbd2f4 | 1391 | husart->pTxBuffPtr += 2; |
mbed_official | 181:a4cbdfbbd2f4 | 1392 | } |
mbed_official | 181:a4cbdfbbd2f4 | 1393 | else |
mbed_official | 181:a4cbdfbbd2f4 | 1394 | { |
mbed_official | 181:a4cbdfbbd2f4 | 1395 | husart->Instance->TDR = (uint8_t)(*husart->pTxBuffPtr++ & (uint8_t)0xFF); |
mbed_official | 181:a4cbdfbbd2f4 | 1396 | } |
mbed_official | 181:a4cbdfbbd2f4 | 1397 | husart->TxXferCount--; |
mbed_official | 181:a4cbdfbbd2f4 | 1398 | |
mbed_official | 181:a4cbdfbbd2f4 | 1399 | /* Process Unlocked */ |
mbed_official | 181:a4cbdfbbd2f4 | 1400 | __HAL_UNLOCK(husart); |
mbed_official | 181:a4cbdfbbd2f4 | 1401 | |
mbed_official | 181:a4cbdfbbd2f4 | 1402 | return HAL_OK; |
mbed_official | 181:a4cbdfbbd2f4 | 1403 | } |
mbed_official | 181:a4cbdfbbd2f4 | 1404 | } |
mbed_official | 181:a4cbdfbbd2f4 | 1405 | else |
mbed_official | 181:a4cbdfbbd2f4 | 1406 | { |
mbed_official | 181:a4cbdfbbd2f4 | 1407 | return HAL_BUSY; |
mbed_official | 181:a4cbdfbbd2f4 | 1408 | } |
mbed_official | 181:a4cbdfbbd2f4 | 1409 | } |
mbed_official | 181:a4cbdfbbd2f4 | 1410 | |
mbed_official | 181:a4cbdfbbd2f4 | 1411 | /** |
mbed_official | 181:a4cbdfbbd2f4 | 1412 | * @brief Simplex Receive an amount of data in non-blocking mode. |
mbed_official | 181:a4cbdfbbd2f4 | 1413 | * Function called under interruption only, once |
mbed_official | 181:a4cbdfbbd2f4 | 1414 | * interruptions have been enabled by HAL_USART_Receive_IT() |
mbed_official | 181:a4cbdfbbd2f4 | 1415 | * @param husart: USART handle |
mbed_official | 181:a4cbdfbbd2f4 | 1416 | * @retval HAL status |
mbed_official | 181:a4cbdfbbd2f4 | 1417 | */ |
mbed_official | 181:a4cbdfbbd2f4 | 1418 | static HAL_StatusTypeDef USART_Receive_IT(USART_HandleTypeDef *husart) |
mbed_official | 181:a4cbdfbbd2f4 | 1419 | { |
mbed_official | 181:a4cbdfbbd2f4 | 1420 | uint16_t* tmp; |
mbed_official | 181:a4cbdfbbd2f4 | 1421 | uint16_t uhMask = husart->Mask; |
mbed_official | 181:a4cbdfbbd2f4 | 1422 | |
mbed_official | 181:a4cbdfbbd2f4 | 1423 | if(husart->State == HAL_USART_STATE_BUSY_RX) |
mbed_official | 181:a4cbdfbbd2f4 | 1424 | { |
mbed_official | 181:a4cbdfbbd2f4 | 1425 | /* Process Locked */ |
mbed_official | 181:a4cbdfbbd2f4 | 1426 | __HAL_LOCK(husart); |
mbed_official | 181:a4cbdfbbd2f4 | 1427 | |
mbed_official | 181:a4cbdfbbd2f4 | 1428 | if((husart->Init.WordLength == USART_WORDLENGTH_9B) && (husart->Init.Parity == USART_PARITY_NONE)) |
mbed_official | 181:a4cbdfbbd2f4 | 1429 | { |
mbed_official | 181:a4cbdfbbd2f4 | 1430 | tmp = (uint16_t*) husart->pRxBuffPtr; |
mbed_official | 181:a4cbdfbbd2f4 | 1431 | *tmp = (uint16_t)(husart->Instance->RDR & uhMask); |
mbed_official | 181:a4cbdfbbd2f4 | 1432 | husart->pRxBuffPtr += 2; |
mbed_official | 181:a4cbdfbbd2f4 | 1433 | } |
mbed_official | 181:a4cbdfbbd2f4 | 1434 | else |
mbed_official | 181:a4cbdfbbd2f4 | 1435 | { |
mbed_official | 181:a4cbdfbbd2f4 | 1436 | *husart->pRxBuffPtr++ = (uint8_t)(husart->Instance->RDR & (uint8_t)uhMask); |
mbed_official | 181:a4cbdfbbd2f4 | 1437 | } |
mbed_official | 181:a4cbdfbbd2f4 | 1438 | /* Send dummy byte in order to generate the clock for the Slave to Send the next data */ |
mbed_official | 181:a4cbdfbbd2f4 | 1439 | husart->Instance->TDR = (DUMMY_DATA & (uint16_t)0x00FF); |
mbed_official | 181:a4cbdfbbd2f4 | 1440 | |
mbed_official | 181:a4cbdfbbd2f4 | 1441 | if(--husart->RxXferCount == 0) |
mbed_official | 181:a4cbdfbbd2f4 | 1442 | { |
mbed_official | 181:a4cbdfbbd2f4 | 1443 | /* Wait for RXNE Flag */ |
mbed_official | 181:a4cbdfbbd2f4 | 1444 | if(USART_WaitOnFlagUntilTimeout(husart, USART_FLAG_RXNE, RESET, HAL_USART_TXDMA_TIMEOUTVALUE) != HAL_OK) |
mbed_official | 181:a4cbdfbbd2f4 | 1445 | { |
mbed_official | 181:a4cbdfbbd2f4 | 1446 | return HAL_TIMEOUT; |
mbed_official | 181:a4cbdfbbd2f4 | 1447 | } |
mbed_official | 181:a4cbdfbbd2f4 | 1448 | |
mbed_official | 181:a4cbdfbbd2f4 | 1449 | __HAL_USART_DISABLE_IT(husart, USART_IT_RXNE); |
mbed_official | 181:a4cbdfbbd2f4 | 1450 | |
mbed_official | 181:a4cbdfbbd2f4 | 1451 | /* Disable the USART Parity Error Interrupt */ |
mbed_official | 181:a4cbdfbbd2f4 | 1452 | __HAL_USART_DISABLE_IT(husart, USART_IT_PE); |
mbed_official | 181:a4cbdfbbd2f4 | 1453 | |
mbed_official | 181:a4cbdfbbd2f4 | 1454 | /* Disable the USART Error Interrupt: (Frame error, noise error, overrun error) */ |
mbed_official | 181:a4cbdfbbd2f4 | 1455 | __HAL_USART_DISABLE_IT(husart, USART_IT_ERR); |
mbed_official | 181:a4cbdfbbd2f4 | 1456 | |
mbed_official | 181:a4cbdfbbd2f4 | 1457 | husart->State = HAL_USART_STATE_READY; |
mbed_official | 181:a4cbdfbbd2f4 | 1458 | |
mbed_official | 181:a4cbdfbbd2f4 | 1459 | /* Call the Process Unlocked before calling the Rx call back API to give the possibility to |
mbed_official | 181:a4cbdfbbd2f4 | 1460 | start again the reception under the Rx call back API */ |
mbed_official | 181:a4cbdfbbd2f4 | 1461 | __HAL_UNLOCK(husart); |
mbed_official | 181:a4cbdfbbd2f4 | 1462 | |
mbed_official | 181:a4cbdfbbd2f4 | 1463 | HAL_USART_RxCpltCallback(husart); |
mbed_official | 181:a4cbdfbbd2f4 | 1464 | |
mbed_official | 181:a4cbdfbbd2f4 | 1465 | return HAL_OK; |
mbed_official | 181:a4cbdfbbd2f4 | 1466 | } |
mbed_official | 181:a4cbdfbbd2f4 | 1467 | |
mbed_official | 181:a4cbdfbbd2f4 | 1468 | /* Process Unlocked */ |
mbed_official | 181:a4cbdfbbd2f4 | 1469 | __HAL_UNLOCK(husart); |
mbed_official | 181:a4cbdfbbd2f4 | 1470 | |
mbed_official | 181:a4cbdfbbd2f4 | 1471 | return HAL_OK; |
mbed_official | 181:a4cbdfbbd2f4 | 1472 | } |
mbed_official | 181:a4cbdfbbd2f4 | 1473 | else |
mbed_official | 181:a4cbdfbbd2f4 | 1474 | { |
mbed_official | 181:a4cbdfbbd2f4 | 1475 | return HAL_BUSY; |
mbed_official | 181:a4cbdfbbd2f4 | 1476 | } |
mbed_official | 181:a4cbdfbbd2f4 | 1477 | } |
mbed_official | 181:a4cbdfbbd2f4 | 1478 | |
mbed_official | 181:a4cbdfbbd2f4 | 1479 | /** |
mbed_official | 181:a4cbdfbbd2f4 | 1480 | * @brief Full-Duplex Send receive an amount of data in full-duplex mode (non-blocking). |
mbed_official | 181:a4cbdfbbd2f4 | 1481 | * Function called under interruption only, once |
mbed_official | 181:a4cbdfbbd2f4 | 1482 | * interruptions have been enabled by HAL_USART_TransmitReceive_IT() |
mbed_official | 181:a4cbdfbbd2f4 | 1483 | * @param husart: USART handle |
mbed_official | 181:a4cbdfbbd2f4 | 1484 | * @retval HAL status |
mbed_official | 181:a4cbdfbbd2f4 | 1485 | */ |
mbed_official | 181:a4cbdfbbd2f4 | 1486 | static HAL_StatusTypeDef USART_TransmitReceive_IT(USART_HandleTypeDef *husart) |
mbed_official | 181:a4cbdfbbd2f4 | 1487 | { |
mbed_official | 181:a4cbdfbbd2f4 | 1488 | uint16_t* tmp; |
mbed_official | 181:a4cbdfbbd2f4 | 1489 | uint16_t uhMask = husart->Mask; |
mbed_official | 181:a4cbdfbbd2f4 | 1490 | |
mbed_official | 181:a4cbdfbbd2f4 | 1491 | if(husart->State == HAL_USART_STATE_BUSY_TX_RX) |
mbed_official | 181:a4cbdfbbd2f4 | 1492 | { |
mbed_official | 181:a4cbdfbbd2f4 | 1493 | /* Process Locked */ |
mbed_official | 181:a4cbdfbbd2f4 | 1494 | __HAL_LOCK(husart); |
mbed_official | 181:a4cbdfbbd2f4 | 1495 | if(husart->TxXferCount != 0x00) |
mbed_official | 181:a4cbdfbbd2f4 | 1496 | { |
mbed_official | 181:a4cbdfbbd2f4 | 1497 | if(__HAL_USART_GET_FLAG(husart, USART_FLAG_TC) != RESET) |
mbed_official | 181:a4cbdfbbd2f4 | 1498 | { |
mbed_official | 181:a4cbdfbbd2f4 | 1499 | if((husart->Init.WordLength == USART_WORDLENGTH_9B) && (husart->Init.Parity == USART_PARITY_NONE)) |
mbed_official | 181:a4cbdfbbd2f4 | 1500 | { |
mbed_official | 181:a4cbdfbbd2f4 | 1501 | tmp = (uint16_t*) husart->pTxBuffPtr; |
mbed_official | 181:a4cbdfbbd2f4 | 1502 | husart->Instance->TDR = (uint16_t)(*tmp & uhMask); |
mbed_official | 181:a4cbdfbbd2f4 | 1503 | husart->pTxBuffPtr += 2; |
mbed_official | 181:a4cbdfbbd2f4 | 1504 | } |
mbed_official | 181:a4cbdfbbd2f4 | 1505 | else |
mbed_official | 181:a4cbdfbbd2f4 | 1506 | { |
mbed_official | 181:a4cbdfbbd2f4 | 1507 | husart->Instance->TDR = (uint8_t)(*husart->pTxBuffPtr++ & (uint8_t)uhMask); |
mbed_official | 181:a4cbdfbbd2f4 | 1508 | } |
mbed_official | 181:a4cbdfbbd2f4 | 1509 | husart->TxXferCount--; |
mbed_official | 181:a4cbdfbbd2f4 | 1510 | |
mbed_official | 181:a4cbdfbbd2f4 | 1511 | /* Check the latest data transmitted */ |
mbed_official | 181:a4cbdfbbd2f4 | 1512 | if(husart->TxXferCount == 0) |
mbed_official | 181:a4cbdfbbd2f4 | 1513 | { |
mbed_official | 181:a4cbdfbbd2f4 | 1514 | __HAL_USART_DISABLE_IT(husart, USART_IT_TC); |
mbed_official | 181:a4cbdfbbd2f4 | 1515 | } |
mbed_official | 181:a4cbdfbbd2f4 | 1516 | } |
mbed_official | 181:a4cbdfbbd2f4 | 1517 | } |
mbed_official | 181:a4cbdfbbd2f4 | 1518 | |
mbed_official | 181:a4cbdfbbd2f4 | 1519 | if(husart->RxXferCount != 0x00) |
mbed_official | 181:a4cbdfbbd2f4 | 1520 | { |
mbed_official | 181:a4cbdfbbd2f4 | 1521 | if(__HAL_USART_GET_FLAG(husart, USART_FLAG_RXNE) != RESET) |
mbed_official | 181:a4cbdfbbd2f4 | 1522 | { |
mbed_official | 181:a4cbdfbbd2f4 | 1523 | if((husart->Init.WordLength == USART_WORDLENGTH_9B) && (husart->Init.Parity == USART_PARITY_NONE)) |
mbed_official | 181:a4cbdfbbd2f4 | 1524 | { |
mbed_official | 181:a4cbdfbbd2f4 | 1525 | tmp = (uint16_t*) husart->pRxBuffPtr; |
mbed_official | 181:a4cbdfbbd2f4 | 1526 | *tmp = (uint16_t)(husart->Instance->RDR & uhMask); |
mbed_official | 181:a4cbdfbbd2f4 | 1527 | husart->pRxBuffPtr += 2; |
mbed_official | 181:a4cbdfbbd2f4 | 1528 | } |
mbed_official | 181:a4cbdfbbd2f4 | 1529 | else |
mbed_official | 181:a4cbdfbbd2f4 | 1530 | { |
mbed_official | 181:a4cbdfbbd2f4 | 1531 | *husart->pRxBuffPtr++ = (uint8_t)(husart->Instance->RDR & (uint8_t)uhMask); |
mbed_official | 181:a4cbdfbbd2f4 | 1532 | } |
mbed_official | 181:a4cbdfbbd2f4 | 1533 | husart->RxXferCount--; |
mbed_official | 181:a4cbdfbbd2f4 | 1534 | } |
mbed_official | 181:a4cbdfbbd2f4 | 1535 | } |
mbed_official | 181:a4cbdfbbd2f4 | 1536 | |
mbed_official | 181:a4cbdfbbd2f4 | 1537 | /* Check the latest data received */ |
mbed_official | 181:a4cbdfbbd2f4 | 1538 | if(husart->RxXferCount == 0) |
mbed_official | 181:a4cbdfbbd2f4 | 1539 | { |
mbed_official | 181:a4cbdfbbd2f4 | 1540 | __HAL_USART_DISABLE_IT(husart, USART_IT_RXNE); |
mbed_official | 181:a4cbdfbbd2f4 | 1541 | |
mbed_official | 181:a4cbdfbbd2f4 | 1542 | /* Disable the USART Parity Error Interrupt */ |
mbed_official | 181:a4cbdfbbd2f4 | 1543 | __HAL_USART_DISABLE_IT(husart, USART_IT_PE); |
mbed_official | 181:a4cbdfbbd2f4 | 1544 | |
mbed_official | 181:a4cbdfbbd2f4 | 1545 | /* Disable the USART Error Interrupt: (Frame error, noise error, overrun error) */ |
mbed_official | 181:a4cbdfbbd2f4 | 1546 | __HAL_USART_DISABLE_IT(husart, USART_IT_ERR); |
mbed_official | 181:a4cbdfbbd2f4 | 1547 | |
mbed_official | 181:a4cbdfbbd2f4 | 1548 | husart->State = HAL_USART_STATE_READY; |
mbed_official | 181:a4cbdfbbd2f4 | 1549 | |
mbed_official | 181:a4cbdfbbd2f4 | 1550 | /* Call the Process Unlocked before calling the Tx\Rx call back API to give the possibility to |
mbed_official | 181:a4cbdfbbd2f4 | 1551 | start again the Transmission\reception under the Tx\Rx call back API */ |
mbed_official | 181:a4cbdfbbd2f4 | 1552 | __HAL_UNLOCK(husart); |
mbed_official | 181:a4cbdfbbd2f4 | 1553 | |
mbed_official | 181:a4cbdfbbd2f4 | 1554 | HAL_USART_TxRxCpltCallback(husart); |
mbed_official | 181:a4cbdfbbd2f4 | 1555 | |
mbed_official | 181:a4cbdfbbd2f4 | 1556 | return HAL_OK; |
mbed_official | 181:a4cbdfbbd2f4 | 1557 | } |
mbed_official | 181:a4cbdfbbd2f4 | 1558 | |
mbed_official | 181:a4cbdfbbd2f4 | 1559 | /* Process Unlocked */ |
mbed_official | 181:a4cbdfbbd2f4 | 1560 | __HAL_UNLOCK(husart); |
mbed_official | 181:a4cbdfbbd2f4 | 1561 | |
mbed_official | 181:a4cbdfbbd2f4 | 1562 | return HAL_OK; |
mbed_official | 181:a4cbdfbbd2f4 | 1563 | } |
mbed_official | 181:a4cbdfbbd2f4 | 1564 | else |
mbed_official | 181:a4cbdfbbd2f4 | 1565 | { |
mbed_official | 181:a4cbdfbbd2f4 | 1566 | return HAL_BUSY; |
mbed_official | 181:a4cbdfbbd2f4 | 1567 | } |
mbed_official | 181:a4cbdfbbd2f4 | 1568 | } |
mbed_official | 181:a4cbdfbbd2f4 | 1569 | |
mbed_official | 181:a4cbdfbbd2f4 | 1570 | /** |
mbed_official | 181:a4cbdfbbd2f4 | 1571 | * @} |
mbed_official | 181:a4cbdfbbd2f4 | 1572 | */ |
mbed_official | 181:a4cbdfbbd2f4 | 1573 | |
mbed_official | 181:a4cbdfbbd2f4 | 1574 | /** @defgroup HAL_USART_Group3 Peripheral State functions |
mbed_official | 181:a4cbdfbbd2f4 | 1575 | * @brief USART State functions |
mbed_official | 181:a4cbdfbbd2f4 | 1576 | * |
mbed_official | 181:a4cbdfbbd2f4 | 1577 | @verbatim |
mbed_official | 181:a4cbdfbbd2f4 | 1578 | =============================================================================== |
mbed_official | 181:a4cbdfbbd2f4 | 1579 | ##### Peripheral State functions ##### |
mbed_official | 181:a4cbdfbbd2f4 | 1580 | =============================================================================== |
mbed_official | 181:a4cbdfbbd2f4 | 1581 | [..] |
mbed_official | 181:a4cbdfbbd2f4 | 1582 | This subsection provides a set of functions allowing to control the USART. |
mbed_official | 181:a4cbdfbbd2f4 | 1583 | (+) HAL_USART_GetState() API can be helpful to check in run-time the state of the USART peripheral. |
mbed_official | 181:a4cbdfbbd2f4 | 1584 | (+) HAL_USART_GetError() API can be helpful to check in run-time the Error Code of the USART peripheral. |
mbed_official | 181:a4cbdfbbd2f4 | 1585 | (+) USART_SetConfig() API is used to set the USART communication parameters. |
mbed_official | 181:a4cbdfbbd2f4 | 1586 | (+) USART_CheckIdleState() APi ensures that TEACK and/or REACK bits are set after initialization |
mbed_official | 181:a4cbdfbbd2f4 | 1587 | |
mbed_official | 181:a4cbdfbbd2f4 | 1588 | @endverbatim |
mbed_official | 181:a4cbdfbbd2f4 | 1589 | * @{ |
mbed_official | 181:a4cbdfbbd2f4 | 1590 | */ |
mbed_official | 181:a4cbdfbbd2f4 | 1591 | |
mbed_official | 181:a4cbdfbbd2f4 | 1592 | /** |
mbed_official | 181:a4cbdfbbd2f4 | 1593 | * @brief Returns the USART state. |
mbed_official | 181:a4cbdfbbd2f4 | 1594 | * @param husart: USART handle |
mbed_official | 181:a4cbdfbbd2f4 | 1595 | * @retval HAL state |
mbed_official | 181:a4cbdfbbd2f4 | 1596 | */ |
mbed_official | 181:a4cbdfbbd2f4 | 1597 | HAL_USART_StateTypeDef HAL_USART_GetState(USART_HandleTypeDef *husart) |
mbed_official | 181:a4cbdfbbd2f4 | 1598 | { |
mbed_official | 181:a4cbdfbbd2f4 | 1599 | return husart->State; |
mbed_official | 181:a4cbdfbbd2f4 | 1600 | } |
mbed_official | 181:a4cbdfbbd2f4 | 1601 | |
mbed_official | 181:a4cbdfbbd2f4 | 1602 | /** |
mbed_official | 181:a4cbdfbbd2f4 | 1603 | * @brief Return the USART error code |
mbed_official | 181:a4cbdfbbd2f4 | 1604 | * @param husart : pointer to a USART_HandleTypeDef structure that contains |
mbed_official | 181:a4cbdfbbd2f4 | 1605 | * the configuration information for the specified USART. |
mbed_official | 181:a4cbdfbbd2f4 | 1606 | * @retval USART Error Code |
mbed_official | 181:a4cbdfbbd2f4 | 1607 | */ |
mbed_official | 181:a4cbdfbbd2f4 | 1608 | uint32_t HAL_USART_GetError(USART_HandleTypeDef *husart) |
mbed_official | 181:a4cbdfbbd2f4 | 1609 | { |
mbed_official | 181:a4cbdfbbd2f4 | 1610 | return husart->ErrorCode; |
mbed_official | 181:a4cbdfbbd2f4 | 1611 | } |
mbed_official | 181:a4cbdfbbd2f4 | 1612 | |
mbed_official | 181:a4cbdfbbd2f4 | 1613 | /** |
mbed_official | 181:a4cbdfbbd2f4 | 1614 | * @brief Configure the USART peripheral |
mbed_official | 181:a4cbdfbbd2f4 | 1615 | * @param husart: USART handle |
mbed_official | 181:a4cbdfbbd2f4 | 1616 | * @retval None |
mbed_official | 181:a4cbdfbbd2f4 | 1617 | */ |
mbed_official | 181:a4cbdfbbd2f4 | 1618 | static void USART_SetConfig(USART_HandleTypeDef *husart) |
mbed_official | 181:a4cbdfbbd2f4 | 1619 | { |
mbed_official | 181:a4cbdfbbd2f4 | 1620 | uint32_t tmpreg = 0x0; |
mbed_official | 181:a4cbdfbbd2f4 | 1621 | uint32_t clocksource = 0x0; |
mbed_official | 181:a4cbdfbbd2f4 | 1622 | |
mbed_official | 181:a4cbdfbbd2f4 | 1623 | /* Check the parameters */ |
mbed_official | 181:a4cbdfbbd2f4 | 1624 | assert_param(IS_USART_INSTANCE(husart->Instance)); |
mbed_official | 181:a4cbdfbbd2f4 | 1625 | assert_param(IS_USART_POLARITY(husart->Init.CLKPolarity)); |
mbed_official | 181:a4cbdfbbd2f4 | 1626 | assert_param(IS_USART_PHASE(husart->Init.CLKPhase)); |
mbed_official | 181:a4cbdfbbd2f4 | 1627 | assert_param(IS_USART_LASTBIT(husart->Init.CLKLastBit)); |
mbed_official | 181:a4cbdfbbd2f4 | 1628 | assert_param(IS_USART_BAUDRATE(husart->Init.BaudRate)); |
mbed_official | 181:a4cbdfbbd2f4 | 1629 | assert_param(IS_USART_WORD_LENGTH(husart->Init.WordLength)); |
mbed_official | 181:a4cbdfbbd2f4 | 1630 | assert_param(IS_USART_STOPBITS(husart->Init.StopBits)); |
mbed_official | 181:a4cbdfbbd2f4 | 1631 | assert_param(IS_USART_PARITY(husart->Init.Parity)); |
mbed_official | 181:a4cbdfbbd2f4 | 1632 | assert_param(IS_USART_MODE(husart->Init.Mode)); |
mbed_official | 181:a4cbdfbbd2f4 | 1633 | |
mbed_official | 181:a4cbdfbbd2f4 | 1634 | /*-------------------------- USART CR1 Configuration -----------------------*/ |
mbed_official | 181:a4cbdfbbd2f4 | 1635 | /* Clear M, PCE, PS, TE and RE bits and configure |
mbed_official | 181:a4cbdfbbd2f4 | 1636 | * the USART Word Length, Parity, Mode and oversampling: |
mbed_official | 181:a4cbdfbbd2f4 | 1637 | * set the M bits according to husart->Init.WordLength value |
mbed_official | 181:a4cbdfbbd2f4 | 1638 | * set PCE and PS bits according to husart->Init.Parity value |
mbed_official | 181:a4cbdfbbd2f4 | 1639 | * set TE and RE bits according to husart->Init.Mode value */ |
mbed_official | 181:a4cbdfbbd2f4 | 1640 | tmpreg = (uint32_t)husart->Init.WordLength | husart->Init.Parity | husart->Init.Mode ; |
mbed_official | 181:a4cbdfbbd2f4 | 1641 | MODIFY_REG(husart->Instance->CR1, USART_CR1_FIELDS, tmpreg); |
mbed_official | 181:a4cbdfbbd2f4 | 1642 | |
mbed_official | 181:a4cbdfbbd2f4 | 1643 | /*---------------------------- USART CR2 Configuration ---------------------*/ |
mbed_official | 181:a4cbdfbbd2f4 | 1644 | /* Clear and configure the USART Clock, CPOL, CPHA, LBCL and STOP bits: |
mbed_official | 181:a4cbdfbbd2f4 | 1645 | * set CPOL bit according to husart->Init.CLKPolarity value |
mbed_official | 181:a4cbdfbbd2f4 | 1646 | * set CPHA bit according to husart->Init.CLKPhase value |
mbed_official | 181:a4cbdfbbd2f4 | 1647 | * set LBCL bit according to husart->Init.CLKLastBit value |
mbed_official | 181:a4cbdfbbd2f4 | 1648 | * set STOP[13:12] bits according to husart->Init.StopBits value */ |
mbed_official | 181:a4cbdfbbd2f4 | 1649 | tmpreg = (uint32_t)(USART_CLOCK_ENABLED); |
mbed_official | 181:a4cbdfbbd2f4 | 1650 | tmpreg |= (uint32_t)(husart->Init.CLKPolarity | husart->Init.CLKPhase); |
mbed_official | 181:a4cbdfbbd2f4 | 1651 | tmpreg |= (uint32_t)(husart->Init.CLKLastBit | husart->Init.StopBits); |
mbed_official | 181:a4cbdfbbd2f4 | 1652 | MODIFY_REG(husart->Instance->CR2, USART_CR2_FIELDS, tmpreg); |
mbed_official | 181:a4cbdfbbd2f4 | 1653 | |
mbed_official | 181:a4cbdfbbd2f4 | 1654 | /*-------------------------- USART CR3 Configuration -----------------------*/ |
mbed_official | 181:a4cbdfbbd2f4 | 1655 | /* no CR3 register configuration */ |
mbed_official | 181:a4cbdfbbd2f4 | 1656 | |
mbed_official | 181:a4cbdfbbd2f4 | 1657 | /*-------------------------- USART BRR Configuration -----------------------*/ |
mbed_official | 181:a4cbdfbbd2f4 | 1658 | __HAL_USART_GETCLOCKSOURCE(husart, clocksource); |
mbed_official | 181:a4cbdfbbd2f4 | 1659 | switch (clocksource) |
mbed_official | 181:a4cbdfbbd2f4 | 1660 | { |
mbed_official | 181:a4cbdfbbd2f4 | 1661 | case USART_CLOCKSOURCE_PCLK1: |
mbed_official | 181:a4cbdfbbd2f4 | 1662 | husart->Instance->BRR = (uint16_t)(HAL_RCC_GetPCLK1Freq() / husart->Init.BaudRate); |
mbed_official | 181:a4cbdfbbd2f4 | 1663 | break; |
mbed_official | 181:a4cbdfbbd2f4 | 1664 | case USART_CLOCKSOURCE_PCLK2: |
mbed_official | 181:a4cbdfbbd2f4 | 1665 | husart->Instance->BRR = (uint16_t)(HAL_RCC_GetPCLK2Freq() / husart->Init.BaudRate); |
mbed_official | 181:a4cbdfbbd2f4 | 1666 | break; |
mbed_official | 181:a4cbdfbbd2f4 | 1667 | case USART_CLOCKSOURCE_HSI: |
mbed_official | 181:a4cbdfbbd2f4 | 1668 | husart->Instance->BRR = (uint16_t)(HSI_VALUE / husart->Init.BaudRate); |
mbed_official | 181:a4cbdfbbd2f4 | 1669 | break; |
mbed_official | 181:a4cbdfbbd2f4 | 1670 | case USART_CLOCKSOURCE_SYSCLK: |
mbed_official | 181:a4cbdfbbd2f4 | 1671 | husart->Instance->BRR = (uint16_t)(HAL_RCC_GetSysClockFreq() / husart->Init.BaudRate); |
mbed_official | 181:a4cbdfbbd2f4 | 1672 | break; |
mbed_official | 181:a4cbdfbbd2f4 | 1673 | case USART_CLOCKSOURCE_LSE: |
mbed_official | 181:a4cbdfbbd2f4 | 1674 | husart->Instance->BRR = (uint16_t)(LSE_VALUE / husart->Init.BaudRate); |
mbed_official | 181:a4cbdfbbd2f4 | 1675 | break; |
mbed_official | 181:a4cbdfbbd2f4 | 1676 | default: |
mbed_official | 181:a4cbdfbbd2f4 | 1677 | break; |
mbed_official | 181:a4cbdfbbd2f4 | 1678 | } |
mbed_official | 181:a4cbdfbbd2f4 | 1679 | } |
mbed_official | 181:a4cbdfbbd2f4 | 1680 | |
mbed_official | 181:a4cbdfbbd2f4 | 1681 | /** |
mbed_official | 181:a4cbdfbbd2f4 | 1682 | * @brief Check the USART Idle State |
mbed_official | 181:a4cbdfbbd2f4 | 1683 | * @param husart: USART handle |
mbed_official | 181:a4cbdfbbd2f4 | 1684 | * @retval HAL status |
mbed_official | 181:a4cbdfbbd2f4 | 1685 | */ |
mbed_official | 181:a4cbdfbbd2f4 | 1686 | static HAL_StatusTypeDef USART_CheckIdleState(USART_HandleTypeDef *husart) |
mbed_official | 181:a4cbdfbbd2f4 | 1687 | { |
mbed_official | 181:a4cbdfbbd2f4 | 1688 | /* Initialize the USART ErrorCode */ |
mbed_official | 181:a4cbdfbbd2f4 | 1689 | husart->ErrorCode = HAL_USART_ERROR_NONE; |
mbed_official | 181:a4cbdfbbd2f4 | 1690 | |
mbed_official | 181:a4cbdfbbd2f4 | 1691 | /* Check if the Transmitter is enabled */ |
mbed_official | 181:a4cbdfbbd2f4 | 1692 | if((husart->Instance->CR1 & USART_CR1_TE) == USART_CR1_TE) |
mbed_official | 181:a4cbdfbbd2f4 | 1693 | { |
mbed_official | 181:a4cbdfbbd2f4 | 1694 | /* Wait until TEACK flag is set */ |
mbed_official | 181:a4cbdfbbd2f4 | 1695 | if(USART_WaitOnFlagUntilTimeout(husart, USART_ISR_TEACK, RESET, TEACK_REACK_TIMEOUT) != HAL_OK) |
mbed_official | 181:a4cbdfbbd2f4 | 1696 | { |
mbed_official | 181:a4cbdfbbd2f4 | 1697 | husart->State= HAL_USART_STATE_TIMEOUT; |
mbed_official | 181:a4cbdfbbd2f4 | 1698 | return HAL_TIMEOUT; |
mbed_official | 181:a4cbdfbbd2f4 | 1699 | } |
mbed_official | 181:a4cbdfbbd2f4 | 1700 | } |
mbed_official | 181:a4cbdfbbd2f4 | 1701 | /* Check if the Receiver is enabled */ |
mbed_official | 181:a4cbdfbbd2f4 | 1702 | if((husart->Instance->CR1 & USART_CR1_RE) == USART_CR1_RE) |
mbed_official | 181:a4cbdfbbd2f4 | 1703 | { |
mbed_official | 181:a4cbdfbbd2f4 | 1704 | /* Wait until REACK flag is set */ |
mbed_official | 181:a4cbdfbbd2f4 | 1705 | if(USART_WaitOnFlagUntilTimeout(husart, USART_ISR_REACK, RESET, TEACK_REACK_TIMEOUT) != HAL_OK) |
mbed_official | 181:a4cbdfbbd2f4 | 1706 | { |
mbed_official | 181:a4cbdfbbd2f4 | 1707 | husart->State= HAL_USART_STATE_TIMEOUT; |
mbed_official | 181:a4cbdfbbd2f4 | 1708 | return HAL_TIMEOUT; |
mbed_official | 181:a4cbdfbbd2f4 | 1709 | } |
mbed_official | 181:a4cbdfbbd2f4 | 1710 | } |
mbed_official | 181:a4cbdfbbd2f4 | 1711 | |
mbed_official | 181:a4cbdfbbd2f4 | 1712 | /* Process Unlocked */ |
mbed_official | 181:a4cbdfbbd2f4 | 1713 | __HAL_UNLOCK(husart); |
mbed_official | 181:a4cbdfbbd2f4 | 1714 | |
mbed_official | 181:a4cbdfbbd2f4 | 1715 | /* Initialize the USART state*/ |
mbed_official | 181:a4cbdfbbd2f4 | 1716 | husart->State= HAL_USART_STATE_READY; |
mbed_official | 181:a4cbdfbbd2f4 | 1717 | |
mbed_official | 181:a4cbdfbbd2f4 | 1718 | return HAL_OK; |
mbed_official | 181:a4cbdfbbd2f4 | 1719 | } |
mbed_official | 181:a4cbdfbbd2f4 | 1720 | |
mbed_official | 181:a4cbdfbbd2f4 | 1721 | /** |
mbed_official | 181:a4cbdfbbd2f4 | 1722 | * @} |
mbed_official | 181:a4cbdfbbd2f4 | 1723 | */ |
mbed_official | 181:a4cbdfbbd2f4 | 1724 | |
mbed_official | 181:a4cbdfbbd2f4 | 1725 | /** |
mbed_official | 181:a4cbdfbbd2f4 | 1726 | * @} |
mbed_official | 181:a4cbdfbbd2f4 | 1727 | */ |
mbed_official | 181:a4cbdfbbd2f4 | 1728 | |
mbed_official | 181:a4cbdfbbd2f4 | 1729 | #endif /* HAL_USART_MODULE_ENABLED */ |
mbed_official | 181:a4cbdfbbd2f4 | 1730 | /** |
mbed_official | 181:a4cbdfbbd2f4 | 1731 | * @} |
mbed_official | 181:a4cbdfbbd2f4 | 1732 | */ |
mbed_official | 181:a4cbdfbbd2f4 | 1733 | |
mbed_official | 181:a4cbdfbbd2f4 | 1734 | /** |
mbed_official | 181:a4cbdfbbd2f4 | 1735 | * @} |
mbed_official | 181:a4cbdfbbd2f4 | 1736 | */ |
mbed_official | 181:a4cbdfbbd2f4 | 1737 | |
mbed_official | 181:a4cbdfbbd2f4 | 1738 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |