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targets/cmsis/TARGET_STM/TARGET_NUCLEO_L053R8/stm32l0xx_hal_smbus.h@323:9e901b0a5aa1, 2014-09-13 (annotated)

Committer:
shaoziyang
Date:
Sat Sep 13 14:25:46 2014 +0000
Revision:
323:9e901b0a5aa1
Parent:
181:a4cbdfbbd2f4 
test with CLOCK_SETUP = 0

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UserRevisionLine numberNew contents of line
mbed_official 181:a4cbdfbbd2f4 1 /**
mbed_official 181:a4cbdfbbd2f4 2 ******************************************************************************
mbed_official 181:a4cbdfbbd2f4 3 * @file stm32l0xx_hal_smbus.h
mbed_official 181:a4cbdfbbd2f4 4 * @author MCD Application Team
mbed_official 181:a4cbdfbbd2f4 5 * @version V1.0.0
mbed_official 181:a4cbdfbbd2f4 6 * @date 22-April-2014
mbed_official 181:a4cbdfbbd2f4 7 * @brief Header file of SMBUS HAL module.
mbed_official 181:a4cbdfbbd2f4 8 ******************************************************************************
mbed_official 181:a4cbdfbbd2f4 9 * @attention
mbed_official 181:a4cbdfbbd2f4 10 *
mbed_official 181:a4cbdfbbd2f4 11 * <h2><center>&copy; COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
mbed_official 181:a4cbdfbbd2f4 12 *
mbed_official 181:a4cbdfbbd2f4 13 * Redistribution and use in source and binary forms, with or without modification,
mbed_official 181:a4cbdfbbd2f4 14 * are permitted provided that the following conditions are met:
mbed_official 181:a4cbdfbbd2f4 15 * 1. Redistributions of source code must retain the above copyright notice,
mbed_official 181:a4cbdfbbd2f4 16 * this list of conditions and the following disclaimer.
mbed_official 181:a4cbdfbbd2f4 17 * 2. Redistributions in binary form must reproduce the above copyright notice,
mbed_official 181:a4cbdfbbd2f4 18 * this list of conditions and the following disclaimer in the documentation
mbed_official 181:a4cbdfbbd2f4 19 * and/or other materials provided with the distribution.
mbed_official 181:a4cbdfbbd2f4 20 * 3. Neither the name of STMicroelectronics nor the names of its contributors
mbed_official 181:a4cbdfbbd2f4 21 * may be used to endorse or promote products derived from this software
mbed_official 181:a4cbdfbbd2f4 22 * without specific prior written permission.
mbed_official 181:a4cbdfbbd2f4 23 *
mbed_official 181:a4cbdfbbd2f4 24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
mbed_official 181:a4cbdfbbd2f4 25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
mbed_official 181:a4cbdfbbd2f4 26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
mbed_official 181:a4cbdfbbd2f4 27 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
mbed_official 181:a4cbdfbbd2f4 28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
mbed_official 181:a4cbdfbbd2f4 29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
mbed_official 181:a4cbdfbbd2f4 30 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
mbed_official 181:a4cbdfbbd2f4 31 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
mbed_official 181:a4cbdfbbd2f4 32 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
mbed_official 181:a4cbdfbbd2f4 33 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
mbed_official 181:a4cbdfbbd2f4 34 *
mbed_official 181:a4cbdfbbd2f4 35 ******************************************************************************
mbed_official 181:a4cbdfbbd2f4 36 */
mbed_official 181:a4cbdfbbd2f4 37
mbed_official 181:a4cbdfbbd2f4 38 /* Define to prevent recursive inclusion -------------------------------------*/
mbed_official 181:a4cbdfbbd2f4 39 #ifndef __STM32L0xx_HAL_SMBUS_H
mbed_official 181:a4cbdfbbd2f4 40 #define __STM32L0xx_HAL_SMBUS_H
mbed_official 181:a4cbdfbbd2f4 41
mbed_official 181:a4cbdfbbd2f4 42 #ifdef __cplusplus
mbed_official 181:a4cbdfbbd2f4 43 extern "C" {
mbed_official 181:a4cbdfbbd2f4 44 #endif
mbed_official 181:a4cbdfbbd2f4 45
mbed_official 181:a4cbdfbbd2f4 46 /* Includes ------------------------------------------------------------------*/
mbed_official 181:a4cbdfbbd2f4 47 #include "stm32l0xx_hal_def.h"
mbed_official 181:a4cbdfbbd2f4 48
mbed_official 181:a4cbdfbbd2f4 49 /** @addtogroup STM32L0xx_HAL_Driver
mbed_official 181:a4cbdfbbd2f4 50 * @{
mbed_official 181:a4cbdfbbd2f4 51 */
mbed_official 181:a4cbdfbbd2f4 52
mbed_official 181:a4cbdfbbd2f4 53 /** @addtogroup SMBUS
mbed_official 181:a4cbdfbbd2f4 54 * @{
mbed_official 181:a4cbdfbbd2f4 55 */
mbed_official 181:a4cbdfbbd2f4 56
mbed_official 181:a4cbdfbbd2f4 57 /* Exported types ------------------------------------------------------------*/
mbed_official 181:a4cbdfbbd2f4 58
mbed_official 181:a4cbdfbbd2f4 59 /**
mbed_official 181:a4cbdfbbd2f4 60 * @brief SMBUS Configuration Structure definition
mbed_official 181:a4cbdfbbd2f4 61 */
mbed_official 181:a4cbdfbbd2f4 62 typedef struct
mbed_official 181:a4cbdfbbd2f4 63 {
mbed_official 181:a4cbdfbbd2f4 64 uint32_t Timing; /*!< Specifies the SMBUS_TIMINGR_register value.
mbed_official 181:a4cbdfbbd2f4 65 This parameter calculated by referring to SMBUS initialization
mbed_official 181:a4cbdfbbd2f4 66 section in Reference manual */
mbed_official 181:a4cbdfbbd2f4 67
mbed_official 181:a4cbdfbbd2f4 68 uint32_t AnalogFilter; /*!< Specifies if Analog Filter is enable or not.
mbed_official 181:a4cbdfbbd2f4 69 This parameter can be a a value of @ref SMBUS_Analog_Filter */
mbed_official 181:a4cbdfbbd2f4 70
mbed_official 181:a4cbdfbbd2f4 71 uint32_t OwnAddress1; /*!< Specifies the first device own address.
mbed_official 181:a4cbdfbbd2f4 72 This parameter can be a 7-bit or 10-bit address. */
mbed_official 181:a4cbdfbbd2f4 73
mbed_official 181:a4cbdfbbd2f4 74 uint32_t AddressingMode; /*!< Specifies if 7-bit or 10-bit addressing mode for master is selected.
mbed_official 181:a4cbdfbbd2f4 75 This parameter can be a value of @ref SMBUS_addressing_mode */
mbed_official 181:a4cbdfbbd2f4 76
mbed_official 181:a4cbdfbbd2f4 77 uint32_t DualAddressMode; /*!< Specifies if dual addressing mode is selected.
mbed_official 181:a4cbdfbbd2f4 78 This parameter can be a value of @ref SMBUS_dual_addressing_mode */
mbed_official 181:a4cbdfbbd2f4 79
mbed_official 181:a4cbdfbbd2f4 80 uint32_t OwnAddress2; /*!< Specifies the second device own address if dual addressing mode is selected
mbed_official 181:a4cbdfbbd2f4 81 This parameter can be a 7-bit address. */
mbed_official 181:a4cbdfbbd2f4 82
mbed_official 181:a4cbdfbbd2f4 83 uint32_t OwnAddress2Masks; /*!< Specifies the acknoledge mask address second device own address if dual addressing mode is selected
mbed_official 181:a4cbdfbbd2f4 84 This parameter can be a value of @ref SMBUS_own_address2_masks. */
mbed_official 181:a4cbdfbbd2f4 85
mbed_official 181:a4cbdfbbd2f4 86 uint32_t GeneralCallMode; /*!< Specifies if general call mode is selected.
mbed_official 181:a4cbdfbbd2f4 87 This parameter can be a value of @ref SMBUS_general_call_addressing_mode. */
mbed_official 181:a4cbdfbbd2f4 88
mbed_official 181:a4cbdfbbd2f4 89 uint32_t NoStretchMode; /*!< Specifies if nostretch mode is selected.
mbed_official 181:a4cbdfbbd2f4 90 This parameter can be a value of @ref SMBUS_nostretch_mode */
mbed_official 181:a4cbdfbbd2f4 91
mbed_official 181:a4cbdfbbd2f4 92 uint32_t PacketErrorCheckMode; /*!< Specifies if Packet Error Check mode is selected.
mbed_official 181:a4cbdfbbd2f4 93 This parameter can be a value of @ref SMBUS_packet_error_check_mode */
mbed_official 181:a4cbdfbbd2f4 94
mbed_official 181:a4cbdfbbd2f4 95 uint32_t PeripheralMode; /*!< Specifies which mode of Periphal is selected.
mbed_official 181:a4cbdfbbd2f4 96 This parameter can be a value of @ref SMBUS_peripheral_mode */
mbed_official 181:a4cbdfbbd2f4 97
mbed_official 181:a4cbdfbbd2f4 98 uint32_t SMBusTimeout; /*!< Specifies the content of the 32 Bits SMBUS_TIMEOUT_register value.
mbed_official 181:a4cbdfbbd2f4 99 (Enable bits and different timeout values)
mbed_official 181:a4cbdfbbd2f4 100 This parameter calculated by referring to SMBUS initialization
mbed_official 181:a4cbdfbbd2f4 101 section in Reference manual */
mbed_official 181:a4cbdfbbd2f4 102 } SMBUS_InitTypeDef;
mbed_official 181:a4cbdfbbd2f4 103
mbed_official 181:a4cbdfbbd2f4 104 /**
mbed_official 181:a4cbdfbbd2f4 105 * @brief HAL State structures definition
mbed_official 181:a4cbdfbbd2f4 106 */
mbed_official 181:a4cbdfbbd2f4 107 typedef enum
mbed_official 181:a4cbdfbbd2f4 108 {
mbed_official 181:a4cbdfbbd2f4 109 HAL_SMBUS_STATE_RESET = 0x00, /*!< SMBUS not yet initialized or disabled */
mbed_official 181:a4cbdfbbd2f4 110 HAL_SMBUS_STATE_READY = 0x01, /*!< SMBUS initialized and ready for use */
mbed_official 181:a4cbdfbbd2f4 111 HAL_SMBUS_STATE_BUSY = 0x02, /*!< SMBUS internal process is ongoing */
mbed_official 181:a4cbdfbbd2f4 112 HAL_SMBUS_STATE_MASTER_BUSY_TX = 0x12, /*!< Master Data Transmission process is ongoing */
mbed_official 181:a4cbdfbbd2f4 113 HAL_SMBUS_STATE_MASTER_BUSY_RX = 0x22, /*!< Master Data Reception process is ongoing */
mbed_official 181:a4cbdfbbd2f4 114 HAL_SMBUS_STATE_SLAVE_BUSY_TX = 0x32, /*!< Slave Data Transmission process is ongoing */
mbed_official 181:a4cbdfbbd2f4 115 HAL_SMBUS_STATE_SLAVE_BUSY_RX = 0x42, /*!< Slave Data Reception process is ongoing */
mbed_official 181:a4cbdfbbd2f4 116 HAL_SMBUS_STATE_TIMEOUT = 0x03, /*!< Timeout state */
mbed_official 181:a4cbdfbbd2f4 117 HAL_SMBUS_STATE_ERROR = 0x04, /*!< Reception process is ongoing */
mbed_official 181:a4cbdfbbd2f4 118 HAL_SMBUS_STATE_SLAVE_LISTEN = 0x08 /*!< Slave Address Listen Mode is ongoing */
mbed_official 181:a4cbdfbbd2f4 119 }HAL_SMBUS_StateTypeDef;
mbed_official 181:a4cbdfbbd2f4 120
mbed_official 181:a4cbdfbbd2f4 121 /**
mbed_official 181:a4cbdfbbd2f4 122 * @brief HAL SMBUS Error Code structure definition
mbed_official 181:a4cbdfbbd2f4 123 */
mbed_official 181:a4cbdfbbd2f4 124 typedef enum
mbed_official 181:a4cbdfbbd2f4 125 {
mbed_official 181:a4cbdfbbd2f4 126 HAL_SMBUS_ERROR_NONE = 0x00, /*!< No error */
mbed_official 181:a4cbdfbbd2f4 127 HAL_SMBUS_ERROR_BERR = 0x01, /*!< BERR error */
mbed_official 181:a4cbdfbbd2f4 128 HAL_SMBUS_ERROR_ARLO = 0x02, /*!< ARLO error */
mbed_official 181:a4cbdfbbd2f4 129 HAL_SMBUS_ERROR_ACKF = 0x04, /*!< ACKF error */
mbed_official 181:a4cbdfbbd2f4 130 HAL_SMBUS_ERROR_OVR = 0x08, /*!< OVR error */
mbed_official 181:a4cbdfbbd2f4 131 HAL_SMBUS_ERROR_HALTIMEOUT = 0x10, /*!< Timeout error */
mbed_official 181:a4cbdfbbd2f4 132 HAL_SMBUS_ERROR_BUSTIMEOUT = 0x20, /*!< Bus Timeout error */
mbed_official 181:a4cbdfbbd2f4 133 HAL_SMBUS_ERROR_ALERT = 0x40, /*!< Alert error */
mbed_official 181:a4cbdfbbd2f4 134 HAL_SMBUS_ERROR_PECERR = 0x80 /*!< PEC error */
mbed_official 181:a4cbdfbbd2f4 135
mbed_official 181:a4cbdfbbd2f4 136 }HAL_SMBUS_ErrorTypeDef;
mbed_official 181:a4cbdfbbd2f4 137
mbed_official 181:a4cbdfbbd2f4 138 /**
mbed_official 181:a4cbdfbbd2f4 139 * @brief SMBUS handle Structure definition
mbed_official 181:a4cbdfbbd2f4 140 */
mbed_official 181:a4cbdfbbd2f4 141 typedef struct
mbed_official 181:a4cbdfbbd2f4 142 {
mbed_official 181:a4cbdfbbd2f4 143 I2C_TypeDef *Instance; /*!< SMBUS registers base address */
mbed_official 181:a4cbdfbbd2f4 144
mbed_official 181:a4cbdfbbd2f4 145 SMBUS_InitTypeDef Init; /*!< SMBUS communication parameters */
mbed_official 181:a4cbdfbbd2f4 146
mbed_official 181:a4cbdfbbd2f4 147 uint8_t *pBuffPtr; /*!< Pointer to SMBUS transfer buffer */
mbed_official 181:a4cbdfbbd2f4 148
mbed_official 181:a4cbdfbbd2f4 149 uint16_t XferSize; /*!< SMBUS transfer size */
mbed_official 181:a4cbdfbbd2f4 150
mbed_official 181:a4cbdfbbd2f4 151 __IO uint16_t XferCount; /*!< SMBUS transfer counter */
mbed_official 181:a4cbdfbbd2f4 152
mbed_official 181:a4cbdfbbd2f4 153 __IO uint32_t XferOptions; /*!< SMBUS transfer options */
mbed_official 181:a4cbdfbbd2f4 154
mbed_official 181:a4cbdfbbd2f4 155 __IO HAL_SMBUS_StateTypeDef PreviousState; /*!< SMBUS communication Previous tate */
mbed_official 181:a4cbdfbbd2f4 156
mbed_official 181:a4cbdfbbd2f4 157 HAL_LockTypeDef Lock; /*!< SMBUS locking object */
mbed_official 181:a4cbdfbbd2f4 158
mbed_official 181:a4cbdfbbd2f4 159 __IO HAL_SMBUS_StateTypeDef State; /*!< SMBUS communication state */
mbed_official 181:a4cbdfbbd2f4 160
mbed_official 181:a4cbdfbbd2f4 161 __IO HAL_SMBUS_ErrorTypeDef ErrorCode; /*!< SMBUS Error code */
mbed_official 181:a4cbdfbbd2f4 162
mbed_official 181:a4cbdfbbd2f4 163 }SMBUS_HandleTypeDef;
mbed_official 181:a4cbdfbbd2f4 164
mbed_official 181:a4cbdfbbd2f4 165 /* Exported constants --------------------------------------------------------*/
mbed_official 181:a4cbdfbbd2f4 166
mbed_official 181:a4cbdfbbd2f4 167 /** @defgroup SMBUS_Exported_Constants
mbed_official 181:a4cbdfbbd2f4 168 * @{
mbed_official 181:a4cbdfbbd2f4 169 */
mbed_official 181:a4cbdfbbd2f4 170
mbed_official 181:a4cbdfbbd2f4 171 /** @defgroup SMBUS_Analog_Filter
mbed_official 181:a4cbdfbbd2f4 172 * @{
mbed_official 181:a4cbdfbbd2f4 173 */
mbed_official 181:a4cbdfbbd2f4 174 #define SMBUS_ANALOGFILTER_ENABLED ((uint32_t)0x00000000)
mbed_official 181:a4cbdfbbd2f4 175 #define SMBUS_ANALOGFILTER_DISABLED I2C_CR1_ANFOFF
mbed_official 181:a4cbdfbbd2f4 176
mbed_official 181:a4cbdfbbd2f4 177 #define IS_SMBUS_ANALOG_FILTER(FILTER) (((FILTER) == SMBUS_ANALOGFILTER_ENABLED) || \
mbed_official 181:a4cbdfbbd2f4 178 ((FILTER) == SMBUS_ANALOGFILTER_DISABLED))
mbed_official 181:a4cbdfbbd2f4 179 /**
mbed_official 181:a4cbdfbbd2f4 180 * @}
mbed_official 181:a4cbdfbbd2f4 181 */
mbed_official 181:a4cbdfbbd2f4 182
mbed_official 181:a4cbdfbbd2f4 183 /** @defgroup SMBUS_addressing_mode
mbed_official 181:a4cbdfbbd2f4 184 * @{
mbed_official 181:a4cbdfbbd2f4 185 */
mbed_official 181:a4cbdfbbd2f4 186 #define SMBUS_ADDRESSINGMODE_7BIT ((uint32_t)0x00000001)
mbed_official 181:a4cbdfbbd2f4 187 #define SMBUS_ADDRESSINGMODE_10BIT ((uint32_t)0x00000002)
mbed_official 181:a4cbdfbbd2f4 188
mbed_official 181:a4cbdfbbd2f4 189 #define IS_SMBUS_ADDRESSING_MODE(MODE) (((MODE) == SMBUS_ADDRESSINGMODE_7BIT) || \
mbed_official 181:a4cbdfbbd2f4 190 ((MODE) == SMBUS_ADDRESSINGMODE_10BIT))
mbed_official 181:a4cbdfbbd2f4 191 /**
mbed_official 181:a4cbdfbbd2f4 192 * @}
mbed_official 181:a4cbdfbbd2f4 193 */
mbed_official 181:a4cbdfbbd2f4 194
mbed_official 181:a4cbdfbbd2f4 195 /** @defgroup SMBUS_dual_addressing_mode
mbed_official 181:a4cbdfbbd2f4 196 * @{
mbed_official 181:a4cbdfbbd2f4 197 */
mbed_official 181:a4cbdfbbd2f4 198
mbed_official 181:a4cbdfbbd2f4 199 #define SMBUS_DUALADDRESS_DISABLED ((uint32_t)0x00000000)
mbed_official 181:a4cbdfbbd2f4 200 #define SMBUS_DUALADDRESS_ENABLED I2C_OAR2_OA2EN
mbed_official 181:a4cbdfbbd2f4 201
mbed_official 181:a4cbdfbbd2f4 202 #define IS_SMBUS_DUAL_ADDRESS(ADDRESS) (((ADDRESS) == SMBUS_DUALADDRESS_DISABLED) || \
mbed_official 181:a4cbdfbbd2f4 203 ((ADDRESS) == SMBUS_DUALADDRESS_ENABLED))
mbed_official 181:a4cbdfbbd2f4 204 /**
mbed_official 181:a4cbdfbbd2f4 205 * @}
mbed_official 181:a4cbdfbbd2f4 206 */
mbed_official 181:a4cbdfbbd2f4 207
mbed_official 181:a4cbdfbbd2f4 208 /** @defgroup SMBUS_own_address2_masks
mbed_official 181:a4cbdfbbd2f4 209 * @{
mbed_official 181:a4cbdfbbd2f4 210 */
mbed_official 181:a4cbdfbbd2f4 211
mbed_official 181:a4cbdfbbd2f4 212 #define SMBUS_OA2_NOMASK ((uint8_t)0x00)
mbed_official 181:a4cbdfbbd2f4 213 #define SMBUS_OA2_MASK01 ((uint8_t)0x01)
mbed_official 181:a4cbdfbbd2f4 214 #define SMBUS_OA2_MASK02 ((uint8_t)0x02)
mbed_official 181:a4cbdfbbd2f4 215 #define SMBUS_OA2_MASK03 ((uint8_t)0x03)
mbed_official 181:a4cbdfbbd2f4 216 #define SMBUS_OA2_MASK04 ((uint8_t)0x04)
mbed_official 181:a4cbdfbbd2f4 217 #define SMBUS_OA2_MASK05 ((uint8_t)0x05)
mbed_official 181:a4cbdfbbd2f4 218 #define SMBUS_OA2_MASK06 ((uint8_t)0x06)
mbed_official 181:a4cbdfbbd2f4 219 #define SMBUS_OA2_MASK07 ((uint8_t)0x07)
mbed_official 181:a4cbdfbbd2f4 220
mbed_official 181:a4cbdfbbd2f4 221 #define IS_SMBUS_OWN_ADDRESS2_MASK(MASK) (((MASK) == SMBUS_OA2_NOMASK) || \
mbed_official 181:a4cbdfbbd2f4 222 ((MASK) == SMBUS_OA2_MASK01) || \
mbed_official 181:a4cbdfbbd2f4 223 ((MASK) == SMBUS_OA2_MASK02) || \
mbed_official 181:a4cbdfbbd2f4 224 ((MASK) == SMBUS_OA2_MASK03) || \
mbed_official 181:a4cbdfbbd2f4 225 ((MASK) == SMBUS_OA2_MASK04) || \
mbed_official 181:a4cbdfbbd2f4 226 ((MASK) == SMBUS_OA2_MASK05) || \
mbed_official 181:a4cbdfbbd2f4 227 ((MASK) == SMBUS_OA2_MASK06) || \
mbed_official 181:a4cbdfbbd2f4 228 ((MASK) == SMBUS_OA2_MASK07))
mbed_official 181:a4cbdfbbd2f4 229 /**
mbed_official 181:a4cbdfbbd2f4 230 * @}
mbed_official 181:a4cbdfbbd2f4 231 */
mbed_official 181:a4cbdfbbd2f4 232
mbed_official 181:a4cbdfbbd2f4 233
mbed_official 181:a4cbdfbbd2f4 234 /** @defgroup SMBUS_general_call_addressing_mode
mbed_official 181:a4cbdfbbd2f4 235 * @{
mbed_official 181:a4cbdfbbd2f4 236 */
mbed_official 181:a4cbdfbbd2f4 237 #define SMBUS_GENERALCALL_DISABLED ((uint32_t)0x00000000)
mbed_official 181:a4cbdfbbd2f4 238 #define SMBUS_GENERALCALL_ENABLED I2C_CR1_GCEN
mbed_official 181:a4cbdfbbd2f4 239
mbed_official 181:a4cbdfbbd2f4 240 #define IS_SMBUS_GENERAL_CALL(CALL) (((CALL) == SMBUS_GENERALCALL_DISABLED) || \
mbed_official 181:a4cbdfbbd2f4 241 ((CALL) == SMBUS_GENERALCALL_ENABLED))
mbed_official 181:a4cbdfbbd2f4 242 /**
mbed_official 181:a4cbdfbbd2f4 243 * @}
mbed_official 181:a4cbdfbbd2f4 244 */
mbed_official 181:a4cbdfbbd2f4 245
mbed_official 181:a4cbdfbbd2f4 246 /** @defgroup SMBUS_nostretch_mode
mbed_official 181:a4cbdfbbd2f4 247 * @{
mbed_official 181:a4cbdfbbd2f4 248 */
mbed_official 181:a4cbdfbbd2f4 249 #define SMBUS_NOSTRETCH_DISABLED ((uint32_t)0x00000000)
mbed_official 181:a4cbdfbbd2f4 250 #define SMBUS_NOSTRETCH_ENABLED I2C_CR1_NOSTRETCH
mbed_official 181:a4cbdfbbd2f4 251
mbed_official 181:a4cbdfbbd2f4 252 #define IS_SMBUS_NO_STRETCH(STRETCH) (((STRETCH) == SMBUS_NOSTRETCH_DISABLED) || \
mbed_official 181:a4cbdfbbd2f4 253 ((STRETCH) == SMBUS_NOSTRETCH_ENABLED))
mbed_official 181:a4cbdfbbd2f4 254 /**
mbed_official 181:a4cbdfbbd2f4 255 * @}
mbed_official 181:a4cbdfbbd2f4 256 */
mbed_official 181:a4cbdfbbd2f4 257
mbed_official 181:a4cbdfbbd2f4 258 /** @defgroup SMBUS_packet_error_check_mode
mbed_official 181:a4cbdfbbd2f4 259 * @{
mbed_official 181:a4cbdfbbd2f4 260 */
mbed_official 181:a4cbdfbbd2f4 261 #define SMBUS_PEC_DISABLED ((uint32_t)0x00000000)
mbed_official 181:a4cbdfbbd2f4 262 #define SMBUS_PEC_ENABLED I2C_CR1_PECEN
mbed_official 181:a4cbdfbbd2f4 263
mbed_official 181:a4cbdfbbd2f4 264 #define IS_SMBUS_PEC(PEC) (((PEC) == SMBUS_PEC_DISABLED) || \
mbed_official 181:a4cbdfbbd2f4 265 ((PEC) == SMBUS_PEC_ENABLED))
mbed_official 181:a4cbdfbbd2f4 266 /**
mbed_official 181:a4cbdfbbd2f4 267 * @}
mbed_official 181:a4cbdfbbd2f4 268 */
mbed_official 181:a4cbdfbbd2f4 269
mbed_official 181:a4cbdfbbd2f4 270 /** @defgroup SMBUS_peripheral_mode
mbed_official 181:a4cbdfbbd2f4 271 * @{
mbed_official 181:a4cbdfbbd2f4 272 */
mbed_official 181:a4cbdfbbd2f4 273 #define SMBUS_PERIPHERAL_MODE_SMBUS_HOST (uint32_t)(I2C_CR1_SMBHEN)
mbed_official 181:a4cbdfbbd2f4 274 #define SMBUS_PERIPHERAL_MODE_SMBUS_SLAVE (uint32_t)(0x00000000)
mbed_official 181:a4cbdfbbd2f4 275 #define SMBUS_PERIPHERAL_MODE_SMBUS_SLAVE_ARP (uint32_t)(I2C_CR1_SMBDEN)
mbed_official 181:a4cbdfbbd2f4 276
mbed_official 181:a4cbdfbbd2f4 277 #define IS_SMBUS_PERIPHERAL_MODE(MODE) (((MODE) == SMBUS_PERIPHERAL_MODE_SMBUS_HOST) || \
mbed_official 181:a4cbdfbbd2f4 278 ((MODE) == SMBUS_PERIPHERAL_MODE_SMBUS_SLAVE) || \
mbed_official 181:a4cbdfbbd2f4 279 ((MODE) == SMBUS_PERIPHERAL_MODE_SMBUS_SLAVE_ARP))
mbed_official 181:a4cbdfbbd2f4 280 /**
mbed_official 181:a4cbdfbbd2f4 281 * @}
mbed_official 181:a4cbdfbbd2f4 282 */
mbed_official 181:a4cbdfbbd2f4 283
mbed_official 181:a4cbdfbbd2f4 284 /** @defgroup SMBUS_ReloadEndMode_definition
mbed_official 181:a4cbdfbbd2f4 285 * @{
mbed_official 181:a4cbdfbbd2f4 286 */
mbed_official 181:a4cbdfbbd2f4 287
mbed_official 181:a4cbdfbbd2f4 288 #define SMBUS_SOFTEND_MODE ((uint32_t)0x00000000)
mbed_official 181:a4cbdfbbd2f4 289 #define SMBUS_RELOAD_MODE I2C_CR2_RELOAD
mbed_official 181:a4cbdfbbd2f4 290 #define SMBUS_AUTOEND_MODE I2C_CR2_AUTOEND
mbed_official 181:a4cbdfbbd2f4 291 #define SMBUS_SENDPEC_MODE I2C_CR2_PECBYTE
mbed_official 181:a4cbdfbbd2f4 292
mbed_official 181:a4cbdfbbd2f4 293 #define IS_SMBUS_TRANSFER_MODE(MODE) (((MODE) == SMBUS_RELOAD_MODE) || \
mbed_official 181:a4cbdfbbd2f4 294 ((MODE) == SMBUS_AUTOEND_MODE) || \
mbed_official 181:a4cbdfbbd2f4 295 ((MODE) == SMBUS_SOFTEND_MODE) || \
mbed_official 181:a4cbdfbbd2f4 296 ((MODE) == (SMBUS_AUTOEND_MODE | SMBUS_SENDPEC_MODE)) || \
mbed_official 181:a4cbdfbbd2f4 297 ((MODE) == (SMBUS_AUTOEND_MODE | SMBUS_RELOAD_MODE)) || \
mbed_official 181:a4cbdfbbd2f4 298 ((MODE) == (SMBUS_AUTOEND_MODE | SMBUS_SENDPEC_MODE | SMBUS_RELOAD_MODE )))
mbed_official 181:a4cbdfbbd2f4 299
mbed_official 181:a4cbdfbbd2f4 300 /**
mbed_official 181:a4cbdfbbd2f4 301 * @}
mbed_official 181:a4cbdfbbd2f4 302 */
mbed_official 181:a4cbdfbbd2f4 303
mbed_official 181:a4cbdfbbd2f4 304 /** @defgroup SMBUS_StartStopMode_definition
mbed_official 181:a4cbdfbbd2f4 305 * @{
mbed_official 181:a4cbdfbbd2f4 306 */
mbed_official 181:a4cbdfbbd2f4 307
mbed_official 181:a4cbdfbbd2f4 308 #define SMBUS_NO_STARTSTOP ((uint32_t)0x00000000)
mbed_official 181:a4cbdfbbd2f4 309 #define SMBUS_GENERATE_STOP I2C_CR2_STOP
mbed_official 181:a4cbdfbbd2f4 310 #define SMBUS_GENERATE_START_READ (uint32_t)(I2C_CR2_START | I2C_CR2_RD_WRN)
mbed_official 181:a4cbdfbbd2f4 311 #define SMBUS_GENERATE_START_WRITE I2C_CR2_START
mbed_official 181:a4cbdfbbd2f4 312
mbed_official 181:a4cbdfbbd2f4 313 #define IS_SMBUS_TRANSFER_REQUEST(REQUEST) (((REQUEST) == SMBUS_GENERATE_STOP) || \
mbed_official 181:a4cbdfbbd2f4 314 ((REQUEST) == SMBUS_GENERATE_START_READ) || \
mbed_official 181:a4cbdfbbd2f4 315 ((REQUEST) == SMBUS_GENERATE_START_WRITE) || \
mbed_official 181:a4cbdfbbd2f4 316 ((REQUEST) == SMBUS_NO_STARTSTOP))
mbed_official 181:a4cbdfbbd2f4 317 /**
mbed_official 181:a4cbdfbbd2f4 318 * @}
mbed_official 181:a4cbdfbbd2f4 319 */
mbed_official 181:a4cbdfbbd2f4 320
mbed_official 181:a4cbdfbbd2f4 321 /** @defgroup SMBUS_XferOptions_definition
mbed_official 181:a4cbdfbbd2f4 322 * @{
mbed_official 181:a4cbdfbbd2f4 323 */
mbed_official 181:a4cbdfbbd2f4 324
mbed_official 181:a4cbdfbbd2f4 325 #define SMBUS_FIRST_FRAME ((uint32_t)(SMBUS_SOFTEND_MODE))
mbed_official 181:a4cbdfbbd2f4 326 #define SMBUS_NEXT_FRAME ((uint32_t)(SMBUS_RELOAD_MODE | SMBUS_SOFTEND_MODE))
mbed_official 181:a4cbdfbbd2f4 327 #define SMBUS_FIRST_AND_LAST_FRAME_NO_PEC SMBUS_AUTOEND_MODE
mbed_official 181:a4cbdfbbd2f4 328 #define SMBUS_LAST_FRAME_NO_PEC SMBUS_AUTOEND_MODE
mbed_official 181:a4cbdfbbd2f4 329 #define SMBUS_FIRST_AND_LAST_FRAME_WITH_PEC ((uint32_t)(SMBUS_AUTOEND_MODE | SMBUS_SENDPEC_MODE))
mbed_official 181:a4cbdfbbd2f4 330 #define SMBUS_LAST_FRAME_WITH_PEC ((uint32_t)(SMBUS_AUTOEND_MODE | SMBUS_SENDPEC_MODE))
mbed_official 181:a4cbdfbbd2f4 331
mbed_official 181:a4cbdfbbd2f4 332 #define IS_SMBUS_TRANSFER_OPTIONS_REQUEST(REQUEST) (((REQUEST) == SMBUS_FIRST_FRAME) || \
mbed_official 181:a4cbdfbbd2f4 333 ((REQUEST) == SMBUS_NEXT_FRAME) || \
mbed_official 181:a4cbdfbbd2f4 334 ((REQUEST) == SMBUS_FIRST_AND_LAST_FRAME_NO_PEC) || \
mbed_official 181:a4cbdfbbd2f4 335 ((REQUEST) == SMBUS_LAST_FRAME_NO_PEC) || \
mbed_official 181:a4cbdfbbd2f4 336 ((REQUEST) == SMBUS_FIRST_AND_LAST_FRAME_WITH_PEC) || \
mbed_official 181:a4cbdfbbd2f4 337 ((REQUEST) == SMBUS_LAST_FRAME_WITH_PEC))
mbed_official 181:a4cbdfbbd2f4 338
mbed_official 181:a4cbdfbbd2f4 339 /**
mbed_official 181:a4cbdfbbd2f4 340 * @}
mbed_official 181:a4cbdfbbd2f4 341 */
mbed_official 181:a4cbdfbbd2f4 342
mbed_official 181:a4cbdfbbd2f4 343 /** @defgroup SMBUS_Interrupt_configuration_definition
mbed_official 181:a4cbdfbbd2f4 344 * @brief SMBUS Interrupt definition
mbed_official 181:a4cbdfbbd2f4 345 * Elements values convention: 0xXXXXXXXX
mbed_official 181:a4cbdfbbd2f4 346 * - XXXXXXXX : Interrupt control mask
mbed_official 181:a4cbdfbbd2f4 347 * @{
mbed_official 181:a4cbdfbbd2f4 348 */
mbed_official 181:a4cbdfbbd2f4 349 #define SMBUS_IT_ERRI I2C_CR1_ERRIE
mbed_official 181:a4cbdfbbd2f4 350 #define SMBUS_IT_TCI I2C_CR1_TCIE
mbed_official 181:a4cbdfbbd2f4 351 #define SMBUS_IT_STOPI I2C_CR1_STOPIE
mbed_official 181:a4cbdfbbd2f4 352 #define SMBUS_IT_NACKI I2C_CR1_NACKIE
mbed_official 181:a4cbdfbbd2f4 353 #define SMBUS_IT_ADDRI I2C_CR1_ADDRIE
mbed_official 181:a4cbdfbbd2f4 354 #define SMBUS_IT_RXI I2C_CR1_RXIE
mbed_official 181:a4cbdfbbd2f4 355 #define SMBUS_IT_TXI I2C_CR1_TXIE
mbed_official 181:a4cbdfbbd2f4 356 #define SMBUS_IT_TX (SMBUS_IT_ERRI | SMBUS_IT_TCI | SMBUS_IT_STOPI | SMBUS_IT_NACKI | SMBUS_IT_TXI)
mbed_official 181:a4cbdfbbd2f4 357 #define SMBUS_IT_RX (SMBUS_IT_ERRI | SMBUS_IT_TCI | SMBUS_IT_NACKI | SMBUS_IT_RXI)
mbed_official 181:a4cbdfbbd2f4 358 #define SMBUS_IT_ALERT (SMBUS_IT_ERRI)
mbed_official 181:a4cbdfbbd2f4 359 #define SMBUS_IT_ADDR (SMBUS_IT_ADDRI | SMBUS_IT_STOPI | SMBUS_IT_NACKI)
mbed_official 181:a4cbdfbbd2f4 360 /**
mbed_official 181:a4cbdfbbd2f4 361 * @}
mbed_official 181:a4cbdfbbd2f4 362 */
mbed_official 181:a4cbdfbbd2f4 363
mbed_official 181:a4cbdfbbd2f4 364 /** @defgroup SMBUS_Flag_definition
mbed_official 181:a4cbdfbbd2f4 365 * @brief Flag definition
mbed_official 181:a4cbdfbbd2f4 366 * Elements values convention: 0xXXXXYYYY
mbed_official 181:a4cbdfbbd2f4 367 * - XXXXXXXX : Flag mask
mbed_official 181:a4cbdfbbd2f4 368 * @{
mbed_official 181:a4cbdfbbd2f4 369 */
mbed_official 181:a4cbdfbbd2f4 370
mbed_official 181:a4cbdfbbd2f4 371 #define SMBUS_FLAG_TXE I2C_ISR_TXE
mbed_official 181:a4cbdfbbd2f4 372 #define SMBUS_FLAG_TXIS I2C_ISR_TXIS
mbed_official 181:a4cbdfbbd2f4 373 #define SMBUS_FLAG_RXNE I2C_ISR_RXNE
mbed_official 181:a4cbdfbbd2f4 374 #define SMBUS_FLAG_ADDR I2C_ISR_ADDR
mbed_official 181:a4cbdfbbd2f4 375 #define SMBUS_FLAG_AF I2C_ISR_NACKF
mbed_official 181:a4cbdfbbd2f4 376 #define SMBUS_FLAG_STOPF I2C_ISR_STOPF
mbed_official 181:a4cbdfbbd2f4 377 #define SMBUS_FLAG_TC I2C_ISR_TC
mbed_official 181:a4cbdfbbd2f4 378 #define SMBUS_FLAG_TCR I2C_ISR_TCR
mbed_official 181:a4cbdfbbd2f4 379 #define SMBUS_FLAG_BERR I2C_ISR_BERR
mbed_official 181:a4cbdfbbd2f4 380 #define SMBUS_FLAG_ARLO I2C_ISR_ARLO
mbed_official 181:a4cbdfbbd2f4 381 #define SMBUS_FLAG_OVR I2C_ISR_OVR
mbed_official 181:a4cbdfbbd2f4 382 #define SMBUS_FLAG_PECERR I2C_ISR_PECERR
mbed_official 181:a4cbdfbbd2f4 383 #define SMBUS_FLAG_TIMEOUT I2C_ISR_TIMEOUT
mbed_official 181:a4cbdfbbd2f4 384 #define SMBUS_FLAG_ALERT I2C_ISR_ALERT
mbed_official 181:a4cbdfbbd2f4 385 #define SMBUS_FLAG_BUSY I2C_ISR_BUSY
mbed_official 181:a4cbdfbbd2f4 386 #define SMBUS_FLAG_DIR I2C_ISR_DIR
mbed_official 181:a4cbdfbbd2f4 387 /**
mbed_official 181:a4cbdfbbd2f4 388 * @}
mbed_official 181:a4cbdfbbd2f4 389 */
mbed_official 181:a4cbdfbbd2f4 390
mbed_official 181:a4cbdfbbd2f4 391 /**
mbed_official 181:a4cbdfbbd2f4 392 * @}
mbed_official 181:a4cbdfbbd2f4 393 */
mbed_official 181:a4cbdfbbd2f4 394
mbed_official 181:a4cbdfbbd2f4 395 /* Exported macro ------------------------------------------------------------*/
mbed_official 181:a4cbdfbbd2f4 396 /** @defgroup SMBUS_Exported_Macros
mbed_official 181:a4cbdfbbd2f4 397 * @{
mbed_official 181:a4cbdfbbd2f4 398 */
mbed_official 181:a4cbdfbbd2f4 399
mbed_official 181:a4cbdfbbd2f4 400 /** @brief Reset SMBUS handle state
mbed_official 181:a4cbdfbbd2f4 401 * @param __HANDLE__: specifies the SMBUS Handle.
mbed_official 181:a4cbdfbbd2f4 402 * This parameter can be SMBUSx where x: 1 or 2 to select the SMBUS peripheral.
mbed_official 181:a4cbdfbbd2f4 403 * @retval None
mbed_official 181:a4cbdfbbd2f4 404 */
mbed_official 181:a4cbdfbbd2f4 405 #define __HAL_SMBUS_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_SMBUS_STATE_RESET)
mbed_official 181:a4cbdfbbd2f4 406
mbed_official 181:a4cbdfbbd2f4 407 /** @brief Enable or disable the specified SMBUS interrupts.
mbed_official 181:a4cbdfbbd2f4 408 * @param __HANDLE__: specifies the SMBUS Handle.
mbed_official 181:a4cbdfbbd2f4 409 * This parameter can be SMBUSx where x: 1 or 2 to select the SMBUS peripheral.
mbed_official 181:a4cbdfbbd2f4 410 * @param __INTERRUPT__: specifies the interrupt source to enable or disable.
mbed_official 181:a4cbdfbbd2f4 411 * This parameter can be one of the following values:
mbed_official 181:a4cbdfbbd2f4 412 * @arg SMBUS_IT_ERRI: Errors interrupt enable
mbed_official 181:a4cbdfbbd2f4 413 * @arg SMBUS_IT_TCI: Transfer complete interrupt enable
mbed_official 181:a4cbdfbbd2f4 414 * @arg SMBUS_IT_STOPI: STOP detection interrupt enable
mbed_official 181:a4cbdfbbd2f4 415 * @arg SMBUS_IT_NACKI: NACK received interrupt enable
mbed_official 181:a4cbdfbbd2f4 416 * @arg SMBUS_IT_ADDRI: Address match interrupt enable
mbed_official 181:a4cbdfbbd2f4 417 * @arg SMBUS_IT_RXI: RX interrupt enable
mbed_official 181:a4cbdfbbd2f4 418 * @arg SMBUS_IT_TXI: TX interrupt enable
mbed_official 181:a4cbdfbbd2f4 419 *
mbed_official 181:a4cbdfbbd2f4 420 * @retval None
mbed_official 181:a4cbdfbbd2f4 421 */
mbed_official 181:a4cbdfbbd2f4 422
mbed_official 181:a4cbdfbbd2f4 423 #define __HAL_SMBUS_ENABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->CR1 |= (__INTERRUPT__))
mbed_official 181:a4cbdfbbd2f4 424 #define __HAL_SMBUS_DISABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->CR1 &= (~(__INTERRUPT__)))
mbed_official 181:a4cbdfbbd2f4 425
mbed_official 181:a4cbdfbbd2f4 426 /** @brief Checks if the specified SMBUS interrupt source is enabled or disabled.
mbed_official 181:a4cbdfbbd2f4 427 * @param __HANDLE__: specifies the SMBUS Handle.
mbed_official 181:a4cbdfbbd2f4 428 * This parameter can be SMBUSx where x: 1 or 2 to select the SMBUS peripheral.
mbed_official 181:a4cbdfbbd2f4 429 * @param __INTERRUPT__: specifies the SMBUS interrupt source to check.
mbed_official 181:a4cbdfbbd2f4 430 * This parameter can be one of the following values:
mbed_official 181:a4cbdfbbd2f4 431 * @arg SMBUS_IT_ERRI: Errors interrupt enable
mbed_official 181:a4cbdfbbd2f4 432 * @arg SMBUS_IT_TCI: Transfer complete interrupt enable
mbed_official 181:a4cbdfbbd2f4 433 * @arg SMBUS_IT_STOPI: STOP detection interrupt enable
mbed_official 181:a4cbdfbbd2f4 434 * @arg SMBUS_IT_NACKI: NACK received interrupt enable
mbed_official 181:a4cbdfbbd2f4 435 * @arg SMBUS_IT_ADDRI: Address match interrupt enable
mbed_official 181:a4cbdfbbd2f4 436 * @arg SMBUS_IT_RXI: RX interrupt enable
mbed_official 181:a4cbdfbbd2f4 437 * @arg SMBUS_IT_TXI: TX interrupt enable
mbed_official 181:a4cbdfbbd2f4 438 *
mbed_official 181:a4cbdfbbd2f4 439 * @retval The new state of __IT__ (TRUE or FALSE).
mbed_official 181:a4cbdfbbd2f4 440 */
mbed_official 181:a4cbdfbbd2f4 441 #define __HAL_SMBUS_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) ((((__HANDLE__)->Instance->CR1 & (__INTERRUPT__)) == (__INTERRUPT__)) ? SET : RESET)
mbed_official 181:a4cbdfbbd2f4 442
mbed_official 181:a4cbdfbbd2f4 443 /** @brief Checks whether the specified SMBUS flag is set or not.
mbed_official 181:a4cbdfbbd2f4 444 * @param __HANDLE__: specifies the SMBUS Handle.
mbed_official 181:a4cbdfbbd2f4 445 * This parameter can be SMBUSx where x: 1 or 2 to select the SMBUS peripheral.
mbed_official 181:a4cbdfbbd2f4 446 * @param __FLAG__: specifies the flag to check.
mbed_official 181:a4cbdfbbd2f4 447 * This parameter can be one of the following values:
mbed_official 181:a4cbdfbbd2f4 448 * @arg SMBUS_FLAG_TXE: Transmit data register empty
mbed_official 181:a4cbdfbbd2f4 449 * @arg SMBUS_FLAG_TXIS: Transmit interrupt status
mbed_official 181:a4cbdfbbd2f4 450 * @arg SMBUS_FLAG_RXNE: Receive data register not empty
mbed_official 181:a4cbdfbbd2f4 451 * @arg SMBUS_FLAG_ADDR: Address matched (slave mode)
mbed_official 181:a4cbdfbbd2f4 452 * @arg SMBUS_FLAG_AF NACK received flag
mbed_official 181:a4cbdfbbd2f4 453 * @arg SMBUS_FLAG_STOPF: STOP detection flag
mbed_official 181:a4cbdfbbd2f4 454 * @arg SMBUS_FLAG_TC: Transfer complete (master mode)
mbed_official 181:a4cbdfbbd2f4 455 * @arg SMBUS_FLAG_TCR: Transfer complete reload
mbed_official 181:a4cbdfbbd2f4 456 * @arg SMBUS_FLAG_BERR: Bus error
mbed_official 181:a4cbdfbbd2f4 457 * @arg SMBUS_FLAG_ARLO: Arbitration lost
mbed_official 181:a4cbdfbbd2f4 458 * @arg SMBUS_FLAG_OVR: Overrun/Underrun
mbed_official 181:a4cbdfbbd2f4 459 * @arg SMBUS_FLAG_PECERR: PEC error in reception
mbed_official 181:a4cbdfbbd2f4 460 * @arg SMBUS_FLAG_TIMEOUT: Timeout or Tlow detection flag
mbed_official 181:a4cbdfbbd2f4 461 * @arg SMBUS_FLAG_ALERT: SMBus alert
mbed_official 181:a4cbdfbbd2f4 462 * @arg SMBUS_FLAG_BUSY: Bus busy
mbed_official 181:a4cbdfbbd2f4 463 * @arg SMBUS_FLAG_DIR: Transfer direction (slave mode)
mbed_official 181:a4cbdfbbd2f4 464 * @retval The new state of __FLAG__ (TRUE or FALSE).
mbed_official 181:a4cbdfbbd2f4 465 */
mbed_official 181:a4cbdfbbd2f4 466 #define SMBUS_FLAG_MASK ((uint32_t)0x0001FFFF)
mbed_official 181:a4cbdfbbd2f4 467 #define __HAL_SMBUS_GET_FLAG(__HANDLE__, __FLAG__) (((((__HANDLE__)->Instance->ISR) & ((__FLAG__) & SMBUS_FLAG_MASK)) == ((__FLAG__) & SMBUS_FLAG_MASK)))
mbed_official 181:a4cbdfbbd2f4 468
mbed_official 181:a4cbdfbbd2f4 469 /** @brief Clears the SMBUS pending flags which are cleared by writing 1 in a specific bit.
mbed_official 181:a4cbdfbbd2f4 470 * @param __HANDLE__: specifies the SMBUS Handle.
mbed_official 181:a4cbdfbbd2f4 471 * This parameter can be SMBUSx where x: 1 or 2 to select the SMBUS peripheral.
mbed_official 181:a4cbdfbbd2f4 472 * @param __FLAG__: specifies the flag to clear.
mbed_official 181:a4cbdfbbd2f4 473 * This parameter can be any combination of the following values:
mbed_official 181:a4cbdfbbd2f4 474 * @arg SMBUS_FLAG_ADDR: Address matched (slave mode)
mbed_official 181:a4cbdfbbd2f4 475 * @arg SMBUS_FLAG_AF: NACK received flag
mbed_official 181:a4cbdfbbd2f4 476 * @arg SMBUS_FLAG_STOPF: STOP detection flag
mbed_official 181:a4cbdfbbd2f4 477 * @arg SMBUS_FLAG_BERR: Bus error
mbed_official 181:a4cbdfbbd2f4 478 * @arg SMBUS_FLAG_ARLO: Arbitration lost
mbed_official 181:a4cbdfbbd2f4 479 * @arg SMBUS_FLAG_OVR: Overrun/Underrun
mbed_official 181:a4cbdfbbd2f4 480 * @arg SMBUS_FLAG_PECERR: PEC error in reception
mbed_official 181:a4cbdfbbd2f4 481 * @arg SMBUS_FLAG_TIMEOUT: Timeout or Tlow detection flag
mbed_official 181:a4cbdfbbd2f4 482 * @arg SMBUS_FLAG_ALERT: SMBus alert
mbed_official 181:a4cbdfbbd2f4 483 * @retval None
mbed_official 181:a4cbdfbbd2f4 484 */
mbed_official 181:a4cbdfbbd2f4 485 #define __HAL_SMBUS_CLEAR_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->ICR |= ((__FLAG__) & SMBUS_FLAG_MASK))
mbed_official 181:a4cbdfbbd2f4 486
mbed_official 181:a4cbdfbbd2f4 487
mbed_official 181:a4cbdfbbd2f4 488 #define __HAL_SMBUS_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR1 |= I2C_CR1_PE)
mbed_official 181:a4cbdfbbd2f4 489 #define __HAL_SMBUS_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR1 &= ~I2C_CR1_PE)
mbed_official 181:a4cbdfbbd2f4 490
mbed_official 181:a4cbdfbbd2f4 491 #define __HAL_SMBUS_RESET_CR1(__HANDLE__) ((__HANDLE__)->Instance->CR1 &= (uint32_t)~((uint32_t)(I2C_CR1_SMBHEN | I2C_CR1_SMBDEN | I2C_CR1_PECEN)))
mbed_official 181:a4cbdfbbd2f4 492 #define __HAL_SMBUS_RESET_CR2(__HANDLE__) ((__HANDLE__)->Instance->CR2 &= (uint32_t)~((uint32_t)(I2C_CR2_SADD | I2C_CR2_HEAD10R | I2C_CR2_NBYTES | I2C_CR2_RELOAD | I2C_CR2_RD_WRN)))
mbed_official 181:a4cbdfbbd2f4 493
mbed_official 181:a4cbdfbbd2f4 494 #define __HAL_SMBUS_GENERATE_START(__ADDMODE__,__ADDRESS__) (((__ADDMODE__) == SMBUS_ADDRESSINGMODE_7BIT) ? (uint32_t)((((uint32_t)(__ADDRESS__) & (I2C_CR2_SADD)) | (I2C_CR2_START) | (I2C_CR2_AUTOEND)) & (~I2C_CR2_RD_WRN)) : \
mbed_official 181:a4cbdfbbd2f4 495 (uint32_t)((((uint32_t)(__ADDRESS__) & (I2C_CR2_SADD)) | (I2C_CR2_ADD10) | (I2C_CR2_START)) & (~I2C_CR2_RD_WRN)))
mbed_official 181:a4cbdfbbd2f4 496
mbed_official 181:a4cbdfbbd2f4 497 #define __HAL_SMBUS_GET_ADDR_MATCH(__HANDLE__) (((__HANDLE__)->Instance->ISR & I2C_ISR_ADDCODE) >> 17)
mbed_official 181:a4cbdfbbd2f4 498 #define __HAL_SMBUS_GET_DIR(__HANDLE__) (((__HANDLE__)->Instance->ISR & I2C_ISR_DIR) >> 16)
mbed_official 181:a4cbdfbbd2f4 499 #define __HAL_SMBUS_GET_STOP_MODE(__HANDLE__) ((__HANDLE__)->Instance->CR2 & I2C_CR2_AUTOEND)
mbed_official 181:a4cbdfbbd2f4 500 #define __HAL_SMBUS_GET_PEC_MODE(__HANDLE__) ((__HANDLE__)->Instance->CR2 & I2C_CR2_PECBYTE)
mbed_official 181:a4cbdfbbd2f4 501 #define __HAL_SMBUS_GET_ALERT_ENABLED(__HANDLE__) ((__HANDLE__)->Instance->CR1 & I2C_CR1_ALERTEN)
mbed_official 181:a4cbdfbbd2f4 502 #define __HAL_SMBUS_GENERATE_NACK(__HANDLE__) ((__HANDLE__)->Instance->CR2 |= I2C_CR2_NACK)
mbed_official 181:a4cbdfbbd2f4 503
mbed_official 181:a4cbdfbbd2f4 504 #define IS_SMBUS_OWN_ADDRESS1(ADDRESS1) ((ADDRESS1) <= (uint32_t)0x000003FF)
mbed_official 181:a4cbdfbbd2f4 505 #define IS_SMBUS_OWN_ADDRESS2(ADDRESS2) ((ADDRESS2) <= (uint16_t)0x00FF)
mbed_official 181:a4cbdfbbd2f4 506 /**
mbed_official 181:a4cbdfbbd2f4 507 * @}
mbed_official 181:a4cbdfbbd2f4 508 */
mbed_official 181:a4cbdfbbd2f4 509
mbed_official 181:a4cbdfbbd2f4 510 /* Exported functions --------------------------------------------------------*/
mbed_official 181:a4cbdfbbd2f4 511 /* Initialization and de-initialization functions ****************************/
mbed_official 181:a4cbdfbbd2f4 512 HAL_StatusTypeDef HAL_SMBUS_Init(SMBUS_HandleTypeDef *hsmbus);
mbed_official 181:a4cbdfbbd2f4 513 HAL_StatusTypeDef HAL_SMBUS_DeInit (SMBUS_HandleTypeDef *hsmbus);
mbed_official 181:a4cbdfbbd2f4 514 void HAL_SMBUS_MspInit(SMBUS_HandleTypeDef *hsmbus);
mbed_official 181:a4cbdfbbd2f4 515 void HAL_SMBUS_MspDeInit(SMBUS_HandleTypeDef *hsmbus);
mbed_official 181:a4cbdfbbd2f4 516
mbed_official 181:a4cbdfbbd2f4 517 /* IO operation functions ****************************************************/
mbed_official 181:a4cbdfbbd2f4 518 HAL_StatusTypeDef HAL_SMBUS_EnableAlert_IT(SMBUS_HandleTypeDef *hsmbus);
mbed_official 181:a4cbdfbbd2f4 519 HAL_StatusTypeDef HAL_SMBUS_DisableAlert_IT(SMBUS_HandleTypeDef *hsmbus);
mbed_official 181:a4cbdfbbd2f4 520
mbed_official 181:a4cbdfbbd2f4 521 /******* Blocking mode: Polling */
mbed_official 181:a4cbdfbbd2f4 522 HAL_StatusTypeDef HAL_SMBUS_IsDeviceReady(SMBUS_HandleTypeDef *hsmbus, uint16_t DevAddress, uint32_t Trials, uint32_t Timeout);
mbed_official 181:a4cbdfbbd2f4 523
mbed_official 181:a4cbdfbbd2f4 524 /******* Non-Blocking mode: Interrupt */
mbed_official 181:a4cbdfbbd2f4 525 HAL_StatusTypeDef HAL_SMBUS_Master_Transmit_IT(SMBUS_HandleTypeDef *hsmbus, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t XferOptions);
mbed_official 181:a4cbdfbbd2f4 526 HAL_StatusTypeDef HAL_SMBUS_Master_Receive_IT(SMBUS_HandleTypeDef *hsmbus, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t XferOptions);
mbed_official 181:a4cbdfbbd2f4 527 HAL_StatusTypeDef HAL_SMBUS_Master_Abort_IT(SMBUS_HandleTypeDef *hsmbus, uint16_t DevAddress);
mbed_official 181:a4cbdfbbd2f4 528 HAL_StatusTypeDef HAL_SMBUS_Slave_Transmit_IT(SMBUS_HandleTypeDef *hsmbus, uint8_t *pData, uint16_t Size, uint32_t XferOptions);
mbed_official 181:a4cbdfbbd2f4 529 HAL_StatusTypeDef HAL_SMBUS_Slave_Receive_IT(SMBUS_HandleTypeDef *hsmbus, uint8_t *pData, uint16_t Size, uint32_t XferOptions);
mbed_official 181:a4cbdfbbd2f4 530 HAL_StatusTypeDef HAL_SMBUS_Slave_Listen_IT(SMBUS_HandleTypeDef *hsmbus);
mbed_official 181:a4cbdfbbd2f4 531
mbed_official 181:a4cbdfbbd2f4 532 /******* SMBUS IRQHandler and Callbacks used in non blocking modes (Interrupt) */
mbed_official 181:a4cbdfbbd2f4 533 void HAL_SMBUS_EV_IRQHandler(SMBUS_HandleTypeDef *hsmbus);
mbed_official 181:a4cbdfbbd2f4 534 void HAL_SMBUS_ER_IRQHandler(SMBUS_HandleTypeDef *hsmbus);
mbed_official 181:a4cbdfbbd2f4 535 void HAL_SMBUS_MasterTxCpltCallback(SMBUS_HandleTypeDef *hsmbus);
mbed_official 181:a4cbdfbbd2f4 536 void HAL_SMBUS_MasterRxCpltCallback(SMBUS_HandleTypeDef *hsmbus);
mbed_official 181:a4cbdfbbd2f4 537 void HAL_SMBUS_SlaveTxCpltCallback(SMBUS_HandleTypeDef *hsmbus);
mbed_official 181:a4cbdfbbd2f4 538 void HAL_SMBUS_SlaveRxCpltCallback(SMBUS_HandleTypeDef *hsmbus);
mbed_official 181:a4cbdfbbd2f4 539 void HAL_SMBUS_SlaveAddrCallback(SMBUS_HandleTypeDef *hsmbus, uint8_t TransferDirection, uint16_t AddrMatchCode);
mbed_official 181:a4cbdfbbd2f4 540 void HAL_SMBUS_SlaveListenCpltCallback(SMBUS_HandleTypeDef *hsmbus);
mbed_official 181:a4cbdfbbd2f4 541 void HAL_SMBUS_ErrorCallback(SMBUS_HandleTypeDef *hsmbus);
mbed_official 181:a4cbdfbbd2f4 542
mbed_official 181:a4cbdfbbd2f4 543 /* Peripheral State and Errors functions *************************************/
mbed_official 181:a4cbdfbbd2f4 544 HAL_SMBUS_StateTypeDef HAL_SMBUS_GetState(SMBUS_HandleTypeDef *hsmbus);
mbed_official 181:a4cbdfbbd2f4 545 uint32_t HAL_SMBUS_GetError(SMBUS_HandleTypeDef *hsmbus);
mbed_official 181:a4cbdfbbd2f4 546
mbed_official 181:a4cbdfbbd2f4 547 /**
mbed_official 181:a4cbdfbbd2f4 548 * @}
mbed_official 181:a4cbdfbbd2f4 549 */
mbed_official 181:a4cbdfbbd2f4 550
mbed_official 181:a4cbdfbbd2f4 551 /**
mbed_official 181:a4cbdfbbd2f4 552 * @}
mbed_official 181:a4cbdfbbd2f4 553 */
mbed_official 181:a4cbdfbbd2f4 554
mbed_official 181:a4cbdfbbd2f4 555 #ifdef __cplusplus
mbed_official 181:a4cbdfbbd2f4 556 }
mbed_official 181:a4cbdfbbd2f4 557 #endif
mbed_official 181:a4cbdfbbd2f4 558
mbed_official 181:a4cbdfbbd2f4 559
mbed_official 181:a4cbdfbbd2f4 560 #endif /* __STM32L0xx_HAL_SMBUS_H */
mbed_official 181:a4cbdfbbd2f4 561
mbed_official 181:a4cbdfbbd2f4 562 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/