shao ziyang / mbed-src-kl05

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targets/cmsis/TARGET_STM/TARGET_NUCLEO_L053R8/stm32l0xx_hal_dma.c@323:9e901b0a5aa1, 2014-09-13 (annotated)

Committer:
shaoziyang
Date:
Sat Sep 13 14:25:46 2014 +0000
Revision:
323:9e901b0a5aa1
Parent:
181:a4cbdfbbd2f4 
test with CLOCK_SETUP = 0

Who changed what in which revision?

UserRevisionLine numberNew contents of line
mbed_official 181:a4cbdfbbd2f4 1 /**
mbed_official 181:a4cbdfbbd2f4 2 ******************************************************************************
mbed_official 181:a4cbdfbbd2f4 3 * @file stm32l0xx_hal_dma.c
mbed_official 181:a4cbdfbbd2f4 4 * @author MCD Application Team
mbed_official 181:a4cbdfbbd2f4 5 * @version V1.0.0
mbed_official 181:a4cbdfbbd2f4 6 * @date 22-April-2014
mbed_official 181:a4cbdfbbd2f4 7 * @brief DMA HAL module driver.
mbed_official 181:a4cbdfbbd2f4 8 *
mbed_official 181:a4cbdfbbd2f4 9 * This file provides firmware functions to manage the following
mbed_official 181:a4cbdfbbd2f4 10 * functionalities of the Direct Memory Access (DMA) peripheral:
mbed_official 181:a4cbdfbbd2f4 11 * + Initialization/de-initialization functions
mbed_official 181:a4cbdfbbd2f4 12 * + I/O operation functions
mbed_official 181:a4cbdfbbd2f4 13 * + Peripheral State functions
mbed_official 181:a4cbdfbbd2f4 14 *
mbed_official 181:a4cbdfbbd2f4 15 *
mbed_official 181:a4cbdfbbd2f4 16 @verbatim
mbed_official 181:a4cbdfbbd2f4 17 ==============================================================================
mbed_official 181:a4cbdfbbd2f4 18 ##### How to use this driver #####
mbed_official 181:a4cbdfbbd2f4 19 ==============================================================================
mbed_official 181:a4cbdfbbd2f4 20 [..]
mbed_official 181:a4cbdfbbd2f4 21 (#) Enable and configure the peripheral to be connected to the DMA Channel
mbed_official 181:a4cbdfbbd2f4 22 (except for internal SRAM / FLASH memories: no initialization is
mbed_official 181:a4cbdfbbd2f4 23 necessary).
mbed_official 181:a4cbdfbbd2f4 24
mbed_official 181:a4cbdfbbd2f4 25 (#) For a given Channel, program the required configuration through the following parameters:
mbed_official 181:a4cbdfbbd2f4 26 Channel request, Transfer Direction, Source and Destination data formats,
mbed_official 181:a4cbdfbbd2f4 27 Circular, Normal or peripheral flow control mode, Channel Priority level,
mbed_official 181:a4cbdfbbd2f4 28 Source and Destination Increment mode using HAL_DMA_Init() function.
mbed_official 181:a4cbdfbbd2f4 29
mbed_official 181:a4cbdfbbd2f4 30 *** Polling mode IO operation ***
mbed_official 181:a4cbdfbbd2f4 31 =================================
mbed_official 181:a4cbdfbbd2f4 32 [..]
mbed_official 181:a4cbdfbbd2f4 33 (+) Use HAL_DMA_Start() to start DMA transfer after the configuration of Source
mbed_official 181:a4cbdfbbd2f4 34 address and destination address and the Length of data to be transferred
mbed_official 181:a4cbdfbbd2f4 35 (+) Use HAL_DMA_PollForTransfer() to poll for the end of current transfer, in this
mbed_official 181:a4cbdfbbd2f4 36 case a fixed Timeout can be configured by User depending from his application.
mbed_official 181:a4cbdfbbd2f4 37
mbed_official 181:a4cbdfbbd2f4 38 *** Interrupt mode IO operation ***
mbed_official 181:a4cbdfbbd2f4 39 ===================================
mbed_official 181:a4cbdfbbd2f4 40 [..]
mbed_official 181:a4cbdfbbd2f4 41 (+) Configure the DMA interrupt priority using HAL_NVIC_SetPriority()
mbed_official 181:a4cbdfbbd2f4 42 (+) Enable the DMA IRQ handler using HAL_NVIC_EnableIRQ()
mbed_official 181:a4cbdfbbd2f4 43 (+) Use HAL_DMA_Start_IT() to start DMA transfer after the configuration of
mbed_official 181:a4cbdfbbd2f4 44 Source address and destination address and the Length of data to be transferred. In this
mbed_official 181:a4cbdfbbd2f4 45 case the DMA interrupt is configured
mbed_official 181:a4cbdfbbd2f4 46 (+) Use HAL_DMA_IRQHandler() called under DMA_IRQHandler() Interrupt subroutine
mbed_official 181:a4cbdfbbd2f4 47 (+) At the end of data transfer HAL_DMA_IRQHandler() function is executed and user can
mbed_official 181:a4cbdfbbd2f4 48 add his own function by customization of function pointer XferCpltCallback and
mbed_official 181:a4cbdfbbd2f4 49 XferErrorCallback (i.e a member of DMA handle structure).
mbed_official 181:a4cbdfbbd2f4 50
mbed_official 181:a4cbdfbbd2f4 51 (#) Use HAL_DMA_GetState() function to return the DMA state and HAL_DMA_GetError() in case of error
mbed_official 181:a4cbdfbbd2f4 52 detection.
mbed_official 181:a4cbdfbbd2f4 53
mbed_official 181:a4cbdfbbd2f4 54 (#) Use HAL_DMA_Abort() function to abort the current transfer
mbed_official 181:a4cbdfbbd2f4 55
mbed_official 181:a4cbdfbbd2f4 56 -@- In Memory-to-Memory transfer mode, Circular mode is not allowed.
mbed_official 181:a4cbdfbbd2f4 57
mbed_official 181:a4cbdfbbd2f4 58 @endverbatim
mbed_official 181:a4cbdfbbd2f4 59 ******************************************************************************
mbed_official 181:a4cbdfbbd2f4 60 * @attention
mbed_official 181:a4cbdfbbd2f4 61 *
mbed_official 181:a4cbdfbbd2f4 62 * <h2><center>&copy; COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
mbed_official 181:a4cbdfbbd2f4 63 *
mbed_official 181:a4cbdfbbd2f4 64 * Redistribution and use in source and binary forms, with or without modification,
mbed_official 181:a4cbdfbbd2f4 65 * are permitted provided that the following conditions are met:
mbed_official 181:a4cbdfbbd2f4 66 * 1. Redistributions of source code must retain the above copyright notice,
mbed_official 181:a4cbdfbbd2f4 67 * this list of conditions and the following disclaimer.
mbed_official 181:a4cbdfbbd2f4 68 * 2. Redistributions in binary form must reproduce the above copyright notice,
mbed_official 181:a4cbdfbbd2f4 69 * this list of conditions and the following disclaimer in the documentation
mbed_official 181:a4cbdfbbd2f4 70 * and/or other materials provided with the distribution.
mbed_official 181:a4cbdfbbd2f4 71 * 3. Neither the name of STMicroelectronics nor the names of its contributors
mbed_official 181:a4cbdfbbd2f4 72 * may be used to endorse or promote products derived from this software
mbed_official 181:a4cbdfbbd2f4 73 * without specific prior written permission.
mbed_official 181:a4cbdfbbd2f4 74 *
mbed_official 181:a4cbdfbbd2f4 75 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
mbed_official 181:a4cbdfbbd2f4 76 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
mbed_official 181:a4cbdfbbd2f4 77 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
mbed_official 181:a4cbdfbbd2f4 78 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
mbed_official 181:a4cbdfbbd2f4 79 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
mbed_official 181:a4cbdfbbd2f4 80 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
mbed_official 181:a4cbdfbbd2f4 81 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
mbed_official 181:a4cbdfbbd2f4 82 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
mbed_official 181:a4cbdfbbd2f4 83 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
mbed_official 181:a4cbdfbbd2f4 84 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
mbed_official 181:a4cbdfbbd2f4 85 *
mbed_official 181:a4cbdfbbd2f4 86 ******************************************************************************
mbed_official 181:a4cbdfbbd2f4 87 */
mbed_official 181:a4cbdfbbd2f4 88
mbed_official 181:a4cbdfbbd2f4 89 /* Includes ------------------------------------------------------------------*/
mbed_official 181:a4cbdfbbd2f4 90 #include "stm32l0xx_hal.h"
mbed_official 181:a4cbdfbbd2f4 91
mbed_official 181:a4cbdfbbd2f4 92 /** @addtogroup STM32L0xx_HAL_Driver
mbed_official 181:a4cbdfbbd2f4 93 * @{
mbed_official 181:a4cbdfbbd2f4 94 */
mbed_official 181:a4cbdfbbd2f4 95
mbed_official 181:a4cbdfbbd2f4 96 /** @defgroup DMA
mbed_official 181:a4cbdfbbd2f4 97 * @brief DMA HAL module driver
mbed_official 181:a4cbdfbbd2f4 98 * @{
mbed_official 181:a4cbdfbbd2f4 99 */
mbed_official 181:a4cbdfbbd2f4 100
mbed_official 181:a4cbdfbbd2f4 101 #ifdef HAL_DMA_MODULE_ENABLED
mbed_official 181:a4cbdfbbd2f4 102
mbed_official 181:a4cbdfbbd2f4 103 /* Private typedef -----------------------------------------------------------*/
mbed_official 181:a4cbdfbbd2f4 104 /* Private define ------------------------------------------------------------*/
mbed_official 181:a4cbdfbbd2f4 105 #define HAL_TIMEOUT_DMA_ABORT ((uint32_t)1000) /* 1s */
mbed_official 181:a4cbdfbbd2f4 106 /* Private macro -------------------------------------------------------------*/
mbed_official 181:a4cbdfbbd2f4 107 /* Private variables ---------------------------------------------------------*/
mbed_official 181:a4cbdfbbd2f4 108 /* Private function prototypes -----------------------------------------------*/
mbed_official 181:a4cbdfbbd2f4 109 static void DMA_SetConfig(DMA_HandleTypeDef *hdma, uint32_t SrcAddress, uint32_t DstAddress, uint32_t DataLength);
mbed_official 181:a4cbdfbbd2f4 110
mbed_official 181:a4cbdfbbd2f4 111 /* Private functions ---------------------------------------------------------*/
mbed_official 181:a4cbdfbbd2f4 112
mbed_official 181:a4cbdfbbd2f4 113 /** @defgroup DMA_Private_Functions
mbed_official 181:a4cbdfbbd2f4 114 * @{
mbed_official 181:a4cbdfbbd2f4 115 */
mbed_official 181:a4cbdfbbd2f4 116
mbed_official 181:a4cbdfbbd2f4 117 /** @defgroup DMA_Group1 Initialization/de-initialization functions
mbed_official 181:a4cbdfbbd2f4 118 * @brief Initialization/de-initialization functions
mbed_official 181:a4cbdfbbd2f4 119 *
mbed_official 181:a4cbdfbbd2f4 120 @verbatim
mbed_official 181:a4cbdfbbd2f4 121 ===============================================================================
mbed_official 181:a4cbdfbbd2f4 122 ##### Initialization and de-initialization functions #####
mbed_official 181:a4cbdfbbd2f4 123 ===============================================================================
mbed_official 181:a4cbdfbbd2f4 124 [..] This section provides functions allowing to:
mbed_official 181:a4cbdfbbd2f4 125 (+) Initialize and configure the DMA
mbed_official 181:a4cbdfbbd2f4 126 (+) De-Initialize the DMA
mbed_official 181:a4cbdfbbd2f4 127
mbed_official 181:a4cbdfbbd2f4 128 @endverbatim
mbed_official 181:a4cbdfbbd2f4 129 * @{
mbed_official 181:a4cbdfbbd2f4 130 */
mbed_official 181:a4cbdfbbd2f4 131
mbed_official 181:a4cbdfbbd2f4 132 /**
mbed_official 181:a4cbdfbbd2f4 133 * @brief Initializes the DMA according to the specified
mbed_official 181:a4cbdfbbd2f4 134 * parameters in the DMA_InitTypeDef and create the associated handle.
mbed_official 181:a4cbdfbbd2f4 135 * @param hdma: Pointer to a DMA_HandleTypeDef structure that contains
mbed_official 181:a4cbdfbbd2f4 136 * the configuration information for the specified DMA Channel.
mbed_official 181:a4cbdfbbd2f4 137 * @retval HAL status
mbed_official 181:a4cbdfbbd2f4 138 */
mbed_official 181:a4cbdfbbd2f4 139 HAL_StatusTypeDef HAL_DMA_Init(DMA_HandleTypeDef *hdma)
mbed_official 181:a4cbdfbbd2f4 140 {
mbed_official 181:a4cbdfbbd2f4 141 uint32_t tmp = 0;
mbed_official 181:a4cbdfbbd2f4 142
mbed_official 181:a4cbdfbbd2f4 143 /* Check the DMA peripheral state */
mbed_official 181:a4cbdfbbd2f4 144 if(hdma == NULL)
mbed_official 181:a4cbdfbbd2f4 145 {
mbed_official 181:a4cbdfbbd2f4 146 return HAL_ERROR;
mbed_official 181:a4cbdfbbd2f4 147 }
mbed_official 181:a4cbdfbbd2f4 148
mbed_official 181:a4cbdfbbd2f4 149 /* Check the parameters */
mbed_official 181:a4cbdfbbd2f4 150 assert_param(IS_DMA_ALL_PERIPH(hdma->Instance));
mbed_official 181:a4cbdfbbd2f4 151 assert_param(IS_DMA_ALL_REQUEST(hdma->Init.Request));
mbed_official 181:a4cbdfbbd2f4 152 assert_param(IS_DMA_DIRECTION(hdma->Init.Direction));
mbed_official 181:a4cbdfbbd2f4 153 assert_param(IS_DMA_PERIPHERAL_INC_STATE(hdma->Init.PeriphInc));
mbed_official 181:a4cbdfbbd2f4 154 assert_param(IS_DMA_MEMORY_INC_STATE(hdma->Init.MemInc));
mbed_official 181:a4cbdfbbd2f4 155 assert_param(IS_DMA_PERIPHERAL_DATA_SIZE(hdma->Init.PeriphDataAlignment));
mbed_official 181:a4cbdfbbd2f4 156 assert_param(IS_DMA_MEMORY_DATA_SIZE(hdma->Init.MemDataAlignment));
mbed_official 181:a4cbdfbbd2f4 157 assert_param(IS_DMA_MODE(hdma->Init.Mode));
mbed_official 181:a4cbdfbbd2f4 158 assert_param(IS_DMA_PRIORITY(hdma->Init.Priority));
mbed_official 181:a4cbdfbbd2f4 159
mbed_official 181:a4cbdfbbd2f4 160 /* Change DMA peripheral state */
mbed_official 181:a4cbdfbbd2f4 161 hdma->State = HAL_DMA_STATE_BUSY;
mbed_official 181:a4cbdfbbd2f4 162
mbed_official 181:a4cbdfbbd2f4 163 /* Get the CR register value */
mbed_official 181:a4cbdfbbd2f4 164 tmp = hdma->Instance->CCR;
mbed_official 181:a4cbdfbbd2f4 165
mbed_official 181:a4cbdfbbd2f4 166 /* Clear PL, MSIZE, PSIZE, MINC, PINC, CIRC, DIR bits */
mbed_official 181:a4cbdfbbd2f4 167 tmp &= ((uint32_t)~(DMA_CCR_PL | DMA_CCR_MSIZE | DMA_CCR_PSIZE | \
mbed_official 181:a4cbdfbbd2f4 168 DMA_CCR_MINC | DMA_CCR_PINC | DMA_CCR_CIRC | \
mbed_official 181:a4cbdfbbd2f4 169 DMA_CCR_DIR));
mbed_official 181:a4cbdfbbd2f4 170
mbed_official 181:a4cbdfbbd2f4 171 /* Prepare the DMA Channel configuration */
mbed_official 181:a4cbdfbbd2f4 172 tmp |= hdma->Init.Direction |
mbed_official 181:a4cbdfbbd2f4 173 hdma->Init.PeriphInc | hdma->Init.MemInc |
mbed_official 181:a4cbdfbbd2f4 174 hdma->Init.PeriphDataAlignment | hdma->Init.MemDataAlignment |
mbed_official 181:a4cbdfbbd2f4 175 hdma->Init.Mode | hdma->Init.Priority;
mbed_official 181:a4cbdfbbd2f4 176
mbed_official 181:a4cbdfbbd2f4 177 /* Write to DMA Channel CR register */
mbed_official 181:a4cbdfbbd2f4 178 hdma->Instance->CCR = tmp;
mbed_official 181:a4cbdfbbd2f4 179
mbed_official 181:a4cbdfbbd2f4 180 /* Write to DMA channel selection register */
mbed_official 181:a4cbdfbbd2f4 181 if (hdma->Instance == DMA1_Channel1)
mbed_official 181:a4cbdfbbd2f4 182 {
mbed_official 181:a4cbdfbbd2f4 183 /*Reset request selection for DMA1 Channel1*/
mbed_official 181:a4cbdfbbd2f4 184 DMA1_CSELR->CSELR &= ~DMA_CSELR_C1S;
mbed_official 181:a4cbdfbbd2f4 185
mbed_official 181:a4cbdfbbd2f4 186 /* Configure request selection for DMA1 Channel1 */
mbed_official 181:a4cbdfbbd2f4 187 DMA1_CSELR->CSELR |= hdma->Init.Request;
mbed_official 181:a4cbdfbbd2f4 188 }
mbed_official 181:a4cbdfbbd2f4 189 else if (hdma->Instance == DMA1_Channel2)
mbed_official 181:a4cbdfbbd2f4 190 {
mbed_official 181:a4cbdfbbd2f4 191 /*Reset request selection for DMA1 Channel2*/
mbed_official 181:a4cbdfbbd2f4 192 DMA1_CSELR->CSELR &= ~DMA_CSELR_C2S;
mbed_official 181:a4cbdfbbd2f4 193
mbed_official 181:a4cbdfbbd2f4 194 /* Configure request selection for DMA1 Channel2 */
mbed_official 181:a4cbdfbbd2f4 195 DMA1_CSELR->CSELR |= (uint32_t)(hdma->Init.Request << 4);
mbed_official 181:a4cbdfbbd2f4 196 }
mbed_official 181:a4cbdfbbd2f4 197 else if (hdma->Instance == DMA1_Channel3)
mbed_official 181:a4cbdfbbd2f4 198 {
mbed_official 181:a4cbdfbbd2f4 199 /*Reset request selection for DMA1 Channel3*/
mbed_official 181:a4cbdfbbd2f4 200 DMA1_CSELR->CSELR &= ~DMA_CSELR_C3S;
mbed_official 181:a4cbdfbbd2f4 201
mbed_official 181:a4cbdfbbd2f4 202 /* Configure request selection for DMA1 Channel3 */
mbed_official 181:a4cbdfbbd2f4 203 DMA1_CSELR->CSELR |= (uint32_t) (hdma->Init.Request << 8);
mbed_official 181:a4cbdfbbd2f4 204 }
mbed_official 181:a4cbdfbbd2f4 205 else if (hdma->Instance == DMA1_Channel4)
mbed_official 181:a4cbdfbbd2f4 206 {
mbed_official 181:a4cbdfbbd2f4 207 /*Reset request selection for DMA1 Channel4*/
mbed_official 181:a4cbdfbbd2f4 208 DMA1_CSELR->CSELR &= ~DMA_CSELR_C4S;
mbed_official 181:a4cbdfbbd2f4 209
mbed_official 181:a4cbdfbbd2f4 210 /* Configure request selection for DMA1 Channel4 */
mbed_official 181:a4cbdfbbd2f4 211 DMA1_CSELR->CSELR |= (uint32_t) (hdma->Init.Request << 12);
mbed_official 181:a4cbdfbbd2f4 212 }
mbed_official 181:a4cbdfbbd2f4 213 else if (hdma->Instance == DMA1_Channel5)
mbed_official 181:a4cbdfbbd2f4 214 {
mbed_official 181:a4cbdfbbd2f4 215 /*Reset request selection for DMA1 Channel5*/
mbed_official 181:a4cbdfbbd2f4 216 DMA1_CSELR->CSELR &= ~DMA_CSELR_C5S;
mbed_official 181:a4cbdfbbd2f4 217
mbed_official 181:a4cbdfbbd2f4 218 /* Configure request selection for DMA1 Channel5 */
mbed_official 181:a4cbdfbbd2f4 219 DMA1_CSELR->CSELR |= (uint32_t) (hdma->Init.Request << 16);
mbed_official 181:a4cbdfbbd2f4 220 }
mbed_official 181:a4cbdfbbd2f4 221 else if (hdma->Instance == DMA1_Channel6)
mbed_official 181:a4cbdfbbd2f4 222 {
mbed_official 181:a4cbdfbbd2f4 223 /*Reset request selection for DMA1 Channel6*/
mbed_official 181:a4cbdfbbd2f4 224 DMA1_CSELR->CSELR &= ~DMA_CSELR_C6S;
mbed_official 181:a4cbdfbbd2f4 225
mbed_official 181:a4cbdfbbd2f4 226 /* Configure request selection for DMA1 Channel6 */
mbed_official 181:a4cbdfbbd2f4 227 DMA1_CSELR->CSELR |= (uint32_t) (hdma->Init.Request << 20);
mbed_official 181:a4cbdfbbd2f4 228 }
mbed_official 181:a4cbdfbbd2f4 229 else if (hdma->Instance == DMA1_Channel7)
mbed_official 181:a4cbdfbbd2f4 230 {
mbed_official 181:a4cbdfbbd2f4 231 /*Reset request selection for DMA1 Channel7*/
mbed_official 181:a4cbdfbbd2f4 232 DMA1_CSELR->CSELR &= ~DMA_CSELR_C7S;
mbed_official 181:a4cbdfbbd2f4 233
mbed_official 181:a4cbdfbbd2f4 234 /* Configure request selection for DMA1 Channel7 */
mbed_official 181:a4cbdfbbd2f4 235 DMA1_CSELR->CSELR |= (uint32_t) (hdma->Init.Request << 24);
mbed_official 181:a4cbdfbbd2f4 236 }
mbed_official 181:a4cbdfbbd2f4 237
mbed_official 181:a4cbdfbbd2f4 238 /* Initialize the DMA state*/
mbed_official 181:a4cbdfbbd2f4 239 hdma->State = HAL_DMA_STATE_READY;
mbed_official 181:a4cbdfbbd2f4 240
mbed_official 181:a4cbdfbbd2f4 241 return HAL_OK;
mbed_official 181:a4cbdfbbd2f4 242 }
mbed_official 181:a4cbdfbbd2f4 243
mbed_official 181:a4cbdfbbd2f4 244 /**
mbed_official 181:a4cbdfbbd2f4 245 * @brief DeInitializes the DMA peripheral
mbed_official 181:a4cbdfbbd2f4 246 * @param hdma: pointer to a DMA_HandleTypeDef structure that contains
mbed_official 181:a4cbdfbbd2f4 247 * the configuration information for the specified DMA Channel.
mbed_official 181:a4cbdfbbd2f4 248 * @retval HAL status
mbed_official 181:a4cbdfbbd2f4 249 */
mbed_official 181:a4cbdfbbd2f4 250 HAL_StatusTypeDef HAL_DMA_DeInit(DMA_HandleTypeDef *hdma)
mbed_official 181:a4cbdfbbd2f4 251 {
mbed_official 181:a4cbdfbbd2f4 252 /* Check the DMA peripheral state */
mbed_official 181:a4cbdfbbd2f4 253 if(hdma->State == HAL_DMA_STATE_BUSY)
mbed_official 181:a4cbdfbbd2f4 254 {
mbed_official 181:a4cbdfbbd2f4 255 return HAL_ERROR;
mbed_official 181:a4cbdfbbd2f4 256 }
mbed_official 181:a4cbdfbbd2f4 257
mbed_official 181:a4cbdfbbd2f4 258 /* Disable the selected DMA Channelx */
mbed_official 181:a4cbdfbbd2f4 259 __HAL_DMA_DISABLE(hdma);
mbed_official 181:a4cbdfbbd2f4 260
mbed_official 181:a4cbdfbbd2f4 261 /* Reset DMA Channel control register */
mbed_official 181:a4cbdfbbd2f4 262 hdma->Instance->CCR = 0;
mbed_official 181:a4cbdfbbd2f4 263
mbed_official 181:a4cbdfbbd2f4 264 /* Reset DMA Channel Number of Data to Transfer register */
mbed_official 181:a4cbdfbbd2f4 265 hdma->Instance->CNDTR = 0;
mbed_official 181:a4cbdfbbd2f4 266
mbed_official 181:a4cbdfbbd2f4 267 /* Reset DMA Channel peripheral address register */
mbed_official 181:a4cbdfbbd2f4 268 hdma->Instance->CPAR = 0;
mbed_official 181:a4cbdfbbd2f4 269
mbed_official 181:a4cbdfbbd2f4 270 /* Reset DMA Channel memory address register */
mbed_official 181:a4cbdfbbd2f4 271 hdma->Instance->CMAR = 0;
mbed_official 181:a4cbdfbbd2f4 272
mbed_official 181:a4cbdfbbd2f4 273 /* Clear all flags */
mbed_official 181:a4cbdfbbd2f4 274 __HAL_DMA_CLEAR_FLAG(hdma, __HAL_DMA_GET_GI_FLAG_INDEX(hdma));
mbed_official 181:a4cbdfbbd2f4 275 __HAL_DMA_CLEAR_FLAG(hdma, __HAL_DMA_GET_TC_FLAG_INDEX(hdma));
mbed_official 181:a4cbdfbbd2f4 276 __HAL_DMA_CLEAR_FLAG(hdma, __HAL_DMA_GET_TE_FLAG_INDEX(hdma));
mbed_official 181:a4cbdfbbd2f4 277 __HAL_DMA_CLEAR_FLAG(hdma, __HAL_DMA_GET_HT_FLAG_INDEX(hdma));
mbed_official 181:a4cbdfbbd2f4 278
mbed_official 181:a4cbdfbbd2f4 279 /* Reset DMA channel selection register */
mbed_official 181:a4cbdfbbd2f4 280 if (hdma->Instance == DMA1_Channel1)
mbed_official 181:a4cbdfbbd2f4 281 {
mbed_official 181:a4cbdfbbd2f4 282 /*Reset DMA request*/
mbed_official 181:a4cbdfbbd2f4 283 DMA1_CSELR->CSELR &= ~DMA_CSELR_C1S;
mbed_official 181:a4cbdfbbd2f4 284 }
mbed_official 181:a4cbdfbbd2f4 285 else if (hdma->Instance == DMA1_Channel2)
mbed_official 181:a4cbdfbbd2f4 286 {
mbed_official 181:a4cbdfbbd2f4 287 /*Reset DMA request*/
mbed_official 181:a4cbdfbbd2f4 288 DMA1_CSELR->CSELR &= ~DMA_CSELR_C2S;
mbed_official 181:a4cbdfbbd2f4 289 }
mbed_official 181:a4cbdfbbd2f4 290 else if (hdma->Instance == DMA1_Channel3)
mbed_official 181:a4cbdfbbd2f4 291 {
mbed_official 181:a4cbdfbbd2f4 292 /*Reset DMA request*/
mbed_official 181:a4cbdfbbd2f4 293 DMA1_CSELR->CSELR &= ~DMA_CSELR_C3S;
mbed_official 181:a4cbdfbbd2f4 294 }
mbed_official 181:a4cbdfbbd2f4 295 else if (hdma->Instance == DMA1_Channel4)
mbed_official 181:a4cbdfbbd2f4 296 {
mbed_official 181:a4cbdfbbd2f4 297 /*Reset DMA request*/
mbed_official 181:a4cbdfbbd2f4 298 DMA1_CSELR->CSELR &= ~DMA_CSELR_C4S;
mbed_official 181:a4cbdfbbd2f4 299 }
mbed_official 181:a4cbdfbbd2f4 300 else if (hdma->Instance == DMA1_Channel5)
mbed_official 181:a4cbdfbbd2f4 301 {
mbed_official 181:a4cbdfbbd2f4 302 /*Reset DMA request*/
mbed_official 181:a4cbdfbbd2f4 303 DMA1_CSELR->CSELR &= ~DMA_CSELR_C5S;
mbed_official 181:a4cbdfbbd2f4 304 }
mbed_official 181:a4cbdfbbd2f4 305 else if (hdma->Instance == DMA1_Channel6)
mbed_official 181:a4cbdfbbd2f4 306 {
mbed_official 181:a4cbdfbbd2f4 307 /*Reset DMA request*/
mbed_official 181:a4cbdfbbd2f4 308 DMA1_CSELR->CSELR &= ~DMA_CSELR_C6S;
mbed_official 181:a4cbdfbbd2f4 309 }
mbed_official 181:a4cbdfbbd2f4 310 else if (hdma->Instance == DMA1_Channel7)
mbed_official 181:a4cbdfbbd2f4 311 {
mbed_official 181:a4cbdfbbd2f4 312 /*Reset DMA request*/
mbed_official 181:a4cbdfbbd2f4 313 DMA1_CSELR->CSELR &= ~DMA_CSELR_C7S;
mbed_official 181:a4cbdfbbd2f4 314 }
mbed_official 181:a4cbdfbbd2f4 315
mbed_official 181:a4cbdfbbd2f4 316 /* Initialise the error code */
mbed_official 181:a4cbdfbbd2f4 317 hdma->ErrorCode = HAL_DMA_ERROR_NONE;
mbed_official 181:a4cbdfbbd2f4 318
mbed_official 181:a4cbdfbbd2f4 319 /* Initialize the DMA state */
mbed_official 181:a4cbdfbbd2f4 320 hdma->State = HAL_DMA_STATE_RESET;
mbed_official 181:a4cbdfbbd2f4 321
mbed_official 181:a4cbdfbbd2f4 322 /* Release Lock */
mbed_official 181:a4cbdfbbd2f4 323 __HAL_UNLOCK(hdma);
mbed_official 181:a4cbdfbbd2f4 324
mbed_official 181:a4cbdfbbd2f4 325 return HAL_OK;
mbed_official 181:a4cbdfbbd2f4 326 }
mbed_official 181:a4cbdfbbd2f4 327
mbed_official 181:a4cbdfbbd2f4 328 /**
mbed_official 181:a4cbdfbbd2f4 329 * @}
mbed_official 181:a4cbdfbbd2f4 330 */
mbed_official 181:a4cbdfbbd2f4 331
mbed_official 181:a4cbdfbbd2f4 332 /** @defgroup DMA_Group2 I/O operation functions
mbed_official 181:a4cbdfbbd2f4 333 * @brief I/O operation functions
mbed_official 181:a4cbdfbbd2f4 334 *
mbed_official 181:a4cbdfbbd2f4 335 @verbatim
mbed_official 181:a4cbdfbbd2f4 336 ===============================================================================
mbed_official 181:a4cbdfbbd2f4 337 ##### IO operation functions #####
mbed_official 181:a4cbdfbbd2f4 338 ===============================================================================
mbed_official 181:a4cbdfbbd2f4 339 [..] This section provides functions allowing to:
mbed_official 181:a4cbdfbbd2f4 340 (+) Configure the source, destination address and data length and Start DMA transfer
mbed_official 181:a4cbdfbbd2f4 341 (+) Configure the source, destination address and data length and
mbed_official 181:a4cbdfbbd2f4 342 Start DMA transfer with interrupt
mbed_official 181:a4cbdfbbd2f4 343 (+) Abort DMA transfer
mbed_official 181:a4cbdfbbd2f4 344 (+) Poll for transfer complete
mbed_official 181:a4cbdfbbd2f4 345 (+) Handle DMA interrupt request
mbed_official 181:a4cbdfbbd2f4 346
mbed_official 181:a4cbdfbbd2f4 347 @endverbatim
mbed_official 181:a4cbdfbbd2f4 348 * @{
mbed_official 181:a4cbdfbbd2f4 349 */
mbed_official 181:a4cbdfbbd2f4 350
mbed_official 181:a4cbdfbbd2f4 351 /**
mbed_official 181:a4cbdfbbd2f4 352 * @brief Starts the DMA Transfer.
mbed_official 181:a4cbdfbbd2f4 353 * @param hdma : pointer to a DMA_HandleTypeDef structure that contains
mbed_official 181:a4cbdfbbd2f4 354 * the configuration information for the specified DMA Channel.
mbed_official 181:a4cbdfbbd2f4 355 * @param SrcAddress: The source memory Buffer address
mbed_official 181:a4cbdfbbd2f4 356 * @param DstAddress: The destination memory Buffer address
mbed_official 181:a4cbdfbbd2f4 357 * @param DataLength: The length of data to be transferred from source to destination
mbed_official 181:a4cbdfbbd2f4 358 * @retval HAL status
mbed_official 181:a4cbdfbbd2f4 359 */
mbed_official 181:a4cbdfbbd2f4 360 HAL_StatusTypeDef HAL_DMA_Start(DMA_HandleTypeDef *hdma, uint32_t SrcAddress, uint32_t DstAddress, uint32_t DataLength)
mbed_official 181:a4cbdfbbd2f4 361 {
mbed_official 181:a4cbdfbbd2f4 362 /* Process locked */
mbed_official 181:a4cbdfbbd2f4 363 __HAL_LOCK(hdma);
mbed_official 181:a4cbdfbbd2f4 364
mbed_official 181:a4cbdfbbd2f4 365 /* Change DMA peripheral state */
mbed_official 181:a4cbdfbbd2f4 366 hdma->State = HAL_DMA_STATE_BUSY;
mbed_official 181:a4cbdfbbd2f4 367
mbed_official 181:a4cbdfbbd2f4 368 /* Check the parameters */
mbed_official 181:a4cbdfbbd2f4 369 assert_param(IS_DMA_BUFFER_SIZE(DataLength));
mbed_official 181:a4cbdfbbd2f4 370
mbed_official 181:a4cbdfbbd2f4 371 /* Disable the peripheral */
mbed_official 181:a4cbdfbbd2f4 372 __HAL_DMA_DISABLE(hdma);
mbed_official 181:a4cbdfbbd2f4 373
mbed_official 181:a4cbdfbbd2f4 374 /* Configure the source, destination address and the data length */
mbed_official 181:a4cbdfbbd2f4 375 DMA_SetConfig(hdma, SrcAddress, DstAddress, DataLength);
mbed_official 181:a4cbdfbbd2f4 376
mbed_official 181:a4cbdfbbd2f4 377 /* Enable the Peripheral */
mbed_official 181:a4cbdfbbd2f4 378 __HAL_DMA_ENABLE(hdma);
mbed_official 181:a4cbdfbbd2f4 379
mbed_official 181:a4cbdfbbd2f4 380 return HAL_OK;
mbed_official 181:a4cbdfbbd2f4 381 }
mbed_official 181:a4cbdfbbd2f4 382
mbed_official 181:a4cbdfbbd2f4 383 /**
mbed_official 181:a4cbdfbbd2f4 384 * @brief Start the DMA Transfer with interrupt enabled.
mbed_official 181:a4cbdfbbd2f4 385 * @param hdma: pointer to a DMA_HandleTypeDef structure that contains
mbed_official 181:a4cbdfbbd2f4 386 * the configuration information for the specified DMA Channel.
mbed_official 181:a4cbdfbbd2f4 387 * @param SrcAddress: The source memory Buffer address
mbed_official 181:a4cbdfbbd2f4 388 * @param DstAddress: The destination memory Buffer address
mbed_official 181:a4cbdfbbd2f4 389 * @param DataLength: The length of data to be transferred from source to destination
mbed_official 181:a4cbdfbbd2f4 390 * @retval HAL status
mbed_official 181:a4cbdfbbd2f4 391 */
mbed_official 181:a4cbdfbbd2f4 392 HAL_StatusTypeDef HAL_DMA_Start_IT(DMA_HandleTypeDef *hdma, uint32_t SrcAddress, uint32_t DstAddress, uint32_t DataLength)
mbed_official 181:a4cbdfbbd2f4 393 {
mbed_official 181:a4cbdfbbd2f4 394 /* Process locked */
mbed_official 181:a4cbdfbbd2f4 395 __HAL_LOCK(hdma);
mbed_official 181:a4cbdfbbd2f4 396
mbed_official 181:a4cbdfbbd2f4 397 /* Change DMA peripheral state */
mbed_official 181:a4cbdfbbd2f4 398 hdma->State = HAL_DMA_STATE_BUSY;
mbed_official 181:a4cbdfbbd2f4 399
mbed_official 181:a4cbdfbbd2f4 400 /* Check the parameters */
mbed_official 181:a4cbdfbbd2f4 401 assert_param(IS_DMA_BUFFER_SIZE(DataLength));
mbed_official 181:a4cbdfbbd2f4 402
mbed_official 181:a4cbdfbbd2f4 403 /* Disable the peripheral */
mbed_official 181:a4cbdfbbd2f4 404 __HAL_DMA_DISABLE(hdma);
mbed_official 181:a4cbdfbbd2f4 405
mbed_official 181:a4cbdfbbd2f4 406 /* Configure the source, destination address and the data length */
mbed_official 181:a4cbdfbbd2f4 407 DMA_SetConfig(hdma, SrcAddress, DstAddress, DataLength);
mbed_official 181:a4cbdfbbd2f4 408
mbed_official 181:a4cbdfbbd2f4 409 /* Enable the transfer complete interrupt */
mbed_official 181:a4cbdfbbd2f4 410 __HAL_DMA_ENABLE_IT(hdma, DMA_IT_TC);
mbed_official 181:a4cbdfbbd2f4 411
mbed_official 181:a4cbdfbbd2f4 412 /* Enable the Half transfer complete interrupt */
mbed_official 181:a4cbdfbbd2f4 413 __HAL_DMA_ENABLE_IT(hdma, DMA_IT_HT);
mbed_official 181:a4cbdfbbd2f4 414
mbed_official 181:a4cbdfbbd2f4 415 /* Enable the transfer Error interrupt */
mbed_official 181:a4cbdfbbd2f4 416 __HAL_DMA_ENABLE_IT(hdma, DMA_IT_TE);
mbed_official 181:a4cbdfbbd2f4 417
mbed_official 181:a4cbdfbbd2f4 418 /* Enable the Peripheral */
mbed_official 181:a4cbdfbbd2f4 419 __HAL_DMA_ENABLE(hdma);
mbed_official 181:a4cbdfbbd2f4 420
mbed_official 181:a4cbdfbbd2f4 421 return HAL_OK;
mbed_official 181:a4cbdfbbd2f4 422 }
mbed_official 181:a4cbdfbbd2f4 423
mbed_official 181:a4cbdfbbd2f4 424 /**
mbed_official 181:a4cbdfbbd2f4 425 * @brief Aborts the DMA Transfer.
mbed_official 181:a4cbdfbbd2f4 426 * @param hdma : pointer to a DMA_HandleTypeDef structure that contains
mbed_official 181:a4cbdfbbd2f4 427 * the configuration information for the specified DMA Channel.
mbed_official 181:a4cbdfbbd2f4 428 * @param Timeout: Timeout duration
mbed_official 181:a4cbdfbbd2f4 429 * @retval HAL status
mbed_official 181:a4cbdfbbd2f4 430 */
mbed_official 181:a4cbdfbbd2f4 431 HAL_StatusTypeDef HAL_DMA_Abort(DMA_HandleTypeDef *hdma)
mbed_official 181:a4cbdfbbd2f4 432 {
mbed_official 181:a4cbdfbbd2f4 433 uint32_t tickstart = 0;
mbed_official 181:a4cbdfbbd2f4 434
mbed_official 181:a4cbdfbbd2f4 435 /* Disable the channel */
mbed_official 181:a4cbdfbbd2f4 436 __HAL_DMA_DISABLE(hdma);
mbed_official 181:a4cbdfbbd2f4 437
mbed_official 181:a4cbdfbbd2f4 438 /* Get timeout */
mbed_official 181:a4cbdfbbd2f4 439 tickstart = HAL_GetTick();
mbed_official 181:a4cbdfbbd2f4 440
mbed_official 181:a4cbdfbbd2f4 441 /* Check if the DMA Channel is effectively disabled */
mbed_official 181:a4cbdfbbd2f4 442 while((hdma->Instance->CCR & DMA_CCR_EN) != 0)
mbed_official 181:a4cbdfbbd2f4 443 {
mbed_official 181:a4cbdfbbd2f4 444 /* Check for the Timeout */
mbed_official 181:a4cbdfbbd2f4 445 if((int32_t) (HAL_GetTick() - tickstart ) > HAL_TIMEOUT_DMA_ABORT)
mbed_official 181:a4cbdfbbd2f4 446 {
mbed_official 181:a4cbdfbbd2f4 447 /* Update error code */
mbed_official 181:a4cbdfbbd2f4 448 hdma->ErrorCode |= HAL_DMA_ERROR_TIMEOUT;
mbed_official 181:a4cbdfbbd2f4 449
mbed_official 181:a4cbdfbbd2f4 450 /* Process Unlocked */
mbed_official 181:a4cbdfbbd2f4 451 __HAL_UNLOCK(hdma);
mbed_official 181:a4cbdfbbd2f4 452
mbed_official 181:a4cbdfbbd2f4 453 /* Change the DMA state */
mbed_official 181:a4cbdfbbd2f4 454 hdma->State = HAL_DMA_STATE_TIMEOUT;
mbed_official 181:a4cbdfbbd2f4 455
mbed_official 181:a4cbdfbbd2f4 456 return HAL_TIMEOUT;
mbed_official 181:a4cbdfbbd2f4 457 }
mbed_official 181:a4cbdfbbd2f4 458 }
mbed_official 181:a4cbdfbbd2f4 459 /* Process Unlocked */
mbed_official 181:a4cbdfbbd2f4 460 __HAL_UNLOCK(hdma);
mbed_official 181:a4cbdfbbd2f4 461
mbed_official 181:a4cbdfbbd2f4 462 /* Change the DMA state*/
mbed_official 181:a4cbdfbbd2f4 463 hdma->State = HAL_DMA_STATE_READY;
mbed_official 181:a4cbdfbbd2f4 464
mbed_official 181:a4cbdfbbd2f4 465 return HAL_OK;
mbed_official 181:a4cbdfbbd2f4 466 }
mbed_official 181:a4cbdfbbd2f4 467
mbed_official 181:a4cbdfbbd2f4 468 /**
mbed_official 181:a4cbdfbbd2f4 469 * @brief Polling for transfer complete.
mbed_official 181:a4cbdfbbd2f4 470 * @param hdma: pointer to a DMA_HandleTypeDef structure that contains
mbed_official 181:a4cbdfbbd2f4 471 * the configuration information for the specified DMA Channel.
mbed_official 181:a4cbdfbbd2f4 472 * @param CompleteLevel: Specifies the DMA level complete.
mbed_official 181:a4cbdfbbd2f4 473 * @param Timeout: Timeout duration.
mbed_official 181:a4cbdfbbd2f4 474 * @retval HAL status
mbed_official 181:a4cbdfbbd2f4 475 */
mbed_official 181:a4cbdfbbd2f4 476 HAL_StatusTypeDef HAL_DMA_PollForTransfer(DMA_HandleTypeDef *hdma, uint32_t CompleteLevel, uint32_t Timeout)
mbed_official 181:a4cbdfbbd2f4 477 {
mbed_official 181:a4cbdfbbd2f4 478 uint32_t temp;
mbed_official 181:a4cbdfbbd2f4 479 uint32_t tickstart = 0;
mbed_official 181:a4cbdfbbd2f4 480
mbed_official 181:a4cbdfbbd2f4 481 /* Get the level transfer complete flag */
mbed_official 181:a4cbdfbbd2f4 482 if(CompleteLevel == HAL_DMA_FULL_TRANSFER)
mbed_official 181:a4cbdfbbd2f4 483 {
mbed_official 181:a4cbdfbbd2f4 484 /* Transfer Complete flag */
mbed_official 181:a4cbdfbbd2f4 485 temp = __HAL_DMA_GET_TC_FLAG_INDEX(hdma);
mbed_official 181:a4cbdfbbd2f4 486 }
mbed_official 181:a4cbdfbbd2f4 487 else
mbed_official 181:a4cbdfbbd2f4 488 {
mbed_official 181:a4cbdfbbd2f4 489 /* Half Transfer Complete flag */
mbed_official 181:a4cbdfbbd2f4 490 temp = __HAL_DMA_GET_HT_FLAG_INDEX(hdma);
mbed_official 181:a4cbdfbbd2f4 491 }
mbed_official 181:a4cbdfbbd2f4 492
mbed_official 181:a4cbdfbbd2f4 493 /* Get timeout */
mbed_official 181:a4cbdfbbd2f4 494 tickstart = HAL_GetTick();
mbed_official 181:a4cbdfbbd2f4 495
mbed_official 181:a4cbdfbbd2f4 496 while(__HAL_DMA_GET_FLAG(hdma, temp) == RESET)
mbed_official 181:a4cbdfbbd2f4 497 {
mbed_official 181:a4cbdfbbd2f4 498 if((__HAL_DMA_GET_FLAG(hdma, __HAL_DMA_GET_TE_FLAG_INDEX(hdma)) != RESET))
mbed_official 181:a4cbdfbbd2f4 499 {
mbed_official 181:a4cbdfbbd2f4 500 /* Clear the transfer error flags */
mbed_official 181:a4cbdfbbd2f4 501 __HAL_DMA_CLEAR_FLAG(hdma, __HAL_DMA_GET_TE_FLAG_INDEX(hdma));
mbed_official 181:a4cbdfbbd2f4 502
mbed_official 181:a4cbdfbbd2f4 503 /* Change the DMA state */
mbed_official 181:a4cbdfbbd2f4 504 hdma->State= HAL_DMA_STATE_ERROR;
mbed_official 181:a4cbdfbbd2f4 505
mbed_official 181:a4cbdfbbd2f4 506 /* Process Unlocked */
mbed_official 181:a4cbdfbbd2f4 507 __HAL_UNLOCK(hdma);
mbed_official 181:a4cbdfbbd2f4 508
mbed_official 181:a4cbdfbbd2f4 509 return HAL_ERROR;
mbed_official 181:a4cbdfbbd2f4 510 }
mbed_official 181:a4cbdfbbd2f4 511 /* Check for the Timeout */
mbed_official 181:a4cbdfbbd2f4 512 if(Timeout != HAL_MAX_DELAY)
mbed_official 181:a4cbdfbbd2f4 513 {
mbed_official 181:a4cbdfbbd2f4 514 if((int32_t) (HAL_GetTick() - tickstart ) > Timeout)
mbed_official 181:a4cbdfbbd2f4 515 {
mbed_official 181:a4cbdfbbd2f4 516 /* Update error code */
mbed_official 181:a4cbdfbbd2f4 517 hdma->ErrorCode |= HAL_DMA_ERROR_TIMEOUT;
mbed_official 181:a4cbdfbbd2f4 518
mbed_official 181:a4cbdfbbd2f4 519 /* Process Unlocked */
mbed_official 181:a4cbdfbbd2f4 520 __HAL_UNLOCK(hdma);
mbed_official 181:a4cbdfbbd2f4 521
mbed_official 181:a4cbdfbbd2f4 522 /* Change the DMA state */
mbed_official 181:a4cbdfbbd2f4 523 hdma->State = HAL_DMA_STATE_TIMEOUT;
mbed_official 181:a4cbdfbbd2f4 524
mbed_official 181:a4cbdfbbd2f4 525 return HAL_TIMEOUT;
mbed_official 181:a4cbdfbbd2f4 526 }
mbed_official 181:a4cbdfbbd2f4 527 }
mbed_official 181:a4cbdfbbd2f4 528 }
mbed_official 181:a4cbdfbbd2f4 529 /* Clear the half transfer complete flag */
mbed_official 181:a4cbdfbbd2f4 530 __HAL_DMA_CLEAR_FLAG(hdma, __HAL_DMA_GET_HT_FLAG_INDEX(hdma));
mbed_official 181:a4cbdfbbd2f4 531
mbed_official 181:a4cbdfbbd2f4 532 /* Change DMA peripheral state */
mbed_official 181:a4cbdfbbd2f4 533 hdma->State = HAL_DMA_STATE_READY_HALF;
mbed_official 181:a4cbdfbbd2f4 534
mbed_official 181:a4cbdfbbd2f4 535 if(CompleteLevel == HAL_DMA_FULL_TRANSFER)
mbed_official 181:a4cbdfbbd2f4 536 {
mbed_official 181:a4cbdfbbd2f4 537 /* Clear the transfer complete flag */
mbed_official 181:a4cbdfbbd2f4 538 __HAL_DMA_CLEAR_FLAG(hdma, __HAL_DMA_GET_TC_FLAG_INDEX(hdma));
mbed_official 181:a4cbdfbbd2f4 539
mbed_official 181:a4cbdfbbd2f4 540 /* The selected Channelx EN bit is cleared (DMA is disabled and
mbed_official 181:a4cbdfbbd2f4 541 all transfers are complete) */
mbed_official 181:a4cbdfbbd2f4 542 hdma->State = HAL_DMA_STATE_READY;
mbed_official 181:a4cbdfbbd2f4 543
mbed_official 181:a4cbdfbbd2f4 544 /* Process unlocked */
mbed_official 181:a4cbdfbbd2f4 545 __HAL_UNLOCK(hdma);
mbed_official 181:a4cbdfbbd2f4 546 }
mbed_official 181:a4cbdfbbd2f4 547 else
mbed_official 181:a4cbdfbbd2f4 548 {
mbed_official 181:a4cbdfbbd2f4 549 /* Clear the half transfer complete flag */
mbed_official 181:a4cbdfbbd2f4 550 __HAL_DMA_CLEAR_FLAG(hdma, __HAL_DMA_GET_HT_FLAG_INDEX(hdma));
mbed_official 181:a4cbdfbbd2f4 551
mbed_official 181:a4cbdfbbd2f4 552 /* The selected Channelx EN bit is cleared (DMA is disabled and
mbed_official 181:a4cbdfbbd2f4 553 all transfers are complete) */
mbed_official 181:a4cbdfbbd2f4 554 hdma->State = HAL_DMA_STATE_READY_HALF;
mbed_official 181:a4cbdfbbd2f4 555 }
mbed_official 181:a4cbdfbbd2f4 556
mbed_official 181:a4cbdfbbd2f4 557 return HAL_OK;
mbed_official 181:a4cbdfbbd2f4 558 }
mbed_official 181:a4cbdfbbd2f4 559 /**
mbed_official 181:a4cbdfbbd2f4 560 * @brief Handles DMA interrupt request.
mbed_official 181:a4cbdfbbd2f4 561 * @param hdma: pointer to a DMA_HandleTypeDef structure that contains
mbed_official 181:a4cbdfbbd2f4 562 * the configuration information for the specified DMA Channel.
mbed_official 181:a4cbdfbbd2f4 563 * @retval None
mbed_official 181:a4cbdfbbd2f4 564 */
mbed_official 181:a4cbdfbbd2f4 565 void HAL_DMA_IRQHandler(DMA_HandleTypeDef *hdma)
mbed_official 181:a4cbdfbbd2f4 566 {
mbed_official 181:a4cbdfbbd2f4 567 /* Transfer Error Interrupt management ***************************************/
mbed_official 181:a4cbdfbbd2f4 568 if(__HAL_DMA_GET_FLAG(hdma, __HAL_DMA_GET_TE_FLAG_INDEX(hdma)) != RESET)
mbed_official 181:a4cbdfbbd2f4 569 {
mbed_official 181:a4cbdfbbd2f4 570 if(__HAL_DMA_GET_IT_SOURCE(hdma, DMA_IT_TE) != RESET)
mbed_official 181:a4cbdfbbd2f4 571 {
mbed_official 181:a4cbdfbbd2f4 572 /* Disable the transfer error interrupt */
mbed_official 181:a4cbdfbbd2f4 573 __HAL_DMA_DISABLE_IT(hdma, DMA_IT_TE);
mbed_official 181:a4cbdfbbd2f4 574
mbed_official 181:a4cbdfbbd2f4 575 /* Clear the transfer error flag */
mbed_official 181:a4cbdfbbd2f4 576 __HAL_DMA_CLEAR_FLAG(hdma, __HAL_DMA_GET_TE_FLAG_INDEX(hdma));
mbed_official 181:a4cbdfbbd2f4 577
mbed_official 181:a4cbdfbbd2f4 578 /* Update error code */
mbed_official 181:a4cbdfbbd2f4 579 hdma->ErrorCode |= HAL_DMA_ERROR_TE;
mbed_official 181:a4cbdfbbd2f4 580
mbed_official 181:a4cbdfbbd2f4 581 /* Change the DMA state */
mbed_official 181:a4cbdfbbd2f4 582 hdma->State = HAL_DMA_STATE_ERROR;
mbed_official 181:a4cbdfbbd2f4 583
mbed_official 181:a4cbdfbbd2f4 584 /* Process Unlocked */
mbed_official 181:a4cbdfbbd2f4 585 __HAL_UNLOCK(hdma);
mbed_official 181:a4cbdfbbd2f4 586
mbed_official 181:a4cbdfbbd2f4 587 if (hdma->XferErrorCallback != NULL)
mbed_official 181:a4cbdfbbd2f4 588 {
mbed_official 181:a4cbdfbbd2f4 589 /* Transfer error callback */
mbed_official 181:a4cbdfbbd2f4 590 hdma->XferErrorCallback(hdma);
mbed_official 181:a4cbdfbbd2f4 591 }
mbed_official 181:a4cbdfbbd2f4 592 }
mbed_official 181:a4cbdfbbd2f4 593 }
mbed_official 181:a4cbdfbbd2f4 594
mbed_official 181:a4cbdfbbd2f4 595 /* Half Transfer Complete Interrupt management ******************************/
mbed_official 181:a4cbdfbbd2f4 596 if(__HAL_DMA_GET_FLAG(hdma, __HAL_DMA_GET_HT_FLAG_INDEX(hdma)) != RESET)
mbed_official 181:a4cbdfbbd2f4 597 {
mbed_official 181:a4cbdfbbd2f4 598 if(__HAL_DMA_GET_IT_SOURCE(hdma, DMA_IT_HT) != RESET)
mbed_official 181:a4cbdfbbd2f4 599 {
mbed_official 181:a4cbdfbbd2f4 600 /* Disable the half transfer interrupt if the DMA mode is not CIRCULAR */
mbed_official 181:a4cbdfbbd2f4 601 if((hdma->Instance->CCR & DMA_CCR_CIRC) == 0)
mbed_official 181:a4cbdfbbd2f4 602 {
mbed_official 181:a4cbdfbbd2f4 603 /* Disable the half transfer interrupt */
mbed_official 181:a4cbdfbbd2f4 604 __HAL_DMA_DISABLE_IT(hdma, DMA_IT_HT);
mbed_official 181:a4cbdfbbd2f4 605 }
mbed_official 181:a4cbdfbbd2f4 606 /* Clear the half transfer complete flag */
mbed_official 181:a4cbdfbbd2f4 607 __HAL_DMA_CLEAR_FLAG(hdma, __HAL_DMA_GET_HT_FLAG_INDEX(hdma));
mbed_official 181:a4cbdfbbd2f4 608
mbed_official 181:a4cbdfbbd2f4 609 /* Change DMA peripheral state */
mbed_official 181:a4cbdfbbd2f4 610 hdma->State = HAL_DMA_STATE_READY_HALF;
mbed_official 181:a4cbdfbbd2f4 611
mbed_official 181:a4cbdfbbd2f4 612 if(hdma->XferHalfCpltCallback != NULL)
mbed_official 181:a4cbdfbbd2f4 613 {
mbed_official 181:a4cbdfbbd2f4 614 /* Half transfer callback */
mbed_official 181:a4cbdfbbd2f4 615 hdma->XferHalfCpltCallback(hdma);
mbed_official 181:a4cbdfbbd2f4 616 }
mbed_official 181:a4cbdfbbd2f4 617 }
mbed_official 181:a4cbdfbbd2f4 618 }
mbed_official 181:a4cbdfbbd2f4 619
mbed_official 181:a4cbdfbbd2f4 620 /* Transfer Complete Interrupt management ***********************************/
mbed_official 181:a4cbdfbbd2f4 621 if(__HAL_DMA_GET_FLAG(hdma, __HAL_DMA_GET_TC_FLAG_INDEX(hdma)) != RESET)
mbed_official 181:a4cbdfbbd2f4 622 {
mbed_official 181:a4cbdfbbd2f4 623 if(__HAL_DMA_GET_IT_SOURCE(hdma, DMA_IT_TC) != RESET)
mbed_official 181:a4cbdfbbd2f4 624 {
mbed_official 181:a4cbdfbbd2f4 625 if((hdma->Instance->CCR & DMA_CCR_CIRC) == 0)
mbed_official 181:a4cbdfbbd2f4 626 {
mbed_official 181:a4cbdfbbd2f4 627 /* Disable the transfer complete interrupt */
mbed_official 181:a4cbdfbbd2f4 628 __HAL_DMA_DISABLE_IT(hdma, DMA_IT_TC);
mbed_official 181:a4cbdfbbd2f4 629 }
mbed_official 181:a4cbdfbbd2f4 630 /* Clear the transfer complete flag */
mbed_official 181:a4cbdfbbd2f4 631 __HAL_DMA_CLEAR_FLAG(hdma, __HAL_DMA_GET_TC_FLAG_INDEX(hdma));
mbed_official 181:a4cbdfbbd2f4 632
mbed_official 181:a4cbdfbbd2f4 633 /* Update error code */
mbed_official 181:a4cbdfbbd2f4 634 hdma->ErrorCode |= HAL_DMA_ERROR_NONE;
mbed_official 181:a4cbdfbbd2f4 635
mbed_official 181:a4cbdfbbd2f4 636 /* Change the DMA state */
mbed_official 181:a4cbdfbbd2f4 637 hdma->State = HAL_DMA_STATE_READY;
mbed_official 181:a4cbdfbbd2f4 638
mbed_official 181:a4cbdfbbd2f4 639 /* Process Unlocked */
mbed_official 181:a4cbdfbbd2f4 640 __HAL_UNLOCK(hdma);
mbed_official 181:a4cbdfbbd2f4 641
mbed_official 181:a4cbdfbbd2f4 642 if(hdma->XferCpltCallback != NULL)
mbed_official 181:a4cbdfbbd2f4 643 {
mbed_official 181:a4cbdfbbd2f4 644 /* Transfer complete callback */
mbed_official 181:a4cbdfbbd2f4 645 hdma->XferCpltCallback(hdma);
mbed_official 181:a4cbdfbbd2f4 646 }
mbed_official 181:a4cbdfbbd2f4 647 }
mbed_official 181:a4cbdfbbd2f4 648 }
mbed_official 181:a4cbdfbbd2f4 649 }
mbed_official 181:a4cbdfbbd2f4 650
mbed_official 181:a4cbdfbbd2f4 651 /**
mbed_official 181:a4cbdfbbd2f4 652 * @}
mbed_official 181:a4cbdfbbd2f4 653 */
mbed_official 181:a4cbdfbbd2f4 654
mbed_official 181:a4cbdfbbd2f4 655 /** @defgroup DMA_Group3 Peripheral State functions
mbed_official 181:a4cbdfbbd2f4 656 * @brief Peripheral State functions
mbed_official 181:a4cbdfbbd2f4 657 *
mbed_official 181:a4cbdfbbd2f4 658 @verbatim
mbed_official 181:a4cbdfbbd2f4 659 ===============================================================================
mbed_official 181:a4cbdfbbd2f4 660 ##### Peripheral State functions #####
mbed_official 181:a4cbdfbbd2f4 661 ===============================================================================
mbed_official 181:a4cbdfbbd2f4 662 [..]
mbed_official 181:a4cbdfbbd2f4 663 This subsection provides functions allowing to
mbed_official 181:a4cbdfbbd2f4 664 (+) Check the DMA state
mbed_official 181:a4cbdfbbd2f4 665 (+) Get error code
mbed_official 181:a4cbdfbbd2f4 666
mbed_official 181:a4cbdfbbd2f4 667 @endverbatim
mbed_official 181:a4cbdfbbd2f4 668 * @{
mbed_official 181:a4cbdfbbd2f4 669 */
mbed_official 181:a4cbdfbbd2f4 670
mbed_official 181:a4cbdfbbd2f4 671 /**
mbed_official 181:a4cbdfbbd2f4 672 * @brief Returns the DMA state.
mbed_official 181:a4cbdfbbd2f4 673 * @param hdma: pointer to a DMA_HandleTypeDef structure that contains
mbed_official 181:a4cbdfbbd2f4 674 * the configuration information for the specified DMA Channel.
mbed_official 181:a4cbdfbbd2f4 675 * @retval HAL state
mbed_official 181:a4cbdfbbd2f4 676 */
mbed_official 181:a4cbdfbbd2f4 677 HAL_DMA_StateTypeDef HAL_DMA_GetState(DMA_HandleTypeDef *hdma)
mbed_official 181:a4cbdfbbd2f4 678 {
mbed_official 181:a4cbdfbbd2f4 679 return hdma->State;
mbed_official 181:a4cbdfbbd2f4 680 }
mbed_official 181:a4cbdfbbd2f4 681
mbed_official 181:a4cbdfbbd2f4 682 /**
mbed_official 181:a4cbdfbbd2f4 683 * @brief Return the DMA error code
mbed_official 181:a4cbdfbbd2f4 684 * @param hdma : pointer to a DMA_HandleTypeDef structure that contains
mbed_official 181:a4cbdfbbd2f4 685 * the configuration information for the specified DMA Channel.
mbed_official 181:a4cbdfbbd2f4 686 * @retval DMA Error Code
mbed_official 181:a4cbdfbbd2f4 687 */
mbed_official 181:a4cbdfbbd2f4 688 uint32_t HAL_DMA_GetError(DMA_HandleTypeDef *hdma)
mbed_official 181:a4cbdfbbd2f4 689 {
mbed_official 181:a4cbdfbbd2f4 690 return hdma->ErrorCode;
mbed_official 181:a4cbdfbbd2f4 691 }
mbed_official 181:a4cbdfbbd2f4 692
mbed_official 181:a4cbdfbbd2f4 693 /**
mbed_official 181:a4cbdfbbd2f4 694 * @}
mbed_official 181:a4cbdfbbd2f4 695 */
mbed_official 181:a4cbdfbbd2f4 696
mbed_official 181:a4cbdfbbd2f4 697 /** @defgroup DMA_Group4 Extanded feature functions
mbed_official 181:a4cbdfbbd2f4 698 * @brief Extanded feature functions
mbed_official 181:a4cbdfbbd2f4 699 *
mbed_official 181:a4cbdfbbd2f4 700 @verbatim
mbed_official 181:a4cbdfbbd2f4 701 ===============================================================================
mbed_official 181:a4cbdfbbd2f4 702 ##### Extanded feature functions #####
mbed_official 181:a4cbdfbbd2f4 703 ===============================================================================
mbed_official 181:a4cbdfbbd2f4 704 [..]
mbed_official 181:a4cbdfbbd2f4 705 This subsection provides functions allowing to
mbed_official 181:a4cbdfbbd2f4 706 (+) Configure the source, destination address and data length
mbed_official 181:a4cbdfbbd2f4 707
mbed_official 181:a4cbdfbbd2f4 708 @endverbatim
mbed_official 181:a4cbdfbbd2f4 709 * @{
mbed_official 181:a4cbdfbbd2f4 710 */
mbed_official 181:a4cbdfbbd2f4 711 /**
mbed_official 181:a4cbdfbbd2f4 712 * @brief Sets the DMA Transfer parameter.
mbed_official 181:a4cbdfbbd2f4 713 * @param hdma: pointer to a DMA_HandleTypeDef structure that contains
mbed_official 181:a4cbdfbbd2f4 714 * the configuration information for the specified DMA Channel.
mbed_official 181:a4cbdfbbd2f4 715 * @param SrcAddress: The source memory Buffer address
mbed_official 181:a4cbdfbbd2f4 716 * @param DstAddress: The destination memory Buffer address
mbed_official 181:a4cbdfbbd2f4 717 * @param DataLength: The length of data to be transferred from source to destination
mbed_official 181:a4cbdfbbd2f4 718 * @retval HAL status
mbed_official 181:a4cbdfbbd2f4 719 */
mbed_official 181:a4cbdfbbd2f4 720 static void DMA_SetConfig(DMA_HandleTypeDef *hdma, uint32_t SrcAddress, uint32_t DstAddress, uint32_t DataLength)
mbed_official 181:a4cbdfbbd2f4 721 {
mbed_official 181:a4cbdfbbd2f4 722 /* Configure DMA Channel data length */
mbed_official 181:a4cbdfbbd2f4 723 hdma->Instance->CNDTR = DataLength;
mbed_official 181:a4cbdfbbd2f4 724
mbed_official 181:a4cbdfbbd2f4 725 /* Peripheral to Memory */
mbed_official 181:a4cbdfbbd2f4 726 if((hdma->Init.Direction) == DMA_MEMORY_TO_PERIPH)
mbed_official 181:a4cbdfbbd2f4 727 {
mbed_official 181:a4cbdfbbd2f4 728 /* Configure DMA Channel destination address */
mbed_official 181:a4cbdfbbd2f4 729 hdma->Instance->CPAR = DstAddress;
mbed_official 181:a4cbdfbbd2f4 730
mbed_official 181:a4cbdfbbd2f4 731 /* Configure DMA Channel source address */
mbed_official 181:a4cbdfbbd2f4 732 hdma->Instance->CMAR = SrcAddress;
mbed_official 181:a4cbdfbbd2f4 733 }
mbed_official 181:a4cbdfbbd2f4 734 /* Memory to Peripheral */
mbed_official 181:a4cbdfbbd2f4 735 else
mbed_official 181:a4cbdfbbd2f4 736 {
mbed_official 181:a4cbdfbbd2f4 737 /* Configure DMA Channel source address */
mbed_official 181:a4cbdfbbd2f4 738 hdma->Instance->CPAR = SrcAddress;
mbed_official 181:a4cbdfbbd2f4 739
mbed_official 181:a4cbdfbbd2f4 740 /* Configure DMA Channel destination address */
mbed_official 181:a4cbdfbbd2f4 741 hdma->Instance->CMAR = DstAddress;
mbed_official 181:a4cbdfbbd2f4 742 }
mbed_official 181:a4cbdfbbd2f4 743 }
mbed_official 181:a4cbdfbbd2f4 744
mbed_official 181:a4cbdfbbd2f4 745 /**
mbed_official 181:a4cbdfbbd2f4 746 * @}
mbed_official 181:a4cbdfbbd2f4 747 */
mbed_official 181:a4cbdfbbd2f4 748
mbed_official 181:a4cbdfbbd2f4 749 /**
mbed_official 181:a4cbdfbbd2f4 750 * @}
mbed_official 181:a4cbdfbbd2f4 751 */
mbed_official 181:a4cbdfbbd2f4 752
mbed_official 181:a4cbdfbbd2f4 753 #endif /* HAL_DMA_MODULE_ENABLED */
mbed_official 181:a4cbdfbbd2f4 754 /**
mbed_official 181:a4cbdfbbd2f4 755 * @}
mbed_official 181:a4cbdfbbd2f4 756 */
mbed_official 181:a4cbdfbbd2f4 757
mbed_official 181:a4cbdfbbd2f4 758 /**
mbed_official 181:a4cbdfbbd2f4 759 * @}
mbed_official 181:a4cbdfbbd2f4 760 */
mbed_official 181:a4cbdfbbd2f4 761
mbed_official 181:a4cbdfbbd2f4 762 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/