mbed library sources
Dependents: frdm_kl05z_gpio_test
Fork of mbed-src by
targets/cmsis/TARGET_STM/TARGET_NUCLEO_F411RE/stm32f4xx_ll_fsmc.c@323:9e901b0a5aa1, 2014-09-13 (annotated)
- Committer:
- shaoziyang
- Date:
- Sat Sep 13 14:25:46 2014 +0000
- Revision:
- 323:9e901b0a5aa1
- Parent:
- 235:685d5f11838f
test with CLOCK_SETUP = 0
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
mbed_official | 235:685d5f11838f | 1 | /** |
mbed_official | 235:685d5f11838f | 2 | ****************************************************************************** |
mbed_official | 235:685d5f11838f | 3 | * @file stm32f4xx_ll_fsmc.c |
mbed_official | 235:685d5f11838f | 4 | * @author MCD Application Team |
mbed_official | 235:685d5f11838f | 5 | * @version V1.1.0 |
mbed_official | 235:685d5f11838f | 6 | * @date 19-June-2014 |
mbed_official | 235:685d5f11838f | 7 | * @brief FSMC Low Layer HAL module driver. |
mbed_official | 235:685d5f11838f | 8 | * |
mbed_official | 235:685d5f11838f | 9 | * This file provides firmware functions to manage the following |
mbed_official | 235:685d5f11838f | 10 | * functionalities of the Flexible Static Memory Controller (FSMC) peripheral memories: |
mbed_official | 235:685d5f11838f | 11 | * + Initialization/de-initialization functions |
mbed_official | 235:685d5f11838f | 12 | * + Peripheral Control functions |
mbed_official | 235:685d5f11838f | 13 | * + Peripheral State functions |
mbed_official | 235:685d5f11838f | 14 | * |
mbed_official | 235:685d5f11838f | 15 | @verbatim |
mbed_official | 235:685d5f11838f | 16 | ============================================================================== |
mbed_official | 235:685d5f11838f | 17 | ##### FSMC peripheral features ##### |
mbed_official | 235:685d5f11838f | 18 | ============================================================================== |
mbed_official | 235:685d5f11838f | 19 | [..] The Flexible static memory controller (FSMC) includes two memory controllers: |
mbed_official | 235:685d5f11838f | 20 | (+) The NOR/PSRAM memory controller |
mbed_official | 235:685d5f11838f | 21 | (+) The NAND/PC Card memory controller |
mbed_official | 235:685d5f11838f | 22 | |
mbed_official | 235:685d5f11838f | 23 | [..] The FSMC functional block makes the interface with synchronous and asynchronous static |
mbed_official | 235:685d5f11838f | 24 | memories, SDRAM memories, and 16-bit PC memory cards. Its main purposes are: |
mbed_official | 235:685d5f11838f | 25 | (+) to translate AHB transactions into the appropriate external device protocol. |
mbed_official | 235:685d5f11838f | 26 | (+) to meet the access time requirements of the external memory devices. |
mbed_official | 235:685d5f11838f | 27 | |
mbed_official | 235:685d5f11838f | 28 | [..] All external memories share the addresses, data and control signals with the controller. |
mbed_official | 235:685d5f11838f | 29 | Each external device is accessed by means of a unique Chip Select. The FSMC performs |
mbed_official | 235:685d5f11838f | 30 | only one access at a time to an external device. |
mbed_official | 235:685d5f11838f | 31 | The main features of the FSMC controller are the following: |
mbed_official | 235:685d5f11838f | 32 | (+) Interface with static-memory mapped devices including: |
mbed_official | 235:685d5f11838f | 33 | (++) Static random access memory (SRAM). |
mbed_official | 235:685d5f11838f | 34 | (++) Read-only memory (ROM). |
mbed_official | 235:685d5f11838f | 35 | (++) NOR Flash memory/OneNAND Flash memory. |
mbed_official | 235:685d5f11838f | 36 | (++) PSRAM (4 memory banks). |
mbed_official | 235:685d5f11838f | 37 | (++) 16-bit PC Card compatible devices. |
mbed_official | 235:685d5f11838f | 38 | (++) Two banks of NAND Flash memory with ECC hardware to check up to 8 Kbytes of |
mbed_official | 235:685d5f11838f | 39 | data. |
mbed_official | 235:685d5f11838f | 40 | (+) Independent Chip Select control for each memory bank. |
mbed_official | 235:685d5f11838f | 41 | (+) Independent configuration for each memory bank. |
mbed_official | 235:685d5f11838f | 42 | |
mbed_official | 235:685d5f11838f | 43 | @endverbatim |
mbed_official | 235:685d5f11838f | 44 | ****************************************************************************** |
mbed_official | 235:685d5f11838f | 45 | * @attention |
mbed_official | 235:685d5f11838f | 46 | * |
mbed_official | 235:685d5f11838f | 47 | * <h2><center>© COPYRIGHT(c) 2014 STMicroelectronics</center></h2> |
mbed_official | 235:685d5f11838f | 48 | * |
mbed_official | 235:685d5f11838f | 49 | * Redistribution and use in source and binary forms, with or without modification, |
mbed_official | 235:685d5f11838f | 50 | * are permitted provided that the following conditions are met: |
mbed_official | 235:685d5f11838f | 51 | * 1. Redistributions of source code must retain the above copyright notice, |
mbed_official | 235:685d5f11838f | 52 | * this list of conditions and the following disclaimer. |
mbed_official | 235:685d5f11838f | 53 | * 2. Redistributions in binary form must reproduce the above copyright notice, |
mbed_official | 235:685d5f11838f | 54 | * this list of conditions and the following disclaimer in the documentation |
mbed_official | 235:685d5f11838f | 55 | * and/or other materials provided with the distribution. |
mbed_official | 235:685d5f11838f | 56 | * 3. Neither the name of STMicroelectronics nor the names of its contributors |
mbed_official | 235:685d5f11838f | 57 | * may be used to endorse or promote products derived from this software |
mbed_official | 235:685d5f11838f | 58 | * without specific prior written permission. |
mbed_official | 235:685d5f11838f | 59 | * |
mbed_official | 235:685d5f11838f | 60 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
mbed_official | 235:685d5f11838f | 61 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
mbed_official | 235:685d5f11838f | 62 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
mbed_official | 235:685d5f11838f | 63 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE |
mbed_official | 235:685d5f11838f | 64 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
mbed_official | 235:685d5f11838f | 65 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR |
mbed_official | 235:685d5f11838f | 66 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
mbed_official | 235:685d5f11838f | 67 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, |
mbed_official | 235:685d5f11838f | 68 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
mbed_official | 235:685d5f11838f | 69 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
mbed_official | 235:685d5f11838f | 70 | * |
mbed_official | 235:685d5f11838f | 71 | ****************************************************************************** |
mbed_official | 235:685d5f11838f | 72 | */ |
mbed_official | 235:685d5f11838f | 73 | |
mbed_official | 235:685d5f11838f | 74 | /* Includes ------------------------------------------------------------------*/ |
mbed_official | 235:685d5f11838f | 75 | #include "stm32f4xx_hal.h" |
mbed_official | 235:685d5f11838f | 76 | |
mbed_official | 235:685d5f11838f | 77 | /** @addtogroup STM32F4xx_HAL_Driver |
mbed_official | 235:685d5f11838f | 78 | * @{ |
mbed_official | 235:685d5f11838f | 79 | */ |
mbed_official | 235:685d5f11838f | 80 | |
mbed_official | 235:685d5f11838f | 81 | /** @defgroup FSMC |
mbed_official | 235:685d5f11838f | 82 | * @brief FSMC driver modules |
mbed_official | 235:685d5f11838f | 83 | * @{ |
mbed_official | 235:685d5f11838f | 84 | */ |
mbed_official | 235:685d5f11838f | 85 | |
mbed_official | 235:685d5f11838f | 86 | #if defined (HAL_SRAM_MODULE_ENABLED) || defined(HAL_NOR_MODULE_ENABLED) || defined(HAL_NAND_MODULE_ENABLED) || defined(HAL_PCCARD_MODULE_ENABLED) |
mbed_official | 235:685d5f11838f | 87 | |
mbed_official | 235:685d5f11838f | 88 | #if defined(STM32F405xx) || defined(STM32F415xx) || defined(STM32F407xx) || defined(STM32F417xx) |
mbed_official | 235:685d5f11838f | 89 | |
mbed_official | 235:685d5f11838f | 90 | /* Private typedef -----------------------------------------------------------*/ |
mbed_official | 235:685d5f11838f | 91 | /* Private define ------------------------------------------------------------*/ |
mbed_official | 235:685d5f11838f | 92 | /* Private macro -------------------------------------------------------------*/ |
mbed_official | 235:685d5f11838f | 93 | /* Private variables ---------------------------------------------------------*/ |
mbed_official | 235:685d5f11838f | 94 | /* Private function prototypes -----------------------------------------------*/ |
mbed_official | 235:685d5f11838f | 95 | /* Private functions ---------------------------------------------------------*/ |
mbed_official | 235:685d5f11838f | 96 | |
mbed_official | 235:685d5f11838f | 97 | /** @defgroup FSMC_Private_Functions |
mbed_official | 235:685d5f11838f | 98 | * @{ |
mbed_official | 235:685d5f11838f | 99 | */ |
mbed_official | 235:685d5f11838f | 100 | |
mbed_official | 235:685d5f11838f | 101 | /** @defgroup FSMC_NORSRAM Controller functions |
mbed_official | 235:685d5f11838f | 102 | * @brief NORSRAM Controller functions |
mbed_official | 235:685d5f11838f | 103 | * |
mbed_official | 235:685d5f11838f | 104 | @verbatim |
mbed_official | 235:685d5f11838f | 105 | ============================================================================== |
mbed_official | 235:685d5f11838f | 106 | ##### How to use NORSRAM device driver ##### |
mbed_official | 235:685d5f11838f | 107 | ============================================================================== |
mbed_official | 235:685d5f11838f | 108 | |
mbed_official | 235:685d5f11838f | 109 | [..] |
mbed_official | 235:685d5f11838f | 110 | This driver contains a set of APIs to interface with the FSMC NORSRAM banks in order |
mbed_official | 235:685d5f11838f | 111 | to run the NORSRAM external devices. |
mbed_official | 235:685d5f11838f | 112 | |
mbed_official | 235:685d5f11838f | 113 | (+) FSMC NORSRAM bank reset using the function FSMC_NORSRAM_DeInit() |
mbed_official | 235:685d5f11838f | 114 | (+) FSMC NORSRAM bank control configuration using the function FSMC_NORSRAM_Init() |
mbed_official | 235:685d5f11838f | 115 | (+) FSMC NORSRAM bank timing configuration using the function FSMC_NORSRAM_Timing_Init() |
mbed_official | 235:685d5f11838f | 116 | (+) FSMC NORSRAM bank extended timing configuration using the function |
mbed_official | 235:685d5f11838f | 117 | FSMC_NORSRAM_Extended_Timing_Init() |
mbed_official | 235:685d5f11838f | 118 | (+) FSMC NORSRAM bank enable/disable write operation using the functions |
mbed_official | 235:685d5f11838f | 119 | FSMC_NORSRAM_WriteOperation_Enable()/FSMC_NORSRAM_WriteOperation_Disable() |
mbed_official | 235:685d5f11838f | 120 | |
mbed_official | 235:685d5f11838f | 121 | @endverbatim |
mbed_official | 235:685d5f11838f | 122 | * @{ |
mbed_official | 235:685d5f11838f | 123 | */ |
mbed_official | 235:685d5f11838f | 124 | |
mbed_official | 235:685d5f11838f | 125 | /** @defgroup HAL_FSMC_NORSRAM_Group1 Initialization/de-initialization functions |
mbed_official | 235:685d5f11838f | 126 | * @brief Initialization and Configuration functions |
mbed_official | 235:685d5f11838f | 127 | * |
mbed_official | 235:685d5f11838f | 128 | @verbatim |
mbed_official | 235:685d5f11838f | 129 | ============================================================================== |
mbed_official | 235:685d5f11838f | 130 | ##### Initialization and de_initialization functions ##### |
mbed_official | 235:685d5f11838f | 131 | ============================================================================== |
mbed_official | 235:685d5f11838f | 132 | [..] |
mbed_official | 235:685d5f11838f | 133 | This section provides functions allowing to: |
mbed_official | 235:685d5f11838f | 134 | (+) Initialize and configure the FSMC NORSRAM interface |
mbed_official | 235:685d5f11838f | 135 | (+) De-initialize the FSMC NORSRAM interface |
mbed_official | 235:685d5f11838f | 136 | (+) Configure the FSMC clock and associated GPIOs |
mbed_official | 235:685d5f11838f | 137 | |
mbed_official | 235:685d5f11838f | 138 | @endverbatim |
mbed_official | 235:685d5f11838f | 139 | * @{ |
mbed_official | 235:685d5f11838f | 140 | */ |
mbed_official | 235:685d5f11838f | 141 | |
mbed_official | 235:685d5f11838f | 142 | /** |
mbed_official | 235:685d5f11838f | 143 | * @brief Initialize the FSMC_NORSRAM device according to the specified |
mbed_official | 235:685d5f11838f | 144 | * control parameters in the FSMC_NORSRAM_InitTypeDef |
mbed_official | 235:685d5f11838f | 145 | * @param Device: Pointer to NORSRAM device instance |
mbed_official | 235:685d5f11838f | 146 | * @param Init: Pointer to NORSRAM Initialization structure |
mbed_official | 235:685d5f11838f | 147 | * @retval HAL status |
mbed_official | 235:685d5f11838f | 148 | */ |
mbed_official | 235:685d5f11838f | 149 | HAL_StatusTypeDef FSMC_NORSRAM_Init(FSMC_NORSRAM_TypeDef *Device, FSMC_NORSRAM_InitTypeDef* Init) |
mbed_official | 235:685d5f11838f | 150 | { |
mbed_official | 235:685d5f11838f | 151 | uint32_t tmpr = 0; |
mbed_official | 235:685d5f11838f | 152 | |
mbed_official | 235:685d5f11838f | 153 | /* Check the parameters */ |
mbed_official | 235:685d5f11838f | 154 | assert_param(IS_FSMC_NORSRAM_BANK(Init->NSBank)); |
mbed_official | 235:685d5f11838f | 155 | assert_param(IS_FSMC_MUX(Init->DataAddressMux)); |
mbed_official | 235:685d5f11838f | 156 | assert_param(IS_FSMC_MEMORY(Init->MemoryType)); |
mbed_official | 235:685d5f11838f | 157 | assert_param(IS_FSMC_NORSRAM_MEMORY_WIDTH(Init->MemoryDataWidth)); |
mbed_official | 235:685d5f11838f | 158 | assert_param(IS_FSMC_BURSTMODE(Init->BurstAccessMode)); |
mbed_official | 235:685d5f11838f | 159 | assert_param(IS_FSMC_WAIT_POLARITY(Init->WaitSignalPolarity)); |
mbed_official | 235:685d5f11838f | 160 | assert_param(IS_FSMC_WRAP_MODE(Init->WrapMode)); |
mbed_official | 235:685d5f11838f | 161 | assert_param(IS_FSMC_WAIT_SIGNAL_ACTIVE(Init->WaitSignalActive)); |
mbed_official | 235:685d5f11838f | 162 | assert_param(IS_FSMC_WRITE_OPERATION(Init->WriteOperation)); |
mbed_official | 235:685d5f11838f | 163 | assert_param(IS_FSMC_WAITE_SIGNAL(Init->WaitSignal)); |
mbed_official | 235:685d5f11838f | 164 | assert_param(IS_FSMC_EXTENDED_MODE(Init->ExtendedMode)); |
mbed_official | 235:685d5f11838f | 165 | assert_param(IS_FSMC_ASYNWAIT(Init->AsynchronousWait)); |
mbed_official | 235:685d5f11838f | 166 | assert_param(IS_FSMC_WRITE_BURST(Init->WriteBurst)); |
mbed_official | 235:685d5f11838f | 167 | |
mbed_official | 235:685d5f11838f | 168 | /* Set NORSRAM device control parameters */ |
mbed_official | 235:685d5f11838f | 169 | tmpr = (uint32_t)(Init->DataAddressMux |\ |
mbed_official | 235:685d5f11838f | 170 | Init->MemoryType |\ |
mbed_official | 235:685d5f11838f | 171 | Init->MemoryDataWidth |\ |
mbed_official | 235:685d5f11838f | 172 | Init->BurstAccessMode |\ |
mbed_official | 235:685d5f11838f | 173 | Init->WaitSignalPolarity |\ |
mbed_official | 235:685d5f11838f | 174 | Init->WrapMode |\ |
mbed_official | 235:685d5f11838f | 175 | Init->WaitSignalActive |\ |
mbed_official | 235:685d5f11838f | 176 | Init->WriteOperation |\ |
mbed_official | 235:685d5f11838f | 177 | Init->WaitSignal |\ |
mbed_official | 235:685d5f11838f | 178 | Init->ExtendedMode |\ |
mbed_official | 235:685d5f11838f | 179 | Init->AsynchronousWait |\ |
mbed_official | 235:685d5f11838f | 180 | Init->WriteBurst |
mbed_official | 235:685d5f11838f | 181 | ); |
mbed_official | 235:685d5f11838f | 182 | |
mbed_official | 235:685d5f11838f | 183 | if(Init->MemoryType == FSMC_MEMORY_TYPE_NOR) |
mbed_official | 235:685d5f11838f | 184 | { |
mbed_official | 235:685d5f11838f | 185 | tmpr |= (uint32_t)FSMC_NORSRAM_FLASH_ACCESS_ENABLE; |
mbed_official | 235:685d5f11838f | 186 | } |
mbed_official | 235:685d5f11838f | 187 | |
mbed_official | 235:685d5f11838f | 188 | Device->BTCR[Init->NSBank] = tmpr; |
mbed_official | 235:685d5f11838f | 189 | |
mbed_official | 235:685d5f11838f | 190 | return HAL_OK; |
mbed_official | 235:685d5f11838f | 191 | } |
mbed_official | 235:685d5f11838f | 192 | |
mbed_official | 235:685d5f11838f | 193 | |
mbed_official | 235:685d5f11838f | 194 | /** |
mbed_official | 235:685d5f11838f | 195 | * @brief DeInitialize the FSMC_NORSRAM peripheral |
mbed_official | 235:685d5f11838f | 196 | * @param Device: Pointer to NORSRAM device instance |
mbed_official | 235:685d5f11838f | 197 | * @param ExDevice: Pointer to NORSRAM extended mode device instance |
mbed_official | 235:685d5f11838f | 198 | * @param Bank: NORSRAM bank number |
mbed_official | 235:685d5f11838f | 199 | * @retval HAL status |
mbed_official | 235:685d5f11838f | 200 | */ |
mbed_official | 235:685d5f11838f | 201 | HAL_StatusTypeDef FSMC_NORSRAM_DeInit(FSMC_NORSRAM_TypeDef *Device, FSMC_NORSRAM_EXTENDED_TypeDef *ExDevice, uint32_t Bank) |
mbed_official | 235:685d5f11838f | 202 | { |
mbed_official | 235:685d5f11838f | 203 | /* Check the parameters */ |
mbed_official | 235:685d5f11838f | 204 | assert_param(IS_FSMC_NORSRAM_DEVICE(Device)); |
mbed_official | 235:685d5f11838f | 205 | assert_param(IS_FSMC_NORSRAM_EXTENDED_DEVICE(ExDevice)); |
mbed_official | 235:685d5f11838f | 206 | |
mbed_official | 235:685d5f11838f | 207 | /* Disable the FSMC_NORSRAM device */ |
mbed_official | 235:685d5f11838f | 208 | __FSMC_NORSRAM_DISABLE(Device, Bank); |
mbed_official | 235:685d5f11838f | 209 | |
mbed_official | 235:685d5f11838f | 210 | /* De-initialize the FSMC_NORSRAM device */ |
mbed_official | 235:685d5f11838f | 211 | /* FSMC_NORSRAM_BANK1 */ |
mbed_official | 235:685d5f11838f | 212 | if(Bank == FSMC_NORSRAM_BANK1) |
mbed_official | 235:685d5f11838f | 213 | { |
mbed_official | 235:685d5f11838f | 214 | Device->BTCR[Bank] = 0x000030DB; |
mbed_official | 235:685d5f11838f | 215 | } |
mbed_official | 235:685d5f11838f | 216 | /* FSMC_NORSRAM_BANK2, FSMC_NORSRAM_BANK3 or FSMC_NORSRAM_BANK4 */ |
mbed_official | 235:685d5f11838f | 217 | else |
mbed_official | 235:685d5f11838f | 218 | { |
mbed_official | 235:685d5f11838f | 219 | Device->BTCR[Bank] = 0x000030D2; |
mbed_official | 235:685d5f11838f | 220 | } |
mbed_official | 235:685d5f11838f | 221 | |
mbed_official | 235:685d5f11838f | 222 | Device->BTCR[Bank + 1] = 0x0FFFFFFF; |
mbed_official | 235:685d5f11838f | 223 | ExDevice->BWTR[Bank] = 0x0FFFFFFF; |
mbed_official | 235:685d5f11838f | 224 | |
mbed_official | 235:685d5f11838f | 225 | return HAL_OK; |
mbed_official | 235:685d5f11838f | 226 | } |
mbed_official | 235:685d5f11838f | 227 | |
mbed_official | 235:685d5f11838f | 228 | |
mbed_official | 235:685d5f11838f | 229 | /** |
mbed_official | 235:685d5f11838f | 230 | * @brief Initialize the FSMC_NORSRAM Timing according to the specified |
mbed_official | 235:685d5f11838f | 231 | * parameters in the FSMC_NORSRAM_TimingTypeDef |
mbed_official | 235:685d5f11838f | 232 | * @param Device: Pointer to NORSRAM device instance |
mbed_official | 235:685d5f11838f | 233 | * @param Timing: Pointer to NORSRAM Timing structure |
mbed_official | 235:685d5f11838f | 234 | * @param Bank: NORSRAM bank number |
mbed_official | 235:685d5f11838f | 235 | * @retval HAL status |
mbed_official | 235:685d5f11838f | 236 | */ |
mbed_official | 235:685d5f11838f | 237 | HAL_StatusTypeDef FSMC_NORSRAM_Timing_Init(FSMC_NORSRAM_TypeDef *Device, FSMC_NORSRAM_TimingTypeDef *Timing, uint32_t Bank) |
mbed_official | 235:685d5f11838f | 238 | { |
mbed_official | 235:685d5f11838f | 239 | uint32_t tmpr = 0; |
mbed_official | 235:685d5f11838f | 240 | |
mbed_official | 235:685d5f11838f | 241 | /* Check the parameters */ |
mbed_official | 235:685d5f11838f | 242 | assert_param(IS_FSMC_ADDRESS_SETUP_TIME(Timing->AddressSetupTime)); |
mbed_official | 235:685d5f11838f | 243 | assert_param(IS_FSMC_ADDRESS_HOLD_TIME(Timing->AddressHoldTime)); |
mbed_official | 235:685d5f11838f | 244 | assert_param(IS_FSMC_DATASETUP_TIME(Timing->DataSetupTime)); |
mbed_official | 235:685d5f11838f | 245 | assert_param(IS_FSMC_TURNAROUND_TIME(Timing->BusTurnAroundDuration)); |
mbed_official | 235:685d5f11838f | 246 | assert_param(IS_FSMC_CLK_DIV(Timing->CLKDivision)); |
mbed_official | 235:685d5f11838f | 247 | assert_param(IS_FSMC_DATA_LATENCY(Timing->DataLatency)); |
mbed_official | 235:685d5f11838f | 248 | assert_param(IS_FSMC_ACCESS_MODE(Timing->AccessMode)); |
mbed_official | 235:685d5f11838f | 249 | |
mbed_official | 235:685d5f11838f | 250 | /* Set FSMC_NORSRAM device timing parameters */ |
mbed_official | 235:685d5f11838f | 251 | tmpr = (uint32_t)(Timing->AddressSetupTime |\ |
mbed_official | 235:685d5f11838f | 252 | ((Timing->AddressHoldTime) << 4) |\ |
mbed_official | 235:685d5f11838f | 253 | ((Timing->DataSetupTime) << 8) |\ |
mbed_official | 235:685d5f11838f | 254 | ((Timing->BusTurnAroundDuration) << 16) |\ |
mbed_official | 235:685d5f11838f | 255 | (((Timing->CLKDivision)-1) << 20) |\ |
mbed_official | 235:685d5f11838f | 256 | (((Timing->DataLatency)-2) << 24) |\ |
mbed_official | 235:685d5f11838f | 257 | (Timing->AccessMode) |
mbed_official | 235:685d5f11838f | 258 | ); |
mbed_official | 235:685d5f11838f | 259 | |
mbed_official | 235:685d5f11838f | 260 | Device->BTCR[Bank + 1] = tmpr; |
mbed_official | 235:685d5f11838f | 261 | |
mbed_official | 235:685d5f11838f | 262 | return HAL_OK; |
mbed_official | 235:685d5f11838f | 263 | } |
mbed_official | 235:685d5f11838f | 264 | |
mbed_official | 235:685d5f11838f | 265 | /** |
mbed_official | 235:685d5f11838f | 266 | * @brief Initialize the FSMC_NORSRAM Extended mode Timing according to the specified |
mbed_official | 235:685d5f11838f | 267 | * parameters in the FSMC_NORSRAM_TimingTypeDef |
mbed_official | 235:685d5f11838f | 268 | * @param Device: Pointer to NORSRAM device instance |
mbed_official | 235:685d5f11838f | 269 | * @param Timing: Pointer to NORSRAM Timing structure |
mbed_official | 235:685d5f11838f | 270 | * @param Bank: NORSRAM bank number |
mbed_official | 235:685d5f11838f | 271 | * @retval HAL status |
mbed_official | 235:685d5f11838f | 272 | */ |
mbed_official | 235:685d5f11838f | 273 | HAL_StatusTypeDef FSMC_NORSRAM_Extended_Timing_Init(FSMC_NORSRAM_EXTENDED_TypeDef *Device, FSMC_NORSRAM_TimingTypeDef *Timing, uint32_t Bank, uint32_t ExtendedMode) |
mbed_official | 235:685d5f11838f | 274 | { |
mbed_official | 235:685d5f11838f | 275 | /* Set NORSRAM device timing register for write configuration, if extended mode is used */ |
mbed_official | 235:685d5f11838f | 276 | if(ExtendedMode == FSMC_EXTENDED_MODE_ENABLE) |
mbed_official | 235:685d5f11838f | 277 | { |
mbed_official | 235:685d5f11838f | 278 | /* Check the parameters */ |
mbed_official | 235:685d5f11838f | 279 | assert_param(IS_FSMC_ADDRESS_SETUP_TIME(Timing->AddressSetupTime)); |
mbed_official | 235:685d5f11838f | 280 | assert_param(IS_FSMC_ADDRESS_HOLD_TIME(Timing->AddressHoldTime)); |
mbed_official | 235:685d5f11838f | 281 | assert_param(IS_FSMC_DATASETUP_TIME(Timing->DataSetupTime)); |
mbed_official | 235:685d5f11838f | 282 | assert_param(IS_FSMC_TURNAROUND_TIME(Timing->BusTurnAroundDuration)); |
mbed_official | 235:685d5f11838f | 283 | assert_param(IS_FSMC_CLK_DIV(Timing->CLKDivision)); |
mbed_official | 235:685d5f11838f | 284 | assert_param(IS_FSMC_DATA_LATENCY(Timing->DataLatency)); |
mbed_official | 235:685d5f11838f | 285 | assert_param(IS_FSMC_ACCESS_MODE(Timing->AccessMode)); |
mbed_official | 235:685d5f11838f | 286 | |
mbed_official | 235:685d5f11838f | 287 | Device->BWTR[Bank] = (uint32_t)(Timing->AddressSetupTime |\ |
mbed_official | 235:685d5f11838f | 288 | ((Timing->AddressHoldTime) << 4) |\ |
mbed_official | 235:685d5f11838f | 289 | ((Timing->DataSetupTime) << 8) |\ |
mbed_official | 235:685d5f11838f | 290 | ((Timing->BusTurnAroundDuration) << 16) |\ |
mbed_official | 235:685d5f11838f | 291 | (((Timing->CLKDivision)-1) << 20) |\ |
mbed_official | 235:685d5f11838f | 292 | (((Timing->DataLatency)-2) << 24) |\ |
mbed_official | 235:685d5f11838f | 293 | (Timing->AccessMode)); |
mbed_official | 235:685d5f11838f | 294 | } |
mbed_official | 235:685d5f11838f | 295 | else |
mbed_official | 235:685d5f11838f | 296 | { |
mbed_official | 235:685d5f11838f | 297 | Device->BWTR[Bank] = 0x0FFFFFFF; |
mbed_official | 235:685d5f11838f | 298 | } |
mbed_official | 235:685d5f11838f | 299 | |
mbed_official | 235:685d5f11838f | 300 | return HAL_OK; |
mbed_official | 235:685d5f11838f | 301 | } |
mbed_official | 235:685d5f11838f | 302 | |
mbed_official | 235:685d5f11838f | 303 | |
mbed_official | 235:685d5f11838f | 304 | /** |
mbed_official | 235:685d5f11838f | 305 | * @} |
mbed_official | 235:685d5f11838f | 306 | */ |
mbed_official | 235:685d5f11838f | 307 | |
mbed_official | 235:685d5f11838f | 308 | |
mbed_official | 235:685d5f11838f | 309 | /** @defgroup HAL_FSMC_NORSRAM_Group3 Control functions |
mbed_official | 235:685d5f11838f | 310 | * @brief management functions |
mbed_official | 235:685d5f11838f | 311 | * |
mbed_official | 235:685d5f11838f | 312 | @verbatim |
mbed_official | 235:685d5f11838f | 313 | ============================================================================== |
mbed_official | 235:685d5f11838f | 314 | ##### FSMC_NORSRAM Control functions ##### |
mbed_official | 235:685d5f11838f | 315 | ============================================================================== |
mbed_official | 235:685d5f11838f | 316 | [..] |
mbed_official | 235:685d5f11838f | 317 | This subsection provides a set of functions allowing to control dynamically |
mbed_official | 235:685d5f11838f | 318 | the FSMC NORSRAM interface. |
mbed_official | 235:685d5f11838f | 319 | |
mbed_official | 235:685d5f11838f | 320 | @endverbatim |
mbed_official | 235:685d5f11838f | 321 | * @{ |
mbed_official | 235:685d5f11838f | 322 | */ |
mbed_official | 235:685d5f11838f | 323 | |
mbed_official | 235:685d5f11838f | 324 | /** |
mbed_official | 235:685d5f11838f | 325 | * @brief Enables dynamically FSMC_NORSRAM write operation. |
mbed_official | 235:685d5f11838f | 326 | * @param Device: Pointer to NORSRAM device instance |
mbed_official | 235:685d5f11838f | 327 | * @param Bank: NORSRAM bank number |
mbed_official | 235:685d5f11838f | 328 | * @retval HAL status |
mbed_official | 235:685d5f11838f | 329 | */ |
mbed_official | 235:685d5f11838f | 330 | HAL_StatusTypeDef FSMC_NORSRAM_WriteOperation_Enable(FSMC_NORSRAM_TypeDef *Device, uint32_t Bank) |
mbed_official | 235:685d5f11838f | 331 | { |
mbed_official | 235:685d5f11838f | 332 | /* Enable write operation */ |
mbed_official | 235:685d5f11838f | 333 | Device->BTCR[Bank] |= FSMC_WRITE_OPERATION_ENABLE; |
mbed_official | 235:685d5f11838f | 334 | |
mbed_official | 235:685d5f11838f | 335 | return HAL_OK; |
mbed_official | 235:685d5f11838f | 336 | } |
mbed_official | 235:685d5f11838f | 337 | |
mbed_official | 235:685d5f11838f | 338 | /** |
mbed_official | 235:685d5f11838f | 339 | * @brief Disables dynamically FSMC_NORSRAM write operation. |
mbed_official | 235:685d5f11838f | 340 | * @param Device: Pointer to NORSRAM device instance |
mbed_official | 235:685d5f11838f | 341 | * @param Bank: NORSRAM bank number |
mbed_official | 235:685d5f11838f | 342 | * @retval HAL status |
mbed_official | 235:685d5f11838f | 343 | */ |
mbed_official | 235:685d5f11838f | 344 | HAL_StatusTypeDef FSMC_NORSRAM_WriteOperation_Disable(FSMC_NORSRAM_TypeDef *Device, uint32_t Bank) |
mbed_official | 235:685d5f11838f | 345 | { |
mbed_official | 235:685d5f11838f | 346 | /* Disable write operation */ |
mbed_official | 235:685d5f11838f | 347 | Device->BTCR[Bank] &= ~FSMC_WRITE_OPERATION_ENABLE; |
mbed_official | 235:685d5f11838f | 348 | |
mbed_official | 235:685d5f11838f | 349 | return HAL_OK; |
mbed_official | 235:685d5f11838f | 350 | } |
mbed_official | 235:685d5f11838f | 351 | |
mbed_official | 235:685d5f11838f | 352 | /** |
mbed_official | 235:685d5f11838f | 353 | * @} |
mbed_official | 235:685d5f11838f | 354 | */ |
mbed_official | 235:685d5f11838f | 355 | |
mbed_official | 235:685d5f11838f | 356 | /** |
mbed_official | 235:685d5f11838f | 357 | * @} |
mbed_official | 235:685d5f11838f | 358 | */ |
mbed_official | 235:685d5f11838f | 359 | |
mbed_official | 235:685d5f11838f | 360 | /** @defgroup FSMC_PCCARD Controller functions |
mbed_official | 235:685d5f11838f | 361 | * @brief PCCARD Controller functions |
mbed_official | 235:685d5f11838f | 362 | * |
mbed_official | 235:685d5f11838f | 363 | @verbatim |
mbed_official | 235:685d5f11838f | 364 | ============================================================================== |
mbed_official | 235:685d5f11838f | 365 | ##### How to use NAND device driver ##### |
mbed_official | 235:685d5f11838f | 366 | ============================================================================== |
mbed_official | 235:685d5f11838f | 367 | [..] |
mbed_official | 235:685d5f11838f | 368 | This driver contains a set of APIs to interface with the FSMC NAND banks in order |
mbed_official | 235:685d5f11838f | 369 | to run the NAND external devices. |
mbed_official | 235:685d5f11838f | 370 | |
mbed_official | 235:685d5f11838f | 371 | (+) FSMC NAND bank reset using the function FSMC_NAND_DeInit() |
mbed_official | 235:685d5f11838f | 372 | (+) FSMC NAND bank control configuration using the function FSMC_NAND_Init() |
mbed_official | 235:685d5f11838f | 373 | (+) FSMC NAND bank common space timing configuration using the function |
mbed_official | 235:685d5f11838f | 374 | FSMC_NAND_CommonSpace_Timing_Init() |
mbed_official | 235:685d5f11838f | 375 | (+) FSMC NAND bank attribute space timing configuration using the function |
mbed_official | 235:685d5f11838f | 376 | FSMC_NAND_AttributeSpace_Timing_Init() |
mbed_official | 235:685d5f11838f | 377 | (+) FSMC NAND bank enable/disable ECC correction feature using the functions |
mbed_official | 235:685d5f11838f | 378 | FSMC_NAND_ECC_Enable()/FSMC_NAND_ECC_Disable() |
mbed_official | 235:685d5f11838f | 379 | (+) FSMC NAND bank get ECC correction code using the function FSMC_NAND_GetECC() |
mbed_official | 235:685d5f11838f | 380 | |
mbed_official | 235:685d5f11838f | 381 | @endverbatim |
mbed_official | 235:685d5f11838f | 382 | * @{ |
mbed_official | 235:685d5f11838f | 383 | */ |
mbed_official | 235:685d5f11838f | 384 | |
mbed_official | 235:685d5f11838f | 385 | /** @defgroup HAL_FSMC_NAND_Group1 Initialization/de-initialization functions |
mbed_official | 235:685d5f11838f | 386 | * @brief Initialization and Configuration functions |
mbed_official | 235:685d5f11838f | 387 | * |
mbed_official | 235:685d5f11838f | 388 | @verbatim |
mbed_official | 235:685d5f11838f | 389 | ============================================================================== |
mbed_official | 235:685d5f11838f | 390 | ##### Initialization and de_initialization functions ##### |
mbed_official | 235:685d5f11838f | 391 | ============================================================================== |
mbed_official | 235:685d5f11838f | 392 | [..] |
mbed_official | 235:685d5f11838f | 393 | This section provides functions allowing to: |
mbed_official | 235:685d5f11838f | 394 | (+) Initialize and configure the FSMC NAND interface |
mbed_official | 235:685d5f11838f | 395 | (+) De-initialize the FSMC NAND interface |
mbed_official | 235:685d5f11838f | 396 | (+) Configure the FSMC clock and associated GPIOs |
mbed_official | 235:685d5f11838f | 397 | |
mbed_official | 235:685d5f11838f | 398 | @endverbatim |
mbed_official | 235:685d5f11838f | 399 | * @{ |
mbed_official | 235:685d5f11838f | 400 | */ |
mbed_official | 235:685d5f11838f | 401 | |
mbed_official | 235:685d5f11838f | 402 | /** |
mbed_official | 235:685d5f11838f | 403 | * @brief Initializes the FSMC_NAND device according to the specified |
mbed_official | 235:685d5f11838f | 404 | * control parameters in the FSMC_NAND_HandleTypeDef |
mbed_official | 235:685d5f11838f | 405 | * @param Device: Pointer to NAND device instance |
mbed_official | 235:685d5f11838f | 406 | * @param Init: Pointer to NAND Initialization structure |
mbed_official | 235:685d5f11838f | 407 | * @retval HAL status |
mbed_official | 235:685d5f11838f | 408 | */ |
mbed_official | 235:685d5f11838f | 409 | HAL_StatusTypeDef FSMC_NAND_Init(FSMC_NAND_TypeDef *Device, FSMC_NAND_InitTypeDef *Init) |
mbed_official | 235:685d5f11838f | 410 | { |
mbed_official | 235:685d5f11838f | 411 | uint32_t tmppcr = 0; |
mbed_official | 235:685d5f11838f | 412 | |
mbed_official | 235:685d5f11838f | 413 | /* Check the parameters */ |
mbed_official | 235:685d5f11838f | 414 | assert_param(IS_FSMC_NAND_BANK(Init->NandBank)); |
mbed_official | 235:685d5f11838f | 415 | assert_param(IS_FSMC_WAIT_FEATURE(Init->Waitfeature)); |
mbed_official | 235:685d5f11838f | 416 | assert_param(IS_FSMC_NAND_MEMORY_WIDTH(Init->MemoryDataWidth)); |
mbed_official | 235:685d5f11838f | 417 | assert_param(IS_FSMC_ECC_STATE(Init->EccComputation)); |
mbed_official | 235:685d5f11838f | 418 | assert_param(IS_FSMC_ECCPAGE_SIZE(Init->ECCPageSize)); |
mbed_official | 235:685d5f11838f | 419 | assert_param(IS_FSMC_TCLR_TIME(Init->TCLRSetupTime)); |
mbed_official | 235:685d5f11838f | 420 | assert_param(IS_FSMC_TAR_TIME(Init->TARSetupTime)); |
mbed_official | 235:685d5f11838f | 421 | |
mbed_official | 235:685d5f11838f | 422 | /* Set NAND device control parameters */ |
mbed_official | 235:685d5f11838f | 423 | tmppcr = (uint32_t)(Init->Waitfeature |\ |
mbed_official | 235:685d5f11838f | 424 | FSMC_PCR_MEMORY_TYPE_NAND |\ |
mbed_official | 235:685d5f11838f | 425 | Init->MemoryDataWidth |\ |
mbed_official | 235:685d5f11838f | 426 | Init->EccComputation |\ |
mbed_official | 235:685d5f11838f | 427 | Init->ECCPageSize |\ |
mbed_official | 235:685d5f11838f | 428 | ((Init->TCLRSetupTime) << 9) |\ |
mbed_official | 235:685d5f11838f | 429 | ((Init->TARSetupTime) << 13) |
mbed_official | 235:685d5f11838f | 430 | ); |
mbed_official | 235:685d5f11838f | 431 | |
mbed_official | 235:685d5f11838f | 432 | if(Init->NandBank == FSMC_NAND_BANK2) |
mbed_official | 235:685d5f11838f | 433 | { |
mbed_official | 235:685d5f11838f | 434 | /* NAND bank 2 registers configuration */ |
mbed_official | 235:685d5f11838f | 435 | Device->PCR2 = tmppcr; |
mbed_official | 235:685d5f11838f | 436 | } |
mbed_official | 235:685d5f11838f | 437 | else |
mbed_official | 235:685d5f11838f | 438 | { |
mbed_official | 235:685d5f11838f | 439 | /* NAND bank 3 registers configuration */ |
mbed_official | 235:685d5f11838f | 440 | Device->PCR3 = tmppcr; |
mbed_official | 235:685d5f11838f | 441 | } |
mbed_official | 235:685d5f11838f | 442 | |
mbed_official | 235:685d5f11838f | 443 | return HAL_OK; |
mbed_official | 235:685d5f11838f | 444 | |
mbed_official | 235:685d5f11838f | 445 | } |
mbed_official | 235:685d5f11838f | 446 | |
mbed_official | 235:685d5f11838f | 447 | /** |
mbed_official | 235:685d5f11838f | 448 | * @brief Initializes the FSMC_NAND Common space Timing according to the specified |
mbed_official | 235:685d5f11838f | 449 | * parameters in the FSMC_NAND_PCC_TimingTypeDef |
mbed_official | 235:685d5f11838f | 450 | * @param Device: Pointer to NAND device instance |
mbed_official | 235:685d5f11838f | 451 | * @param Timing: Pointer to NAND timing structure |
mbed_official | 235:685d5f11838f | 452 | * @param Bank: NAND bank number |
mbed_official | 235:685d5f11838f | 453 | * @retval HAL status |
mbed_official | 235:685d5f11838f | 454 | */ |
mbed_official | 235:685d5f11838f | 455 | HAL_StatusTypeDef FSMC_NAND_CommonSpace_Timing_Init(FSMC_NAND_TypeDef *Device, FSMC_NAND_PCC_TimingTypeDef *Timing, uint32_t Bank) |
mbed_official | 235:685d5f11838f | 456 | { |
mbed_official | 235:685d5f11838f | 457 | uint32_t tmppmem = 0; |
mbed_official | 235:685d5f11838f | 458 | |
mbed_official | 235:685d5f11838f | 459 | /* Check the parameters */ |
mbed_official | 235:685d5f11838f | 460 | assert_param(IS_FSMC_SETUP_TIME(Timing->SetupTime)); |
mbed_official | 235:685d5f11838f | 461 | assert_param(IS_FSMC_WAIT_TIME(Timing->WaitSetupTime)); |
mbed_official | 235:685d5f11838f | 462 | assert_param(IS_FSMC_HOLD_TIME(Timing->HoldSetupTime)); |
mbed_official | 235:685d5f11838f | 463 | assert_param(IS_FSMC_HIZ_TIME(Timing->HiZSetupTime)); |
mbed_official | 235:685d5f11838f | 464 | |
mbed_official | 235:685d5f11838f | 465 | /* Set FSMC_NAND device timing parameters */ |
mbed_official | 235:685d5f11838f | 466 | tmppmem = (uint32_t)(Timing->SetupTime |\ |
mbed_official | 235:685d5f11838f | 467 | ((Timing->WaitSetupTime) << 8) |\ |
mbed_official | 235:685d5f11838f | 468 | ((Timing->HoldSetupTime) << 16) |\ |
mbed_official | 235:685d5f11838f | 469 | ((Timing->HiZSetupTime) << 24) |
mbed_official | 235:685d5f11838f | 470 | ); |
mbed_official | 235:685d5f11838f | 471 | |
mbed_official | 235:685d5f11838f | 472 | if(Bank == FSMC_NAND_BANK2) |
mbed_official | 235:685d5f11838f | 473 | { |
mbed_official | 235:685d5f11838f | 474 | /* NAND bank 2 registers configuration */ |
mbed_official | 235:685d5f11838f | 475 | Device->PMEM2 = tmppmem; |
mbed_official | 235:685d5f11838f | 476 | } |
mbed_official | 235:685d5f11838f | 477 | else |
mbed_official | 235:685d5f11838f | 478 | { |
mbed_official | 235:685d5f11838f | 479 | /* NAND bank 3 registers configuration */ |
mbed_official | 235:685d5f11838f | 480 | Device->PMEM3 = tmppmem; |
mbed_official | 235:685d5f11838f | 481 | } |
mbed_official | 235:685d5f11838f | 482 | |
mbed_official | 235:685d5f11838f | 483 | return HAL_OK; |
mbed_official | 235:685d5f11838f | 484 | } |
mbed_official | 235:685d5f11838f | 485 | |
mbed_official | 235:685d5f11838f | 486 | /** |
mbed_official | 235:685d5f11838f | 487 | * @brief Initializes the FSMC_NAND Attribute space Timing according to the specified |
mbed_official | 235:685d5f11838f | 488 | * parameters in the FSMC_NAND_PCC_TimingTypeDef |
mbed_official | 235:685d5f11838f | 489 | * @param Device: Pointer to NAND device instance |
mbed_official | 235:685d5f11838f | 490 | * @param Timing: Pointer to NAND timing structure |
mbed_official | 235:685d5f11838f | 491 | * @param Bank: NAND bank number |
mbed_official | 235:685d5f11838f | 492 | * @retval HAL status |
mbed_official | 235:685d5f11838f | 493 | */ |
mbed_official | 235:685d5f11838f | 494 | HAL_StatusTypeDef FSMC_NAND_AttributeSpace_Timing_Init(FSMC_NAND_TypeDef *Device, FSMC_NAND_PCC_TimingTypeDef *Timing, uint32_t Bank) |
mbed_official | 235:685d5f11838f | 495 | { |
mbed_official | 235:685d5f11838f | 496 | uint32_t tmppatt = 0; |
mbed_official | 235:685d5f11838f | 497 | |
mbed_official | 235:685d5f11838f | 498 | /* Check the parameters */ |
mbed_official | 235:685d5f11838f | 499 | assert_param(IS_FSMC_SETUP_TIME(Timing->SetupTime)); |
mbed_official | 235:685d5f11838f | 500 | assert_param(IS_FSMC_WAIT_TIME(Timing->WaitSetupTime)); |
mbed_official | 235:685d5f11838f | 501 | assert_param(IS_FSMC_HOLD_TIME(Timing->HoldSetupTime)); |
mbed_official | 235:685d5f11838f | 502 | assert_param(IS_FSMC_HIZ_TIME(Timing->HiZSetupTime)); |
mbed_official | 235:685d5f11838f | 503 | |
mbed_official | 235:685d5f11838f | 504 | /* Set FSMC_NAND device timing parameters */ |
mbed_official | 235:685d5f11838f | 505 | tmppatt = (uint32_t)(Timing->SetupTime |\ |
mbed_official | 235:685d5f11838f | 506 | ((Timing->WaitSetupTime) << 8) |\ |
mbed_official | 235:685d5f11838f | 507 | ((Timing->HoldSetupTime) << 16) |\ |
mbed_official | 235:685d5f11838f | 508 | ((Timing->HiZSetupTime) << 24) |
mbed_official | 235:685d5f11838f | 509 | ); |
mbed_official | 235:685d5f11838f | 510 | |
mbed_official | 235:685d5f11838f | 511 | if(Bank == FSMC_NAND_BANK2) |
mbed_official | 235:685d5f11838f | 512 | { |
mbed_official | 235:685d5f11838f | 513 | /* NAND bank 2 registers configuration */ |
mbed_official | 235:685d5f11838f | 514 | Device->PATT2 = tmppatt; |
mbed_official | 235:685d5f11838f | 515 | } |
mbed_official | 235:685d5f11838f | 516 | else |
mbed_official | 235:685d5f11838f | 517 | { |
mbed_official | 235:685d5f11838f | 518 | /* NAND bank 3 registers configuration */ |
mbed_official | 235:685d5f11838f | 519 | Device->PATT3 = tmppatt; |
mbed_official | 235:685d5f11838f | 520 | } |
mbed_official | 235:685d5f11838f | 521 | |
mbed_official | 235:685d5f11838f | 522 | return HAL_OK; |
mbed_official | 235:685d5f11838f | 523 | } |
mbed_official | 235:685d5f11838f | 524 | |
mbed_official | 235:685d5f11838f | 525 | |
mbed_official | 235:685d5f11838f | 526 | /** |
mbed_official | 235:685d5f11838f | 527 | * @brief DeInitializes the FSMC_NAND device |
mbed_official | 235:685d5f11838f | 528 | * @param Device: Pointer to NAND device instance |
mbed_official | 235:685d5f11838f | 529 | * @param Bank: NAND bank number |
mbed_official | 235:685d5f11838f | 530 | * @retval HAL status |
mbed_official | 235:685d5f11838f | 531 | */ |
mbed_official | 235:685d5f11838f | 532 | HAL_StatusTypeDef FSMC_NAND_DeInit(FSMC_NAND_TypeDef *Device, uint32_t Bank) |
mbed_official | 235:685d5f11838f | 533 | { |
mbed_official | 235:685d5f11838f | 534 | /* Disable the NAND Bank */ |
mbed_official | 235:685d5f11838f | 535 | __FSMC_NAND_DISABLE(Device, Bank); |
mbed_official | 235:685d5f11838f | 536 | |
mbed_official | 235:685d5f11838f | 537 | /* De-initialize the NAND Bank */ |
mbed_official | 235:685d5f11838f | 538 | if(Bank == FSMC_NAND_BANK2) |
mbed_official | 235:685d5f11838f | 539 | { |
mbed_official | 235:685d5f11838f | 540 | /* Set the FSMC_NAND_BANK2 registers to their reset values */ |
mbed_official | 235:685d5f11838f | 541 | Device->PCR2 = 0x00000018; |
mbed_official | 235:685d5f11838f | 542 | Device->SR2 = 0x00000040; |
mbed_official | 235:685d5f11838f | 543 | Device->PMEM2 = 0xFCFCFCFC; |
mbed_official | 235:685d5f11838f | 544 | Device->PATT2 = 0xFCFCFCFC; |
mbed_official | 235:685d5f11838f | 545 | } |
mbed_official | 235:685d5f11838f | 546 | /* FSMC_Bank3_NAND */ |
mbed_official | 235:685d5f11838f | 547 | else |
mbed_official | 235:685d5f11838f | 548 | { |
mbed_official | 235:685d5f11838f | 549 | /* Set the FSMC_NAND_BANK3 registers to their reset values */ |
mbed_official | 235:685d5f11838f | 550 | Device->PCR3 = 0x00000018; |
mbed_official | 235:685d5f11838f | 551 | Device->SR3 = 0x00000040; |
mbed_official | 235:685d5f11838f | 552 | Device->PMEM3 = 0xFCFCFCFC; |
mbed_official | 235:685d5f11838f | 553 | Device->PATT3 = 0xFCFCFCFC; |
mbed_official | 235:685d5f11838f | 554 | } |
mbed_official | 235:685d5f11838f | 555 | |
mbed_official | 235:685d5f11838f | 556 | return HAL_OK; |
mbed_official | 235:685d5f11838f | 557 | } |
mbed_official | 235:685d5f11838f | 558 | |
mbed_official | 235:685d5f11838f | 559 | /** |
mbed_official | 235:685d5f11838f | 560 | * @} |
mbed_official | 235:685d5f11838f | 561 | */ |
mbed_official | 235:685d5f11838f | 562 | |
mbed_official | 235:685d5f11838f | 563 | |
mbed_official | 235:685d5f11838f | 564 | /** @defgroup HAL_FSMC_NAND_Group3 Control functions |
mbed_official | 235:685d5f11838f | 565 | * @brief management functions |
mbed_official | 235:685d5f11838f | 566 | * |
mbed_official | 235:685d5f11838f | 567 | @verbatim |
mbed_official | 235:685d5f11838f | 568 | ============================================================================== |
mbed_official | 235:685d5f11838f | 569 | ##### FSMC_NAND Control functions ##### |
mbed_official | 235:685d5f11838f | 570 | ============================================================================== |
mbed_official | 235:685d5f11838f | 571 | [..] |
mbed_official | 235:685d5f11838f | 572 | This subsection provides a set of functions allowing to control dynamically |
mbed_official | 235:685d5f11838f | 573 | the FSMC NAND interface. |
mbed_official | 235:685d5f11838f | 574 | |
mbed_official | 235:685d5f11838f | 575 | @endverbatim |
mbed_official | 235:685d5f11838f | 576 | * @{ |
mbed_official | 235:685d5f11838f | 577 | */ |
mbed_official | 235:685d5f11838f | 578 | |
mbed_official | 235:685d5f11838f | 579 | |
mbed_official | 235:685d5f11838f | 580 | /** |
mbed_official | 235:685d5f11838f | 581 | * @brief Enables dynamically FSMC_NAND ECC feature. |
mbed_official | 235:685d5f11838f | 582 | * @param Device: Pointer to NAND device instance |
mbed_official | 235:685d5f11838f | 583 | * @param Bank: NAND bank number |
mbed_official | 235:685d5f11838f | 584 | * @retval HAL status |
mbed_official | 235:685d5f11838f | 585 | */ |
mbed_official | 235:685d5f11838f | 586 | HAL_StatusTypeDef FSMC_NAND_ECC_Enable(FSMC_NAND_TypeDef *Device, uint32_t Bank) |
mbed_official | 235:685d5f11838f | 587 | { |
mbed_official | 235:685d5f11838f | 588 | /* Enable ECC feature */ |
mbed_official | 235:685d5f11838f | 589 | if(Bank == FSMC_NAND_BANK2) |
mbed_official | 235:685d5f11838f | 590 | { |
mbed_official | 235:685d5f11838f | 591 | Device->PCR2 |= FSMC_PCR2_ECCEN; |
mbed_official | 235:685d5f11838f | 592 | } |
mbed_official | 235:685d5f11838f | 593 | else |
mbed_official | 235:685d5f11838f | 594 | { |
mbed_official | 235:685d5f11838f | 595 | Device->PCR3 |= FSMC_PCR3_ECCEN; |
mbed_official | 235:685d5f11838f | 596 | } |
mbed_official | 235:685d5f11838f | 597 | |
mbed_official | 235:685d5f11838f | 598 | return HAL_OK; |
mbed_official | 235:685d5f11838f | 599 | } |
mbed_official | 235:685d5f11838f | 600 | |
mbed_official | 235:685d5f11838f | 601 | |
mbed_official | 235:685d5f11838f | 602 | /** |
mbed_official | 235:685d5f11838f | 603 | * @brief Disables dynamically FSMC_NAND ECC feature. |
mbed_official | 235:685d5f11838f | 604 | * @param Device: Pointer to NAND device instance |
mbed_official | 235:685d5f11838f | 605 | * @param Bank: NAND bank number |
mbed_official | 235:685d5f11838f | 606 | * @retval HAL status |
mbed_official | 235:685d5f11838f | 607 | */ |
mbed_official | 235:685d5f11838f | 608 | HAL_StatusTypeDef FSMC_NAND_ECC_Disable(FSMC_NAND_TypeDef *Device, uint32_t Bank) |
mbed_official | 235:685d5f11838f | 609 | { |
mbed_official | 235:685d5f11838f | 610 | /* Disable ECC feature */ |
mbed_official | 235:685d5f11838f | 611 | if(Bank == FSMC_NAND_BANK2) |
mbed_official | 235:685d5f11838f | 612 | { |
mbed_official | 235:685d5f11838f | 613 | Device->PCR2 &= ~FSMC_PCR2_ECCEN; |
mbed_official | 235:685d5f11838f | 614 | } |
mbed_official | 235:685d5f11838f | 615 | else |
mbed_official | 235:685d5f11838f | 616 | { |
mbed_official | 235:685d5f11838f | 617 | Device->PCR3 &= ~FSMC_PCR3_ECCEN; |
mbed_official | 235:685d5f11838f | 618 | } |
mbed_official | 235:685d5f11838f | 619 | |
mbed_official | 235:685d5f11838f | 620 | return HAL_OK; |
mbed_official | 235:685d5f11838f | 621 | } |
mbed_official | 235:685d5f11838f | 622 | |
mbed_official | 235:685d5f11838f | 623 | /** |
mbed_official | 235:685d5f11838f | 624 | * @brief Disables dynamically FSMC_NAND ECC feature. |
mbed_official | 235:685d5f11838f | 625 | * @param Device: Pointer to NAND device instance |
mbed_official | 235:685d5f11838f | 626 | * @param ECCval: Pointer to ECC value |
mbed_official | 235:685d5f11838f | 627 | * @param Bank: NAND bank number |
mbed_official | 235:685d5f11838f | 628 | * @param Timeout: Timeout wait value |
mbed_official | 235:685d5f11838f | 629 | * @retval HAL status |
mbed_official | 235:685d5f11838f | 630 | */ |
mbed_official | 235:685d5f11838f | 631 | HAL_StatusTypeDef FSMC_NAND_GetECC(FSMC_NAND_TypeDef *Device, uint32_t *ECCval, uint32_t Bank, uint32_t Timeout) |
mbed_official | 235:685d5f11838f | 632 | { |
mbed_official | 235:685d5f11838f | 633 | uint32_t tickstart = 0; |
mbed_official | 235:685d5f11838f | 634 | |
mbed_official | 235:685d5f11838f | 635 | /* Check the parameters */ |
mbed_official | 235:685d5f11838f | 636 | assert_param(IS_FSMC_NAND_DEVICE(Device)); |
mbed_official | 235:685d5f11838f | 637 | assert_param(IS_FSMC_NAND_BANK(Bank)); |
mbed_official | 235:685d5f11838f | 638 | |
mbed_official | 235:685d5f11838f | 639 | /* Get tick */ |
mbed_official | 235:685d5f11838f | 640 | tickstart = HAL_GetTick(); |
mbed_official | 235:685d5f11838f | 641 | |
mbed_official | 235:685d5f11838f | 642 | /* Wait untill FIFO is empty */ |
mbed_official | 235:685d5f11838f | 643 | while(__FSMC_NAND_GET_FLAG(Device, Bank, FSMC_FLAG_FEMPT)) |
mbed_official | 235:685d5f11838f | 644 | { |
mbed_official | 235:685d5f11838f | 645 | /* Check for the Timeout */ |
mbed_official | 235:685d5f11838f | 646 | if(Timeout != HAL_MAX_DELAY) |
mbed_official | 235:685d5f11838f | 647 | { |
mbed_official | 235:685d5f11838f | 648 | if((Timeout == 0)||((HAL_GetTick() - tickstart ) > Timeout)) |
mbed_official | 235:685d5f11838f | 649 | { |
mbed_official | 235:685d5f11838f | 650 | return HAL_TIMEOUT; |
mbed_official | 235:685d5f11838f | 651 | } |
mbed_official | 235:685d5f11838f | 652 | } |
mbed_official | 235:685d5f11838f | 653 | } |
mbed_official | 235:685d5f11838f | 654 | |
mbed_official | 235:685d5f11838f | 655 | if(Bank == FSMC_NAND_BANK2) |
mbed_official | 235:685d5f11838f | 656 | { |
mbed_official | 235:685d5f11838f | 657 | /* Get the ECCR2 register value */ |
mbed_official | 235:685d5f11838f | 658 | *ECCval = (uint32_t)Device->ECCR2; |
mbed_official | 235:685d5f11838f | 659 | } |
mbed_official | 235:685d5f11838f | 660 | else |
mbed_official | 235:685d5f11838f | 661 | { |
mbed_official | 235:685d5f11838f | 662 | /* Get the ECCR3 register value */ |
mbed_official | 235:685d5f11838f | 663 | *ECCval = (uint32_t)Device->ECCR3; |
mbed_official | 235:685d5f11838f | 664 | } |
mbed_official | 235:685d5f11838f | 665 | |
mbed_official | 235:685d5f11838f | 666 | return HAL_OK; |
mbed_official | 235:685d5f11838f | 667 | } |
mbed_official | 235:685d5f11838f | 668 | |
mbed_official | 235:685d5f11838f | 669 | /** |
mbed_official | 235:685d5f11838f | 670 | * @} |
mbed_official | 235:685d5f11838f | 671 | */ |
mbed_official | 235:685d5f11838f | 672 | |
mbed_official | 235:685d5f11838f | 673 | /** |
mbed_official | 235:685d5f11838f | 674 | * @} |
mbed_official | 235:685d5f11838f | 675 | */ |
mbed_official | 235:685d5f11838f | 676 | |
mbed_official | 235:685d5f11838f | 677 | /** @defgroup FSMC_PCCARD Controller functions |
mbed_official | 235:685d5f11838f | 678 | * @brief PCCARD Controller functions |
mbed_official | 235:685d5f11838f | 679 | * |
mbed_official | 235:685d5f11838f | 680 | @verbatim |
mbed_official | 235:685d5f11838f | 681 | ============================================================================== |
mbed_official | 235:685d5f11838f | 682 | ##### How to use PCCARD device driver ##### |
mbed_official | 235:685d5f11838f | 683 | ============================================================================== |
mbed_official | 235:685d5f11838f | 684 | [..] |
mbed_official | 235:685d5f11838f | 685 | This driver contains a set of APIs to interface with the FSMC PCCARD bank in order |
mbed_official | 235:685d5f11838f | 686 | to run the PCCARD/compact flash external devices. |
mbed_official | 235:685d5f11838f | 687 | |
mbed_official | 235:685d5f11838f | 688 | (+) FSMC PCCARD bank reset using the function FSMC_PCCARD_DeInit() |
mbed_official | 235:685d5f11838f | 689 | (+) FSMC PCCARD bank control configuration using the function FSMC_PCCARD_Init() |
mbed_official | 235:685d5f11838f | 690 | (+) FSMC PCCARD bank common space timing configuration using the function |
mbed_official | 235:685d5f11838f | 691 | FSMC_PCCARD_CommonSpace_Timing_Init() |
mbed_official | 235:685d5f11838f | 692 | (+) FSMC PCCARD bank attribute space timing configuration using the function |
mbed_official | 235:685d5f11838f | 693 | FSMC_PCCARD_AttributeSpace_Timing_Init() |
mbed_official | 235:685d5f11838f | 694 | (+) FSMC PCCARD bank IO space timing configuration using the function |
mbed_official | 235:685d5f11838f | 695 | FSMC_PCCARD_IOSpace_Timing_Init() |
mbed_official | 235:685d5f11838f | 696 | |
mbed_official | 235:685d5f11838f | 697 | @endverbatim |
mbed_official | 235:685d5f11838f | 698 | * @{ |
mbed_official | 235:685d5f11838f | 699 | */ |
mbed_official | 235:685d5f11838f | 700 | |
mbed_official | 235:685d5f11838f | 701 | /** @defgroup HAL_FSMC_PCCARD_Group1 Initialization/de-initialization functions |
mbed_official | 235:685d5f11838f | 702 | * @brief Initialization and Configuration functions |
mbed_official | 235:685d5f11838f | 703 | * |
mbed_official | 235:685d5f11838f | 704 | @verbatim |
mbed_official | 235:685d5f11838f | 705 | ============================================================================== |
mbed_official | 235:685d5f11838f | 706 | ##### Initialization and de_initialization functions ##### |
mbed_official | 235:685d5f11838f | 707 | ============================================================================== |
mbed_official | 235:685d5f11838f | 708 | [..] |
mbed_official | 235:685d5f11838f | 709 | This section provides functions allowing to: |
mbed_official | 235:685d5f11838f | 710 | (+) Initialize and configure the FSMC PCCARD interface |
mbed_official | 235:685d5f11838f | 711 | (+) De-initialize the FSMC PCCARD interface |
mbed_official | 235:685d5f11838f | 712 | (+) Configure the FSMC clock and associated GPIOs |
mbed_official | 235:685d5f11838f | 713 | |
mbed_official | 235:685d5f11838f | 714 | @endverbatim |
mbed_official | 235:685d5f11838f | 715 | * @{ |
mbed_official | 235:685d5f11838f | 716 | */ |
mbed_official | 235:685d5f11838f | 717 | |
mbed_official | 235:685d5f11838f | 718 | /** |
mbed_official | 235:685d5f11838f | 719 | * @brief Initializes the FSMC_PCCARD device according to the specified |
mbed_official | 235:685d5f11838f | 720 | * control parameters in the FSMC_PCCARD_HandleTypeDef |
mbed_official | 235:685d5f11838f | 721 | * @param Device: Pointer to PCCARD device instance |
mbed_official | 235:685d5f11838f | 722 | * @param Init: Pointer to PCCARD Initialization structure |
mbed_official | 235:685d5f11838f | 723 | * @retval HAL status |
mbed_official | 235:685d5f11838f | 724 | */ |
mbed_official | 235:685d5f11838f | 725 | HAL_StatusTypeDef FSMC_PCCARD_Init(FSMC_PCCARD_TypeDef *Device, FSMC_PCCARD_InitTypeDef *Init) |
mbed_official | 235:685d5f11838f | 726 | { |
mbed_official | 235:685d5f11838f | 727 | /* Check the parameters */ |
mbed_official | 235:685d5f11838f | 728 | assert_param(IS_FSMC_WAIT_FEATURE(Init->Waitfeature)); |
mbed_official | 235:685d5f11838f | 729 | assert_param(IS_FSMC_TCLR_TIME(Init->TCLRSetupTime)); |
mbed_official | 235:685d5f11838f | 730 | assert_param(IS_FSMC_TAR_TIME(Init->TARSetupTime)); |
mbed_official | 235:685d5f11838f | 731 | |
mbed_official | 235:685d5f11838f | 732 | /* Set FSMC_PCCARD device control parameters */ |
mbed_official | 235:685d5f11838f | 733 | Device->PCR4 = (uint32_t)(Init->Waitfeature |\ |
mbed_official | 235:685d5f11838f | 734 | FSMC_NAND_PCC_MEM_BUS_WIDTH_16 |\ |
mbed_official | 235:685d5f11838f | 735 | (Init->TCLRSetupTime << 9) |\ |
mbed_official | 235:685d5f11838f | 736 | (Init->TARSetupTime << 13)); |
mbed_official | 235:685d5f11838f | 737 | |
mbed_official | 235:685d5f11838f | 738 | return HAL_OK; |
mbed_official | 235:685d5f11838f | 739 | |
mbed_official | 235:685d5f11838f | 740 | } |
mbed_official | 235:685d5f11838f | 741 | |
mbed_official | 235:685d5f11838f | 742 | /** |
mbed_official | 235:685d5f11838f | 743 | * @brief Initializes the FSMC_PCCARD Common space Timing according to the specified |
mbed_official | 235:685d5f11838f | 744 | * parameters in the FSMC_NAND_PCC_TimingTypeDef |
mbed_official | 235:685d5f11838f | 745 | * @param Device: Pointer to PCCARD device instance |
mbed_official | 235:685d5f11838f | 746 | * @param Timing: Pointer to PCCARD timing structure |
mbed_official | 235:685d5f11838f | 747 | * @retval HAL status |
mbed_official | 235:685d5f11838f | 748 | */ |
mbed_official | 235:685d5f11838f | 749 | HAL_StatusTypeDef FSMC_PCCARD_CommonSpace_Timing_Init(FSMC_PCCARD_TypeDef *Device, FSMC_NAND_PCC_TimingTypeDef *Timing) |
mbed_official | 235:685d5f11838f | 750 | { |
mbed_official | 235:685d5f11838f | 751 | /* Check the parameters */ |
mbed_official | 235:685d5f11838f | 752 | assert_param(IS_FSMC_SETUP_TIME(Timing->SetupTime)); |
mbed_official | 235:685d5f11838f | 753 | assert_param(IS_FSMC_WAIT_TIME(Timing->WaitSetupTime)); |
mbed_official | 235:685d5f11838f | 754 | assert_param(IS_FSMC_HOLD_TIME(Timing->HoldSetupTime)); |
mbed_official | 235:685d5f11838f | 755 | assert_param(IS_FSMC_HIZ_TIME(Timing->HiZSetupTime)); |
mbed_official | 235:685d5f11838f | 756 | |
mbed_official | 235:685d5f11838f | 757 | /* Set PCCARD timing parameters */ |
mbed_official | 235:685d5f11838f | 758 | Device->PMEM4 = (uint32_t)((Timing->SetupTime |\ |
mbed_official | 235:685d5f11838f | 759 | ((Timing->WaitSetupTime) << 8) |\ |
mbed_official | 235:685d5f11838f | 760 | (Timing->HoldSetupTime) << 16) |\ |
mbed_official | 235:685d5f11838f | 761 | ((Timing->HiZSetupTime) << 24) |
mbed_official | 235:685d5f11838f | 762 | ); |
mbed_official | 235:685d5f11838f | 763 | |
mbed_official | 235:685d5f11838f | 764 | return HAL_OK; |
mbed_official | 235:685d5f11838f | 765 | } |
mbed_official | 235:685d5f11838f | 766 | |
mbed_official | 235:685d5f11838f | 767 | /** |
mbed_official | 235:685d5f11838f | 768 | * @brief Initializes the FSMC_PCCARD Attribute space Timing according to the specified |
mbed_official | 235:685d5f11838f | 769 | * parameters in the FSMC_NAND_PCC_TimingTypeDef |
mbed_official | 235:685d5f11838f | 770 | * @param Device: Pointer to PCCARD device instance |
mbed_official | 235:685d5f11838f | 771 | * @param Timing: Pointer to PCCARD timing structure |
mbed_official | 235:685d5f11838f | 772 | * @retval HAL status |
mbed_official | 235:685d5f11838f | 773 | */ |
mbed_official | 235:685d5f11838f | 774 | HAL_StatusTypeDef FSMC_PCCARD_AttributeSpace_Timing_Init(FSMC_PCCARD_TypeDef *Device, FSMC_NAND_PCC_TimingTypeDef *Timing) |
mbed_official | 235:685d5f11838f | 775 | { |
mbed_official | 235:685d5f11838f | 776 | /* Check the parameters */ |
mbed_official | 235:685d5f11838f | 777 | assert_param(IS_FSMC_SETUP_TIME(Timing->SetupTime)); |
mbed_official | 235:685d5f11838f | 778 | assert_param(IS_FSMC_WAIT_TIME(Timing->WaitSetupTime)); |
mbed_official | 235:685d5f11838f | 779 | assert_param(IS_FSMC_HOLD_TIME(Timing->HoldSetupTime)); |
mbed_official | 235:685d5f11838f | 780 | assert_param(IS_FSMC_HIZ_TIME(Timing->HiZSetupTime)); |
mbed_official | 235:685d5f11838f | 781 | |
mbed_official | 235:685d5f11838f | 782 | /* Set PCCARD timing parameters */ |
mbed_official | 235:685d5f11838f | 783 | Device->PATT4 = (uint32_t)((Timing->SetupTime |\ |
mbed_official | 235:685d5f11838f | 784 | ((Timing->WaitSetupTime) << 8) |\ |
mbed_official | 235:685d5f11838f | 785 | (Timing->HoldSetupTime) << 16) |\ |
mbed_official | 235:685d5f11838f | 786 | ((Timing->HiZSetupTime) << 24) |
mbed_official | 235:685d5f11838f | 787 | ); |
mbed_official | 235:685d5f11838f | 788 | |
mbed_official | 235:685d5f11838f | 789 | return HAL_OK; |
mbed_official | 235:685d5f11838f | 790 | } |
mbed_official | 235:685d5f11838f | 791 | |
mbed_official | 235:685d5f11838f | 792 | /** |
mbed_official | 235:685d5f11838f | 793 | * @brief Initializes the FSMC_PCCARD IO space Timing according to the specified |
mbed_official | 235:685d5f11838f | 794 | * parameters in the FSMC_NAND_PCC_TimingTypeDef |
mbed_official | 235:685d5f11838f | 795 | * @param Device: Pointer to PCCARD device instance |
mbed_official | 235:685d5f11838f | 796 | * @param Timing: Pointer to PCCARD timing structure |
mbed_official | 235:685d5f11838f | 797 | * @retval HAL status |
mbed_official | 235:685d5f11838f | 798 | */ |
mbed_official | 235:685d5f11838f | 799 | HAL_StatusTypeDef FSMC_PCCARD_IOSpace_Timing_Init(FSMC_PCCARD_TypeDef *Device, FSMC_NAND_PCC_TimingTypeDef *Timing) |
mbed_official | 235:685d5f11838f | 800 | { |
mbed_official | 235:685d5f11838f | 801 | /* Check the parameters */ |
mbed_official | 235:685d5f11838f | 802 | assert_param(IS_FSMC_SETUP_TIME(Timing->SetupTime)); |
mbed_official | 235:685d5f11838f | 803 | assert_param(IS_FSMC_WAIT_TIME(Timing->WaitSetupTime)); |
mbed_official | 235:685d5f11838f | 804 | assert_param(IS_FSMC_HOLD_TIME(Timing->HoldSetupTime)); |
mbed_official | 235:685d5f11838f | 805 | assert_param(IS_FSMC_HIZ_TIME(Timing->HiZSetupTime)); |
mbed_official | 235:685d5f11838f | 806 | |
mbed_official | 235:685d5f11838f | 807 | /* Set FSMC_PCCARD device timing parameters */ |
mbed_official | 235:685d5f11838f | 808 | Device->PIO4 = (uint32_t)((Timing->SetupTime |\ |
mbed_official | 235:685d5f11838f | 809 | ((Timing->WaitSetupTime) << 8) |\ |
mbed_official | 235:685d5f11838f | 810 | (Timing->HoldSetupTime) << 16) |\ |
mbed_official | 235:685d5f11838f | 811 | ((Timing->HiZSetupTime) << 24) |
mbed_official | 235:685d5f11838f | 812 | ); |
mbed_official | 235:685d5f11838f | 813 | |
mbed_official | 235:685d5f11838f | 814 | return HAL_OK; |
mbed_official | 235:685d5f11838f | 815 | } |
mbed_official | 235:685d5f11838f | 816 | |
mbed_official | 235:685d5f11838f | 817 | /** |
mbed_official | 235:685d5f11838f | 818 | * @brief DeInitializes the FSMC_PCCARD device |
mbed_official | 235:685d5f11838f | 819 | * @param Device: Pointer to PCCARD device instance |
mbed_official | 235:685d5f11838f | 820 | * @retval HAL status |
mbed_official | 235:685d5f11838f | 821 | */ |
mbed_official | 235:685d5f11838f | 822 | HAL_StatusTypeDef FSMC_PCCARD_DeInit(FSMC_PCCARD_TypeDef *Device) |
mbed_official | 235:685d5f11838f | 823 | { |
mbed_official | 235:685d5f11838f | 824 | /* Disable the FSMC_PCCARD device */ |
mbed_official | 235:685d5f11838f | 825 | __FSMC_PCCARD_DISABLE(Device); |
mbed_official | 235:685d5f11838f | 826 | |
mbed_official | 235:685d5f11838f | 827 | /* De-initialize the FSMC_PCCARD device */ |
mbed_official | 235:685d5f11838f | 828 | Device->PCR4 = 0x00000018; |
mbed_official | 235:685d5f11838f | 829 | Device->SR4 = 0x00000000; |
mbed_official | 235:685d5f11838f | 830 | Device->PMEM4 = 0xFCFCFCFC; |
mbed_official | 235:685d5f11838f | 831 | Device->PATT4 = 0xFCFCFCFC; |
mbed_official | 235:685d5f11838f | 832 | Device->PIO4 = 0xFCFCFCFC; |
mbed_official | 235:685d5f11838f | 833 | |
mbed_official | 235:685d5f11838f | 834 | return HAL_OK; |
mbed_official | 235:685d5f11838f | 835 | } |
mbed_official | 235:685d5f11838f | 836 | |
mbed_official | 235:685d5f11838f | 837 | /** |
mbed_official | 235:685d5f11838f | 838 | * @} |
mbed_official | 235:685d5f11838f | 839 | */ |
mbed_official | 235:685d5f11838f | 840 | |
mbed_official | 235:685d5f11838f | 841 | /** |
mbed_official | 235:685d5f11838f | 842 | * @} |
mbed_official | 235:685d5f11838f | 843 | */ |
mbed_official | 235:685d5f11838f | 844 | |
mbed_official | 235:685d5f11838f | 845 | #endif /* STM32F405xx || STM32F415xx || STM32F407xx || STM32F417xx */ |
mbed_official | 235:685d5f11838f | 846 | |
mbed_official | 235:685d5f11838f | 847 | #endif /* HAL_FSMC_MODULE_ENABLED */ |
mbed_official | 235:685d5f11838f | 848 | |
mbed_official | 235:685d5f11838f | 849 | /** |
mbed_official | 235:685d5f11838f | 850 | * @} |
mbed_official | 235:685d5f11838f | 851 | */ |
mbed_official | 235:685d5f11838f | 852 | |
mbed_official | 235:685d5f11838f | 853 | /** |
mbed_official | 235:685d5f11838f | 854 | * @} |
mbed_official | 235:685d5f11838f | 855 | */ |
mbed_official | 235:685d5f11838f | 856 | |
mbed_official | 235:685d5f11838f | 857 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |