shao ziyang / mbed-src-kl05

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targets/cmsis/TARGET_STM/TARGET_NUCLEO_F411RE/stm32f4xx_hal_tim.c@323:9e901b0a5aa1, 2014-09-13 (annotated)

Committer:
shaoziyang
Date:
Sat Sep 13 14:25:46 2014 +0000
Revision:
323:9e901b0a5aa1
Parent:
235:685d5f11838f 
test with CLOCK_SETUP = 0

Who changed what in which revision?

UserRevisionLine numberNew contents of line
mbed_official 235:685d5f11838f 1 /**
mbed_official 235:685d5f11838f 2 ******************************************************************************
mbed_official 235:685d5f11838f 3 * @file stm32f4xx_hal_tim.c
mbed_official 235:685d5f11838f 4 * @author MCD Application Team
mbed_official 235:685d5f11838f 5 * @version V1.1.0
mbed_official 235:685d5f11838f 6 * @date 19-June-2014
mbed_official 235:685d5f11838f 7 * @brief TIM HAL module driver.
mbed_official 235:685d5f11838f 8 * This file provides firmware functions to manage the following
mbed_official 235:685d5f11838f 9 * functionalities of the Timer (TIM) peripheral:
mbed_official 235:685d5f11838f 10 * + Time Base Initialization
mbed_official 235:685d5f11838f 11 * + Time Base Start
mbed_official 235:685d5f11838f 12 * + Time Base Start Interruption
mbed_official 235:685d5f11838f 13 * + Time Base Start DMA
mbed_official 235:685d5f11838f 14 * + Time Output Compare/PWM Initialization
mbed_official 235:685d5f11838f 15 * + Time Output Compare/PWM Channel Configuration
mbed_official 235:685d5f11838f 16 * + Time Output Compare/PWM Start
mbed_official 235:685d5f11838f 17 * + Time Output Compare/PWM Start Interruption
mbed_official 235:685d5f11838f 18 * + Time Output Compare/PWM Start DMA
mbed_official 235:685d5f11838f 19 * + Time Input Capture Initialization
mbed_official 235:685d5f11838f 20 * + Time Input Capture Channel Configuration
mbed_official 235:685d5f11838f 21 * + Time Input Capture Start
mbed_official 235:685d5f11838f 22 * + Time Input Capture Start Interruption
mbed_official 235:685d5f11838f 23 * + Time Input Capture Start DMA
mbed_official 235:685d5f11838f 24 * + Time One Pulse Initialization
mbed_official 235:685d5f11838f 25 * + Time One Pulse Channel Configuration
mbed_official 235:685d5f11838f 26 * + Time One Pulse Start
mbed_official 235:685d5f11838f 27 * + Time Encoder Interface Initialization
mbed_official 235:685d5f11838f 28 * + Time Encoder Interface Start
mbed_official 235:685d5f11838f 29 * + Time Encoder Interface Start Interruption
mbed_official 235:685d5f11838f 30 * + Time Encoder Interface Start DMA
mbed_official 235:685d5f11838f 31 * + Commutation Event configuration with Interruption and DMA
mbed_official 235:685d5f11838f 32 * + Time OCRef clear configuration
mbed_official 235:685d5f11838f 33 * + Time External Clock configuration
mbed_official 235:685d5f11838f 34 @verbatim
mbed_official 235:685d5f11838f 35 ==============================================================================
mbed_official 235:685d5f11838f 36 ##### TIMER Generic features #####
mbed_official 235:685d5f11838f 37 ==============================================================================
mbed_official 235:685d5f11838f 38 [..] The Timer features include:
mbed_official 235:685d5f11838f 39 (#) 16-bit up, down, up/down auto-reload counter.
mbed_official 235:685d5f11838f 40 (#) 16-bit programmable prescaler allowing dividing (also on the fly) the
mbed_official 235:685d5f11838f 41 counter clock frequency either by any factor between 1 and 65536.
mbed_official 235:685d5f11838f 42 (#) Up to 4 independent channels for:
mbed_official 235:685d5f11838f 43 (++) Input Capture
mbed_official 235:685d5f11838f 44 (++) Output Compare
mbed_official 235:685d5f11838f 45 (++) PWM generation (Edge and Center-aligned Mode)
mbed_official 235:685d5f11838f 46 (++) One-pulse mode output
mbed_official 235:685d5f11838f 47
mbed_official 235:685d5f11838f 48 ##### How to use this driver #####
mbed_official 235:685d5f11838f 49 ==============================================================================
mbed_official 235:685d5f11838f 50 [..]
mbed_official 235:685d5f11838f 51 (#) Initialize the TIM low level resources by implementing the following functions
mbed_official 235:685d5f11838f 52 depending from feature used :
mbed_official 235:685d5f11838f 53 (++) Time Base : HAL_TIM_Base_MspInit()
mbed_official 235:685d5f11838f 54 (++) Input Capture : HAL_TIM_IC_MspInit()
mbed_official 235:685d5f11838f 55 (++) Output Compare : HAL_TIM_OC_MspInit()
mbed_official 235:685d5f11838f 56 (++) PWM generation : HAL_TIM_PWM_MspInit()
mbed_official 235:685d5f11838f 57 (++) One-pulse mode output : HAL_TIM_OnePulse_MspInit()
mbed_official 235:685d5f11838f 58 (++) Encoder mode output : HAL_TIM_Encoder_MspInit()
mbed_official 235:685d5f11838f 59
mbed_official 235:685d5f11838f 60 (#) Initialize the TIM low level resources :
mbed_official 235:685d5f11838f 61 (##) Enable the TIM interface clock using __TIMx_CLK_ENABLE();
mbed_official 235:685d5f11838f 62 (##) TIM pins configuration
mbed_official 235:685d5f11838f 63 (+++) Enable the clock for the TIM GPIOs using the following function:
mbed_official 235:685d5f11838f 64 __GPIOx_CLK_ENABLE();
mbed_official 235:685d5f11838f 65 (+++) Configure these TIM pins in Alternate function mode using HAL_GPIO_Init();
mbed_official 235:685d5f11838f 66
mbed_official 235:685d5f11838f 67 (#) The external Clock can be configured, if needed (the default clock is the
mbed_official 235:685d5f11838f 68 internal clock from the APBx), using the following function:
mbed_official 235:685d5f11838f 69 HAL_TIM_ConfigClockSource, the clock configuration should be done before
mbed_official 235:685d5f11838f 70 any start function.
mbed_official 235:685d5f11838f 71
mbed_official 235:685d5f11838f 72 (#) Configure the TIM in the desired functioning mode using one of the
mbed_official 235:685d5f11838f 73 initialization function of this driver:
mbed_official 235:685d5f11838f 74 (++) HAL_TIM_Base_Init: to use the Timer to generate a simple time base
mbed_official 235:685d5f11838f 75 (++) HAL_TIM_OC_Init and HAL_TIM_OC_ConfigChannel: to use the Timer to generate an
mbed_official 235:685d5f11838f 76 Output Compare signal.
mbed_official 235:685d5f11838f 77 (++) HAL_TIM_PWM_Init and HAL_TIM_PWM_ConfigChannel: to use the Timer to generate a
mbed_official 235:685d5f11838f 78 PWM signal.
mbed_official 235:685d5f11838f 79 (++) HAL_TIM_IC_Init and HAL_TIM_IC_ConfigChannel: to use the Timer to measure an
mbed_official 235:685d5f11838f 80 external signal.
mbed_official 235:685d5f11838f 81 (++) HAL_TIM_OnePulse_Init and HAL_TIM_OnePulse_ConfigChannel: to use the Timer
mbed_official 235:685d5f11838f 82 in One Pulse Mode.
mbed_official 235:685d5f11838f 83 (++) HAL_TIM_Encoder_Init: to use the Timer Encoder Interface.
mbed_official 235:685d5f11838f 84
mbed_official 235:685d5f11838f 85 (#) Activate the TIM peripheral using one of the start functions depending from the feature used:
mbed_official 235:685d5f11838f 86 (++) Time Base : HAL_TIM_Base_Start(), HAL_TIM_Base_Start_DMA(), HAL_TIM_Base_Start_IT()
mbed_official 235:685d5f11838f 87 (++) Input Capture : HAL_TIM_IC_Start(), HAL_TIM_IC_Start_DMA(), HAL_TIM_IC_Start_IT()
mbed_official 235:685d5f11838f 88 (++) Output Compare : HAL_TIM_OC_Start(), HAL_TIM_OC_Start_DMA(), HAL_TIM_OC_Start_IT()
mbed_official 235:685d5f11838f 89 (++) PWM generation : HAL_TIM_PWM_Start(), HAL_TIM_PWM_Start_DMA(), HAL_TIM_PWM_Start_IT()
mbed_official 235:685d5f11838f 90 (++) One-pulse mode output : HAL_TIM_OnePulse_Start(), HAL_TIM_OnePulse_Start_IT()
mbed_official 235:685d5f11838f 91 (++) Encoder mode output : HAL_TIM_Encoder_Start(), HAL_TIM_Encoder_Start_DMA(), HAL_TIM_Encoder_Start_IT().
mbed_official 235:685d5f11838f 92
mbed_official 235:685d5f11838f 93 (#) The DMA Burst is managed with the two following functions:
mbed_official 235:685d5f11838f 94 HAL_TIM_DMABurst_WriteStart()
mbed_official 235:685d5f11838f 95 HAL_TIM_DMABurst_ReadStart()
mbed_official 235:685d5f11838f 96
mbed_official 235:685d5f11838f 97 @endverbatim
mbed_official 235:685d5f11838f 98 ******************************************************************************
mbed_official 235:685d5f11838f 99 * @attention
mbed_official 235:685d5f11838f 100 *
mbed_official 235:685d5f11838f 101 * <h2><center>&copy; COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
mbed_official 235:685d5f11838f 102 *
mbed_official 235:685d5f11838f 103 * Redistribution and use in source and binary forms, with or without modification,
mbed_official 235:685d5f11838f 104 * are permitted provided that the following conditions are met:
mbed_official 235:685d5f11838f 105 * 1. Redistributions of source code must retain the above copyright notice,
mbed_official 235:685d5f11838f 106 * this list of conditions and the following disclaimer.
mbed_official 235:685d5f11838f 107 * 2. Redistributions in binary form must reproduce the above copyright notice,
mbed_official 235:685d5f11838f 108 * this list of conditions and the following disclaimer in the documentation
mbed_official 235:685d5f11838f 109 * and/or other materials provided with the distribution.
mbed_official 235:685d5f11838f 110 * 3. Neither the name of STMicroelectronics nor the names of its contributors
mbed_official 235:685d5f11838f 111 * may be used to endorse or promote products derived from this software
mbed_official 235:685d5f11838f 112 * without specific prior written permission.
mbed_official 235:685d5f11838f 113 *
mbed_official 235:685d5f11838f 114 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
mbed_official 235:685d5f11838f 115 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
mbed_official 235:685d5f11838f 116 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
mbed_official 235:685d5f11838f 117 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
mbed_official 235:685d5f11838f 118 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
mbed_official 235:685d5f11838f 119 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
mbed_official 235:685d5f11838f 120 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
mbed_official 235:685d5f11838f 121 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
mbed_official 235:685d5f11838f 122 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
mbed_official 235:685d5f11838f 123 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
mbed_official 235:685d5f11838f 124 *
mbed_official 235:685d5f11838f 125 ******************************************************************************
mbed_official 235:685d5f11838f 126 */
mbed_official 235:685d5f11838f 127
mbed_official 235:685d5f11838f 128 /* Includes ------------------------------------------------------------------*/
mbed_official 235:685d5f11838f 129 #include "stm32f4xx_hal.h"
mbed_official 235:685d5f11838f 130
mbed_official 235:685d5f11838f 131 /** @addtogroup STM32F4xx_HAL_Driver
mbed_official 235:685d5f11838f 132 * @{
mbed_official 235:685d5f11838f 133 */
mbed_official 235:685d5f11838f 134
mbed_official 235:685d5f11838f 135 /** @defgroup TIM
mbed_official 235:685d5f11838f 136 * @brief TIM HAL module driver
mbed_official 235:685d5f11838f 137 * @{
mbed_official 235:685d5f11838f 138 */
mbed_official 235:685d5f11838f 139
mbed_official 235:685d5f11838f 140 #ifdef HAL_TIM_MODULE_ENABLED
mbed_official 235:685d5f11838f 141
mbed_official 235:685d5f11838f 142 /* Private typedef -----------------------------------------------------------*/
mbed_official 235:685d5f11838f 143 /* Private define ------------------------------------------------------------*/
mbed_official 235:685d5f11838f 144 /* Private macro -------------------------------------------------------------*/
mbed_official 235:685d5f11838f 145 /* Private variables ---------------------------------------------------------*/
mbed_official 235:685d5f11838f 146 /* Private function prototypes -----------------------------------------------*/
mbed_official 235:685d5f11838f 147 static void TIM_OC1_SetConfig(TIM_TypeDef *TIMx, TIM_OC_InitTypeDef *OC_Config);
mbed_official 235:685d5f11838f 148 static void TIM_OC3_SetConfig(TIM_TypeDef *TIMx, TIM_OC_InitTypeDef *OC_Config);
mbed_official 235:685d5f11838f 149 static void TIM_OC4_SetConfig(TIM_TypeDef *TIMx, TIM_OC_InitTypeDef *OC_Config);
mbed_official 235:685d5f11838f 150
mbed_official 235:685d5f11838f 151 static void TIM_TI1_ConfigInputStage(TIM_TypeDef *TIMx, uint32_t TIM_ICPolarity, uint32_t TIM_ICFilter);
mbed_official 235:685d5f11838f 152 static void TIM_TI2_SetConfig(TIM_TypeDef *TIMx, uint32_t TIM_ICPolarity, uint32_t TIM_ICSelection,
mbed_official 235:685d5f11838f 153 uint32_t TIM_ICFilter);
mbed_official 235:685d5f11838f 154 static void TIM_TI2_ConfigInputStage(TIM_TypeDef *TIMx, uint32_t TIM_ICPolarity, uint32_t TIM_ICFilter);
mbed_official 235:685d5f11838f 155 static void TIM_TI3_SetConfig(TIM_TypeDef *TIMx, uint32_t TIM_ICPolarity, uint32_t TIM_ICSelection,
mbed_official 235:685d5f11838f 156 uint32_t TIM_ICFilter);
mbed_official 235:685d5f11838f 157 static void TIM_TI4_SetConfig(TIM_TypeDef *TIMx, uint32_t TIM_ICPolarity, uint32_t TIM_ICSelection,
mbed_official 235:685d5f11838f 158 uint32_t TIM_ICFilter);
mbed_official 235:685d5f11838f 159
mbed_official 235:685d5f11838f 160 static void TIM_ETR_SetConfig(TIM_TypeDef* TIMx, uint32_t TIM_ExtTRGPrescaler,
mbed_official 235:685d5f11838f 161 uint32_t TIM_ExtTRGPolarity, uint32_t ExtTRGFilter);
mbed_official 235:685d5f11838f 162
mbed_official 235:685d5f11838f 163 static void TIM_ITRx_SetConfig(TIM_TypeDef* TIMx, uint16_t TIM_ITRx);
mbed_official 235:685d5f11838f 164 static void TIM_DMAPeriodElapsedCplt(DMA_HandleTypeDef *hdma);
mbed_official 235:685d5f11838f 165 static void TIM_DMATriggerCplt(DMA_HandleTypeDef *hdma);
mbed_official 235:685d5f11838f 166 /* Private functions ---------------------------------------------------------*/
mbed_official 235:685d5f11838f 167
mbed_official 235:685d5f11838f 168 /** @defgroup TIM_Private_Functions
mbed_official 235:685d5f11838f 169 * @{
mbed_official 235:685d5f11838f 170 */
mbed_official 235:685d5f11838f 171
mbed_official 235:685d5f11838f 172 /** @defgroup TIM_Group1 Time Base functions
mbed_official 235:685d5f11838f 173 * @brief Time Base functions
mbed_official 235:685d5f11838f 174 *
mbed_official 235:685d5f11838f 175 @verbatim
mbed_official 235:685d5f11838f 176 ==============================================================================
mbed_official 235:685d5f11838f 177 ##### Time Base functions #####
mbed_official 235:685d5f11838f 178 ==============================================================================
mbed_official 235:685d5f11838f 179 [..]
mbed_official 235:685d5f11838f 180 This section provides functions allowing to:
mbed_official 235:685d5f11838f 181 (+) Initialize and configure the TIM base.
mbed_official 235:685d5f11838f 182 (+) De-initialize the TIM base.
mbed_official 235:685d5f11838f 183 (+) Start the Time Base.
mbed_official 235:685d5f11838f 184 (+) Stop the Time Base.
mbed_official 235:685d5f11838f 185 (+) Start the Time Base and enable interrupt.
mbed_official 235:685d5f11838f 186 (+) Stop the Time Base and disable interrupt.
mbed_official 235:685d5f11838f 187 (+) Start the Time Base and enable DMA transfer.
mbed_official 235:685d5f11838f 188 (+) Stop the Time Base and disable DMA transfer.
mbed_official 235:685d5f11838f 189
mbed_official 235:685d5f11838f 190 @endverbatim
mbed_official 235:685d5f11838f 191 * @{
mbed_official 235:685d5f11838f 192 */
mbed_official 235:685d5f11838f 193 /**
mbed_official 235:685d5f11838f 194 * @brief Initializes the TIM Time base Unit according to the specified
mbed_official 235:685d5f11838f 195 * parameters in the TIM_HandleTypeDef and create the associated handle.
mbed_official 235:685d5f11838f 196 * @param htim: pointer to a TIM_HandleTypeDef structure that contains
mbed_official 235:685d5f11838f 197 * the configuration information for TIM module.
mbed_official 235:685d5f11838f 198 * @retval HAL status
mbed_official 235:685d5f11838f 199 */
mbed_official 235:685d5f11838f 200 HAL_StatusTypeDef HAL_TIM_Base_Init(TIM_HandleTypeDef *htim)
mbed_official 235:685d5f11838f 201 {
mbed_official 235:685d5f11838f 202 /* Check the TIM handle allocation */
mbed_official 235:685d5f11838f 203 if(htim == NULL)
mbed_official 235:685d5f11838f 204 {
mbed_official 235:685d5f11838f 205 return HAL_ERROR;
mbed_official 235:685d5f11838f 206 }
mbed_official 235:685d5f11838f 207
mbed_official 235:685d5f11838f 208 /* Check the parameters */
mbed_official 235:685d5f11838f 209 assert_param(IS_TIM_INSTANCE(htim->Instance));
mbed_official 235:685d5f11838f 210 assert_param(IS_TIM_COUNTER_MODE(htim->Init.CounterMode));
mbed_official 235:685d5f11838f 211 assert_param(IS_TIM_CLOCKDIVISION_DIV(htim->Init.ClockDivision));
mbed_official 235:685d5f11838f 212
mbed_official 235:685d5f11838f 213 if(htim->State == HAL_TIM_STATE_RESET)
mbed_official 235:685d5f11838f 214 {
mbed_official 235:685d5f11838f 215 /* Init the low level hardware : GPIO, CLOCK, NVIC */
mbed_official 235:685d5f11838f 216 HAL_TIM_Base_MspInit(htim);
mbed_official 235:685d5f11838f 217 }
mbed_official 235:685d5f11838f 218
mbed_official 235:685d5f11838f 219 /* Set the TIM state */
mbed_official 235:685d5f11838f 220 htim->State= HAL_TIM_STATE_BUSY;
mbed_official 235:685d5f11838f 221
mbed_official 235:685d5f11838f 222 /* Set the Time Base configuration */
mbed_official 235:685d5f11838f 223 TIM_Base_SetConfig(htim->Instance, &htim->Init);
mbed_official 235:685d5f11838f 224
mbed_official 235:685d5f11838f 225 /* Initialize the TIM state*/
mbed_official 235:685d5f11838f 226 htim->State= HAL_TIM_STATE_READY;
mbed_official 235:685d5f11838f 227
mbed_official 235:685d5f11838f 228 return HAL_OK;
mbed_official 235:685d5f11838f 229 }
mbed_official 235:685d5f11838f 230
mbed_official 235:685d5f11838f 231 /**
mbed_official 235:685d5f11838f 232 * @brief DeInitializes the TIM Base peripheral
mbed_official 235:685d5f11838f 233 * @param htim: pointer to a TIM_HandleTypeDef structure that contains
mbed_official 235:685d5f11838f 234 * the configuration information for TIM module.
mbed_official 235:685d5f11838f 235 * @retval HAL status
mbed_official 235:685d5f11838f 236 */
mbed_official 235:685d5f11838f 237 HAL_StatusTypeDef HAL_TIM_Base_DeInit(TIM_HandleTypeDef *htim)
mbed_official 235:685d5f11838f 238 {
mbed_official 235:685d5f11838f 239 /* Check the parameters */
mbed_official 235:685d5f11838f 240 assert_param(IS_TIM_INSTANCE(htim->Instance));
mbed_official 235:685d5f11838f 241
mbed_official 235:685d5f11838f 242 htim->State = HAL_TIM_STATE_BUSY;
mbed_official 235:685d5f11838f 243
mbed_official 235:685d5f11838f 244 /* Disable the TIM Peripheral Clock */
mbed_official 235:685d5f11838f 245 __HAL_TIM_DISABLE(htim);
mbed_official 235:685d5f11838f 246
mbed_official 235:685d5f11838f 247 /* DeInit the low level hardware: GPIO, CLOCK, NVIC */
mbed_official 235:685d5f11838f 248 HAL_TIM_Base_MspDeInit(htim);
mbed_official 235:685d5f11838f 249
mbed_official 235:685d5f11838f 250 /* Change TIM state */
mbed_official 235:685d5f11838f 251 htim->State = HAL_TIM_STATE_RESET;
mbed_official 235:685d5f11838f 252
mbed_official 235:685d5f11838f 253 /* Release Lock */
mbed_official 235:685d5f11838f 254 __HAL_UNLOCK(htim);
mbed_official 235:685d5f11838f 255
mbed_official 235:685d5f11838f 256 return HAL_OK;
mbed_official 235:685d5f11838f 257 }
mbed_official 235:685d5f11838f 258
mbed_official 235:685d5f11838f 259 /**
mbed_official 235:685d5f11838f 260 * @brief Initializes the TIM Base MSP.
mbed_official 235:685d5f11838f 261 * @param htim: pointer to a TIM_HandleTypeDef structure that contains
mbed_official 235:685d5f11838f 262 * the configuration information for TIM module.
mbed_official 235:685d5f11838f 263 * @retval None
mbed_official 235:685d5f11838f 264 */
mbed_official 235:685d5f11838f 265 __weak void HAL_TIM_Base_MspInit(TIM_HandleTypeDef *htim)
mbed_official 235:685d5f11838f 266 {
mbed_official 235:685d5f11838f 267 /* NOTE : This function Should not be modified, when the callback is needed,
mbed_official 235:685d5f11838f 268 the HAL_TIM_Base_MspInit could be implemented in the user file
mbed_official 235:685d5f11838f 269 */
mbed_official 235:685d5f11838f 270 }
mbed_official 235:685d5f11838f 271
mbed_official 235:685d5f11838f 272 /**
mbed_official 235:685d5f11838f 273 * @brief DeInitializes TIM Base MSP.
mbed_official 235:685d5f11838f 274 * @param htim: pointer to a TIM_HandleTypeDef structure that contains
mbed_official 235:685d5f11838f 275 * the configuration information for TIM module.
mbed_official 235:685d5f11838f 276 * @retval None
mbed_official 235:685d5f11838f 277 */
mbed_official 235:685d5f11838f 278 __weak void HAL_TIM_Base_MspDeInit(TIM_HandleTypeDef *htim)
mbed_official 235:685d5f11838f 279 {
mbed_official 235:685d5f11838f 280 /* NOTE : This function Should not be modified, when the callback is needed,
mbed_official 235:685d5f11838f 281 the HAL_TIM_Base_MspDeInit could be implemented in the user file
mbed_official 235:685d5f11838f 282 */
mbed_official 235:685d5f11838f 283 }
mbed_official 235:685d5f11838f 284
mbed_official 235:685d5f11838f 285 /**
mbed_official 235:685d5f11838f 286 * @brief Starts the TIM Base generation.
mbed_official 235:685d5f11838f 287 * @param htim: pointer to a TIM_HandleTypeDef structure that contains
mbed_official 235:685d5f11838f 288 * the configuration information for TIM module.
mbed_official 235:685d5f11838f 289 * @retval HAL status
mbed_official 235:685d5f11838f 290 */
mbed_official 235:685d5f11838f 291 HAL_StatusTypeDef HAL_TIM_Base_Start(TIM_HandleTypeDef *htim)
mbed_official 235:685d5f11838f 292 {
mbed_official 235:685d5f11838f 293 /* Check the parameters */
mbed_official 235:685d5f11838f 294 assert_param(IS_TIM_INSTANCE(htim->Instance));
mbed_official 235:685d5f11838f 295
mbed_official 235:685d5f11838f 296 /* Set the TIM state */
mbed_official 235:685d5f11838f 297 htim->State= HAL_TIM_STATE_BUSY;
mbed_official 235:685d5f11838f 298
mbed_official 235:685d5f11838f 299 /* Enable the Peripheral */
mbed_official 235:685d5f11838f 300 __HAL_TIM_ENABLE(htim);
mbed_official 235:685d5f11838f 301
mbed_official 235:685d5f11838f 302 /* Change the TIM state*/
mbed_official 235:685d5f11838f 303 htim->State= HAL_TIM_STATE_READY;
mbed_official 235:685d5f11838f 304
mbed_official 235:685d5f11838f 305 /* Return function status */
mbed_official 235:685d5f11838f 306 return HAL_OK;
mbed_official 235:685d5f11838f 307 }
mbed_official 235:685d5f11838f 308
mbed_official 235:685d5f11838f 309 /**
mbed_official 235:685d5f11838f 310 * @brief Stops the TIM Base generation.
mbed_official 235:685d5f11838f 311 * @param htim: pointer to a TIM_HandleTypeDef structure that contains
mbed_official 235:685d5f11838f 312 * the configuration information for TIM module.
mbed_official 235:685d5f11838f 313 * @retval HAL status
mbed_official 235:685d5f11838f 314 */
mbed_official 235:685d5f11838f 315 HAL_StatusTypeDef HAL_TIM_Base_Stop(TIM_HandleTypeDef *htim)
mbed_official 235:685d5f11838f 316 {
mbed_official 235:685d5f11838f 317 /* Check the parameters */
mbed_official 235:685d5f11838f 318 assert_param(IS_TIM_INSTANCE(htim->Instance));
mbed_official 235:685d5f11838f 319
mbed_official 235:685d5f11838f 320 /* Set the TIM state */
mbed_official 235:685d5f11838f 321 htim->State= HAL_TIM_STATE_BUSY;
mbed_official 235:685d5f11838f 322
mbed_official 235:685d5f11838f 323 /* Disable the Peripheral */
mbed_official 235:685d5f11838f 324 __HAL_TIM_DISABLE(htim);
mbed_official 235:685d5f11838f 325
mbed_official 235:685d5f11838f 326 /* Change the TIM state*/
mbed_official 235:685d5f11838f 327 htim->State= HAL_TIM_STATE_READY;
mbed_official 235:685d5f11838f 328
mbed_official 235:685d5f11838f 329 /* Return function status */
mbed_official 235:685d5f11838f 330 return HAL_OK;
mbed_official 235:685d5f11838f 331 }
mbed_official 235:685d5f11838f 332
mbed_official 235:685d5f11838f 333 /**
mbed_official 235:685d5f11838f 334 * @brief Starts the TIM Base generation in interrupt mode.
mbed_official 235:685d5f11838f 335 * @param htim: pointer to a TIM_HandleTypeDef structure that contains
mbed_official 235:685d5f11838f 336 * the configuration information for TIM module.
mbed_official 235:685d5f11838f 337 * @retval HAL status
mbed_official 235:685d5f11838f 338 */
mbed_official 235:685d5f11838f 339 HAL_StatusTypeDef HAL_TIM_Base_Start_IT(TIM_HandleTypeDef *htim)
mbed_official 235:685d5f11838f 340 {
mbed_official 235:685d5f11838f 341 /* Check the parameters */
mbed_official 235:685d5f11838f 342 assert_param(IS_TIM_INSTANCE(htim->Instance));
mbed_official 235:685d5f11838f 343
mbed_official 235:685d5f11838f 344 /* Enable the TIM Update interrupt */
mbed_official 235:685d5f11838f 345 __HAL_TIM_ENABLE_IT(htim, TIM_IT_UPDATE);
mbed_official 235:685d5f11838f 346
mbed_official 235:685d5f11838f 347 /* Enable the Peripheral */
mbed_official 235:685d5f11838f 348 __HAL_TIM_ENABLE(htim);
mbed_official 235:685d5f11838f 349
mbed_official 235:685d5f11838f 350 /* Return function status */
mbed_official 235:685d5f11838f 351 return HAL_OK;
mbed_official 235:685d5f11838f 352 }
mbed_official 235:685d5f11838f 353
mbed_official 235:685d5f11838f 354 /**
mbed_official 235:685d5f11838f 355 * @brief Stops the TIM Base generation in interrupt mode.
mbed_official 235:685d5f11838f 356 * @param htim: pointer to a TIM_HandleTypeDef structure that contains
mbed_official 235:685d5f11838f 357 * the configuration information for TIM module.
mbed_official 235:685d5f11838f 358 * @retval HAL status
mbed_official 235:685d5f11838f 359 */
mbed_official 235:685d5f11838f 360 HAL_StatusTypeDef HAL_TIM_Base_Stop_IT(TIM_HandleTypeDef *htim)
mbed_official 235:685d5f11838f 361 {
mbed_official 235:685d5f11838f 362 /* Check the parameters */
mbed_official 235:685d5f11838f 363 assert_param(IS_TIM_INSTANCE(htim->Instance));
mbed_official 235:685d5f11838f 364 /* Disable the TIM Update interrupt */
mbed_official 235:685d5f11838f 365 __HAL_TIM_DISABLE_IT(htim, TIM_IT_UPDATE);
mbed_official 235:685d5f11838f 366
mbed_official 235:685d5f11838f 367 /* Disable the Peripheral */
mbed_official 235:685d5f11838f 368 __HAL_TIM_DISABLE(htim);
mbed_official 235:685d5f11838f 369
mbed_official 235:685d5f11838f 370 /* Return function status */
mbed_official 235:685d5f11838f 371 return HAL_OK;
mbed_official 235:685d5f11838f 372 }
mbed_official 235:685d5f11838f 373
mbed_official 235:685d5f11838f 374 /**
mbed_official 235:685d5f11838f 375 * @brief Starts the TIM Base generation in DMA mode.
mbed_official 235:685d5f11838f 376 * @param htim: pointer to a TIM_HandleTypeDef structure that contains
mbed_official 235:685d5f11838f 377 * the configuration information for TIM module.
mbed_official 235:685d5f11838f 378 * @param pData: The source Buffer address.
mbed_official 235:685d5f11838f 379 * @param Length: The length of data to be transferred from memory to peripheral.
mbed_official 235:685d5f11838f 380 * @retval HAL status
mbed_official 235:685d5f11838f 381 */
mbed_official 235:685d5f11838f 382 HAL_StatusTypeDef HAL_TIM_Base_Start_DMA(TIM_HandleTypeDef *htim, uint32_t *pData, uint16_t Length)
mbed_official 235:685d5f11838f 383 {
mbed_official 235:685d5f11838f 384 /* Check the parameters */
mbed_official 235:685d5f11838f 385 assert_param(IS_TIM_DMA_INSTANCE(htim->Instance));
mbed_official 235:685d5f11838f 386
mbed_official 235:685d5f11838f 387 if((htim->State == HAL_TIM_STATE_BUSY))
mbed_official 235:685d5f11838f 388 {
mbed_official 235:685d5f11838f 389 return HAL_BUSY;
mbed_official 235:685d5f11838f 390 }
mbed_official 235:685d5f11838f 391 else if((htim->State == HAL_TIM_STATE_READY))
mbed_official 235:685d5f11838f 392 {
mbed_official 235:685d5f11838f 393 if((pData == 0 ) && (Length > 0))
mbed_official 235:685d5f11838f 394 {
mbed_official 235:685d5f11838f 395 return HAL_ERROR;
mbed_official 235:685d5f11838f 396 }
mbed_official 235:685d5f11838f 397 else
mbed_official 235:685d5f11838f 398 {
mbed_official 235:685d5f11838f 399 htim->State = HAL_TIM_STATE_BUSY;
mbed_official 235:685d5f11838f 400 }
mbed_official 235:685d5f11838f 401 }
mbed_official 235:685d5f11838f 402 /* Set the DMA Period elapsed callback */
mbed_official 235:685d5f11838f 403 htim->hdma[TIM_DMA_ID_UPDATE]->XferCpltCallback = TIM_DMAPeriodElapsedCplt;
mbed_official 235:685d5f11838f 404
mbed_official 235:685d5f11838f 405 /* Set the DMA error callback */
mbed_official 235:685d5f11838f 406 htim->hdma[TIM_DMA_ID_UPDATE]->XferErrorCallback = HAL_TIM_DMAError ;
mbed_official 235:685d5f11838f 407
mbed_official 235:685d5f11838f 408 /* Enable the DMA Stream */
mbed_official 235:685d5f11838f 409 HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_UPDATE], (uint32_t)pData, (uint32_t)&htim->Instance->ARR, Length);
mbed_official 235:685d5f11838f 410
mbed_official 235:685d5f11838f 411 /* Enable the TIM Update DMA request */
mbed_official 235:685d5f11838f 412 __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_UPDATE);
mbed_official 235:685d5f11838f 413
mbed_official 235:685d5f11838f 414 /* Enable the Peripheral */
mbed_official 235:685d5f11838f 415 __HAL_TIM_ENABLE(htim);
mbed_official 235:685d5f11838f 416
mbed_official 235:685d5f11838f 417 /* Return function status */
mbed_official 235:685d5f11838f 418 return HAL_OK;
mbed_official 235:685d5f11838f 419 }
mbed_official 235:685d5f11838f 420
mbed_official 235:685d5f11838f 421 /**
mbed_official 235:685d5f11838f 422 * @brief Stops the TIM Base generation in DMA mode.
mbed_official 235:685d5f11838f 423 * @param htim: pointer to a TIM_HandleTypeDef structure that contains
mbed_official 235:685d5f11838f 424 * the configuration information for TIM module.
mbed_official 235:685d5f11838f 425 * @retval HAL status
mbed_official 235:685d5f11838f 426 */
mbed_official 235:685d5f11838f 427 HAL_StatusTypeDef HAL_TIM_Base_Stop_DMA(TIM_HandleTypeDef *htim)
mbed_official 235:685d5f11838f 428 {
mbed_official 235:685d5f11838f 429 /* Check the parameters */
mbed_official 235:685d5f11838f 430 assert_param(IS_TIM_DMA_INSTANCE(htim->Instance));
mbed_official 235:685d5f11838f 431
mbed_official 235:685d5f11838f 432 /* Disable the TIM Update DMA request */
mbed_official 235:685d5f11838f 433 __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_UPDATE);
mbed_official 235:685d5f11838f 434
mbed_official 235:685d5f11838f 435 /* Disable the Peripheral */
mbed_official 235:685d5f11838f 436 __HAL_TIM_DISABLE(htim);
mbed_official 235:685d5f11838f 437
mbed_official 235:685d5f11838f 438 /* Change the htim state */
mbed_official 235:685d5f11838f 439 htim->State = HAL_TIM_STATE_READY;
mbed_official 235:685d5f11838f 440
mbed_official 235:685d5f11838f 441 /* Return function status */
mbed_official 235:685d5f11838f 442 return HAL_OK;
mbed_official 235:685d5f11838f 443 }
mbed_official 235:685d5f11838f 444
mbed_official 235:685d5f11838f 445 /**
mbed_official 235:685d5f11838f 446 * @}
mbed_official 235:685d5f11838f 447 */
mbed_official 235:685d5f11838f 448
mbed_official 235:685d5f11838f 449 /** @defgroup TIM_Group2 Time Output Compare functions
mbed_official 235:685d5f11838f 450 * @brief Time Output Compare functions
mbed_official 235:685d5f11838f 451 *
mbed_official 235:685d5f11838f 452 @verbatim
mbed_official 235:685d5f11838f 453 ==============================================================================
mbed_official 235:685d5f11838f 454 ##### Time Output Compare functions #####
mbed_official 235:685d5f11838f 455 ==============================================================================
mbed_official 235:685d5f11838f 456 [..]
mbed_official 235:685d5f11838f 457 This section provides functions allowing to:
mbed_official 235:685d5f11838f 458 (+) Initialize and configure the TIM Output Compare.
mbed_official 235:685d5f11838f 459 (+) De-initialize the TIM Output Compare.
mbed_official 235:685d5f11838f 460 (+) Start the Time Output Compare.
mbed_official 235:685d5f11838f 461 (+) Stop the Time Output Compare.
mbed_official 235:685d5f11838f 462 (+) Start the Time Output Compare and enable interrupt.
mbed_official 235:685d5f11838f 463 (+) Stop the Time Output Compare and disable interrupt.
mbed_official 235:685d5f11838f 464 (+) Start the Time Output Compare and enable DMA transfer.
mbed_official 235:685d5f11838f 465 (+) Stop the Time Output Compare and disable DMA transfer.
mbed_official 235:685d5f11838f 466
mbed_official 235:685d5f11838f 467 @endverbatim
mbed_official 235:685d5f11838f 468 * @{
mbed_official 235:685d5f11838f 469 */
mbed_official 235:685d5f11838f 470 /**
mbed_official 235:685d5f11838f 471 * @brief Initializes the TIM Output Compare according to the specified
mbed_official 235:685d5f11838f 472 * parameters in the TIM_HandleTypeDef and create the associated handle.
mbed_official 235:685d5f11838f 473 * @param htim: pointer to a TIM_HandleTypeDef structure that contains
mbed_official 235:685d5f11838f 474 * the configuration information for TIM module.
mbed_official 235:685d5f11838f 475 * @retval HAL status
mbed_official 235:685d5f11838f 476 */
mbed_official 235:685d5f11838f 477 HAL_StatusTypeDef HAL_TIM_OC_Init(TIM_HandleTypeDef* htim)
mbed_official 235:685d5f11838f 478 {
mbed_official 235:685d5f11838f 479 /* Check the TIM handle allocation */
mbed_official 235:685d5f11838f 480 if(htim == NULL)
mbed_official 235:685d5f11838f 481 {
mbed_official 235:685d5f11838f 482 return HAL_ERROR;
mbed_official 235:685d5f11838f 483 }
mbed_official 235:685d5f11838f 484
mbed_official 235:685d5f11838f 485 /* Check the parameters */
mbed_official 235:685d5f11838f 486 assert_param(IS_TIM_INSTANCE(htim->Instance));
mbed_official 235:685d5f11838f 487 assert_param(IS_TIM_COUNTER_MODE(htim->Init.CounterMode));
mbed_official 235:685d5f11838f 488 assert_param(IS_TIM_CLOCKDIVISION_DIV(htim->Init.ClockDivision));
mbed_official 235:685d5f11838f 489
mbed_official 235:685d5f11838f 490 if(htim->State == HAL_TIM_STATE_RESET)
mbed_official 235:685d5f11838f 491 {
mbed_official 235:685d5f11838f 492 /* Init the low level hardware : GPIO, CLOCK, NVIC and DMA */
mbed_official 235:685d5f11838f 493 HAL_TIM_OC_MspInit(htim);
mbed_official 235:685d5f11838f 494 }
mbed_official 235:685d5f11838f 495
mbed_official 235:685d5f11838f 496 /* Set the TIM state */
mbed_official 235:685d5f11838f 497 htim->State= HAL_TIM_STATE_BUSY;
mbed_official 235:685d5f11838f 498
mbed_official 235:685d5f11838f 499 /* Init the base time for the Output Compare */
mbed_official 235:685d5f11838f 500 TIM_Base_SetConfig(htim->Instance, &htim->Init);
mbed_official 235:685d5f11838f 501
mbed_official 235:685d5f11838f 502 /* Initialize the TIM state*/
mbed_official 235:685d5f11838f 503 htim->State= HAL_TIM_STATE_READY;
mbed_official 235:685d5f11838f 504
mbed_official 235:685d5f11838f 505 return HAL_OK;
mbed_official 235:685d5f11838f 506 }
mbed_official 235:685d5f11838f 507
mbed_official 235:685d5f11838f 508 /**
mbed_official 235:685d5f11838f 509 * @brief DeInitializes the TIM peripheral
mbed_official 235:685d5f11838f 510 * @param htim: pointer to a TIM_HandleTypeDef structure that contains
mbed_official 235:685d5f11838f 511 * the configuration information for TIM module.
mbed_official 235:685d5f11838f 512 * @retval HAL status
mbed_official 235:685d5f11838f 513 */
mbed_official 235:685d5f11838f 514 HAL_StatusTypeDef HAL_TIM_OC_DeInit(TIM_HandleTypeDef *htim)
mbed_official 235:685d5f11838f 515 {
mbed_official 235:685d5f11838f 516 /* Check the parameters */
mbed_official 235:685d5f11838f 517 assert_param(IS_TIM_INSTANCE(htim->Instance));
mbed_official 235:685d5f11838f 518
mbed_official 235:685d5f11838f 519 htim->State = HAL_TIM_STATE_BUSY;
mbed_official 235:685d5f11838f 520
mbed_official 235:685d5f11838f 521 /* Disable the TIM Peripheral Clock */
mbed_official 235:685d5f11838f 522 __HAL_TIM_DISABLE(htim);
mbed_official 235:685d5f11838f 523
mbed_official 235:685d5f11838f 524 /* DeInit the low level hardware: GPIO, CLOCK, NVIC and DMA */
mbed_official 235:685d5f11838f 525 HAL_TIM_OC_MspDeInit(htim);
mbed_official 235:685d5f11838f 526
mbed_official 235:685d5f11838f 527 /* Change TIM state */
mbed_official 235:685d5f11838f 528 htim->State = HAL_TIM_STATE_RESET;
mbed_official 235:685d5f11838f 529
mbed_official 235:685d5f11838f 530 /* Release Lock */
mbed_official 235:685d5f11838f 531 __HAL_UNLOCK(htim);
mbed_official 235:685d5f11838f 532
mbed_official 235:685d5f11838f 533 return HAL_OK;
mbed_official 235:685d5f11838f 534 }
mbed_official 235:685d5f11838f 535
mbed_official 235:685d5f11838f 536 /**
mbed_official 235:685d5f11838f 537 * @brief Initializes the TIM Output Compare MSP.
mbed_official 235:685d5f11838f 538 * @param htim: pointer to a TIM_HandleTypeDef structure that contains
mbed_official 235:685d5f11838f 539 * the configuration information for TIM module.
mbed_official 235:685d5f11838f 540 * @retval None
mbed_official 235:685d5f11838f 541 */
mbed_official 235:685d5f11838f 542 __weak void HAL_TIM_OC_MspInit(TIM_HandleTypeDef *htim)
mbed_official 235:685d5f11838f 543 {
mbed_official 235:685d5f11838f 544 /* NOTE : This function Should not be modified, when the callback is needed,
mbed_official 235:685d5f11838f 545 the HAL_TIM_OC_MspInit could be implemented in the user file
mbed_official 235:685d5f11838f 546 */
mbed_official 235:685d5f11838f 547 }
mbed_official 235:685d5f11838f 548
mbed_official 235:685d5f11838f 549 /**
mbed_official 235:685d5f11838f 550 * @brief DeInitializes TIM Output Compare MSP.
mbed_official 235:685d5f11838f 551 * @param htim: pointer to a TIM_HandleTypeDef structure that contains
mbed_official 235:685d5f11838f 552 * the configuration information for TIM module.
mbed_official 235:685d5f11838f 553 * @retval None
mbed_official 235:685d5f11838f 554 */
mbed_official 235:685d5f11838f 555 __weak void HAL_TIM_OC_MspDeInit(TIM_HandleTypeDef *htim)
mbed_official 235:685d5f11838f 556 {
mbed_official 235:685d5f11838f 557 /* NOTE : This function Should not be modified, when the callback is needed,
mbed_official 235:685d5f11838f 558 the HAL_TIM_OC_MspDeInit could be implemented in the user file
mbed_official 235:685d5f11838f 559 */
mbed_official 235:685d5f11838f 560 }
mbed_official 235:685d5f11838f 561
mbed_official 235:685d5f11838f 562 /**
mbed_official 235:685d5f11838f 563 * @brief Starts the TIM Output Compare signal generation.
mbed_official 235:685d5f11838f 564 * @param htim: pointer to a TIM_HandleTypeDef structure that contains
mbed_official 235:685d5f11838f 565 * the configuration information for TIM module.
mbed_official 235:685d5f11838f 566 * @param Channel: TIM Channel to be enabled.
mbed_official 235:685d5f11838f 567 * This parameter can be one of the following values:
mbed_official 235:685d5f11838f 568 * @arg TIM_CHANNEL_1: TIM Channel 1 selected
mbed_official 235:685d5f11838f 569 * @arg TIM_CHANNEL_2: TIM Channel 2 selected
mbed_official 235:685d5f11838f 570 * @arg TIM_CHANNEL_3: TIM Channel 3 selected
mbed_official 235:685d5f11838f 571 * @arg TIM_CHANNEL_4: TIM Channel 4 selected
mbed_official 235:685d5f11838f 572 * @retval HAL status
mbed_official 235:685d5f11838f 573 */
mbed_official 235:685d5f11838f 574 HAL_StatusTypeDef HAL_TIM_OC_Start(TIM_HandleTypeDef *htim, uint32_t Channel)
mbed_official 235:685d5f11838f 575 {
mbed_official 235:685d5f11838f 576 /* Check the parameters */
mbed_official 235:685d5f11838f 577 assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel));
mbed_official 235:685d5f11838f 578
mbed_official 235:685d5f11838f 579 /* Enable the Output compare channel */
mbed_official 235:685d5f11838f 580 TIM_CCxChannelCmd(htim->Instance, Channel, TIM_CCx_ENABLE);
mbed_official 235:685d5f11838f 581
mbed_official 235:685d5f11838f 582 if(IS_TIM_ADVANCED_INSTANCE(htim->Instance) != RESET)
mbed_official 235:685d5f11838f 583 {
mbed_official 235:685d5f11838f 584 /* Enable the main output */
mbed_official 235:685d5f11838f 585 __HAL_TIM_MOE_ENABLE(htim);
mbed_official 235:685d5f11838f 586 }
mbed_official 235:685d5f11838f 587
mbed_official 235:685d5f11838f 588 /* Enable the Peripheral */
mbed_official 235:685d5f11838f 589 __HAL_TIM_ENABLE(htim);
mbed_official 235:685d5f11838f 590
mbed_official 235:685d5f11838f 591 /* Return function status */
mbed_official 235:685d5f11838f 592 return HAL_OK;
mbed_official 235:685d5f11838f 593 }
mbed_official 235:685d5f11838f 594
mbed_official 235:685d5f11838f 595 /**
mbed_official 235:685d5f11838f 596 * @brief Stops the TIM Output Compare signal generation.
mbed_official 235:685d5f11838f 597 * @param htim: pointer to a TIM_HandleTypeDef structure that contains
mbed_official 235:685d5f11838f 598 * the configuration information for TIM module.
mbed_official 235:685d5f11838f 599 * @param Channel: TIM Channel to be disabled.
mbed_official 235:685d5f11838f 600 * This parameter can be one of the following values:
mbed_official 235:685d5f11838f 601 * @arg TIM_CHANNEL_1: TIM Channel 1 selected
mbed_official 235:685d5f11838f 602 * @arg TIM_CHANNEL_2: TIM Channel 2 selected
mbed_official 235:685d5f11838f 603 * @arg TIM_CHANNEL_3: TIM Channel 3 selected
mbed_official 235:685d5f11838f 604 * @arg TIM_CHANNEL_4: TIM Channel 4 selected
mbed_official 235:685d5f11838f 605 * @retval HAL status
mbed_official 235:685d5f11838f 606 */
mbed_official 235:685d5f11838f 607 HAL_StatusTypeDef HAL_TIM_OC_Stop(TIM_HandleTypeDef *htim, uint32_t Channel)
mbed_official 235:685d5f11838f 608 {
mbed_official 235:685d5f11838f 609 /* Check the parameters */
mbed_official 235:685d5f11838f 610 assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel));
mbed_official 235:685d5f11838f 611
mbed_official 235:685d5f11838f 612 /* Disable the Output compare channel */
mbed_official 235:685d5f11838f 613 TIM_CCxChannelCmd(htim->Instance, Channel, TIM_CCx_DISABLE);
mbed_official 235:685d5f11838f 614
mbed_official 235:685d5f11838f 615 if(IS_TIM_ADVANCED_INSTANCE(htim->Instance) != RESET)
mbed_official 235:685d5f11838f 616 {
mbed_official 235:685d5f11838f 617 /* Disable the Main Ouput */
mbed_official 235:685d5f11838f 618 __HAL_TIM_MOE_DISABLE(htim);
mbed_official 235:685d5f11838f 619 }
mbed_official 235:685d5f11838f 620
mbed_official 235:685d5f11838f 621 /* Disable the Peripheral */
mbed_official 235:685d5f11838f 622 __HAL_TIM_DISABLE(htim);
mbed_official 235:685d5f11838f 623
mbed_official 235:685d5f11838f 624 /* Return function status */
mbed_official 235:685d5f11838f 625 return HAL_OK;
mbed_official 235:685d5f11838f 626 }
mbed_official 235:685d5f11838f 627
mbed_official 235:685d5f11838f 628 /**
mbed_official 235:685d5f11838f 629 * @brief Starts the TIM Output Compare signal generation in interrupt mode.
mbed_official 235:685d5f11838f 630 * @param htim: pointer to a TIM_HandleTypeDef structure that contains
mbed_official 235:685d5f11838f 631 * the configuration information for TIM module.
mbed_official 235:685d5f11838f 632 * @param Channel: TIM Channel to be enabled.
mbed_official 235:685d5f11838f 633 * This parameter can be one of the following values:
mbed_official 235:685d5f11838f 634 * @arg TIM_CHANNEL_1: TIM Channel 1 selected
mbed_official 235:685d5f11838f 635 * @arg TIM_CHANNEL_2: TIM Channel 2 selected
mbed_official 235:685d5f11838f 636 * @arg TIM_CHANNEL_3: TIM Channel 3 selected
mbed_official 235:685d5f11838f 637 * @arg TIM_CHANNEL_4: TIM Channel 4 selected
mbed_official 235:685d5f11838f 638 * @retval HAL status
mbed_official 235:685d5f11838f 639 */
mbed_official 235:685d5f11838f 640 HAL_StatusTypeDef HAL_TIM_OC_Start_IT(TIM_HandleTypeDef *htim, uint32_t Channel)
mbed_official 235:685d5f11838f 641 {
mbed_official 235:685d5f11838f 642 /* Check the parameters */
mbed_official 235:685d5f11838f 643 assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel));
mbed_official 235:685d5f11838f 644
mbed_official 235:685d5f11838f 645 switch (Channel)
mbed_official 235:685d5f11838f 646 {
mbed_official 235:685d5f11838f 647 case TIM_CHANNEL_1:
mbed_official 235:685d5f11838f 648 {
mbed_official 235:685d5f11838f 649 /* Enable the TIM Capture/Compare 1 interrupt */
mbed_official 235:685d5f11838f 650 __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC1);
mbed_official 235:685d5f11838f 651 }
mbed_official 235:685d5f11838f 652 break;
mbed_official 235:685d5f11838f 653
mbed_official 235:685d5f11838f 654 case TIM_CHANNEL_2:
mbed_official 235:685d5f11838f 655 {
mbed_official 235:685d5f11838f 656 /* Enable the TIM Capture/Compare 2 interrupt */
mbed_official 235:685d5f11838f 657 __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC2);
mbed_official 235:685d5f11838f 658 }
mbed_official 235:685d5f11838f 659 break;
mbed_official 235:685d5f11838f 660
mbed_official 235:685d5f11838f 661 case TIM_CHANNEL_3:
mbed_official 235:685d5f11838f 662 {
mbed_official 235:685d5f11838f 663 /* Enable the TIM Capture/Compare 3 interrupt */
mbed_official 235:685d5f11838f 664 __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC3);
mbed_official 235:685d5f11838f 665 }
mbed_official 235:685d5f11838f 666 break;
mbed_official 235:685d5f11838f 667
mbed_official 235:685d5f11838f 668 case TIM_CHANNEL_4:
mbed_official 235:685d5f11838f 669 {
mbed_official 235:685d5f11838f 670 /* Enable the TIM Capture/Compare 4 interrupt */
mbed_official 235:685d5f11838f 671 __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC4);
mbed_official 235:685d5f11838f 672 }
mbed_official 235:685d5f11838f 673 break;
mbed_official 235:685d5f11838f 674
mbed_official 235:685d5f11838f 675 default:
mbed_official 235:685d5f11838f 676 break;
mbed_official 235:685d5f11838f 677 }
mbed_official 235:685d5f11838f 678
mbed_official 235:685d5f11838f 679 /* Enable the Output compare channel */
mbed_official 235:685d5f11838f 680 TIM_CCxChannelCmd(htim->Instance, Channel, TIM_CCx_ENABLE);
mbed_official 235:685d5f11838f 681
mbed_official 235:685d5f11838f 682 if(IS_TIM_ADVANCED_INSTANCE(htim->Instance) != RESET)
mbed_official 235:685d5f11838f 683 {
mbed_official 235:685d5f11838f 684 /* Enable the main output */
mbed_official 235:685d5f11838f 685 __HAL_TIM_MOE_ENABLE(htim);
mbed_official 235:685d5f11838f 686 }
mbed_official 235:685d5f11838f 687
mbed_official 235:685d5f11838f 688 /* Enable the Peripheral */
mbed_official 235:685d5f11838f 689 __HAL_TIM_ENABLE(htim);
mbed_official 235:685d5f11838f 690
mbed_official 235:685d5f11838f 691 /* Return function status */
mbed_official 235:685d5f11838f 692 return HAL_OK;
mbed_official 235:685d5f11838f 693 }
mbed_official 235:685d5f11838f 694
mbed_official 235:685d5f11838f 695 /**
mbed_official 235:685d5f11838f 696 * @brief Stops the TIM Output Compare signal generation in interrupt mode.
mbed_official 235:685d5f11838f 697 * @param htim: pointer to a TIM_HandleTypeDef structure that contains
mbed_official 235:685d5f11838f 698 * the configuration information for TIM module.
mbed_official 235:685d5f11838f 699 * @param Channel: TIM Channel to be disabled.
mbed_official 235:685d5f11838f 700 * This parameter can be one of the following values:
mbed_official 235:685d5f11838f 701 * @arg TIM_CHANNEL_1: TIM Channel 1 selected
mbed_official 235:685d5f11838f 702 * @arg TIM_CHANNEL_2: TIM Channel 2 selected
mbed_official 235:685d5f11838f 703 * @arg TIM_CHANNEL_3: TIM Channel 3 selected
mbed_official 235:685d5f11838f 704 * @arg TIM_CHANNEL_4: TIM Channel 4 selected
mbed_official 235:685d5f11838f 705 * @retval HAL status
mbed_official 235:685d5f11838f 706 */
mbed_official 235:685d5f11838f 707 HAL_StatusTypeDef HAL_TIM_OC_Stop_IT(TIM_HandleTypeDef *htim, uint32_t Channel)
mbed_official 235:685d5f11838f 708 {
mbed_official 235:685d5f11838f 709 /* Check the parameters */
mbed_official 235:685d5f11838f 710 assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel));
mbed_official 235:685d5f11838f 711
mbed_official 235:685d5f11838f 712 switch (Channel)
mbed_official 235:685d5f11838f 713 {
mbed_official 235:685d5f11838f 714 case TIM_CHANNEL_1:
mbed_official 235:685d5f11838f 715 {
mbed_official 235:685d5f11838f 716 /* Disable the TIM Capture/Compare 1 interrupt */
mbed_official 235:685d5f11838f 717 __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC1);
mbed_official 235:685d5f11838f 718 }
mbed_official 235:685d5f11838f 719 break;
mbed_official 235:685d5f11838f 720
mbed_official 235:685d5f11838f 721 case TIM_CHANNEL_2:
mbed_official 235:685d5f11838f 722 {
mbed_official 235:685d5f11838f 723 /* Disable the TIM Capture/Compare 2 interrupt */
mbed_official 235:685d5f11838f 724 __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC2);
mbed_official 235:685d5f11838f 725 }
mbed_official 235:685d5f11838f 726 break;
mbed_official 235:685d5f11838f 727
mbed_official 235:685d5f11838f 728 case TIM_CHANNEL_3:
mbed_official 235:685d5f11838f 729 {
mbed_official 235:685d5f11838f 730 /* Disable the TIM Capture/Compare 3 interrupt */
mbed_official 235:685d5f11838f 731 __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC3);
mbed_official 235:685d5f11838f 732 }
mbed_official 235:685d5f11838f 733 break;
mbed_official 235:685d5f11838f 734
mbed_official 235:685d5f11838f 735 case TIM_CHANNEL_4:
mbed_official 235:685d5f11838f 736 {
mbed_official 235:685d5f11838f 737 /* Disable the TIM Capture/Compare 4 interrupt */
mbed_official 235:685d5f11838f 738 __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC4);
mbed_official 235:685d5f11838f 739 }
mbed_official 235:685d5f11838f 740 break;
mbed_official 235:685d5f11838f 741
mbed_official 235:685d5f11838f 742 default:
mbed_official 235:685d5f11838f 743 break;
mbed_official 235:685d5f11838f 744 }
mbed_official 235:685d5f11838f 745
mbed_official 235:685d5f11838f 746 /* Disable the Output compare channel */
mbed_official 235:685d5f11838f 747 TIM_CCxChannelCmd(htim->Instance, Channel, TIM_CCx_DISABLE);
mbed_official 235:685d5f11838f 748
mbed_official 235:685d5f11838f 749 if(IS_TIM_ADVANCED_INSTANCE(htim->Instance) != RESET)
mbed_official 235:685d5f11838f 750 {
mbed_official 235:685d5f11838f 751 /* Disable the Main Ouput */
mbed_official 235:685d5f11838f 752 __HAL_TIM_MOE_DISABLE(htim);
mbed_official 235:685d5f11838f 753 }
mbed_official 235:685d5f11838f 754
mbed_official 235:685d5f11838f 755 /* Disable the Peripheral */
mbed_official 235:685d5f11838f 756 __HAL_TIM_DISABLE(htim);
mbed_official 235:685d5f11838f 757
mbed_official 235:685d5f11838f 758 /* Return function status */
mbed_official 235:685d5f11838f 759 return HAL_OK;
mbed_official 235:685d5f11838f 760 }
mbed_official 235:685d5f11838f 761
mbed_official 235:685d5f11838f 762 /**
mbed_official 235:685d5f11838f 763 * @brief Starts the TIM Output Compare signal generation in DMA mode.
mbed_official 235:685d5f11838f 764 * @param htim: pointer to a TIM_HandleTypeDef structure that contains
mbed_official 235:685d5f11838f 765 * the configuration information for TIM module.
mbed_official 235:685d5f11838f 766 * @param Channel: TIM Channel to be enabled.
mbed_official 235:685d5f11838f 767 * This parameter can be one of the following values:
mbed_official 235:685d5f11838f 768 * @arg TIM_CHANNEL_1: TIM Channel 1 selected
mbed_official 235:685d5f11838f 769 * @arg TIM_CHANNEL_2: TIM Channel 2 selected
mbed_official 235:685d5f11838f 770 * @arg TIM_CHANNEL_3: TIM Channel 3 selected
mbed_official 235:685d5f11838f 771 * @arg TIM_CHANNEL_4: TIM Channel 4 selected
mbed_official 235:685d5f11838f 772 * @param pData: The source Buffer address.
mbed_official 235:685d5f11838f 773 * @param Length: The length of data to be transferred from memory to TIM peripheral
mbed_official 235:685d5f11838f 774 * @retval HAL status
mbed_official 235:685d5f11838f 775 */
mbed_official 235:685d5f11838f 776 HAL_StatusTypeDef HAL_TIM_OC_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Channel, uint32_t *pData, uint16_t Length)
mbed_official 235:685d5f11838f 777 {
mbed_official 235:685d5f11838f 778 /* Check the parameters */
mbed_official 235:685d5f11838f 779 assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel));
mbed_official 235:685d5f11838f 780
mbed_official 235:685d5f11838f 781 if((htim->State == HAL_TIM_STATE_BUSY))
mbed_official 235:685d5f11838f 782 {
mbed_official 235:685d5f11838f 783 return HAL_BUSY;
mbed_official 235:685d5f11838f 784 }
mbed_official 235:685d5f11838f 785 else if((htim->State == HAL_TIM_STATE_READY))
mbed_official 235:685d5f11838f 786 {
mbed_official 235:685d5f11838f 787 if(((uint32_t)pData == 0 ) && (Length > 0))
mbed_official 235:685d5f11838f 788 {
mbed_official 235:685d5f11838f 789 return HAL_ERROR;
mbed_official 235:685d5f11838f 790 }
mbed_official 235:685d5f11838f 791 else
mbed_official 235:685d5f11838f 792 {
mbed_official 235:685d5f11838f 793 htim->State = HAL_TIM_STATE_BUSY;
mbed_official 235:685d5f11838f 794 }
mbed_official 235:685d5f11838f 795 }
mbed_official 235:685d5f11838f 796 switch (Channel)
mbed_official 235:685d5f11838f 797 {
mbed_official 235:685d5f11838f 798 case TIM_CHANNEL_1:
mbed_official 235:685d5f11838f 799 {
mbed_official 235:685d5f11838f 800 /* Set the DMA Period elapsed callback */
mbed_official 235:685d5f11838f 801 htim->hdma[TIM_DMA_ID_CC1]->XferCpltCallback = HAL_TIM_DMADelayPulseCplt;
mbed_official 235:685d5f11838f 802
mbed_official 235:685d5f11838f 803 /* Set the DMA error callback */
mbed_official 235:685d5f11838f 804 htim->hdma[TIM_DMA_ID_CC1]->XferErrorCallback = HAL_TIM_DMAError ;
mbed_official 235:685d5f11838f 805
mbed_official 235:685d5f11838f 806 /* Enable the DMA Stream */
mbed_official 235:685d5f11838f 807 HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC1], (uint32_t)pData, (uint32_t)&htim->Instance->CCR1, Length);
mbed_official 235:685d5f11838f 808
mbed_official 235:685d5f11838f 809 /* Enable the TIM Capture/Compare 1 DMA request */
mbed_official 235:685d5f11838f 810 __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC1);
mbed_official 235:685d5f11838f 811 }
mbed_official 235:685d5f11838f 812 break;
mbed_official 235:685d5f11838f 813
mbed_official 235:685d5f11838f 814 case TIM_CHANNEL_2:
mbed_official 235:685d5f11838f 815 {
mbed_official 235:685d5f11838f 816 /* Set the DMA Period elapsed callback */
mbed_official 235:685d5f11838f 817 htim->hdma[TIM_DMA_ID_CC2]->XferCpltCallback = HAL_TIM_DMADelayPulseCplt;
mbed_official 235:685d5f11838f 818
mbed_official 235:685d5f11838f 819 /* Set the DMA error callback */
mbed_official 235:685d5f11838f 820 htim->hdma[TIM_DMA_ID_CC2]->XferErrorCallback = HAL_TIM_DMAError ;
mbed_official 235:685d5f11838f 821
mbed_official 235:685d5f11838f 822 /* Enable the DMA Stream */
mbed_official 235:685d5f11838f 823 HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC2], (uint32_t)pData, (uint32_t)&htim->Instance->CCR2, Length);
mbed_official 235:685d5f11838f 824
mbed_official 235:685d5f11838f 825 /* Enable the TIM Capture/Compare 2 DMA request */
mbed_official 235:685d5f11838f 826 __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC2);
mbed_official 235:685d5f11838f 827 }
mbed_official 235:685d5f11838f 828 break;
mbed_official 235:685d5f11838f 829
mbed_official 235:685d5f11838f 830 case TIM_CHANNEL_3:
mbed_official 235:685d5f11838f 831 {
mbed_official 235:685d5f11838f 832 /* Set the DMA Period elapsed callback */
mbed_official 235:685d5f11838f 833 htim->hdma[TIM_DMA_ID_CC3]->XferCpltCallback = HAL_TIM_DMADelayPulseCplt;
mbed_official 235:685d5f11838f 834
mbed_official 235:685d5f11838f 835 /* Set the DMA error callback */
mbed_official 235:685d5f11838f 836 htim->hdma[TIM_DMA_ID_CC3]->XferErrorCallback = HAL_TIM_DMAError ;
mbed_official 235:685d5f11838f 837
mbed_official 235:685d5f11838f 838 /* Enable the DMA Stream */
mbed_official 235:685d5f11838f 839 HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC3], (uint32_t)pData, (uint32_t)&htim->Instance->CCR3,Length);
mbed_official 235:685d5f11838f 840
mbed_official 235:685d5f11838f 841 /* Enable the TIM Capture/Compare 3 DMA request */
mbed_official 235:685d5f11838f 842 __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC3);
mbed_official 235:685d5f11838f 843 }
mbed_official 235:685d5f11838f 844 break;
mbed_official 235:685d5f11838f 845
mbed_official 235:685d5f11838f 846 case TIM_CHANNEL_4:
mbed_official 235:685d5f11838f 847 {
mbed_official 235:685d5f11838f 848 /* Set the DMA Period elapsed callback */
mbed_official 235:685d5f11838f 849 htim->hdma[TIM_DMA_ID_CC4]->XferCpltCallback = HAL_TIM_DMADelayPulseCplt;
mbed_official 235:685d5f11838f 850
mbed_official 235:685d5f11838f 851 /* Set the DMA error callback */
mbed_official 235:685d5f11838f 852 htim->hdma[TIM_DMA_ID_CC4]->XferErrorCallback = HAL_TIM_DMAError ;
mbed_official 235:685d5f11838f 853
mbed_official 235:685d5f11838f 854 /* Enable the DMA Stream */
mbed_official 235:685d5f11838f 855 HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC4], (uint32_t)pData, (uint32_t)&htim->Instance->CCR4, Length);
mbed_official 235:685d5f11838f 856
mbed_official 235:685d5f11838f 857 /* Enable the TIM Capture/Compare 4 DMA request */
mbed_official 235:685d5f11838f 858 __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC4);
mbed_official 235:685d5f11838f 859 }
mbed_official 235:685d5f11838f 860 break;
mbed_official 235:685d5f11838f 861
mbed_official 235:685d5f11838f 862 default:
mbed_official 235:685d5f11838f 863 break;
mbed_official 235:685d5f11838f 864 }
mbed_official 235:685d5f11838f 865
mbed_official 235:685d5f11838f 866 /* Enable the Output compare channel */
mbed_official 235:685d5f11838f 867 TIM_CCxChannelCmd(htim->Instance, Channel, TIM_CCx_ENABLE);
mbed_official 235:685d5f11838f 868
mbed_official 235:685d5f11838f 869 if(IS_TIM_ADVANCED_INSTANCE(htim->Instance) != RESET)
mbed_official 235:685d5f11838f 870 {
mbed_official 235:685d5f11838f 871 /* Enable the main output */
mbed_official 235:685d5f11838f 872 __HAL_TIM_MOE_ENABLE(htim);
mbed_official 235:685d5f11838f 873 }
mbed_official 235:685d5f11838f 874
mbed_official 235:685d5f11838f 875 /* Enable the Peripheral */
mbed_official 235:685d5f11838f 876 __HAL_TIM_ENABLE(htim);
mbed_official 235:685d5f11838f 877
mbed_official 235:685d5f11838f 878 /* Return function status */
mbed_official 235:685d5f11838f 879 return HAL_OK;
mbed_official 235:685d5f11838f 880 }
mbed_official 235:685d5f11838f 881
mbed_official 235:685d5f11838f 882 /**
mbed_official 235:685d5f11838f 883 * @brief Stops the TIM Output Compare signal generation in DMA mode.
mbed_official 235:685d5f11838f 884 * @param htim: pointer to a TIM_HandleTypeDef structure that contains
mbed_official 235:685d5f11838f 885 * the configuration information for TIM module.
mbed_official 235:685d5f11838f 886 * @param Channel: TIM Channel to be disabled.
mbed_official 235:685d5f11838f 887 * This parameter can be one of the following values:
mbed_official 235:685d5f11838f 888 * @arg TIM_CHANNEL_1: TIM Channel 1 selected
mbed_official 235:685d5f11838f 889 * @arg TIM_CHANNEL_2: TIM Channel 2 selected
mbed_official 235:685d5f11838f 890 * @arg TIM_CHANNEL_3: TIM Channel 3 selected
mbed_official 235:685d5f11838f 891 * @arg TIM_CHANNEL_4: TIM Channel 4 selected
mbed_official 235:685d5f11838f 892 * @retval HAL status
mbed_official 235:685d5f11838f 893 */
mbed_official 235:685d5f11838f 894 HAL_StatusTypeDef HAL_TIM_OC_Stop_DMA(TIM_HandleTypeDef *htim, uint32_t Channel)
mbed_official 235:685d5f11838f 895 {
mbed_official 235:685d5f11838f 896 /* Check the parameters */
mbed_official 235:685d5f11838f 897 assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel));
mbed_official 235:685d5f11838f 898
mbed_official 235:685d5f11838f 899 switch (Channel)
mbed_official 235:685d5f11838f 900 {
mbed_official 235:685d5f11838f 901 case TIM_CHANNEL_1:
mbed_official 235:685d5f11838f 902 {
mbed_official 235:685d5f11838f 903 /* Disable the TIM Capture/Compare 1 DMA request */
mbed_official 235:685d5f11838f 904 __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC1);
mbed_official 235:685d5f11838f 905 }
mbed_official 235:685d5f11838f 906 break;
mbed_official 235:685d5f11838f 907
mbed_official 235:685d5f11838f 908 case TIM_CHANNEL_2:
mbed_official 235:685d5f11838f 909 {
mbed_official 235:685d5f11838f 910 /* Disable the TIM Capture/Compare 2 DMA request */
mbed_official 235:685d5f11838f 911 __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC2);
mbed_official 235:685d5f11838f 912 }
mbed_official 235:685d5f11838f 913 break;
mbed_official 235:685d5f11838f 914
mbed_official 235:685d5f11838f 915 case TIM_CHANNEL_3:
mbed_official 235:685d5f11838f 916 {
mbed_official 235:685d5f11838f 917 /* Disable the TIM Capture/Compare 3 DMA request */
mbed_official 235:685d5f11838f 918 __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC3);
mbed_official 235:685d5f11838f 919 }
mbed_official 235:685d5f11838f 920 break;
mbed_official 235:685d5f11838f 921
mbed_official 235:685d5f11838f 922 case TIM_CHANNEL_4:
mbed_official 235:685d5f11838f 923 {
mbed_official 235:685d5f11838f 924 /* Disable the TIM Capture/Compare 4 interrupt */
mbed_official 235:685d5f11838f 925 __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC4);
mbed_official 235:685d5f11838f 926 }
mbed_official 235:685d5f11838f 927 break;
mbed_official 235:685d5f11838f 928
mbed_official 235:685d5f11838f 929 default:
mbed_official 235:685d5f11838f 930 break;
mbed_official 235:685d5f11838f 931 }
mbed_official 235:685d5f11838f 932
mbed_official 235:685d5f11838f 933 /* Disable the Output compare channel */
mbed_official 235:685d5f11838f 934 TIM_CCxChannelCmd(htim->Instance, Channel, TIM_CCx_DISABLE);
mbed_official 235:685d5f11838f 935
mbed_official 235:685d5f11838f 936 if(IS_TIM_ADVANCED_INSTANCE(htim->Instance) != RESET)
mbed_official 235:685d5f11838f 937 {
mbed_official 235:685d5f11838f 938 /* Disable the Main Ouput */
mbed_official 235:685d5f11838f 939 __HAL_TIM_MOE_DISABLE(htim);
mbed_official 235:685d5f11838f 940 }
mbed_official 235:685d5f11838f 941
mbed_official 235:685d5f11838f 942 /* Disable the Peripheral */
mbed_official 235:685d5f11838f 943 __HAL_TIM_DISABLE(htim);
mbed_official 235:685d5f11838f 944
mbed_official 235:685d5f11838f 945 /* Change the htim state */
mbed_official 235:685d5f11838f 946 htim->State = HAL_TIM_STATE_READY;
mbed_official 235:685d5f11838f 947
mbed_official 235:685d5f11838f 948 /* Return function status */
mbed_official 235:685d5f11838f 949 return HAL_OK;
mbed_official 235:685d5f11838f 950 }
mbed_official 235:685d5f11838f 951
mbed_official 235:685d5f11838f 952 /**
mbed_official 235:685d5f11838f 953 * @}
mbed_official 235:685d5f11838f 954 */
mbed_official 235:685d5f11838f 955
mbed_official 235:685d5f11838f 956 /** @defgroup TIM_Group3 Time PWM functions
mbed_official 235:685d5f11838f 957 * @brief Time PWM functions
mbed_official 235:685d5f11838f 958 *
mbed_official 235:685d5f11838f 959 @verbatim
mbed_official 235:685d5f11838f 960 ==============================================================================
mbed_official 235:685d5f11838f 961 ##### Time PWM functions #####
mbed_official 235:685d5f11838f 962 ==============================================================================
mbed_official 235:685d5f11838f 963 [..]
mbed_official 235:685d5f11838f 964 This section provides functions allowing to:
mbed_official 235:685d5f11838f 965 (+) Initialize and configure the TIM OPWM.
mbed_official 235:685d5f11838f 966 (+) De-initialize the TIM PWM.
mbed_official 235:685d5f11838f 967 (+) Start the Time PWM.
mbed_official 235:685d5f11838f 968 (+) Stop the Time PWM.
mbed_official 235:685d5f11838f 969 (+) Start the Time PWM and enable interrupt.
mbed_official 235:685d5f11838f 970 (+) Stop the Time PWM and disable interrupt.
mbed_official 235:685d5f11838f 971 (+) Start the Time PWM and enable DMA transfer.
mbed_official 235:685d5f11838f 972 (+) Stop the Time PWM and disable DMA transfer.
mbed_official 235:685d5f11838f 973
mbed_official 235:685d5f11838f 974 @endverbatim
mbed_official 235:685d5f11838f 975 * @{
mbed_official 235:685d5f11838f 976 */
mbed_official 235:685d5f11838f 977 /**
mbed_official 235:685d5f11838f 978 * @brief Initializes the TIM PWM Time Base according to the specified
mbed_official 235:685d5f11838f 979 * parameters in the TIM_HandleTypeDef and create the associated handle.
mbed_official 235:685d5f11838f 980 * @param htim: pointer to a TIM_HandleTypeDef structure that contains
mbed_official 235:685d5f11838f 981 * the configuration information for TIM module.
mbed_official 235:685d5f11838f 982 * @retval HAL status
mbed_official 235:685d5f11838f 983 */
mbed_official 235:685d5f11838f 984 HAL_StatusTypeDef HAL_TIM_PWM_Init(TIM_HandleTypeDef *htim)
mbed_official 235:685d5f11838f 985 {
mbed_official 235:685d5f11838f 986 /* Check the TIM handle allocation */
mbed_official 235:685d5f11838f 987 if(htim == NULL)
mbed_official 235:685d5f11838f 988 {
mbed_official 235:685d5f11838f 989 return HAL_ERROR;
mbed_official 235:685d5f11838f 990 }
mbed_official 235:685d5f11838f 991
mbed_official 235:685d5f11838f 992 /* Check the parameters */
mbed_official 235:685d5f11838f 993 assert_param(IS_TIM_INSTANCE(htim->Instance));
mbed_official 235:685d5f11838f 994 assert_param(IS_TIM_COUNTER_MODE(htim->Init.CounterMode));
mbed_official 235:685d5f11838f 995 assert_param(IS_TIM_CLOCKDIVISION_DIV(htim->Init.ClockDivision));
mbed_official 235:685d5f11838f 996
mbed_official 235:685d5f11838f 997 if(htim->State == HAL_TIM_STATE_RESET)
mbed_official 235:685d5f11838f 998 {
mbed_official 235:685d5f11838f 999 /* Init the low level hardware : GPIO, CLOCK, NVIC and DMA */
mbed_official 235:685d5f11838f 1000 HAL_TIM_PWM_MspInit(htim);
mbed_official 235:685d5f11838f 1001 }
mbed_official 235:685d5f11838f 1002
mbed_official 235:685d5f11838f 1003 /* Set the TIM state */
mbed_official 235:685d5f11838f 1004 htim->State= HAL_TIM_STATE_BUSY;
mbed_official 235:685d5f11838f 1005
mbed_official 235:685d5f11838f 1006 /* Init the base time for the PWM */
mbed_official 235:685d5f11838f 1007 TIM_Base_SetConfig(htim->Instance, &htim->Init);
mbed_official 235:685d5f11838f 1008
mbed_official 235:685d5f11838f 1009 /* Initialize the TIM state*/
mbed_official 235:685d5f11838f 1010 htim->State= HAL_TIM_STATE_READY;
mbed_official 235:685d5f11838f 1011
mbed_official 235:685d5f11838f 1012 return HAL_OK;
mbed_official 235:685d5f11838f 1013 }
mbed_official 235:685d5f11838f 1014
mbed_official 235:685d5f11838f 1015 /**
mbed_official 235:685d5f11838f 1016 * @brief DeInitializes the TIM peripheral
mbed_official 235:685d5f11838f 1017 * @param htim: pointer to a TIM_HandleTypeDef structure that contains
mbed_official 235:685d5f11838f 1018 * the configuration information for TIM module.
mbed_official 235:685d5f11838f 1019 * @retval HAL status
mbed_official 235:685d5f11838f 1020 */
mbed_official 235:685d5f11838f 1021 HAL_StatusTypeDef HAL_TIM_PWM_DeInit(TIM_HandleTypeDef *htim)
mbed_official 235:685d5f11838f 1022 {
mbed_official 235:685d5f11838f 1023 /* Check the parameters */
mbed_official 235:685d5f11838f 1024 assert_param(IS_TIM_INSTANCE(htim->Instance));
mbed_official 235:685d5f11838f 1025
mbed_official 235:685d5f11838f 1026 htim->State = HAL_TIM_STATE_BUSY;
mbed_official 235:685d5f11838f 1027
mbed_official 235:685d5f11838f 1028 /* Disable the TIM Peripheral Clock */
mbed_official 235:685d5f11838f 1029 __HAL_TIM_DISABLE(htim);
mbed_official 235:685d5f11838f 1030
mbed_official 235:685d5f11838f 1031 /* DeInit the low level hardware: GPIO, CLOCK, NVIC and DMA */
mbed_official 235:685d5f11838f 1032 HAL_TIM_PWM_MspDeInit(htim);
mbed_official 235:685d5f11838f 1033
mbed_official 235:685d5f11838f 1034 /* Change TIM state */
mbed_official 235:685d5f11838f 1035 htim->State = HAL_TIM_STATE_RESET;
mbed_official 235:685d5f11838f 1036
mbed_official 235:685d5f11838f 1037 /* Release Lock */
mbed_official 235:685d5f11838f 1038 __HAL_UNLOCK(htim);
mbed_official 235:685d5f11838f 1039
mbed_official 235:685d5f11838f 1040 return HAL_OK;
mbed_official 235:685d5f11838f 1041 }
mbed_official 235:685d5f11838f 1042
mbed_official 235:685d5f11838f 1043 /**
mbed_official 235:685d5f11838f 1044 * @brief Initializes the TIM PWM MSP.
mbed_official 235:685d5f11838f 1045 * @param htim: pointer to a TIM_HandleTypeDef structure that contains
mbed_official 235:685d5f11838f 1046 * the configuration information for TIM module.
mbed_official 235:685d5f11838f 1047 * @retval None
mbed_official 235:685d5f11838f 1048 */
mbed_official 235:685d5f11838f 1049 __weak void HAL_TIM_PWM_MspInit(TIM_HandleTypeDef *htim)
mbed_official 235:685d5f11838f 1050 {
mbed_official 235:685d5f11838f 1051 /* NOTE : This function Should not be modified, when the callback is needed,
mbed_official 235:685d5f11838f 1052 the HAL_TIM_PWM_MspInit could be implemented in the user file
mbed_official 235:685d5f11838f 1053 */
mbed_official 235:685d5f11838f 1054 }
mbed_official 235:685d5f11838f 1055
mbed_official 235:685d5f11838f 1056 /**
mbed_official 235:685d5f11838f 1057 * @brief DeInitializes TIM PWM MSP.
mbed_official 235:685d5f11838f 1058 * @param htim: pointer to a TIM_HandleTypeDef structure that contains
mbed_official 235:685d5f11838f 1059 * the configuration information for TIM module.
mbed_official 235:685d5f11838f 1060 * @retval None
mbed_official 235:685d5f11838f 1061 */
mbed_official 235:685d5f11838f 1062 __weak void HAL_TIM_PWM_MspDeInit(TIM_HandleTypeDef *htim)
mbed_official 235:685d5f11838f 1063 {
mbed_official 235:685d5f11838f 1064 /* NOTE : This function Should not be modified, when the callback is needed,
mbed_official 235:685d5f11838f 1065 the HAL_TIM_PWM_MspDeInit could be implemented in the user file
mbed_official 235:685d5f11838f 1066 */
mbed_official 235:685d5f11838f 1067 }
mbed_official 235:685d5f11838f 1068
mbed_official 235:685d5f11838f 1069 /**
mbed_official 235:685d5f11838f 1070 * @brief Starts the PWM signal generation.
mbed_official 235:685d5f11838f 1071 * @param htim: pointer to a TIM_HandleTypeDef structure that contains
mbed_official 235:685d5f11838f 1072 * the configuration information for TIM module.
mbed_official 235:685d5f11838f 1073 * @param Channel: TIM Channels to be enabled.
mbed_official 235:685d5f11838f 1074 * This parameter can be one of the following values:
mbed_official 235:685d5f11838f 1075 * @arg TIM_CHANNEL_1: TIM Channel 1 selected
mbed_official 235:685d5f11838f 1076 * @arg TIM_CHANNEL_2: TIM Channel 2 selected
mbed_official 235:685d5f11838f 1077 * @arg TIM_CHANNEL_3: TIM Channel 3 selected
mbed_official 235:685d5f11838f 1078 * @arg TIM_CHANNEL_4: TIM Channel 4 selected
mbed_official 235:685d5f11838f 1079 * @retval HAL status
mbed_official 235:685d5f11838f 1080 */
mbed_official 235:685d5f11838f 1081 HAL_StatusTypeDef HAL_TIM_PWM_Start(TIM_HandleTypeDef *htim, uint32_t Channel)
mbed_official 235:685d5f11838f 1082 {
mbed_official 235:685d5f11838f 1083 /* Check the parameters */
mbed_official 235:685d5f11838f 1084 assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel));
mbed_official 235:685d5f11838f 1085
mbed_official 235:685d5f11838f 1086 /* Enable the Capture compare channel */
mbed_official 235:685d5f11838f 1087 TIM_CCxChannelCmd(htim->Instance, Channel, TIM_CCx_ENABLE);
mbed_official 235:685d5f11838f 1088
mbed_official 235:685d5f11838f 1089 if(IS_TIM_ADVANCED_INSTANCE(htim->Instance) != RESET)
mbed_official 235:685d5f11838f 1090 {
mbed_official 235:685d5f11838f 1091 /* Enable the main output */
mbed_official 235:685d5f11838f 1092 __HAL_TIM_MOE_ENABLE(htim);
mbed_official 235:685d5f11838f 1093 }
mbed_official 235:685d5f11838f 1094
mbed_official 235:685d5f11838f 1095 /* Enable the Peripheral */
mbed_official 235:685d5f11838f 1096 __HAL_TIM_ENABLE(htim);
mbed_official 235:685d5f11838f 1097
mbed_official 235:685d5f11838f 1098 /* Return function status */
mbed_official 235:685d5f11838f 1099 return HAL_OK;
mbed_official 235:685d5f11838f 1100 }
mbed_official 235:685d5f11838f 1101
mbed_official 235:685d5f11838f 1102 /**
mbed_official 235:685d5f11838f 1103 * @brief Stops the PWM signal generation.
mbed_official 235:685d5f11838f 1104 * @param htim: pointer to a TIM_HandleTypeDef structure that contains
mbed_official 235:685d5f11838f 1105 * the configuration information for TIM module.
mbed_official 235:685d5f11838f 1106 * @param Channel: TIM Channels to be disabled.
mbed_official 235:685d5f11838f 1107 * This parameter can be one of the following values:
mbed_official 235:685d5f11838f 1108 * @arg TIM_CHANNEL_1: TIM Channel 1 selected
mbed_official 235:685d5f11838f 1109 * @arg TIM_CHANNEL_2: TIM Channel 2 selected
mbed_official 235:685d5f11838f 1110 * @arg TIM_CHANNEL_3: TIM Channel 3 selected
mbed_official 235:685d5f11838f 1111 * @arg TIM_CHANNEL_4: TIM Channel 4 selected
mbed_official 235:685d5f11838f 1112 * @retval HAL status
mbed_official 235:685d5f11838f 1113 */
mbed_official 235:685d5f11838f 1114 HAL_StatusTypeDef HAL_TIM_PWM_Stop(TIM_HandleTypeDef *htim, uint32_t Channel)
mbed_official 235:685d5f11838f 1115 {
mbed_official 235:685d5f11838f 1116 /* Check the parameters */
mbed_official 235:685d5f11838f 1117 assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel));
mbed_official 235:685d5f11838f 1118
mbed_official 235:685d5f11838f 1119 /* Disable the Capture compare channel */
mbed_official 235:685d5f11838f 1120 TIM_CCxChannelCmd(htim->Instance, Channel, TIM_CCx_DISABLE);
mbed_official 235:685d5f11838f 1121
mbed_official 235:685d5f11838f 1122 if(IS_TIM_ADVANCED_INSTANCE(htim->Instance) != RESET)
mbed_official 235:685d5f11838f 1123 {
mbed_official 235:685d5f11838f 1124 /* Disable the Main Ouput */
mbed_official 235:685d5f11838f 1125 __HAL_TIM_MOE_DISABLE(htim);
mbed_official 235:685d5f11838f 1126 }
mbed_official 235:685d5f11838f 1127
mbed_official 235:685d5f11838f 1128 /* Disable the Peripheral */
mbed_official 235:685d5f11838f 1129 __HAL_TIM_DISABLE(htim);
mbed_official 235:685d5f11838f 1130
mbed_official 235:685d5f11838f 1131 /* Change the htim state */
mbed_official 235:685d5f11838f 1132 htim->State = HAL_TIM_STATE_READY;
mbed_official 235:685d5f11838f 1133
mbed_official 235:685d5f11838f 1134 /* Return function status */
mbed_official 235:685d5f11838f 1135 return HAL_OK;
mbed_official 235:685d5f11838f 1136 }
mbed_official 235:685d5f11838f 1137
mbed_official 235:685d5f11838f 1138 /**
mbed_official 235:685d5f11838f 1139 * @brief Starts the PWM signal generation in interrupt mode.
mbed_official 235:685d5f11838f 1140 * @param htim: pointer to a TIM_HandleTypeDef structure that contains
mbed_official 235:685d5f11838f 1141 * the configuration information for TIM module.
mbed_official 235:685d5f11838f 1142 * @param Channel: TIM Channel to be disabled.
mbed_official 235:685d5f11838f 1143 * This parameter can be one of the following values:
mbed_official 235:685d5f11838f 1144 * @arg TIM_CHANNEL_1: TIM Channel 1 selected
mbed_official 235:685d5f11838f 1145 * @arg TIM_CHANNEL_2: TIM Channel 2 selected
mbed_official 235:685d5f11838f 1146 * @arg TIM_CHANNEL_3: TIM Channel 3 selected
mbed_official 235:685d5f11838f 1147 * @arg TIM_CHANNEL_4: TIM Channel 4 selected
mbed_official 235:685d5f11838f 1148 * @retval HAL status
mbed_official 235:685d5f11838f 1149 */
mbed_official 235:685d5f11838f 1150 HAL_StatusTypeDef HAL_TIM_PWM_Start_IT(TIM_HandleTypeDef *htim, uint32_t Channel)
mbed_official 235:685d5f11838f 1151 {
mbed_official 235:685d5f11838f 1152 /* Check the parameters */
mbed_official 235:685d5f11838f 1153 assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel));
mbed_official 235:685d5f11838f 1154
mbed_official 235:685d5f11838f 1155 switch (Channel)
mbed_official 235:685d5f11838f 1156 {
mbed_official 235:685d5f11838f 1157 case TIM_CHANNEL_1:
mbed_official 235:685d5f11838f 1158 {
mbed_official 235:685d5f11838f 1159 /* Enable the TIM Capture/Compare 1 interrupt */
mbed_official 235:685d5f11838f 1160 __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC1);
mbed_official 235:685d5f11838f 1161 }
mbed_official 235:685d5f11838f 1162 break;
mbed_official 235:685d5f11838f 1163
mbed_official 235:685d5f11838f 1164 case TIM_CHANNEL_2:
mbed_official 235:685d5f11838f 1165 {
mbed_official 235:685d5f11838f 1166 /* Enable the TIM Capture/Compare 2 interrupt */
mbed_official 235:685d5f11838f 1167 __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC2);
mbed_official 235:685d5f11838f 1168 }
mbed_official 235:685d5f11838f 1169 break;
mbed_official 235:685d5f11838f 1170
mbed_official 235:685d5f11838f 1171 case TIM_CHANNEL_3:
mbed_official 235:685d5f11838f 1172 {
mbed_official 235:685d5f11838f 1173 /* Enable the TIM Capture/Compare 3 interrupt */
mbed_official 235:685d5f11838f 1174 __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC3);
mbed_official 235:685d5f11838f 1175 }
mbed_official 235:685d5f11838f 1176 break;
mbed_official 235:685d5f11838f 1177
mbed_official 235:685d5f11838f 1178 case TIM_CHANNEL_4:
mbed_official 235:685d5f11838f 1179 {
mbed_official 235:685d5f11838f 1180 /* Enable the TIM Capture/Compare 4 interrupt */
mbed_official 235:685d5f11838f 1181 __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC4);
mbed_official 235:685d5f11838f 1182 }
mbed_official 235:685d5f11838f 1183 break;
mbed_official 235:685d5f11838f 1184
mbed_official 235:685d5f11838f 1185 default:
mbed_official 235:685d5f11838f 1186 break;
mbed_official 235:685d5f11838f 1187 }
mbed_official 235:685d5f11838f 1188
mbed_official 235:685d5f11838f 1189 /* Enable the Capture compare channel */
mbed_official 235:685d5f11838f 1190 TIM_CCxChannelCmd(htim->Instance, Channel, TIM_CCx_ENABLE);
mbed_official 235:685d5f11838f 1191
mbed_official 235:685d5f11838f 1192 if(IS_TIM_ADVANCED_INSTANCE(htim->Instance) != RESET)
mbed_official 235:685d5f11838f 1193 {
mbed_official 235:685d5f11838f 1194 /* Enable the main output */
mbed_official 235:685d5f11838f 1195 __HAL_TIM_MOE_ENABLE(htim);
mbed_official 235:685d5f11838f 1196 }
mbed_official 235:685d5f11838f 1197
mbed_official 235:685d5f11838f 1198 /* Enable the Peripheral */
mbed_official 235:685d5f11838f 1199 __HAL_TIM_ENABLE(htim);
mbed_official 235:685d5f11838f 1200
mbed_official 235:685d5f11838f 1201 /* Return function status */
mbed_official 235:685d5f11838f 1202 return HAL_OK;
mbed_official 235:685d5f11838f 1203 }
mbed_official 235:685d5f11838f 1204
mbed_official 235:685d5f11838f 1205 /**
mbed_official 235:685d5f11838f 1206 * @brief Stops the PWM signal generation in interrupt mode.
mbed_official 235:685d5f11838f 1207 * @param htim: pointer to a TIM_HandleTypeDef structure that contains
mbed_official 235:685d5f11838f 1208 * the configuration information for TIM module.
mbed_official 235:685d5f11838f 1209 * @param Channel: TIM Channels to be disabled.
mbed_official 235:685d5f11838f 1210 * This parameter can be one of the following values:
mbed_official 235:685d5f11838f 1211 * @arg TIM_CHANNEL_1: TIM Channel 1 selected
mbed_official 235:685d5f11838f 1212 * @arg TIM_CHANNEL_2: TIM Channel 2 selected
mbed_official 235:685d5f11838f 1213 * @arg TIM_CHANNEL_3: TIM Channel 3 selected
mbed_official 235:685d5f11838f 1214 * @arg TIM_CHANNEL_4: TIM Channel 4 selected
mbed_official 235:685d5f11838f 1215 * @retval HAL status
mbed_official 235:685d5f11838f 1216 */
mbed_official 235:685d5f11838f 1217 HAL_StatusTypeDef HAL_TIM_PWM_Stop_IT (TIM_HandleTypeDef *htim, uint32_t Channel)
mbed_official 235:685d5f11838f 1218 {
mbed_official 235:685d5f11838f 1219 /* Check the parameters */
mbed_official 235:685d5f11838f 1220 assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel));
mbed_official 235:685d5f11838f 1221
mbed_official 235:685d5f11838f 1222 switch (Channel)
mbed_official 235:685d5f11838f 1223 {
mbed_official 235:685d5f11838f 1224 case TIM_CHANNEL_1:
mbed_official 235:685d5f11838f 1225 {
mbed_official 235:685d5f11838f 1226 /* Disable the TIM Capture/Compare 1 interrupt */
mbed_official 235:685d5f11838f 1227 __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC1);
mbed_official 235:685d5f11838f 1228 }
mbed_official 235:685d5f11838f 1229 break;
mbed_official 235:685d5f11838f 1230
mbed_official 235:685d5f11838f 1231 case TIM_CHANNEL_2:
mbed_official 235:685d5f11838f 1232 {
mbed_official 235:685d5f11838f 1233 /* Disable the TIM Capture/Compare 2 interrupt */
mbed_official 235:685d5f11838f 1234 __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC2);
mbed_official 235:685d5f11838f 1235 }
mbed_official 235:685d5f11838f 1236 break;
mbed_official 235:685d5f11838f 1237
mbed_official 235:685d5f11838f 1238 case TIM_CHANNEL_3:
mbed_official 235:685d5f11838f 1239 {
mbed_official 235:685d5f11838f 1240 /* Disable the TIM Capture/Compare 3 interrupt */
mbed_official 235:685d5f11838f 1241 __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC3);
mbed_official 235:685d5f11838f 1242 }
mbed_official 235:685d5f11838f 1243 break;
mbed_official 235:685d5f11838f 1244
mbed_official 235:685d5f11838f 1245 case TIM_CHANNEL_4:
mbed_official 235:685d5f11838f 1246 {
mbed_official 235:685d5f11838f 1247 /* Disable the TIM Capture/Compare 4 interrupt */
mbed_official 235:685d5f11838f 1248 __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC4);
mbed_official 235:685d5f11838f 1249 }
mbed_official 235:685d5f11838f 1250 break;
mbed_official 235:685d5f11838f 1251
mbed_official 235:685d5f11838f 1252 default:
mbed_official 235:685d5f11838f 1253 break;
mbed_official 235:685d5f11838f 1254 }
mbed_official 235:685d5f11838f 1255
mbed_official 235:685d5f11838f 1256 /* Disable the Capture compare channel */
mbed_official 235:685d5f11838f 1257 TIM_CCxChannelCmd(htim->Instance, Channel, TIM_CCx_DISABLE);
mbed_official 235:685d5f11838f 1258
mbed_official 235:685d5f11838f 1259 if(IS_TIM_ADVANCED_INSTANCE(htim->Instance) != RESET)
mbed_official 235:685d5f11838f 1260 {
mbed_official 235:685d5f11838f 1261 /* Disable the Main Ouput */
mbed_official 235:685d5f11838f 1262 __HAL_TIM_MOE_DISABLE(htim);
mbed_official 235:685d5f11838f 1263 }
mbed_official 235:685d5f11838f 1264
mbed_official 235:685d5f11838f 1265 /* Disable the Peripheral */
mbed_official 235:685d5f11838f 1266 __HAL_TIM_DISABLE(htim);
mbed_official 235:685d5f11838f 1267
mbed_official 235:685d5f11838f 1268 /* Return function status */
mbed_official 235:685d5f11838f 1269 return HAL_OK;
mbed_official 235:685d5f11838f 1270 }
mbed_official 235:685d5f11838f 1271
mbed_official 235:685d5f11838f 1272 /**
mbed_official 235:685d5f11838f 1273 * @brief Starts the TIM PWM signal generation in DMA mode.
mbed_official 235:685d5f11838f 1274 * @param htim: pointer to a TIM_HandleTypeDef structure that contains
mbed_official 235:685d5f11838f 1275 * the configuration information for TIM module.
mbed_official 235:685d5f11838f 1276 * @param Channel: TIM Channels to be enabled.
mbed_official 235:685d5f11838f 1277 * This parameter can be one of the following values:
mbed_official 235:685d5f11838f 1278 * @arg TIM_CHANNEL_1: TIM Channel 1 selected
mbed_official 235:685d5f11838f 1279 * @arg TIM_CHANNEL_2: TIM Channel 2 selected
mbed_official 235:685d5f11838f 1280 * @arg TIM_CHANNEL_3: TIM Channel 3 selected
mbed_official 235:685d5f11838f 1281 * @arg TIM_CHANNEL_4: TIM Channel 4 selected
mbed_official 235:685d5f11838f 1282 * @param pData: The source Buffer address.
mbed_official 235:685d5f11838f 1283 * @param Length: The length of data to be transferred from memory to TIM peripheral
mbed_official 235:685d5f11838f 1284 * @retval HAL status
mbed_official 235:685d5f11838f 1285 */
mbed_official 235:685d5f11838f 1286 HAL_StatusTypeDef HAL_TIM_PWM_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Channel, uint32_t *pData, uint16_t Length)
mbed_official 235:685d5f11838f 1287 {
mbed_official 235:685d5f11838f 1288 /* Check the parameters */
mbed_official 235:685d5f11838f 1289 assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel));
mbed_official 235:685d5f11838f 1290
mbed_official 235:685d5f11838f 1291 if((htim->State == HAL_TIM_STATE_BUSY))
mbed_official 235:685d5f11838f 1292 {
mbed_official 235:685d5f11838f 1293 return HAL_BUSY;
mbed_official 235:685d5f11838f 1294 }
mbed_official 235:685d5f11838f 1295 else if((htim->State == HAL_TIM_STATE_READY))
mbed_official 235:685d5f11838f 1296 {
mbed_official 235:685d5f11838f 1297 if(((uint32_t)pData == 0 ) && (Length > 0))
mbed_official 235:685d5f11838f 1298 {
mbed_official 235:685d5f11838f 1299 return HAL_ERROR;
mbed_official 235:685d5f11838f 1300 }
mbed_official 235:685d5f11838f 1301 else
mbed_official 235:685d5f11838f 1302 {
mbed_official 235:685d5f11838f 1303 htim->State = HAL_TIM_STATE_BUSY;
mbed_official 235:685d5f11838f 1304 }
mbed_official 235:685d5f11838f 1305 }
mbed_official 235:685d5f11838f 1306 switch (Channel)
mbed_official 235:685d5f11838f 1307 {
mbed_official 235:685d5f11838f 1308 case TIM_CHANNEL_1:
mbed_official 235:685d5f11838f 1309 {
mbed_official 235:685d5f11838f 1310 /* Set the DMA Period elapsed callback */
mbed_official 235:685d5f11838f 1311 htim->hdma[TIM_DMA_ID_CC1]->XferCpltCallback = HAL_TIM_DMADelayPulseCplt;
mbed_official 235:685d5f11838f 1312
mbed_official 235:685d5f11838f 1313 /* Set the DMA error callback */
mbed_official 235:685d5f11838f 1314 htim->hdma[TIM_DMA_ID_CC1]->XferErrorCallback = HAL_TIM_DMAError ;
mbed_official 235:685d5f11838f 1315
mbed_official 235:685d5f11838f 1316 /* Enable the DMA Stream */
mbed_official 235:685d5f11838f 1317 HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC1], (uint32_t)pData, (uint32_t)&htim->Instance->CCR1, Length);
mbed_official 235:685d5f11838f 1318
mbed_official 235:685d5f11838f 1319 /* Enable the TIM Capture/Compare 1 DMA request */
mbed_official 235:685d5f11838f 1320 __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC1);
mbed_official 235:685d5f11838f 1321 }
mbed_official 235:685d5f11838f 1322 break;
mbed_official 235:685d5f11838f 1323
mbed_official 235:685d5f11838f 1324 case TIM_CHANNEL_2:
mbed_official 235:685d5f11838f 1325 {
mbed_official 235:685d5f11838f 1326 /* Set the DMA Period elapsed callback */
mbed_official 235:685d5f11838f 1327 htim->hdma[TIM_DMA_ID_CC2]->XferCpltCallback = HAL_TIM_DMADelayPulseCplt;
mbed_official 235:685d5f11838f 1328
mbed_official 235:685d5f11838f 1329 /* Set the DMA error callback */
mbed_official 235:685d5f11838f 1330 htim->hdma[TIM_DMA_ID_CC2]->XferErrorCallback = HAL_TIM_DMAError ;
mbed_official 235:685d5f11838f 1331
mbed_official 235:685d5f11838f 1332 /* Enable the DMA Stream */
mbed_official 235:685d5f11838f 1333 HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC2], (uint32_t)pData, (uint32_t)&htim->Instance->CCR2, Length);
mbed_official 235:685d5f11838f 1334
mbed_official 235:685d5f11838f 1335 /* Enable the TIM Capture/Compare 2 DMA request */
mbed_official 235:685d5f11838f 1336 __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC2);
mbed_official 235:685d5f11838f 1337 }
mbed_official 235:685d5f11838f 1338 break;
mbed_official 235:685d5f11838f 1339
mbed_official 235:685d5f11838f 1340 case TIM_CHANNEL_3:
mbed_official 235:685d5f11838f 1341 {
mbed_official 235:685d5f11838f 1342 /* Set the DMA Period elapsed callback */
mbed_official 235:685d5f11838f 1343 htim->hdma[TIM_DMA_ID_CC3]->XferCpltCallback = HAL_TIM_DMADelayPulseCplt;
mbed_official 235:685d5f11838f 1344
mbed_official 235:685d5f11838f 1345 /* Set the DMA error callback */
mbed_official 235:685d5f11838f 1346 htim->hdma[TIM_DMA_ID_CC3]->XferErrorCallback = HAL_TIM_DMAError ;
mbed_official 235:685d5f11838f 1347
mbed_official 235:685d5f11838f 1348 /* Enable the DMA Stream */
mbed_official 235:685d5f11838f 1349 HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC3], (uint32_t)pData, (uint32_t)&htim->Instance->CCR3,Length);
mbed_official 235:685d5f11838f 1350
mbed_official 235:685d5f11838f 1351 /* Enable the TIM Output Capture/Compare 3 request */
mbed_official 235:685d5f11838f 1352 __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC3);
mbed_official 235:685d5f11838f 1353 }
mbed_official 235:685d5f11838f 1354 break;
mbed_official 235:685d5f11838f 1355
mbed_official 235:685d5f11838f 1356 case TIM_CHANNEL_4:
mbed_official 235:685d5f11838f 1357 {
mbed_official 235:685d5f11838f 1358 /* Set the DMA Period elapsed callback */
mbed_official 235:685d5f11838f 1359 htim->hdma[TIM_DMA_ID_CC4]->XferCpltCallback = HAL_TIM_DMADelayPulseCplt;
mbed_official 235:685d5f11838f 1360
mbed_official 235:685d5f11838f 1361 /* Set the DMA error callback */
mbed_official 235:685d5f11838f 1362 htim->hdma[TIM_DMA_ID_CC4]->XferErrorCallback = HAL_TIM_DMAError ;
mbed_official 235:685d5f11838f 1363
mbed_official 235:685d5f11838f 1364 /* Enable the DMA Stream */
mbed_official 235:685d5f11838f 1365 HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC4], (uint32_t)pData, (uint32_t)&htim->Instance->CCR4, Length);
mbed_official 235:685d5f11838f 1366
mbed_official 235:685d5f11838f 1367 /* Enable the TIM Capture/Compare 4 DMA request */
mbed_official 235:685d5f11838f 1368 __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC4);
mbed_official 235:685d5f11838f 1369 }
mbed_official 235:685d5f11838f 1370 break;
mbed_official 235:685d5f11838f 1371
mbed_official 235:685d5f11838f 1372 default:
mbed_official 235:685d5f11838f 1373 break;
mbed_official 235:685d5f11838f 1374 }
mbed_official 235:685d5f11838f 1375
mbed_official 235:685d5f11838f 1376 /* Enable the Capture compare channel */
mbed_official 235:685d5f11838f 1377 TIM_CCxChannelCmd(htim->Instance, Channel, TIM_CCx_ENABLE);
mbed_official 235:685d5f11838f 1378
mbed_official 235:685d5f11838f 1379 if(IS_TIM_ADVANCED_INSTANCE(htim->Instance) != RESET)
mbed_official 235:685d5f11838f 1380 {
mbed_official 235:685d5f11838f 1381 /* Enable the main output */
mbed_official 235:685d5f11838f 1382 __HAL_TIM_MOE_ENABLE(htim);
mbed_official 235:685d5f11838f 1383 }
mbed_official 235:685d5f11838f 1384
mbed_official 235:685d5f11838f 1385 /* Enable the Peripheral */
mbed_official 235:685d5f11838f 1386 __HAL_TIM_ENABLE(htim);
mbed_official 235:685d5f11838f 1387
mbed_official 235:685d5f11838f 1388 /* Return function status */
mbed_official 235:685d5f11838f 1389 return HAL_OK;
mbed_official 235:685d5f11838f 1390 }
mbed_official 235:685d5f11838f 1391
mbed_official 235:685d5f11838f 1392 /**
mbed_official 235:685d5f11838f 1393 * @brief Stops the TIM PWM signal generation in DMA mode.
mbed_official 235:685d5f11838f 1394 * @param htim: pointer to a TIM_HandleTypeDef structure that contains
mbed_official 235:685d5f11838f 1395 * the configuration information for TIM module.
mbed_official 235:685d5f11838f 1396 * @param Channel: TIM Channels to be disabled.
mbed_official 235:685d5f11838f 1397 * This parameter can be one of the following values:
mbed_official 235:685d5f11838f 1398 * @arg TIM_CHANNEL_1: TIM Channel 1 selected
mbed_official 235:685d5f11838f 1399 * @arg TIM_CHANNEL_2: TIM Channel 2 selected
mbed_official 235:685d5f11838f 1400 * @arg TIM_CHANNEL_3: TIM Channel 3 selected
mbed_official 235:685d5f11838f 1401 * @arg TIM_CHANNEL_4: TIM Channel 4 selected
mbed_official 235:685d5f11838f 1402 * @retval HAL status
mbed_official 235:685d5f11838f 1403 */
mbed_official 235:685d5f11838f 1404 HAL_StatusTypeDef HAL_TIM_PWM_Stop_DMA(TIM_HandleTypeDef *htim, uint32_t Channel)
mbed_official 235:685d5f11838f 1405 {
mbed_official 235:685d5f11838f 1406 /* Check the parameters */
mbed_official 235:685d5f11838f 1407 assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel));
mbed_official 235:685d5f11838f 1408
mbed_official 235:685d5f11838f 1409 switch (Channel)
mbed_official 235:685d5f11838f 1410 {
mbed_official 235:685d5f11838f 1411 case TIM_CHANNEL_1:
mbed_official 235:685d5f11838f 1412 {
mbed_official 235:685d5f11838f 1413 /* Disable the TIM Capture/Compare 1 DMA request */
mbed_official 235:685d5f11838f 1414 __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC1);
mbed_official 235:685d5f11838f 1415 }
mbed_official 235:685d5f11838f 1416 break;
mbed_official 235:685d5f11838f 1417
mbed_official 235:685d5f11838f 1418 case TIM_CHANNEL_2:
mbed_official 235:685d5f11838f 1419 {
mbed_official 235:685d5f11838f 1420 /* Disable the TIM Capture/Compare 2 DMA request */
mbed_official 235:685d5f11838f 1421 __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC2);
mbed_official 235:685d5f11838f 1422 }
mbed_official 235:685d5f11838f 1423 break;
mbed_official 235:685d5f11838f 1424
mbed_official 235:685d5f11838f 1425 case TIM_CHANNEL_3:
mbed_official 235:685d5f11838f 1426 {
mbed_official 235:685d5f11838f 1427 /* Disable the TIM Capture/Compare 3 DMA request */
mbed_official 235:685d5f11838f 1428 __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC3);
mbed_official 235:685d5f11838f 1429 }
mbed_official 235:685d5f11838f 1430 break;
mbed_official 235:685d5f11838f 1431
mbed_official 235:685d5f11838f 1432 case TIM_CHANNEL_4:
mbed_official 235:685d5f11838f 1433 {
mbed_official 235:685d5f11838f 1434 /* Disable the TIM Capture/Compare 4 interrupt */
mbed_official 235:685d5f11838f 1435 __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC4);
mbed_official 235:685d5f11838f 1436 }
mbed_official 235:685d5f11838f 1437 break;
mbed_official 235:685d5f11838f 1438
mbed_official 235:685d5f11838f 1439 default:
mbed_official 235:685d5f11838f 1440 break;
mbed_official 235:685d5f11838f 1441 }
mbed_official 235:685d5f11838f 1442
mbed_official 235:685d5f11838f 1443 /* Disable the Capture compare channel */
mbed_official 235:685d5f11838f 1444 TIM_CCxChannelCmd(htim->Instance, Channel, TIM_CCx_DISABLE);
mbed_official 235:685d5f11838f 1445
mbed_official 235:685d5f11838f 1446 if(IS_TIM_ADVANCED_INSTANCE(htim->Instance) != RESET)
mbed_official 235:685d5f11838f 1447 {
mbed_official 235:685d5f11838f 1448 /* Disable the Main Ouput */
mbed_official 235:685d5f11838f 1449 __HAL_TIM_MOE_DISABLE(htim);
mbed_official 235:685d5f11838f 1450 }
mbed_official 235:685d5f11838f 1451
mbed_official 235:685d5f11838f 1452 /* Disable the Peripheral */
mbed_official 235:685d5f11838f 1453 __HAL_TIM_DISABLE(htim);
mbed_official 235:685d5f11838f 1454
mbed_official 235:685d5f11838f 1455 /* Change the htim state */
mbed_official 235:685d5f11838f 1456 htim->State = HAL_TIM_STATE_READY;
mbed_official 235:685d5f11838f 1457
mbed_official 235:685d5f11838f 1458 /* Return function status */
mbed_official 235:685d5f11838f 1459 return HAL_OK;
mbed_official 235:685d5f11838f 1460 }
mbed_official 235:685d5f11838f 1461
mbed_official 235:685d5f11838f 1462 /**
mbed_official 235:685d5f11838f 1463 * @}
mbed_official 235:685d5f11838f 1464 */
mbed_official 235:685d5f11838f 1465
mbed_official 235:685d5f11838f 1466 /** @defgroup TIM_Group4 Time Input Capture functions
mbed_official 235:685d5f11838f 1467 * @brief Time Input Capture functions
mbed_official 235:685d5f11838f 1468 *
mbed_official 235:685d5f11838f 1469 @verbatim
mbed_official 235:685d5f11838f 1470 ==============================================================================
mbed_official 235:685d5f11838f 1471 ##### Time Input Capture functions #####
mbed_official 235:685d5f11838f 1472 ==============================================================================
mbed_official 235:685d5f11838f 1473 [..]
mbed_official 235:685d5f11838f 1474 This section provides functions allowing to:
mbed_official 235:685d5f11838f 1475 (+) Initialize and configure the TIM Input Capture.
mbed_official 235:685d5f11838f 1476 (+) De-initialize the TIM Input Capture.
mbed_official 235:685d5f11838f 1477 (+) Start the Time Input Capture.
mbed_official 235:685d5f11838f 1478 (+) Stop the Time Input Capture.
mbed_official 235:685d5f11838f 1479 (+) Start the Time Input Capture and enable interrupt.
mbed_official 235:685d5f11838f 1480 (+) Stop the Time Input Capture and disable interrupt.
mbed_official 235:685d5f11838f 1481 (+) Start the Time Input Capture and enable DMA transfer.
mbed_official 235:685d5f11838f 1482 (+) Stop the Time Input Capture and disable DMA transfer.
mbed_official 235:685d5f11838f 1483
mbed_official 235:685d5f11838f 1484 @endverbatim
mbed_official 235:685d5f11838f 1485 * @{
mbed_official 235:685d5f11838f 1486 */
mbed_official 235:685d5f11838f 1487 /**
mbed_official 235:685d5f11838f 1488 * @brief Initializes the TIM Input Capture Time base according to the specified
mbed_official 235:685d5f11838f 1489 * parameters in the TIM_HandleTypeDef and create the associated handle.
mbed_official 235:685d5f11838f 1490 * @param htim: pointer to a TIM_HandleTypeDef structure that contains
mbed_official 235:685d5f11838f 1491 * the configuration information for TIM module.
mbed_official 235:685d5f11838f 1492 * @retval HAL status
mbed_official 235:685d5f11838f 1493 */
mbed_official 235:685d5f11838f 1494 HAL_StatusTypeDef HAL_TIM_IC_Init(TIM_HandleTypeDef *htim)
mbed_official 235:685d5f11838f 1495 {
mbed_official 235:685d5f11838f 1496 /* Check the TIM handle allocation */
mbed_official 235:685d5f11838f 1497 if(htim == NULL)
mbed_official 235:685d5f11838f 1498 {
mbed_official 235:685d5f11838f 1499 return HAL_ERROR;
mbed_official 235:685d5f11838f 1500 }
mbed_official 235:685d5f11838f 1501
mbed_official 235:685d5f11838f 1502 /* Check the parameters */
mbed_official 235:685d5f11838f 1503 assert_param(IS_TIM_INSTANCE(htim->Instance));
mbed_official 235:685d5f11838f 1504 assert_param(IS_TIM_COUNTER_MODE(htim->Init.CounterMode));
mbed_official 235:685d5f11838f 1505 assert_param(IS_TIM_CLOCKDIVISION_DIV(htim->Init.ClockDivision));
mbed_official 235:685d5f11838f 1506
mbed_official 235:685d5f11838f 1507 if(htim->State == HAL_TIM_STATE_RESET)
mbed_official 235:685d5f11838f 1508 {
mbed_official 235:685d5f11838f 1509 /* Init the low level hardware : GPIO, CLOCK, NVIC and DMA */
mbed_official 235:685d5f11838f 1510 HAL_TIM_IC_MspInit(htim);
mbed_official 235:685d5f11838f 1511 }
mbed_official 235:685d5f11838f 1512
mbed_official 235:685d5f11838f 1513 /* Set the TIM state */
mbed_official 235:685d5f11838f 1514 htim->State= HAL_TIM_STATE_BUSY;
mbed_official 235:685d5f11838f 1515
mbed_official 235:685d5f11838f 1516 /* Init the base time for the input capture */
mbed_official 235:685d5f11838f 1517 TIM_Base_SetConfig(htim->Instance, &htim->Init);
mbed_official 235:685d5f11838f 1518
mbed_official 235:685d5f11838f 1519 /* Initialize the TIM state*/
mbed_official 235:685d5f11838f 1520 htim->State= HAL_TIM_STATE_READY;
mbed_official 235:685d5f11838f 1521
mbed_official 235:685d5f11838f 1522 return HAL_OK;
mbed_official 235:685d5f11838f 1523 }
mbed_official 235:685d5f11838f 1524
mbed_official 235:685d5f11838f 1525 /**
mbed_official 235:685d5f11838f 1526 * @brief DeInitializes the TIM peripheral
mbed_official 235:685d5f11838f 1527 * @param htim: pointer to a TIM_HandleTypeDef structure that contains
mbed_official 235:685d5f11838f 1528 * the configuration information for TIM module.
mbed_official 235:685d5f11838f 1529 * @retval HAL status
mbed_official 235:685d5f11838f 1530 */
mbed_official 235:685d5f11838f 1531 HAL_StatusTypeDef HAL_TIM_IC_DeInit(TIM_HandleTypeDef *htim)
mbed_official 235:685d5f11838f 1532 {
mbed_official 235:685d5f11838f 1533 /* Check the parameters */
mbed_official 235:685d5f11838f 1534 assert_param(IS_TIM_INSTANCE(htim->Instance));
mbed_official 235:685d5f11838f 1535
mbed_official 235:685d5f11838f 1536 htim->State = HAL_TIM_STATE_BUSY;
mbed_official 235:685d5f11838f 1537
mbed_official 235:685d5f11838f 1538 /* Disable the TIM Peripheral Clock */
mbed_official 235:685d5f11838f 1539 __HAL_TIM_DISABLE(htim);
mbed_official 235:685d5f11838f 1540
mbed_official 235:685d5f11838f 1541 /* DeInit the low level hardware: GPIO, CLOCK, NVIC and DMA */
mbed_official 235:685d5f11838f 1542 HAL_TIM_IC_MspDeInit(htim);
mbed_official 235:685d5f11838f 1543
mbed_official 235:685d5f11838f 1544 /* Change TIM state */
mbed_official 235:685d5f11838f 1545 htim->State = HAL_TIM_STATE_RESET;
mbed_official 235:685d5f11838f 1546
mbed_official 235:685d5f11838f 1547 /* Release Lock */
mbed_official 235:685d5f11838f 1548 __HAL_UNLOCK(htim);
mbed_official 235:685d5f11838f 1549
mbed_official 235:685d5f11838f 1550 return HAL_OK;
mbed_official 235:685d5f11838f 1551 }
mbed_official 235:685d5f11838f 1552
mbed_official 235:685d5f11838f 1553 /**
mbed_official 235:685d5f11838f 1554 * @brief Initializes the TIM INput Capture MSP.
mbed_official 235:685d5f11838f 1555 * @param htim: pointer to a TIM_HandleTypeDef structure that contains
mbed_official 235:685d5f11838f 1556 * the configuration information for TIM module.
mbed_official 235:685d5f11838f 1557 * @retval None
mbed_official 235:685d5f11838f 1558 */
mbed_official 235:685d5f11838f 1559 __weak void HAL_TIM_IC_MspInit(TIM_HandleTypeDef *htim)
mbed_official 235:685d5f11838f 1560 {
mbed_official 235:685d5f11838f 1561 /* NOTE : This function Should not be modified, when the callback is needed,
mbed_official 235:685d5f11838f 1562 the HAL_TIM_IC_MspInit could be implemented in the user file
mbed_official 235:685d5f11838f 1563 */
mbed_official 235:685d5f11838f 1564 }
mbed_official 235:685d5f11838f 1565
mbed_official 235:685d5f11838f 1566 /**
mbed_official 235:685d5f11838f 1567 * @brief DeInitializes TIM Input Capture MSP.
mbed_official 235:685d5f11838f 1568 * @param htim: pointer to a TIM_HandleTypeDef structure that contains
mbed_official 235:685d5f11838f 1569 * the configuration information for TIM module.
mbed_official 235:685d5f11838f 1570 * @retval None
mbed_official 235:685d5f11838f 1571 */
mbed_official 235:685d5f11838f 1572 __weak void HAL_TIM_IC_MspDeInit(TIM_HandleTypeDef *htim)
mbed_official 235:685d5f11838f 1573 {
mbed_official 235:685d5f11838f 1574 /* NOTE : This function Should not be modified, when the callback is needed,
mbed_official 235:685d5f11838f 1575 the HAL_TIM_IC_MspDeInit could be implemented in the user file
mbed_official 235:685d5f11838f 1576 */
mbed_official 235:685d5f11838f 1577 }
mbed_official 235:685d5f11838f 1578
mbed_official 235:685d5f11838f 1579 /**
mbed_official 235:685d5f11838f 1580 * @brief Starts the TIM Input Capture measurement.
mbed_official 235:685d5f11838f 1581 * @param htim: pointer to a TIM_HandleTypeDef structure that contains
mbed_official 235:685d5f11838f 1582 * the configuration information for TIM module.
mbed_official 235:685d5f11838f 1583 * @param Channel: TIM Channels to be enabled.
mbed_official 235:685d5f11838f 1584 * This parameter can be one of the following values:
mbed_official 235:685d5f11838f 1585 * @arg TIM_CHANNEL_1: TIM Channel 1 selected
mbed_official 235:685d5f11838f 1586 * @arg TIM_CHANNEL_2: TIM Channel 2 selected
mbed_official 235:685d5f11838f 1587 * @arg TIM_CHANNEL_3: TIM Channel 3 selected
mbed_official 235:685d5f11838f 1588 * @arg TIM_CHANNEL_4: TIM Channel 4 selected
mbed_official 235:685d5f11838f 1589 * @retval HAL status
mbed_official 235:685d5f11838f 1590 */
mbed_official 235:685d5f11838f 1591 HAL_StatusTypeDef HAL_TIM_IC_Start (TIM_HandleTypeDef *htim, uint32_t Channel)
mbed_official 235:685d5f11838f 1592 {
mbed_official 235:685d5f11838f 1593 /* Check the parameters */
mbed_official 235:685d5f11838f 1594 assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel));
mbed_official 235:685d5f11838f 1595
mbed_official 235:685d5f11838f 1596 /* Enable the Input Capture channel */
mbed_official 235:685d5f11838f 1597 TIM_CCxChannelCmd(htim->Instance, Channel, TIM_CCx_ENABLE);
mbed_official 235:685d5f11838f 1598
mbed_official 235:685d5f11838f 1599 /* Enable the Peripheral */
mbed_official 235:685d5f11838f 1600 __HAL_TIM_ENABLE(htim);
mbed_official 235:685d5f11838f 1601
mbed_official 235:685d5f11838f 1602 /* Return function status */
mbed_official 235:685d5f11838f 1603 return HAL_OK;
mbed_official 235:685d5f11838f 1604 }
mbed_official 235:685d5f11838f 1605
mbed_official 235:685d5f11838f 1606 /**
mbed_official 235:685d5f11838f 1607 * @brief Stops the TIM Input Capture measurement.
mbed_official 235:685d5f11838f 1608 * @param htim: pointer to a TIM_HandleTypeDef structure that contains
mbed_official 235:685d5f11838f 1609 * the configuration information for TIM module.
mbed_official 235:685d5f11838f 1610 * @param Channel: TIM Channels to be disabled.
mbed_official 235:685d5f11838f 1611 * This parameter can be one of the following values:
mbed_official 235:685d5f11838f 1612 * @arg TIM_CHANNEL_1: TIM Channel 1 selected
mbed_official 235:685d5f11838f 1613 * @arg TIM_CHANNEL_2: TIM Channel 2 selected
mbed_official 235:685d5f11838f 1614 * @arg TIM_CHANNEL_3: TIM Channel 3 selected
mbed_official 235:685d5f11838f 1615 * @arg TIM_CHANNEL_4: TIM Channel 4 selected
mbed_official 235:685d5f11838f 1616 * @retval HAL status
mbed_official 235:685d5f11838f 1617 */
mbed_official 235:685d5f11838f 1618 HAL_StatusTypeDef HAL_TIM_IC_Stop(TIM_HandleTypeDef *htim, uint32_t Channel)
mbed_official 235:685d5f11838f 1619 {
mbed_official 235:685d5f11838f 1620 /* Check the parameters */
mbed_official 235:685d5f11838f 1621 assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel));
mbed_official 235:685d5f11838f 1622
mbed_official 235:685d5f11838f 1623 /* Disable the Input Capture channel */
mbed_official 235:685d5f11838f 1624 TIM_CCxChannelCmd(htim->Instance, Channel, TIM_CCx_DISABLE);
mbed_official 235:685d5f11838f 1625
mbed_official 235:685d5f11838f 1626 /* Disable the Peripheral */
mbed_official 235:685d5f11838f 1627 __HAL_TIM_DISABLE(htim);
mbed_official 235:685d5f11838f 1628
mbed_official 235:685d5f11838f 1629 /* Return function status */
mbed_official 235:685d5f11838f 1630 return HAL_OK;
mbed_official 235:685d5f11838f 1631 }
mbed_official 235:685d5f11838f 1632
mbed_official 235:685d5f11838f 1633 /**
mbed_official 235:685d5f11838f 1634 * @brief Starts the TIM Input Capture measurement in interrupt mode.
mbed_official 235:685d5f11838f 1635 * @param htim: pointer to a TIM_HandleTypeDef structure that contains
mbed_official 235:685d5f11838f 1636 * the configuration information for TIM module.
mbed_official 235:685d5f11838f 1637 * @param Channel: TIM Channels to be enabled.
mbed_official 235:685d5f11838f 1638 * This parameter can be one of the following values:
mbed_official 235:685d5f11838f 1639 * @arg TIM_CHANNEL_1: TIM Channel 1 selected
mbed_official 235:685d5f11838f 1640 * @arg TIM_CHANNEL_2: TIM Channel 2 selected
mbed_official 235:685d5f11838f 1641 * @arg TIM_CHANNEL_3: TIM Channel 3 selected
mbed_official 235:685d5f11838f 1642 * @arg TIM_CHANNEL_4: TIM Channel 4 selected
mbed_official 235:685d5f11838f 1643 * @retval HAL status
mbed_official 235:685d5f11838f 1644 */
mbed_official 235:685d5f11838f 1645 HAL_StatusTypeDef HAL_TIM_IC_Start_IT (TIM_HandleTypeDef *htim, uint32_t Channel)
mbed_official 235:685d5f11838f 1646 {
mbed_official 235:685d5f11838f 1647 /* Check the parameters */
mbed_official 235:685d5f11838f 1648 assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel));
mbed_official 235:685d5f11838f 1649
mbed_official 235:685d5f11838f 1650 switch (Channel)
mbed_official 235:685d5f11838f 1651 {
mbed_official 235:685d5f11838f 1652 case TIM_CHANNEL_1:
mbed_official 235:685d5f11838f 1653 {
mbed_official 235:685d5f11838f 1654 /* Enable the TIM Capture/Compare 1 interrupt */
mbed_official 235:685d5f11838f 1655 __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC1);
mbed_official 235:685d5f11838f 1656 }
mbed_official 235:685d5f11838f 1657 break;
mbed_official 235:685d5f11838f 1658
mbed_official 235:685d5f11838f 1659 case TIM_CHANNEL_2:
mbed_official 235:685d5f11838f 1660 {
mbed_official 235:685d5f11838f 1661 /* Enable the TIM Capture/Compare 2 interrupt */
mbed_official 235:685d5f11838f 1662 __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC2);
mbed_official 235:685d5f11838f 1663 }
mbed_official 235:685d5f11838f 1664 break;
mbed_official 235:685d5f11838f 1665
mbed_official 235:685d5f11838f 1666 case TIM_CHANNEL_3:
mbed_official 235:685d5f11838f 1667 {
mbed_official 235:685d5f11838f 1668 /* Enable the TIM Capture/Compare 3 interrupt */
mbed_official 235:685d5f11838f 1669 __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC3);
mbed_official 235:685d5f11838f 1670 }
mbed_official 235:685d5f11838f 1671 break;
mbed_official 235:685d5f11838f 1672
mbed_official 235:685d5f11838f 1673 case TIM_CHANNEL_4:
mbed_official 235:685d5f11838f 1674 {
mbed_official 235:685d5f11838f 1675 /* Enable the TIM Capture/Compare 4 interrupt */
mbed_official 235:685d5f11838f 1676 __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC4);
mbed_official 235:685d5f11838f 1677 }
mbed_official 235:685d5f11838f 1678 break;
mbed_official 235:685d5f11838f 1679
mbed_official 235:685d5f11838f 1680 default:
mbed_official 235:685d5f11838f 1681 break;
mbed_official 235:685d5f11838f 1682 }
mbed_official 235:685d5f11838f 1683 /* Enable the Input Capture channel */
mbed_official 235:685d5f11838f 1684 TIM_CCxChannelCmd(htim->Instance, Channel, TIM_CCx_ENABLE);
mbed_official 235:685d5f11838f 1685
mbed_official 235:685d5f11838f 1686 /* Enable the Peripheral */
mbed_official 235:685d5f11838f 1687 __HAL_TIM_ENABLE(htim);
mbed_official 235:685d5f11838f 1688
mbed_official 235:685d5f11838f 1689 /* Return function status */
mbed_official 235:685d5f11838f 1690 return HAL_OK;
mbed_official 235:685d5f11838f 1691 }
mbed_official 235:685d5f11838f 1692
mbed_official 235:685d5f11838f 1693 /**
mbed_official 235:685d5f11838f 1694 * @brief Stops the TIM Input Capture measurement in interrupt mode.
mbed_official 235:685d5f11838f 1695 * @param htim: pointer to a TIM_HandleTypeDef structure that contains
mbed_official 235:685d5f11838f 1696 * the configuration information for TIM module.
mbed_official 235:685d5f11838f 1697 * @param Channel: TIM Channels to be disabled.
mbed_official 235:685d5f11838f 1698 * This parameter can be one of the following values:
mbed_official 235:685d5f11838f 1699 * @arg TIM_CHANNEL_1: TIM Channel 1 selected
mbed_official 235:685d5f11838f 1700 * @arg TIM_CHANNEL_2: TIM Channel 2 selected
mbed_official 235:685d5f11838f 1701 * @arg TIM_CHANNEL_3: TIM Channel 3 selected
mbed_official 235:685d5f11838f 1702 * @arg TIM_CHANNEL_4: TIM Channel 4 selected
mbed_official 235:685d5f11838f 1703 * @retval HAL status
mbed_official 235:685d5f11838f 1704 */
mbed_official 235:685d5f11838f 1705 HAL_StatusTypeDef HAL_TIM_IC_Stop_IT(TIM_HandleTypeDef *htim, uint32_t Channel)
mbed_official 235:685d5f11838f 1706 {
mbed_official 235:685d5f11838f 1707 /* Check the parameters */
mbed_official 235:685d5f11838f 1708 assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel));
mbed_official 235:685d5f11838f 1709
mbed_official 235:685d5f11838f 1710 switch (Channel)
mbed_official 235:685d5f11838f 1711 {
mbed_official 235:685d5f11838f 1712 case TIM_CHANNEL_1:
mbed_official 235:685d5f11838f 1713 {
mbed_official 235:685d5f11838f 1714 /* Disable the TIM Capture/Compare 1 interrupt */
mbed_official 235:685d5f11838f 1715 __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC1);
mbed_official 235:685d5f11838f 1716 }
mbed_official 235:685d5f11838f 1717 break;
mbed_official 235:685d5f11838f 1718
mbed_official 235:685d5f11838f 1719 case TIM_CHANNEL_2:
mbed_official 235:685d5f11838f 1720 {
mbed_official 235:685d5f11838f 1721 /* Disable the TIM Capture/Compare 2 interrupt */
mbed_official 235:685d5f11838f 1722 __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC2);
mbed_official 235:685d5f11838f 1723 }
mbed_official 235:685d5f11838f 1724 break;
mbed_official 235:685d5f11838f 1725
mbed_official 235:685d5f11838f 1726 case TIM_CHANNEL_3:
mbed_official 235:685d5f11838f 1727 {
mbed_official 235:685d5f11838f 1728 /* Disable the TIM Capture/Compare 3 interrupt */
mbed_official 235:685d5f11838f 1729 __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC3);
mbed_official 235:685d5f11838f 1730 }
mbed_official 235:685d5f11838f 1731 break;
mbed_official 235:685d5f11838f 1732
mbed_official 235:685d5f11838f 1733 case TIM_CHANNEL_4:
mbed_official 235:685d5f11838f 1734 {
mbed_official 235:685d5f11838f 1735 /* Disable the TIM Capture/Compare 4 interrupt */
mbed_official 235:685d5f11838f 1736 __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC4);
mbed_official 235:685d5f11838f 1737 }
mbed_official 235:685d5f11838f 1738 break;
mbed_official 235:685d5f11838f 1739
mbed_official 235:685d5f11838f 1740 default:
mbed_official 235:685d5f11838f 1741 break;
mbed_official 235:685d5f11838f 1742 }
mbed_official 235:685d5f11838f 1743
mbed_official 235:685d5f11838f 1744 /* Disable the Input Capture channel */
mbed_official 235:685d5f11838f 1745 TIM_CCxChannelCmd(htim->Instance, Channel, TIM_CCx_DISABLE);
mbed_official 235:685d5f11838f 1746
mbed_official 235:685d5f11838f 1747 /* Disable the Peripheral */
mbed_official 235:685d5f11838f 1748 __HAL_TIM_DISABLE(htim);
mbed_official 235:685d5f11838f 1749
mbed_official 235:685d5f11838f 1750 /* Return function status */
mbed_official 235:685d5f11838f 1751 return HAL_OK;
mbed_official 235:685d5f11838f 1752 }
mbed_official 235:685d5f11838f 1753
mbed_official 235:685d5f11838f 1754 /**
mbed_official 235:685d5f11838f 1755 * @brief Starts the TIM Input Capture measurement on in DMA mode.
mbed_official 235:685d5f11838f 1756 * @param htim: pointer to a TIM_HandleTypeDef structure that contains
mbed_official 235:685d5f11838f 1757 * the configuration information for TIM module.
mbed_official 235:685d5f11838f 1758 * @param Channel: TIM Channels to be enabled.
mbed_official 235:685d5f11838f 1759 * This parameter can be one of the following values:
mbed_official 235:685d5f11838f 1760 * @arg TIM_CHANNEL_1: TIM Channel 1 selected
mbed_official 235:685d5f11838f 1761 * @arg TIM_CHANNEL_2: TIM Channel 2 selected
mbed_official 235:685d5f11838f 1762 * @arg TIM_CHANNEL_3: TIM Channel 3 selected
mbed_official 235:685d5f11838f 1763 * @arg TIM_CHANNEL_4: TIM Channel 4 selected
mbed_official 235:685d5f11838f 1764 * @param pData: The destination Buffer address.
mbed_official 235:685d5f11838f 1765 * @param Length: The length of data to be transferred from TIM peripheral to memory.
mbed_official 235:685d5f11838f 1766 * @retval HAL status
mbed_official 235:685d5f11838f 1767 */
mbed_official 235:685d5f11838f 1768 HAL_StatusTypeDef HAL_TIM_IC_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Channel, uint32_t *pData, uint16_t Length)
mbed_official 235:685d5f11838f 1769 {
mbed_official 235:685d5f11838f 1770 /* Check the parameters */
mbed_official 235:685d5f11838f 1771 assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel));
mbed_official 235:685d5f11838f 1772 assert_param(IS_TIM_DMA_CC_INSTANCE(htim->Instance));
mbed_official 235:685d5f11838f 1773
mbed_official 235:685d5f11838f 1774 if((htim->State == HAL_TIM_STATE_BUSY))
mbed_official 235:685d5f11838f 1775 {
mbed_official 235:685d5f11838f 1776 return HAL_BUSY;
mbed_official 235:685d5f11838f 1777 }
mbed_official 235:685d5f11838f 1778 else if((htim->State == HAL_TIM_STATE_READY))
mbed_official 235:685d5f11838f 1779 {
mbed_official 235:685d5f11838f 1780 if((pData == 0 ) && (Length > 0))
mbed_official 235:685d5f11838f 1781 {
mbed_official 235:685d5f11838f 1782 return HAL_ERROR;
mbed_official 235:685d5f11838f 1783 }
mbed_official 235:685d5f11838f 1784 else
mbed_official 235:685d5f11838f 1785 {
mbed_official 235:685d5f11838f 1786 htim->State = HAL_TIM_STATE_BUSY;
mbed_official 235:685d5f11838f 1787 }
mbed_official 235:685d5f11838f 1788 }
mbed_official 235:685d5f11838f 1789
mbed_official 235:685d5f11838f 1790 switch (Channel)
mbed_official 235:685d5f11838f 1791 {
mbed_official 235:685d5f11838f 1792 case TIM_CHANNEL_1:
mbed_official 235:685d5f11838f 1793 {
mbed_official 235:685d5f11838f 1794 /* Set the DMA Period elapsed callback */
mbed_official 235:685d5f11838f 1795 htim->hdma[TIM_DMA_ID_CC1]->XferCpltCallback = HAL_TIM_DMACaptureCplt;
mbed_official 235:685d5f11838f 1796
mbed_official 235:685d5f11838f 1797 /* Set the DMA error callback */
mbed_official 235:685d5f11838f 1798 htim->hdma[TIM_DMA_ID_CC1]->XferErrorCallback = HAL_TIM_DMAError ;
mbed_official 235:685d5f11838f 1799
mbed_official 235:685d5f11838f 1800 /* Enable the DMA Stream */
mbed_official 235:685d5f11838f 1801 HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC1], (uint32_t)&htim->Instance->CCR1, (uint32_t)pData, Length);
mbed_official 235:685d5f11838f 1802
mbed_official 235:685d5f11838f 1803 /* Enable the TIM Capture/Compare 1 DMA request */
mbed_official 235:685d5f11838f 1804 __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC1);
mbed_official 235:685d5f11838f 1805 }
mbed_official 235:685d5f11838f 1806 break;
mbed_official 235:685d5f11838f 1807
mbed_official 235:685d5f11838f 1808 case TIM_CHANNEL_2:
mbed_official 235:685d5f11838f 1809 {
mbed_official 235:685d5f11838f 1810 /* Set the DMA Period elapsed callback */
mbed_official 235:685d5f11838f 1811 htim->hdma[TIM_DMA_ID_CC2]->XferCpltCallback = HAL_TIM_DMACaptureCplt;
mbed_official 235:685d5f11838f 1812
mbed_official 235:685d5f11838f 1813 /* Set the DMA error callback */
mbed_official 235:685d5f11838f 1814 htim->hdma[TIM_DMA_ID_CC2]->XferErrorCallback = HAL_TIM_DMAError ;
mbed_official 235:685d5f11838f 1815
mbed_official 235:685d5f11838f 1816 /* Enable the DMA Stream */
mbed_official 235:685d5f11838f 1817 HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC2], (uint32_t)&htim->Instance->CCR2, (uint32_t)pData, Length);
mbed_official 235:685d5f11838f 1818
mbed_official 235:685d5f11838f 1819 /* Enable the TIM Capture/Compare 2 DMA request */
mbed_official 235:685d5f11838f 1820 __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC2);
mbed_official 235:685d5f11838f 1821 }
mbed_official 235:685d5f11838f 1822 break;
mbed_official 235:685d5f11838f 1823
mbed_official 235:685d5f11838f 1824 case TIM_CHANNEL_3:
mbed_official 235:685d5f11838f 1825 {
mbed_official 235:685d5f11838f 1826 /* Set the DMA Period elapsed callback */
mbed_official 235:685d5f11838f 1827 htim->hdma[TIM_DMA_ID_CC3]->XferCpltCallback = HAL_TIM_DMACaptureCplt;
mbed_official 235:685d5f11838f 1828
mbed_official 235:685d5f11838f 1829 /* Set the DMA error callback */
mbed_official 235:685d5f11838f 1830 htim->hdma[TIM_DMA_ID_CC3]->XferErrorCallback = HAL_TIM_DMAError ;
mbed_official 235:685d5f11838f 1831
mbed_official 235:685d5f11838f 1832 /* Enable the DMA Stream */
mbed_official 235:685d5f11838f 1833 HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC3], (uint32_t)&htim->Instance->CCR3, (uint32_t)pData, Length);
mbed_official 235:685d5f11838f 1834
mbed_official 235:685d5f11838f 1835 /* Enable the TIM Capture/Compare 3 DMA request */
mbed_official 235:685d5f11838f 1836 __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC3);
mbed_official 235:685d5f11838f 1837 }
mbed_official 235:685d5f11838f 1838 break;
mbed_official 235:685d5f11838f 1839
mbed_official 235:685d5f11838f 1840 case TIM_CHANNEL_4:
mbed_official 235:685d5f11838f 1841 {
mbed_official 235:685d5f11838f 1842 /* Set the DMA Period elapsed callback */
mbed_official 235:685d5f11838f 1843 htim->hdma[TIM_DMA_ID_CC4]->XferCpltCallback = HAL_TIM_DMACaptureCplt;
mbed_official 235:685d5f11838f 1844
mbed_official 235:685d5f11838f 1845 /* Set the DMA error callback */
mbed_official 235:685d5f11838f 1846 htim->hdma[TIM_DMA_ID_CC4]->XferErrorCallback = HAL_TIM_DMAError ;
mbed_official 235:685d5f11838f 1847
mbed_official 235:685d5f11838f 1848 /* Enable the DMA Stream */
mbed_official 235:685d5f11838f 1849 HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC4], (uint32_t)&htim->Instance->CCR4, (uint32_t)pData, Length);
mbed_official 235:685d5f11838f 1850
mbed_official 235:685d5f11838f 1851 /* Enable the TIM Capture/Compare 4 DMA request */
mbed_official 235:685d5f11838f 1852 __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC4);
mbed_official 235:685d5f11838f 1853 }
mbed_official 235:685d5f11838f 1854 break;
mbed_official 235:685d5f11838f 1855
mbed_official 235:685d5f11838f 1856 default:
mbed_official 235:685d5f11838f 1857 break;
mbed_official 235:685d5f11838f 1858 }
mbed_official 235:685d5f11838f 1859
mbed_official 235:685d5f11838f 1860 /* Enable the Input Capture channel */
mbed_official 235:685d5f11838f 1861 TIM_CCxChannelCmd(htim->Instance, Channel, TIM_CCx_ENABLE);
mbed_official 235:685d5f11838f 1862
mbed_official 235:685d5f11838f 1863 /* Enable the Peripheral */
mbed_official 235:685d5f11838f 1864 __HAL_TIM_ENABLE(htim);
mbed_official 235:685d5f11838f 1865
mbed_official 235:685d5f11838f 1866 /* Return function status */
mbed_official 235:685d5f11838f 1867 return HAL_OK;
mbed_official 235:685d5f11838f 1868 }
mbed_official 235:685d5f11838f 1869
mbed_official 235:685d5f11838f 1870 /**
mbed_official 235:685d5f11838f 1871 * @brief Stops the TIM Input Capture measurement on in DMA mode.
mbed_official 235:685d5f11838f 1872 * @param htim: pointer to a TIM_HandleTypeDef structure that contains
mbed_official 235:685d5f11838f 1873 * the configuration information for TIM module.
mbed_official 235:685d5f11838f 1874 * @param Channel: TIM Channels to be disabled.
mbed_official 235:685d5f11838f 1875 * This parameter can be one of the following values:
mbed_official 235:685d5f11838f 1876 * @arg TIM_CHANNEL_1: TIM Channel 1 selected
mbed_official 235:685d5f11838f 1877 * @arg TIM_CHANNEL_2: TIM Channel 2 selected
mbed_official 235:685d5f11838f 1878 * @arg TIM_CHANNEL_3: TIM Channel 3 selected
mbed_official 235:685d5f11838f 1879 * @arg TIM_CHANNEL_4: TIM Channel 4 selected
mbed_official 235:685d5f11838f 1880 * @retval HAL status
mbed_official 235:685d5f11838f 1881 */
mbed_official 235:685d5f11838f 1882 HAL_StatusTypeDef HAL_TIM_IC_Stop_DMA(TIM_HandleTypeDef *htim, uint32_t Channel)
mbed_official 235:685d5f11838f 1883 {
mbed_official 235:685d5f11838f 1884 /* Check the parameters */
mbed_official 235:685d5f11838f 1885 assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel));
mbed_official 235:685d5f11838f 1886 assert_param(IS_TIM_DMA_CC_INSTANCE(htim->Instance));
mbed_official 235:685d5f11838f 1887
mbed_official 235:685d5f11838f 1888 switch (Channel)
mbed_official 235:685d5f11838f 1889 {
mbed_official 235:685d5f11838f 1890 case TIM_CHANNEL_1:
mbed_official 235:685d5f11838f 1891 {
mbed_official 235:685d5f11838f 1892 /* Disable the TIM Capture/Compare 1 DMA request */
mbed_official 235:685d5f11838f 1893 __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC1);
mbed_official 235:685d5f11838f 1894 }
mbed_official 235:685d5f11838f 1895 break;
mbed_official 235:685d5f11838f 1896
mbed_official 235:685d5f11838f 1897 case TIM_CHANNEL_2:
mbed_official 235:685d5f11838f 1898 {
mbed_official 235:685d5f11838f 1899 /* Disable the TIM Capture/Compare 2 DMA request */
mbed_official 235:685d5f11838f 1900 __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC2);
mbed_official 235:685d5f11838f 1901 }
mbed_official 235:685d5f11838f 1902 break;
mbed_official 235:685d5f11838f 1903
mbed_official 235:685d5f11838f 1904 case TIM_CHANNEL_3:
mbed_official 235:685d5f11838f 1905 {
mbed_official 235:685d5f11838f 1906 /* Disable the TIM Capture/Compare 3 DMA request */
mbed_official 235:685d5f11838f 1907 __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC3);
mbed_official 235:685d5f11838f 1908 }
mbed_official 235:685d5f11838f 1909 break;
mbed_official 235:685d5f11838f 1910
mbed_official 235:685d5f11838f 1911 case TIM_CHANNEL_4:
mbed_official 235:685d5f11838f 1912 {
mbed_official 235:685d5f11838f 1913 /* Disable the TIM Capture/Compare 4 DMA request */
mbed_official 235:685d5f11838f 1914 __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC4);
mbed_official 235:685d5f11838f 1915 }
mbed_official 235:685d5f11838f 1916 break;
mbed_official 235:685d5f11838f 1917
mbed_official 235:685d5f11838f 1918 default:
mbed_official 235:685d5f11838f 1919 break;
mbed_official 235:685d5f11838f 1920 }
mbed_official 235:685d5f11838f 1921
mbed_official 235:685d5f11838f 1922 /* Disable the Input Capture channel */
mbed_official 235:685d5f11838f 1923 TIM_CCxChannelCmd(htim->Instance, Channel, TIM_CCx_DISABLE);
mbed_official 235:685d5f11838f 1924
mbed_official 235:685d5f11838f 1925 /* Disable the Peripheral */
mbed_official 235:685d5f11838f 1926 __HAL_TIM_DISABLE(htim);
mbed_official 235:685d5f11838f 1927
mbed_official 235:685d5f11838f 1928 /* Change the htim state */
mbed_official 235:685d5f11838f 1929 htim->State = HAL_TIM_STATE_READY;
mbed_official 235:685d5f11838f 1930
mbed_official 235:685d5f11838f 1931 /* Return function status */
mbed_official 235:685d5f11838f 1932 return HAL_OK;
mbed_official 235:685d5f11838f 1933 }
mbed_official 235:685d5f11838f 1934 /**
mbed_official 235:685d5f11838f 1935 * @}
mbed_official 235:685d5f11838f 1936 */
mbed_official 235:685d5f11838f 1937
mbed_official 235:685d5f11838f 1938 /** @defgroup TIM_Group5 Time One Pulse functions
mbed_official 235:685d5f11838f 1939 * @brief Time One Pulse functions
mbed_official 235:685d5f11838f 1940 *
mbed_official 235:685d5f11838f 1941 @verbatim
mbed_official 235:685d5f11838f 1942 ==============================================================================
mbed_official 235:685d5f11838f 1943 ##### Time One Pulse functions #####
mbed_official 235:685d5f11838f 1944 ==============================================================================
mbed_official 235:685d5f11838f 1945 [..]
mbed_official 235:685d5f11838f 1946 This section provides functions allowing to:
mbed_official 235:685d5f11838f 1947 (+) Initialize and configure the TIM One Pulse.
mbed_official 235:685d5f11838f 1948 (+) De-initialize the TIM One Pulse.
mbed_official 235:685d5f11838f 1949 (+) Start the Time One Pulse.
mbed_official 235:685d5f11838f 1950 (+) Stop the Time One Pulse.
mbed_official 235:685d5f11838f 1951 (+) Start the Time One Pulse and enable interrupt.
mbed_official 235:685d5f11838f 1952 (+) Stop the Time One Pulse and disable interrupt.
mbed_official 235:685d5f11838f 1953 (+) Start the Time One Pulse and enable DMA transfer.
mbed_official 235:685d5f11838f 1954 (+) Stop the Time One Pulse and disable DMA transfer.
mbed_official 235:685d5f11838f 1955
mbed_official 235:685d5f11838f 1956 @endverbatim
mbed_official 235:685d5f11838f 1957 * @{
mbed_official 235:685d5f11838f 1958 */
mbed_official 235:685d5f11838f 1959 /**
mbed_official 235:685d5f11838f 1960 * @brief Initializes the TIM One Pulse Time Base according to the specified
mbed_official 235:685d5f11838f 1961 * parameters in the TIM_HandleTypeDef and create the associated handle.
mbed_official 235:685d5f11838f 1962 * @param htim: pointer to a TIM_HandleTypeDef structure that contains
mbed_official 235:685d5f11838f 1963 * the configuration information for TIM module.
mbed_official 235:685d5f11838f 1964 * @param OnePulseMode: Select the One pulse mode.
mbed_official 235:685d5f11838f 1965 * This parameter can be one of the following values:
mbed_official 235:685d5f11838f 1966 * @arg TIM_OPMODE_SINGLE: Only one pulse will be generated.
mbed_official 235:685d5f11838f 1967 * @arg TIM_OPMODE_REPETITIVE: Repetitive pulses wil be generated.
mbed_official 235:685d5f11838f 1968 * @retval HAL status
mbed_official 235:685d5f11838f 1969 */
mbed_official 235:685d5f11838f 1970 HAL_StatusTypeDef HAL_TIM_OnePulse_Init(TIM_HandleTypeDef *htim, uint32_t OnePulseMode)
mbed_official 235:685d5f11838f 1971 {
mbed_official 235:685d5f11838f 1972 /* Check the TIM handle allocation */
mbed_official 235:685d5f11838f 1973 if(htim == NULL)
mbed_official 235:685d5f11838f 1974 {
mbed_official 235:685d5f11838f 1975 return HAL_ERROR;
mbed_official 235:685d5f11838f 1976 }
mbed_official 235:685d5f11838f 1977
mbed_official 235:685d5f11838f 1978 /* Check the parameters */
mbed_official 235:685d5f11838f 1979 assert_param(IS_TIM_INSTANCE(htim->Instance));
mbed_official 235:685d5f11838f 1980 assert_param(IS_TIM_COUNTER_MODE(htim->Init.CounterMode));
mbed_official 235:685d5f11838f 1981 assert_param(IS_TIM_CLOCKDIVISION_DIV(htim->Init.ClockDivision));
mbed_official 235:685d5f11838f 1982 assert_param(IS_TIM_OPM_MODE(OnePulseMode));
mbed_official 235:685d5f11838f 1983
mbed_official 235:685d5f11838f 1984 if(htim->State == HAL_TIM_STATE_RESET)
mbed_official 235:685d5f11838f 1985 {
mbed_official 235:685d5f11838f 1986 /* Init the low level hardware : GPIO, CLOCK, NVIC and DMA */
mbed_official 235:685d5f11838f 1987 HAL_TIM_OnePulse_MspInit(htim);
mbed_official 235:685d5f11838f 1988 }
mbed_official 235:685d5f11838f 1989
mbed_official 235:685d5f11838f 1990 /* Set the TIM state */
mbed_official 235:685d5f11838f 1991 htim->State= HAL_TIM_STATE_BUSY;
mbed_official 235:685d5f11838f 1992
mbed_official 235:685d5f11838f 1993 /* Configure the Time base in the One Pulse Mode */
mbed_official 235:685d5f11838f 1994 TIM_Base_SetConfig(htim->Instance, &htim->Init);
mbed_official 235:685d5f11838f 1995
mbed_official 235:685d5f11838f 1996 /* Reset the OPM Bit */
mbed_official 235:685d5f11838f 1997 htim->Instance->CR1 &= ~TIM_CR1_OPM;
mbed_official 235:685d5f11838f 1998
mbed_official 235:685d5f11838f 1999 /* Configure the OPM Mode */
mbed_official 235:685d5f11838f 2000 htim->Instance->CR1 |= OnePulseMode;
mbed_official 235:685d5f11838f 2001
mbed_official 235:685d5f11838f 2002 /* Initialize the TIM state*/
mbed_official 235:685d5f11838f 2003 htim->State= HAL_TIM_STATE_READY;
mbed_official 235:685d5f11838f 2004
mbed_official 235:685d5f11838f 2005 return HAL_OK;
mbed_official 235:685d5f11838f 2006 }
mbed_official 235:685d5f11838f 2007
mbed_official 235:685d5f11838f 2008 /**
mbed_official 235:685d5f11838f 2009 * @brief DeInitializes the TIM One Pulse
mbed_official 235:685d5f11838f 2010 * @param htim: pointer to a TIM_HandleTypeDef structure that contains
mbed_official 235:685d5f11838f 2011 * the configuration information for TIM module.
mbed_official 235:685d5f11838f 2012 * @retval HAL status
mbed_official 235:685d5f11838f 2013 */
mbed_official 235:685d5f11838f 2014 HAL_StatusTypeDef HAL_TIM_OnePulse_DeInit(TIM_HandleTypeDef *htim)
mbed_official 235:685d5f11838f 2015 {
mbed_official 235:685d5f11838f 2016 /* Check the parameters */
mbed_official 235:685d5f11838f 2017 assert_param(IS_TIM_INSTANCE(htim->Instance));
mbed_official 235:685d5f11838f 2018
mbed_official 235:685d5f11838f 2019 htim->State = HAL_TIM_STATE_BUSY;
mbed_official 235:685d5f11838f 2020
mbed_official 235:685d5f11838f 2021 /* Disable the TIM Peripheral Clock */
mbed_official 235:685d5f11838f 2022 __HAL_TIM_DISABLE(htim);
mbed_official 235:685d5f11838f 2023
mbed_official 235:685d5f11838f 2024 /* DeInit the low level hardware: GPIO, CLOCK, NVIC */
mbed_official 235:685d5f11838f 2025 HAL_TIM_OnePulse_MspDeInit(htim);
mbed_official 235:685d5f11838f 2026
mbed_official 235:685d5f11838f 2027 /* Change TIM state */
mbed_official 235:685d5f11838f 2028 htim->State = HAL_TIM_STATE_RESET;
mbed_official 235:685d5f11838f 2029
mbed_official 235:685d5f11838f 2030 /* Release Lock */
mbed_official 235:685d5f11838f 2031 __HAL_UNLOCK(htim);
mbed_official 235:685d5f11838f 2032
mbed_official 235:685d5f11838f 2033 return HAL_OK;
mbed_official 235:685d5f11838f 2034 }
mbed_official 235:685d5f11838f 2035
mbed_official 235:685d5f11838f 2036 /**
mbed_official 235:685d5f11838f 2037 * @brief Initializes the TIM One Pulse MSP.
mbed_official 235:685d5f11838f 2038 * @param htim: pointer to a TIM_HandleTypeDef structure that contains
mbed_official 235:685d5f11838f 2039 * the configuration information for TIM module.
mbed_official 235:685d5f11838f 2040 * @retval None
mbed_official 235:685d5f11838f 2041 */
mbed_official 235:685d5f11838f 2042 __weak void HAL_TIM_OnePulse_MspInit(TIM_HandleTypeDef *htim)
mbed_official 235:685d5f11838f 2043 {
mbed_official 235:685d5f11838f 2044 /* NOTE : This function Should not be modified, when the callback is needed,
mbed_official 235:685d5f11838f 2045 the HAL_TIM_OnePulse_MspInit could be implemented in the user file
mbed_official 235:685d5f11838f 2046 */
mbed_official 235:685d5f11838f 2047 }
mbed_official 235:685d5f11838f 2048
mbed_official 235:685d5f11838f 2049 /**
mbed_official 235:685d5f11838f 2050 * @brief DeInitializes TIM One Pulse MSP.
mbed_official 235:685d5f11838f 2051 * @param htim: pointer to a TIM_HandleTypeDef structure that contains
mbed_official 235:685d5f11838f 2052 * the configuration information for TIM module.
mbed_official 235:685d5f11838f 2053 * @retval None
mbed_official 235:685d5f11838f 2054 */
mbed_official 235:685d5f11838f 2055 __weak void HAL_TIM_OnePulse_MspDeInit(TIM_HandleTypeDef *htim)
mbed_official 235:685d5f11838f 2056 {
mbed_official 235:685d5f11838f 2057 /* NOTE : This function Should not be modified, when the callback is needed,
mbed_official 235:685d5f11838f 2058 the HAL_TIM_OnePulse_MspDeInit could be implemented in the user file
mbed_official 235:685d5f11838f 2059 */
mbed_official 235:685d5f11838f 2060 }
mbed_official 235:685d5f11838f 2061
mbed_official 235:685d5f11838f 2062 /**
mbed_official 235:685d5f11838f 2063 * @brief Starts the TIM One Pulse signal generation.
mbed_official 235:685d5f11838f 2064 * @param htim: pointer to a TIM_HandleTypeDef structure that contains
mbed_official 235:685d5f11838f 2065 * the configuration information for TIM module.
mbed_official 235:685d5f11838f 2066 * @param OutputChannel : TIM Channels to be enabled.
mbed_official 235:685d5f11838f 2067 * This parameter can be one of the following values:
mbed_official 235:685d5f11838f 2068 * @arg TIM_CHANNEL_1: TIM Channel 1 selected
mbed_official 235:685d5f11838f 2069 * @arg TIM_CHANNEL_2: TIM Channel 2 selected
mbed_official 235:685d5f11838f 2070 * @retval HAL status
mbed_official 235:685d5f11838f 2071 */
mbed_official 235:685d5f11838f 2072 HAL_StatusTypeDef HAL_TIM_OnePulse_Start(TIM_HandleTypeDef *htim, uint32_t OutputChannel)
mbed_official 235:685d5f11838f 2073 {
mbed_official 235:685d5f11838f 2074 /* Enable the Capture compare and the Input Capture channels
mbed_official 235:685d5f11838f 2075 (in the OPM Mode the two possible channels that can be used are TIM_CHANNEL_1 and TIM_CHANNEL_2)
mbed_official 235:685d5f11838f 2076 if TIM_CHANNEL_1 is used as output, the TIM_CHANNEL_2 will be used as input and
mbed_official 235:685d5f11838f 2077 if TIM_CHANNEL_1 is used as input, the TIM_CHANNEL_2 will be used as output
mbed_official 235:685d5f11838f 2078 in all combinations, the TIM_CHANNEL_1 and TIM_CHANNEL_2 should be enabled together
mbed_official 235:685d5f11838f 2079
mbed_official 235:685d5f11838f 2080 No need to enable the counter, it's enabled automatically by hardware
mbed_official 235:685d5f11838f 2081 (the counter starts in response to a stimulus and generate a pulse */
mbed_official 235:685d5f11838f 2082
mbed_official 235:685d5f11838f 2083 TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_ENABLE);
mbed_official 235:685d5f11838f 2084 TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_2, TIM_CCx_ENABLE);
mbed_official 235:685d5f11838f 2085
mbed_official 235:685d5f11838f 2086 if(IS_TIM_ADVANCED_INSTANCE(htim->Instance) != RESET)
mbed_official 235:685d5f11838f 2087 {
mbed_official 235:685d5f11838f 2088 /* Enable the main output */
mbed_official 235:685d5f11838f 2089 __HAL_TIM_MOE_ENABLE(htim);
mbed_official 235:685d5f11838f 2090 }
mbed_official 235:685d5f11838f 2091
mbed_official 235:685d5f11838f 2092 /* Return function status */
mbed_official 235:685d5f11838f 2093 return HAL_OK;
mbed_official 235:685d5f11838f 2094 }
mbed_official 235:685d5f11838f 2095
mbed_official 235:685d5f11838f 2096 /**
mbed_official 235:685d5f11838f 2097 * @brief Stops the TIM One Pulse signal generation.
mbed_official 235:685d5f11838f 2098 * @param htim: pointer to a TIM_HandleTypeDef structure that contains
mbed_official 235:685d5f11838f 2099 * the configuration information for TIM module.
mbed_official 235:685d5f11838f 2100 * @param OutputChannel : TIM Channels to be disable.
mbed_official 235:685d5f11838f 2101 * This parameter can be one of the following values:
mbed_official 235:685d5f11838f 2102 * @arg TIM_CHANNEL_1: TIM Channel 1 selected
mbed_official 235:685d5f11838f 2103 * @arg TIM_CHANNEL_2: TIM Channel 2 selected
mbed_official 235:685d5f11838f 2104 * @retval HAL status
mbed_official 235:685d5f11838f 2105 */
mbed_official 235:685d5f11838f 2106 HAL_StatusTypeDef HAL_TIM_OnePulse_Stop(TIM_HandleTypeDef *htim, uint32_t OutputChannel)
mbed_official 235:685d5f11838f 2107 {
mbed_official 235:685d5f11838f 2108 /* Disable the Capture compare and the Input Capture channels
mbed_official 235:685d5f11838f 2109 (in the OPM Mode the two possible channels that can be used are TIM_CHANNEL_1 and TIM_CHANNEL_2)
mbed_official 235:685d5f11838f 2110 if TIM_CHANNEL_1 is used as output, the TIM_CHANNEL_2 will be used as input and
mbed_official 235:685d5f11838f 2111 if TIM_CHANNEL_1 is used as input, the TIM_CHANNEL_2 will be used as output
mbed_official 235:685d5f11838f 2112 in all combinations, the TIM_CHANNEL_1 and TIM_CHANNEL_2 should be disabled together */
mbed_official 235:685d5f11838f 2113
mbed_official 235:685d5f11838f 2114 TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_DISABLE);
mbed_official 235:685d5f11838f 2115 TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_2, TIM_CCx_DISABLE);
mbed_official 235:685d5f11838f 2116
mbed_official 235:685d5f11838f 2117 if(IS_TIM_ADVANCED_INSTANCE(htim->Instance) != RESET)
mbed_official 235:685d5f11838f 2118 {
mbed_official 235:685d5f11838f 2119 /* Disable the Main Ouput */
mbed_official 235:685d5f11838f 2120 __HAL_TIM_MOE_DISABLE(htim);
mbed_official 235:685d5f11838f 2121 }
mbed_official 235:685d5f11838f 2122
mbed_official 235:685d5f11838f 2123 /* Disable the Peripheral */
mbed_official 235:685d5f11838f 2124 __HAL_TIM_DISABLE(htim);
mbed_official 235:685d5f11838f 2125
mbed_official 235:685d5f11838f 2126 /* Return function status */
mbed_official 235:685d5f11838f 2127 return HAL_OK;
mbed_official 235:685d5f11838f 2128 }
mbed_official 235:685d5f11838f 2129
mbed_official 235:685d5f11838f 2130 /**
mbed_official 235:685d5f11838f 2131 * @brief Starts the TIM One Pulse signal generation in interrupt mode.
mbed_official 235:685d5f11838f 2132 * @param htim: pointer to a TIM_HandleTypeDef structure that contains
mbed_official 235:685d5f11838f 2133 * the configuration information for TIM module.
mbed_official 235:685d5f11838f 2134 * @param OutputChannel : TIM Channels to be enabled.
mbed_official 235:685d5f11838f 2135 * This parameter can be one of the following values:
mbed_official 235:685d5f11838f 2136 * @arg TIM_CHANNEL_1: TIM Channel 1 selected
mbed_official 235:685d5f11838f 2137 * @arg TIM_CHANNEL_2: TIM Channel 2 selected
mbed_official 235:685d5f11838f 2138 * @retval HAL status
mbed_official 235:685d5f11838f 2139 */
mbed_official 235:685d5f11838f 2140 HAL_StatusTypeDef HAL_TIM_OnePulse_Start_IT(TIM_HandleTypeDef *htim, uint32_t OutputChannel)
mbed_official 235:685d5f11838f 2141 {
mbed_official 235:685d5f11838f 2142 /* Enable the Capture compare and the Input Capture channels
mbed_official 235:685d5f11838f 2143 (in the OPM Mode the two possible channels that can be used are TIM_CHANNEL_1 and TIM_CHANNEL_2)
mbed_official 235:685d5f11838f 2144 if TIM_CHANNEL_1 is used as output, the TIM_CHANNEL_2 will be used as input and
mbed_official 235:685d5f11838f 2145 if TIM_CHANNEL_1 is used as input, the TIM_CHANNEL_2 will be used as output
mbed_official 235:685d5f11838f 2146 in all combinations, the TIM_CHANNEL_1 and TIM_CHANNEL_2 should be enabled together
mbed_official 235:685d5f11838f 2147
mbed_official 235:685d5f11838f 2148 No need to enable the counter, it's enabled automatically by hardware
mbed_official 235:685d5f11838f 2149 (the counter starts in response to a stimulus and generate a pulse */
mbed_official 235:685d5f11838f 2150
mbed_official 235:685d5f11838f 2151 /* Enable the TIM Capture/Compare 1 interrupt */
mbed_official 235:685d5f11838f 2152 __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC1);
mbed_official 235:685d5f11838f 2153
mbed_official 235:685d5f11838f 2154 /* Enable the TIM Capture/Compare 2 interrupt */
mbed_official 235:685d5f11838f 2155 __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC2);
mbed_official 235:685d5f11838f 2156
mbed_official 235:685d5f11838f 2157 TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_ENABLE);
mbed_official 235:685d5f11838f 2158 TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_2, TIM_CCx_ENABLE);
mbed_official 235:685d5f11838f 2159
mbed_official 235:685d5f11838f 2160 if(IS_TIM_ADVANCED_INSTANCE(htim->Instance) != RESET)
mbed_official 235:685d5f11838f 2161 {
mbed_official 235:685d5f11838f 2162 /* Enable the main output */
mbed_official 235:685d5f11838f 2163 __HAL_TIM_MOE_ENABLE(htim);
mbed_official 235:685d5f11838f 2164 }
mbed_official 235:685d5f11838f 2165
mbed_official 235:685d5f11838f 2166 /* Return function status */
mbed_official 235:685d5f11838f 2167 return HAL_OK;
mbed_official 235:685d5f11838f 2168 }
mbed_official 235:685d5f11838f 2169
mbed_official 235:685d5f11838f 2170 /**
mbed_official 235:685d5f11838f 2171 * @brief Stops the TIM One Pulse signal generation in interrupt mode.
mbed_official 235:685d5f11838f 2172 * @param htim: pointer to a TIM_HandleTypeDef structure that contains
mbed_official 235:685d5f11838f 2173 * the configuration information for TIM module.
mbed_official 235:685d5f11838f 2174 * @param OutputChannel : TIM Channels to be enabled.
mbed_official 235:685d5f11838f 2175 * This parameter can be one of the following values:
mbed_official 235:685d5f11838f 2176 * @arg TIM_CHANNEL_1: TIM Channel 1 selected
mbed_official 235:685d5f11838f 2177 * @arg TIM_CHANNEL_2: TIM Channel 2 selected
mbed_official 235:685d5f11838f 2178 * @retval HAL status
mbed_official 235:685d5f11838f 2179 */
mbed_official 235:685d5f11838f 2180 HAL_StatusTypeDef HAL_TIM_OnePulse_Stop_IT(TIM_HandleTypeDef *htim, uint32_t OutputChannel)
mbed_official 235:685d5f11838f 2181 {
mbed_official 235:685d5f11838f 2182 /* Disable the TIM Capture/Compare 1 interrupt */
mbed_official 235:685d5f11838f 2183 __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC1);
mbed_official 235:685d5f11838f 2184
mbed_official 235:685d5f11838f 2185 /* Disable the TIM Capture/Compare 2 interrupt */
mbed_official 235:685d5f11838f 2186 __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC2);
mbed_official 235:685d5f11838f 2187
mbed_official 235:685d5f11838f 2188 /* Disable the Capture compare and the Input Capture channels
mbed_official 235:685d5f11838f 2189 (in the OPM Mode the two possible channels that can be used are TIM_CHANNEL_1 and TIM_CHANNEL_2)
mbed_official 235:685d5f11838f 2190 if TIM_CHANNEL_1 is used as output, the TIM_CHANNEL_2 will be used as input and
mbed_official 235:685d5f11838f 2191 if TIM_CHANNEL_1 is used as input, the TIM_CHANNEL_2 will be used as output
mbed_official 235:685d5f11838f 2192 in all combinations, the TIM_CHANNEL_1 and TIM_CHANNEL_2 should be disabled together */
mbed_official 235:685d5f11838f 2193 TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_DISABLE);
mbed_official 235:685d5f11838f 2194 TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_2, TIM_CCx_DISABLE);
mbed_official 235:685d5f11838f 2195
mbed_official 235:685d5f11838f 2196 if(IS_TIM_ADVANCED_INSTANCE(htim->Instance) != RESET)
mbed_official 235:685d5f11838f 2197 {
mbed_official 235:685d5f11838f 2198 /* Disable the Main Ouput */
mbed_official 235:685d5f11838f 2199 __HAL_TIM_MOE_DISABLE(htim);
mbed_official 235:685d5f11838f 2200 }
mbed_official 235:685d5f11838f 2201
mbed_official 235:685d5f11838f 2202 /* Disable the Peripheral */
mbed_official 235:685d5f11838f 2203 __HAL_TIM_DISABLE(htim);
mbed_official 235:685d5f11838f 2204
mbed_official 235:685d5f11838f 2205 /* Return function status */
mbed_official 235:685d5f11838f 2206 return HAL_OK;
mbed_official 235:685d5f11838f 2207 }
mbed_official 235:685d5f11838f 2208
mbed_official 235:685d5f11838f 2209 /**
mbed_official 235:685d5f11838f 2210 * @}
mbed_official 235:685d5f11838f 2211 */
mbed_official 235:685d5f11838f 2212
mbed_official 235:685d5f11838f 2213 /** @defgroup TIM_Group6 Time Encoder functions
mbed_official 235:685d5f11838f 2214 * @brief Time Encoder functions
mbed_official 235:685d5f11838f 2215 *
mbed_official 235:685d5f11838f 2216 @verbatim
mbed_official 235:685d5f11838f 2217 ==============================================================================
mbed_official 235:685d5f11838f 2218 ##### Time Encoder functions #####
mbed_official 235:685d5f11838f 2219 ==============================================================================
mbed_official 235:685d5f11838f 2220 [..]
mbed_official 235:685d5f11838f 2221 This section provides functions allowing to:
mbed_official 235:685d5f11838f 2222 (+) Initialize and configure the TIM Encoder.
mbed_official 235:685d5f11838f 2223 (+) De-initialize the TIM Encoder.
mbed_official 235:685d5f11838f 2224 (+) Start the Time Encoder.
mbed_official 235:685d5f11838f 2225 (+) Stop the Time Encoder.
mbed_official 235:685d5f11838f 2226 (+) Start the Time Encoder and enable interrupt.
mbed_official 235:685d5f11838f 2227 (+) Stop the Time Encoder and disable interrupt.
mbed_official 235:685d5f11838f 2228 (+) Start the Time Encoder and enable DMA transfer.
mbed_official 235:685d5f11838f 2229 (+) Stop the Time Encoder and disable DMA transfer.
mbed_official 235:685d5f11838f 2230
mbed_official 235:685d5f11838f 2231 @endverbatim
mbed_official 235:685d5f11838f 2232 * @{
mbed_official 235:685d5f11838f 2233 */
mbed_official 235:685d5f11838f 2234 /**
mbed_official 235:685d5f11838f 2235 * @brief Initializes the TIM Encoder Interface and create the associated handle.
mbed_official 235:685d5f11838f 2236 * @param htim: pointer to a TIM_HandleTypeDef structure that contains
mbed_official 235:685d5f11838f 2237 * the configuration information for TIM module.
mbed_official 235:685d5f11838f 2238 * @param sConfig: TIM Encoder Interface configuration structure
mbed_official 235:685d5f11838f 2239 * @retval HAL status
mbed_official 235:685d5f11838f 2240 */
mbed_official 235:685d5f11838f 2241 HAL_StatusTypeDef HAL_TIM_Encoder_Init(TIM_HandleTypeDef *htim, TIM_Encoder_InitTypeDef* sConfig)
mbed_official 235:685d5f11838f 2242 {
mbed_official 235:685d5f11838f 2243 uint32_t tmpsmcr = 0;
mbed_official 235:685d5f11838f 2244 uint32_t tmpccmr1 = 0;
mbed_official 235:685d5f11838f 2245 uint32_t tmpccer = 0;
mbed_official 235:685d5f11838f 2246
mbed_official 235:685d5f11838f 2247 /* Check the TIM handle allocation */
mbed_official 235:685d5f11838f 2248 if(htim == NULL)
mbed_official 235:685d5f11838f 2249 {
mbed_official 235:685d5f11838f 2250 return HAL_ERROR;
mbed_official 235:685d5f11838f 2251 }
mbed_official 235:685d5f11838f 2252
mbed_official 235:685d5f11838f 2253 /* Check the parameters */
mbed_official 235:685d5f11838f 2254 assert_param(IS_TIM_CC2_INSTANCE(htim->Instance));
mbed_official 235:685d5f11838f 2255 assert_param(IS_TIM_ENCODER_MODE(sConfig->EncoderMode));
mbed_official 235:685d5f11838f 2256 assert_param(IS_TIM_IC_SELECTION(sConfig->IC1Selection));
mbed_official 235:685d5f11838f 2257 assert_param(IS_TIM_IC_SELECTION(sConfig->IC2Selection));
mbed_official 235:685d5f11838f 2258 assert_param(IS_TIM_IC_POLARITY(sConfig->IC1Polarity));
mbed_official 235:685d5f11838f 2259 assert_param(IS_TIM_IC_POLARITY(sConfig->IC2Polarity));
mbed_official 235:685d5f11838f 2260 assert_param(IS_TIM_IC_PRESCALER(sConfig->IC1Prescaler));
mbed_official 235:685d5f11838f 2261 assert_param(IS_TIM_IC_PRESCALER(sConfig->IC2Prescaler));
mbed_official 235:685d5f11838f 2262 assert_param(IS_TIM_IC_FILTER(sConfig->IC1Filter));
mbed_official 235:685d5f11838f 2263 assert_param(IS_TIM_IC_FILTER(sConfig->IC2Filter));
mbed_official 235:685d5f11838f 2264
mbed_official 235:685d5f11838f 2265 if(htim->State == HAL_TIM_STATE_RESET)
mbed_official 235:685d5f11838f 2266 {
mbed_official 235:685d5f11838f 2267 /* Init the low level hardware : GPIO, CLOCK, NVIC and DMA */
mbed_official 235:685d5f11838f 2268 HAL_TIM_Encoder_MspInit(htim);
mbed_official 235:685d5f11838f 2269 }
mbed_official 235:685d5f11838f 2270
mbed_official 235:685d5f11838f 2271 /* Set the TIM state */
mbed_official 235:685d5f11838f 2272 htim->State= HAL_TIM_STATE_BUSY;
mbed_official 235:685d5f11838f 2273
mbed_official 235:685d5f11838f 2274 /* Reset the SMS bits */
mbed_official 235:685d5f11838f 2275 htim->Instance->SMCR &= ~TIM_SMCR_SMS;
mbed_official 235:685d5f11838f 2276
mbed_official 235:685d5f11838f 2277 /* Configure the Time base in the Encoder Mode */
mbed_official 235:685d5f11838f 2278 TIM_Base_SetConfig(htim->Instance, &htim->Init);
mbed_official 235:685d5f11838f 2279
mbed_official 235:685d5f11838f 2280 /* Get the TIMx SMCR register value */
mbed_official 235:685d5f11838f 2281 tmpsmcr = htim->Instance->SMCR;
mbed_official 235:685d5f11838f 2282
mbed_official 235:685d5f11838f 2283 /* Get the TIMx CCMR1 register value */
mbed_official 235:685d5f11838f 2284 tmpccmr1 = htim->Instance->CCMR1;
mbed_official 235:685d5f11838f 2285
mbed_official 235:685d5f11838f 2286 /* Get the TIMx CCER register value */
mbed_official 235:685d5f11838f 2287 tmpccer = htim->Instance->CCER;
mbed_official 235:685d5f11838f 2288
mbed_official 235:685d5f11838f 2289 /* Set the encoder Mode */
mbed_official 235:685d5f11838f 2290 tmpsmcr |= sConfig->EncoderMode;
mbed_official 235:685d5f11838f 2291
mbed_official 235:685d5f11838f 2292 /* Select the Capture Compare 1 and the Capture Compare 2 as input */
mbed_official 235:685d5f11838f 2293 tmpccmr1 &= ~(TIM_CCMR1_CC1S | TIM_CCMR1_CC2S);
mbed_official 235:685d5f11838f 2294 tmpccmr1 |= (sConfig->IC1Selection | (sConfig->IC2Selection << 8));
mbed_official 235:685d5f11838f 2295
mbed_official 235:685d5f11838f 2296 /* Set the the Capture Compare 1 and the Capture Compare 2 prescalers and filters */
mbed_official 235:685d5f11838f 2297 tmpccmr1 &= ~(TIM_CCMR1_IC1PSC | TIM_CCMR1_IC2PSC);
mbed_official 235:685d5f11838f 2298 tmpccmr1 &= ~(TIM_CCMR1_IC1F | TIM_CCMR1_IC2F);
mbed_official 235:685d5f11838f 2299 tmpccmr1 |= sConfig->IC1Prescaler | (sConfig->IC2Prescaler << 8);
mbed_official 235:685d5f11838f 2300 tmpccmr1 |= (sConfig->IC1Filter << 4) | (sConfig->IC2Filter << 12);
mbed_official 235:685d5f11838f 2301
mbed_official 235:685d5f11838f 2302 /* Set the TI1 and the TI2 Polarities */
mbed_official 235:685d5f11838f 2303 tmpccer &= ~(TIM_CCER_CC1P | TIM_CCER_CC2P);
mbed_official 235:685d5f11838f 2304 tmpccer &= ~(TIM_CCER_CC1NP | TIM_CCER_CC2NP);
mbed_official 235:685d5f11838f 2305 tmpccer |= sConfig->IC1Polarity | (sConfig->IC2Polarity << 4);
mbed_official 235:685d5f11838f 2306
mbed_official 235:685d5f11838f 2307 /* Write to TIMx SMCR */
mbed_official 235:685d5f11838f 2308 htim->Instance->SMCR = tmpsmcr;
mbed_official 235:685d5f11838f 2309
mbed_official 235:685d5f11838f 2310 /* Write to TIMx CCMR1 */
mbed_official 235:685d5f11838f 2311 htim->Instance->CCMR1 = tmpccmr1;
mbed_official 235:685d5f11838f 2312
mbed_official 235:685d5f11838f 2313 /* Write to TIMx CCER */
mbed_official 235:685d5f11838f 2314 htim->Instance->CCER = tmpccer;
mbed_official 235:685d5f11838f 2315
mbed_official 235:685d5f11838f 2316 /* Initialize the TIM state*/
mbed_official 235:685d5f11838f 2317 htim->State= HAL_TIM_STATE_READY;
mbed_official 235:685d5f11838f 2318
mbed_official 235:685d5f11838f 2319 return HAL_OK;
mbed_official 235:685d5f11838f 2320 }
mbed_official 235:685d5f11838f 2321
mbed_official 235:685d5f11838f 2322 /**
mbed_official 235:685d5f11838f 2323 * @brief DeInitializes the TIM Encoder interface
mbed_official 235:685d5f11838f 2324 * @param htim: pointer to a TIM_HandleTypeDef structure that contains
mbed_official 235:685d5f11838f 2325 * the configuration information for TIM module.
mbed_official 235:685d5f11838f 2326 * @retval HAL status
mbed_official 235:685d5f11838f 2327 */
mbed_official 235:685d5f11838f 2328 HAL_StatusTypeDef HAL_TIM_Encoder_DeInit(TIM_HandleTypeDef *htim)
mbed_official 235:685d5f11838f 2329 {
mbed_official 235:685d5f11838f 2330 /* Check the parameters */
mbed_official 235:685d5f11838f 2331 assert_param(IS_TIM_INSTANCE(htim->Instance));
mbed_official 235:685d5f11838f 2332
mbed_official 235:685d5f11838f 2333 htim->State = HAL_TIM_STATE_BUSY;
mbed_official 235:685d5f11838f 2334
mbed_official 235:685d5f11838f 2335 /* Disable the TIM Peripheral Clock */
mbed_official 235:685d5f11838f 2336 __HAL_TIM_DISABLE(htim);
mbed_official 235:685d5f11838f 2337
mbed_official 235:685d5f11838f 2338 /* DeInit the low level hardware: GPIO, CLOCK, NVIC */
mbed_official 235:685d5f11838f 2339 HAL_TIM_Encoder_MspDeInit(htim);
mbed_official 235:685d5f11838f 2340
mbed_official 235:685d5f11838f 2341 /* Change TIM state */
mbed_official 235:685d5f11838f 2342 htim->State = HAL_TIM_STATE_RESET;
mbed_official 235:685d5f11838f 2343
mbed_official 235:685d5f11838f 2344 /* Release Lock */
mbed_official 235:685d5f11838f 2345 __HAL_UNLOCK(htim);
mbed_official 235:685d5f11838f 2346
mbed_official 235:685d5f11838f 2347 return HAL_OK;
mbed_official 235:685d5f11838f 2348 }
mbed_official 235:685d5f11838f 2349
mbed_official 235:685d5f11838f 2350 /**
mbed_official 235:685d5f11838f 2351 * @brief Initializes the TIM Encoder Interface MSP.
mbed_official 235:685d5f11838f 2352 * @param htim: pointer to a TIM_HandleTypeDef structure that contains
mbed_official 235:685d5f11838f 2353 * the configuration information for TIM module.
mbed_official 235:685d5f11838f 2354 * @retval None
mbed_official 235:685d5f11838f 2355 */
mbed_official 235:685d5f11838f 2356 __weak void HAL_TIM_Encoder_MspInit(TIM_HandleTypeDef *htim)
mbed_official 235:685d5f11838f 2357 {
mbed_official 235:685d5f11838f 2358 /* NOTE : This function Should not be modified, when the callback is needed,
mbed_official 235:685d5f11838f 2359 the HAL_TIM_Encoder_MspInit could be implemented in the user file
mbed_official 235:685d5f11838f 2360 */
mbed_official 235:685d5f11838f 2361 }
mbed_official 235:685d5f11838f 2362
mbed_official 235:685d5f11838f 2363 /**
mbed_official 235:685d5f11838f 2364 * @brief DeInitializes TIM Encoder Interface MSP.
mbed_official 235:685d5f11838f 2365 * @param htim: pointer to a TIM_HandleTypeDef structure that contains
mbed_official 235:685d5f11838f 2366 * the configuration information for TIM module.
mbed_official 235:685d5f11838f 2367 * @retval None
mbed_official 235:685d5f11838f 2368 */
mbed_official 235:685d5f11838f 2369 __weak void HAL_TIM_Encoder_MspDeInit(TIM_HandleTypeDef *htim)
mbed_official 235:685d5f11838f 2370 {
mbed_official 235:685d5f11838f 2371 /* NOTE : This function Should not be modified, when the callback is needed,
mbed_official 235:685d5f11838f 2372 the HAL_TIM_Encoder_MspDeInit could be implemented in the user file
mbed_official 235:685d5f11838f 2373 */
mbed_official 235:685d5f11838f 2374 }
mbed_official 235:685d5f11838f 2375
mbed_official 235:685d5f11838f 2376 /**
mbed_official 235:685d5f11838f 2377 * @brief Starts the TIM Encoder Interface.
mbed_official 235:685d5f11838f 2378 * @param htim: pointer to a TIM_HandleTypeDef structure that contains
mbed_official 235:685d5f11838f 2379 * the configuration information for TIM module.
mbed_official 235:685d5f11838f 2380 * @param Channel: TIM Channels to be enabled.
mbed_official 235:685d5f11838f 2381 * This parameter can be one of the following values:
mbed_official 235:685d5f11838f 2382 * @arg TIM_CHANNEL_1: TIM Channel 1 selected
mbed_official 235:685d5f11838f 2383 * @arg TIM_CHANNEL_2: TIM Channel 2 selected
mbed_official 235:685d5f11838f 2384 * @retval HAL status
mbed_official 235:685d5f11838f 2385 */
mbed_official 235:685d5f11838f 2386 HAL_StatusTypeDef HAL_TIM_Encoder_Start(TIM_HandleTypeDef *htim, uint32_t Channel)
mbed_official 235:685d5f11838f 2387 {
mbed_official 235:685d5f11838f 2388 /* Check the parameters */
mbed_official 235:685d5f11838f 2389 assert_param(IS_TIM_CC2_INSTANCE(htim->Instance));
mbed_official 235:685d5f11838f 2390
mbed_official 235:685d5f11838f 2391 /* Enable the encoder interface channels */
mbed_official 235:685d5f11838f 2392 switch (Channel)
mbed_official 235:685d5f11838f 2393 {
mbed_official 235:685d5f11838f 2394 case TIM_CHANNEL_1:
mbed_official 235:685d5f11838f 2395 {
mbed_official 235:685d5f11838f 2396 TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_ENABLE);
mbed_official 235:685d5f11838f 2397 break;
mbed_official 235:685d5f11838f 2398 }
mbed_official 235:685d5f11838f 2399 case TIM_CHANNEL_2:
mbed_official 235:685d5f11838f 2400 {
mbed_official 235:685d5f11838f 2401 TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_2, TIM_CCx_ENABLE);
mbed_official 235:685d5f11838f 2402 break;
mbed_official 235:685d5f11838f 2403 }
mbed_official 235:685d5f11838f 2404 default :
mbed_official 235:685d5f11838f 2405 {
mbed_official 235:685d5f11838f 2406 TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_ENABLE);
mbed_official 235:685d5f11838f 2407 TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_2, TIM_CCx_ENABLE);
mbed_official 235:685d5f11838f 2408 break;
mbed_official 235:685d5f11838f 2409 }
mbed_official 235:685d5f11838f 2410 }
mbed_official 235:685d5f11838f 2411 /* Enable the Peripheral */
mbed_official 235:685d5f11838f 2412 __HAL_TIM_ENABLE(htim);
mbed_official 235:685d5f11838f 2413
mbed_official 235:685d5f11838f 2414 /* Return function status */
mbed_official 235:685d5f11838f 2415 return HAL_OK;
mbed_official 235:685d5f11838f 2416 }
mbed_official 235:685d5f11838f 2417
mbed_official 235:685d5f11838f 2418 /**
mbed_official 235:685d5f11838f 2419 * @brief Stops the TIM Encoder Interface.
mbed_official 235:685d5f11838f 2420 * @param htim: pointer to a TIM_HandleTypeDef structure that contains
mbed_official 235:685d5f11838f 2421 * the configuration information for TIM module.
mbed_official 235:685d5f11838f 2422 * @param Channel: TIM Channels to be disabled.
mbed_official 235:685d5f11838f 2423 * This parameter can be one of the following values:
mbed_official 235:685d5f11838f 2424 * @arg TIM_CHANNEL_1: TIM Channel 1 selected
mbed_official 235:685d5f11838f 2425 * @arg TIM_CHANNEL_2: TIM Channel 2 selected
mbed_official 235:685d5f11838f 2426 * @retval HAL status
mbed_official 235:685d5f11838f 2427 */
mbed_official 235:685d5f11838f 2428 HAL_StatusTypeDef HAL_TIM_Encoder_Stop(TIM_HandleTypeDef *htim, uint32_t Channel)
mbed_official 235:685d5f11838f 2429 {
mbed_official 235:685d5f11838f 2430 /* Check the parameters */
mbed_official 235:685d5f11838f 2431 assert_param(IS_TIM_CC2_INSTANCE(htim->Instance));
mbed_official 235:685d5f11838f 2432
mbed_official 235:685d5f11838f 2433 /* Disable the Input Capture channels 1 and 2
mbed_official 235:685d5f11838f 2434 (in the EncoderInterface the two possible channels that can be used are TIM_CHANNEL_1 and TIM_CHANNEL_2) */
mbed_official 235:685d5f11838f 2435 switch (Channel)
mbed_official 235:685d5f11838f 2436 {
mbed_official 235:685d5f11838f 2437 case TIM_CHANNEL_1:
mbed_official 235:685d5f11838f 2438 {
mbed_official 235:685d5f11838f 2439 TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_DISABLE);
mbed_official 235:685d5f11838f 2440 break;
mbed_official 235:685d5f11838f 2441 }
mbed_official 235:685d5f11838f 2442 case TIM_CHANNEL_2:
mbed_official 235:685d5f11838f 2443 {
mbed_official 235:685d5f11838f 2444 TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_2, TIM_CCx_DISABLE);
mbed_official 235:685d5f11838f 2445 break;
mbed_official 235:685d5f11838f 2446 }
mbed_official 235:685d5f11838f 2447 default :
mbed_official 235:685d5f11838f 2448 {
mbed_official 235:685d5f11838f 2449 TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_DISABLE);
mbed_official 235:685d5f11838f 2450 TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_2, TIM_CCx_DISABLE);
mbed_official 235:685d5f11838f 2451 break;
mbed_official 235:685d5f11838f 2452 }
mbed_official 235:685d5f11838f 2453 }
mbed_official 235:685d5f11838f 2454 /* Disable the Peripheral */
mbed_official 235:685d5f11838f 2455 __HAL_TIM_DISABLE(htim);
mbed_official 235:685d5f11838f 2456
mbed_official 235:685d5f11838f 2457 /* Return function status */
mbed_official 235:685d5f11838f 2458 return HAL_OK;
mbed_official 235:685d5f11838f 2459 }
mbed_official 235:685d5f11838f 2460
mbed_official 235:685d5f11838f 2461 /**
mbed_official 235:685d5f11838f 2462 * @brief Starts the TIM Encoder Interface in interrupt mode.
mbed_official 235:685d5f11838f 2463 * @param htim: pointer to a TIM_HandleTypeDef structure that contains
mbed_official 235:685d5f11838f 2464 * the configuration information for TIM module.
mbed_official 235:685d5f11838f 2465 * @param Channel: TIM Channels to be enabled.
mbed_official 235:685d5f11838f 2466 * This parameter can be one of the following values:
mbed_official 235:685d5f11838f 2467 * @arg TIM_CHANNEL_1: TIM Channel 1 selected
mbed_official 235:685d5f11838f 2468 * @arg TIM_CHANNEL_2: TIM Channel 2 selected
mbed_official 235:685d5f11838f 2469 * @retval HAL status
mbed_official 235:685d5f11838f 2470 */
mbed_official 235:685d5f11838f 2471 HAL_StatusTypeDef HAL_TIM_Encoder_Start_IT(TIM_HandleTypeDef *htim, uint32_t Channel)
mbed_official 235:685d5f11838f 2472 {
mbed_official 235:685d5f11838f 2473 /* Check the parameters */
mbed_official 235:685d5f11838f 2474 assert_param(IS_TIM_CC2_INSTANCE(htim->Instance));
mbed_official 235:685d5f11838f 2475
mbed_official 235:685d5f11838f 2476 /* Enable the encoder interface channels */
mbed_official 235:685d5f11838f 2477 /* Enable the capture compare Interrupts 1 and/or 2 */
mbed_official 235:685d5f11838f 2478 switch (Channel)
mbed_official 235:685d5f11838f 2479 {
mbed_official 235:685d5f11838f 2480 case TIM_CHANNEL_1:
mbed_official 235:685d5f11838f 2481 {
mbed_official 235:685d5f11838f 2482 TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_ENABLE);
mbed_official 235:685d5f11838f 2483 __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC1);
mbed_official 235:685d5f11838f 2484 break;
mbed_official 235:685d5f11838f 2485 }
mbed_official 235:685d5f11838f 2486 case TIM_CHANNEL_2:
mbed_official 235:685d5f11838f 2487 {
mbed_official 235:685d5f11838f 2488 TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_2, TIM_CCx_ENABLE);
mbed_official 235:685d5f11838f 2489 __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC2);
mbed_official 235:685d5f11838f 2490 break;
mbed_official 235:685d5f11838f 2491 }
mbed_official 235:685d5f11838f 2492 default :
mbed_official 235:685d5f11838f 2493 {
mbed_official 235:685d5f11838f 2494 TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_ENABLE);
mbed_official 235:685d5f11838f 2495 TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_2, TIM_CCx_ENABLE);
mbed_official 235:685d5f11838f 2496 __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC1);
mbed_official 235:685d5f11838f 2497 __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC2);
mbed_official 235:685d5f11838f 2498 break;
mbed_official 235:685d5f11838f 2499 }
mbed_official 235:685d5f11838f 2500 }
mbed_official 235:685d5f11838f 2501
mbed_official 235:685d5f11838f 2502 /* Enable the Peripheral */
mbed_official 235:685d5f11838f 2503 __HAL_TIM_ENABLE(htim);
mbed_official 235:685d5f11838f 2504
mbed_official 235:685d5f11838f 2505 /* Return function status */
mbed_official 235:685d5f11838f 2506 return HAL_OK;
mbed_official 235:685d5f11838f 2507 }
mbed_official 235:685d5f11838f 2508
mbed_official 235:685d5f11838f 2509 /**
mbed_official 235:685d5f11838f 2510 * @brief Stops the TIM Encoder Interface in interrupt mode.
mbed_official 235:685d5f11838f 2511 * @param htim: pointer to a TIM_HandleTypeDef structure that contains
mbed_official 235:685d5f11838f 2512 * the configuration information for TIM module.
mbed_official 235:685d5f11838f 2513 * @param Channel: TIM Channels to be disabled.
mbed_official 235:685d5f11838f 2514 * This parameter can be one of the following values:
mbed_official 235:685d5f11838f 2515 * @arg TIM_CHANNEL_1: TIM Channel 1 selected
mbed_official 235:685d5f11838f 2516 * @arg TIM_CHANNEL_2: TIM Channel 2 selected
mbed_official 235:685d5f11838f 2517 * @retval HAL status
mbed_official 235:685d5f11838f 2518 */
mbed_official 235:685d5f11838f 2519 HAL_StatusTypeDef HAL_TIM_Encoder_Stop_IT(TIM_HandleTypeDef *htim, uint32_t Channel)
mbed_official 235:685d5f11838f 2520 {
mbed_official 235:685d5f11838f 2521 /* Check the parameters */
mbed_official 235:685d5f11838f 2522 assert_param(IS_TIM_CC2_INSTANCE(htim->Instance));
mbed_official 235:685d5f11838f 2523
mbed_official 235:685d5f11838f 2524 /* Disable the Input Capture channels 1 and 2
mbed_official 235:685d5f11838f 2525 (in the EncoderInterface the two possible channels that can be used are TIM_CHANNEL_1 and TIM_CHANNEL_2) */
mbed_official 235:685d5f11838f 2526 if(Channel == TIM_CHANNEL_1)
mbed_official 235:685d5f11838f 2527 {
mbed_official 235:685d5f11838f 2528 TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_DISABLE);
mbed_official 235:685d5f11838f 2529
mbed_official 235:685d5f11838f 2530 /* Disable the capture compare Interrupts 1 */
mbed_official 235:685d5f11838f 2531 __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC1);
mbed_official 235:685d5f11838f 2532 }
mbed_official 235:685d5f11838f 2533 else if(Channel == TIM_CHANNEL_2)
mbed_official 235:685d5f11838f 2534 {
mbed_official 235:685d5f11838f 2535 TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_2, TIM_CCx_DISABLE);
mbed_official 235:685d5f11838f 2536
mbed_official 235:685d5f11838f 2537 /* Disable the capture compare Interrupts 2 */
mbed_official 235:685d5f11838f 2538 __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC2);
mbed_official 235:685d5f11838f 2539 }
mbed_official 235:685d5f11838f 2540 else
mbed_official 235:685d5f11838f 2541 {
mbed_official 235:685d5f11838f 2542 TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_DISABLE);
mbed_official 235:685d5f11838f 2543 TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_2, TIM_CCx_DISABLE);
mbed_official 235:685d5f11838f 2544
mbed_official 235:685d5f11838f 2545 /* Disable the capture compare Interrupts 1 and 2 */
mbed_official 235:685d5f11838f 2546 __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC1);
mbed_official 235:685d5f11838f 2547 __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC2);
mbed_official 235:685d5f11838f 2548 }
mbed_official 235:685d5f11838f 2549
mbed_official 235:685d5f11838f 2550 /* Disable the Peripheral */
mbed_official 235:685d5f11838f 2551 __HAL_TIM_DISABLE(htim);
mbed_official 235:685d5f11838f 2552
mbed_official 235:685d5f11838f 2553 /* Change the htim state */
mbed_official 235:685d5f11838f 2554 htim->State = HAL_TIM_STATE_READY;
mbed_official 235:685d5f11838f 2555
mbed_official 235:685d5f11838f 2556 /* Return function status */
mbed_official 235:685d5f11838f 2557 return HAL_OK;
mbed_official 235:685d5f11838f 2558 }
mbed_official 235:685d5f11838f 2559
mbed_official 235:685d5f11838f 2560 /**
mbed_official 235:685d5f11838f 2561 * @brief Starts the TIM Encoder Interface in DMA mode.
mbed_official 235:685d5f11838f 2562 * @param htim: pointer to a TIM_HandleTypeDef structure that contains
mbed_official 235:685d5f11838f 2563 * the configuration information for TIM module.
mbed_official 235:685d5f11838f 2564 * @param Channel: TIM Channels to be enabled.
mbed_official 235:685d5f11838f 2565 * This parameter can be one of the following values:
mbed_official 235:685d5f11838f 2566 * @arg TIM_CHANNEL_1: TIM Channel 1 selected
mbed_official 235:685d5f11838f 2567 * @arg TIM_CHANNEL_2: TIM Channel 2 selected
mbed_official 235:685d5f11838f 2568 * @param pData1: The destination Buffer address for IC1.
mbed_official 235:685d5f11838f 2569 * @param pData2: The destination Buffer address for IC2.
mbed_official 235:685d5f11838f 2570 * @param Length: The length of data to be transferred from TIM peripheral to memory.
mbed_official 235:685d5f11838f 2571 * @retval HAL status
mbed_official 235:685d5f11838f 2572 */
mbed_official 235:685d5f11838f 2573 HAL_StatusTypeDef HAL_TIM_Encoder_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Channel, uint32_t *pData1, uint32_t *pData2, uint16_t Length)
mbed_official 235:685d5f11838f 2574 {
mbed_official 235:685d5f11838f 2575 /* Check the parameters */
mbed_official 235:685d5f11838f 2576 assert_param(IS_TIM_DMA_CC_INSTANCE(htim->Instance));
mbed_official 235:685d5f11838f 2577
mbed_official 235:685d5f11838f 2578 if((htim->State == HAL_TIM_STATE_BUSY))
mbed_official 235:685d5f11838f 2579 {
mbed_official 235:685d5f11838f 2580 return HAL_BUSY;
mbed_official 235:685d5f11838f 2581 }
mbed_official 235:685d5f11838f 2582 else if((htim->State == HAL_TIM_STATE_READY))
mbed_official 235:685d5f11838f 2583 {
mbed_official 235:685d5f11838f 2584 if((((pData1 == 0) || (pData2 == 0) )) && (Length > 0))
mbed_official 235:685d5f11838f 2585 {
mbed_official 235:685d5f11838f 2586 return HAL_ERROR;
mbed_official 235:685d5f11838f 2587 }
mbed_official 235:685d5f11838f 2588 else
mbed_official 235:685d5f11838f 2589 {
mbed_official 235:685d5f11838f 2590 htim->State = HAL_TIM_STATE_BUSY;
mbed_official 235:685d5f11838f 2591 }
mbed_official 235:685d5f11838f 2592 }
mbed_official 235:685d5f11838f 2593
mbed_official 235:685d5f11838f 2594 switch (Channel)
mbed_official 235:685d5f11838f 2595 {
mbed_official 235:685d5f11838f 2596 case TIM_CHANNEL_1:
mbed_official 235:685d5f11838f 2597 {
mbed_official 235:685d5f11838f 2598 /* Set the DMA Period elapsed callback */
mbed_official 235:685d5f11838f 2599 htim->hdma[TIM_DMA_ID_CC1]->XferCpltCallback = HAL_TIM_DMACaptureCplt;
mbed_official 235:685d5f11838f 2600
mbed_official 235:685d5f11838f 2601 /* Set the DMA error callback */
mbed_official 235:685d5f11838f 2602 htim->hdma[TIM_DMA_ID_CC1]->XferErrorCallback = HAL_TIM_DMAError ;
mbed_official 235:685d5f11838f 2603
mbed_official 235:685d5f11838f 2604 /* Enable the DMA Stream */
mbed_official 235:685d5f11838f 2605 HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC1], (uint32_t)&htim->Instance->CCR1, (uint32_t )pData1, Length);
mbed_official 235:685d5f11838f 2606
mbed_official 235:685d5f11838f 2607 /* Enable the TIM Input Capture DMA request */
mbed_official 235:685d5f11838f 2608 __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC1);
mbed_official 235:685d5f11838f 2609
mbed_official 235:685d5f11838f 2610 /* Enable the Peripheral */
mbed_official 235:685d5f11838f 2611 __HAL_TIM_ENABLE(htim);
mbed_official 235:685d5f11838f 2612
mbed_official 235:685d5f11838f 2613 /* Enable the Capture compare channel */
mbed_official 235:685d5f11838f 2614 TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_ENABLE);
mbed_official 235:685d5f11838f 2615 }
mbed_official 235:685d5f11838f 2616 break;
mbed_official 235:685d5f11838f 2617
mbed_official 235:685d5f11838f 2618 case TIM_CHANNEL_2:
mbed_official 235:685d5f11838f 2619 {
mbed_official 235:685d5f11838f 2620 /* Set the DMA Period elapsed callback */
mbed_official 235:685d5f11838f 2621 htim->hdma[TIM_DMA_ID_CC2]->XferCpltCallback = HAL_TIM_DMACaptureCplt;
mbed_official 235:685d5f11838f 2622
mbed_official 235:685d5f11838f 2623 /* Set the DMA error callback */
mbed_official 235:685d5f11838f 2624 htim->hdma[TIM_DMA_ID_CC2]->XferErrorCallback = HAL_TIM_DMAError;
mbed_official 235:685d5f11838f 2625 /* Enable the DMA Stream */
mbed_official 235:685d5f11838f 2626 HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC2], (uint32_t)&htim->Instance->CCR2, (uint32_t)pData2, Length);
mbed_official 235:685d5f11838f 2627
mbed_official 235:685d5f11838f 2628 /* Enable the TIM Input Capture DMA request */
mbed_official 235:685d5f11838f 2629 __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC2);
mbed_official 235:685d5f11838f 2630
mbed_official 235:685d5f11838f 2631 /* Enable the Peripheral */
mbed_official 235:685d5f11838f 2632 __HAL_TIM_ENABLE(htim);
mbed_official 235:685d5f11838f 2633
mbed_official 235:685d5f11838f 2634 /* Enable the Capture compare channel */
mbed_official 235:685d5f11838f 2635 TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_2, TIM_CCx_ENABLE);
mbed_official 235:685d5f11838f 2636 }
mbed_official 235:685d5f11838f 2637 break;
mbed_official 235:685d5f11838f 2638
mbed_official 235:685d5f11838f 2639 case TIM_CHANNEL_ALL:
mbed_official 235:685d5f11838f 2640 {
mbed_official 235:685d5f11838f 2641 /* Set the DMA Period elapsed callback */
mbed_official 235:685d5f11838f 2642 htim->hdma[TIM_DMA_ID_CC1]->XferCpltCallback = HAL_TIM_DMACaptureCplt;
mbed_official 235:685d5f11838f 2643
mbed_official 235:685d5f11838f 2644 /* Set the DMA error callback */
mbed_official 235:685d5f11838f 2645 htim->hdma[TIM_DMA_ID_CC1]->XferErrorCallback = HAL_TIM_DMAError ;
mbed_official 235:685d5f11838f 2646
mbed_official 235:685d5f11838f 2647 /* Enable the DMA Stream */
mbed_official 235:685d5f11838f 2648 HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC1], (uint32_t)&htim->Instance->CCR1, (uint32_t)pData1, Length);
mbed_official 235:685d5f11838f 2649
mbed_official 235:685d5f11838f 2650 /* Set the DMA Period elapsed callback */
mbed_official 235:685d5f11838f 2651 htim->hdma[TIM_DMA_ID_CC2]->XferCpltCallback = HAL_TIM_DMACaptureCplt;
mbed_official 235:685d5f11838f 2652
mbed_official 235:685d5f11838f 2653 /* Set the DMA error callback */
mbed_official 235:685d5f11838f 2654 htim->hdma[TIM_DMA_ID_CC2]->XferErrorCallback = HAL_TIM_DMAError ;
mbed_official 235:685d5f11838f 2655
mbed_official 235:685d5f11838f 2656 /* Enable the DMA Stream */
mbed_official 235:685d5f11838f 2657 HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC2], (uint32_t)&htim->Instance->CCR2, (uint32_t)pData2, Length);
mbed_official 235:685d5f11838f 2658
mbed_official 235:685d5f11838f 2659 /* Enable the Peripheral */
mbed_official 235:685d5f11838f 2660 __HAL_TIM_ENABLE(htim);
mbed_official 235:685d5f11838f 2661
mbed_official 235:685d5f11838f 2662 /* Enable the Capture compare channel */
mbed_official 235:685d5f11838f 2663 TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_ENABLE);
mbed_official 235:685d5f11838f 2664 TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_2, TIM_CCx_ENABLE);
mbed_official 235:685d5f11838f 2665
mbed_official 235:685d5f11838f 2666 /* Enable the TIM Input Capture DMA request */
mbed_official 235:685d5f11838f 2667 __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC1);
mbed_official 235:685d5f11838f 2668 /* Enable the TIM Input Capture DMA request */
mbed_official 235:685d5f11838f 2669 __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC2);
mbed_official 235:685d5f11838f 2670 }
mbed_official 235:685d5f11838f 2671 break;
mbed_official 235:685d5f11838f 2672
mbed_official 235:685d5f11838f 2673 default:
mbed_official 235:685d5f11838f 2674 break;
mbed_official 235:685d5f11838f 2675 }
mbed_official 235:685d5f11838f 2676 /* Return function status */
mbed_official 235:685d5f11838f 2677 return HAL_OK;
mbed_official 235:685d5f11838f 2678 }
mbed_official 235:685d5f11838f 2679
mbed_official 235:685d5f11838f 2680 /**
mbed_official 235:685d5f11838f 2681 * @brief Stops the TIM Encoder Interface in DMA mode.
mbed_official 235:685d5f11838f 2682 * @param htim: pointer to a TIM_HandleTypeDef structure that contains
mbed_official 235:685d5f11838f 2683 * the configuration information for TIM module.
mbed_official 235:685d5f11838f 2684 * @param Channel: TIM Channels to be enabled.
mbed_official 235:685d5f11838f 2685 * This parameter can be one of the following values:
mbed_official 235:685d5f11838f 2686 * @arg TIM_CHANNEL_1: TIM Channel 1 selected
mbed_official 235:685d5f11838f 2687 * @arg TIM_CHANNEL_2: TIM Channel 2 selected
mbed_official 235:685d5f11838f 2688 * @retval HAL status
mbed_official 235:685d5f11838f 2689 */
mbed_official 235:685d5f11838f 2690 HAL_StatusTypeDef HAL_TIM_Encoder_Stop_DMA(TIM_HandleTypeDef *htim, uint32_t Channel)
mbed_official 235:685d5f11838f 2691 {
mbed_official 235:685d5f11838f 2692 /* Check the parameters */
mbed_official 235:685d5f11838f 2693 assert_param(IS_TIM_DMA_CC_INSTANCE(htim->Instance));
mbed_official 235:685d5f11838f 2694
mbed_official 235:685d5f11838f 2695 /* Disable the Input Capture channels 1 and 2
mbed_official 235:685d5f11838f 2696 (in the EncoderInterface the two possible channels that can be used are TIM_CHANNEL_1 and TIM_CHANNEL_2) */
mbed_official 235:685d5f11838f 2697 if(Channel == TIM_CHANNEL_1)
mbed_official 235:685d5f11838f 2698 {
mbed_official 235:685d5f11838f 2699 TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_DISABLE);
mbed_official 235:685d5f11838f 2700
mbed_official 235:685d5f11838f 2701 /* Disable the capture compare DMA Request 1 */
mbed_official 235:685d5f11838f 2702 __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC1);
mbed_official 235:685d5f11838f 2703 }
mbed_official 235:685d5f11838f 2704 else if(Channel == TIM_CHANNEL_2)
mbed_official 235:685d5f11838f 2705 {
mbed_official 235:685d5f11838f 2706 TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_2, TIM_CCx_DISABLE);
mbed_official 235:685d5f11838f 2707
mbed_official 235:685d5f11838f 2708 /* Disable the capture compare DMA Request 2 */
mbed_official 235:685d5f11838f 2709 __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC2);
mbed_official 235:685d5f11838f 2710 }
mbed_official 235:685d5f11838f 2711 else
mbed_official 235:685d5f11838f 2712 {
mbed_official 235:685d5f11838f 2713 TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_DISABLE);
mbed_official 235:685d5f11838f 2714 TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_2, TIM_CCx_DISABLE);
mbed_official 235:685d5f11838f 2715
mbed_official 235:685d5f11838f 2716 /* Disable the capture compare DMA Request 1 and 2 */
mbed_official 235:685d5f11838f 2717 __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC1);
mbed_official 235:685d5f11838f 2718 __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC2);
mbed_official 235:685d5f11838f 2719 }
mbed_official 235:685d5f11838f 2720
mbed_official 235:685d5f11838f 2721 /* Disable the Peripheral */
mbed_official 235:685d5f11838f 2722 __HAL_TIM_DISABLE(htim);
mbed_official 235:685d5f11838f 2723
mbed_official 235:685d5f11838f 2724 /* Change the htim state */
mbed_official 235:685d5f11838f 2725 htim->State = HAL_TIM_STATE_READY;
mbed_official 235:685d5f11838f 2726
mbed_official 235:685d5f11838f 2727 /* Return function status */
mbed_official 235:685d5f11838f 2728 return HAL_OK;
mbed_official 235:685d5f11838f 2729 }
mbed_official 235:685d5f11838f 2730
mbed_official 235:685d5f11838f 2731 /**
mbed_official 235:685d5f11838f 2732 * @}
mbed_official 235:685d5f11838f 2733 */
mbed_official 235:685d5f11838f 2734 /** @defgroup TIM_Group7 TIM IRQ handler management
mbed_official 235:685d5f11838f 2735 * @brief IRQ handler management
mbed_official 235:685d5f11838f 2736 *
mbed_official 235:685d5f11838f 2737 @verbatim
mbed_official 235:685d5f11838f 2738 ==============================================================================
mbed_official 235:685d5f11838f 2739 ##### IRQ handler management #####
mbed_official 235:685d5f11838f 2740 ==============================================================================
mbed_official 235:685d5f11838f 2741 [..]
mbed_official 235:685d5f11838f 2742 This section provides Timer IRQ handler function.
mbed_official 235:685d5f11838f 2743
mbed_official 235:685d5f11838f 2744 @endverbatim
mbed_official 235:685d5f11838f 2745 * @{
mbed_official 235:685d5f11838f 2746 */
mbed_official 235:685d5f11838f 2747 /**
mbed_official 235:685d5f11838f 2748 * @brief This function handles TIM interrupts requests.
mbed_official 235:685d5f11838f 2749 * @param htim: pointer to a TIM_HandleTypeDef structure that contains
mbed_official 235:685d5f11838f 2750 * the configuration information for TIM module.
mbed_official 235:685d5f11838f 2751 * @retval None
mbed_official 235:685d5f11838f 2752 */
mbed_official 235:685d5f11838f 2753 void HAL_TIM_IRQHandler(TIM_HandleTypeDef *htim)
mbed_official 235:685d5f11838f 2754 {
mbed_official 235:685d5f11838f 2755 /* Capture compare 1 event */
mbed_official 235:685d5f11838f 2756 if(__HAL_TIM_GET_FLAG(htim, TIM_FLAG_CC1) != RESET)
mbed_official 235:685d5f11838f 2757 {
mbed_official 235:685d5f11838f 2758 if(__HAL_TIM_GET_ITSTATUS(htim, TIM_IT_CC1) !=RESET)
mbed_official 235:685d5f11838f 2759 {
mbed_official 235:685d5f11838f 2760 {
mbed_official 235:685d5f11838f 2761 __HAL_TIM_CLEAR_IT(htim, TIM_IT_CC1);
mbed_official 235:685d5f11838f 2762 htim->Channel = HAL_TIM_ACTIVE_CHANNEL_1;
mbed_official 235:685d5f11838f 2763
mbed_official 235:685d5f11838f 2764 /* Input capture event */
mbed_official 235:685d5f11838f 2765 if((htim->Instance->CCMR1 & TIM_CCMR1_CC1S) != 0x00)
mbed_official 235:685d5f11838f 2766 {
mbed_official 235:685d5f11838f 2767 HAL_TIM_IC_CaptureCallback(htim);
mbed_official 235:685d5f11838f 2768 }
mbed_official 235:685d5f11838f 2769 /* Output compare event */
mbed_official 235:685d5f11838f 2770 else
mbed_official 235:685d5f11838f 2771 {
mbed_official 235:685d5f11838f 2772 HAL_TIM_OC_DelayElapsedCallback(htim);
mbed_official 235:685d5f11838f 2773 HAL_TIM_PWM_PulseFinishedCallback(htim);
mbed_official 235:685d5f11838f 2774 }
mbed_official 235:685d5f11838f 2775 htim->Channel = HAL_TIM_ACTIVE_CHANNEL_CLEARED;
mbed_official 235:685d5f11838f 2776 }
mbed_official 235:685d5f11838f 2777 }
mbed_official 235:685d5f11838f 2778 }
mbed_official 235:685d5f11838f 2779 /* Capture compare 2 event */
mbed_official 235:685d5f11838f 2780 if(__HAL_TIM_GET_FLAG(htim, TIM_FLAG_CC2) != RESET)
mbed_official 235:685d5f11838f 2781 {
mbed_official 235:685d5f11838f 2782 if(__HAL_TIM_GET_ITSTATUS(htim, TIM_IT_CC2) !=RESET)
mbed_official 235:685d5f11838f 2783 {
mbed_official 235:685d5f11838f 2784 __HAL_TIM_CLEAR_IT(htim, TIM_IT_CC2);
mbed_official 235:685d5f11838f 2785 htim->Channel = HAL_TIM_ACTIVE_CHANNEL_2;
mbed_official 235:685d5f11838f 2786 /* Input capture event */
mbed_official 235:685d5f11838f 2787 if((htim->Instance->CCMR1 & TIM_CCMR1_CC2S) != 0x00)
mbed_official 235:685d5f11838f 2788 {
mbed_official 235:685d5f11838f 2789 HAL_TIM_IC_CaptureCallback(htim);
mbed_official 235:685d5f11838f 2790 }
mbed_official 235:685d5f11838f 2791 /* Output compare event */
mbed_official 235:685d5f11838f 2792 else
mbed_official 235:685d5f11838f 2793 {
mbed_official 235:685d5f11838f 2794 HAL_TIM_OC_DelayElapsedCallback(htim);
mbed_official 235:685d5f11838f 2795 HAL_TIM_PWM_PulseFinishedCallback(htim);
mbed_official 235:685d5f11838f 2796 }
mbed_official 235:685d5f11838f 2797 htim->Channel = HAL_TIM_ACTIVE_CHANNEL_CLEARED;
mbed_official 235:685d5f11838f 2798 }
mbed_official 235:685d5f11838f 2799 }
mbed_official 235:685d5f11838f 2800 /* Capture compare 3 event */
mbed_official 235:685d5f11838f 2801 if(__HAL_TIM_GET_FLAG(htim, TIM_FLAG_CC3) != RESET)
mbed_official 235:685d5f11838f 2802 {
mbed_official 235:685d5f11838f 2803 if(__HAL_TIM_GET_ITSTATUS(htim, TIM_IT_CC3) !=RESET)
mbed_official 235:685d5f11838f 2804 {
mbed_official 235:685d5f11838f 2805 __HAL_TIM_CLEAR_IT(htim, TIM_IT_CC3);
mbed_official 235:685d5f11838f 2806 htim->Channel = HAL_TIM_ACTIVE_CHANNEL_3;
mbed_official 235:685d5f11838f 2807 /* Input capture event */
mbed_official 235:685d5f11838f 2808 if((htim->Instance->CCMR2 & TIM_CCMR2_CC3S) != 0x00)
mbed_official 235:685d5f11838f 2809 {
mbed_official 235:685d5f11838f 2810 HAL_TIM_IC_CaptureCallback(htim);
mbed_official 235:685d5f11838f 2811 }
mbed_official 235:685d5f11838f 2812 /* Output compare event */
mbed_official 235:685d5f11838f 2813 else
mbed_official 235:685d5f11838f 2814 {
mbed_official 235:685d5f11838f 2815 HAL_TIM_OC_DelayElapsedCallback(htim);
mbed_official 235:685d5f11838f 2816 HAL_TIM_PWM_PulseFinishedCallback(htim);
mbed_official 235:685d5f11838f 2817 }
mbed_official 235:685d5f11838f 2818 htim->Channel = HAL_TIM_ACTIVE_CHANNEL_CLEARED;
mbed_official 235:685d5f11838f 2819 }
mbed_official 235:685d5f11838f 2820 }
mbed_official 235:685d5f11838f 2821 /* Capture compare 4 event */
mbed_official 235:685d5f11838f 2822 if(__HAL_TIM_GET_FLAG(htim, TIM_FLAG_CC4) != RESET)
mbed_official 235:685d5f11838f 2823 {
mbed_official 235:685d5f11838f 2824 if(__HAL_TIM_GET_ITSTATUS(htim, TIM_IT_CC4) !=RESET)
mbed_official 235:685d5f11838f 2825 {
mbed_official 235:685d5f11838f 2826 __HAL_TIM_CLEAR_IT(htim, TIM_IT_CC4);
mbed_official 235:685d5f11838f 2827 htim->Channel = HAL_TIM_ACTIVE_CHANNEL_4;
mbed_official 235:685d5f11838f 2828 /* Input capture event */
mbed_official 235:685d5f11838f 2829 if((htim->Instance->CCMR2 & TIM_CCMR2_CC4S) != 0x00)
mbed_official 235:685d5f11838f 2830 {
mbed_official 235:685d5f11838f 2831 HAL_TIM_IC_CaptureCallback(htim);
mbed_official 235:685d5f11838f 2832 }
mbed_official 235:685d5f11838f 2833 /* Output compare event */
mbed_official 235:685d5f11838f 2834 else
mbed_official 235:685d5f11838f 2835 {
mbed_official 235:685d5f11838f 2836 HAL_TIM_OC_DelayElapsedCallback(htim);
mbed_official 235:685d5f11838f 2837 HAL_TIM_PWM_PulseFinishedCallback(htim);
mbed_official 235:685d5f11838f 2838 }
mbed_official 235:685d5f11838f 2839 htim->Channel = HAL_TIM_ACTIVE_CHANNEL_CLEARED;
mbed_official 235:685d5f11838f 2840 }
mbed_official 235:685d5f11838f 2841 }
mbed_official 235:685d5f11838f 2842 /* TIM Update event */
mbed_official 235:685d5f11838f 2843 if(__HAL_TIM_GET_FLAG(htim, TIM_FLAG_UPDATE) != RESET)
mbed_official 235:685d5f11838f 2844 {
mbed_official 235:685d5f11838f 2845 if(__HAL_TIM_GET_ITSTATUS(htim, TIM_IT_UPDATE) !=RESET)
mbed_official 235:685d5f11838f 2846 {
mbed_official 235:685d5f11838f 2847 __HAL_TIM_CLEAR_IT(htim, TIM_IT_UPDATE);
mbed_official 235:685d5f11838f 2848 HAL_TIM_PeriodElapsedCallback(htim);
mbed_official 235:685d5f11838f 2849 }
mbed_official 235:685d5f11838f 2850 }
mbed_official 235:685d5f11838f 2851 /* TIM Break input event */
mbed_official 235:685d5f11838f 2852 if(__HAL_TIM_GET_FLAG(htim, TIM_FLAG_BREAK) != RESET)
mbed_official 235:685d5f11838f 2853 {
mbed_official 235:685d5f11838f 2854 if(__HAL_TIM_GET_ITSTATUS(htim, TIM_IT_BREAK) !=RESET)
mbed_official 235:685d5f11838f 2855 {
mbed_official 235:685d5f11838f 2856 __HAL_TIM_CLEAR_IT(htim, TIM_IT_BREAK);
mbed_official 235:685d5f11838f 2857 HAL_TIMEx_BreakCallback(htim);
mbed_official 235:685d5f11838f 2858 }
mbed_official 235:685d5f11838f 2859 }
mbed_official 235:685d5f11838f 2860 /* TIM Trigger detection event */
mbed_official 235:685d5f11838f 2861 if(__HAL_TIM_GET_FLAG(htim, TIM_FLAG_TRIGGER) != RESET)
mbed_official 235:685d5f11838f 2862 {
mbed_official 235:685d5f11838f 2863 if(__HAL_TIM_GET_ITSTATUS(htim, TIM_IT_TRIGGER) !=RESET)
mbed_official 235:685d5f11838f 2864 {
mbed_official 235:685d5f11838f 2865 __HAL_TIM_CLEAR_IT(htim, TIM_IT_TRIGGER);
mbed_official 235:685d5f11838f 2866 HAL_TIM_TriggerCallback(htim);
mbed_official 235:685d5f11838f 2867 }
mbed_official 235:685d5f11838f 2868 }
mbed_official 235:685d5f11838f 2869 /* TIM commutation event */
mbed_official 235:685d5f11838f 2870 if(__HAL_TIM_GET_FLAG(htim, TIM_FLAG_COM) != RESET)
mbed_official 235:685d5f11838f 2871 {
mbed_official 235:685d5f11838f 2872 if(__HAL_TIM_GET_ITSTATUS(htim, TIM_IT_COM) !=RESET)
mbed_official 235:685d5f11838f 2873 {
mbed_official 235:685d5f11838f 2874 __HAL_TIM_CLEAR_IT(htim, TIM_FLAG_COM);
mbed_official 235:685d5f11838f 2875 HAL_TIMEx_CommutationCallback(htim);
mbed_official 235:685d5f11838f 2876 }
mbed_official 235:685d5f11838f 2877 }
mbed_official 235:685d5f11838f 2878 }
mbed_official 235:685d5f11838f 2879
mbed_official 235:685d5f11838f 2880 /**
mbed_official 235:685d5f11838f 2881 * @}
mbed_official 235:685d5f11838f 2882 */
mbed_official 235:685d5f11838f 2883
mbed_official 235:685d5f11838f 2884 /** @defgroup TIM_Group8 Peripheral Control functions
mbed_official 235:685d5f11838f 2885 * @brief Peripheral Control functions
mbed_official 235:685d5f11838f 2886 *
mbed_official 235:685d5f11838f 2887 @verbatim
mbed_official 235:685d5f11838f 2888 ==============================================================================
mbed_official 235:685d5f11838f 2889 ##### Peripheral Control functions #####
mbed_official 235:685d5f11838f 2890 ==============================================================================
mbed_official 235:685d5f11838f 2891 [..]
mbed_official 235:685d5f11838f 2892 This section provides functions allowing to:
mbed_official 235:685d5f11838f 2893 (+) Configure The Input Output channels for OC, PWM, IC or One Pulse mode.
mbed_official 235:685d5f11838f 2894 (+) Configure External Clock source.
mbed_official 235:685d5f11838f 2895 (+) Configure Complementary channels, break features and dead time.
mbed_official 235:685d5f11838f 2896 (+) Configure Master and the Slave synchronization.
mbed_official 235:685d5f11838f 2897 (+) Configure the DMA Burst Mode.
mbed_official 235:685d5f11838f 2898
mbed_official 235:685d5f11838f 2899 @endverbatim
mbed_official 235:685d5f11838f 2900 * @{
mbed_official 235:685d5f11838f 2901 */
mbed_official 235:685d5f11838f 2902
mbed_official 235:685d5f11838f 2903 /**
mbed_official 235:685d5f11838f 2904 * @brief Initializes the TIM Output Compare Channels according to the specified
mbed_official 235:685d5f11838f 2905 * parameters in the TIM_OC_InitTypeDef.
mbed_official 235:685d5f11838f 2906 * @param htim: pointer to a TIM_HandleTypeDef structure that contains
mbed_official 235:685d5f11838f 2907 * the configuration information for TIM module.
mbed_official 235:685d5f11838f 2908 * @param sConfig: TIM Output Compare configuration structure
mbed_official 235:685d5f11838f 2909 * @param Channel: TIM Channels to be enabled.
mbed_official 235:685d5f11838f 2910 * This parameter can be one of the following values:
mbed_official 235:685d5f11838f 2911 * @arg TIM_CHANNEL_1: TIM Channel 1 selected
mbed_official 235:685d5f11838f 2912 * @arg TIM_CHANNEL_2: TIM Channel 2 selected
mbed_official 235:685d5f11838f 2913 * @arg TIM_CHANNEL_3: TIM Channel 3 selected
mbed_official 235:685d5f11838f 2914 * @arg TIM_CHANNEL_4: TIM Channel 4 selected
mbed_official 235:685d5f11838f 2915 * @retval HAL status
mbed_official 235:685d5f11838f 2916 */
mbed_official 235:685d5f11838f 2917 HAL_StatusTypeDef HAL_TIM_OC_ConfigChannel(TIM_HandleTypeDef *htim, TIM_OC_InitTypeDef* sConfig, uint32_t Channel)
mbed_official 235:685d5f11838f 2918 {
mbed_official 235:685d5f11838f 2919 /* Check the parameters */
mbed_official 235:685d5f11838f 2920 assert_param(IS_TIM_CHANNELS(Channel));
mbed_official 235:685d5f11838f 2921 assert_param(IS_TIM_OC_MODE(sConfig->OCMode));
mbed_official 235:685d5f11838f 2922 assert_param(IS_TIM_OC_POLARITY(sConfig->OCPolarity));
mbed_official 235:685d5f11838f 2923 assert_param(IS_TIM_OCN_POLARITY(sConfig->OCNPolarity));
mbed_official 235:685d5f11838f 2924 assert_param(IS_TIM_FAST_STATE(sConfig->OCFastMode));
mbed_official 235:685d5f11838f 2925 assert_param(IS_TIM_OCNIDLE_STATE(sConfig->OCNIdleState));
mbed_official 235:685d5f11838f 2926 assert_param(IS_TIM_OCIDLE_STATE(sConfig->OCIdleState));
mbed_official 235:685d5f11838f 2927
mbed_official 235:685d5f11838f 2928 /* Check input state */
mbed_official 235:685d5f11838f 2929 __HAL_LOCK(htim);
mbed_official 235:685d5f11838f 2930
mbed_official 235:685d5f11838f 2931 htim->State = HAL_TIM_STATE_BUSY;
mbed_official 235:685d5f11838f 2932
mbed_official 235:685d5f11838f 2933 switch (Channel)
mbed_official 235:685d5f11838f 2934 {
mbed_official 235:685d5f11838f 2935 case TIM_CHANNEL_1:
mbed_official 235:685d5f11838f 2936 {
mbed_official 235:685d5f11838f 2937 assert_param(IS_TIM_CC1_INSTANCE(htim->Instance));
mbed_official 235:685d5f11838f 2938 /* Configure the TIM Channel 1 in Output Compare */
mbed_official 235:685d5f11838f 2939 TIM_OC1_SetConfig(htim->Instance, sConfig);
mbed_official 235:685d5f11838f 2940 }
mbed_official 235:685d5f11838f 2941 break;
mbed_official 235:685d5f11838f 2942
mbed_official 235:685d5f11838f 2943 case TIM_CHANNEL_2:
mbed_official 235:685d5f11838f 2944 {
mbed_official 235:685d5f11838f 2945 assert_param(IS_TIM_CC2_INSTANCE(htim->Instance));
mbed_official 235:685d5f11838f 2946 /* Configure the TIM Channel 2 in Output Compare */
mbed_official 235:685d5f11838f 2947 TIM_OC2_SetConfig(htim->Instance, sConfig);
mbed_official 235:685d5f11838f 2948 }
mbed_official 235:685d5f11838f 2949 break;
mbed_official 235:685d5f11838f 2950
mbed_official 235:685d5f11838f 2951 case TIM_CHANNEL_3:
mbed_official 235:685d5f11838f 2952 {
mbed_official 235:685d5f11838f 2953 assert_param(IS_TIM_CC3_INSTANCE(htim->Instance));
mbed_official 235:685d5f11838f 2954 /* Configure the TIM Channel 3 in Output Compare */
mbed_official 235:685d5f11838f 2955 TIM_OC3_SetConfig(htim->Instance, sConfig);
mbed_official 235:685d5f11838f 2956 }
mbed_official 235:685d5f11838f 2957 break;
mbed_official 235:685d5f11838f 2958
mbed_official 235:685d5f11838f 2959 case TIM_CHANNEL_4:
mbed_official 235:685d5f11838f 2960 {
mbed_official 235:685d5f11838f 2961 assert_param(IS_TIM_CC4_INSTANCE(htim->Instance));
mbed_official 235:685d5f11838f 2962 /* Configure the TIM Channel 4 in Output Compare */
mbed_official 235:685d5f11838f 2963 TIM_OC4_SetConfig(htim->Instance, sConfig);
mbed_official 235:685d5f11838f 2964 }
mbed_official 235:685d5f11838f 2965 break;
mbed_official 235:685d5f11838f 2966
mbed_official 235:685d5f11838f 2967 default:
mbed_official 235:685d5f11838f 2968 break;
mbed_official 235:685d5f11838f 2969 }
mbed_official 235:685d5f11838f 2970 htim->State = HAL_TIM_STATE_READY;
mbed_official 235:685d5f11838f 2971
mbed_official 235:685d5f11838f 2972 __HAL_UNLOCK(htim);
mbed_official 235:685d5f11838f 2973
mbed_official 235:685d5f11838f 2974 return HAL_OK;
mbed_official 235:685d5f11838f 2975 }
mbed_official 235:685d5f11838f 2976
mbed_official 235:685d5f11838f 2977 /**
mbed_official 235:685d5f11838f 2978 * @brief Initializes the TIM Input Capture Channels according to the specified
mbed_official 235:685d5f11838f 2979 * parameters in the TIM_IC_InitTypeDef.
mbed_official 235:685d5f11838f 2980 * @param htim: pointer to a TIM_HandleTypeDef structure that contains
mbed_official 235:685d5f11838f 2981 * the configuration information for TIM module.
mbed_official 235:685d5f11838f 2982 * @param sConfig: TIM Input Capture configuration structure
mbed_official 235:685d5f11838f 2983 * @param Channel: TIM Channels to be enabled.
mbed_official 235:685d5f11838f 2984 * This parameter can be one of the following values:
mbed_official 235:685d5f11838f 2985 * @arg TIM_CHANNEL_1: TIM Channel 1 selected
mbed_official 235:685d5f11838f 2986 * @arg TIM_CHANNEL_2: TIM Channel 2 selected
mbed_official 235:685d5f11838f 2987 * @arg TIM_CHANNEL_3: TIM Channel 3 selected
mbed_official 235:685d5f11838f 2988 * @arg TIM_CHANNEL_4: TIM Channel 4 selected
mbed_official 235:685d5f11838f 2989 * @retval HAL status
mbed_official 235:685d5f11838f 2990 */
mbed_official 235:685d5f11838f 2991 HAL_StatusTypeDef HAL_TIM_IC_ConfigChannel(TIM_HandleTypeDef *htim, TIM_IC_InitTypeDef* sConfig, uint32_t Channel)
mbed_official 235:685d5f11838f 2992 {
mbed_official 235:685d5f11838f 2993 /* Check the parameters */
mbed_official 235:685d5f11838f 2994 assert_param(IS_TIM_CC1_INSTANCE(htim->Instance));
mbed_official 235:685d5f11838f 2995 assert_param(IS_TIM_IC_POLARITY(sConfig->ICPolarity));
mbed_official 235:685d5f11838f 2996 assert_param(IS_TIM_IC_SELECTION(sConfig->ICSelection));
mbed_official 235:685d5f11838f 2997 assert_param(IS_TIM_IC_PRESCALER(sConfig->ICPrescaler));
mbed_official 235:685d5f11838f 2998 assert_param(IS_TIM_IC_FILTER(sConfig->ICFilter));
mbed_official 235:685d5f11838f 2999
mbed_official 235:685d5f11838f 3000 __HAL_LOCK(htim);
mbed_official 235:685d5f11838f 3001
mbed_official 235:685d5f11838f 3002 htim->State = HAL_TIM_STATE_BUSY;
mbed_official 235:685d5f11838f 3003
mbed_official 235:685d5f11838f 3004 if (Channel == TIM_CHANNEL_1)
mbed_official 235:685d5f11838f 3005 {
mbed_official 235:685d5f11838f 3006 /* TI1 Configuration */
mbed_official 235:685d5f11838f 3007 TIM_TI1_SetConfig(htim->Instance,
mbed_official 235:685d5f11838f 3008 sConfig->ICPolarity,
mbed_official 235:685d5f11838f 3009 sConfig->ICSelection,
mbed_official 235:685d5f11838f 3010 sConfig->ICFilter);
mbed_official 235:685d5f11838f 3011
mbed_official 235:685d5f11838f 3012 /* Reset the IC1PSC Bits */
mbed_official 235:685d5f11838f 3013 htim->Instance->CCMR1 &= ~TIM_CCMR1_IC1PSC;
mbed_official 235:685d5f11838f 3014
mbed_official 235:685d5f11838f 3015 /* Set the IC1PSC value */
mbed_official 235:685d5f11838f 3016 htim->Instance->CCMR1 |= sConfig->ICPrescaler;
mbed_official 235:685d5f11838f 3017 }
mbed_official 235:685d5f11838f 3018 else if (Channel == TIM_CHANNEL_2)
mbed_official 235:685d5f11838f 3019 {
mbed_official 235:685d5f11838f 3020 /* TI2 Configuration */
mbed_official 235:685d5f11838f 3021 assert_param(IS_TIM_CC2_INSTANCE(htim->Instance));
mbed_official 235:685d5f11838f 3022
mbed_official 235:685d5f11838f 3023 TIM_TI2_SetConfig(htim->Instance,
mbed_official 235:685d5f11838f 3024 sConfig->ICPolarity,
mbed_official 235:685d5f11838f 3025 sConfig->ICSelection,
mbed_official 235:685d5f11838f 3026 sConfig->ICFilter);
mbed_official 235:685d5f11838f 3027
mbed_official 235:685d5f11838f 3028 /* Reset the IC2PSC Bits */
mbed_official 235:685d5f11838f 3029 htim->Instance->CCMR1 &= ~TIM_CCMR1_IC2PSC;
mbed_official 235:685d5f11838f 3030
mbed_official 235:685d5f11838f 3031 /* Set the IC2PSC value */
mbed_official 235:685d5f11838f 3032 htim->Instance->CCMR1 |= (sConfig->ICPrescaler << 8);
mbed_official 235:685d5f11838f 3033 }
mbed_official 235:685d5f11838f 3034 else if (Channel == TIM_CHANNEL_3)
mbed_official 235:685d5f11838f 3035 {
mbed_official 235:685d5f11838f 3036 /* TI3 Configuration */
mbed_official 235:685d5f11838f 3037 assert_param(IS_TIM_CC3_INSTANCE(htim->Instance));
mbed_official 235:685d5f11838f 3038
mbed_official 235:685d5f11838f 3039 TIM_TI3_SetConfig(htim->Instance,
mbed_official 235:685d5f11838f 3040 sConfig->ICPolarity,
mbed_official 235:685d5f11838f 3041 sConfig->ICSelection,
mbed_official 235:685d5f11838f 3042 sConfig->ICFilter);
mbed_official 235:685d5f11838f 3043
mbed_official 235:685d5f11838f 3044 /* Reset the IC3PSC Bits */
mbed_official 235:685d5f11838f 3045 htim->Instance->CCMR2 &= ~TIM_CCMR2_IC3PSC;
mbed_official 235:685d5f11838f 3046
mbed_official 235:685d5f11838f 3047 /* Set the IC3PSC value */
mbed_official 235:685d5f11838f 3048 htim->Instance->CCMR2 |= sConfig->ICPrescaler;
mbed_official 235:685d5f11838f 3049 }
mbed_official 235:685d5f11838f 3050 else
mbed_official 235:685d5f11838f 3051 {
mbed_official 235:685d5f11838f 3052 /* TI4 Configuration */
mbed_official 235:685d5f11838f 3053 assert_param(IS_TIM_CC4_INSTANCE(htim->Instance));
mbed_official 235:685d5f11838f 3054
mbed_official 235:685d5f11838f 3055 TIM_TI4_SetConfig(htim->Instance,
mbed_official 235:685d5f11838f 3056 sConfig->ICPolarity,
mbed_official 235:685d5f11838f 3057 sConfig->ICSelection,
mbed_official 235:685d5f11838f 3058 sConfig->ICFilter);
mbed_official 235:685d5f11838f 3059
mbed_official 235:685d5f11838f 3060 /* Reset the IC4PSC Bits */
mbed_official 235:685d5f11838f 3061 htim->Instance->CCMR2 &= ~TIM_CCMR2_IC4PSC;
mbed_official 235:685d5f11838f 3062
mbed_official 235:685d5f11838f 3063 /* Set the IC4PSC value */
mbed_official 235:685d5f11838f 3064 htim->Instance->CCMR2 |= (sConfig->ICPrescaler << 8);
mbed_official 235:685d5f11838f 3065 }
mbed_official 235:685d5f11838f 3066
mbed_official 235:685d5f11838f 3067 htim->State = HAL_TIM_STATE_READY;
mbed_official 235:685d5f11838f 3068
mbed_official 235:685d5f11838f 3069 __HAL_UNLOCK(htim);
mbed_official 235:685d5f11838f 3070
mbed_official 235:685d5f11838f 3071 return HAL_OK;
mbed_official 235:685d5f11838f 3072 }
mbed_official 235:685d5f11838f 3073
mbed_official 235:685d5f11838f 3074 /**
mbed_official 235:685d5f11838f 3075 * @brief Initializes the TIM PWM channels according to the specified
mbed_official 235:685d5f11838f 3076 * parameters in the TIM_OC_InitTypeDef.
mbed_official 235:685d5f11838f 3077 * @param htim: pointer to a TIM_HandleTypeDef structure that contains
mbed_official 235:685d5f11838f 3078 * the configuration information for TIM module.
mbed_official 235:685d5f11838f 3079 * @param sConfig: TIM PWM configuration structure
mbed_official 235:685d5f11838f 3080 * @param Channel: TIM Channels to be enabled.
mbed_official 235:685d5f11838f 3081 * This parameter can be one of the following values:
mbed_official 235:685d5f11838f 3082 * @arg TIM_CHANNEL_1: TIM Channel 1 selected
mbed_official 235:685d5f11838f 3083 * @arg TIM_CHANNEL_2: TIM Channel 2 selected
mbed_official 235:685d5f11838f 3084 * @arg TIM_CHANNEL_3: TIM Channel 3 selected
mbed_official 235:685d5f11838f 3085 * @arg TIM_CHANNEL_4: TIM Channel 4 selected
mbed_official 235:685d5f11838f 3086 * @retval HAL status
mbed_official 235:685d5f11838f 3087 */
mbed_official 235:685d5f11838f 3088 HAL_StatusTypeDef HAL_TIM_PWM_ConfigChannel(TIM_HandleTypeDef *htim, TIM_OC_InitTypeDef* sConfig, uint32_t Channel)
mbed_official 235:685d5f11838f 3089 {
mbed_official 235:685d5f11838f 3090 __HAL_LOCK(htim);
mbed_official 235:685d5f11838f 3091
mbed_official 235:685d5f11838f 3092 /* Check the parameters */
mbed_official 235:685d5f11838f 3093 assert_param(IS_TIM_CHANNELS(Channel));
mbed_official 235:685d5f11838f 3094 assert_param(IS_TIM_PWM_MODE(sConfig->OCMode));
mbed_official 235:685d5f11838f 3095 assert_param(IS_TIM_OC_POLARITY(sConfig->OCPolarity));
mbed_official 235:685d5f11838f 3096 assert_param(IS_TIM_OCN_POLARITY(sConfig->OCNPolarity));
mbed_official 235:685d5f11838f 3097 assert_param(IS_TIM_OCNIDLE_STATE(sConfig->OCNIdleState));
mbed_official 235:685d5f11838f 3098 assert_param(IS_TIM_OCIDLE_STATE(sConfig->OCIdleState));
mbed_official 235:685d5f11838f 3099
mbed_official 235:685d5f11838f 3100 htim->State = HAL_TIM_STATE_BUSY;
mbed_official 235:685d5f11838f 3101
mbed_official 235:685d5f11838f 3102 switch (Channel)
mbed_official 235:685d5f11838f 3103 {
mbed_official 235:685d5f11838f 3104 case TIM_CHANNEL_1:
mbed_official 235:685d5f11838f 3105 {
mbed_official 235:685d5f11838f 3106 assert_param(IS_TIM_CC1_INSTANCE(htim->Instance));
mbed_official 235:685d5f11838f 3107 /* Configure the Channel 1 in PWM mode */
mbed_official 235:685d5f11838f 3108 TIM_OC1_SetConfig(htim->Instance, sConfig);
mbed_official 235:685d5f11838f 3109
mbed_official 235:685d5f11838f 3110 /* Set the Preload enable bit for channel1 */
mbed_official 235:685d5f11838f 3111 htim->Instance->CCMR1 |= TIM_CCMR1_OC1PE;
mbed_official 235:685d5f11838f 3112
mbed_official 235:685d5f11838f 3113 /* Configure the Output Fast mode */
mbed_official 235:685d5f11838f 3114 htim->Instance->CCMR1 &= ~TIM_CCMR1_OC1FE;
mbed_official 235:685d5f11838f 3115 htim->Instance->CCMR1 |= sConfig->OCFastMode;
mbed_official 235:685d5f11838f 3116 }
mbed_official 235:685d5f11838f 3117 break;
mbed_official 235:685d5f11838f 3118
mbed_official 235:685d5f11838f 3119 case TIM_CHANNEL_2:
mbed_official 235:685d5f11838f 3120 {
mbed_official 235:685d5f11838f 3121 assert_param(IS_TIM_CC2_INSTANCE(htim->Instance));
mbed_official 235:685d5f11838f 3122 /* Configure the Channel 2 in PWM mode */
mbed_official 235:685d5f11838f 3123 TIM_OC2_SetConfig(htim->Instance, sConfig);
mbed_official 235:685d5f11838f 3124
mbed_official 235:685d5f11838f 3125 /* Set the Preload enable bit for channel2 */
mbed_official 235:685d5f11838f 3126 htim->Instance->CCMR1 |= TIM_CCMR1_OC2PE;
mbed_official 235:685d5f11838f 3127
mbed_official 235:685d5f11838f 3128 /* Configure the Output Fast mode */
mbed_official 235:685d5f11838f 3129 htim->Instance->CCMR1 &= ~TIM_CCMR1_OC2FE;
mbed_official 235:685d5f11838f 3130 htim->Instance->CCMR1 |= sConfig->OCFastMode << 8;
mbed_official 235:685d5f11838f 3131 }
mbed_official 235:685d5f11838f 3132 break;
mbed_official 235:685d5f11838f 3133
mbed_official 235:685d5f11838f 3134 case TIM_CHANNEL_3:
mbed_official 235:685d5f11838f 3135 {
mbed_official 235:685d5f11838f 3136 assert_param(IS_TIM_CC3_INSTANCE(htim->Instance));
mbed_official 235:685d5f11838f 3137 /* Configure the Channel 3 in PWM mode */
mbed_official 235:685d5f11838f 3138 TIM_OC3_SetConfig(htim->Instance, sConfig);
mbed_official 235:685d5f11838f 3139
mbed_official 235:685d5f11838f 3140 /* Set the Preload enable bit for channel3 */
mbed_official 235:685d5f11838f 3141 htim->Instance->CCMR2 |= TIM_CCMR2_OC3PE;
mbed_official 235:685d5f11838f 3142
mbed_official 235:685d5f11838f 3143 /* Configure the Output Fast mode */
mbed_official 235:685d5f11838f 3144 htim->Instance->CCMR2 &= ~TIM_CCMR2_OC3FE;
mbed_official 235:685d5f11838f 3145 htim->Instance->CCMR2 |= sConfig->OCFastMode;
mbed_official 235:685d5f11838f 3146 }
mbed_official 235:685d5f11838f 3147 break;
mbed_official 235:685d5f11838f 3148
mbed_official 235:685d5f11838f 3149 case TIM_CHANNEL_4:
mbed_official 235:685d5f11838f 3150 {
mbed_official 235:685d5f11838f 3151 assert_param(IS_TIM_CC4_INSTANCE(htim->Instance));
mbed_official 235:685d5f11838f 3152 /* Configure the Channel 4 in PWM mode */
mbed_official 235:685d5f11838f 3153 TIM_OC4_SetConfig(htim->Instance, sConfig);
mbed_official 235:685d5f11838f 3154
mbed_official 235:685d5f11838f 3155 /* Set the Preload enable bit for channel4 */
mbed_official 235:685d5f11838f 3156 htim->Instance->CCMR2 |= TIM_CCMR2_OC4PE;
mbed_official 235:685d5f11838f 3157
mbed_official 235:685d5f11838f 3158 /* Configure the Output Fast mode */
mbed_official 235:685d5f11838f 3159 htim->Instance->CCMR2 &= ~TIM_CCMR2_OC4FE;
mbed_official 235:685d5f11838f 3160 htim->Instance->CCMR2 |= sConfig->OCFastMode << 8;
mbed_official 235:685d5f11838f 3161 }
mbed_official 235:685d5f11838f 3162 break;
mbed_official 235:685d5f11838f 3163
mbed_official 235:685d5f11838f 3164 default:
mbed_official 235:685d5f11838f 3165 break;
mbed_official 235:685d5f11838f 3166 }
mbed_official 235:685d5f11838f 3167
mbed_official 235:685d5f11838f 3168 htim->State = HAL_TIM_STATE_READY;
mbed_official 235:685d5f11838f 3169
mbed_official 235:685d5f11838f 3170 __HAL_UNLOCK(htim);
mbed_official 235:685d5f11838f 3171
mbed_official 235:685d5f11838f 3172 return HAL_OK;
mbed_official 235:685d5f11838f 3173 }
mbed_official 235:685d5f11838f 3174
mbed_official 235:685d5f11838f 3175 /**
mbed_official 235:685d5f11838f 3176 * @brief Initializes the TIM One Pulse Channels according to the specified
mbed_official 235:685d5f11838f 3177 * parameters in the TIM_OnePulse_InitTypeDef.
mbed_official 235:685d5f11838f 3178 * @param htim: pointer to a TIM_HandleTypeDef structure that contains
mbed_official 235:685d5f11838f 3179 * the configuration information for TIM module.
mbed_official 235:685d5f11838f 3180 * @param sConfig: TIM One Pulse configuration structure
mbed_official 235:685d5f11838f 3181 * @param OutputChannel: TIM Channels to be enabled.
mbed_official 235:685d5f11838f 3182 * This parameter can be one of the following values:
mbed_official 235:685d5f11838f 3183 * @arg TIM_CHANNEL_1: TIM Channel 1 selected
mbed_official 235:685d5f11838f 3184 * @arg TIM_CHANNEL_2: TIM Channel 2 selected
mbed_official 235:685d5f11838f 3185 * @param InputChannel: TIM Channels to be enabled.
mbed_official 235:685d5f11838f 3186 * This parameter can be one of the following values:
mbed_official 235:685d5f11838f 3187 * @arg TIM_CHANNEL_1: TIM Channel 1 selected
mbed_official 235:685d5f11838f 3188 * @arg TIM_CHANNEL_2: TIM Channel 2 selected
mbed_official 235:685d5f11838f 3189 * @retval HAL status
mbed_official 235:685d5f11838f 3190 */
mbed_official 235:685d5f11838f 3191 HAL_StatusTypeDef HAL_TIM_OnePulse_ConfigChannel(TIM_HandleTypeDef *htim, TIM_OnePulse_InitTypeDef* sConfig, uint32_t OutputChannel, uint32_t InputChannel)
mbed_official 235:685d5f11838f 3192 {
mbed_official 235:685d5f11838f 3193 TIM_OC_InitTypeDef temp1;
mbed_official 235:685d5f11838f 3194
mbed_official 235:685d5f11838f 3195 /* Check the parameters */
mbed_official 235:685d5f11838f 3196 assert_param(IS_TIM_OPM_CHANNELS(OutputChannel));
mbed_official 235:685d5f11838f 3197 assert_param(IS_TIM_OPM_CHANNELS(InputChannel));
mbed_official 235:685d5f11838f 3198
mbed_official 235:685d5f11838f 3199 if(OutputChannel != InputChannel)
mbed_official 235:685d5f11838f 3200 {
mbed_official 235:685d5f11838f 3201 __HAL_LOCK(htim);
mbed_official 235:685d5f11838f 3202
mbed_official 235:685d5f11838f 3203 htim->State = HAL_TIM_STATE_BUSY;
mbed_official 235:685d5f11838f 3204
mbed_official 235:685d5f11838f 3205 /* Extract the Ouput compare configuration from sConfig structure */
mbed_official 235:685d5f11838f 3206 temp1.OCMode = sConfig->OCMode;
mbed_official 235:685d5f11838f 3207 temp1.Pulse = sConfig->Pulse;
mbed_official 235:685d5f11838f 3208 temp1.OCPolarity = sConfig->OCPolarity;
mbed_official 235:685d5f11838f 3209 temp1.OCNPolarity = sConfig->OCNPolarity;
mbed_official 235:685d5f11838f 3210 temp1.OCIdleState = sConfig->OCIdleState;
mbed_official 235:685d5f11838f 3211 temp1.OCNIdleState = sConfig->OCNIdleState;
mbed_official 235:685d5f11838f 3212
mbed_official 235:685d5f11838f 3213 switch (OutputChannel)
mbed_official 235:685d5f11838f 3214 {
mbed_official 235:685d5f11838f 3215 case TIM_CHANNEL_1:
mbed_official 235:685d5f11838f 3216 {
mbed_official 235:685d5f11838f 3217 assert_param(IS_TIM_CC1_INSTANCE(htim->Instance));
mbed_official 235:685d5f11838f 3218
mbed_official 235:685d5f11838f 3219 TIM_OC1_SetConfig(htim->Instance, &temp1);
mbed_official 235:685d5f11838f 3220 }
mbed_official 235:685d5f11838f 3221 break;
mbed_official 235:685d5f11838f 3222 case TIM_CHANNEL_2:
mbed_official 235:685d5f11838f 3223 {
mbed_official 235:685d5f11838f 3224 assert_param(IS_TIM_CC2_INSTANCE(htim->Instance));
mbed_official 235:685d5f11838f 3225
mbed_official 235:685d5f11838f 3226 TIM_OC2_SetConfig(htim->Instance, &temp1);
mbed_official 235:685d5f11838f 3227 }
mbed_official 235:685d5f11838f 3228 break;
mbed_official 235:685d5f11838f 3229 default:
mbed_official 235:685d5f11838f 3230 break;
mbed_official 235:685d5f11838f 3231 }
mbed_official 235:685d5f11838f 3232 switch (InputChannel)
mbed_official 235:685d5f11838f 3233 {
mbed_official 235:685d5f11838f 3234 case TIM_CHANNEL_1:
mbed_official 235:685d5f11838f 3235 {
mbed_official 235:685d5f11838f 3236 assert_param(IS_TIM_CC1_INSTANCE(htim->Instance));
mbed_official 235:685d5f11838f 3237
mbed_official 235:685d5f11838f 3238 TIM_TI1_SetConfig(htim->Instance, sConfig->ICPolarity,
mbed_official 235:685d5f11838f 3239 sConfig->ICSelection, sConfig->ICFilter);
mbed_official 235:685d5f11838f 3240
mbed_official 235:685d5f11838f 3241 /* Reset the IC1PSC Bits */
mbed_official 235:685d5f11838f 3242 htim->Instance->CCMR1 &= ~TIM_CCMR1_IC1PSC;
mbed_official 235:685d5f11838f 3243
mbed_official 235:685d5f11838f 3244 /* Select the Trigger source */
mbed_official 235:685d5f11838f 3245 htim->Instance->SMCR &= ~TIM_SMCR_TS;
mbed_official 235:685d5f11838f 3246 htim->Instance->SMCR |= TIM_TS_TI1FP1;
mbed_official 235:685d5f11838f 3247
mbed_official 235:685d5f11838f 3248 /* Select the Slave Mode */
mbed_official 235:685d5f11838f 3249 htim->Instance->SMCR &= ~TIM_SMCR_SMS;
mbed_official 235:685d5f11838f 3250 htim->Instance->SMCR |= TIM_SLAVEMODE_TRIGGER;
mbed_official 235:685d5f11838f 3251 }
mbed_official 235:685d5f11838f 3252 break;
mbed_official 235:685d5f11838f 3253 case TIM_CHANNEL_2:
mbed_official 235:685d5f11838f 3254 {
mbed_official 235:685d5f11838f 3255 assert_param(IS_TIM_CC2_INSTANCE(htim->Instance));
mbed_official 235:685d5f11838f 3256
mbed_official 235:685d5f11838f 3257 TIM_TI2_SetConfig(htim->Instance, sConfig->ICPolarity,
mbed_official 235:685d5f11838f 3258 sConfig->ICSelection, sConfig->ICFilter);
mbed_official 235:685d5f11838f 3259
mbed_official 235:685d5f11838f 3260 /* Reset the IC2PSC Bits */
mbed_official 235:685d5f11838f 3261 htim->Instance->CCMR1 &= ~TIM_CCMR1_IC2PSC;
mbed_official 235:685d5f11838f 3262
mbed_official 235:685d5f11838f 3263 /* Select the Trigger source */
mbed_official 235:685d5f11838f 3264 htim->Instance->SMCR &= ~TIM_SMCR_TS;
mbed_official 235:685d5f11838f 3265 htim->Instance->SMCR |= TIM_TS_TI2FP2;
mbed_official 235:685d5f11838f 3266
mbed_official 235:685d5f11838f 3267 /* Select the Slave Mode */
mbed_official 235:685d5f11838f 3268 htim->Instance->SMCR &= ~TIM_SMCR_SMS;
mbed_official 235:685d5f11838f 3269 htim->Instance->SMCR |= TIM_SLAVEMODE_TRIGGER;
mbed_official 235:685d5f11838f 3270 }
mbed_official 235:685d5f11838f 3271 break;
mbed_official 235:685d5f11838f 3272
mbed_official 235:685d5f11838f 3273 default:
mbed_official 235:685d5f11838f 3274 break;
mbed_official 235:685d5f11838f 3275 }
mbed_official 235:685d5f11838f 3276
mbed_official 235:685d5f11838f 3277 htim->State = HAL_TIM_STATE_READY;
mbed_official 235:685d5f11838f 3278
mbed_official 235:685d5f11838f 3279 __HAL_UNLOCK(htim);
mbed_official 235:685d5f11838f 3280
mbed_official 235:685d5f11838f 3281 return HAL_OK;
mbed_official 235:685d5f11838f 3282 }
mbed_official 235:685d5f11838f 3283 else
mbed_official 235:685d5f11838f 3284 {
mbed_official 235:685d5f11838f 3285 return HAL_ERROR;
mbed_official 235:685d5f11838f 3286 }
mbed_official 235:685d5f11838f 3287 }
mbed_official 235:685d5f11838f 3288
mbed_official 235:685d5f11838f 3289 /**
mbed_official 235:685d5f11838f 3290 * @brief Configure the DMA Burst to transfer Data from the memory to the TIM peripheral
mbed_official 235:685d5f11838f 3291 * @param htim: pointer to a TIM_HandleTypeDef structure that contains
mbed_official 235:685d5f11838f 3292 * the configuration information for TIM module.
mbed_official 235:685d5f11838f 3293 * @param BurstBaseAddress: TIM Base address from when the DMA will starts the Data write.
mbed_official 235:685d5f11838f 3294 * This parameters can be on of the following values:
mbed_official 235:685d5f11838f 3295 * @arg TIM_DMABase_CR1
mbed_official 235:685d5f11838f 3296 * @arg TIM_DMABase_CR2
mbed_official 235:685d5f11838f 3297 * @arg TIM_DMABase_SMCR
mbed_official 235:685d5f11838f 3298 * @arg TIM_DMABase_DIER
mbed_official 235:685d5f11838f 3299 * @arg TIM_DMABase_SR
mbed_official 235:685d5f11838f 3300 * @arg TIM_DMABase_EGR
mbed_official 235:685d5f11838f 3301 * @arg TIM_DMABase_CCMR1
mbed_official 235:685d5f11838f 3302 * @arg TIM_DMABase_CCMR2
mbed_official 235:685d5f11838f 3303 * @arg TIM_DMABase_CCER
mbed_official 235:685d5f11838f 3304 * @arg TIM_DMABase_CNT
mbed_official 235:685d5f11838f 3305 * @arg TIM_DMABase_PSC
mbed_official 235:685d5f11838f 3306 * @arg TIM_DMABase_ARR
mbed_official 235:685d5f11838f 3307 * @arg TIM_DMABase_RCR
mbed_official 235:685d5f11838f 3308 * @arg TIM_DMABase_CCR1
mbed_official 235:685d5f11838f 3309 * @arg TIM_DMABase_CCR2
mbed_official 235:685d5f11838f 3310 * @arg TIM_DMABase_CCR3
mbed_official 235:685d5f11838f 3311 * @arg TIM_DMABase_CCR4
mbed_official 235:685d5f11838f 3312 * @arg TIM_DMABase_BDTR
mbed_official 235:685d5f11838f 3313 * @arg TIM_DMABase_DCR
mbed_official 235:685d5f11838f 3314 * @param BurstRequestSrc: TIM DMA Request sources.
mbed_official 235:685d5f11838f 3315 * This parameters can be on of the following values:
mbed_official 235:685d5f11838f 3316 * @arg TIM_DMA_UPDATE: TIM update Interrupt source
mbed_official 235:685d5f11838f 3317 * @arg TIM_DMA_CC1: TIM Capture Compare 1 DMA source
mbed_official 235:685d5f11838f 3318 * @arg TIM_DMA_CC2: TIM Capture Compare 2 DMA source
mbed_official 235:685d5f11838f 3319 * @arg TIM_DMA_CC3: TIM Capture Compare 3 DMA source
mbed_official 235:685d5f11838f 3320 * @arg TIM_DMA_CC4: TIM Capture Compare 4 DMA source
mbed_official 235:685d5f11838f 3321 * @arg TIM_DMA_COM: TIM Commutation DMA source
mbed_official 235:685d5f11838f 3322 * @arg TIM_DMA_TRIGGER: TIM Trigger DMA source
mbed_official 235:685d5f11838f 3323 * @param BurstBuffer: The Buffer address.
mbed_official 235:685d5f11838f 3324 * @param BurstLength: DMA Burst length. This parameter can be one value
mbed_official 235:685d5f11838f 3325 * between TIM_DMABurstLength_1Transfer and TIM_DMABurstLength_18Transfers.
mbed_official 235:685d5f11838f 3326 * @retval HAL status
mbed_official 235:685d5f11838f 3327 */
mbed_official 235:685d5f11838f 3328 HAL_StatusTypeDef HAL_TIM_DMABurst_WriteStart(TIM_HandleTypeDef *htim, uint32_t BurstBaseAddress, uint32_t BurstRequestSrc,
mbed_official 235:685d5f11838f 3329 uint32_t* BurstBuffer, uint32_t BurstLength)
mbed_official 235:685d5f11838f 3330 {
mbed_official 235:685d5f11838f 3331 /* Check the parameters */
mbed_official 235:685d5f11838f 3332 assert_param(IS_TIM_DMABURST_INSTANCE(htim->Instance));
mbed_official 235:685d5f11838f 3333 assert_param(IS_TIM_DMA_BASE(BurstBaseAddress));
mbed_official 235:685d5f11838f 3334 assert_param(IS_TIM_DMA_SOURCE(BurstRequestSrc));
mbed_official 235:685d5f11838f 3335 assert_param(IS_TIM_DMA_LENGTH(BurstLength));
mbed_official 235:685d5f11838f 3336
mbed_official 235:685d5f11838f 3337 if((htim->State == HAL_TIM_STATE_BUSY))
mbed_official 235:685d5f11838f 3338 {
mbed_official 235:685d5f11838f 3339 return HAL_BUSY;
mbed_official 235:685d5f11838f 3340 }
mbed_official 235:685d5f11838f 3341 else if((htim->State == HAL_TIM_STATE_READY))
mbed_official 235:685d5f11838f 3342 {
mbed_official 235:685d5f11838f 3343 if((BurstBuffer == 0 ) && (BurstLength > 0))
mbed_official 235:685d5f11838f 3344 {
mbed_official 235:685d5f11838f 3345 return HAL_ERROR;
mbed_official 235:685d5f11838f 3346 }
mbed_official 235:685d5f11838f 3347 else
mbed_official 235:685d5f11838f 3348 {
mbed_official 235:685d5f11838f 3349 htim->State = HAL_TIM_STATE_BUSY;
mbed_official 235:685d5f11838f 3350 }
mbed_official 235:685d5f11838f 3351 }
mbed_official 235:685d5f11838f 3352 switch(BurstRequestSrc)
mbed_official 235:685d5f11838f 3353 {
mbed_official 235:685d5f11838f 3354 case TIM_DMA_UPDATE:
mbed_official 235:685d5f11838f 3355 {
mbed_official 235:685d5f11838f 3356 /* Set the DMA Period elapsed callback */
mbed_official 235:685d5f11838f 3357 htim->hdma[TIM_DMA_ID_UPDATE]->XferCpltCallback = TIM_DMAPeriodElapsedCplt;
mbed_official 235:685d5f11838f 3358
mbed_official 235:685d5f11838f 3359 /* Set the DMA error callback */
mbed_official 235:685d5f11838f 3360 htim->hdma[TIM_DMA_ID_UPDATE]->XferErrorCallback = HAL_TIM_DMAError ;
mbed_official 235:685d5f11838f 3361
mbed_official 235:685d5f11838f 3362 /* Enable the DMA Stream */
mbed_official 235:685d5f11838f 3363 HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_UPDATE], (uint32_t)BurstBuffer, (uint32_t)&htim->Instance->DMAR, ((BurstLength) >> 8) + 1);
mbed_official 235:685d5f11838f 3364 }
mbed_official 235:685d5f11838f 3365 break;
mbed_official 235:685d5f11838f 3366 case TIM_DMA_CC1:
mbed_official 235:685d5f11838f 3367 {
mbed_official 235:685d5f11838f 3368 /* Set the DMA Period elapsed callback */
mbed_official 235:685d5f11838f 3369 htim->hdma[TIM_DMA_ID_CC1]->XferCpltCallback = HAL_TIM_DMADelayPulseCplt;
mbed_official 235:685d5f11838f 3370
mbed_official 235:685d5f11838f 3371 /* Set the DMA error callback */
mbed_official 235:685d5f11838f 3372 htim->hdma[TIM_DMA_ID_CC1]->XferErrorCallback = HAL_TIM_DMAError ;
mbed_official 235:685d5f11838f 3373
mbed_official 235:685d5f11838f 3374 /* Enable the DMA Stream */
mbed_official 235:685d5f11838f 3375 HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC1], (uint32_t)BurstBuffer, (uint32_t)&htim->Instance->DMAR, ((BurstLength) >> 8) + 1);
mbed_official 235:685d5f11838f 3376 }
mbed_official 235:685d5f11838f 3377 break;
mbed_official 235:685d5f11838f 3378 case TIM_DMA_CC2:
mbed_official 235:685d5f11838f 3379 {
mbed_official 235:685d5f11838f 3380 /* Set the DMA Period elapsed callback */
mbed_official 235:685d5f11838f 3381 htim->hdma[TIM_DMA_ID_CC2]->XferCpltCallback = HAL_TIM_DMADelayPulseCplt;
mbed_official 235:685d5f11838f 3382
mbed_official 235:685d5f11838f 3383 /* Set the DMA error callback */
mbed_official 235:685d5f11838f 3384 htim->hdma[TIM_DMA_ID_CC2]->XferErrorCallback = HAL_TIM_DMAError ;
mbed_official 235:685d5f11838f 3385
mbed_official 235:685d5f11838f 3386 /* Enable the DMA Stream */
mbed_official 235:685d5f11838f 3387 HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC2], (uint32_t)BurstBuffer, (uint32_t)&htim->Instance->DMAR, ((BurstLength) >> 8) + 1);
mbed_official 235:685d5f11838f 3388 }
mbed_official 235:685d5f11838f 3389 break;
mbed_official 235:685d5f11838f 3390 case TIM_DMA_CC3:
mbed_official 235:685d5f11838f 3391 {
mbed_official 235:685d5f11838f 3392 /* Set the DMA Period elapsed callback */
mbed_official 235:685d5f11838f 3393 htim->hdma[TIM_DMA_ID_CC3]->XferCpltCallback = HAL_TIM_DMADelayPulseCplt;
mbed_official 235:685d5f11838f 3394
mbed_official 235:685d5f11838f 3395 /* Set the DMA error callback */
mbed_official 235:685d5f11838f 3396 htim->hdma[TIM_DMA_ID_CC3]->XferErrorCallback = HAL_TIM_DMAError ;
mbed_official 235:685d5f11838f 3397
mbed_official 235:685d5f11838f 3398 /* Enable the DMA Stream */
mbed_official 235:685d5f11838f 3399 HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC3], (uint32_t)BurstBuffer, (uint32_t)&htim->Instance->DMAR, ((BurstLength) >> 8) + 1);
mbed_official 235:685d5f11838f 3400 }
mbed_official 235:685d5f11838f 3401 break;
mbed_official 235:685d5f11838f 3402 case TIM_DMA_CC4:
mbed_official 235:685d5f11838f 3403 {
mbed_official 235:685d5f11838f 3404 /* Set the DMA Period elapsed callback */
mbed_official 235:685d5f11838f 3405 htim->hdma[TIM_DMA_ID_CC4]->XferCpltCallback = HAL_TIM_DMADelayPulseCplt;
mbed_official 235:685d5f11838f 3406
mbed_official 235:685d5f11838f 3407 /* Set the DMA error callback */
mbed_official 235:685d5f11838f 3408 htim->hdma[TIM_DMA_ID_CC4]->XferErrorCallback = HAL_TIM_DMAError ;
mbed_official 235:685d5f11838f 3409
mbed_official 235:685d5f11838f 3410 /* Enable the DMA Stream */
mbed_official 235:685d5f11838f 3411 HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC4], (uint32_t)BurstBuffer, (uint32_t)&htim->Instance->DMAR, ((BurstLength) >> 8) + 1);
mbed_official 235:685d5f11838f 3412 }
mbed_official 235:685d5f11838f 3413 break;
mbed_official 235:685d5f11838f 3414 case TIM_DMA_COM:
mbed_official 235:685d5f11838f 3415 {
mbed_official 235:685d5f11838f 3416 /* Set the DMA Period elapsed callback */
mbed_official 235:685d5f11838f 3417 htim->hdma[TIM_DMA_ID_COMMUTATION]->XferCpltCallback = HAL_TIMEx_DMACommutationCplt;
mbed_official 235:685d5f11838f 3418
mbed_official 235:685d5f11838f 3419 /* Set the DMA error callback */
mbed_official 235:685d5f11838f 3420 htim->hdma[TIM_DMA_ID_COMMUTATION]->XferErrorCallback = HAL_TIM_DMAError ;
mbed_official 235:685d5f11838f 3421
mbed_official 235:685d5f11838f 3422 /* Enable the DMA Stream */
mbed_official 235:685d5f11838f 3423 HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_COMMUTATION], (uint32_t)BurstBuffer, (uint32_t)&htim->Instance->DMAR, ((BurstLength) >> 8) + 1);
mbed_official 235:685d5f11838f 3424 }
mbed_official 235:685d5f11838f 3425 break;
mbed_official 235:685d5f11838f 3426 case TIM_DMA_TRIGGER:
mbed_official 235:685d5f11838f 3427 {
mbed_official 235:685d5f11838f 3428 /* Set the DMA Period elapsed callback */
mbed_official 235:685d5f11838f 3429 htim->hdma[TIM_DMA_ID_TRIGGER]->XferCpltCallback = TIM_DMATriggerCplt;
mbed_official 235:685d5f11838f 3430
mbed_official 235:685d5f11838f 3431 /* Set the DMA error callback */
mbed_official 235:685d5f11838f 3432 htim->hdma[TIM_DMA_ID_TRIGGER]->XferErrorCallback = HAL_TIM_DMAError ;
mbed_official 235:685d5f11838f 3433
mbed_official 235:685d5f11838f 3434 /* Enable the DMA Stream */
mbed_official 235:685d5f11838f 3435 HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_TRIGGER], (uint32_t)BurstBuffer, (uint32_t)&htim->Instance->DMAR, ((BurstLength) >> 8) + 1);
mbed_official 235:685d5f11838f 3436 }
mbed_official 235:685d5f11838f 3437 break;
mbed_official 235:685d5f11838f 3438 default:
mbed_official 235:685d5f11838f 3439 break;
mbed_official 235:685d5f11838f 3440 }
mbed_official 235:685d5f11838f 3441 /* configure the DMA Burst Mode */
mbed_official 235:685d5f11838f 3442 htim->Instance->DCR = BurstBaseAddress | BurstLength;
mbed_official 235:685d5f11838f 3443
mbed_official 235:685d5f11838f 3444 /* Enable the TIM DMA Request */
mbed_official 235:685d5f11838f 3445 __HAL_TIM_ENABLE_DMA(htim, BurstRequestSrc);
mbed_official 235:685d5f11838f 3446
mbed_official 235:685d5f11838f 3447 htim->State = HAL_TIM_STATE_READY;
mbed_official 235:685d5f11838f 3448
mbed_official 235:685d5f11838f 3449 /* Return function status */
mbed_official 235:685d5f11838f 3450 return HAL_OK;
mbed_official 235:685d5f11838f 3451 }
mbed_official 235:685d5f11838f 3452
mbed_official 235:685d5f11838f 3453 /**
mbed_official 235:685d5f11838f 3454 * @brief Stops the TIM DMA Burst mode
mbed_official 235:685d5f11838f 3455 * @param htim: pointer to a TIM_HandleTypeDef structure that contains
mbed_official 235:685d5f11838f 3456 * the configuration information for TIM module.
mbed_official 235:685d5f11838f 3457 * @param BurstRequestSrc: TIM DMA Request sources to disable
mbed_official 235:685d5f11838f 3458 * @retval HAL status
mbed_official 235:685d5f11838f 3459 */
mbed_official 235:685d5f11838f 3460 HAL_StatusTypeDef HAL_TIM_DMABurst_WriteStop(TIM_HandleTypeDef *htim, uint32_t BurstRequestSrc)
mbed_official 235:685d5f11838f 3461 {
mbed_official 235:685d5f11838f 3462 /* Check the parameters */
mbed_official 235:685d5f11838f 3463 assert_param(IS_TIM_DMA_SOURCE(BurstRequestSrc));
mbed_official 235:685d5f11838f 3464
mbed_official 235:685d5f11838f 3465 /* Disable the TIM Update DMA request */
mbed_official 235:685d5f11838f 3466 __HAL_TIM_DISABLE_DMA(htim, BurstRequestSrc);
mbed_official 235:685d5f11838f 3467
mbed_official 235:685d5f11838f 3468 /* Return function status */
mbed_official 235:685d5f11838f 3469 return HAL_OK;
mbed_official 235:685d5f11838f 3470 }
mbed_official 235:685d5f11838f 3471
mbed_official 235:685d5f11838f 3472 /**
mbed_official 235:685d5f11838f 3473 * @brief Configure the DMA Burst to transfer Data from the TIM peripheral to the memory
mbed_official 235:685d5f11838f 3474 * @param htim: pointer to a TIM_HandleTypeDef structure that contains
mbed_official 235:685d5f11838f 3475 * the configuration information for TIM module.
mbed_official 235:685d5f11838f 3476 * @param BurstBaseAddress: TIM Base address from when the DMA will starts the Data read.
mbed_official 235:685d5f11838f 3477 * This parameters can be on of the following values:
mbed_official 235:685d5f11838f 3478 * @arg TIM_DMABase_CR1
mbed_official 235:685d5f11838f 3479 * @arg TIM_DMABase_CR2
mbed_official 235:685d5f11838f 3480 * @arg TIM_DMABase_SMCR
mbed_official 235:685d5f11838f 3481 * @arg TIM_DMABase_DIER
mbed_official 235:685d5f11838f 3482 * @arg TIM_DMABase_SR
mbed_official 235:685d5f11838f 3483 * @arg TIM_DMABase_EGR
mbed_official 235:685d5f11838f 3484 * @arg TIM_DMABase_CCMR1
mbed_official 235:685d5f11838f 3485 * @arg TIM_DMABase_CCMR2
mbed_official 235:685d5f11838f 3486 * @arg TIM_DMABase_CCER
mbed_official 235:685d5f11838f 3487 * @arg TIM_DMABase_CNT
mbed_official 235:685d5f11838f 3488 * @arg TIM_DMABase_PSC
mbed_official 235:685d5f11838f 3489 * @arg TIM_DMABase_ARR
mbed_official 235:685d5f11838f 3490 * @arg TIM_DMABase_RCR
mbed_official 235:685d5f11838f 3491 * @arg TIM_DMABase_CCR1
mbed_official 235:685d5f11838f 3492 * @arg TIM_DMABase_CCR2
mbed_official 235:685d5f11838f 3493 * @arg TIM_DMABase_CCR3
mbed_official 235:685d5f11838f 3494 * @arg TIM_DMABase_CCR4
mbed_official 235:685d5f11838f 3495 * @arg TIM_DMABase_BDTR
mbed_official 235:685d5f11838f 3496 * @arg TIM_DMABase_DCR
mbed_official 235:685d5f11838f 3497 * @param BurstRequestSrc: TIM DMA Request sources.
mbed_official 235:685d5f11838f 3498 * This parameters can be on of the following values:
mbed_official 235:685d5f11838f 3499 * @arg TIM_DMA_UPDATE: TIM update Interrupt source
mbed_official 235:685d5f11838f 3500 * @arg TIM_DMA_CC1: TIM Capture Compare 1 DMA source
mbed_official 235:685d5f11838f 3501 * @arg TIM_DMA_CC2: TIM Capture Compare 2 DMA source
mbed_official 235:685d5f11838f 3502 * @arg TIM_DMA_CC3: TIM Capture Compare 3 DMA source
mbed_official 235:685d5f11838f 3503 * @arg TIM_DMA_CC4: TIM Capture Compare 4 DMA source
mbed_official 235:685d5f11838f 3504 * @arg TIM_DMA_COM: TIM Commutation DMA source
mbed_official 235:685d5f11838f 3505 * @arg TIM_DMA_TRIGGER: TIM Trigger DMA source
mbed_official 235:685d5f11838f 3506 * @param BurstBuffer: The Buffer address.
mbed_official 235:685d5f11838f 3507 * @param BurstLength: DMA Burst length. This parameter can be one value
mbed_official 235:685d5f11838f 3508 * between TIM_DMABurstLength_1Transfer and TIM_DMABurstLength_18Transfers.
mbed_official 235:685d5f11838f 3509 * @retval HAL status
mbed_official 235:685d5f11838f 3510 */
mbed_official 235:685d5f11838f 3511 HAL_StatusTypeDef HAL_TIM_DMABurst_ReadStart(TIM_HandleTypeDef *htim, uint32_t BurstBaseAddress, uint32_t BurstRequestSrc,
mbed_official 235:685d5f11838f 3512 uint32_t *BurstBuffer, uint32_t BurstLength)
mbed_official 235:685d5f11838f 3513 {
mbed_official 235:685d5f11838f 3514 /* Check the parameters */
mbed_official 235:685d5f11838f 3515 assert_param(IS_TIM_DMABURST_INSTANCE(htim->Instance));
mbed_official 235:685d5f11838f 3516 assert_param(IS_TIM_DMA_BASE(BurstBaseAddress));
mbed_official 235:685d5f11838f 3517 assert_param(IS_TIM_DMA_SOURCE(BurstRequestSrc));
mbed_official 235:685d5f11838f 3518 assert_param(IS_TIM_DMA_LENGTH(BurstLength));
mbed_official 235:685d5f11838f 3519
mbed_official 235:685d5f11838f 3520 if((htim->State == HAL_TIM_STATE_BUSY))
mbed_official 235:685d5f11838f 3521 {
mbed_official 235:685d5f11838f 3522 return HAL_BUSY;
mbed_official 235:685d5f11838f 3523 }
mbed_official 235:685d5f11838f 3524 else if((htim->State == HAL_TIM_STATE_READY))
mbed_official 235:685d5f11838f 3525 {
mbed_official 235:685d5f11838f 3526 if((BurstBuffer == 0 ) && (BurstLength > 0))
mbed_official 235:685d5f11838f 3527 {
mbed_official 235:685d5f11838f 3528 return HAL_ERROR;
mbed_official 235:685d5f11838f 3529 }
mbed_official 235:685d5f11838f 3530 else
mbed_official 235:685d5f11838f 3531 {
mbed_official 235:685d5f11838f 3532 htim->State = HAL_TIM_STATE_BUSY;
mbed_official 235:685d5f11838f 3533 }
mbed_official 235:685d5f11838f 3534 }
mbed_official 235:685d5f11838f 3535 switch(BurstRequestSrc)
mbed_official 235:685d5f11838f 3536 {
mbed_official 235:685d5f11838f 3537 case TIM_DMA_UPDATE:
mbed_official 235:685d5f11838f 3538 {
mbed_official 235:685d5f11838f 3539 /* Set the DMA Period elapsed callback */
mbed_official 235:685d5f11838f 3540 htim->hdma[TIM_DMA_ID_UPDATE]->XferCpltCallback = TIM_DMAPeriodElapsedCplt;
mbed_official 235:685d5f11838f 3541
mbed_official 235:685d5f11838f 3542 /* Set the DMA error callback */
mbed_official 235:685d5f11838f 3543 htim->hdma[TIM_DMA_ID_UPDATE]->XferErrorCallback = HAL_TIM_DMAError ;
mbed_official 235:685d5f11838f 3544
mbed_official 235:685d5f11838f 3545 /* Enable the DMA Stream */
mbed_official 235:685d5f11838f 3546 HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_UPDATE], (uint32_t)&htim->Instance->DMAR, (uint32_t)BurstBuffer, ((BurstLength) >> 8) + 1);
mbed_official 235:685d5f11838f 3547 }
mbed_official 235:685d5f11838f 3548 break;
mbed_official 235:685d5f11838f 3549 case TIM_DMA_CC1:
mbed_official 235:685d5f11838f 3550 {
mbed_official 235:685d5f11838f 3551 /* Set the DMA Period elapsed callback */
mbed_official 235:685d5f11838f 3552 htim->hdma[TIM_DMA_ID_CC1]->XferCpltCallback = HAL_TIM_DMACaptureCplt;
mbed_official 235:685d5f11838f 3553
mbed_official 235:685d5f11838f 3554 /* Set the DMA error callback */
mbed_official 235:685d5f11838f 3555 htim->hdma[TIM_DMA_ID_CC1]->XferErrorCallback = HAL_TIM_DMAError ;
mbed_official 235:685d5f11838f 3556
mbed_official 235:685d5f11838f 3557 /* Enable the DMA Stream */
mbed_official 235:685d5f11838f 3558 HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC1], (uint32_t)&htim->Instance->DMAR, (uint32_t)BurstBuffer, ((BurstLength) >> 8) + 1);
mbed_official 235:685d5f11838f 3559 }
mbed_official 235:685d5f11838f 3560 break;
mbed_official 235:685d5f11838f 3561 case TIM_DMA_CC2:
mbed_official 235:685d5f11838f 3562 {
mbed_official 235:685d5f11838f 3563 /* Set the DMA Period elapsed callback */
mbed_official 235:685d5f11838f 3564 htim->hdma[TIM_DMA_ID_CC2]->XferCpltCallback = HAL_TIM_DMACaptureCplt;
mbed_official 235:685d5f11838f 3565
mbed_official 235:685d5f11838f 3566 /* Set the DMA error callback */
mbed_official 235:685d5f11838f 3567 htim->hdma[TIM_DMA_ID_CC2]->XferErrorCallback = HAL_TIM_DMAError ;
mbed_official 235:685d5f11838f 3568
mbed_official 235:685d5f11838f 3569 /* Enable the DMA Stream */
mbed_official 235:685d5f11838f 3570 HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC2], (uint32_t)&htim->Instance->DMAR, (uint32_t)BurstBuffer, ((BurstLength) >> 8) + 1);
mbed_official 235:685d5f11838f 3571 }
mbed_official 235:685d5f11838f 3572 break;
mbed_official 235:685d5f11838f 3573 case TIM_DMA_CC3:
mbed_official 235:685d5f11838f 3574 {
mbed_official 235:685d5f11838f 3575 /* Set the DMA Period elapsed callback */
mbed_official 235:685d5f11838f 3576 htim->hdma[TIM_DMA_ID_CC3]->XferCpltCallback = HAL_TIM_DMACaptureCplt;
mbed_official 235:685d5f11838f 3577
mbed_official 235:685d5f11838f 3578 /* Set the DMA error callback */
mbed_official 235:685d5f11838f 3579 htim->hdma[TIM_DMA_ID_CC3]->XferErrorCallback = HAL_TIM_DMAError ;
mbed_official 235:685d5f11838f 3580
mbed_official 235:685d5f11838f 3581 /* Enable the DMA Stream */
mbed_official 235:685d5f11838f 3582 HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC3], (uint32_t)&htim->Instance->DMAR, (uint32_t)BurstBuffer, ((BurstLength) >> 8) + 1);
mbed_official 235:685d5f11838f 3583 }
mbed_official 235:685d5f11838f 3584 break;
mbed_official 235:685d5f11838f 3585 case TIM_DMA_CC4:
mbed_official 235:685d5f11838f 3586 {
mbed_official 235:685d5f11838f 3587 /* Set the DMA Period elapsed callback */
mbed_official 235:685d5f11838f 3588 htim->hdma[TIM_DMA_ID_CC4]->XferCpltCallback = HAL_TIM_DMACaptureCplt;
mbed_official 235:685d5f11838f 3589
mbed_official 235:685d5f11838f 3590 /* Set the DMA error callback */
mbed_official 235:685d5f11838f 3591 htim->hdma[TIM_DMA_ID_CC4]->XferErrorCallback = HAL_TIM_DMAError ;
mbed_official 235:685d5f11838f 3592
mbed_official 235:685d5f11838f 3593 /* Enable the DMA Stream */
mbed_official 235:685d5f11838f 3594 HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC4], (uint32_t)&htim->Instance->DMAR, (uint32_t)BurstBuffer, ((BurstLength) >> 8) + 1);
mbed_official 235:685d5f11838f 3595 }
mbed_official 235:685d5f11838f 3596 break;
mbed_official 235:685d5f11838f 3597 case TIM_DMA_COM:
mbed_official 235:685d5f11838f 3598 {
mbed_official 235:685d5f11838f 3599 /* Set the DMA Period elapsed callback */
mbed_official 235:685d5f11838f 3600 htim->hdma[TIM_DMA_ID_COMMUTATION]->XferCpltCallback = HAL_TIMEx_DMACommutationCplt;
mbed_official 235:685d5f11838f 3601
mbed_official 235:685d5f11838f 3602 /* Set the DMA error callback */
mbed_official 235:685d5f11838f 3603 htim->hdma[TIM_DMA_ID_COMMUTATION]->XferErrorCallback = HAL_TIM_DMAError ;
mbed_official 235:685d5f11838f 3604
mbed_official 235:685d5f11838f 3605 /* Enable the DMA Stream */
mbed_official 235:685d5f11838f 3606 HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_COMMUTATION], (uint32_t)&htim->Instance->DMAR, (uint32_t)BurstBuffer, ((BurstLength) >> 8) + 1);
mbed_official 235:685d5f11838f 3607 }
mbed_official 235:685d5f11838f 3608 break;
mbed_official 235:685d5f11838f 3609 case TIM_DMA_TRIGGER:
mbed_official 235:685d5f11838f 3610 {
mbed_official 235:685d5f11838f 3611 /* Set the DMA Period elapsed callback */
mbed_official 235:685d5f11838f 3612 htim->hdma[TIM_DMA_ID_TRIGGER]->XferCpltCallback = TIM_DMATriggerCplt;
mbed_official 235:685d5f11838f 3613
mbed_official 235:685d5f11838f 3614 /* Set the DMA error callback */
mbed_official 235:685d5f11838f 3615 htim->hdma[TIM_DMA_ID_TRIGGER]->XferErrorCallback = HAL_TIM_DMAError ;
mbed_official 235:685d5f11838f 3616
mbed_official 235:685d5f11838f 3617 /* Enable the DMA Stream */
mbed_official 235:685d5f11838f 3618 HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_TRIGGER], (uint32_t)&htim->Instance->DMAR, (uint32_t)BurstBuffer, ((BurstLength) >> 8) + 1);
mbed_official 235:685d5f11838f 3619 }
mbed_official 235:685d5f11838f 3620 break;
mbed_official 235:685d5f11838f 3621 default:
mbed_official 235:685d5f11838f 3622 break;
mbed_official 235:685d5f11838f 3623 }
mbed_official 235:685d5f11838f 3624
mbed_official 235:685d5f11838f 3625 /* configure the DMA Burst Mode */
mbed_official 235:685d5f11838f 3626 htim->Instance->DCR = BurstBaseAddress | BurstLength;
mbed_official 235:685d5f11838f 3627
mbed_official 235:685d5f11838f 3628 /* Enable the TIM DMA Request */
mbed_official 235:685d5f11838f 3629 __HAL_TIM_ENABLE_DMA(htim, BurstRequestSrc);
mbed_official 235:685d5f11838f 3630
mbed_official 235:685d5f11838f 3631 htim->State = HAL_TIM_STATE_READY;
mbed_official 235:685d5f11838f 3632
mbed_official 235:685d5f11838f 3633 /* Return function status */
mbed_official 235:685d5f11838f 3634 return HAL_OK;
mbed_official 235:685d5f11838f 3635 }
mbed_official 235:685d5f11838f 3636
mbed_official 235:685d5f11838f 3637 /**
mbed_official 235:685d5f11838f 3638 * @brief Stop the DMA burst reading
mbed_official 235:685d5f11838f 3639 * @param htim: pointer to a TIM_HandleTypeDef structure that contains
mbed_official 235:685d5f11838f 3640 * the configuration information for TIM module.
mbed_official 235:685d5f11838f 3641 * @param BurstRequestSrc: TIM DMA Request sources to disable.
mbed_official 235:685d5f11838f 3642 * @retval HAL status
mbed_official 235:685d5f11838f 3643 */
mbed_official 235:685d5f11838f 3644 HAL_StatusTypeDef HAL_TIM_DMABurst_ReadStop(TIM_HandleTypeDef *htim, uint32_t BurstRequestSrc)
mbed_official 235:685d5f11838f 3645 {
mbed_official 235:685d5f11838f 3646 /* Check the parameters */
mbed_official 235:685d5f11838f 3647 assert_param(IS_TIM_DMA_SOURCE(BurstRequestSrc));
mbed_official 235:685d5f11838f 3648
mbed_official 235:685d5f11838f 3649 /* Disable the TIM Update DMA request */
mbed_official 235:685d5f11838f 3650 __HAL_TIM_DISABLE_DMA(htim, BurstRequestSrc);
mbed_official 235:685d5f11838f 3651
mbed_official 235:685d5f11838f 3652 /* Return function status */
mbed_official 235:685d5f11838f 3653 return HAL_OK;
mbed_official 235:685d5f11838f 3654 }
mbed_official 235:685d5f11838f 3655
mbed_official 235:685d5f11838f 3656 /**
mbed_official 235:685d5f11838f 3657 * @brief Generate a software event
mbed_official 235:685d5f11838f 3658 * @param htim: pointer to a TIM_HandleTypeDef structure that contains
mbed_official 235:685d5f11838f 3659 * the configuration information for TIM module.
mbed_official 235:685d5f11838f 3660 * @param EventSource: specifies the event source.
mbed_official 235:685d5f11838f 3661 * This parameter can be one of the following values:
mbed_official 235:685d5f11838f 3662 * @arg TIM_EventSource_Update: Timer update Event source
mbed_official 235:685d5f11838f 3663 * @arg TIM_EventSource_CC1: Timer Capture Compare 1 Event source
mbed_official 235:685d5f11838f 3664 * @arg TIM_EventSource_CC2: Timer Capture Compare 2 Event source
mbed_official 235:685d5f11838f 3665 * @arg TIM_EventSource_CC3: Timer Capture Compare 3 Event source
mbed_official 235:685d5f11838f 3666 * @arg TIM_EventSource_CC4: Timer Capture Compare 4 Event source
mbed_official 235:685d5f11838f 3667 * @arg TIM_EventSource_COM: Timer COM event source
mbed_official 235:685d5f11838f 3668 * @arg TIM_EventSource_Trigger: Timer Trigger Event source
mbed_official 235:685d5f11838f 3669 * @arg TIM_EventSource_Break: Timer Break event source
mbed_official 235:685d5f11838f 3670 * @note TIM6 and TIM7 can only generate an update event.
mbed_official 235:685d5f11838f 3671 * @note TIM_EventSource_COM and TIM_EventSource_Break are used only with TIM1 and TIM8.
mbed_official 235:685d5f11838f 3672 * @retval HAL status
mbed_official 235:685d5f11838f 3673 */
mbed_official 235:685d5f11838f 3674
mbed_official 235:685d5f11838f 3675 HAL_StatusTypeDef HAL_TIM_GenerateEvent(TIM_HandleTypeDef *htim, uint32_t EventSource)
mbed_official 235:685d5f11838f 3676 {
mbed_official 235:685d5f11838f 3677 /* Check the parameters */
mbed_official 235:685d5f11838f 3678 assert_param(IS_TIM_INSTANCE(htim->Instance));
mbed_official 235:685d5f11838f 3679 assert_param(IS_TIM_EVENT_SOURCE(EventSource));
mbed_official 235:685d5f11838f 3680
mbed_official 235:685d5f11838f 3681 /* Process Locked */
mbed_official 235:685d5f11838f 3682 __HAL_LOCK(htim);
mbed_official 235:685d5f11838f 3683
mbed_official 235:685d5f11838f 3684 /* Change the TIM state */
mbed_official 235:685d5f11838f 3685 htim->State = HAL_TIM_STATE_BUSY;
mbed_official 235:685d5f11838f 3686
mbed_official 235:685d5f11838f 3687 /* Set the event sources */
mbed_official 235:685d5f11838f 3688 htim->Instance->EGR = EventSource;
mbed_official 235:685d5f11838f 3689
mbed_official 235:685d5f11838f 3690 /* Change the TIM state */
mbed_official 235:685d5f11838f 3691 htim->State = HAL_TIM_STATE_READY;
mbed_official 235:685d5f11838f 3692
mbed_official 235:685d5f11838f 3693 __HAL_UNLOCK(htim);
mbed_official 235:685d5f11838f 3694
mbed_official 235:685d5f11838f 3695 /* Return function status */
mbed_official 235:685d5f11838f 3696 return HAL_OK;
mbed_official 235:685d5f11838f 3697 }
mbed_official 235:685d5f11838f 3698
mbed_official 235:685d5f11838f 3699 /**
mbed_official 235:685d5f11838f 3700 * @brief Configures the OCRef clear feature
mbed_official 235:685d5f11838f 3701 * @param htim: pointer to a TIM_HandleTypeDef structure that contains
mbed_official 235:685d5f11838f 3702 * the configuration information for TIM module.
mbed_official 235:685d5f11838f 3703 * @param sClearInputConfig: pointer to a TIM_ClearInputConfigTypeDef structure that
mbed_official 235:685d5f11838f 3704 * contains the OCREF clear feature and parameters for the TIM peripheral.
mbed_official 235:685d5f11838f 3705 * @param Channel: specifies the TIM Channel.
mbed_official 235:685d5f11838f 3706 * This parameter can be one of the following values:
mbed_official 235:685d5f11838f 3707 * @arg TIM_CHANNEL_1: TIM Channel 1 selected
mbed_official 235:685d5f11838f 3708 * @arg TIM_CHANNEL_2: TIM Channel 2 selected
mbed_official 235:685d5f11838f 3709 * @arg TIM_CHANNEL_3: TIM Channel 3 selected
mbed_official 235:685d5f11838f 3710 * @arg TIM_CHANNEL_4: TIM Channel 4 selected
mbed_official 235:685d5f11838f 3711 * @retval HAL status
mbed_official 235:685d5f11838f 3712 */
mbed_official 235:685d5f11838f 3713 HAL_StatusTypeDef HAL_TIM_ConfigOCrefClear(TIM_HandleTypeDef *htim, TIM_ClearInputConfigTypeDef * sClearInputConfig, uint32_t Channel)
mbed_official 235:685d5f11838f 3714 {
mbed_official 235:685d5f11838f 3715 /* Check the parameters */
mbed_official 235:685d5f11838f 3716 assert_param(IS_TIM_CC1_INSTANCE(htim->Instance));
mbed_official 235:685d5f11838f 3717 assert_param(IS_TIM_CHANNELS(Channel));
mbed_official 235:685d5f11838f 3718 assert_param(IS_TIM_CLEARINPUT_SOURCE(sClearInputConfig->ClearInputSource));
mbed_official 235:685d5f11838f 3719 assert_param(IS_TIM_CLEARINPUT_POLARITY(sClearInputConfig->ClearInputPolarity));
mbed_official 235:685d5f11838f 3720 assert_param(IS_TIM_CLEARINPUT_PRESCALER(sClearInputConfig->ClearInputPrescaler));
mbed_official 235:685d5f11838f 3721 assert_param(IS_TIM_CLEARINPUT_FILTER(sClearInputConfig->ClearInputFilter));
mbed_official 235:685d5f11838f 3722
mbed_official 235:685d5f11838f 3723 /* Process Locked */
mbed_official 235:685d5f11838f 3724 __HAL_LOCK(htim);
mbed_official 235:685d5f11838f 3725
mbed_official 235:685d5f11838f 3726 htim->State = HAL_TIM_STATE_BUSY;
mbed_official 235:685d5f11838f 3727
mbed_official 235:685d5f11838f 3728 if(sClearInputConfig->ClearInputSource == TIM_CLEARINPUTSOURCE_ETR)
mbed_official 235:685d5f11838f 3729 {
mbed_official 235:685d5f11838f 3730 TIM_ETR_SetConfig(htim->Instance,
mbed_official 235:685d5f11838f 3731 sClearInputConfig->ClearInputPrescaler,
mbed_official 235:685d5f11838f 3732 sClearInputConfig->ClearInputPolarity,
mbed_official 235:685d5f11838f 3733 sClearInputConfig->ClearInputFilter);
mbed_official 235:685d5f11838f 3734 }
mbed_official 235:685d5f11838f 3735
mbed_official 235:685d5f11838f 3736 switch (Channel)
mbed_official 235:685d5f11838f 3737 {
mbed_official 235:685d5f11838f 3738 case TIM_CHANNEL_1:
mbed_official 235:685d5f11838f 3739 {
mbed_official 235:685d5f11838f 3740 if(sClearInputConfig->ClearInputState != RESET)
mbed_official 235:685d5f11838f 3741 {
mbed_official 235:685d5f11838f 3742 /* Enable the Ocref clear feature for Channel 1 */
mbed_official 235:685d5f11838f 3743 htim->Instance->CCMR1 |= TIM_CCMR1_OC1CE;
mbed_official 235:685d5f11838f 3744 }
mbed_official 235:685d5f11838f 3745 else
mbed_official 235:685d5f11838f 3746 {
mbed_official 235:685d5f11838f 3747 /* Disable the Ocref clear feature for Channel 1 */
mbed_official 235:685d5f11838f 3748 htim->Instance->CCMR1 &= ~TIM_CCMR1_OC1CE;
mbed_official 235:685d5f11838f 3749 }
mbed_official 235:685d5f11838f 3750 }
mbed_official 235:685d5f11838f 3751 break;
mbed_official 235:685d5f11838f 3752 case TIM_CHANNEL_2:
mbed_official 235:685d5f11838f 3753 {
mbed_official 235:685d5f11838f 3754 assert_param(IS_TIM_CC2_INSTANCE(htim->Instance));
mbed_official 235:685d5f11838f 3755 if(sClearInputConfig->ClearInputState != RESET)
mbed_official 235:685d5f11838f 3756 {
mbed_official 235:685d5f11838f 3757 /* Enable the Ocref clear feature for Channel 2 */
mbed_official 235:685d5f11838f 3758 htim->Instance->CCMR1 |= TIM_CCMR1_OC2CE;
mbed_official 235:685d5f11838f 3759 }
mbed_official 235:685d5f11838f 3760 else
mbed_official 235:685d5f11838f 3761 {
mbed_official 235:685d5f11838f 3762 /* Disable the Ocref clear feature for Channel 2 */
mbed_official 235:685d5f11838f 3763 htim->Instance->CCMR1 &= ~TIM_CCMR1_OC2CE;
mbed_official 235:685d5f11838f 3764 }
mbed_official 235:685d5f11838f 3765 }
mbed_official 235:685d5f11838f 3766 break;
mbed_official 235:685d5f11838f 3767 case TIM_CHANNEL_3:
mbed_official 235:685d5f11838f 3768 {
mbed_official 235:685d5f11838f 3769 assert_param(IS_TIM_CC3_INSTANCE(htim->Instance));
mbed_official 235:685d5f11838f 3770 if(sClearInputConfig->ClearInputState != RESET)
mbed_official 235:685d5f11838f 3771 {
mbed_official 235:685d5f11838f 3772 /* Enable the Ocref clear feature for Channel 3 */
mbed_official 235:685d5f11838f 3773 htim->Instance->CCMR2 |= TIM_CCMR2_OC3CE;
mbed_official 235:685d5f11838f 3774 }
mbed_official 235:685d5f11838f 3775 else
mbed_official 235:685d5f11838f 3776 {
mbed_official 235:685d5f11838f 3777 /* Disable the Ocref clear feature for Channel 3 */
mbed_official 235:685d5f11838f 3778 htim->Instance->CCMR2 &= ~TIM_CCMR2_OC3CE;
mbed_official 235:685d5f11838f 3779 }
mbed_official 235:685d5f11838f 3780 }
mbed_official 235:685d5f11838f 3781 break;
mbed_official 235:685d5f11838f 3782 case TIM_CHANNEL_4:
mbed_official 235:685d5f11838f 3783 {
mbed_official 235:685d5f11838f 3784 assert_param(IS_TIM_CC4_INSTANCE(htim->Instance));
mbed_official 235:685d5f11838f 3785 if(sClearInputConfig->ClearInputState != RESET)
mbed_official 235:685d5f11838f 3786 {
mbed_official 235:685d5f11838f 3787 /* Enable the Ocref clear feature for Channel 4 */
mbed_official 235:685d5f11838f 3788 htim->Instance->CCMR2 |= TIM_CCMR2_OC4CE;
mbed_official 235:685d5f11838f 3789 }
mbed_official 235:685d5f11838f 3790 else
mbed_official 235:685d5f11838f 3791 {
mbed_official 235:685d5f11838f 3792 /* Disable the Ocref clear feature for Channel 4 */
mbed_official 235:685d5f11838f 3793 htim->Instance->CCMR2 &= ~TIM_CCMR2_OC4CE;
mbed_official 235:685d5f11838f 3794 }
mbed_official 235:685d5f11838f 3795 }
mbed_official 235:685d5f11838f 3796 break;
mbed_official 235:685d5f11838f 3797 default:
mbed_official 235:685d5f11838f 3798 break;
mbed_official 235:685d5f11838f 3799 }
mbed_official 235:685d5f11838f 3800
mbed_official 235:685d5f11838f 3801 htim->State = HAL_TIM_STATE_READY;
mbed_official 235:685d5f11838f 3802
mbed_official 235:685d5f11838f 3803 __HAL_UNLOCK(htim);
mbed_official 235:685d5f11838f 3804
mbed_official 235:685d5f11838f 3805 return HAL_OK;
mbed_official 235:685d5f11838f 3806 }
mbed_official 235:685d5f11838f 3807
mbed_official 235:685d5f11838f 3808 /**
mbed_official 235:685d5f11838f 3809 * @brief Configures the clock source to be used
mbed_official 235:685d5f11838f 3810 * @param htim: pointer to a TIM_HandleTypeDef structure that contains
mbed_official 235:685d5f11838f 3811 * the configuration information for TIM module.
mbed_official 235:685d5f11838f 3812 * @param sClockSourceConfig: pointer to a TIM_ClockConfigTypeDef structure that
mbed_official 235:685d5f11838f 3813 * contains the clock source information for the TIM peripheral.
mbed_official 235:685d5f11838f 3814 * @retval HAL status
mbed_official 235:685d5f11838f 3815 */
mbed_official 235:685d5f11838f 3816 HAL_StatusTypeDef HAL_TIM_ConfigClockSource(TIM_HandleTypeDef *htim, TIM_ClockConfigTypeDef * sClockSourceConfig)
mbed_official 235:685d5f11838f 3817 {
mbed_official 235:685d5f11838f 3818 uint32_t tmpsmcr = 0;
mbed_official 235:685d5f11838f 3819
mbed_official 235:685d5f11838f 3820 /* Process Locked */
mbed_official 235:685d5f11838f 3821 __HAL_LOCK(htim);
mbed_official 235:685d5f11838f 3822
mbed_official 235:685d5f11838f 3823 htim->State = HAL_TIM_STATE_BUSY;
mbed_official 235:685d5f11838f 3824
mbed_official 235:685d5f11838f 3825 /* Check the parameters */
mbed_official 235:685d5f11838f 3826 assert_param(IS_TIM_CLOCKSOURCE(sClockSourceConfig->ClockSource));
mbed_official 235:685d5f11838f 3827 assert_param(IS_TIM_CLOCKPOLARITY(sClockSourceConfig->ClockPolarity));
mbed_official 235:685d5f11838f 3828 assert_param(IS_TIM_CLOCKPRESCALER(sClockSourceConfig->ClockPrescaler));
mbed_official 235:685d5f11838f 3829 assert_param(IS_TIM_CLOCKFILTER(sClockSourceConfig->ClockFilter));
mbed_official 235:685d5f11838f 3830
mbed_official 235:685d5f11838f 3831 /* Reset the SMS, TS, ECE, ETPS and ETRF bits */
mbed_official 235:685d5f11838f 3832 tmpsmcr = htim->Instance->SMCR;
mbed_official 235:685d5f11838f 3833 tmpsmcr &= ~(TIM_SMCR_SMS | TIM_SMCR_TS);
mbed_official 235:685d5f11838f 3834 tmpsmcr &= ~(TIM_SMCR_ETF | TIM_SMCR_ETPS | TIM_SMCR_ECE | TIM_SMCR_ETP);
mbed_official 235:685d5f11838f 3835 htim->Instance->SMCR = tmpsmcr;
mbed_official 235:685d5f11838f 3836
mbed_official 235:685d5f11838f 3837 switch (sClockSourceConfig->ClockSource)
mbed_official 235:685d5f11838f 3838 {
mbed_official 235:685d5f11838f 3839 case TIM_CLOCKSOURCE_INTERNAL:
mbed_official 235:685d5f11838f 3840 {
mbed_official 235:685d5f11838f 3841 assert_param(IS_TIM_INSTANCE(htim->Instance));
mbed_official 235:685d5f11838f 3842 /* Disable slave mode to clock the prescaler directly with the internal clock */
mbed_official 235:685d5f11838f 3843 htim->Instance->SMCR &= ~TIM_SMCR_SMS;
mbed_official 235:685d5f11838f 3844 }
mbed_official 235:685d5f11838f 3845 break;
mbed_official 235:685d5f11838f 3846
mbed_official 235:685d5f11838f 3847 case TIM_CLOCKSOURCE_ETRMODE1:
mbed_official 235:685d5f11838f 3848 {
mbed_official 235:685d5f11838f 3849 assert_param(IS_TIM_ETR_INSTANCE(htim->Instance));
mbed_official 235:685d5f11838f 3850 /* Configure the ETR Clock source */
mbed_official 235:685d5f11838f 3851 TIM_ETR_SetConfig(htim->Instance,
mbed_official 235:685d5f11838f 3852 sClockSourceConfig->ClockPrescaler,
mbed_official 235:685d5f11838f 3853 sClockSourceConfig->ClockPolarity,
mbed_official 235:685d5f11838f 3854 sClockSourceConfig->ClockFilter);
mbed_official 235:685d5f11838f 3855 /* Get the TIMx SMCR register value */
mbed_official 235:685d5f11838f 3856 tmpsmcr = htim->Instance->SMCR;
mbed_official 235:685d5f11838f 3857 /* Reset the SMS and TS Bits */
mbed_official 235:685d5f11838f 3858 tmpsmcr &= ~(TIM_SMCR_SMS | TIM_SMCR_TS);
mbed_official 235:685d5f11838f 3859 /* Select the External clock mode1 and the ETRF trigger */
mbed_official 235:685d5f11838f 3860 tmpsmcr |= (TIM_SLAVEMODE_EXTERNAL1 | TIM_CLOCKSOURCE_ETRMODE1);
mbed_official 235:685d5f11838f 3861 /* Write to TIMx SMCR */
mbed_official 235:685d5f11838f 3862 htim->Instance->SMCR = tmpsmcr;
mbed_official 235:685d5f11838f 3863 }
mbed_official 235:685d5f11838f 3864 break;
mbed_official 235:685d5f11838f 3865
mbed_official 235:685d5f11838f 3866 case TIM_CLOCKSOURCE_ETRMODE2:
mbed_official 235:685d5f11838f 3867 {
mbed_official 235:685d5f11838f 3868 assert_param(IS_TIM_ETR_INSTANCE(htim->Instance));
mbed_official 235:685d5f11838f 3869 /* Configure the ETR Clock source */
mbed_official 235:685d5f11838f 3870 TIM_ETR_SetConfig(htim->Instance,
mbed_official 235:685d5f11838f 3871 sClockSourceConfig->ClockPrescaler,
mbed_official 235:685d5f11838f 3872 sClockSourceConfig->ClockPolarity,
mbed_official 235:685d5f11838f 3873 sClockSourceConfig->ClockFilter);
mbed_official 235:685d5f11838f 3874 /* Enable the External clock mode2 */
mbed_official 235:685d5f11838f 3875 htim->Instance->SMCR |= TIM_SMCR_ECE;
mbed_official 235:685d5f11838f 3876 }
mbed_official 235:685d5f11838f 3877 break;
mbed_official 235:685d5f11838f 3878
mbed_official 235:685d5f11838f 3879 case TIM_CLOCKSOURCE_TI1:
mbed_official 235:685d5f11838f 3880 {
mbed_official 235:685d5f11838f 3881 assert_param(IS_TIM_CC1_INSTANCE(htim->Instance));
mbed_official 235:685d5f11838f 3882 TIM_TI1_ConfigInputStage(htim->Instance,
mbed_official 235:685d5f11838f 3883 sClockSourceConfig->ClockPolarity,
mbed_official 235:685d5f11838f 3884 sClockSourceConfig->ClockFilter);
mbed_official 235:685d5f11838f 3885 TIM_ITRx_SetConfig(htim->Instance, TIM_CLOCKSOURCE_TI1);
mbed_official 235:685d5f11838f 3886 }
mbed_official 235:685d5f11838f 3887 break;
mbed_official 235:685d5f11838f 3888 case TIM_CLOCKSOURCE_TI2:
mbed_official 235:685d5f11838f 3889 {
mbed_official 235:685d5f11838f 3890 assert_param(IS_TIM_CC2_INSTANCE(htim->Instance));
mbed_official 235:685d5f11838f 3891 TIM_TI2_ConfigInputStage(htim->Instance,
mbed_official 235:685d5f11838f 3892 sClockSourceConfig->ClockPolarity,
mbed_official 235:685d5f11838f 3893 sClockSourceConfig->ClockFilter);
mbed_official 235:685d5f11838f 3894 TIM_ITRx_SetConfig(htim->Instance, TIM_CLOCKSOURCE_TI2);
mbed_official 235:685d5f11838f 3895 }
mbed_official 235:685d5f11838f 3896 break;
mbed_official 235:685d5f11838f 3897 case TIM_CLOCKSOURCE_TI1ED:
mbed_official 235:685d5f11838f 3898 {
mbed_official 235:685d5f11838f 3899 assert_param(IS_TIM_CC1_INSTANCE(htim->Instance));
mbed_official 235:685d5f11838f 3900 TIM_TI1_ConfigInputStage(htim->Instance,
mbed_official 235:685d5f11838f 3901 sClockSourceConfig->ClockPolarity,
mbed_official 235:685d5f11838f 3902 sClockSourceConfig->ClockFilter);
mbed_official 235:685d5f11838f 3903 TIM_ITRx_SetConfig(htim->Instance, TIM_CLOCKSOURCE_TI1ED);
mbed_official 235:685d5f11838f 3904 }
mbed_official 235:685d5f11838f 3905 break;
mbed_official 235:685d5f11838f 3906 case TIM_CLOCKSOURCE_ITR0:
mbed_official 235:685d5f11838f 3907 {
mbed_official 235:685d5f11838f 3908 assert_param(IS_TIM_CC2_INSTANCE(htim->Instance));
mbed_official 235:685d5f11838f 3909 TIM_ITRx_SetConfig(htim->Instance, TIM_CLOCKSOURCE_ITR0);
mbed_official 235:685d5f11838f 3910 }
mbed_official 235:685d5f11838f 3911 break;
mbed_official 235:685d5f11838f 3912 case TIM_CLOCKSOURCE_ITR1:
mbed_official 235:685d5f11838f 3913 {
mbed_official 235:685d5f11838f 3914 assert_param(IS_TIM_CC2_INSTANCE(htim->Instance));
mbed_official 235:685d5f11838f 3915 TIM_ITRx_SetConfig(htim->Instance, TIM_CLOCKSOURCE_ITR1);
mbed_official 235:685d5f11838f 3916 }
mbed_official 235:685d5f11838f 3917 break;
mbed_official 235:685d5f11838f 3918 case TIM_CLOCKSOURCE_ITR2:
mbed_official 235:685d5f11838f 3919 {
mbed_official 235:685d5f11838f 3920 assert_param(IS_TIM_CC2_INSTANCE(htim->Instance));
mbed_official 235:685d5f11838f 3921 TIM_ITRx_SetConfig(htim->Instance, TIM_CLOCKSOURCE_ITR2);
mbed_official 235:685d5f11838f 3922 }
mbed_official 235:685d5f11838f 3923 break;
mbed_official 235:685d5f11838f 3924 case TIM_CLOCKSOURCE_ITR3:
mbed_official 235:685d5f11838f 3925 {
mbed_official 235:685d5f11838f 3926 assert_param(IS_TIM_CC2_INSTANCE(htim->Instance));
mbed_official 235:685d5f11838f 3927 TIM_ITRx_SetConfig(htim->Instance, TIM_CLOCKSOURCE_ITR3);
mbed_official 235:685d5f11838f 3928 }
mbed_official 235:685d5f11838f 3929 break;
mbed_official 235:685d5f11838f 3930
mbed_official 235:685d5f11838f 3931 default:
mbed_official 235:685d5f11838f 3932 break;
mbed_official 235:685d5f11838f 3933 }
mbed_official 235:685d5f11838f 3934 htim->State = HAL_TIM_STATE_READY;
mbed_official 235:685d5f11838f 3935
mbed_official 235:685d5f11838f 3936 __HAL_UNLOCK(htim);
mbed_official 235:685d5f11838f 3937
mbed_official 235:685d5f11838f 3938 return HAL_OK;
mbed_official 235:685d5f11838f 3939 }
mbed_official 235:685d5f11838f 3940
mbed_official 235:685d5f11838f 3941 /**
mbed_official 235:685d5f11838f 3942 * @brief Selects the signal connected to the TI1 input: direct from CH1_input
mbed_official 235:685d5f11838f 3943 * or a XOR combination between CH1_input, CH2_input & CH3_input
mbed_official 235:685d5f11838f 3944 * @param htim: pointer to a TIM_HandleTypeDef structure that contains
mbed_official 235:685d5f11838f 3945 * the configuration information for TIM module..
mbed_official 235:685d5f11838f 3946 * @param TI1_Selection: Indicate whether or not channel 1 is connected to the
mbed_official 235:685d5f11838f 3947 * output of a XOR gate.
mbed_official 235:685d5f11838f 3948 * This parameter can be one of the following values:
mbed_official 235:685d5f11838f 3949 * @arg TIM_TI1SELECTION_CH1: The TIMx_CH1 pin is connected to TI1 input
mbed_official 235:685d5f11838f 3950 * @arg TIM_TI1SELECTION_XORCOMBINATION: The TIMx_CH1, CH2 and CH3
mbed_official 235:685d5f11838f 3951 * pins are connected to the TI1 input (XOR combination)
mbed_official 235:685d5f11838f 3952 * @retval HAL status
mbed_official 235:685d5f11838f 3953 */
mbed_official 235:685d5f11838f 3954 HAL_StatusTypeDef HAL_TIM_ConfigTI1Input(TIM_HandleTypeDef *htim, uint32_t TI1_Selection)
mbed_official 235:685d5f11838f 3955 {
mbed_official 235:685d5f11838f 3956 uint32_t tmpcr2 = 0;
mbed_official 235:685d5f11838f 3957
mbed_official 235:685d5f11838f 3958 /* Check the parameters */
mbed_official 235:685d5f11838f 3959 assert_param(IS_TIM_XOR_INSTANCE(htim->Instance));
mbed_official 235:685d5f11838f 3960 assert_param(IS_TIM_TI1SELECTION(TI1_Selection));
mbed_official 235:685d5f11838f 3961
mbed_official 235:685d5f11838f 3962 /* Get the TIMx CR2 register value */
mbed_official 235:685d5f11838f 3963 tmpcr2 = htim->Instance->CR2;
mbed_official 235:685d5f11838f 3964
mbed_official 235:685d5f11838f 3965 /* Reset the TI1 selection */
mbed_official 235:685d5f11838f 3966 tmpcr2 &= ~TIM_CR2_TI1S;
mbed_official 235:685d5f11838f 3967
mbed_official 235:685d5f11838f 3968 /* Set the the TI1 selection */
mbed_official 235:685d5f11838f 3969 tmpcr2 |= TI1_Selection;
mbed_official 235:685d5f11838f 3970
mbed_official 235:685d5f11838f 3971 /* Write to TIMxCR2 */
mbed_official 235:685d5f11838f 3972 htim->Instance->CR2 = tmpcr2;
mbed_official 235:685d5f11838f 3973
mbed_official 235:685d5f11838f 3974 return HAL_OK;
mbed_official 235:685d5f11838f 3975 }
mbed_official 235:685d5f11838f 3976
mbed_official 235:685d5f11838f 3977 /**
mbed_official 235:685d5f11838f 3978 * @brief Configures the TIM in Slave mode
mbed_official 235:685d5f11838f 3979 * @param htim: pointer to a TIM_HandleTypeDef structure that contains
mbed_official 235:685d5f11838f 3980 * the configuration information for TIM module..
mbed_official 235:685d5f11838f 3981 * @param sSlaveConfig: pointer to a TIM_SlaveConfigTypeDef structure that
mbed_official 235:685d5f11838f 3982 * contains the selected trigger (internal trigger input, filtered
mbed_official 235:685d5f11838f 3983 * timer input or external trigger input) and the ) and the Slave
mbed_official 235:685d5f11838f 3984 * mode (Disable, Reset, Gated, Trigger, External clock mode 1).
mbed_official 235:685d5f11838f 3985 * @retval HAL status
mbed_official 235:685d5f11838f 3986 */
mbed_official 235:685d5f11838f 3987 HAL_StatusTypeDef HAL_TIM_SlaveConfigSynchronization(TIM_HandleTypeDef *htim, TIM_SlaveConfigTypeDef * sSlaveConfig)
mbed_official 235:685d5f11838f 3988 {
mbed_official 235:685d5f11838f 3989 uint32_t tmpsmcr = 0;
mbed_official 235:685d5f11838f 3990 uint32_t tmpccmr1 = 0;
mbed_official 235:685d5f11838f 3991 uint32_t tmpccer = 0;
mbed_official 235:685d5f11838f 3992
mbed_official 235:685d5f11838f 3993 /* Check the parameters */
mbed_official 235:685d5f11838f 3994 assert_param(IS_TIM_SLAVE_INSTANCE(htim->Instance));
mbed_official 235:685d5f11838f 3995 assert_param(IS_TIM_SLAVE_MODE(sSlaveConfig->SlaveMode));
mbed_official 235:685d5f11838f 3996 assert_param(IS_TIM_TRIGGER_SELECTION(sSlaveConfig->InputTrigger));
mbed_official 235:685d5f11838f 3997
mbed_official 235:685d5f11838f 3998 __HAL_LOCK(htim);
mbed_official 235:685d5f11838f 3999
mbed_official 235:685d5f11838f 4000 htim->State = HAL_TIM_STATE_BUSY;
mbed_official 235:685d5f11838f 4001
mbed_official 235:685d5f11838f 4002 /* Get the TIMx SMCR register value */
mbed_official 235:685d5f11838f 4003 tmpsmcr = htim->Instance->SMCR;
mbed_official 235:685d5f11838f 4004
mbed_official 235:685d5f11838f 4005 /* Reset the Trigger Selection Bits */
mbed_official 235:685d5f11838f 4006 tmpsmcr &= ~TIM_SMCR_TS;
mbed_official 235:685d5f11838f 4007 /* Set the Input Trigger source */
mbed_official 235:685d5f11838f 4008 tmpsmcr |= sSlaveConfig->InputTrigger;
mbed_official 235:685d5f11838f 4009
mbed_official 235:685d5f11838f 4010 /* Reset the slave mode Bits */
mbed_official 235:685d5f11838f 4011 tmpsmcr &= ~TIM_SMCR_SMS;
mbed_official 235:685d5f11838f 4012 /* Set the slave mode */
mbed_official 235:685d5f11838f 4013 tmpsmcr |= sSlaveConfig->SlaveMode;
mbed_official 235:685d5f11838f 4014
mbed_official 235:685d5f11838f 4015 /* Write to TIMx SMCR */
mbed_official 235:685d5f11838f 4016 htim->Instance->SMCR = tmpsmcr;
mbed_official 235:685d5f11838f 4017
mbed_official 235:685d5f11838f 4018 /* Configure the trigger prescaler, filter, and polarity */
mbed_official 235:685d5f11838f 4019 switch (sSlaveConfig->InputTrigger)
mbed_official 235:685d5f11838f 4020 {
mbed_official 235:685d5f11838f 4021 case TIM_TS_ETRF:
mbed_official 235:685d5f11838f 4022 {
mbed_official 235:685d5f11838f 4023 /* Check the parameters */
mbed_official 235:685d5f11838f 4024 assert_param(IS_TIM_ETR_INSTANCE(htim->Instance));
mbed_official 235:685d5f11838f 4025 assert_param(IS_TIM_TRIGGERPRESCALER(sSlaveConfig->TriggerPrescaler));
mbed_official 235:685d5f11838f 4026 assert_param(IS_TIM_TRIGGERPOLARITY(sSlaveConfig->TriggerPolarity));
mbed_official 235:685d5f11838f 4027 assert_param(IS_TIM_TRIGGERFILTER(sSlaveConfig->TriggerFilter));
mbed_official 235:685d5f11838f 4028 /* Configure the ETR Trigger source */
mbed_official 235:685d5f11838f 4029 TIM_ETR_SetConfig(htim->Instance,
mbed_official 235:685d5f11838f 4030 sSlaveConfig->TriggerPrescaler,
mbed_official 235:685d5f11838f 4031 sSlaveConfig->TriggerPolarity,
mbed_official 235:685d5f11838f 4032 sSlaveConfig->TriggerFilter);
mbed_official 235:685d5f11838f 4033 }
mbed_official 235:685d5f11838f 4034 break;
mbed_official 235:685d5f11838f 4035
mbed_official 235:685d5f11838f 4036 case TIM_TS_TI1F_ED:
mbed_official 235:685d5f11838f 4037 {
mbed_official 235:685d5f11838f 4038 /* Check the parameters */
mbed_official 235:685d5f11838f 4039 assert_param(IS_TIM_CC1_INSTANCE(htim->Instance));
mbed_official 235:685d5f11838f 4040 assert_param(IS_TIM_TRIGGERFILTER(sSlaveConfig->TriggerFilter));
mbed_official 235:685d5f11838f 4041
mbed_official 235:685d5f11838f 4042 /* Disable the Channel 1: Reset the CC1E Bit */
mbed_official 235:685d5f11838f 4043 tmpccer = htim->Instance->CCER;
mbed_official 235:685d5f11838f 4044 htim->Instance->CCER &= ~TIM_CCER_CC1E;
mbed_official 235:685d5f11838f 4045 tmpccmr1 = htim->Instance->CCMR1;
mbed_official 235:685d5f11838f 4046
mbed_official 235:685d5f11838f 4047 /* Set the filter */
mbed_official 235:685d5f11838f 4048 tmpccmr1 &= ~TIM_CCMR1_IC1F;
mbed_official 235:685d5f11838f 4049 tmpccmr1 |= ((sSlaveConfig->TriggerFilter) << 4);
mbed_official 235:685d5f11838f 4050
mbed_official 235:685d5f11838f 4051 /* Write to TIMx CCMR1 and CCER registers */
mbed_official 235:685d5f11838f 4052 htim->Instance->CCMR1 = tmpccmr1;
mbed_official 235:685d5f11838f 4053 htim->Instance->CCER = tmpccer;
mbed_official 235:685d5f11838f 4054
mbed_official 235:685d5f11838f 4055 }
mbed_official 235:685d5f11838f 4056 break;
mbed_official 235:685d5f11838f 4057
mbed_official 235:685d5f11838f 4058 case TIM_TS_TI1FP1:
mbed_official 235:685d5f11838f 4059 {
mbed_official 235:685d5f11838f 4060 /* Check the parameters */
mbed_official 235:685d5f11838f 4061 assert_param(IS_TIM_CC1_INSTANCE(htim->Instance));
mbed_official 235:685d5f11838f 4062 assert_param(IS_TIM_TRIGGERPOLARITY(sSlaveConfig->TriggerPolarity));
mbed_official 235:685d5f11838f 4063 assert_param(IS_TIM_TRIGGERFILTER(sSlaveConfig->TriggerFilter));
mbed_official 235:685d5f11838f 4064
mbed_official 235:685d5f11838f 4065 /* Configure TI1 Filter and Polarity */
mbed_official 235:685d5f11838f 4066 TIM_TI1_ConfigInputStage(htim->Instance,
mbed_official 235:685d5f11838f 4067 sSlaveConfig->TriggerPolarity,
mbed_official 235:685d5f11838f 4068 sSlaveConfig->TriggerFilter);
mbed_official 235:685d5f11838f 4069 }
mbed_official 235:685d5f11838f 4070 break;
mbed_official 235:685d5f11838f 4071
mbed_official 235:685d5f11838f 4072 case TIM_TS_TI2FP2:
mbed_official 235:685d5f11838f 4073 {
mbed_official 235:685d5f11838f 4074 /* Check the parameters */
mbed_official 235:685d5f11838f 4075 assert_param(IS_TIM_CC2_INSTANCE(htim->Instance));
mbed_official 235:685d5f11838f 4076 assert_param(IS_TIM_TRIGGERPOLARITY(sSlaveConfig->TriggerPolarity));
mbed_official 235:685d5f11838f 4077 assert_param(IS_TIM_TRIGGERFILTER(sSlaveConfig->TriggerFilter));
mbed_official 235:685d5f11838f 4078
mbed_official 235:685d5f11838f 4079 /* Configure TI2 Filter and Polarity */
mbed_official 235:685d5f11838f 4080 TIM_TI2_ConfigInputStage(htim->Instance,
mbed_official 235:685d5f11838f 4081 sSlaveConfig->TriggerPolarity,
mbed_official 235:685d5f11838f 4082 sSlaveConfig->TriggerFilter);
mbed_official 235:685d5f11838f 4083 }
mbed_official 235:685d5f11838f 4084 break;
mbed_official 235:685d5f11838f 4085
mbed_official 235:685d5f11838f 4086 case TIM_TS_ITR0:
mbed_official 235:685d5f11838f 4087 {
mbed_official 235:685d5f11838f 4088 /* Check the parameter */
mbed_official 235:685d5f11838f 4089 assert_param(IS_TIM_CC2_INSTANCE(htim->Instance));
mbed_official 235:685d5f11838f 4090 }
mbed_official 235:685d5f11838f 4091 break;
mbed_official 235:685d5f11838f 4092
mbed_official 235:685d5f11838f 4093 case TIM_TS_ITR1:
mbed_official 235:685d5f11838f 4094 {
mbed_official 235:685d5f11838f 4095 /* Check the parameter */
mbed_official 235:685d5f11838f 4096 assert_param(IS_TIM_CC2_INSTANCE(htim->Instance));
mbed_official 235:685d5f11838f 4097 }
mbed_official 235:685d5f11838f 4098 break;
mbed_official 235:685d5f11838f 4099
mbed_official 235:685d5f11838f 4100 case TIM_TS_ITR2:
mbed_official 235:685d5f11838f 4101 {
mbed_official 235:685d5f11838f 4102 /* Check the parameter */
mbed_official 235:685d5f11838f 4103 assert_param(IS_TIM_CC2_INSTANCE(htim->Instance));
mbed_official 235:685d5f11838f 4104 }
mbed_official 235:685d5f11838f 4105 break;
mbed_official 235:685d5f11838f 4106
mbed_official 235:685d5f11838f 4107 case TIM_TS_ITR3:
mbed_official 235:685d5f11838f 4108 {
mbed_official 235:685d5f11838f 4109 /* Check the parameter */
mbed_official 235:685d5f11838f 4110 assert_param(IS_TIM_CC2_INSTANCE(htim->Instance));
mbed_official 235:685d5f11838f 4111 }
mbed_official 235:685d5f11838f 4112 break;
mbed_official 235:685d5f11838f 4113
mbed_official 235:685d5f11838f 4114 default:
mbed_official 235:685d5f11838f 4115 break;
mbed_official 235:685d5f11838f 4116 }
mbed_official 235:685d5f11838f 4117
mbed_official 235:685d5f11838f 4118 htim->State = HAL_TIM_STATE_READY;
mbed_official 235:685d5f11838f 4119
mbed_official 235:685d5f11838f 4120 __HAL_UNLOCK(htim);
mbed_official 235:685d5f11838f 4121
mbed_official 235:685d5f11838f 4122 return HAL_OK;
mbed_official 235:685d5f11838f 4123 }
mbed_official 235:685d5f11838f 4124
mbed_official 235:685d5f11838f 4125 /**
mbed_official 235:685d5f11838f 4126 * @brief Read the captured value from Capture Compare unit
mbed_official 235:685d5f11838f 4127 * @param htim: pointer to a TIM_HandleTypeDef structure that contains
mbed_official 235:685d5f11838f 4128 * the configuration information for TIM module..
mbed_official 235:685d5f11838f 4129 * @param Channel: TIM Channels to be enabled.
mbed_official 235:685d5f11838f 4130 * This parameter can be one of the following values:
mbed_official 235:685d5f11838f 4131 * @arg TIM_CHANNEL_1: TIM Channel 1 selected
mbed_official 235:685d5f11838f 4132 * @arg TIM_CHANNEL_2: TIM Channel 2 selected
mbed_official 235:685d5f11838f 4133 * @arg TIM_CHANNEL_3: TIM Channel 3 selected
mbed_official 235:685d5f11838f 4134 * @arg TIM_CHANNEL_4: TIM Channel 4 selected
mbed_official 235:685d5f11838f 4135 * @retval Captured value
mbed_official 235:685d5f11838f 4136 */
mbed_official 235:685d5f11838f 4137 uint32_t HAL_TIM_ReadCapturedValue(TIM_HandleTypeDef *htim, uint32_t Channel)
mbed_official 235:685d5f11838f 4138 {
mbed_official 235:685d5f11838f 4139 uint32_t tmpreg = 0;
mbed_official 235:685d5f11838f 4140
mbed_official 235:685d5f11838f 4141 __HAL_LOCK(htim);
mbed_official 235:685d5f11838f 4142
mbed_official 235:685d5f11838f 4143 switch (Channel)
mbed_official 235:685d5f11838f 4144 {
mbed_official 235:685d5f11838f 4145 case TIM_CHANNEL_1:
mbed_official 235:685d5f11838f 4146 {
mbed_official 235:685d5f11838f 4147 /* Check the parameters */
mbed_official 235:685d5f11838f 4148 assert_param(IS_TIM_CC1_INSTANCE(htim->Instance));
mbed_official 235:685d5f11838f 4149
mbed_official 235:685d5f11838f 4150 /* Return the capture 1 value */
mbed_official 235:685d5f11838f 4151 tmpreg = htim->Instance->CCR1;
mbed_official 235:685d5f11838f 4152
mbed_official 235:685d5f11838f 4153 break;
mbed_official 235:685d5f11838f 4154 }
mbed_official 235:685d5f11838f 4155 case TIM_CHANNEL_2:
mbed_official 235:685d5f11838f 4156 {
mbed_official 235:685d5f11838f 4157 /* Check the parameters */
mbed_official 235:685d5f11838f 4158 assert_param(IS_TIM_CC2_INSTANCE(htim->Instance));
mbed_official 235:685d5f11838f 4159
mbed_official 235:685d5f11838f 4160 /* Return the capture 2 value */
mbed_official 235:685d5f11838f 4161 tmpreg = htim->Instance->CCR2;
mbed_official 235:685d5f11838f 4162
mbed_official 235:685d5f11838f 4163 break;
mbed_official 235:685d5f11838f 4164 }
mbed_official 235:685d5f11838f 4165
mbed_official 235:685d5f11838f 4166 case TIM_CHANNEL_3:
mbed_official 235:685d5f11838f 4167 {
mbed_official 235:685d5f11838f 4168 /* Check the parameters */
mbed_official 235:685d5f11838f 4169 assert_param(IS_TIM_CC3_INSTANCE(htim->Instance));
mbed_official 235:685d5f11838f 4170
mbed_official 235:685d5f11838f 4171 /* Return the capture 3 value */
mbed_official 235:685d5f11838f 4172 tmpreg = htim->Instance->CCR3;
mbed_official 235:685d5f11838f 4173
mbed_official 235:685d5f11838f 4174 break;
mbed_official 235:685d5f11838f 4175 }
mbed_official 235:685d5f11838f 4176
mbed_official 235:685d5f11838f 4177 case TIM_CHANNEL_4:
mbed_official 235:685d5f11838f 4178 {
mbed_official 235:685d5f11838f 4179 /* Check the parameters */
mbed_official 235:685d5f11838f 4180 assert_param(IS_TIM_CC4_INSTANCE(htim->Instance));
mbed_official 235:685d5f11838f 4181
mbed_official 235:685d5f11838f 4182 /* Return the capture 4 value */
mbed_official 235:685d5f11838f 4183 tmpreg = htim->Instance->CCR4;
mbed_official 235:685d5f11838f 4184
mbed_official 235:685d5f11838f 4185 break;
mbed_official 235:685d5f11838f 4186 }
mbed_official 235:685d5f11838f 4187
mbed_official 235:685d5f11838f 4188 default:
mbed_official 235:685d5f11838f 4189 break;
mbed_official 235:685d5f11838f 4190 }
mbed_official 235:685d5f11838f 4191
mbed_official 235:685d5f11838f 4192 __HAL_UNLOCK(htim);
mbed_official 235:685d5f11838f 4193 return tmpreg;
mbed_official 235:685d5f11838f 4194 }
mbed_official 235:685d5f11838f 4195
mbed_official 235:685d5f11838f 4196 /**
mbed_official 235:685d5f11838f 4197 * @}
mbed_official 235:685d5f11838f 4198 */
mbed_official 235:685d5f11838f 4199
mbed_official 235:685d5f11838f 4200 /** @defgroup TIM_Group9 TIM Callbacks functions
mbed_official 235:685d5f11838f 4201 * @brief TIM Callbacks functions
mbed_official 235:685d5f11838f 4202 *
mbed_official 235:685d5f11838f 4203 @verbatim
mbed_official 235:685d5f11838f 4204 ==============================================================================
mbed_official 235:685d5f11838f 4205 ##### TIM Callbacks functions #####
mbed_official 235:685d5f11838f 4206 ==============================================================================
mbed_official 235:685d5f11838f 4207 [..]
mbed_official 235:685d5f11838f 4208 This section provides TIM callback functions:
mbed_official 235:685d5f11838f 4209 (+) Timer Period elapsed callback
mbed_official 235:685d5f11838f 4210 (+) Timer Output Compare callback
mbed_official 235:685d5f11838f 4211 (+) Timer Input capture callback
mbed_official 235:685d5f11838f 4212 (+) Timer Trigger callback
mbed_official 235:685d5f11838f 4213 (+) Timer Error callback
mbed_official 235:685d5f11838f 4214
mbed_official 235:685d5f11838f 4215 @endverbatim
mbed_official 235:685d5f11838f 4216 * @{
mbed_official 235:685d5f11838f 4217 */
mbed_official 235:685d5f11838f 4218
mbed_official 235:685d5f11838f 4219 /**
mbed_official 235:685d5f11838f 4220 * @brief Period elapsed callback in non blocking mode
mbed_official 235:685d5f11838f 4221 * @param htim: pointer to a TIM_HandleTypeDef structure that contains
mbed_official 235:685d5f11838f 4222 * the configuration information for TIM module.
mbed_official 235:685d5f11838f 4223 * @retval None
mbed_official 235:685d5f11838f 4224 */
mbed_official 235:685d5f11838f 4225 __weak void HAL_TIM_PeriodElapsedCallback(TIM_HandleTypeDef *htim)
mbed_official 235:685d5f11838f 4226 {
mbed_official 235:685d5f11838f 4227 /* NOTE : This function Should not be modified, when the callback is needed,
mbed_official 235:685d5f11838f 4228 the __HAL_TIM_PeriodElapsedCallback could be implemented in the user file
mbed_official 235:685d5f11838f 4229 */
mbed_official 235:685d5f11838f 4230
mbed_official 235:685d5f11838f 4231 }
mbed_official 235:685d5f11838f 4232 /**
mbed_official 235:685d5f11838f 4233 * @brief Output Compare callback in non blocking mode
mbed_official 235:685d5f11838f 4234 * @param htim: pointer to a TIM_HandleTypeDef structure that contains
mbed_official 235:685d5f11838f 4235 * the configuration information for TIM module.
mbed_official 235:685d5f11838f 4236 * @retval None
mbed_official 235:685d5f11838f 4237 */
mbed_official 235:685d5f11838f 4238 __weak void HAL_TIM_OC_DelayElapsedCallback(TIM_HandleTypeDef *htim)
mbed_official 235:685d5f11838f 4239 {
mbed_official 235:685d5f11838f 4240 /* NOTE : This function Should not be modified, when the callback is needed,
mbed_official 235:685d5f11838f 4241 the __HAL_TIM_OC_DelayElapsedCallback could be implemented in the user file
mbed_official 235:685d5f11838f 4242 */
mbed_official 235:685d5f11838f 4243 }
mbed_official 235:685d5f11838f 4244 /**
mbed_official 235:685d5f11838f 4245 * @brief Input Capture callback in non blocking mode
mbed_official 235:685d5f11838f 4246 * @param htim: pointer to a TIM_HandleTypeDef structure that contains
mbed_official 235:685d5f11838f 4247 * the configuration information for TIM module.
mbed_official 235:685d5f11838f 4248 * @retval None
mbed_official 235:685d5f11838f 4249 */
mbed_official 235:685d5f11838f 4250 __weak void HAL_TIM_IC_CaptureCallback(TIM_HandleTypeDef *htim)
mbed_official 235:685d5f11838f 4251 {
mbed_official 235:685d5f11838f 4252 /* NOTE : This function Should not be modified, when the callback is needed,
mbed_official 235:685d5f11838f 4253 the __HAL_TIM_IC_CaptureCallback could be implemented in the user file
mbed_official 235:685d5f11838f 4254 */
mbed_official 235:685d5f11838f 4255 }
mbed_official 235:685d5f11838f 4256
mbed_official 235:685d5f11838f 4257 /**
mbed_official 235:685d5f11838f 4258 * @brief PWM Pulse finished callback in non blocking mode
mbed_official 235:685d5f11838f 4259 * @param htim: pointer to a TIM_HandleTypeDef structure that contains
mbed_official 235:685d5f11838f 4260 * the configuration information for TIM module.
mbed_official 235:685d5f11838f 4261 * @retval None
mbed_official 235:685d5f11838f 4262 */
mbed_official 235:685d5f11838f 4263 __weak void HAL_TIM_PWM_PulseFinishedCallback(TIM_HandleTypeDef *htim)
mbed_official 235:685d5f11838f 4264 {
mbed_official 235:685d5f11838f 4265 /* NOTE : This function Should not be modified, when the callback is needed,
mbed_official 235:685d5f11838f 4266 the __HAL_TIM_PWM_PulseFinishedCallback could be implemented in the user file
mbed_official 235:685d5f11838f 4267 */
mbed_official 235:685d5f11838f 4268 }
mbed_official 235:685d5f11838f 4269
mbed_official 235:685d5f11838f 4270 /**
mbed_official 235:685d5f11838f 4271 * @brief Hall Trigger detection callback in non blocking mode
mbed_official 235:685d5f11838f 4272 * @param htim: pointer to a TIM_HandleTypeDef structure that contains
mbed_official 235:685d5f11838f 4273 * the configuration information for TIM module.
mbed_official 235:685d5f11838f 4274 * @retval None
mbed_official 235:685d5f11838f 4275 */
mbed_official 235:685d5f11838f 4276 __weak void HAL_TIM_TriggerCallback(TIM_HandleTypeDef *htim)
mbed_official 235:685d5f11838f 4277 {
mbed_official 235:685d5f11838f 4278 /* NOTE : This function Should not be modified, when the callback is needed,
mbed_official 235:685d5f11838f 4279 the HAL_TIM_TriggerCallback could be implemented in the user file
mbed_official 235:685d5f11838f 4280 */
mbed_official 235:685d5f11838f 4281 }
mbed_official 235:685d5f11838f 4282
mbed_official 235:685d5f11838f 4283 /**
mbed_official 235:685d5f11838f 4284 * @brief Timer error callback in non blocking mode
mbed_official 235:685d5f11838f 4285 * @param htim: pointer to a TIM_HandleTypeDef structure that contains
mbed_official 235:685d5f11838f 4286 * the configuration information for TIM module.
mbed_official 235:685d5f11838f 4287 * @retval None
mbed_official 235:685d5f11838f 4288 */
mbed_official 235:685d5f11838f 4289 __weak void HAL_TIM_ErrorCallback(TIM_HandleTypeDef *htim)
mbed_official 235:685d5f11838f 4290 {
mbed_official 235:685d5f11838f 4291 /* NOTE : This function Should not be modified, when the callback is needed,
mbed_official 235:685d5f11838f 4292 the HAL_TIM_ErrorCallback could be implemented in the user file
mbed_official 235:685d5f11838f 4293 */
mbed_official 235:685d5f11838f 4294 }
mbed_official 235:685d5f11838f 4295
mbed_official 235:685d5f11838f 4296 /**
mbed_official 235:685d5f11838f 4297 * @}
mbed_official 235:685d5f11838f 4298 */
mbed_official 235:685d5f11838f 4299
mbed_official 235:685d5f11838f 4300 /** @defgroup TIM_Group10 Peripheral State functions
mbed_official 235:685d5f11838f 4301 * @brief Peripheral State functions
mbed_official 235:685d5f11838f 4302 *
mbed_official 235:685d5f11838f 4303 @verbatim
mbed_official 235:685d5f11838f 4304 ==============================================================================
mbed_official 235:685d5f11838f 4305 ##### Peripheral State functions #####
mbed_official 235:685d5f11838f 4306 ==============================================================================
mbed_official 235:685d5f11838f 4307 [..]
mbed_official 235:685d5f11838f 4308 This subsection permits to get in run-time the status of the peripheral
mbed_official 235:685d5f11838f 4309 and the data flow.
mbed_official 235:685d5f11838f 4310
mbed_official 235:685d5f11838f 4311 @endverbatim
mbed_official 235:685d5f11838f 4312 * @{
mbed_official 235:685d5f11838f 4313 */
mbed_official 235:685d5f11838f 4314
mbed_official 235:685d5f11838f 4315 /**
mbed_official 235:685d5f11838f 4316 * @brief Return the TIM Base state
mbed_official 235:685d5f11838f 4317 * @param htim: pointer to a TIM_HandleTypeDef structure that contains
mbed_official 235:685d5f11838f 4318 * the configuration information for TIM module.
mbed_official 235:685d5f11838f 4319 * @retval HAL state
mbed_official 235:685d5f11838f 4320 */
mbed_official 235:685d5f11838f 4321 HAL_TIM_StateTypeDef HAL_TIM_Base_GetState(TIM_HandleTypeDef *htim)
mbed_official 235:685d5f11838f 4322 {
mbed_official 235:685d5f11838f 4323 return htim->State;
mbed_official 235:685d5f11838f 4324 }
mbed_official 235:685d5f11838f 4325
mbed_official 235:685d5f11838f 4326 /**
mbed_official 235:685d5f11838f 4327 * @brief Return the TIM OC state
mbed_official 235:685d5f11838f 4328 * @param htim: pointer to a TIM_HandleTypeDef structure that contains
mbed_official 235:685d5f11838f 4329 * the configuration information for TIM module.
mbed_official 235:685d5f11838f 4330 * @retval HAL state
mbed_official 235:685d5f11838f 4331 */
mbed_official 235:685d5f11838f 4332 HAL_TIM_StateTypeDef HAL_TIM_OC_GetState(TIM_HandleTypeDef *htim)
mbed_official 235:685d5f11838f 4333 {
mbed_official 235:685d5f11838f 4334 return htim->State;
mbed_official 235:685d5f11838f 4335 }
mbed_official 235:685d5f11838f 4336
mbed_official 235:685d5f11838f 4337 /**
mbed_official 235:685d5f11838f 4338 * @brief Return the TIM PWM state
mbed_official 235:685d5f11838f 4339 * @param htim: pointer to a TIM_HandleTypeDef structure that contains
mbed_official 235:685d5f11838f 4340 * the configuration information for TIM module.
mbed_official 235:685d5f11838f 4341 * @retval HAL state
mbed_official 235:685d5f11838f 4342 */
mbed_official 235:685d5f11838f 4343 HAL_TIM_StateTypeDef HAL_TIM_PWM_GetState(TIM_HandleTypeDef *htim)
mbed_official 235:685d5f11838f 4344 {
mbed_official 235:685d5f11838f 4345 return htim->State;
mbed_official 235:685d5f11838f 4346 }
mbed_official 235:685d5f11838f 4347
mbed_official 235:685d5f11838f 4348 /**
mbed_official 235:685d5f11838f 4349 * @brief Return the TIM Input Capture state
mbed_official 235:685d5f11838f 4350 * @param htim: pointer to a TIM_HandleTypeDef structure that contains
mbed_official 235:685d5f11838f 4351 * the configuration information for TIM module.
mbed_official 235:685d5f11838f 4352 * @retval HAL state
mbed_official 235:685d5f11838f 4353 */
mbed_official 235:685d5f11838f 4354 HAL_TIM_StateTypeDef HAL_TIM_IC_GetState(TIM_HandleTypeDef *htim)
mbed_official 235:685d5f11838f 4355 {
mbed_official 235:685d5f11838f 4356 return htim->State;
mbed_official 235:685d5f11838f 4357 }
mbed_official 235:685d5f11838f 4358
mbed_official 235:685d5f11838f 4359 /**
mbed_official 235:685d5f11838f 4360 * @brief Return the TIM One Pulse Mode state
mbed_official 235:685d5f11838f 4361 * @param htim: pointer to a TIM_HandleTypeDef structure that contains
mbed_official 235:685d5f11838f 4362 * the configuration information for TIM module.
mbed_official 235:685d5f11838f 4363 * @retval HAL state
mbed_official 235:685d5f11838f 4364 */
mbed_official 235:685d5f11838f 4365 HAL_TIM_StateTypeDef HAL_TIM_OnePulse_GetState(TIM_HandleTypeDef *htim)
mbed_official 235:685d5f11838f 4366 {
mbed_official 235:685d5f11838f 4367 return htim->State;
mbed_official 235:685d5f11838f 4368 }
mbed_official 235:685d5f11838f 4369
mbed_official 235:685d5f11838f 4370 /**
mbed_official 235:685d5f11838f 4371 * @brief Return the TIM Encoder Mode state
mbed_official 235:685d5f11838f 4372 * @param htim: pointer to a TIM_HandleTypeDef structure that contains
mbed_official 235:685d5f11838f 4373 * the configuration information for TIM module.
mbed_official 235:685d5f11838f 4374 * @retval HAL state
mbed_official 235:685d5f11838f 4375 */
mbed_official 235:685d5f11838f 4376 HAL_TIM_StateTypeDef HAL_TIM_Encoder_GetState(TIM_HandleTypeDef *htim)
mbed_official 235:685d5f11838f 4377 {
mbed_official 235:685d5f11838f 4378 return htim->State;
mbed_official 235:685d5f11838f 4379 }
mbed_official 235:685d5f11838f 4380
mbed_official 235:685d5f11838f 4381 /**
mbed_official 235:685d5f11838f 4382 * @}
mbed_official 235:685d5f11838f 4383 */
mbed_official 235:685d5f11838f 4384
mbed_official 235:685d5f11838f 4385 /**
mbed_official 235:685d5f11838f 4386 * @brief TIM DMA error callback
mbed_official 235:685d5f11838f 4387 * @param hdma: pointer to a DMA_HandleTypeDef structure that contains
mbed_official 235:685d5f11838f 4388 * the configuration information for the specified DMA module.
mbed_official 235:685d5f11838f 4389 * @retval None
mbed_official 235:685d5f11838f 4390 */
mbed_official 235:685d5f11838f 4391 void HAL_TIM_DMAError(DMA_HandleTypeDef *hdma)
mbed_official 235:685d5f11838f 4392 {
mbed_official 235:685d5f11838f 4393 TIM_HandleTypeDef* htim = ( TIM_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
mbed_official 235:685d5f11838f 4394
mbed_official 235:685d5f11838f 4395 htim->State= HAL_TIM_STATE_READY;
mbed_official 235:685d5f11838f 4396
mbed_official 235:685d5f11838f 4397 HAL_TIM_ErrorCallback(htim);
mbed_official 235:685d5f11838f 4398 }
mbed_official 235:685d5f11838f 4399
mbed_official 235:685d5f11838f 4400 /**
mbed_official 235:685d5f11838f 4401 * @brief TIM DMA Delay Pulse complete callback.
mbed_official 235:685d5f11838f 4402 * @param hdma: pointer to a DMA_HandleTypeDef structure that contains
mbed_official 235:685d5f11838f 4403 * the configuration information for the specified DMA module.
mbed_official 235:685d5f11838f 4404 * @retval None
mbed_official 235:685d5f11838f 4405 */
mbed_official 235:685d5f11838f 4406 void HAL_TIM_DMADelayPulseCplt(DMA_HandleTypeDef *hdma)
mbed_official 235:685d5f11838f 4407 {
mbed_official 235:685d5f11838f 4408 TIM_HandleTypeDef* htim = ( TIM_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
mbed_official 235:685d5f11838f 4409
mbed_official 235:685d5f11838f 4410 htim->State= HAL_TIM_STATE_READY;
mbed_official 235:685d5f11838f 4411
mbed_official 235:685d5f11838f 4412 HAL_TIM_PWM_PulseFinishedCallback(htim);
mbed_official 235:685d5f11838f 4413 }
mbed_official 235:685d5f11838f 4414 /**
mbed_official 235:685d5f11838f 4415 * @brief TIM DMA Capture complete callback.
mbed_official 235:685d5f11838f 4416 * @param hdma: pointer to a DMA_HandleTypeDef structure that contains
mbed_official 235:685d5f11838f 4417 * the configuration information for the specified DMA module.
mbed_official 235:685d5f11838f 4418 * @retval None
mbed_official 235:685d5f11838f 4419 */
mbed_official 235:685d5f11838f 4420 void HAL_TIM_DMACaptureCplt(DMA_HandleTypeDef *hdma)
mbed_official 235:685d5f11838f 4421 {
mbed_official 235:685d5f11838f 4422 TIM_HandleTypeDef* htim = ( TIM_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
mbed_official 235:685d5f11838f 4423
mbed_official 235:685d5f11838f 4424 htim->State= HAL_TIM_STATE_READY;
mbed_official 235:685d5f11838f 4425
mbed_official 235:685d5f11838f 4426 HAL_TIM_IC_CaptureCallback(htim);
mbed_official 235:685d5f11838f 4427
mbed_official 235:685d5f11838f 4428 }
mbed_official 235:685d5f11838f 4429
mbed_official 235:685d5f11838f 4430 /**
mbed_official 235:685d5f11838f 4431 * @brief TIM DMA Period Elapse complete callback.
mbed_official 235:685d5f11838f 4432 * @param hdma: pointer to a DMA_HandleTypeDef structure that contains
mbed_official 235:685d5f11838f 4433 * the configuration information for the specified DMA module.
mbed_official 235:685d5f11838f 4434 * @retval None
mbed_official 235:685d5f11838f 4435 */
mbed_official 235:685d5f11838f 4436 static void TIM_DMAPeriodElapsedCplt(DMA_HandleTypeDef *hdma)
mbed_official 235:685d5f11838f 4437 {
mbed_official 235:685d5f11838f 4438 TIM_HandleTypeDef* htim = ( TIM_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
mbed_official 235:685d5f11838f 4439
mbed_official 235:685d5f11838f 4440 htim->State= HAL_TIM_STATE_READY;
mbed_official 235:685d5f11838f 4441
mbed_official 235:685d5f11838f 4442 HAL_TIM_PeriodElapsedCallback(htim);
mbed_official 235:685d5f11838f 4443 }
mbed_official 235:685d5f11838f 4444
mbed_official 235:685d5f11838f 4445 /**
mbed_official 235:685d5f11838f 4446 * @brief TIM DMA Trigger callback.
mbed_official 235:685d5f11838f 4447 * @param hdma: pointer to a DMA_HandleTypeDef structure that contains
mbed_official 235:685d5f11838f 4448 * the configuration information for the specified DMA module.
mbed_official 235:685d5f11838f 4449 * @retval None
mbed_official 235:685d5f11838f 4450 */
mbed_official 235:685d5f11838f 4451 static void TIM_DMATriggerCplt(DMA_HandleTypeDef *hdma)
mbed_official 235:685d5f11838f 4452 {
mbed_official 235:685d5f11838f 4453 TIM_HandleTypeDef* htim = ( TIM_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
mbed_official 235:685d5f11838f 4454
mbed_official 235:685d5f11838f 4455 htim->State= HAL_TIM_STATE_READY;
mbed_official 235:685d5f11838f 4456
mbed_official 235:685d5f11838f 4457 HAL_TIM_TriggerCallback(htim);
mbed_official 235:685d5f11838f 4458 }
mbed_official 235:685d5f11838f 4459
mbed_official 235:685d5f11838f 4460 /**
mbed_official 235:685d5f11838f 4461 * @brief Time Base configuration
mbed_official 235:685d5f11838f 4462 * @param TIMx: TIM periheral
mbed_official 235:685d5f11838f 4463 * @retval None
mbed_official 235:685d5f11838f 4464 */
mbed_official 235:685d5f11838f 4465 void TIM_Base_SetConfig(TIM_TypeDef *TIMx, TIM_Base_InitTypeDef *Structure)
mbed_official 235:685d5f11838f 4466 {
mbed_official 235:685d5f11838f 4467 uint32_t tmpcr1 = 0;
mbed_official 235:685d5f11838f 4468 tmpcr1 = TIMx->CR1;
mbed_official 235:685d5f11838f 4469
mbed_official 235:685d5f11838f 4470 /* Set TIM Time Base Unit parameters ---------------------------------------*/
mbed_official 235:685d5f11838f 4471 if(IS_TIM_CC3_INSTANCE(TIMx) != RESET)
mbed_official 235:685d5f11838f 4472 {
mbed_official 235:685d5f11838f 4473 /* Select the Counter Mode */
mbed_official 235:685d5f11838f 4474 tmpcr1 &= ~(TIM_CR1_DIR | TIM_CR1_CMS);
mbed_official 235:685d5f11838f 4475 tmpcr1 |= Structure->CounterMode;
mbed_official 235:685d5f11838f 4476 }
mbed_official 235:685d5f11838f 4477
mbed_official 235:685d5f11838f 4478 if(IS_TIM_CC1_INSTANCE(TIMx) != RESET)
mbed_official 235:685d5f11838f 4479 {
mbed_official 235:685d5f11838f 4480 /* Set the clock division */
mbed_official 235:685d5f11838f 4481 tmpcr1 &= ~TIM_CR1_CKD;
mbed_official 235:685d5f11838f 4482 tmpcr1 |= (uint32_t)Structure->ClockDivision;
mbed_official 235:685d5f11838f 4483 }
mbed_official 235:685d5f11838f 4484
mbed_official 235:685d5f11838f 4485 TIMx->CR1 = tmpcr1;
mbed_official 235:685d5f11838f 4486
mbed_official 235:685d5f11838f 4487 /* Set the Autoreload value */
mbed_official 235:685d5f11838f 4488 TIMx->ARR = (uint32_t)Structure->Period ;
mbed_official 235:685d5f11838f 4489
mbed_official 235:685d5f11838f 4490 /* Set the Prescaler value */
mbed_official 235:685d5f11838f 4491 TIMx->PSC = (uint32_t)Structure->Prescaler;
mbed_official 235:685d5f11838f 4492
mbed_official 235:685d5f11838f 4493 if(IS_TIM_ADVANCED_INSTANCE(TIMx) != RESET)
mbed_official 235:685d5f11838f 4494 {
mbed_official 235:685d5f11838f 4495 /* Set the Repetition Counter value */
mbed_official 235:685d5f11838f 4496 TIMx->RCR = Structure->RepetitionCounter;
mbed_official 235:685d5f11838f 4497 }
mbed_official 235:685d5f11838f 4498
mbed_official 235:685d5f11838f 4499 /* Generate an update event to reload the Prescaler
mbed_official 235:685d5f11838f 4500 and the repetition counter(only for TIM1 and TIM8) value immediatly */
mbed_official 235:685d5f11838f 4501 TIMx->EGR = TIM_EGR_UG;
mbed_official 235:685d5f11838f 4502 }
mbed_official 235:685d5f11838f 4503
mbed_official 235:685d5f11838f 4504 /**
mbed_official 235:685d5f11838f 4505 * @brief Time Ouput Compare 1 configuration
mbed_official 235:685d5f11838f 4506 * @param TIMx to select the TIM peripheral
mbed_official 235:685d5f11838f 4507 * @param OC_Config: The ouput configuration structure
mbed_official 235:685d5f11838f 4508 * @retval None
mbed_official 235:685d5f11838f 4509 */
mbed_official 235:685d5f11838f 4510 static void TIM_OC1_SetConfig(TIM_TypeDef *TIMx, TIM_OC_InitTypeDef *OC_Config)
mbed_official 235:685d5f11838f 4511 {
mbed_official 235:685d5f11838f 4512 uint32_t tmpccmrx = 0;
mbed_official 235:685d5f11838f 4513 uint32_t tmpccer = 0;
mbed_official 235:685d5f11838f 4514 uint32_t tmpcr2 = 0;
mbed_official 235:685d5f11838f 4515
mbed_official 235:685d5f11838f 4516 /* Disable the Channel 1: Reset the CC1E Bit */
mbed_official 235:685d5f11838f 4517 TIMx->CCER &= ~TIM_CCER_CC1E;
mbed_official 235:685d5f11838f 4518
mbed_official 235:685d5f11838f 4519 /* Get the TIMx CCER register value */
mbed_official 235:685d5f11838f 4520 tmpccer = TIMx->CCER;
mbed_official 235:685d5f11838f 4521 /* Get the TIMx CR2 register value */
mbed_official 235:685d5f11838f 4522 tmpcr2 = TIMx->CR2;
mbed_official 235:685d5f11838f 4523
mbed_official 235:685d5f11838f 4524 /* Get the TIMx CCMR1 register value */
mbed_official 235:685d5f11838f 4525 tmpccmrx = TIMx->CCMR1;
mbed_official 235:685d5f11838f 4526
mbed_official 235:685d5f11838f 4527 /* Reset the Output Compare Mode Bits */
mbed_official 235:685d5f11838f 4528 tmpccmrx &= ~TIM_CCMR1_OC1M;
mbed_official 235:685d5f11838f 4529 tmpccmrx &= ~TIM_CCMR1_CC1S;
mbed_official 235:685d5f11838f 4530 /* Select the Output Compare Mode */
mbed_official 235:685d5f11838f 4531 tmpccmrx |= OC_Config->OCMode;
mbed_official 235:685d5f11838f 4532
mbed_official 235:685d5f11838f 4533 /* Reset the Output Polarity level */
mbed_official 235:685d5f11838f 4534 tmpccer &= ~TIM_CCER_CC1P;
mbed_official 235:685d5f11838f 4535 /* Set the Output Compare Polarity */
mbed_official 235:685d5f11838f 4536 tmpccer |= OC_Config->OCPolarity;
mbed_official 235:685d5f11838f 4537
mbed_official 235:685d5f11838f 4538
mbed_official 235:685d5f11838f 4539 if(IS_TIM_ADVANCED_INSTANCE(TIMx) != RESET)
mbed_official 235:685d5f11838f 4540 {
mbed_official 235:685d5f11838f 4541 /* Reset the Output N Polarity level */
mbed_official 235:685d5f11838f 4542 tmpccer &= ~TIM_CCER_CC1NP;
mbed_official 235:685d5f11838f 4543 /* Set the Output N Polarity */
mbed_official 235:685d5f11838f 4544 tmpccer |= OC_Config->OCNPolarity;
mbed_official 235:685d5f11838f 4545 /* Reset the Output N State */
mbed_official 235:685d5f11838f 4546 tmpccer &= ~TIM_CCER_CC1NE;
mbed_official 235:685d5f11838f 4547
mbed_official 235:685d5f11838f 4548 /* Reset the Output Compare and Output Compare N IDLE State */
mbed_official 235:685d5f11838f 4549 tmpcr2 &= ~TIM_CR2_OIS1;
mbed_official 235:685d5f11838f 4550 tmpcr2 &= ~TIM_CR2_OIS1N;
mbed_official 235:685d5f11838f 4551 /* Set the Output Idle state */
mbed_official 235:685d5f11838f 4552 tmpcr2 |= OC_Config->OCIdleState;
mbed_official 235:685d5f11838f 4553 /* Set the Output N Idle state */
mbed_official 235:685d5f11838f 4554 tmpcr2 |= OC_Config->OCNIdleState;
mbed_official 235:685d5f11838f 4555 }
mbed_official 235:685d5f11838f 4556 /* Write to TIMx CR2 */
mbed_official 235:685d5f11838f 4557 TIMx->CR2 = tmpcr2;
mbed_official 235:685d5f11838f 4558
mbed_official 235:685d5f11838f 4559 /* Write to TIMx CCMR1 */
mbed_official 235:685d5f11838f 4560 TIMx->CCMR1 = tmpccmrx;
mbed_official 235:685d5f11838f 4561
mbed_official 235:685d5f11838f 4562 /* Set the Capture Compare Register value */
mbed_official 235:685d5f11838f 4563 TIMx->CCR1 = OC_Config->Pulse;
mbed_official 235:685d5f11838f 4564
mbed_official 235:685d5f11838f 4565 /* Write to TIMx CCER */
mbed_official 235:685d5f11838f 4566 TIMx->CCER = tmpccer;
mbed_official 235:685d5f11838f 4567 }
mbed_official 235:685d5f11838f 4568
mbed_official 235:685d5f11838f 4569 /**
mbed_official 235:685d5f11838f 4570 * @brief Time Ouput Compare 2 configuration
mbed_official 235:685d5f11838f 4571 * @param TIMx to select the TIM peripheral
mbed_official 235:685d5f11838f 4572 * @param OC_Config: The ouput configuration structure
mbed_official 235:685d5f11838f 4573 * @retval None
mbed_official 235:685d5f11838f 4574 */
mbed_official 235:685d5f11838f 4575 void TIM_OC2_SetConfig(TIM_TypeDef *TIMx, TIM_OC_InitTypeDef *OC_Config)
mbed_official 235:685d5f11838f 4576 {
mbed_official 235:685d5f11838f 4577 uint32_t tmpccmrx = 0;
mbed_official 235:685d5f11838f 4578 uint32_t tmpccer = 0;
mbed_official 235:685d5f11838f 4579 uint32_t tmpcr2 = 0;
mbed_official 235:685d5f11838f 4580
mbed_official 235:685d5f11838f 4581 /* Disable the Channel 2: Reset the CC2E Bit */
mbed_official 235:685d5f11838f 4582 TIMx->CCER &= ~TIM_CCER_CC2E;
mbed_official 235:685d5f11838f 4583
mbed_official 235:685d5f11838f 4584 /* Get the TIMx CCER register value */
mbed_official 235:685d5f11838f 4585 tmpccer = TIMx->CCER;
mbed_official 235:685d5f11838f 4586 /* Get the TIMx CR2 register value */
mbed_official 235:685d5f11838f 4587 tmpcr2 = TIMx->CR2;
mbed_official 235:685d5f11838f 4588
mbed_official 235:685d5f11838f 4589 /* Get the TIMx CCMR1 register value */
mbed_official 235:685d5f11838f 4590 tmpccmrx = TIMx->CCMR1;
mbed_official 235:685d5f11838f 4591
mbed_official 235:685d5f11838f 4592 /* Reset the Output Compare mode and Capture/Compare selection Bits */
mbed_official 235:685d5f11838f 4593 tmpccmrx &= ~TIM_CCMR1_OC2M;
mbed_official 235:685d5f11838f 4594 tmpccmrx &= ~TIM_CCMR1_CC2S;
mbed_official 235:685d5f11838f 4595
mbed_official 235:685d5f11838f 4596 /* Select the Output Compare Mode */
mbed_official 235:685d5f11838f 4597 tmpccmrx |= (OC_Config->OCMode << 8);
mbed_official 235:685d5f11838f 4598
mbed_official 235:685d5f11838f 4599 /* Reset the Output Polarity level */
mbed_official 235:685d5f11838f 4600 tmpccer &= ~TIM_CCER_CC2P;
mbed_official 235:685d5f11838f 4601 /* Set the Output Compare Polarity */
mbed_official 235:685d5f11838f 4602 tmpccer |= (OC_Config->OCPolarity << 4);
mbed_official 235:685d5f11838f 4603
mbed_official 235:685d5f11838f 4604 if(IS_TIM_ADVANCED_INSTANCE(TIMx) != RESET)
mbed_official 235:685d5f11838f 4605 {
mbed_official 235:685d5f11838f 4606 assert_param(IS_TIM_OCN_POLARITY(OC_Config->OCNPolarity));
mbed_official 235:685d5f11838f 4607 assert_param(IS_TIM_OCNIDLE_STATE(OC_Config->OCNIdleState));
mbed_official 235:685d5f11838f 4608 assert_param(IS_TIM_OCIDLE_STATE(OC_Config->OCIdleState));
mbed_official 235:685d5f11838f 4609
mbed_official 235:685d5f11838f 4610 /* Reset the Output N Polarity level */
mbed_official 235:685d5f11838f 4611 tmpccer &= ~TIM_CCER_CC2NP;
mbed_official 235:685d5f11838f 4612 /* Set the Output N Polarity */
mbed_official 235:685d5f11838f 4613 tmpccer |= (OC_Config->OCNPolarity << 4);
mbed_official 235:685d5f11838f 4614 /* Reset the Output N State */
mbed_official 235:685d5f11838f 4615 tmpccer &= ~TIM_CCER_CC2NE;
mbed_official 235:685d5f11838f 4616
mbed_official 235:685d5f11838f 4617 /* Reset the Output Compare and Output Compare N IDLE State */
mbed_official 235:685d5f11838f 4618 tmpcr2 &= ~TIM_CR2_OIS2;
mbed_official 235:685d5f11838f 4619 tmpcr2 &= ~TIM_CR2_OIS2N;
mbed_official 235:685d5f11838f 4620 /* Set the Output Idle state */
mbed_official 235:685d5f11838f 4621 tmpcr2 |= (OC_Config->OCIdleState << 2);
mbed_official 235:685d5f11838f 4622 /* Set the Output N Idle state */
mbed_official 235:685d5f11838f 4623 tmpcr2 |= (OC_Config->OCNIdleState << 2);
mbed_official 235:685d5f11838f 4624 }
mbed_official 235:685d5f11838f 4625 /* Write to TIMx CR2 */
mbed_official 235:685d5f11838f 4626 TIMx->CR2 = tmpcr2;
mbed_official 235:685d5f11838f 4627
mbed_official 235:685d5f11838f 4628 /* Write to TIMx CCMR1 */
mbed_official 235:685d5f11838f 4629 TIMx->CCMR1 = tmpccmrx;
mbed_official 235:685d5f11838f 4630
mbed_official 235:685d5f11838f 4631 /* Set the Capture Compare Register value */
mbed_official 235:685d5f11838f 4632 TIMx->CCR2 = OC_Config->Pulse;
mbed_official 235:685d5f11838f 4633
mbed_official 235:685d5f11838f 4634 /* Write to TIMx CCER */
mbed_official 235:685d5f11838f 4635 TIMx->CCER = tmpccer;
mbed_official 235:685d5f11838f 4636 }
mbed_official 235:685d5f11838f 4637
mbed_official 235:685d5f11838f 4638 /**
mbed_official 235:685d5f11838f 4639 * @brief Time Ouput Compare 3 configuration
mbed_official 235:685d5f11838f 4640 * @param TIMx to select the TIM peripheral
mbed_official 235:685d5f11838f 4641 * @param OC_Config: The ouput configuration structure
mbed_official 235:685d5f11838f 4642 * @retval None
mbed_official 235:685d5f11838f 4643 */
mbed_official 235:685d5f11838f 4644 static void TIM_OC3_SetConfig(TIM_TypeDef *TIMx, TIM_OC_InitTypeDef *OC_Config)
mbed_official 235:685d5f11838f 4645 {
mbed_official 235:685d5f11838f 4646 uint32_t tmpccmrx = 0;
mbed_official 235:685d5f11838f 4647 uint32_t tmpccer = 0;
mbed_official 235:685d5f11838f 4648 uint32_t tmpcr2 = 0;
mbed_official 235:685d5f11838f 4649
mbed_official 235:685d5f11838f 4650 /* Disable the Channel 3: Reset the CC2E Bit */
mbed_official 235:685d5f11838f 4651 TIMx->CCER &= ~TIM_CCER_CC3E;
mbed_official 235:685d5f11838f 4652
mbed_official 235:685d5f11838f 4653 /* Get the TIMx CCER register value */
mbed_official 235:685d5f11838f 4654 tmpccer = TIMx->CCER;
mbed_official 235:685d5f11838f 4655 /* Get the TIMx CR2 register value */
mbed_official 235:685d5f11838f 4656 tmpcr2 = TIMx->CR2;
mbed_official 235:685d5f11838f 4657
mbed_official 235:685d5f11838f 4658 /* Get the TIMx CCMR2 register value */
mbed_official 235:685d5f11838f 4659 tmpccmrx = TIMx->CCMR2;
mbed_official 235:685d5f11838f 4660
mbed_official 235:685d5f11838f 4661 /* Reset the Output Compare mode and Capture/Compare selection Bits */
mbed_official 235:685d5f11838f 4662 tmpccmrx &= ~TIM_CCMR2_OC3M;
mbed_official 235:685d5f11838f 4663 tmpccmrx &= ~TIM_CCMR2_CC3S;
mbed_official 235:685d5f11838f 4664 /* Select the Output Compare Mode */
mbed_official 235:685d5f11838f 4665 tmpccmrx |= OC_Config->OCMode;
mbed_official 235:685d5f11838f 4666
mbed_official 235:685d5f11838f 4667 /* Reset the Output Polarity level */
mbed_official 235:685d5f11838f 4668 tmpccer &= ~TIM_CCER_CC3P;
mbed_official 235:685d5f11838f 4669 /* Set the Output Compare Polarity */
mbed_official 235:685d5f11838f 4670 tmpccer |= (OC_Config->OCPolarity << 8);
mbed_official 235:685d5f11838f 4671
mbed_official 235:685d5f11838f 4672 if(IS_TIM_ADVANCED_INSTANCE(TIMx) != RESET)
mbed_official 235:685d5f11838f 4673 {
mbed_official 235:685d5f11838f 4674 assert_param(IS_TIM_OCN_POLARITY(OC_Config->OCNPolarity));
mbed_official 235:685d5f11838f 4675 assert_param(IS_TIM_OCNIDLE_STATE(OC_Config->OCNIdleState));
mbed_official 235:685d5f11838f 4676 assert_param(IS_TIM_OCIDLE_STATE(OC_Config->OCIdleState));
mbed_official 235:685d5f11838f 4677
mbed_official 235:685d5f11838f 4678 /* Reset the Output N Polarity level */
mbed_official 235:685d5f11838f 4679 tmpccer &= ~TIM_CCER_CC3NP;
mbed_official 235:685d5f11838f 4680 /* Set the Output N Polarity */
mbed_official 235:685d5f11838f 4681 tmpccer |= (OC_Config->OCNPolarity << 8);
mbed_official 235:685d5f11838f 4682 /* Reset the Output N State */
mbed_official 235:685d5f11838f 4683 tmpccer &= ~TIM_CCER_CC3NE;
mbed_official 235:685d5f11838f 4684
mbed_official 235:685d5f11838f 4685 /* Reset the Output Compare and Output Compare N IDLE State */
mbed_official 235:685d5f11838f 4686 tmpcr2 &= ~TIM_CR2_OIS3;
mbed_official 235:685d5f11838f 4687 tmpcr2 &= ~TIM_CR2_OIS3N;
mbed_official 235:685d5f11838f 4688 /* Set the Output Idle state */
mbed_official 235:685d5f11838f 4689 tmpcr2 |= (OC_Config->OCIdleState << 4);
mbed_official 235:685d5f11838f 4690 /* Set the Output N Idle state */
mbed_official 235:685d5f11838f 4691 tmpcr2 |= (OC_Config->OCNIdleState << 4);
mbed_official 235:685d5f11838f 4692 }
mbed_official 235:685d5f11838f 4693 /* Write to TIMx CR2 */
mbed_official 235:685d5f11838f 4694 TIMx->CR2 = tmpcr2;
mbed_official 235:685d5f11838f 4695
mbed_official 235:685d5f11838f 4696 /* Write to TIMx CCMR2 */
mbed_official 235:685d5f11838f 4697 TIMx->CCMR2 = tmpccmrx;
mbed_official 235:685d5f11838f 4698
mbed_official 235:685d5f11838f 4699 /* Set the Capture Compare Register value */
mbed_official 235:685d5f11838f 4700 TIMx->CCR3 = OC_Config->Pulse;
mbed_official 235:685d5f11838f 4701
mbed_official 235:685d5f11838f 4702 /* Write to TIMx CCER */
mbed_official 235:685d5f11838f 4703 TIMx->CCER = tmpccer;
mbed_official 235:685d5f11838f 4704 }
mbed_official 235:685d5f11838f 4705
mbed_official 235:685d5f11838f 4706 /**
mbed_official 235:685d5f11838f 4707 * @brief Time Ouput Compare 4 configuration
mbed_official 235:685d5f11838f 4708 * @param TIMx to select the TIM peripheral
mbed_official 235:685d5f11838f 4709 * @param OC_Config: The ouput configuration structure
mbed_official 235:685d5f11838f 4710 * @retval None
mbed_official 235:685d5f11838f 4711 */
mbed_official 235:685d5f11838f 4712 static void TIM_OC4_SetConfig(TIM_TypeDef *TIMx, TIM_OC_InitTypeDef *OC_Config)
mbed_official 235:685d5f11838f 4713 {
mbed_official 235:685d5f11838f 4714 uint32_t tmpccmrx = 0;
mbed_official 235:685d5f11838f 4715 uint32_t tmpccer = 0;
mbed_official 235:685d5f11838f 4716 uint32_t tmpcr2 = 0;
mbed_official 235:685d5f11838f 4717
mbed_official 235:685d5f11838f 4718 /* Disable the Channel 4: Reset the CC4E Bit */
mbed_official 235:685d5f11838f 4719 TIMx->CCER &= ~TIM_CCER_CC4E;
mbed_official 235:685d5f11838f 4720
mbed_official 235:685d5f11838f 4721 /* Get the TIMx CCER register value */
mbed_official 235:685d5f11838f 4722 tmpccer = TIMx->CCER;
mbed_official 235:685d5f11838f 4723 /* Get the TIMx CR2 register value */
mbed_official 235:685d5f11838f 4724 tmpcr2 = TIMx->CR2;
mbed_official 235:685d5f11838f 4725
mbed_official 235:685d5f11838f 4726 /* Get the TIMx CCMR2 register value */
mbed_official 235:685d5f11838f 4727 tmpccmrx = TIMx->CCMR2;
mbed_official 235:685d5f11838f 4728
mbed_official 235:685d5f11838f 4729 /* Reset the Output Compare mode and Capture/Compare selection Bits */
mbed_official 235:685d5f11838f 4730 tmpccmrx &= ~TIM_CCMR2_OC4M;
mbed_official 235:685d5f11838f 4731 tmpccmrx &= ~TIM_CCMR2_CC4S;
mbed_official 235:685d5f11838f 4732
mbed_official 235:685d5f11838f 4733 /* Select the Output Compare Mode */
mbed_official 235:685d5f11838f 4734 tmpccmrx |= (OC_Config->OCMode << 8);
mbed_official 235:685d5f11838f 4735
mbed_official 235:685d5f11838f 4736 /* Reset the Output Polarity level */
mbed_official 235:685d5f11838f 4737 tmpccer &= ~TIM_CCER_CC4P;
mbed_official 235:685d5f11838f 4738 /* Set the Output Compare Polarity */
mbed_official 235:685d5f11838f 4739 tmpccer |= (OC_Config->OCPolarity << 12);
mbed_official 235:685d5f11838f 4740
mbed_official 235:685d5f11838f 4741 /*if((TIMx == TIM1) || (TIMx == TIM8))*/
mbed_official 235:685d5f11838f 4742 if(IS_TIM_ADVANCED_INSTANCE(TIMx) != RESET)
mbed_official 235:685d5f11838f 4743 {
mbed_official 235:685d5f11838f 4744 assert_param(IS_TIM_OCIDLE_STATE(OC_Config->OCIdleState));
mbed_official 235:685d5f11838f 4745 /* Reset the Output Compare IDLE State */
mbed_official 235:685d5f11838f 4746 tmpcr2 &= ~TIM_CR2_OIS4;
mbed_official 235:685d5f11838f 4747 /* Set the Output Idle state */
mbed_official 235:685d5f11838f 4748 tmpcr2 |= (OC_Config->OCIdleState << 6);
mbed_official 235:685d5f11838f 4749 }
mbed_official 235:685d5f11838f 4750 /* Write to TIMx CR2 */
mbed_official 235:685d5f11838f 4751 TIMx->CR2 = tmpcr2;
mbed_official 235:685d5f11838f 4752
mbed_official 235:685d5f11838f 4753 /* Write to TIMx CCMR2 */
mbed_official 235:685d5f11838f 4754 TIMx->CCMR2 = tmpccmrx;
mbed_official 235:685d5f11838f 4755
mbed_official 235:685d5f11838f 4756 /* Set the Capture Compare Register value */
mbed_official 235:685d5f11838f 4757 TIMx->CCR4 = OC_Config->Pulse;
mbed_official 235:685d5f11838f 4758
mbed_official 235:685d5f11838f 4759 /* Write to TIMx CCER */
mbed_official 235:685d5f11838f 4760 TIMx->CCER = tmpccer;
mbed_official 235:685d5f11838f 4761 }
mbed_official 235:685d5f11838f 4762
mbed_official 235:685d5f11838f 4763 /**
mbed_official 235:685d5f11838f 4764 * @brief Configure the TI1 as Input.
mbed_official 235:685d5f11838f 4765 * @param TIMx to select the TIM peripheral.
mbed_official 235:685d5f11838f 4766 * @param TIM_ICPolarity : The Input Polarity.
mbed_official 235:685d5f11838f 4767 * This parameter can be one of the following values:
mbed_official 235:685d5f11838f 4768 * @arg TIM_ICPolarity_Rising
mbed_official 235:685d5f11838f 4769 * @arg TIM_ICPolarity_Falling
mbed_official 235:685d5f11838f 4770 * @arg TIM_ICPolarity_BothEdge
mbed_official 235:685d5f11838f 4771 * @param TIM_ICSelection: specifies the input to be used.
mbed_official 235:685d5f11838f 4772 * This parameter can be one of the following values:
mbed_official 235:685d5f11838f 4773 * @arg TIM_ICSelection_DirectTI: TIM Input 1 is selected to be connected to IC1.
mbed_official 235:685d5f11838f 4774 * @arg TIM_ICSelection_IndirectTI: TIM Input 1 is selected to be connected to IC2.
mbed_official 235:685d5f11838f 4775 * @arg TIM_ICSelection_TRC: TIM Input 1 is selected to be connected to TRC.
mbed_official 235:685d5f11838f 4776 * @param TIM_ICFilter: Specifies the Input Capture Filter.
mbed_official 235:685d5f11838f 4777 * This parameter must be a value between 0x00 and 0x0F.
mbed_official 235:685d5f11838f 4778 * @retval None
mbed_official 235:685d5f11838f 4779 */
mbed_official 235:685d5f11838f 4780 void TIM_TI1_SetConfig(TIM_TypeDef *TIMx, uint32_t TIM_ICPolarity, uint32_t TIM_ICSelection,
mbed_official 235:685d5f11838f 4781 uint32_t TIM_ICFilter)
mbed_official 235:685d5f11838f 4782 {
mbed_official 235:685d5f11838f 4783 uint32_t tmpccmr1 = 0;
mbed_official 235:685d5f11838f 4784 uint32_t tmpccer = 0;
mbed_official 235:685d5f11838f 4785
mbed_official 235:685d5f11838f 4786 /* Disable the Channel 1: Reset the CC1E Bit */
mbed_official 235:685d5f11838f 4787 TIMx->CCER &= ~TIM_CCER_CC1E;
mbed_official 235:685d5f11838f 4788 tmpccmr1 = TIMx->CCMR1;
mbed_official 235:685d5f11838f 4789 tmpccer = TIMx->CCER;
mbed_official 235:685d5f11838f 4790
mbed_official 235:685d5f11838f 4791 /* Select the Input */
mbed_official 235:685d5f11838f 4792 if(IS_TIM_CC2_INSTANCE(TIMx) != RESET)
mbed_official 235:685d5f11838f 4793 {
mbed_official 235:685d5f11838f 4794 tmpccmr1 &= ~TIM_CCMR1_CC1S;
mbed_official 235:685d5f11838f 4795 tmpccmr1 |= TIM_ICSelection;
mbed_official 235:685d5f11838f 4796 }
mbed_official 235:685d5f11838f 4797 else
mbed_official 235:685d5f11838f 4798 {
mbed_official 235:685d5f11838f 4799 tmpccmr1 &= ~TIM_CCMR1_CC1S;
mbed_official 235:685d5f11838f 4800 tmpccmr1 |= TIM_CCMR1_CC1S_0;
mbed_official 235:685d5f11838f 4801 }
mbed_official 235:685d5f11838f 4802
mbed_official 235:685d5f11838f 4803 /* Set the filter */
mbed_official 235:685d5f11838f 4804 tmpccmr1 &= ~TIM_CCMR1_IC1F;
mbed_official 235:685d5f11838f 4805 tmpccmr1 |= (TIM_ICFilter << 4);
mbed_official 235:685d5f11838f 4806
mbed_official 235:685d5f11838f 4807 /* Select the Polarity and set the CC1E Bit */
mbed_official 235:685d5f11838f 4808 tmpccer &= ~(TIM_CCER_CC1P | TIM_CCER_CC1NP);
mbed_official 235:685d5f11838f 4809 tmpccer |= TIM_ICPolarity;
mbed_official 235:685d5f11838f 4810
mbed_official 235:685d5f11838f 4811 /* Write to TIMx CCMR1 and CCER registers */
mbed_official 235:685d5f11838f 4812 TIMx->CCMR1 = tmpccmr1;
mbed_official 235:685d5f11838f 4813 TIMx->CCER = tmpccer;
mbed_official 235:685d5f11838f 4814 }
mbed_official 235:685d5f11838f 4815
mbed_official 235:685d5f11838f 4816 /**
mbed_official 235:685d5f11838f 4817 * @brief Configure the Polarity and Filter for TI1.
mbed_official 235:685d5f11838f 4818 * @param TIMx to select the TIM peripheral.
mbed_official 235:685d5f11838f 4819 * @param TIM_ICPolarity : The Input Polarity.
mbed_official 235:685d5f11838f 4820 * This parameter can be one of the following values:
mbed_official 235:685d5f11838f 4821 * @arg TIM_ICPolarity_Rising
mbed_official 235:685d5f11838f 4822 * @arg TIM_ICPolarity_Falling
mbed_official 235:685d5f11838f 4823 * @arg TIM_ICPolarity_BothEdge
mbed_official 235:685d5f11838f 4824 * @param TIM_ICFilter: Specifies the Input Capture Filter.
mbed_official 235:685d5f11838f 4825 * This parameter must be a value between 0x00 and 0x0F.
mbed_official 235:685d5f11838f 4826 * @retval None
mbed_official 235:685d5f11838f 4827 */
mbed_official 235:685d5f11838f 4828 static void TIM_TI1_ConfigInputStage(TIM_TypeDef *TIMx, uint32_t TIM_ICPolarity, uint32_t TIM_ICFilter)
mbed_official 235:685d5f11838f 4829 {
mbed_official 235:685d5f11838f 4830 uint32_t tmpccmr1 = 0;
mbed_official 235:685d5f11838f 4831 uint32_t tmpccer = 0;
mbed_official 235:685d5f11838f 4832
mbed_official 235:685d5f11838f 4833 /* Disable the Channel 1: Reset the CC1E Bit */
mbed_official 235:685d5f11838f 4834 tmpccer = TIMx->CCER;
mbed_official 235:685d5f11838f 4835 TIMx->CCER &= ~TIM_CCER_CC1E;
mbed_official 235:685d5f11838f 4836 tmpccmr1 = TIMx->CCMR1;
mbed_official 235:685d5f11838f 4837
mbed_official 235:685d5f11838f 4838 /* Set the filter */
mbed_official 235:685d5f11838f 4839 tmpccmr1 &= ~TIM_CCMR1_IC1F;
mbed_official 235:685d5f11838f 4840 tmpccmr1 |= (TIM_ICFilter << 4);
mbed_official 235:685d5f11838f 4841
mbed_official 235:685d5f11838f 4842 /* Select the Polarity and set the CC1E Bit */
mbed_official 235:685d5f11838f 4843 tmpccer &= ~(TIM_CCER_CC1P | TIM_CCER_CC1NP);
mbed_official 235:685d5f11838f 4844 tmpccer |= TIM_ICPolarity;
mbed_official 235:685d5f11838f 4845
mbed_official 235:685d5f11838f 4846 /* Write to TIMx CCMR1 and CCER registers */
mbed_official 235:685d5f11838f 4847 TIMx->CCMR1 = tmpccmr1;
mbed_official 235:685d5f11838f 4848 TIMx->CCER = tmpccer;
mbed_official 235:685d5f11838f 4849 }
mbed_official 235:685d5f11838f 4850
mbed_official 235:685d5f11838f 4851 /**
mbed_official 235:685d5f11838f 4852 * @brief Configure the TI2 as Input.
mbed_official 235:685d5f11838f 4853 * @param TIMx to select the TIM peripheral
mbed_official 235:685d5f11838f 4854 * @param TIM_ICPolarity : The Input Polarity.
mbed_official 235:685d5f11838f 4855 * This parameter can be one of the following values:
mbed_official 235:685d5f11838f 4856 * @arg TIM_ICPolarity_Rising
mbed_official 235:685d5f11838f 4857 * @arg TIM_ICPolarity_Falling
mbed_official 235:685d5f11838f 4858 * @arg TIM_ICPolarity_BothEdge
mbed_official 235:685d5f11838f 4859 * @param TIM_ICSelection: specifies the input to be used.
mbed_official 235:685d5f11838f 4860 * This parameter can be one of the following values:
mbed_official 235:685d5f11838f 4861 * @arg TIM_ICSelection_DirectTI: TIM Input 2 is selected to be connected to IC2.
mbed_official 235:685d5f11838f 4862 * @arg TIM_ICSelection_IndirectTI: TIM Input 2 is selected to be connected to IC1.
mbed_official 235:685d5f11838f 4863 * @arg TIM_ICSelection_TRC: TIM Input 2 is selected to be connected to TRC.
mbed_official 235:685d5f11838f 4864 * @param TIM_ICFilter: Specifies the Input Capture Filter.
mbed_official 235:685d5f11838f 4865 * This parameter must be a value between 0x00 and 0x0F.
mbed_official 235:685d5f11838f 4866 * @retval None
mbed_official 235:685d5f11838f 4867 */
mbed_official 235:685d5f11838f 4868 static void TIM_TI2_SetConfig(TIM_TypeDef *TIMx, uint32_t TIM_ICPolarity, uint32_t TIM_ICSelection,
mbed_official 235:685d5f11838f 4869 uint32_t TIM_ICFilter)
mbed_official 235:685d5f11838f 4870 {
mbed_official 235:685d5f11838f 4871 uint32_t tmpccmr1 = 0;
mbed_official 235:685d5f11838f 4872 uint32_t tmpccer = 0;
mbed_official 235:685d5f11838f 4873
mbed_official 235:685d5f11838f 4874 /* Disable the Channel 2: Reset the CC2E Bit */
mbed_official 235:685d5f11838f 4875 TIMx->CCER &= ~TIM_CCER_CC2E;
mbed_official 235:685d5f11838f 4876 tmpccmr1 = TIMx->CCMR1;
mbed_official 235:685d5f11838f 4877 tmpccer = TIMx->CCER;
mbed_official 235:685d5f11838f 4878
mbed_official 235:685d5f11838f 4879 /* Select the Input */
mbed_official 235:685d5f11838f 4880 tmpccmr1 &= ~TIM_CCMR1_CC2S;
mbed_official 235:685d5f11838f 4881 tmpccmr1 |= (TIM_ICSelection << 8);
mbed_official 235:685d5f11838f 4882
mbed_official 235:685d5f11838f 4883 /* Set the filter */
mbed_official 235:685d5f11838f 4884 tmpccmr1 &= ~TIM_CCMR1_IC2F;
mbed_official 235:685d5f11838f 4885 tmpccmr1 |= (TIM_ICFilter << 12);
mbed_official 235:685d5f11838f 4886
mbed_official 235:685d5f11838f 4887 /* Select the Polarity and set the CC2E Bit */
mbed_official 235:685d5f11838f 4888 tmpccer &= ~(TIM_CCER_CC2P | TIM_CCER_CC2NP);
mbed_official 235:685d5f11838f 4889 tmpccer |= (TIM_ICPolarity << 4);
mbed_official 235:685d5f11838f 4890
mbed_official 235:685d5f11838f 4891 /* Write to TIMx CCMR1 and CCER registers */
mbed_official 235:685d5f11838f 4892 TIMx->CCMR1 = tmpccmr1 ;
mbed_official 235:685d5f11838f 4893 TIMx->CCER = tmpccer;
mbed_official 235:685d5f11838f 4894 }
mbed_official 235:685d5f11838f 4895
mbed_official 235:685d5f11838f 4896 /**
mbed_official 235:685d5f11838f 4897 * @brief Configure the Polarity and Filter for TI2.
mbed_official 235:685d5f11838f 4898 * @param TIMx to select the TIM peripheral.
mbed_official 235:685d5f11838f 4899 * @param TIM_ICPolarity : The Input Polarity.
mbed_official 235:685d5f11838f 4900 * This parameter can be one of the following values:
mbed_official 235:685d5f11838f 4901 * @arg TIM_ICPolarity_Rising
mbed_official 235:685d5f11838f 4902 * @arg TIM_ICPolarity_Falling
mbed_official 235:685d5f11838f 4903 * @arg TIM_ICPolarity_BothEdge
mbed_official 235:685d5f11838f 4904 * @param TIM_ICFilter: Specifies the Input Capture Filter.
mbed_official 235:685d5f11838f 4905 * This parameter must be a value between 0x00 and 0x0F.
mbed_official 235:685d5f11838f 4906 * @retval None
mbed_official 235:685d5f11838f 4907 */
mbed_official 235:685d5f11838f 4908 static void TIM_TI2_ConfigInputStage(TIM_TypeDef *TIMx, uint32_t TIM_ICPolarity, uint32_t TIM_ICFilter)
mbed_official 235:685d5f11838f 4909 {
mbed_official 235:685d5f11838f 4910 uint32_t tmpccmr1 = 0;
mbed_official 235:685d5f11838f 4911 uint32_t tmpccer = 0;
mbed_official 235:685d5f11838f 4912
mbed_official 235:685d5f11838f 4913 /* Disable the Channel 2: Reset the CC2E Bit */
mbed_official 235:685d5f11838f 4914 TIMx->CCER &= ~TIM_CCER_CC2E;
mbed_official 235:685d5f11838f 4915 tmpccmr1 = TIMx->CCMR1;
mbed_official 235:685d5f11838f 4916 tmpccer = TIMx->CCER;
mbed_official 235:685d5f11838f 4917
mbed_official 235:685d5f11838f 4918 /* Set the filter */
mbed_official 235:685d5f11838f 4919 tmpccmr1 &= ~TIM_CCMR1_IC2F;
mbed_official 235:685d5f11838f 4920 tmpccmr1 |= (TIM_ICFilter << 12);
mbed_official 235:685d5f11838f 4921
mbed_official 235:685d5f11838f 4922 /* Select the Polarity and set the CC2E Bit */
mbed_official 235:685d5f11838f 4923 tmpccer &= ~(TIM_CCER_CC2P | TIM_CCER_CC2NP);
mbed_official 235:685d5f11838f 4924 tmpccer |= (TIM_ICPolarity << 4);
mbed_official 235:685d5f11838f 4925
mbed_official 235:685d5f11838f 4926 /* Write to TIMx CCMR1 and CCER registers */
mbed_official 235:685d5f11838f 4927 TIMx->CCMR1 = tmpccmr1 ;
mbed_official 235:685d5f11838f 4928 TIMx->CCER = tmpccer;
mbed_official 235:685d5f11838f 4929 }
mbed_official 235:685d5f11838f 4930
mbed_official 235:685d5f11838f 4931 /**
mbed_official 235:685d5f11838f 4932 * @brief Configure the TI3 as Input.
mbed_official 235:685d5f11838f 4933 * @param TIMx to select the TIM peripheral
mbed_official 235:685d5f11838f 4934 * @param TIM_ICPolarity : The Input Polarity.
mbed_official 235:685d5f11838f 4935 * This parameter can be one of the following values:
mbed_official 235:685d5f11838f 4936 * @arg TIM_ICPolarity_Rising
mbed_official 235:685d5f11838f 4937 * @arg TIM_ICPolarity_Falling
mbed_official 235:685d5f11838f 4938 * @arg TIM_ICPolarity_BothEdge
mbed_official 235:685d5f11838f 4939 * @param TIM_ICSelection: specifies the input to be used.
mbed_official 235:685d5f11838f 4940 * This parameter can be one of the following values:
mbed_official 235:685d5f11838f 4941 * @arg TIM_ICSelection_DirectTI: TIM Input 3 is selected to be connected to IC3.
mbed_official 235:685d5f11838f 4942 * @arg TIM_ICSelection_IndirectTI: TIM Input 3 is selected to be connected to IC4.
mbed_official 235:685d5f11838f 4943 * @arg TIM_ICSelection_TRC: TIM Input 3 is selected to be connected to TRC.
mbed_official 235:685d5f11838f 4944 * @param TIM_ICFilter: Specifies the Input Capture Filter.
mbed_official 235:685d5f11838f 4945 * This parameter must be a value between 0x00 and 0x0F.
mbed_official 235:685d5f11838f 4946 * @retval None
mbed_official 235:685d5f11838f 4947 */
mbed_official 235:685d5f11838f 4948 static void TIM_TI3_SetConfig(TIM_TypeDef *TIMx, uint32_t TIM_ICPolarity, uint32_t TIM_ICSelection,
mbed_official 235:685d5f11838f 4949 uint32_t TIM_ICFilter)
mbed_official 235:685d5f11838f 4950 {
mbed_official 235:685d5f11838f 4951 uint32_t tmpccmr2 = 0;
mbed_official 235:685d5f11838f 4952 uint32_t tmpccer = 0;
mbed_official 235:685d5f11838f 4953
mbed_official 235:685d5f11838f 4954 /* Disable the Channel 3: Reset the CC3E Bit */
mbed_official 235:685d5f11838f 4955 TIMx->CCER &= ~TIM_CCER_CC3E;
mbed_official 235:685d5f11838f 4956 tmpccmr2 = TIMx->CCMR2;
mbed_official 235:685d5f11838f 4957 tmpccer = TIMx->CCER;
mbed_official 235:685d5f11838f 4958
mbed_official 235:685d5f11838f 4959 /* Select the Input */
mbed_official 235:685d5f11838f 4960 tmpccmr2 &= ~TIM_CCMR2_CC3S;
mbed_official 235:685d5f11838f 4961 tmpccmr2 |= TIM_ICSelection;
mbed_official 235:685d5f11838f 4962
mbed_official 235:685d5f11838f 4963 /* Set the filter */
mbed_official 235:685d5f11838f 4964 tmpccmr2 &= ~TIM_CCMR2_IC3F;
mbed_official 235:685d5f11838f 4965 tmpccmr2 |= (TIM_ICFilter << 4);
mbed_official 235:685d5f11838f 4966
mbed_official 235:685d5f11838f 4967 /* Select the Polarity and set the CC3E Bit */
mbed_official 235:685d5f11838f 4968 tmpccer &= ~(TIM_CCER_CC3P | TIM_CCER_CC3NP);
mbed_official 235:685d5f11838f 4969 tmpccer |= (TIM_ICPolarity << 8);
mbed_official 235:685d5f11838f 4970
mbed_official 235:685d5f11838f 4971 /* Write to TIMx CCMR2 and CCER registers */
mbed_official 235:685d5f11838f 4972 TIMx->CCMR2 = tmpccmr2;
mbed_official 235:685d5f11838f 4973 TIMx->CCER = tmpccer;
mbed_official 235:685d5f11838f 4974 }
mbed_official 235:685d5f11838f 4975
mbed_official 235:685d5f11838f 4976 /**
mbed_official 235:685d5f11838f 4977 * @brief Configure the TI4 as Input.
mbed_official 235:685d5f11838f 4978 * @param TIMx to select the TIM peripheral
mbed_official 235:685d5f11838f 4979 * @param TIM_ICPolarity : The Input Polarity.
mbed_official 235:685d5f11838f 4980 * This parameter can be one of the following values:
mbed_official 235:685d5f11838f 4981 * @arg TIM_ICPolarity_Rising
mbed_official 235:685d5f11838f 4982 * @arg TIM_ICPolarity_Falling
mbed_official 235:685d5f11838f 4983 * @arg TIM_ICPolarity_BothEdge
mbed_official 235:685d5f11838f 4984 * @param TIM_ICSelection: specifies the input to be used.
mbed_official 235:685d5f11838f 4985 * This parameter can be one of the following values:
mbed_official 235:685d5f11838f 4986 * @arg TIM_ICSelection_DirectTI: TIM Input 4 is selected to be connected to IC4.
mbed_official 235:685d5f11838f 4987 * @arg TIM_ICSelection_IndirectTI: TIM Input 4 is selected to be connected to IC3.
mbed_official 235:685d5f11838f 4988 * @arg TIM_ICSelection_TRC: TIM Input 4 is selected to be connected to TRC.
mbed_official 235:685d5f11838f 4989 * @param TIM_ICFilter: Specifies the Input Capture Filter.
mbed_official 235:685d5f11838f 4990 * This parameter must be a value between 0x00 and 0x0F.
mbed_official 235:685d5f11838f 4991 * @retval None
mbed_official 235:685d5f11838f 4992 */
mbed_official 235:685d5f11838f 4993 static void TIM_TI4_SetConfig(TIM_TypeDef *TIMx, uint32_t TIM_ICPolarity, uint32_t TIM_ICSelection,
mbed_official 235:685d5f11838f 4994 uint32_t TIM_ICFilter)
mbed_official 235:685d5f11838f 4995 {
mbed_official 235:685d5f11838f 4996 uint32_t tmpccmr2 = 0;
mbed_official 235:685d5f11838f 4997 uint32_t tmpccer = 0;
mbed_official 235:685d5f11838f 4998
mbed_official 235:685d5f11838f 4999 /* Disable the Channel 4: Reset the CC4E Bit */
mbed_official 235:685d5f11838f 5000 TIMx->CCER &= ~TIM_CCER_CC4E;
mbed_official 235:685d5f11838f 5001 tmpccmr2 = TIMx->CCMR2;
mbed_official 235:685d5f11838f 5002 tmpccer = TIMx->CCER;
mbed_official 235:685d5f11838f 5003
mbed_official 235:685d5f11838f 5004 /* Select the Input */
mbed_official 235:685d5f11838f 5005 tmpccmr2 &= ~TIM_CCMR2_CC4S;
mbed_official 235:685d5f11838f 5006 tmpccmr2 |= (TIM_ICSelection << 8);
mbed_official 235:685d5f11838f 5007
mbed_official 235:685d5f11838f 5008 /* Set the filter */
mbed_official 235:685d5f11838f 5009 tmpccmr2 &= ~TIM_CCMR2_IC4F;
mbed_official 235:685d5f11838f 5010 tmpccmr2 |= (TIM_ICFilter << 12);
mbed_official 235:685d5f11838f 5011
mbed_official 235:685d5f11838f 5012 /* Select the Polarity and set the CC4E Bit */
mbed_official 235:685d5f11838f 5013 tmpccer &= ~(TIM_CCER_CC4P | TIM_CCER_CC4NP);
mbed_official 235:685d5f11838f 5014 tmpccer |= (TIM_ICPolarity << 12);
mbed_official 235:685d5f11838f 5015
mbed_official 235:685d5f11838f 5016 /* Write to TIMx CCMR2 and CCER registers */
mbed_official 235:685d5f11838f 5017 TIMx->CCMR2 = tmpccmr2;
mbed_official 235:685d5f11838f 5018 TIMx->CCER = tmpccer ;
mbed_official 235:685d5f11838f 5019 }
mbed_official 235:685d5f11838f 5020
mbed_official 235:685d5f11838f 5021 /**
mbed_official 235:685d5f11838f 5022 * @brief Selects the Input Trigger source
mbed_official 235:685d5f11838f 5023 * @param TIMx to select the TIM peripheral
mbed_official 235:685d5f11838f 5024 * @param InputTriggerSource: The Input Trigger source.
mbed_official 235:685d5f11838f 5025 * This parameter can be one of the following values:
mbed_official 235:685d5f11838f 5026 * @arg TIM_TS_ITR0: Internal Trigger 0
mbed_official 235:685d5f11838f 5027 * @arg TIM_TS_ITR1: Internal Trigger 1
mbed_official 235:685d5f11838f 5028 * @arg TIM_TS_ITR2: Internal Trigger 2
mbed_official 235:685d5f11838f 5029 * @arg TIM_TS_ITR3: Internal Trigger 3
mbed_official 235:685d5f11838f 5030 * @arg TIM_TS_TI1F_ED: TI1 Edge Detector
mbed_official 235:685d5f11838f 5031 * @arg TIM_TS_TI1FP1: Filtered Timer Input 1
mbed_official 235:685d5f11838f 5032 * @arg TIM_TS_TI2FP2: Filtered Timer Input 2
mbed_official 235:685d5f11838f 5033 * @arg TIM_TS_ETRF: External Trigger input
mbed_official 235:685d5f11838f 5034 * @retval None
mbed_official 235:685d5f11838f 5035 */
mbed_official 235:685d5f11838f 5036 static void TIM_ITRx_SetConfig(TIM_TypeDef *TIMx, uint16_t TIM_ITRx)
mbed_official 235:685d5f11838f 5037 {
mbed_official 235:685d5f11838f 5038 uint32_t tmpsmcr = 0;
mbed_official 235:685d5f11838f 5039
mbed_official 235:685d5f11838f 5040 /* Get the TIMx SMCR register value */
mbed_official 235:685d5f11838f 5041 tmpsmcr = TIMx->SMCR;
mbed_official 235:685d5f11838f 5042 /* Reset the TS Bits */
mbed_official 235:685d5f11838f 5043 tmpsmcr &= ~TIM_SMCR_TS;
mbed_official 235:685d5f11838f 5044 /* Set the Input Trigger source and the slave mode*/
mbed_official 235:685d5f11838f 5045 tmpsmcr |= TIM_ITRx | TIM_SLAVEMODE_EXTERNAL1;
mbed_official 235:685d5f11838f 5046 /* Write to TIMx SMCR */
mbed_official 235:685d5f11838f 5047 TIMx->SMCR = tmpsmcr;
mbed_official 235:685d5f11838f 5048 }
mbed_official 235:685d5f11838f 5049 /**
mbed_official 235:685d5f11838f 5050 * @brief Configures the TIMx External Trigger (ETR).
mbed_official 235:685d5f11838f 5051 * @param TIMx to select the TIM peripheral
mbed_official 235:685d5f11838f 5052 * @param TIM_ExtTRGPrescaler: The external Trigger Prescaler.
mbed_official 235:685d5f11838f 5053 * This parameter can be one of the following values:
mbed_official 235:685d5f11838f 5054 * @arg TIM_ExtTRGPSC_DIV1: ETRP Prescaler OFF.
mbed_official 235:685d5f11838f 5055 * @arg TIM_ExtTRGPSC_DIV2: ETRP frequency divided by 2.
mbed_official 235:685d5f11838f 5056 * @arg TIM_ExtTRGPSC_DIV4: ETRP frequency divided by 4.
mbed_official 235:685d5f11838f 5057 * @arg TIM_ExtTRGPSC_DIV8: ETRP frequency divided by 8.
mbed_official 235:685d5f11838f 5058 * @param TIM_ExtTRGPolarity: The external Trigger Polarity.
mbed_official 235:685d5f11838f 5059 * This parameter can be one of the following values:
mbed_official 235:685d5f11838f 5060 * @arg TIM_ExtTRGPolarity_Inverted: active low or falling edge active.
mbed_official 235:685d5f11838f 5061 * @arg TIM_ExtTRGPolarity_NonInverted: active high or rising edge active.
mbed_official 235:685d5f11838f 5062 * @param ExtTRGFilter: External Trigger Filter.
mbed_official 235:685d5f11838f 5063 * This parameter must be a value between 0x00 and 0x0F
mbed_official 235:685d5f11838f 5064 * @retval None
mbed_official 235:685d5f11838f 5065 */
mbed_official 235:685d5f11838f 5066 static void TIM_ETR_SetConfig(TIM_TypeDef* TIMx, uint32_t TIM_ExtTRGPrescaler,
mbed_official 235:685d5f11838f 5067 uint32_t TIM_ExtTRGPolarity, uint32_t ExtTRGFilter)
mbed_official 235:685d5f11838f 5068 {
mbed_official 235:685d5f11838f 5069 uint32_t tmpsmcr = 0;
mbed_official 235:685d5f11838f 5070
mbed_official 235:685d5f11838f 5071 tmpsmcr = TIMx->SMCR;
mbed_official 235:685d5f11838f 5072
mbed_official 235:685d5f11838f 5073 /* Reset the ETR Bits */
mbed_official 235:685d5f11838f 5074 tmpsmcr &= ~(TIM_SMCR_ETF | TIM_SMCR_ETPS | TIM_SMCR_ECE | TIM_SMCR_ETP);
mbed_official 235:685d5f11838f 5075
mbed_official 235:685d5f11838f 5076 /* Set the Prescaler, the Filter value and the Polarity */
mbed_official 235:685d5f11838f 5077 tmpsmcr |= (uint32_t)(TIM_ExtTRGPrescaler | (TIM_ExtTRGPolarity | (ExtTRGFilter << 8)));
mbed_official 235:685d5f11838f 5078
mbed_official 235:685d5f11838f 5079 /* Write to TIMx SMCR */
mbed_official 235:685d5f11838f 5080 TIMx->SMCR = tmpsmcr;
mbed_official 235:685d5f11838f 5081 }
mbed_official 235:685d5f11838f 5082
mbed_official 235:685d5f11838f 5083 /**
mbed_official 235:685d5f11838f 5084 * @brief Enables or disables the TIM Capture Compare Channel x.
mbed_official 235:685d5f11838f 5085 * @param TIMx to select the TIM peripheral
mbed_official 235:685d5f11838f 5086 * @param Channel: specifies the TIM Channel
mbed_official 235:685d5f11838f 5087 * This parameter can be one of the following values:
mbed_official 235:685d5f11838f 5088 * @arg TIM_Channel_1: TIM Channel 1
mbed_official 235:685d5f11838f 5089 * @arg TIM_Channel_2: TIM Channel 2
mbed_official 235:685d5f11838f 5090 * @arg TIM_Channel_3: TIM Channel 3
mbed_official 235:685d5f11838f 5091 * @arg TIM_Channel_4: TIM Channel 4
mbed_official 235:685d5f11838f 5092 * @param ChannelState: specifies the TIM Channel CCxE bit new state.
mbed_official 235:685d5f11838f 5093 * This parameter can be: TIM_CCx_ENABLE or TIM_CCx_Disable.
mbed_official 235:685d5f11838f 5094 * @retval None
mbed_official 235:685d5f11838f 5095 */
mbed_official 235:685d5f11838f 5096 void TIM_CCxChannelCmd(TIM_TypeDef* TIMx, uint32_t Channel, uint32_t ChannelState)
mbed_official 235:685d5f11838f 5097 {
mbed_official 235:685d5f11838f 5098 uint32_t tmp = 0;
mbed_official 235:685d5f11838f 5099
mbed_official 235:685d5f11838f 5100 /* Check the parameters */
mbed_official 235:685d5f11838f 5101 assert_param(IS_TIM_CC1_INSTANCE(TIMx));
mbed_official 235:685d5f11838f 5102 assert_param(IS_TIM_CHANNELS(Channel));
mbed_official 235:685d5f11838f 5103
mbed_official 235:685d5f11838f 5104 tmp = TIM_CCER_CC1E << Channel;
mbed_official 235:685d5f11838f 5105
mbed_official 235:685d5f11838f 5106 /* Reset the CCxE Bit */
mbed_official 235:685d5f11838f 5107 TIMx->CCER &= ~tmp;
mbed_official 235:685d5f11838f 5108
mbed_official 235:685d5f11838f 5109 /* Set or reset the CCxE Bit */
mbed_official 235:685d5f11838f 5110 TIMx->CCER |= (uint32_t)(ChannelState << Channel);
mbed_official 235:685d5f11838f 5111 }
mbed_official 235:685d5f11838f 5112
mbed_official 235:685d5f11838f 5113
mbed_official 235:685d5f11838f 5114 /**
mbed_official 235:685d5f11838f 5115 * @}
mbed_official 235:685d5f11838f 5116 */
mbed_official 235:685d5f11838f 5117
mbed_official 235:685d5f11838f 5118 #endif /* HAL_TIM_MODULE_ENABLED */
mbed_official 235:685d5f11838f 5119 /**
mbed_official 235:685d5f11838f 5120 * @}
mbed_official 235:685d5f11838f 5121 */
mbed_official 235:685d5f11838f 5122
mbed_official 235:685d5f11838f 5123 /**
mbed_official 235:685d5f11838f 5124 * @}
mbed_official 235:685d5f11838f 5125 */
mbed_official 235:685d5f11838f 5126 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/