mbed library sources
Dependents: frdm_kl05z_gpio_test
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targets/cmsis/TARGET_STM/TARGET_NUCLEO_F411RE/stm32f4xx_hal_spi.c@323:9e901b0a5aa1, 2014-09-13 (annotated)
- Committer:
- shaoziyang
- Date:
- Sat Sep 13 14:25:46 2014 +0000
- Revision:
- 323:9e901b0a5aa1
- Parent:
- 235:685d5f11838f
test with CLOCK_SETUP = 0
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
mbed_official | 235:685d5f11838f | 1 | /** |
mbed_official | 235:685d5f11838f | 2 | ****************************************************************************** |
mbed_official | 235:685d5f11838f | 3 | * @file stm32f4xx_hal_spi.c |
mbed_official | 235:685d5f11838f | 4 | * @author MCD Application Team |
mbed_official | 235:685d5f11838f | 5 | * @version V1.1.0 |
mbed_official | 235:685d5f11838f | 6 | * @date 19-June-2014 |
mbed_official | 235:685d5f11838f | 7 | * @brief SPI HAL module driver. |
mbed_official | 235:685d5f11838f | 8 | * |
mbed_official | 235:685d5f11838f | 9 | * This file provides firmware functions to manage the following |
mbed_official | 235:685d5f11838f | 10 | * functionalities of the Serial Peripheral Interface (SPI) peripheral: |
mbed_official | 235:685d5f11838f | 11 | * + Initialization and de-initialization functions |
mbed_official | 235:685d5f11838f | 12 | * + IO operation functions |
mbed_official | 235:685d5f11838f | 13 | * + Peripheral Control functions |
mbed_official | 235:685d5f11838f | 14 | * + Peripheral State functions |
mbed_official | 235:685d5f11838f | 15 | @verbatim |
mbed_official | 235:685d5f11838f | 16 | ============================================================================== |
mbed_official | 235:685d5f11838f | 17 | ##### How to use this driver ##### |
mbed_official | 235:685d5f11838f | 18 | ============================================================================== |
mbed_official | 235:685d5f11838f | 19 | [..] |
mbed_official | 235:685d5f11838f | 20 | The SPI HAL driver can be used as follows: |
mbed_official | 235:685d5f11838f | 21 | |
mbed_official | 235:685d5f11838f | 22 | (#) Declare a SPI_HandleTypeDef handle structure, for example: |
mbed_official | 235:685d5f11838f | 23 | SPI_HandleTypeDef hspi; |
mbed_official | 235:685d5f11838f | 24 | |
mbed_official | 235:685d5f11838f | 25 | (#)Initialize the SPI low level resources by implementing the HAL_SPI_MspInit ()API: |
mbed_official | 235:685d5f11838f | 26 | (##) Enable the SPIx interface clock |
mbed_official | 235:685d5f11838f | 27 | (##) SPI pins configuration |
mbed_official | 235:685d5f11838f | 28 | (+++) Enable the clock for the SPI GPIOs |
mbed_official | 235:685d5f11838f | 29 | (+++) Configure these SPI pins as alternate function push-pull |
mbed_official | 235:685d5f11838f | 30 | (##) NVIC configuration if you need to use interrupt process |
mbed_official | 235:685d5f11838f | 31 | (+++) Configure the SPIx interrupt priority |
mbed_official | 235:685d5f11838f | 32 | (+++) Enable the NVIC SPI IRQ handle |
mbed_official | 235:685d5f11838f | 33 | (##) DMA Configuration if you need to use DMA process |
mbed_official | 235:685d5f11838f | 34 | (+++) Declare a DMA_HandleTypeDef handle structure for the transmit or receive stream |
mbed_official | 235:685d5f11838f | 35 | (+++) Enable the DMAx interface clock using |
mbed_official | 235:685d5f11838f | 36 | (+++) Configure the DMA handle parameters |
mbed_official | 235:685d5f11838f | 37 | (+++) Configure the DMA Tx or Rx Stream |
mbed_official | 235:685d5f11838f | 38 | (+++) Associate the initilalized hdma_tx handle to the hspi DMA Tx or Rx handle |
mbed_official | 235:685d5f11838f | 39 | (+++) Configure the priority and enable the NVIC for the transfer complete interrupt on the DMA Tx or Rx Stream |
mbed_official | 235:685d5f11838f | 40 | |
mbed_official | 235:685d5f11838f | 41 | (#) Program the Mode, Direction , Data size, Baudrate Prescaler, NSS |
mbed_official | 235:685d5f11838f | 42 | management, Clock polarity and phase, FirstBit and CRC configuration in the hspi Init structure. |
mbed_official | 235:685d5f11838f | 43 | |
mbed_official | 235:685d5f11838f | 44 | (#) Initialize the SPI registers by calling the HAL_SPI_Init() API: |
mbed_official | 235:685d5f11838f | 45 | (++) This API configures also the low level Hardware GPIO, CLOCK, CORTEX...etc) |
mbed_official | 235:685d5f11838f | 46 | by calling the customed HAL_SPI_MspInit() API. |
mbed_official | 235:685d5f11838f | 47 | [..] |
mbed_official | 235:685d5f11838f | 48 | Circular mode restriction: |
mbed_official | 235:685d5f11838f | 49 | (#) The DMA circular mode cannot be used when the SPI is configured in these modes: |
mbed_official | 235:685d5f11838f | 50 | (##) Master 2Lines RxOnly |
mbed_official | 235:685d5f11838f | 51 | (##) Master 1Line Rx |
mbed_official | 235:685d5f11838f | 52 | (#) The CRC feature is not managed when the DMA circular mode is enabled |
mbed_official | 235:685d5f11838f | 53 | (#) When the SPI DMA Pause/Stop features are used, we must use the following APIs |
mbed_official | 235:685d5f11838f | 54 | the HAL_SPI_DMAPause()/ HAL_SPI_DMAStop() only under the SPI callbacks |
mbed_official | 235:685d5f11838f | 55 | |
mbed_official | 235:685d5f11838f | 56 | |
mbed_official | 235:685d5f11838f | 57 | |
mbed_official | 235:685d5f11838f | 58 | @endverbatim |
mbed_official | 235:685d5f11838f | 59 | ****************************************************************************** |
mbed_official | 235:685d5f11838f | 60 | * @attention |
mbed_official | 235:685d5f11838f | 61 | * |
mbed_official | 235:685d5f11838f | 62 | * <h2><center>© COPYRIGHT(c) 2014 STMicroelectronics</center></h2> |
mbed_official | 235:685d5f11838f | 63 | * |
mbed_official | 235:685d5f11838f | 64 | * Redistribution and use in source and binary forms, with or without modification, |
mbed_official | 235:685d5f11838f | 65 | * are permitted provided that the following conditions are met: |
mbed_official | 235:685d5f11838f | 66 | * 1. Redistributions of source code must retain the above copyright notice, |
mbed_official | 235:685d5f11838f | 67 | * this list of conditions and the following disclaimer. |
mbed_official | 235:685d5f11838f | 68 | * 2. Redistributions in binary form must reproduce the above copyright notice, |
mbed_official | 235:685d5f11838f | 69 | * this list of conditions and the following disclaimer in the documentation |
mbed_official | 235:685d5f11838f | 70 | * and/or other materials provided with the distribution. |
mbed_official | 235:685d5f11838f | 71 | * 3. Neither the name of STMicroelectronics nor the names of its contributors |
mbed_official | 235:685d5f11838f | 72 | * may be used to endorse or promote products derived from this software |
mbed_official | 235:685d5f11838f | 73 | * without specific prior written permission. |
mbed_official | 235:685d5f11838f | 74 | * |
mbed_official | 235:685d5f11838f | 75 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
mbed_official | 235:685d5f11838f | 76 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
mbed_official | 235:685d5f11838f | 77 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
mbed_official | 235:685d5f11838f | 78 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE |
mbed_official | 235:685d5f11838f | 79 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
mbed_official | 235:685d5f11838f | 80 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR |
mbed_official | 235:685d5f11838f | 81 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
mbed_official | 235:685d5f11838f | 82 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, |
mbed_official | 235:685d5f11838f | 83 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
mbed_official | 235:685d5f11838f | 84 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
mbed_official | 235:685d5f11838f | 85 | * |
mbed_official | 235:685d5f11838f | 86 | ****************************************************************************** |
mbed_official | 235:685d5f11838f | 87 | */ |
mbed_official | 235:685d5f11838f | 88 | |
mbed_official | 235:685d5f11838f | 89 | /* Includes ------------------------------------------------------------------*/ |
mbed_official | 235:685d5f11838f | 90 | #include "stm32f4xx_hal.h" |
mbed_official | 235:685d5f11838f | 91 | |
mbed_official | 235:685d5f11838f | 92 | /** @addtogroup STM32F4xx_HAL_Driver |
mbed_official | 235:685d5f11838f | 93 | * @{ |
mbed_official | 235:685d5f11838f | 94 | */ |
mbed_official | 235:685d5f11838f | 95 | |
mbed_official | 235:685d5f11838f | 96 | /** @defgroup SPI |
mbed_official | 235:685d5f11838f | 97 | * @brief SPI HAL module driver |
mbed_official | 235:685d5f11838f | 98 | * @{ |
mbed_official | 235:685d5f11838f | 99 | */ |
mbed_official | 235:685d5f11838f | 100 | |
mbed_official | 235:685d5f11838f | 101 | #ifdef HAL_SPI_MODULE_ENABLED |
mbed_official | 235:685d5f11838f | 102 | |
mbed_official | 235:685d5f11838f | 103 | /* Private typedef -----------------------------------------------------------*/ |
mbed_official | 235:685d5f11838f | 104 | /* Private define ------------------------------------------------------------*/ |
mbed_official | 235:685d5f11838f | 105 | #define SPI_TIMEOUT_VALUE 10 |
mbed_official | 235:685d5f11838f | 106 | /* Private macro -------------------------------------------------------------*/ |
mbed_official | 235:685d5f11838f | 107 | /* Private variables ---------------------------------------------------------*/ |
mbed_official | 235:685d5f11838f | 108 | /* Private function prototypes -----------------------------------------------*/ |
mbed_official | 235:685d5f11838f | 109 | static void SPI_TxCloseIRQHandler(SPI_HandleTypeDef *hspi); |
mbed_official | 235:685d5f11838f | 110 | static void SPI_TxISR(SPI_HandleTypeDef *hspi); |
mbed_official | 235:685d5f11838f | 111 | static void SPI_RxCloseIRQHandler(SPI_HandleTypeDef *hspi); |
mbed_official | 235:685d5f11838f | 112 | static void SPI_2LinesRxISR(SPI_HandleTypeDef *hspi); |
mbed_official | 235:685d5f11838f | 113 | static void SPI_RxISR(SPI_HandleTypeDef *hspi); |
mbed_official | 235:685d5f11838f | 114 | static void SPI_DMATransmitCplt(DMA_HandleTypeDef *hdma); |
mbed_official | 235:685d5f11838f | 115 | static void SPI_DMAReceiveCplt(DMA_HandleTypeDef *hdma); |
mbed_official | 235:685d5f11838f | 116 | static void SPI_DMATransmitReceiveCplt(DMA_HandleTypeDef *hdma); |
mbed_official | 235:685d5f11838f | 117 | static void SPI_DMAHalfTransmitCplt(DMA_HandleTypeDef *hdma); |
mbed_official | 235:685d5f11838f | 118 | static void SPI_DMAHalfReceiveCplt(DMA_HandleTypeDef *hdma); |
mbed_official | 235:685d5f11838f | 119 | static void SPI_DMAHalfTransmitReceiveCplt(DMA_HandleTypeDef *hdma); |
mbed_official | 235:685d5f11838f | 120 | static void SPI_DMAError(DMA_HandleTypeDef *hdma); |
mbed_official | 235:685d5f11838f | 121 | static HAL_StatusTypeDef SPI_WaitOnFlagUntilTimeout(SPI_HandleTypeDef *hspi, uint32_t Flag, FlagStatus Status, uint32_t Timeout); |
mbed_official | 235:685d5f11838f | 122 | |
mbed_official | 235:685d5f11838f | 123 | /* Private functions ---------------------------------------------------------*/ |
mbed_official | 235:685d5f11838f | 124 | |
mbed_official | 235:685d5f11838f | 125 | /** @defgroup SPI_Private_Functions |
mbed_official | 235:685d5f11838f | 126 | * @{ |
mbed_official | 235:685d5f11838f | 127 | */ |
mbed_official | 235:685d5f11838f | 128 | |
mbed_official | 235:685d5f11838f | 129 | /** @defgroup SPI_Group1 Initialization and de-initialization functions |
mbed_official | 235:685d5f11838f | 130 | * @brief Initialization and Configuration functions |
mbed_official | 235:685d5f11838f | 131 | * |
mbed_official | 235:685d5f11838f | 132 | @verbatim |
mbed_official | 235:685d5f11838f | 133 | =============================================================================== |
mbed_official | 235:685d5f11838f | 134 | ##### Initialization and de-initialization functions ##### |
mbed_official | 235:685d5f11838f | 135 | =============================================================================== |
mbed_official | 235:685d5f11838f | 136 | [..] This subsection provides a set of functions allowing to initialize and |
mbed_official | 235:685d5f11838f | 137 | de-initialiaze the SPIx peripheral: |
mbed_official | 235:685d5f11838f | 138 | |
mbed_official | 235:685d5f11838f | 139 | (+) User must implement HAL_SPI_MspInit() function in which he configures |
mbed_official | 235:685d5f11838f | 140 | all related peripherals resources (CLOCK, GPIO, DMA, IT and NVIC ). |
mbed_official | 235:685d5f11838f | 141 | |
mbed_official | 235:685d5f11838f | 142 | (+) Call the function HAL_SPI_Init() to configure the selected device with |
mbed_official | 235:685d5f11838f | 143 | the selected configuration: |
mbed_official | 235:685d5f11838f | 144 | (++) Mode |
mbed_official | 235:685d5f11838f | 145 | (++) Direction |
mbed_official | 235:685d5f11838f | 146 | (++) Data Size |
mbed_official | 235:685d5f11838f | 147 | (++) Clock Polarity and Phase |
mbed_official | 235:685d5f11838f | 148 | (++) NSS Management |
mbed_official | 235:685d5f11838f | 149 | (++) BaudRate Prescaler |
mbed_official | 235:685d5f11838f | 150 | (++) FirstBit |
mbed_official | 235:685d5f11838f | 151 | (++) TIMode |
mbed_official | 235:685d5f11838f | 152 | (++) CRC Calculation |
mbed_official | 235:685d5f11838f | 153 | (++) CRC Polynomial if CRC enabled |
mbed_official | 235:685d5f11838f | 154 | |
mbed_official | 235:685d5f11838f | 155 | (+) Call the function HAL_SPI_DeInit() to restore the default configuration |
mbed_official | 235:685d5f11838f | 156 | of the selected SPIx periperal. |
mbed_official | 235:685d5f11838f | 157 | |
mbed_official | 235:685d5f11838f | 158 | @endverbatim |
mbed_official | 235:685d5f11838f | 159 | * @{ |
mbed_official | 235:685d5f11838f | 160 | */ |
mbed_official | 235:685d5f11838f | 161 | |
mbed_official | 235:685d5f11838f | 162 | /** |
mbed_official | 235:685d5f11838f | 163 | * @brief Initializes the SPI according to the specified parameters |
mbed_official | 235:685d5f11838f | 164 | * in the SPI_InitTypeDef and create the associated handle. |
mbed_official | 235:685d5f11838f | 165 | * @param hspi: pointer to a SPI_HandleTypeDef structure that contains |
mbed_official | 235:685d5f11838f | 166 | * the configuration information for SPI module. |
mbed_official | 235:685d5f11838f | 167 | * @retval HAL status |
mbed_official | 235:685d5f11838f | 168 | */ |
mbed_official | 235:685d5f11838f | 169 | HAL_StatusTypeDef HAL_SPI_Init(SPI_HandleTypeDef *hspi) |
mbed_official | 235:685d5f11838f | 170 | { |
mbed_official | 235:685d5f11838f | 171 | /* Check the SPI handle allocation */ |
mbed_official | 235:685d5f11838f | 172 | if(hspi == NULL) |
mbed_official | 235:685d5f11838f | 173 | { |
mbed_official | 235:685d5f11838f | 174 | return HAL_ERROR; |
mbed_official | 235:685d5f11838f | 175 | } |
mbed_official | 235:685d5f11838f | 176 | |
mbed_official | 235:685d5f11838f | 177 | /* Check the parameters */ |
mbed_official | 235:685d5f11838f | 178 | assert_param(IS_SPI_MODE(hspi->Init.Mode)); |
mbed_official | 235:685d5f11838f | 179 | assert_param(IS_SPI_DIRECTION_MODE(hspi->Init.Direction)); |
mbed_official | 235:685d5f11838f | 180 | assert_param(IS_SPI_DATASIZE(hspi->Init.DataSize)); |
mbed_official | 235:685d5f11838f | 181 | assert_param(IS_SPI_CPOL(hspi->Init.CLKPolarity)); |
mbed_official | 235:685d5f11838f | 182 | assert_param(IS_SPI_CPHA(hspi->Init.CLKPhase)); |
mbed_official | 235:685d5f11838f | 183 | assert_param(IS_SPI_NSS(hspi->Init.NSS)); |
mbed_official | 235:685d5f11838f | 184 | assert_param(IS_SPI_BAUDRATE_PRESCALER(hspi->Init.BaudRatePrescaler)); |
mbed_official | 235:685d5f11838f | 185 | assert_param(IS_SPI_FIRST_BIT(hspi->Init.FirstBit)); |
mbed_official | 235:685d5f11838f | 186 | assert_param(IS_SPI_TIMODE(hspi->Init.TIMode)); |
mbed_official | 235:685d5f11838f | 187 | assert_param(IS_SPI_CRC_CALCULATION(hspi->Init.CRCCalculation)); |
mbed_official | 235:685d5f11838f | 188 | assert_param(IS_SPI_CRC_POLYNOMIAL(hspi->Init.CRCPolynomial)); |
mbed_official | 235:685d5f11838f | 189 | |
mbed_official | 235:685d5f11838f | 190 | if(hspi->State == HAL_SPI_STATE_RESET) |
mbed_official | 235:685d5f11838f | 191 | { |
mbed_official | 235:685d5f11838f | 192 | /* Init the low level hardware : GPIO, CLOCK, NVIC... */ |
mbed_official | 235:685d5f11838f | 193 | HAL_SPI_MspInit(hspi); |
mbed_official | 235:685d5f11838f | 194 | } |
mbed_official | 235:685d5f11838f | 195 | |
mbed_official | 235:685d5f11838f | 196 | hspi->State = HAL_SPI_STATE_BUSY; |
mbed_official | 235:685d5f11838f | 197 | |
mbed_official | 235:685d5f11838f | 198 | /* Disble the selected SPI peripheral */ |
mbed_official | 235:685d5f11838f | 199 | __HAL_SPI_DISABLE(hspi); |
mbed_official | 235:685d5f11838f | 200 | |
mbed_official | 235:685d5f11838f | 201 | /*----------------------- SPIx CR1 & CR2 Configuration ---------------------*/ |
mbed_official | 235:685d5f11838f | 202 | /* Configure : SPI Mode, Communication Mode, Data size, Clock polarity and phase, NSS management, |
mbed_official | 235:685d5f11838f | 203 | Communication speed, First bit and CRC calculation state */ |
mbed_official | 235:685d5f11838f | 204 | hspi->Instance->CR1 = (hspi->Init.Mode | hspi->Init.Direction | hspi->Init.DataSize | |
mbed_official | 235:685d5f11838f | 205 | hspi->Init.CLKPolarity | hspi->Init.CLKPhase | (hspi->Init.NSS & SPI_CR1_SSM) | |
mbed_official | 235:685d5f11838f | 206 | hspi->Init.BaudRatePrescaler | hspi->Init.FirstBit | hspi->Init.CRCCalculation); |
mbed_official | 235:685d5f11838f | 207 | |
mbed_official | 235:685d5f11838f | 208 | /* Configure : NSS management */ |
mbed_official | 235:685d5f11838f | 209 | hspi->Instance->CR2 = (((hspi->Init.NSS >> 16) & SPI_CR2_SSOE) | hspi->Init.TIMode); |
mbed_official | 235:685d5f11838f | 210 | |
mbed_official | 235:685d5f11838f | 211 | /*---------------------------- SPIx CRCPOLY Configuration ------------------*/ |
mbed_official | 235:685d5f11838f | 212 | /* Configure : CRC Polynomial */ |
mbed_official | 235:685d5f11838f | 213 | hspi->Instance->CRCPR = hspi->Init.CRCPolynomial; |
mbed_official | 235:685d5f11838f | 214 | |
mbed_official | 235:685d5f11838f | 215 | /* Activate the SPI mode (Make sure that I2SMOD bit in I2SCFGR register is reset) */ |
mbed_official | 235:685d5f11838f | 216 | hspi->Instance->I2SCFGR &= (uint32_t)(~SPI_I2SCFGR_I2SMOD); |
mbed_official | 235:685d5f11838f | 217 | |
mbed_official | 235:685d5f11838f | 218 | hspi->ErrorCode = HAL_SPI_ERROR_NONE; |
mbed_official | 235:685d5f11838f | 219 | hspi->State = HAL_SPI_STATE_READY; |
mbed_official | 235:685d5f11838f | 220 | |
mbed_official | 235:685d5f11838f | 221 | return HAL_OK; |
mbed_official | 235:685d5f11838f | 222 | } |
mbed_official | 235:685d5f11838f | 223 | |
mbed_official | 235:685d5f11838f | 224 | /** |
mbed_official | 235:685d5f11838f | 225 | * @brief DeInitializes the SPI peripheral |
mbed_official | 235:685d5f11838f | 226 | * @param hspi: pointer to a SPI_HandleTypeDef structure that contains |
mbed_official | 235:685d5f11838f | 227 | * the configuration information for SPI module. |
mbed_official | 235:685d5f11838f | 228 | * @retval HAL status |
mbed_official | 235:685d5f11838f | 229 | */ |
mbed_official | 235:685d5f11838f | 230 | HAL_StatusTypeDef HAL_SPI_DeInit(SPI_HandleTypeDef *hspi) |
mbed_official | 235:685d5f11838f | 231 | { |
mbed_official | 235:685d5f11838f | 232 | /* Check the SPI handle allocation */ |
mbed_official | 235:685d5f11838f | 233 | if(hspi == NULL) |
mbed_official | 235:685d5f11838f | 234 | { |
mbed_official | 235:685d5f11838f | 235 | return HAL_ERROR; |
mbed_official | 235:685d5f11838f | 236 | } |
mbed_official | 235:685d5f11838f | 237 | |
mbed_official | 235:685d5f11838f | 238 | /* Disable the SPI Peripheral Clock */ |
mbed_official | 235:685d5f11838f | 239 | __HAL_SPI_DISABLE(hspi); |
mbed_official | 235:685d5f11838f | 240 | |
mbed_official | 235:685d5f11838f | 241 | /* DeInit the low level hardware: GPIO, CLOCK, NVIC... */ |
mbed_official | 235:685d5f11838f | 242 | HAL_SPI_MspDeInit(hspi); |
mbed_official | 235:685d5f11838f | 243 | |
mbed_official | 235:685d5f11838f | 244 | hspi->ErrorCode = HAL_SPI_ERROR_NONE; |
mbed_official | 235:685d5f11838f | 245 | hspi->State = HAL_SPI_STATE_RESET; |
mbed_official | 235:685d5f11838f | 246 | |
mbed_official | 235:685d5f11838f | 247 | /* Release Lock */ |
mbed_official | 235:685d5f11838f | 248 | __HAL_UNLOCK(hspi); |
mbed_official | 235:685d5f11838f | 249 | |
mbed_official | 235:685d5f11838f | 250 | return HAL_OK; |
mbed_official | 235:685d5f11838f | 251 | } |
mbed_official | 235:685d5f11838f | 252 | |
mbed_official | 235:685d5f11838f | 253 | /** |
mbed_official | 235:685d5f11838f | 254 | * @brief SPI MSP Init |
mbed_official | 235:685d5f11838f | 255 | * @param hspi: pointer to a SPI_HandleTypeDef structure that contains |
mbed_official | 235:685d5f11838f | 256 | * the configuration information for SPI module. |
mbed_official | 235:685d5f11838f | 257 | * @retval None |
mbed_official | 235:685d5f11838f | 258 | */ |
mbed_official | 235:685d5f11838f | 259 | __weak void HAL_SPI_MspInit(SPI_HandleTypeDef *hspi) |
mbed_official | 235:685d5f11838f | 260 | { |
mbed_official | 235:685d5f11838f | 261 | /* NOTE : This function Should not be modified, when the callback is needed, |
mbed_official | 235:685d5f11838f | 262 | the HAL_SPI_MspInit could be implenetd in the user file |
mbed_official | 235:685d5f11838f | 263 | */ |
mbed_official | 235:685d5f11838f | 264 | } |
mbed_official | 235:685d5f11838f | 265 | |
mbed_official | 235:685d5f11838f | 266 | /** |
mbed_official | 235:685d5f11838f | 267 | * @brief SPI MSP DeInit |
mbed_official | 235:685d5f11838f | 268 | * @param hspi: pointer to a SPI_HandleTypeDef structure that contains |
mbed_official | 235:685d5f11838f | 269 | * the configuration information for SPI module. |
mbed_official | 235:685d5f11838f | 270 | * @retval None |
mbed_official | 235:685d5f11838f | 271 | */ |
mbed_official | 235:685d5f11838f | 272 | __weak void HAL_SPI_MspDeInit(SPI_HandleTypeDef *hspi) |
mbed_official | 235:685d5f11838f | 273 | { |
mbed_official | 235:685d5f11838f | 274 | /* NOTE : This function Should not be modified, when the callback is needed, |
mbed_official | 235:685d5f11838f | 275 | the HAL_SPI_MspDeInit could be implenetd in the user file |
mbed_official | 235:685d5f11838f | 276 | */ |
mbed_official | 235:685d5f11838f | 277 | } |
mbed_official | 235:685d5f11838f | 278 | |
mbed_official | 235:685d5f11838f | 279 | /** |
mbed_official | 235:685d5f11838f | 280 | * @} |
mbed_official | 235:685d5f11838f | 281 | */ |
mbed_official | 235:685d5f11838f | 282 | |
mbed_official | 235:685d5f11838f | 283 | /** @defgroup SPI_Group2 IO operation functions |
mbed_official | 235:685d5f11838f | 284 | * @brief Data transfers functions |
mbed_official | 235:685d5f11838f | 285 | * |
mbed_official | 235:685d5f11838f | 286 | @verbatim |
mbed_official | 235:685d5f11838f | 287 | ============================================================================== |
mbed_official | 235:685d5f11838f | 288 | ##### IO operation functions ##### |
mbed_official | 235:685d5f11838f | 289 | =============================================================================== |
mbed_official | 235:685d5f11838f | 290 | This subsection provides a set of functions allowing to manage the SPI |
mbed_official | 235:685d5f11838f | 291 | data transfers. |
mbed_official | 235:685d5f11838f | 292 | |
mbed_official | 235:685d5f11838f | 293 | [..] The SPI supports master and slave mode : |
mbed_official | 235:685d5f11838f | 294 | |
mbed_official | 235:685d5f11838f | 295 | (#) There are two modes of transfer: |
mbed_official | 235:685d5f11838f | 296 | (++) Blocking mode: The communication is performed in polling mode. |
mbed_official | 235:685d5f11838f | 297 | The HAL status of all data processing is returned by the same function |
mbed_official | 235:685d5f11838f | 298 | after finishing transfer. |
mbed_official | 235:685d5f11838f | 299 | (++) No-Blocking mode: The communication is performed using Interrupts |
mbed_official | 235:685d5f11838f | 300 | or DMA, These APIs return the HAL status. |
mbed_official | 235:685d5f11838f | 301 | The end of the data processing will be indicated through the |
mbed_official | 235:685d5f11838f | 302 | dedicated SPI IRQ when using Interrupt mode or the DMA IRQ when |
mbed_official | 235:685d5f11838f | 303 | using DMA mode. |
mbed_official | 235:685d5f11838f | 304 | The HAL_SPI_TxCpltCallback(), HAL_SPI_RxCpltCallback() and HAL_SPI_TxRxCpltCallback() user callbacks |
mbed_official | 235:685d5f11838f | 305 | will be executed respectivelly at the end of the transmit or Receive process |
mbed_official | 235:685d5f11838f | 306 | The HAL_SPI_ErrorCallback()user callback will be executed when a communication error is detected |
mbed_official | 235:685d5f11838f | 307 | |
mbed_official | 235:685d5f11838f | 308 | (#) Blocking mode APIs are : |
mbed_official | 235:685d5f11838f | 309 | (++) HAL_SPI_Transmit()in 1Line (simplex) and 2Lines (full duplex) mode |
mbed_official | 235:685d5f11838f | 310 | (++) HAL_SPI_Receive() in 1Line (simplex) and 2Lines (full duplex) mode |
mbed_official | 235:685d5f11838f | 311 | (++) HAL_SPI_TransmitReceive() in full duplex mode |
mbed_official | 235:685d5f11838f | 312 | |
mbed_official | 235:685d5f11838f | 313 | (#) Non Blocking mode API's with Interrupt are : |
mbed_official | 235:685d5f11838f | 314 | (++) HAL_SPI_Transmit_IT()in 1Line (simplex) and 2Lines (full duplex) mode |
mbed_official | 235:685d5f11838f | 315 | (++) HAL_SPI_Receive_IT() in 1Line (simplex) and 2Lines (full duplex) mode |
mbed_official | 235:685d5f11838f | 316 | (++) HAL_SPI_TransmitReceive_IT()in full duplex mode |
mbed_official | 235:685d5f11838f | 317 | (++) HAL_SPI_IRQHandler() |
mbed_official | 235:685d5f11838f | 318 | |
mbed_official | 235:685d5f11838f | 319 | (#) Non Blocking mode functions with DMA are : |
mbed_official | 235:685d5f11838f | 320 | (++) HAL_SPI_Transmit_DMA()in 1Line (simplex) and 2Lines (full duplex) mode |
mbed_official | 235:685d5f11838f | 321 | (++) HAL_SPI_Receive_DMA() in 1Line (simplex) and 2Lines (full duplex) mode |
mbed_official | 235:685d5f11838f | 322 | (++) HAL_SPI_TransmitReceie_DMA() in full duplex mode |
mbed_official | 235:685d5f11838f | 323 | |
mbed_official | 235:685d5f11838f | 324 | (#) A set of Transfer Complete Callbacks are provided in non Blocking mode: |
mbed_official | 235:685d5f11838f | 325 | (++) HAL_SPI_TxCpltCallback() |
mbed_official | 235:685d5f11838f | 326 | (++) HAL_SPI_RxCpltCallback() |
mbed_official | 235:685d5f11838f | 327 | (++) HAL_SPI_ErrorCallback() |
mbed_official | 235:685d5f11838f | 328 | (++) HAL_SPI_TxRxCpltCallback() |
mbed_official | 235:685d5f11838f | 329 | |
mbed_official | 235:685d5f11838f | 330 | @endverbatim |
mbed_official | 235:685d5f11838f | 331 | * @{ |
mbed_official | 235:685d5f11838f | 332 | */ |
mbed_official | 235:685d5f11838f | 333 | |
mbed_official | 235:685d5f11838f | 334 | /** |
mbed_official | 235:685d5f11838f | 335 | * @brief Transmit an amount of data in blocking mode |
mbed_official | 235:685d5f11838f | 336 | * @param hspi: pointer to a SPI_HandleTypeDef structure that contains |
mbed_official | 235:685d5f11838f | 337 | * the configuration information for SPI module. |
mbed_official | 235:685d5f11838f | 338 | * @param pData: pointer to data buffer |
mbed_official | 235:685d5f11838f | 339 | * @param Size: amount of data to be sent |
mbed_official | 235:685d5f11838f | 340 | * @param Timeout: Timeout duration |
mbed_official | 235:685d5f11838f | 341 | * @retval HAL status |
mbed_official | 235:685d5f11838f | 342 | */ |
mbed_official | 235:685d5f11838f | 343 | HAL_StatusTypeDef HAL_SPI_Transmit(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size, uint32_t Timeout) |
mbed_official | 235:685d5f11838f | 344 | { |
mbed_official | 235:685d5f11838f | 345 | |
mbed_official | 235:685d5f11838f | 346 | if(hspi->State == HAL_SPI_STATE_READY) |
mbed_official | 235:685d5f11838f | 347 | { |
mbed_official | 235:685d5f11838f | 348 | if((pData == NULL ) || (Size == 0)) |
mbed_official | 235:685d5f11838f | 349 | { |
mbed_official | 235:685d5f11838f | 350 | return HAL_ERROR; |
mbed_official | 235:685d5f11838f | 351 | } |
mbed_official | 235:685d5f11838f | 352 | |
mbed_official | 235:685d5f11838f | 353 | /* Check the parameters */ |
mbed_official | 235:685d5f11838f | 354 | assert_param(IS_SPI_DIRECTION_2LINES_OR_1LINE(hspi->Init.Direction)); |
mbed_official | 235:685d5f11838f | 355 | |
mbed_official | 235:685d5f11838f | 356 | /* Process Locked */ |
mbed_official | 235:685d5f11838f | 357 | __HAL_LOCK(hspi); |
mbed_official | 235:685d5f11838f | 358 | |
mbed_official | 235:685d5f11838f | 359 | /* Configure communication */ |
mbed_official | 235:685d5f11838f | 360 | hspi->State = HAL_SPI_STATE_BUSY_TX; |
mbed_official | 235:685d5f11838f | 361 | hspi->ErrorCode = HAL_SPI_ERROR_NONE; |
mbed_official | 235:685d5f11838f | 362 | |
mbed_official | 235:685d5f11838f | 363 | hspi->pTxBuffPtr = pData; |
mbed_official | 235:685d5f11838f | 364 | hspi->TxXferSize = Size; |
mbed_official | 235:685d5f11838f | 365 | hspi->TxXferCount = Size; |
mbed_official | 235:685d5f11838f | 366 | |
mbed_official | 235:685d5f11838f | 367 | /*Init field not used in handle to zero */ |
mbed_official | 235:685d5f11838f | 368 | hspi->TxISR = 0; |
mbed_official | 235:685d5f11838f | 369 | hspi->RxISR = 0; |
mbed_official | 235:685d5f11838f | 370 | hspi->RxXferSize = 0; |
mbed_official | 235:685d5f11838f | 371 | hspi->RxXferCount = 0; |
mbed_official | 235:685d5f11838f | 372 | |
mbed_official | 235:685d5f11838f | 373 | /* Reset CRC Calculation */ |
mbed_official | 235:685d5f11838f | 374 | if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLED) |
mbed_official | 235:685d5f11838f | 375 | { |
mbed_official | 235:685d5f11838f | 376 | __HAL_SPI_RESET_CRC(hspi); |
mbed_official | 235:685d5f11838f | 377 | } |
mbed_official | 235:685d5f11838f | 378 | |
mbed_official | 235:685d5f11838f | 379 | if(hspi->Init.Direction == SPI_DIRECTION_1LINE) |
mbed_official | 235:685d5f11838f | 380 | { |
mbed_official | 235:685d5f11838f | 381 | /* Configure communication direction : 1Line */ |
mbed_official | 235:685d5f11838f | 382 | __HAL_SPI_1LINE_TX(hspi); |
mbed_official | 235:685d5f11838f | 383 | } |
mbed_official | 235:685d5f11838f | 384 | |
mbed_official | 235:685d5f11838f | 385 | /* Check if the SPI is already enabled */ |
mbed_official | 235:685d5f11838f | 386 | if((hspi->Instance->CR1 &SPI_CR1_SPE) != SPI_CR1_SPE) |
mbed_official | 235:685d5f11838f | 387 | { |
mbed_official | 235:685d5f11838f | 388 | /* Enable SPI peripheral */ |
mbed_official | 235:685d5f11838f | 389 | __HAL_SPI_ENABLE(hspi); |
mbed_official | 235:685d5f11838f | 390 | } |
mbed_official | 235:685d5f11838f | 391 | |
mbed_official | 235:685d5f11838f | 392 | /* Transmit data in 8 Bit mode */ |
mbed_official | 235:685d5f11838f | 393 | if(hspi->Init.DataSize == SPI_DATASIZE_8BIT) |
mbed_official | 235:685d5f11838f | 394 | { |
mbed_official | 235:685d5f11838f | 395 | if((hspi->Init.Mode == SPI_MODE_SLAVE)|| (hspi->TxXferCount == 0x01)) |
mbed_official | 235:685d5f11838f | 396 | { |
mbed_official | 235:685d5f11838f | 397 | hspi->Instance->DR = (*hspi->pTxBuffPtr++); |
mbed_official | 235:685d5f11838f | 398 | hspi->TxXferCount--; |
mbed_official | 235:685d5f11838f | 399 | } |
mbed_official | 235:685d5f11838f | 400 | while(hspi->TxXferCount > 0) |
mbed_official | 235:685d5f11838f | 401 | { |
mbed_official | 235:685d5f11838f | 402 | /* Wait until TXE flag is set to send data */ |
mbed_official | 235:685d5f11838f | 403 | if(SPI_WaitOnFlagUntilTimeout(hspi, SPI_FLAG_TXE, RESET, Timeout) != HAL_OK) |
mbed_official | 235:685d5f11838f | 404 | { |
mbed_official | 235:685d5f11838f | 405 | return HAL_TIMEOUT; |
mbed_official | 235:685d5f11838f | 406 | } |
mbed_official | 235:685d5f11838f | 407 | hspi->Instance->DR = (*hspi->pTxBuffPtr++); |
mbed_official | 235:685d5f11838f | 408 | hspi->TxXferCount--; |
mbed_official | 235:685d5f11838f | 409 | } |
mbed_official | 235:685d5f11838f | 410 | /* Enable CRC Transmission */ |
mbed_official | 235:685d5f11838f | 411 | if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLED) |
mbed_official | 235:685d5f11838f | 412 | { |
mbed_official | 235:685d5f11838f | 413 | hspi->Instance->CR1 |= SPI_CR1_CRCNEXT; |
mbed_official | 235:685d5f11838f | 414 | } |
mbed_official | 235:685d5f11838f | 415 | } |
mbed_official | 235:685d5f11838f | 416 | /* Transmit data in 16 Bit mode */ |
mbed_official | 235:685d5f11838f | 417 | else |
mbed_official | 235:685d5f11838f | 418 | { |
mbed_official | 235:685d5f11838f | 419 | if((hspi->Init.Mode == SPI_MODE_SLAVE) || (hspi->TxXferCount == 0x01)) |
mbed_official | 235:685d5f11838f | 420 | { |
mbed_official | 235:685d5f11838f | 421 | hspi->Instance->DR = *((uint16_t*)hspi->pTxBuffPtr); |
mbed_official | 235:685d5f11838f | 422 | hspi->pTxBuffPtr+=2; |
mbed_official | 235:685d5f11838f | 423 | hspi->TxXferCount--; |
mbed_official | 235:685d5f11838f | 424 | } |
mbed_official | 235:685d5f11838f | 425 | while(hspi->TxXferCount > 0) |
mbed_official | 235:685d5f11838f | 426 | { |
mbed_official | 235:685d5f11838f | 427 | /* Wait until TXE flag is set to send data */ |
mbed_official | 235:685d5f11838f | 428 | if(SPI_WaitOnFlagUntilTimeout(hspi, SPI_FLAG_TXE, RESET, Timeout) != HAL_OK) |
mbed_official | 235:685d5f11838f | 429 | { |
mbed_official | 235:685d5f11838f | 430 | return HAL_TIMEOUT; |
mbed_official | 235:685d5f11838f | 431 | } |
mbed_official | 235:685d5f11838f | 432 | hspi->Instance->DR = *((uint16_t*)hspi->pTxBuffPtr); |
mbed_official | 235:685d5f11838f | 433 | hspi->pTxBuffPtr+=2; |
mbed_official | 235:685d5f11838f | 434 | hspi->TxXferCount--; |
mbed_official | 235:685d5f11838f | 435 | } |
mbed_official | 235:685d5f11838f | 436 | /* Enable CRC Transmission */ |
mbed_official | 235:685d5f11838f | 437 | if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLED) |
mbed_official | 235:685d5f11838f | 438 | { |
mbed_official | 235:685d5f11838f | 439 | hspi->Instance->CR1 |= SPI_CR1_CRCNEXT; |
mbed_official | 235:685d5f11838f | 440 | } |
mbed_official | 235:685d5f11838f | 441 | } |
mbed_official | 235:685d5f11838f | 442 | |
mbed_official | 235:685d5f11838f | 443 | /* Wait until TXE flag is set to send data */ |
mbed_official | 235:685d5f11838f | 444 | if(SPI_WaitOnFlagUntilTimeout(hspi, SPI_FLAG_TXE, RESET, Timeout) != HAL_OK) |
mbed_official | 235:685d5f11838f | 445 | { |
mbed_official | 235:685d5f11838f | 446 | hspi->ErrorCode |= HAL_SPI_ERROR_FLAG; |
mbed_official | 235:685d5f11838f | 447 | return HAL_TIMEOUT; |
mbed_official | 235:685d5f11838f | 448 | } |
mbed_official | 235:685d5f11838f | 449 | |
mbed_official | 235:685d5f11838f | 450 | /* Wait until Busy flag is reset before disabling SPI */ |
mbed_official | 235:685d5f11838f | 451 | if(SPI_WaitOnFlagUntilTimeout(hspi, SPI_FLAG_BSY, SET, Timeout) != HAL_OK) |
mbed_official | 235:685d5f11838f | 452 | { |
mbed_official | 235:685d5f11838f | 453 | hspi->ErrorCode |= HAL_SPI_ERROR_FLAG; |
mbed_official | 235:685d5f11838f | 454 | return HAL_TIMEOUT; |
mbed_official | 235:685d5f11838f | 455 | } |
mbed_official | 235:685d5f11838f | 456 | |
mbed_official | 235:685d5f11838f | 457 | /* Clear OVERUN flag in 2 Lines communication mode because received is not read */ |
mbed_official | 235:685d5f11838f | 458 | if(hspi->Init.Direction == SPI_DIRECTION_2LINES) |
mbed_official | 235:685d5f11838f | 459 | { |
mbed_official | 235:685d5f11838f | 460 | __HAL_SPI_CLEAR_OVRFLAG(hspi); |
mbed_official | 235:685d5f11838f | 461 | } |
mbed_official | 235:685d5f11838f | 462 | |
mbed_official | 235:685d5f11838f | 463 | hspi->State = HAL_SPI_STATE_READY; |
mbed_official | 235:685d5f11838f | 464 | |
mbed_official | 235:685d5f11838f | 465 | /* Process Unlocked */ |
mbed_official | 235:685d5f11838f | 466 | __HAL_UNLOCK(hspi); |
mbed_official | 235:685d5f11838f | 467 | |
mbed_official | 235:685d5f11838f | 468 | return HAL_OK; |
mbed_official | 235:685d5f11838f | 469 | } |
mbed_official | 235:685d5f11838f | 470 | else |
mbed_official | 235:685d5f11838f | 471 | { |
mbed_official | 235:685d5f11838f | 472 | return HAL_BUSY; |
mbed_official | 235:685d5f11838f | 473 | } |
mbed_official | 235:685d5f11838f | 474 | } |
mbed_official | 235:685d5f11838f | 475 | |
mbed_official | 235:685d5f11838f | 476 | /** |
mbed_official | 235:685d5f11838f | 477 | * @brief Receive an amount of data in blocking mode |
mbed_official | 235:685d5f11838f | 478 | * @param hspi: pointer to a SPI_HandleTypeDef structure that contains |
mbed_official | 235:685d5f11838f | 479 | * the configuration information for SPI module. |
mbed_official | 235:685d5f11838f | 480 | * @param pData: pointer to data buffer |
mbed_official | 235:685d5f11838f | 481 | * @param Size: amount of data to be sent |
mbed_official | 235:685d5f11838f | 482 | * @param Timeout: Timeout duration |
mbed_official | 235:685d5f11838f | 483 | * @retval HAL status |
mbed_official | 235:685d5f11838f | 484 | */ |
mbed_official | 235:685d5f11838f | 485 | HAL_StatusTypeDef HAL_SPI_Receive(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size, uint32_t Timeout) |
mbed_official | 235:685d5f11838f | 486 | { |
mbed_official | 235:685d5f11838f | 487 | __IO uint16_t tmpreg; |
mbed_official | 235:685d5f11838f | 488 | uint32_t tmp = 0; |
mbed_official | 235:685d5f11838f | 489 | |
mbed_official | 235:685d5f11838f | 490 | if(hspi->State == HAL_SPI_STATE_READY) |
mbed_official | 235:685d5f11838f | 491 | { |
mbed_official | 235:685d5f11838f | 492 | if((pData == NULL ) || (Size == 0)) |
mbed_official | 235:685d5f11838f | 493 | { |
mbed_official | 235:685d5f11838f | 494 | return HAL_ERROR; |
mbed_official | 235:685d5f11838f | 495 | } |
mbed_official | 235:685d5f11838f | 496 | |
mbed_official | 235:685d5f11838f | 497 | /* Process Locked */ |
mbed_official | 235:685d5f11838f | 498 | __HAL_LOCK(hspi); |
mbed_official | 235:685d5f11838f | 499 | |
mbed_official | 235:685d5f11838f | 500 | /* Configure communication */ |
mbed_official | 235:685d5f11838f | 501 | hspi->State = HAL_SPI_STATE_BUSY_RX; |
mbed_official | 235:685d5f11838f | 502 | hspi->ErrorCode = HAL_SPI_ERROR_NONE; |
mbed_official | 235:685d5f11838f | 503 | |
mbed_official | 235:685d5f11838f | 504 | hspi->pRxBuffPtr = pData; |
mbed_official | 235:685d5f11838f | 505 | hspi->RxXferSize = Size; |
mbed_official | 235:685d5f11838f | 506 | hspi->RxXferCount = Size; |
mbed_official | 235:685d5f11838f | 507 | |
mbed_official | 235:685d5f11838f | 508 | /*Init field not used in handle to zero */ |
mbed_official | 235:685d5f11838f | 509 | hspi->RxISR = 0; |
mbed_official | 235:685d5f11838f | 510 | hspi->TxISR = 0; |
mbed_official | 235:685d5f11838f | 511 | hspi->TxXferSize = 0; |
mbed_official | 235:685d5f11838f | 512 | hspi->TxXferCount = 0; |
mbed_official | 235:685d5f11838f | 513 | |
mbed_official | 235:685d5f11838f | 514 | /* Configure communication direction : 1Line */ |
mbed_official | 235:685d5f11838f | 515 | if(hspi->Init.Direction == SPI_DIRECTION_1LINE) |
mbed_official | 235:685d5f11838f | 516 | { |
mbed_official | 235:685d5f11838f | 517 | __HAL_SPI_1LINE_RX(hspi); |
mbed_official | 235:685d5f11838f | 518 | } |
mbed_official | 235:685d5f11838f | 519 | |
mbed_official | 235:685d5f11838f | 520 | /* Reset CRC Calculation */ |
mbed_official | 235:685d5f11838f | 521 | if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLED) |
mbed_official | 235:685d5f11838f | 522 | { |
mbed_official | 235:685d5f11838f | 523 | __HAL_SPI_RESET_CRC(hspi); |
mbed_official | 235:685d5f11838f | 524 | } |
mbed_official | 235:685d5f11838f | 525 | |
mbed_official | 235:685d5f11838f | 526 | if((hspi->Init.Mode == SPI_MODE_MASTER) && (hspi->Init.Direction == SPI_DIRECTION_2LINES)) |
mbed_official | 235:685d5f11838f | 527 | { |
mbed_official | 235:685d5f11838f | 528 | /* Process Unlocked */ |
mbed_official | 235:685d5f11838f | 529 | __HAL_UNLOCK(hspi); |
mbed_official | 235:685d5f11838f | 530 | |
mbed_official | 235:685d5f11838f | 531 | /* Call transmit-receive function to send Dummy data on Tx line and generate clock on CLK line */ |
mbed_official | 235:685d5f11838f | 532 | return HAL_SPI_TransmitReceive(hspi, pData, pData, Size, Timeout); |
mbed_official | 235:685d5f11838f | 533 | } |
mbed_official | 235:685d5f11838f | 534 | |
mbed_official | 235:685d5f11838f | 535 | /* Check if the SPI is already enabled */ |
mbed_official | 235:685d5f11838f | 536 | if((hspi->Instance->CR1 &SPI_CR1_SPE) != SPI_CR1_SPE) |
mbed_official | 235:685d5f11838f | 537 | { |
mbed_official | 235:685d5f11838f | 538 | /* Enable SPI peripheral */ |
mbed_official | 235:685d5f11838f | 539 | __HAL_SPI_ENABLE(hspi); |
mbed_official | 235:685d5f11838f | 540 | } |
mbed_official | 235:685d5f11838f | 541 | |
mbed_official | 235:685d5f11838f | 542 | /* Receive data in 8 Bit mode */ |
mbed_official | 235:685d5f11838f | 543 | if(hspi->Init.DataSize == SPI_DATASIZE_8BIT) |
mbed_official | 235:685d5f11838f | 544 | { |
mbed_official | 235:685d5f11838f | 545 | while(hspi->RxXferCount > 1) |
mbed_official | 235:685d5f11838f | 546 | { |
mbed_official | 235:685d5f11838f | 547 | /* Wait until RXNE flag is set */ |
mbed_official | 235:685d5f11838f | 548 | if(SPI_WaitOnFlagUntilTimeout(hspi, SPI_FLAG_RXNE, RESET, Timeout) != HAL_OK) |
mbed_official | 235:685d5f11838f | 549 | { |
mbed_official | 235:685d5f11838f | 550 | return HAL_TIMEOUT; |
mbed_official | 235:685d5f11838f | 551 | } |
mbed_official | 235:685d5f11838f | 552 | |
mbed_official | 235:685d5f11838f | 553 | (*hspi->pRxBuffPtr++) = hspi->Instance->DR; |
mbed_official | 235:685d5f11838f | 554 | hspi->RxXferCount--; |
mbed_official | 235:685d5f11838f | 555 | } |
mbed_official | 235:685d5f11838f | 556 | /* Enable CRC Transmission */ |
mbed_official | 235:685d5f11838f | 557 | if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLED) |
mbed_official | 235:685d5f11838f | 558 | { |
mbed_official | 235:685d5f11838f | 559 | hspi->Instance->CR1 |= SPI_CR1_CRCNEXT; |
mbed_official | 235:685d5f11838f | 560 | } |
mbed_official | 235:685d5f11838f | 561 | } |
mbed_official | 235:685d5f11838f | 562 | /* Receive data in 16 Bit mode */ |
mbed_official | 235:685d5f11838f | 563 | else |
mbed_official | 235:685d5f11838f | 564 | { |
mbed_official | 235:685d5f11838f | 565 | while(hspi->RxXferCount > 1) |
mbed_official | 235:685d5f11838f | 566 | { |
mbed_official | 235:685d5f11838f | 567 | /* Wait until RXNE flag is set to read data */ |
mbed_official | 235:685d5f11838f | 568 | if(SPI_WaitOnFlagUntilTimeout(hspi, SPI_FLAG_RXNE, RESET, Timeout) != HAL_OK) |
mbed_official | 235:685d5f11838f | 569 | { |
mbed_official | 235:685d5f11838f | 570 | return HAL_TIMEOUT; |
mbed_official | 235:685d5f11838f | 571 | } |
mbed_official | 235:685d5f11838f | 572 | |
mbed_official | 235:685d5f11838f | 573 | *((uint16_t*)hspi->pRxBuffPtr) = hspi->Instance->DR; |
mbed_official | 235:685d5f11838f | 574 | hspi->pRxBuffPtr+=2; |
mbed_official | 235:685d5f11838f | 575 | hspi->RxXferCount--; |
mbed_official | 235:685d5f11838f | 576 | } |
mbed_official | 235:685d5f11838f | 577 | /* Enable CRC Transmission */ |
mbed_official | 235:685d5f11838f | 578 | if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLED) |
mbed_official | 235:685d5f11838f | 579 | { |
mbed_official | 235:685d5f11838f | 580 | hspi->Instance->CR1 |= SPI_CR1_CRCNEXT; |
mbed_official | 235:685d5f11838f | 581 | } |
mbed_official | 235:685d5f11838f | 582 | } |
mbed_official | 235:685d5f11838f | 583 | |
mbed_official | 235:685d5f11838f | 584 | /* Wait until RXNE flag is set */ |
mbed_official | 235:685d5f11838f | 585 | if(SPI_WaitOnFlagUntilTimeout(hspi, SPI_FLAG_RXNE, RESET, Timeout) != HAL_OK) |
mbed_official | 235:685d5f11838f | 586 | { |
mbed_official | 235:685d5f11838f | 587 | return HAL_TIMEOUT; |
mbed_official | 235:685d5f11838f | 588 | } |
mbed_official | 235:685d5f11838f | 589 | |
mbed_official | 235:685d5f11838f | 590 | /* Receive last data in 8 Bit mode */ |
mbed_official | 235:685d5f11838f | 591 | if(hspi->Init.DataSize == SPI_DATASIZE_8BIT) |
mbed_official | 235:685d5f11838f | 592 | { |
mbed_official | 235:685d5f11838f | 593 | (*hspi->pRxBuffPtr++) = hspi->Instance->DR; |
mbed_official | 235:685d5f11838f | 594 | } |
mbed_official | 235:685d5f11838f | 595 | /* Receive last data in 16 Bit mode */ |
mbed_official | 235:685d5f11838f | 596 | else |
mbed_official | 235:685d5f11838f | 597 | { |
mbed_official | 235:685d5f11838f | 598 | *((uint16_t*)hspi->pRxBuffPtr) = hspi->Instance->DR; |
mbed_official | 235:685d5f11838f | 599 | hspi->pRxBuffPtr+=2; |
mbed_official | 235:685d5f11838f | 600 | } |
mbed_official | 235:685d5f11838f | 601 | hspi->RxXferCount--; |
mbed_official | 235:685d5f11838f | 602 | |
mbed_official | 235:685d5f11838f | 603 | /* Wait until RXNE flag is set: CRC Received */ |
mbed_official | 235:685d5f11838f | 604 | if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLED) |
mbed_official | 235:685d5f11838f | 605 | { |
mbed_official | 235:685d5f11838f | 606 | if(SPI_WaitOnFlagUntilTimeout(hspi, SPI_FLAG_RXNE, RESET, Timeout) != HAL_OK) |
mbed_official | 235:685d5f11838f | 607 | { |
mbed_official | 235:685d5f11838f | 608 | hspi->ErrorCode |= HAL_SPI_ERROR_CRC; |
mbed_official | 235:685d5f11838f | 609 | return HAL_TIMEOUT; |
mbed_official | 235:685d5f11838f | 610 | } |
mbed_official | 235:685d5f11838f | 611 | |
mbed_official | 235:685d5f11838f | 612 | /* Read CRC to Flush RXNE flag */ |
mbed_official | 235:685d5f11838f | 613 | tmpreg = hspi->Instance->DR; |
mbed_official | 235:685d5f11838f | 614 | } |
mbed_official | 235:685d5f11838f | 615 | |
mbed_official | 235:685d5f11838f | 616 | if((hspi->Init.Mode == SPI_MODE_MASTER)&&((hspi->Init.Direction == SPI_DIRECTION_1LINE)||(hspi->Init.Direction == SPI_DIRECTION_2LINES_RXONLY))) |
mbed_official | 235:685d5f11838f | 617 | { |
mbed_official | 235:685d5f11838f | 618 | /* Disable SPI peripheral */ |
mbed_official | 235:685d5f11838f | 619 | __HAL_SPI_DISABLE(hspi); |
mbed_official | 235:685d5f11838f | 620 | } |
mbed_official | 235:685d5f11838f | 621 | |
mbed_official | 235:685d5f11838f | 622 | hspi->State = HAL_SPI_STATE_READY; |
mbed_official | 235:685d5f11838f | 623 | |
mbed_official | 235:685d5f11838f | 624 | tmp = __HAL_SPI_GET_FLAG(hspi, SPI_FLAG_CRCERR); |
mbed_official | 235:685d5f11838f | 625 | /* Check if CRC error occurred */ |
mbed_official | 235:685d5f11838f | 626 | if((hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLED) && (tmp != RESET)) |
mbed_official | 235:685d5f11838f | 627 | { |
mbed_official | 235:685d5f11838f | 628 | hspi->ErrorCode |= HAL_SPI_ERROR_CRC; |
mbed_official | 235:685d5f11838f | 629 | |
mbed_official | 235:685d5f11838f | 630 | /* Reset CRC Calculation */ |
mbed_official | 235:685d5f11838f | 631 | __HAL_SPI_RESET_CRC(hspi); |
mbed_official | 235:685d5f11838f | 632 | |
mbed_official | 235:685d5f11838f | 633 | /* Process Unlocked */ |
mbed_official | 235:685d5f11838f | 634 | __HAL_UNLOCK(hspi); |
mbed_official | 235:685d5f11838f | 635 | |
mbed_official | 235:685d5f11838f | 636 | return HAL_ERROR; |
mbed_official | 235:685d5f11838f | 637 | } |
mbed_official | 235:685d5f11838f | 638 | |
mbed_official | 235:685d5f11838f | 639 | /* Process Unlocked */ |
mbed_official | 235:685d5f11838f | 640 | __HAL_UNLOCK(hspi); |
mbed_official | 235:685d5f11838f | 641 | |
mbed_official | 235:685d5f11838f | 642 | return HAL_OK; |
mbed_official | 235:685d5f11838f | 643 | } |
mbed_official | 235:685d5f11838f | 644 | else |
mbed_official | 235:685d5f11838f | 645 | { |
mbed_official | 235:685d5f11838f | 646 | return HAL_BUSY; |
mbed_official | 235:685d5f11838f | 647 | } |
mbed_official | 235:685d5f11838f | 648 | } |
mbed_official | 235:685d5f11838f | 649 | |
mbed_official | 235:685d5f11838f | 650 | /** |
mbed_official | 235:685d5f11838f | 651 | * @brief Transmit and Receive an amount of data in blocking mode |
mbed_official | 235:685d5f11838f | 652 | * @param hspi: pointer to a SPI_HandleTypeDef structure that contains |
mbed_official | 235:685d5f11838f | 653 | * the configuration information for SPI module. |
mbed_official | 235:685d5f11838f | 654 | * @param pTxData: pointer to transmission data buffer |
mbed_official | 235:685d5f11838f | 655 | * @param pRxData: pointer to reception data buffer to be |
mbed_official | 235:685d5f11838f | 656 | * @param Size: amount of data to be sent |
mbed_official | 235:685d5f11838f | 657 | * @param Timeout: Timeout duration |
mbed_official | 235:685d5f11838f | 658 | * @retval HAL status |
mbed_official | 235:685d5f11838f | 659 | */ |
mbed_official | 235:685d5f11838f | 660 | HAL_StatusTypeDef HAL_SPI_TransmitReceive(SPI_HandleTypeDef *hspi, uint8_t *pTxData, uint8_t *pRxData, uint16_t Size, uint32_t Timeout) |
mbed_official | 235:685d5f11838f | 661 | { |
mbed_official | 235:685d5f11838f | 662 | __IO uint16_t tmpreg; |
mbed_official | 235:685d5f11838f | 663 | uint32_t tmpstate = 0, tmp = 0; |
mbed_official | 235:685d5f11838f | 664 | |
mbed_official | 235:685d5f11838f | 665 | tmpstate = hspi->State; |
mbed_official | 235:685d5f11838f | 666 | if((tmpstate == HAL_SPI_STATE_READY) || (tmpstate == HAL_SPI_STATE_BUSY_RX)) |
mbed_official | 235:685d5f11838f | 667 | { |
mbed_official | 235:685d5f11838f | 668 | if((pTxData == NULL ) || (pRxData == NULL ) || (Size == 0)) |
mbed_official | 235:685d5f11838f | 669 | { |
mbed_official | 235:685d5f11838f | 670 | return HAL_ERROR; |
mbed_official | 235:685d5f11838f | 671 | } |
mbed_official | 235:685d5f11838f | 672 | |
mbed_official | 235:685d5f11838f | 673 | /* Check the parameters */ |
mbed_official | 235:685d5f11838f | 674 | assert_param(IS_SPI_DIRECTION_2LINES(hspi->Init.Direction)); |
mbed_official | 235:685d5f11838f | 675 | |
mbed_official | 235:685d5f11838f | 676 | /* Process Locked */ |
mbed_official | 235:685d5f11838f | 677 | __HAL_LOCK(hspi); |
mbed_official | 235:685d5f11838f | 678 | |
mbed_official | 235:685d5f11838f | 679 | /* Don't overwrite in case of HAL_SPI_STATE_BUSY_RX */ |
mbed_official | 235:685d5f11838f | 680 | if(hspi->State == HAL_SPI_STATE_READY) |
mbed_official | 235:685d5f11838f | 681 | { |
mbed_official | 235:685d5f11838f | 682 | hspi->State = HAL_SPI_STATE_BUSY_TX_RX; |
mbed_official | 235:685d5f11838f | 683 | } |
mbed_official | 235:685d5f11838f | 684 | |
mbed_official | 235:685d5f11838f | 685 | /* Configure communication */ |
mbed_official | 235:685d5f11838f | 686 | hspi->ErrorCode = HAL_SPI_ERROR_NONE; |
mbed_official | 235:685d5f11838f | 687 | |
mbed_official | 235:685d5f11838f | 688 | hspi->pRxBuffPtr = pRxData; |
mbed_official | 235:685d5f11838f | 689 | hspi->RxXferSize = Size; |
mbed_official | 235:685d5f11838f | 690 | hspi->RxXferCount = Size; |
mbed_official | 235:685d5f11838f | 691 | |
mbed_official | 235:685d5f11838f | 692 | hspi->pTxBuffPtr = pTxData; |
mbed_official | 235:685d5f11838f | 693 | hspi->TxXferSize = Size; |
mbed_official | 235:685d5f11838f | 694 | hspi->TxXferCount = Size; |
mbed_official | 235:685d5f11838f | 695 | |
mbed_official | 235:685d5f11838f | 696 | /*Init field not used in handle to zero */ |
mbed_official | 235:685d5f11838f | 697 | hspi->RxISR = 0; |
mbed_official | 235:685d5f11838f | 698 | hspi->TxISR = 0; |
mbed_official | 235:685d5f11838f | 699 | |
mbed_official | 235:685d5f11838f | 700 | /* Reset CRC Calculation */ |
mbed_official | 235:685d5f11838f | 701 | if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLED) |
mbed_official | 235:685d5f11838f | 702 | { |
mbed_official | 235:685d5f11838f | 703 | __HAL_SPI_RESET_CRC(hspi); |
mbed_official | 235:685d5f11838f | 704 | } |
mbed_official | 235:685d5f11838f | 705 | |
mbed_official | 235:685d5f11838f | 706 | /* Check if the SPI is already enabled */ |
mbed_official | 235:685d5f11838f | 707 | if((hspi->Instance->CR1 &SPI_CR1_SPE) != SPI_CR1_SPE) |
mbed_official | 235:685d5f11838f | 708 | { |
mbed_official | 235:685d5f11838f | 709 | /* Enable SPI peripheral */ |
mbed_official | 235:685d5f11838f | 710 | __HAL_SPI_ENABLE(hspi); |
mbed_official | 235:685d5f11838f | 711 | } |
mbed_official | 235:685d5f11838f | 712 | |
mbed_official | 235:685d5f11838f | 713 | /* Transmit and Receive data in 16 Bit mode */ |
mbed_official | 235:685d5f11838f | 714 | if(hspi->Init.DataSize == SPI_DATASIZE_16BIT) |
mbed_official | 235:685d5f11838f | 715 | { |
mbed_official | 235:685d5f11838f | 716 | if((hspi->Init.Mode == SPI_MODE_SLAVE) || ((hspi->Init.Mode == SPI_MODE_MASTER) && (hspi->TxXferCount == 0x01))) |
mbed_official | 235:685d5f11838f | 717 | { |
mbed_official | 235:685d5f11838f | 718 | hspi->Instance->DR = *((uint16_t*)hspi->pTxBuffPtr); |
mbed_official | 235:685d5f11838f | 719 | hspi->pTxBuffPtr+=2; |
mbed_official | 235:685d5f11838f | 720 | hspi->TxXferCount--; |
mbed_official | 235:685d5f11838f | 721 | } |
mbed_official | 235:685d5f11838f | 722 | if(hspi->TxXferCount == 0) |
mbed_official | 235:685d5f11838f | 723 | { |
mbed_official | 235:685d5f11838f | 724 | /* Enable CRC Transmission */ |
mbed_official | 235:685d5f11838f | 725 | if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLED) |
mbed_official | 235:685d5f11838f | 726 | { |
mbed_official | 235:685d5f11838f | 727 | hspi->Instance->CR1 |= SPI_CR1_CRCNEXT; |
mbed_official | 235:685d5f11838f | 728 | } |
mbed_official | 235:685d5f11838f | 729 | |
mbed_official | 235:685d5f11838f | 730 | /* Wait until RXNE flag is set */ |
mbed_official | 235:685d5f11838f | 731 | if(SPI_WaitOnFlagUntilTimeout(hspi, SPI_FLAG_RXNE, RESET, Timeout) != HAL_OK) |
mbed_official | 235:685d5f11838f | 732 | { |
mbed_official | 235:685d5f11838f | 733 | return HAL_TIMEOUT; |
mbed_official | 235:685d5f11838f | 734 | } |
mbed_official | 235:685d5f11838f | 735 | |
mbed_official | 235:685d5f11838f | 736 | *((uint16_t*)hspi->pRxBuffPtr) = hspi->Instance->DR; |
mbed_official | 235:685d5f11838f | 737 | hspi->pRxBuffPtr+=2; |
mbed_official | 235:685d5f11838f | 738 | hspi->RxXferCount--; |
mbed_official | 235:685d5f11838f | 739 | } |
mbed_official | 235:685d5f11838f | 740 | else |
mbed_official | 235:685d5f11838f | 741 | { |
mbed_official | 235:685d5f11838f | 742 | while(hspi->TxXferCount > 0) |
mbed_official | 235:685d5f11838f | 743 | { |
mbed_official | 235:685d5f11838f | 744 | /* Wait until TXE flag is set to send data */ |
mbed_official | 235:685d5f11838f | 745 | if(SPI_WaitOnFlagUntilTimeout(hspi, SPI_FLAG_TXE, RESET, Timeout) != HAL_OK) |
mbed_official | 235:685d5f11838f | 746 | { |
mbed_official | 235:685d5f11838f | 747 | return HAL_TIMEOUT; |
mbed_official | 235:685d5f11838f | 748 | } |
mbed_official | 235:685d5f11838f | 749 | |
mbed_official | 235:685d5f11838f | 750 | hspi->Instance->DR = *((uint16_t*)hspi->pTxBuffPtr); |
mbed_official | 235:685d5f11838f | 751 | hspi->pTxBuffPtr+=2; |
mbed_official | 235:685d5f11838f | 752 | hspi->TxXferCount--; |
mbed_official | 235:685d5f11838f | 753 | |
mbed_official | 235:685d5f11838f | 754 | /* Enable CRC Transmission */ |
mbed_official | 235:685d5f11838f | 755 | if((hspi->TxXferCount == 0) && (hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLED)) |
mbed_official | 235:685d5f11838f | 756 | { |
mbed_official | 235:685d5f11838f | 757 | hspi->Instance->CR1 |= SPI_CR1_CRCNEXT; |
mbed_official | 235:685d5f11838f | 758 | } |
mbed_official | 235:685d5f11838f | 759 | |
mbed_official | 235:685d5f11838f | 760 | /* Wait until RXNE flag is set */ |
mbed_official | 235:685d5f11838f | 761 | if(SPI_WaitOnFlagUntilTimeout(hspi, SPI_FLAG_RXNE, RESET, Timeout) != HAL_OK) |
mbed_official | 235:685d5f11838f | 762 | { |
mbed_official | 235:685d5f11838f | 763 | return HAL_TIMEOUT; |
mbed_official | 235:685d5f11838f | 764 | } |
mbed_official | 235:685d5f11838f | 765 | |
mbed_official | 235:685d5f11838f | 766 | *((uint16_t*)hspi->pRxBuffPtr) = hspi->Instance->DR; |
mbed_official | 235:685d5f11838f | 767 | hspi->pRxBuffPtr+=2; |
mbed_official | 235:685d5f11838f | 768 | hspi->RxXferCount--; |
mbed_official | 235:685d5f11838f | 769 | } |
mbed_official | 235:685d5f11838f | 770 | /* Receive the last byte */ |
mbed_official | 235:685d5f11838f | 771 | if(hspi->Init.Mode == SPI_MODE_SLAVE) |
mbed_official | 235:685d5f11838f | 772 | { |
mbed_official | 235:685d5f11838f | 773 | /* Wait until RXNE flag is set */ |
mbed_official | 235:685d5f11838f | 774 | if(SPI_WaitOnFlagUntilTimeout(hspi, SPI_FLAG_RXNE, RESET, Timeout) != HAL_OK) |
mbed_official | 235:685d5f11838f | 775 | { |
mbed_official | 235:685d5f11838f | 776 | return HAL_TIMEOUT; |
mbed_official | 235:685d5f11838f | 777 | } |
mbed_official | 235:685d5f11838f | 778 | |
mbed_official | 235:685d5f11838f | 779 | *((uint16_t*)hspi->pRxBuffPtr) = hspi->Instance->DR; |
mbed_official | 235:685d5f11838f | 780 | hspi->pRxBuffPtr+=2; |
mbed_official | 235:685d5f11838f | 781 | hspi->RxXferCount--; |
mbed_official | 235:685d5f11838f | 782 | } |
mbed_official | 235:685d5f11838f | 783 | } |
mbed_official | 235:685d5f11838f | 784 | } |
mbed_official | 235:685d5f11838f | 785 | /* Transmit and Receive data in 8 Bit mode */ |
mbed_official | 235:685d5f11838f | 786 | else |
mbed_official | 235:685d5f11838f | 787 | { |
mbed_official | 235:685d5f11838f | 788 | if((hspi->Init.Mode == SPI_MODE_SLAVE) || ((hspi->Init.Mode == SPI_MODE_MASTER) && (hspi->TxXferCount == 0x01))) |
mbed_official | 235:685d5f11838f | 789 | { |
mbed_official | 235:685d5f11838f | 790 | hspi->Instance->DR = (*hspi->pTxBuffPtr++); |
mbed_official | 235:685d5f11838f | 791 | hspi->TxXferCount--; |
mbed_official | 235:685d5f11838f | 792 | } |
mbed_official | 235:685d5f11838f | 793 | if(hspi->TxXferCount == 0) |
mbed_official | 235:685d5f11838f | 794 | { |
mbed_official | 235:685d5f11838f | 795 | /* Enable CRC Transmission */ |
mbed_official | 235:685d5f11838f | 796 | if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLED) |
mbed_official | 235:685d5f11838f | 797 | { |
mbed_official | 235:685d5f11838f | 798 | hspi->Instance->CR1 |= SPI_CR1_CRCNEXT; |
mbed_official | 235:685d5f11838f | 799 | } |
mbed_official | 235:685d5f11838f | 800 | |
mbed_official | 235:685d5f11838f | 801 | /* Wait until RXNE flag is set */ |
mbed_official | 235:685d5f11838f | 802 | if(SPI_WaitOnFlagUntilTimeout(hspi, SPI_FLAG_RXNE, RESET, Timeout) != HAL_OK) |
mbed_official | 235:685d5f11838f | 803 | { |
mbed_official | 235:685d5f11838f | 804 | return HAL_TIMEOUT; |
mbed_official | 235:685d5f11838f | 805 | } |
mbed_official | 235:685d5f11838f | 806 | |
mbed_official | 235:685d5f11838f | 807 | (*hspi->pRxBuffPtr) = hspi->Instance->DR; |
mbed_official | 235:685d5f11838f | 808 | hspi->RxXferCount--; |
mbed_official | 235:685d5f11838f | 809 | } |
mbed_official | 235:685d5f11838f | 810 | else |
mbed_official | 235:685d5f11838f | 811 | { |
mbed_official | 235:685d5f11838f | 812 | while(hspi->TxXferCount > 0) |
mbed_official | 235:685d5f11838f | 813 | { |
mbed_official | 235:685d5f11838f | 814 | /* Wait until TXE flag is set to send data */ |
mbed_official | 235:685d5f11838f | 815 | if(SPI_WaitOnFlagUntilTimeout(hspi, SPI_FLAG_TXE, RESET, Timeout) != HAL_OK) |
mbed_official | 235:685d5f11838f | 816 | { |
mbed_official | 235:685d5f11838f | 817 | return HAL_TIMEOUT; |
mbed_official | 235:685d5f11838f | 818 | } |
mbed_official | 235:685d5f11838f | 819 | |
mbed_official | 235:685d5f11838f | 820 | hspi->Instance->DR = (*hspi->pTxBuffPtr++); |
mbed_official | 235:685d5f11838f | 821 | hspi->TxXferCount--; |
mbed_official | 235:685d5f11838f | 822 | |
mbed_official | 235:685d5f11838f | 823 | /* Enable CRC Transmission */ |
mbed_official | 235:685d5f11838f | 824 | if((hspi->TxXferCount == 0) && (hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLED)) |
mbed_official | 235:685d5f11838f | 825 | { |
mbed_official | 235:685d5f11838f | 826 | hspi->Instance->CR1 |= SPI_CR1_CRCNEXT; |
mbed_official | 235:685d5f11838f | 827 | } |
mbed_official | 235:685d5f11838f | 828 | |
mbed_official | 235:685d5f11838f | 829 | /* Wait until RXNE flag is set */ |
mbed_official | 235:685d5f11838f | 830 | if(SPI_WaitOnFlagUntilTimeout(hspi, SPI_FLAG_RXNE, RESET, Timeout) != HAL_OK) |
mbed_official | 235:685d5f11838f | 831 | { |
mbed_official | 235:685d5f11838f | 832 | return HAL_TIMEOUT; |
mbed_official | 235:685d5f11838f | 833 | } |
mbed_official | 235:685d5f11838f | 834 | |
mbed_official | 235:685d5f11838f | 835 | (*hspi->pRxBuffPtr++) = hspi->Instance->DR; |
mbed_official | 235:685d5f11838f | 836 | hspi->RxXferCount--; |
mbed_official | 235:685d5f11838f | 837 | } |
mbed_official | 235:685d5f11838f | 838 | if(hspi->Init.Mode == SPI_MODE_SLAVE) |
mbed_official | 235:685d5f11838f | 839 | { |
mbed_official | 235:685d5f11838f | 840 | /* Wait until RXNE flag is set */ |
mbed_official | 235:685d5f11838f | 841 | if(SPI_WaitOnFlagUntilTimeout(hspi, SPI_FLAG_RXNE, RESET, Timeout) != HAL_OK) |
mbed_official | 235:685d5f11838f | 842 | { |
mbed_official | 235:685d5f11838f | 843 | return HAL_TIMEOUT; |
mbed_official | 235:685d5f11838f | 844 | } |
mbed_official | 235:685d5f11838f | 845 | |
mbed_official | 235:685d5f11838f | 846 | (*hspi->pRxBuffPtr++) = hspi->Instance->DR; |
mbed_official | 235:685d5f11838f | 847 | hspi->RxXferCount--; |
mbed_official | 235:685d5f11838f | 848 | } |
mbed_official | 235:685d5f11838f | 849 | } |
mbed_official | 235:685d5f11838f | 850 | } |
mbed_official | 235:685d5f11838f | 851 | |
mbed_official | 235:685d5f11838f | 852 | /* Read CRC from DR to close CRC calculation process */ |
mbed_official | 235:685d5f11838f | 853 | if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLED) |
mbed_official | 235:685d5f11838f | 854 | { |
mbed_official | 235:685d5f11838f | 855 | /* Wait until RXNE flag is set */ |
mbed_official | 235:685d5f11838f | 856 | if(SPI_WaitOnFlagUntilTimeout(hspi, SPI_FLAG_RXNE, RESET, Timeout) != HAL_OK) |
mbed_official | 235:685d5f11838f | 857 | { |
mbed_official | 235:685d5f11838f | 858 | hspi->ErrorCode |= HAL_SPI_ERROR_CRC; |
mbed_official | 235:685d5f11838f | 859 | return HAL_TIMEOUT; |
mbed_official | 235:685d5f11838f | 860 | } |
mbed_official | 235:685d5f11838f | 861 | /* Read CRC */ |
mbed_official | 235:685d5f11838f | 862 | tmpreg = hspi->Instance->DR; |
mbed_official | 235:685d5f11838f | 863 | } |
mbed_official | 235:685d5f11838f | 864 | |
mbed_official | 235:685d5f11838f | 865 | /* Wait until Busy flag is reset before disabling SPI */ |
mbed_official | 235:685d5f11838f | 866 | if(SPI_WaitOnFlagUntilTimeout(hspi, SPI_FLAG_BSY, SET, Timeout) != HAL_OK) |
mbed_official | 235:685d5f11838f | 867 | { |
mbed_official | 235:685d5f11838f | 868 | hspi->ErrorCode |= HAL_SPI_ERROR_FLAG; |
mbed_official | 235:685d5f11838f | 869 | return HAL_TIMEOUT; |
mbed_official | 235:685d5f11838f | 870 | } |
mbed_official | 235:685d5f11838f | 871 | |
mbed_official | 235:685d5f11838f | 872 | hspi->State = HAL_SPI_STATE_READY; |
mbed_official | 235:685d5f11838f | 873 | |
mbed_official | 235:685d5f11838f | 874 | tmp = __HAL_SPI_GET_FLAG(hspi, SPI_FLAG_CRCERR); |
mbed_official | 235:685d5f11838f | 875 | /* Check if CRC error occurred */ |
mbed_official | 235:685d5f11838f | 876 | if((hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLED) && (tmp != RESET)) |
mbed_official | 235:685d5f11838f | 877 | { |
mbed_official | 235:685d5f11838f | 878 | hspi->ErrorCode |= HAL_SPI_ERROR_CRC; |
mbed_official | 235:685d5f11838f | 879 | |
mbed_official | 235:685d5f11838f | 880 | /* Reset CRC Calculation */ |
mbed_official | 235:685d5f11838f | 881 | if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLED) |
mbed_official | 235:685d5f11838f | 882 | { |
mbed_official | 235:685d5f11838f | 883 | __HAL_SPI_RESET_CRC(hspi); |
mbed_official | 235:685d5f11838f | 884 | } |
mbed_official | 235:685d5f11838f | 885 | |
mbed_official | 235:685d5f11838f | 886 | /* Process Unlocked */ |
mbed_official | 235:685d5f11838f | 887 | __HAL_UNLOCK(hspi); |
mbed_official | 235:685d5f11838f | 888 | |
mbed_official | 235:685d5f11838f | 889 | return HAL_ERROR; |
mbed_official | 235:685d5f11838f | 890 | } |
mbed_official | 235:685d5f11838f | 891 | |
mbed_official | 235:685d5f11838f | 892 | /* Process Unlocked */ |
mbed_official | 235:685d5f11838f | 893 | __HAL_UNLOCK(hspi); |
mbed_official | 235:685d5f11838f | 894 | |
mbed_official | 235:685d5f11838f | 895 | return HAL_OK; |
mbed_official | 235:685d5f11838f | 896 | } |
mbed_official | 235:685d5f11838f | 897 | else |
mbed_official | 235:685d5f11838f | 898 | { |
mbed_official | 235:685d5f11838f | 899 | return HAL_BUSY; |
mbed_official | 235:685d5f11838f | 900 | } |
mbed_official | 235:685d5f11838f | 901 | } |
mbed_official | 235:685d5f11838f | 902 | |
mbed_official | 235:685d5f11838f | 903 | /** |
mbed_official | 235:685d5f11838f | 904 | * @brief Transmit an amount of data in no-blocking mode with Interrupt |
mbed_official | 235:685d5f11838f | 905 | * @param hspi: pointer to a SPI_HandleTypeDef structure that contains |
mbed_official | 235:685d5f11838f | 906 | * the configuration information for SPI module. |
mbed_official | 235:685d5f11838f | 907 | * @param pData: pointer to data buffer |
mbed_official | 235:685d5f11838f | 908 | * @param Size: amount of data to be sent |
mbed_official | 235:685d5f11838f | 909 | * @retval HAL status |
mbed_official | 235:685d5f11838f | 910 | */ |
mbed_official | 235:685d5f11838f | 911 | HAL_StatusTypeDef HAL_SPI_Transmit_IT(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size) |
mbed_official | 235:685d5f11838f | 912 | { |
mbed_official | 235:685d5f11838f | 913 | if(hspi->State == HAL_SPI_STATE_READY) |
mbed_official | 235:685d5f11838f | 914 | { |
mbed_official | 235:685d5f11838f | 915 | if((pData == NULL) || (Size == 0)) |
mbed_official | 235:685d5f11838f | 916 | { |
mbed_official | 235:685d5f11838f | 917 | return HAL_ERROR; |
mbed_official | 235:685d5f11838f | 918 | } |
mbed_official | 235:685d5f11838f | 919 | |
mbed_official | 235:685d5f11838f | 920 | /* Check the parameters */ |
mbed_official | 235:685d5f11838f | 921 | assert_param(IS_SPI_DIRECTION_2LINES_OR_1LINE(hspi->Init.Direction)); |
mbed_official | 235:685d5f11838f | 922 | |
mbed_official | 235:685d5f11838f | 923 | /* Process Locked */ |
mbed_official | 235:685d5f11838f | 924 | __HAL_LOCK(hspi); |
mbed_official | 235:685d5f11838f | 925 | |
mbed_official | 235:685d5f11838f | 926 | /* Configure communication */ |
mbed_official | 235:685d5f11838f | 927 | hspi->State = HAL_SPI_STATE_BUSY_TX; |
mbed_official | 235:685d5f11838f | 928 | hspi->ErrorCode = HAL_SPI_ERROR_NONE; |
mbed_official | 235:685d5f11838f | 929 | |
mbed_official | 235:685d5f11838f | 930 | hspi->TxISR = &SPI_TxISR; |
mbed_official | 235:685d5f11838f | 931 | hspi->pTxBuffPtr = pData; |
mbed_official | 235:685d5f11838f | 932 | hspi->TxXferSize = Size; |
mbed_official | 235:685d5f11838f | 933 | hspi->TxXferCount = Size; |
mbed_official | 235:685d5f11838f | 934 | |
mbed_official | 235:685d5f11838f | 935 | /*Init field not used in handle to zero */ |
mbed_official | 235:685d5f11838f | 936 | hspi->RxISR = 0; |
mbed_official | 235:685d5f11838f | 937 | hspi->RxXferSize = 0; |
mbed_official | 235:685d5f11838f | 938 | hspi->RxXferCount = 0; |
mbed_official | 235:685d5f11838f | 939 | |
mbed_official | 235:685d5f11838f | 940 | /* Configure communication direction : 1Line */ |
mbed_official | 235:685d5f11838f | 941 | if(hspi->Init.Direction == SPI_DIRECTION_1LINE) |
mbed_official | 235:685d5f11838f | 942 | { |
mbed_official | 235:685d5f11838f | 943 | __HAL_SPI_1LINE_TX(hspi); |
mbed_official | 235:685d5f11838f | 944 | } |
mbed_official | 235:685d5f11838f | 945 | |
mbed_official | 235:685d5f11838f | 946 | /* Reset CRC Calculation */ |
mbed_official | 235:685d5f11838f | 947 | if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLED) |
mbed_official | 235:685d5f11838f | 948 | { |
mbed_official | 235:685d5f11838f | 949 | __HAL_SPI_RESET_CRC(hspi); |
mbed_official | 235:685d5f11838f | 950 | } |
mbed_official | 235:685d5f11838f | 951 | |
mbed_official | 235:685d5f11838f | 952 | if (hspi->Init.Direction == SPI_DIRECTION_2LINES) |
mbed_official | 235:685d5f11838f | 953 | { |
mbed_official | 235:685d5f11838f | 954 | __HAL_SPI_ENABLE_IT(hspi, (SPI_IT_TXE)); |
mbed_official | 235:685d5f11838f | 955 | }else |
mbed_official | 235:685d5f11838f | 956 | { |
mbed_official | 235:685d5f11838f | 957 | /* Enable TXE and ERR interrupt */ |
mbed_official | 235:685d5f11838f | 958 | __HAL_SPI_ENABLE_IT(hspi, (SPI_IT_TXE | SPI_IT_ERR)); |
mbed_official | 235:685d5f11838f | 959 | } |
mbed_official | 235:685d5f11838f | 960 | /* Process Unlocked */ |
mbed_official | 235:685d5f11838f | 961 | __HAL_UNLOCK(hspi); |
mbed_official | 235:685d5f11838f | 962 | |
mbed_official | 235:685d5f11838f | 963 | /* Check if the SPI is already enabled */ |
mbed_official | 235:685d5f11838f | 964 | if((hspi->Instance->CR1 &SPI_CR1_SPE) != SPI_CR1_SPE) |
mbed_official | 235:685d5f11838f | 965 | { |
mbed_official | 235:685d5f11838f | 966 | /* Enable SPI peripheral */ |
mbed_official | 235:685d5f11838f | 967 | __HAL_SPI_ENABLE(hspi); |
mbed_official | 235:685d5f11838f | 968 | } |
mbed_official | 235:685d5f11838f | 969 | |
mbed_official | 235:685d5f11838f | 970 | return HAL_OK; |
mbed_official | 235:685d5f11838f | 971 | } |
mbed_official | 235:685d5f11838f | 972 | else |
mbed_official | 235:685d5f11838f | 973 | { |
mbed_official | 235:685d5f11838f | 974 | return HAL_BUSY; |
mbed_official | 235:685d5f11838f | 975 | } |
mbed_official | 235:685d5f11838f | 976 | } |
mbed_official | 235:685d5f11838f | 977 | |
mbed_official | 235:685d5f11838f | 978 | /** |
mbed_official | 235:685d5f11838f | 979 | * @brief Receive an amount of data in no-blocking mode with Interrupt |
mbed_official | 235:685d5f11838f | 980 | * @param hspi: pointer to a SPI_HandleTypeDef structure that contains |
mbed_official | 235:685d5f11838f | 981 | * the configuration information for SPI module. |
mbed_official | 235:685d5f11838f | 982 | * @param pData: pointer to data buffer |
mbed_official | 235:685d5f11838f | 983 | * @param Size: amount of data to be sent |
mbed_official | 235:685d5f11838f | 984 | * @retval HAL status |
mbed_official | 235:685d5f11838f | 985 | */ |
mbed_official | 235:685d5f11838f | 986 | HAL_StatusTypeDef HAL_SPI_Receive_IT(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size) |
mbed_official | 235:685d5f11838f | 987 | { |
mbed_official | 235:685d5f11838f | 988 | if(hspi->State == HAL_SPI_STATE_READY) |
mbed_official | 235:685d5f11838f | 989 | { |
mbed_official | 235:685d5f11838f | 990 | if((pData == NULL) || (Size == 0)) |
mbed_official | 235:685d5f11838f | 991 | { |
mbed_official | 235:685d5f11838f | 992 | return HAL_ERROR; |
mbed_official | 235:685d5f11838f | 993 | } |
mbed_official | 235:685d5f11838f | 994 | |
mbed_official | 235:685d5f11838f | 995 | /* Process Locked */ |
mbed_official | 235:685d5f11838f | 996 | __HAL_LOCK(hspi); |
mbed_official | 235:685d5f11838f | 997 | |
mbed_official | 235:685d5f11838f | 998 | /* Configure communication */ |
mbed_official | 235:685d5f11838f | 999 | hspi->State = HAL_SPI_STATE_BUSY_RX; |
mbed_official | 235:685d5f11838f | 1000 | hspi->ErrorCode = HAL_SPI_ERROR_NONE; |
mbed_official | 235:685d5f11838f | 1001 | |
mbed_official | 235:685d5f11838f | 1002 | hspi->RxISR = &SPI_RxISR; |
mbed_official | 235:685d5f11838f | 1003 | hspi->pRxBuffPtr = pData; |
mbed_official | 235:685d5f11838f | 1004 | hspi->RxXferSize = Size; |
mbed_official | 235:685d5f11838f | 1005 | hspi->RxXferCount = Size ; |
mbed_official | 235:685d5f11838f | 1006 | |
mbed_official | 235:685d5f11838f | 1007 | /*Init field not used in handle to zero */ |
mbed_official | 235:685d5f11838f | 1008 | hspi->TxISR = 0; |
mbed_official | 235:685d5f11838f | 1009 | hspi->TxXferSize = 0; |
mbed_official | 235:685d5f11838f | 1010 | hspi->TxXferCount = 0; |
mbed_official | 235:685d5f11838f | 1011 | |
mbed_official | 235:685d5f11838f | 1012 | /* Configure communication direction : 1Line */ |
mbed_official | 235:685d5f11838f | 1013 | if(hspi->Init.Direction == SPI_DIRECTION_1LINE) |
mbed_official | 235:685d5f11838f | 1014 | { |
mbed_official | 235:685d5f11838f | 1015 | __HAL_SPI_1LINE_RX(hspi); |
mbed_official | 235:685d5f11838f | 1016 | } |
mbed_official | 235:685d5f11838f | 1017 | else if((hspi->Init.Direction == SPI_DIRECTION_2LINES) && (hspi->Init.Mode == SPI_MODE_MASTER)) |
mbed_official | 235:685d5f11838f | 1018 | { |
mbed_official | 235:685d5f11838f | 1019 | /* Process Unlocked */ |
mbed_official | 235:685d5f11838f | 1020 | __HAL_UNLOCK(hspi); |
mbed_official | 235:685d5f11838f | 1021 | |
mbed_official | 235:685d5f11838f | 1022 | /* Call transmit-receive function to send Dummy data on Tx line and generate clock on CLK line */ |
mbed_official | 235:685d5f11838f | 1023 | return HAL_SPI_TransmitReceive_IT(hspi, pData, pData, Size); |
mbed_official | 235:685d5f11838f | 1024 | } |
mbed_official | 235:685d5f11838f | 1025 | |
mbed_official | 235:685d5f11838f | 1026 | /* Reset CRC Calculation */ |
mbed_official | 235:685d5f11838f | 1027 | if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLED) |
mbed_official | 235:685d5f11838f | 1028 | { |
mbed_official | 235:685d5f11838f | 1029 | __HAL_SPI_RESET_CRC(hspi); |
mbed_official | 235:685d5f11838f | 1030 | } |
mbed_official | 235:685d5f11838f | 1031 | |
mbed_official | 235:685d5f11838f | 1032 | /* Enable TXE and ERR interrupt */ |
mbed_official | 235:685d5f11838f | 1033 | __HAL_SPI_ENABLE_IT(hspi, (SPI_IT_RXNE | SPI_IT_ERR)); |
mbed_official | 235:685d5f11838f | 1034 | |
mbed_official | 235:685d5f11838f | 1035 | /* Process Unlocked */ |
mbed_official | 235:685d5f11838f | 1036 | __HAL_UNLOCK(hspi); |
mbed_official | 235:685d5f11838f | 1037 | |
mbed_official | 235:685d5f11838f | 1038 | /* Note : The SPI must be enabled after unlocking current process |
mbed_official | 235:685d5f11838f | 1039 | to avoid the risk of SPI interrupt handle execution before current |
mbed_official | 235:685d5f11838f | 1040 | process unlock */ |
mbed_official | 235:685d5f11838f | 1041 | |
mbed_official | 235:685d5f11838f | 1042 | /* Check if the SPI is already enabled */ |
mbed_official | 235:685d5f11838f | 1043 | if((hspi->Instance->CR1 &SPI_CR1_SPE) != SPI_CR1_SPE) |
mbed_official | 235:685d5f11838f | 1044 | { |
mbed_official | 235:685d5f11838f | 1045 | /* Enable SPI peripheral */ |
mbed_official | 235:685d5f11838f | 1046 | __HAL_SPI_ENABLE(hspi); |
mbed_official | 235:685d5f11838f | 1047 | } |
mbed_official | 235:685d5f11838f | 1048 | |
mbed_official | 235:685d5f11838f | 1049 | return HAL_OK; |
mbed_official | 235:685d5f11838f | 1050 | } |
mbed_official | 235:685d5f11838f | 1051 | else |
mbed_official | 235:685d5f11838f | 1052 | { |
mbed_official | 235:685d5f11838f | 1053 | return HAL_BUSY; |
mbed_official | 235:685d5f11838f | 1054 | } |
mbed_official | 235:685d5f11838f | 1055 | } |
mbed_official | 235:685d5f11838f | 1056 | |
mbed_official | 235:685d5f11838f | 1057 | /** |
mbed_official | 235:685d5f11838f | 1058 | * @brief Transmit and Receive an amount of data in no-blocking mode with Interrupt |
mbed_official | 235:685d5f11838f | 1059 | * @param hspi: pointer to a SPI_HandleTypeDef structure that contains |
mbed_official | 235:685d5f11838f | 1060 | * the configuration information for SPI module. |
mbed_official | 235:685d5f11838f | 1061 | * @param pTxData: pointer to transmission data buffer |
mbed_official | 235:685d5f11838f | 1062 | * @param pRxData: pointer to reception data buffer to be |
mbed_official | 235:685d5f11838f | 1063 | * @param Size: amount of data to be sent |
mbed_official | 235:685d5f11838f | 1064 | * @retval HAL status |
mbed_official | 235:685d5f11838f | 1065 | */ |
mbed_official | 235:685d5f11838f | 1066 | HAL_StatusTypeDef HAL_SPI_TransmitReceive_IT(SPI_HandleTypeDef *hspi, uint8_t *pTxData, uint8_t *pRxData, uint16_t Size) |
mbed_official | 235:685d5f11838f | 1067 | { |
mbed_official | 235:685d5f11838f | 1068 | uint32_t tmpstate = 0; |
mbed_official | 235:685d5f11838f | 1069 | |
mbed_official | 235:685d5f11838f | 1070 | tmpstate = hspi->State; |
mbed_official | 235:685d5f11838f | 1071 | if((tmpstate == HAL_SPI_STATE_READY) || \ |
mbed_official | 235:685d5f11838f | 1072 | ((hspi->Init.Mode == SPI_MODE_MASTER) && (hspi->Init.Direction == SPI_DIRECTION_2LINES) && (tmpstate == HAL_SPI_STATE_BUSY_RX))) |
mbed_official | 235:685d5f11838f | 1073 | { |
mbed_official | 235:685d5f11838f | 1074 | if((pTxData == NULL ) || (pRxData == NULL ) || (Size == 0)) |
mbed_official | 235:685d5f11838f | 1075 | { |
mbed_official | 235:685d5f11838f | 1076 | return HAL_ERROR; |
mbed_official | 235:685d5f11838f | 1077 | } |
mbed_official | 235:685d5f11838f | 1078 | |
mbed_official | 235:685d5f11838f | 1079 | /* Check the parameters */ |
mbed_official | 235:685d5f11838f | 1080 | assert_param(IS_SPI_DIRECTION_2LINES(hspi->Init.Direction)); |
mbed_official | 235:685d5f11838f | 1081 | |
mbed_official | 235:685d5f11838f | 1082 | /* Process locked */ |
mbed_official | 235:685d5f11838f | 1083 | __HAL_LOCK(hspi); |
mbed_official | 235:685d5f11838f | 1084 | |
mbed_official | 235:685d5f11838f | 1085 | /* Don't overwrite in case of HAL_SPI_STATE_BUSY_RX */ |
mbed_official | 235:685d5f11838f | 1086 | if(hspi->State != HAL_SPI_STATE_BUSY_RX) |
mbed_official | 235:685d5f11838f | 1087 | { |
mbed_official | 235:685d5f11838f | 1088 | hspi->State = HAL_SPI_STATE_BUSY_TX_RX; |
mbed_official | 235:685d5f11838f | 1089 | } |
mbed_official | 235:685d5f11838f | 1090 | |
mbed_official | 235:685d5f11838f | 1091 | /* Configure communication */ |
mbed_official | 235:685d5f11838f | 1092 | hspi->ErrorCode = HAL_SPI_ERROR_NONE; |
mbed_official | 235:685d5f11838f | 1093 | |
mbed_official | 235:685d5f11838f | 1094 | hspi->TxISR = &SPI_TxISR; |
mbed_official | 235:685d5f11838f | 1095 | hspi->pTxBuffPtr = pTxData; |
mbed_official | 235:685d5f11838f | 1096 | hspi->TxXferSize = Size; |
mbed_official | 235:685d5f11838f | 1097 | hspi->TxXferCount = Size; |
mbed_official | 235:685d5f11838f | 1098 | |
mbed_official | 235:685d5f11838f | 1099 | hspi->RxISR = &SPI_2LinesRxISR; |
mbed_official | 235:685d5f11838f | 1100 | hspi->pRxBuffPtr = pRxData; |
mbed_official | 235:685d5f11838f | 1101 | hspi->RxXferSize = Size; |
mbed_official | 235:685d5f11838f | 1102 | hspi->RxXferCount = Size; |
mbed_official | 235:685d5f11838f | 1103 | |
mbed_official | 235:685d5f11838f | 1104 | /* Reset CRC Calculation */ |
mbed_official | 235:685d5f11838f | 1105 | if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLED) |
mbed_official | 235:685d5f11838f | 1106 | { |
mbed_official | 235:685d5f11838f | 1107 | __HAL_SPI_RESET_CRC(hspi); |
mbed_official | 235:685d5f11838f | 1108 | } |
mbed_official | 235:685d5f11838f | 1109 | |
mbed_official | 235:685d5f11838f | 1110 | /* Enable TXE, RXNE and ERR interrupt */ |
mbed_official | 235:685d5f11838f | 1111 | __HAL_SPI_ENABLE_IT(hspi, (SPI_IT_TXE | SPI_IT_RXNE | SPI_IT_ERR)); |
mbed_official | 235:685d5f11838f | 1112 | |
mbed_official | 235:685d5f11838f | 1113 | /* Process Unlocked */ |
mbed_official | 235:685d5f11838f | 1114 | __HAL_UNLOCK(hspi); |
mbed_official | 235:685d5f11838f | 1115 | |
mbed_official | 235:685d5f11838f | 1116 | /* Check if the SPI is already enabled */ |
mbed_official | 235:685d5f11838f | 1117 | if((hspi->Instance->CR1 &SPI_CR1_SPE) != SPI_CR1_SPE) |
mbed_official | 235:685d5f11838f | 1118 | { |
mbed_official | 235:685d5f11838f | 1119 | /* Enable SPI peripheral */ |
mbed_official | 235:685d5f11838f | 1120 | __HAL_SPI_ENABLE(hspi); |
mbed_official | 235:685d5f11838f | 1121 | } |
mbed_official | 235:685d5f11838f | 1122 | |
mbed_official | 235:685d5f11838f | 1123 | return HAL_OK; |
mbed_official | 235:685d5f11838f | 1124 | } |
mbed_official | 235:685d5f11838f | 1125 | else |
mbed_official | 235:685d5f11838f | 1126 | { |
mbed_official | 235:685d5f11838f | 1127 | return HAL_BUSY; |
mbed_official | 235:685d5f11838f | 1128 | } |
mbed_official | 235:685d5f11838f | 1129 | } |
mbed_official | 235:685d5f11838f | 1130 | |
mbed_official | 235:685d5f11838f | 1131 | /** |
mbed_official | 235:685d5f11838f | 1132 | * @brief Transmit an amount of data in no-blocking mode with DMA |
mbed_official | 235:685d5f11838f | 1133 | * @param hspi: pointer to a SPI_HandleTypeDef structure that contains |
mbed_official | 235:685d5f11838f | 1134 | * the configuration information for SPI module. |
mbed_official | 235:685d5f11838f | 1135 | * @param pData: pointer to data buffer |
mbed_official | 235:685d5f11838f | 1136 | * @param Size: amount of data to be sent |
mbed_official | 235:685d5f11838f | 1137 | * @retval HAL status |
mbed_official | 235:685d5f11838f | 1138 | */ |
mbed_official | 235:685d5f11838f | 1139 | HAL_StatusTypeDef HAL_SPI_Transmit_DMA(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size) |
mbed_official | 235:685d5f11838f | 1140 | { |
mbed_official | 235:685d5f11838f | 1141 | if(hspi->State == HAL_SPI_STATE_READY) |
mbed_official | 235:685d5f11838f | 1142 | { |
mbed_official | 235:685d5f11838f | 1143 | if((pData == NULL) || (Size == 0)) |
mbed_official | 235:685d5f11838f | 1144 | { |
mbed_official | 235:685d5f11838f | 1145 | return HAL_ERROR; |
mbed_official | 235:685d5f11838f | 1146 | } |
mbed_official | 235:685d5f11838f | 1147 | |
mbed_official | 235:685d5f11838f | 1148 | /* Check the parameters */ |
mbed_official | 235:685d5f11838f | 1149 | assert_param(IS_SPI_DIRECTION_2LINES_OR_1LINE(hspi->Init.Direction)); |
mbed_official | 235:685d5f11838f | 1150 | |
mbed_official | 235:685d5f11838f | 1151 | /* Process Locked */ |
mbed_official | 235:685d5f11838f | 1152 | __HAL_LOCK(hspi); |
mbed_official | 235:685d5f11838f | 1153 | |
mbed_official | 235:685d5f11838f | 1154 | /* Configure communication */ |
mbed_official | 235:685d5f11838f | 1155 | hspi->State = HAL_SPI_STATE_BUSY_TX; |
mbed_official | 235:685d5f11838f | 1156 | hspi->ErrorCode = HAL_SPI_ERROR_NONE; |
mbed_official | 235:685d5f11838f | 1157 | |
mbed_official | 235:685d5f11838f | 1158 | hspi->pTxBuffPtr = pData; |
mbed_official | 235:685d5f11838f | 1159 | hspi->TxXferSize = Size; |
mbed_official | 235:685d5f11838f | 1160 | hspi->TxXferCount = Size; |
mbed_official | 235:685d5f11838f | 1161 | |
mbed_official | 235:685d5f11838f | 1162 | /*Init field not used in handle to zero */ |
mbed_official | 235:685d5f11838f | 1163 | hspi->TxISR = 0; |
mbed_official | 235:685d5f11838f | 1164 | hspi->RxISR = 0; |
mbed_official | 235:685d5f11838f | 1165 | hspi->RxXferSize = 0; |
mbed_official | 235:685d5f11838f | 1166 | hspi->RxXferCount = 0; |
mbed_official | 235:685d5f11838f | 1167 | |
mbed_official | 235:685d5f11838f | 1168 | /* Configure communication direction : 1Line */ |
mbed_official | 235:685d5f11838f | 1169 | if(hspi->Init.Direction == SPI_DIRECTION_1LINE) |
mbed_official | 235:685d5f11838f | 1170 | { |
mbed_official | 235:685d5f11838f | 1171 | __HAL_SPI_1LINE_TX(hspi); |
mbed_official | 235:685d5f11838f | 1172 | } |
mbed_official | 235:685d5f11838f | 1173 | |
mbed_official | 235:685d5f11838f | 1174 | /* Reset CRC Calculation */ |
mbed_official | 235:685d5f11838f | 1175 | if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLED) |
mbed_official | 235:685d5f11838f | 1176 | { |
mbed_official | 235:685d5f11838f | 1177 | __HAL_SPI_RESET_CRC(hspi); |
mbed_official | 235:685d5f11838f | 1178 | } |
mbed_official | 235:685d5f11838f | 1179 | |
mbed_official | 235:685d5f11838f | 1180 | /* Set the SPI TxDMA Half transfer complete callback */ |
mbed_official | 235:685d5f11838f | 1181 | hspi->hdmatx->XferHalfCpltCallback = SPI_DMAHalfTransmitCplt; |
mbed_official | 235:685d5f11838f | 1182 | |
mbed_official | 235:685d5f11838f | 1183 | /* Set the SPI TxDMA transfer complete callback */ |
mbed_official | 235:685d5f11838f | 1184 | hspi->hdmatx->XferCpltCallback = SPI_DMATransmitCplt; |
mbed_official | 235:685d5f11838f | 1185 | |
mbed_official | 235:685d5f11838f | 1186 | /* Set the DMA error callback */ |
mbed_official | 235:685d5f11838f | 1187 | hspi->hdmatx->XferErrorCallback = SPI_DMAError; |
mbed_official | 235:685d5f11838f | 1188 | |
mbed_official | 235:685d5f11838f | 1189 | /* Enable the Tx DMA Stream */ |
mbed_official | 235:685d5f11838f | 1190 | HAL_DMA_Start_IT(hspi->hdmatx, (uint32_t)hspi->pTxBuffPtr, (uint32_t)&hspi->Instance->DR, hspi->TxXferCount); |
mbed_official | 235:685d5f11838f | 1191 | |
mbed_official | 235:685d5f11838f | 1192 | /* Enable Tx DMA Request */ |
mbed_official | 235:685d5f11838f | 1193 | hspi->Instance->CR2 |= SPI_CR2_TXDMAEN; |
mbed_official | 235:685d5f11838f | 1194 | |
mbed_official | 235:685d5f11838f | 1195 | /* Process Unlocked */ |
mbed_official | 235:685d5f11838f | 1196 | __HAL_UNLOCK(hspi); |
mbed_official | 235:685d5f11838f | 1197 | |
mbed_official | 235:685d5f11838f | 1198 | /* Check if the SPI is already enabled */ |
mbed_official | 235:685d5f11838f | 1199 | if((hspi->Instance->CR1 &SPI_CR1_SPE) != SPI_CR1_SPE) |
mbed_official | 235:685d5f11838f | 1200 | { |
mbed_official | 235:685d5f11838f | 1201 | /* Enable SPI peripheral */ |
mbed_official | 235:685d5f11838f | 1202 | __HAL_SPI_ENABLE(hspi); |
mbed_official | 235:685d5f11838f | 1203 | } |
mbed_official | 235:685d5f11838f | 1204 | |
mbed_official | 235:685d5f11838f | 1205 | return HAL_OK; |
mbed_official | 235:685d5f11838f | 1206 | } |
mbed_official | 235:685d5f11838f | 1207 | else |
mbed_official | 235:685d5f11838f | 1208 | { |
mbed_official | 235:685d5f11838f | 1209 | return HAL_BUSY; |
mbed_official | 235:685d5f11838f | 1210 | } |
mbed_official | 235:685d5f11838f | 1211 | } |
mbed_official | 235:685d5f11838f | 1212 | |
mbed_official | 235:685d5f11838f | 1213 | /** |
mbed_official | 235:685d5f11838f | 1214 | * @brief Receive an amount of data in no-blocking mode with DMA |
mbed_official | 235:685d5f11838f | 1215 | * @param hspi: pointer to a SPI_HandleTypeDef structure that contains |
mbed_official | 235:685d5f11838f | 1216 | * the configuration information for SPI module. |
mbed_official | 235:685d5f11838f | 1217 | * @param pData: pointer to data buffer |
mbed_official | 235:685d5f11838f | 1218 | * @note When the CRC feature is enabled the pData Length must be Size + 1. |
mbed_official | 235:685d5f11838f | 1219 | * @param Size: amount of data to be sent |
mbed_official | 235:685d5f11838f | 1220 | * @retval HAL status |
mbed_official | 235:685d5f11838f | 1221 | */ |
mbed_official | 235:685d5f11838f | 1222 | HAL_StatusTypeDef HAL_SPI_Receive_DMA(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size) |
mbed_official | 235:685d5f11838f | 1223 | { |
mbed_official | 235:685d5f11838f | 1224 | if(hspi->State == HAL_SPI_STATE_READY) |
mbed_official | 235:685d5f11838f | 1225 | { |
mbed_official | 235:685d5f11838f | 1226 | if((pData == NULL) || (Size == 0)) |
mbed_official | 235:685d5f11838f | 1227 | { |
mbed_official | 235:685d5f11838f | 1228 | return HAL_ERROR; |
mbed_official | 235:685d5f11838f | 1229 | } |
mbed_official | 235:685d5f11838f | 1230 | |
mbed_official | 235:685d5f11838f | 1231 | /* Process Locked */ |
mbed_official | 235:685d5f11838f | 1232 | __HAL_LOCK(hspi); |
mbed_official | 235:685d5f11838f | 1233 | |
mbed_official | 235:685d5f11838f | 1234 | /* Configure communication */ |
mbed_official | 235:685d5f11838f | 1235 | hspi->State = HAL_SPI_STATE_BUSY_RX; |
mbed_official | 235:685d5f11838f | 1236 | hspi->ErrorCode = HAL_SPI_ERROR_NONE; |
mbed_official | 235:685d5f11838f | 1237 | |
mbed_official | 235:685d5f11838f | 1238 | hspi->pRxBuffPtr = pData; |
mbed_official | 235:685d5f11838f | 1239 | hspi->RxXferSize = Size; |
mbed_official | 235:685d5f11838f | 1240 | hspi->RxXferCount = Size; |
mbed_official | 235:685d5f11838f | 1241 | |
mbed_official | 235:685d5f11838f | 1242 | /*Init field not used in handle to zero */ |
mbed_official | 235:685d5f11838f | 1243 | hspi->RxISR = 0; |
mbed_official | 235:685d5f11838f | 1244 | hspi->TxISR = 0; |
mbed_official | 235:685d5f11838f | 1245 | hspi->TxXferSize = 0; |
mbed_official | 235:685d5f11838f | 1246 | hspi->TxXferCount = 0; |
mbed_official | 235:685d5f11838f | 1247 | |
mbed_official | 235:685d5f11838f | 1248 | /* Configure communication direction : 1Line */ |
mbed_official | 235:685d5f11838f | 1249 | if(hspi->Init.Direction == SPI_DIRECTION_1LINE) |
mbed_official | 235:685d5f11838f | 1250 | { |
mbed_official | 235:685d5f11838f | 1251 | __HAL_SPI_1LINE_RX(hspi); |
mbed_official | 235:685d5f11838f | 1252 | } |
mbed_official | 235:685d5f11838f | 1253 | else if((hspi->Init.Direction == SPI_DIRECTION_2LINES)&&(hspi->Init.Mode == SPI_MODE_MASTER)) |
mbed_official | 235:685d5f11838f | 1254 | { |
mbed_official | 235:685d5f11838f | 1255 | /* Process Unlocked */ |
mbed_official | 235:685d5f11838f | 1256 | __HAL_UNLOCK(hspi); |
mbed_official | 235:685d5f11838f | 1257 | |
mbed_official | 235:685d5f11838f | 1258 | /* Call transmit-receive function to send Dummy data on Tx line and generate clock on CLK line */ |
mbed_official | 235:685d5f11838f | 1259 | return HAL_SPI_TransmitReceive_DMA(hspi, pData, pData, Size); |
mbed_official | 235:685d5f11838f | 1260 | } |
mbed_official | 235:685d5f11838f | 1261 | |
mbed_official | 235:685d5f11838f | 1262 | /* Reset CRC Calculation */ |
mbed_official | 235:685d5f11838f | 1263 | if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLED) |
mbed_official | 235:685d5f11838f | 1264 | { |
mbed_official | 235:685d5f11838f | 1265 | __HAL_SPI_RESET_CRC(hspi); |
mbed_official | 235:685d5f11838f | 1266 | } |
mbed_official | 235:685d5f11838f | 1267 | |
mbed_official | 235:685d5f11838f | 1268 | /* Set the SPI RxDMA Half transfer complete callback */ |
mbed_official | 235:685d5f11838f | 1269 | hspi->hdmarx->XferHalfCpltCallback = SPI_DMAHalfReceiveCplt; |
mbed_official | 235:685d5f11838f | 1270 | |
mbed_official | 235:685d5f11838f | 1271 | /* Set the SPI Rx DMA transfer complete callback */ |
mbed_official | 235:685d5f11838f | 1272 | hspi->hdmarx->XferCpltCallback = SPI_DMAReceiveCplt; |
mbed_official | 235:685d5f11838f | 1273 | |
mbed_official | 235:685d5f11838f | 1274 | /* Set the DMA error callback */ |
mbed_official | 235:685d5f11838f | 1275 | hspi->hdmarx->XferErrorCallback = SPI_DMAError; |
mbed_official | 235:685d5f11838f | 1276 | |
mbed_official | 235:685d5f11838f | 1277 | /* Enable the Rx DMA Stream */ |
mbed_official | 235:685d5f11838f | 1278 | HAL_DMA_Start_IT(hspi->hdmarx, (uint32_t)&hspi->Instance->DR, (uint32_t)hspi->pRxBuffPtr, hspi->RxXferCount); |
mbed_official | 235:685d5f11838f | 1279 | |
mbed_official | 235:685d5f11838f | 1280 | /* Enable Rx DMA Request */ |
mbed_official | 235:685d5f11838f | 1281 | hspi->Instance->CR2 |= SPI_CR2_RXDMAEN; |
mbed_official | 235:685d5f11838f | 1282 | |
mbed_official | 235:685d5f11838f | 1283 | /* Process Unlocked */ |
mbed_official | 235:685d5f11838f | 1284 | __HAL_UNLOCK(hspi); |
mbed_official | 235:685d5f11838f | 1285 | |
mbed_official | 235:685d5f11838f | 1286 | /* Check if the SPI is already enabled */ |
mbed_official | 235:685d5f11838f | 1287 | if((hspi->Instance->CR1 &SPI_CR1_SPE) != SPI_CR1_SPE) |
mbed_official | 235:685d5f11838f | 1288 | { |
mbed_official | 235:685d5f11838f | 1289 | /* Enable SPI peripheral */ |
mbed_official | 235:685d5f11838f | 1290 | __HAL_SPI_ENABLE(hspi); |
mbed_official | 235:685d5f11838f | 1291 | } |
mbed_official | 235:685d5f11838f | 1292 | |
mbed_official | 235:685d5f11838f | 1293 | return HAL_OK; |
mbed_official | 235:685d5f11838f | 1294 | } |
mbed_official | 235:685d5f11838f | 1295 | else |
mbed_official | 235:685d5f11838f | 1296 | { |
mbed_official | 235:685d5f11838f | 1297 | return HAL_BUSY; |
mbed_official | 235:685d5f11838f | 1298 | } |
mbed_official | 235:685d5f11838f | 1299 | } |
mbed_official | 235:685d5f11838f | 1300 | |
mbed_official | 235:685d5f11838f | 1301 | /** |
mbed_official | 235:685d5f11838f | 1302 | * @brief Transmit and Receive an amount of data in no-blocking mode with DMA |
mbed_official | 235:685d5f11838f | 1303 | * @param hspi: pointer to a SPI_HandleTypeDef structure that contains |
mbed_official | 235:685d5f11838f | 1304 | * the configuration information for SPI module. |
mbed_official | 235:685d5f11838f | 1305 | * @param pTxData: pointer to transmission data buffer |
mbed_official | 235:685d5f11838f | 1306 | * @param pRxData: pointer to reception data buffer |
mbed_official | 235:685d5f11838f | 1307 | * @note When the CRC feature is enabled the pRxData Length must be Size + 1 |
mbed_official | 235:685d5f11838f | 1308 | * @param Size: amount of data to be sent |
mbed_official | 235:685d5f11838f | 1309 | * @retval HAL status |
mbed_official | 235:685d5f11838f | 1310 | */ |
mbed_official | 235:685d5f11838f | 1311 | HAL_StatusTypeDef HAL_SPI_TransmitReceive_DMA(SPI_HandleTypeDef *hspi, uint8_t *pTxData, uint8_t *pRxData, uint16_t Size) |
mbed_official | 235:685d5f11838f | 1312 | { |
mbed_official | 235:685d5f11838f | 1313 | uint32_t tmpstate = 0; |
mbed_official | 235:685d5f11838f | 1314 | tmpstate = hspi->State; |
mbed_official | 235:685d5f11838f | 1315 | if((tmpstate == HAL_SPI_STATE_READY) || ((hspi->Init.Mode == SPI_MODE_MASTER) && \ |
mbed_official | 235:685d5f11838f | 1316 | (hspi->Init.Direction == SPI_DIRECTION_2LINES) && (tmpstate == HAL_SPI_STATE_BUSY_RX))) |
mbed_official | 235:685d5f11838f | 1317 | { |
mbed_official | 235:685d5f11838f | 1318 | if((pTxData == NULL ) || (pRxData == NULL ) || (Size == 0)) |
mbed_official | 235:685d5f11838f | 1319 | { |
mbed_official | 235:685d5f11838f | 1320 | return HAL_ERROR; |
mbed_official | 235:685d5f11838f | 1321 | } |
mbed_official | 235:685d5f11838f | 1322 | |
mbed_official | 235:685d5f11838f | 1323 | /* Check the parameters */ |
mbed_official | 235:685d5f11838f | 1324 | assert_param(IS_SPI_DIRECTION_2LINES(hspi->Init.Direction)); |
mbed_official | 235:685d5f11838f | 1325 | |
mbed_official | 235:685d5f11838f | 1326 | /* Process locked */ |
mbed_official | 235:685d5f11838f | 1327 | __HAL_LOCK(hspi); |
mbed_official | 235:685d5f11838f | 1328 | |
mbed_official | 235:685d5f11838f | 1329 | /* Don't overwrite in case of HAL_SPI_STATE_BUSY_RX */ |
mbed_official | 235:685d5f11838f | 1330 | if(hspi->State != HAL_SPI_STATE_BUSY_RX) |
mbed_official | 235:685d5f11838f | 1331 | { |
mbed_official | 235:685d5f11838f | 1332 | hspi->State = HAL_SPI_STATE_BUSY_TX_RX; |
mbed_official | 235:685d5f11838f | 1333 | } |
mbed_official | 235:685d5f11838f | 1334 | |
mbed_official | 235:685d5f11838f | 1335 | /* Configure communication */ |
mbed_official | 235:685d5f11838f | 1336 | hspi->ErrorCode = HAL_SPI_ERROR_NONE; |
mbed_official | 235:685d5f11838f | 1337 | |
mbed_official | 235:685d5f11838f | 1338 | hspi->pTxBuffPtr = (uint8_t*)pTxData; |
mbed_official | 235:685d5f11838f | 1339 | hspi->TxXferSize = Size; |
mbed_official | 235:685d5f11838f | 1340 | hspi->TxXferCount = Size; |
mbed_official | 235:685d5f11838f | 1341 | |
mbed_official | 235:685d5f11838f | 1342 | hspi->pRxBuffPtr = (uint8_t*)pRxData; |
mbed_official | 235:685d5f11838f | 1343 | hspi->RxXferSize = Size; |
mbed_official | 235:685d5f11838f | 1344 | hspi->RxXferCount = Size; |
mbed_official | 235:685d5f11838f | 1345 | |
mbed_official | 235:685d5f11838f | 1346 | /*Init field not used in handle to zero */ |
mbed_official | 235:685d5f11838f | 1347 | hspi->RxISR = 0; |
mbed_official | 235:685d5f11838f | 1348 | hspi->TxISR = 0; |
mbed_official | 235:685d5f11838f | 1349 | |
mbed_official | 235:685d5f11838f | 1350 | /* Reset CRC Calculation */ |
mbed_official | 235:685d5f11838f | 1351 | if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLED) |
mbed_official | 235:685d5f11838f | 1352 | { |
mbed_official | 235:685d5f11838f | 1353 | __HAL_SPI_RESET_CRC(hspi); |
mbed_official | 235:685d5f11838f | 1354 | } |
mbed_official | 235:685d5f11838f | 1355 | |
mbed_official | 235:685d5f11838f | 1356 | /* Check if we are in Rx only or in Rx/Tx Mode and configure the DMA transfer complete callback */ |
mbed_official | 235:685d5f11838f | 1357 | if(hspi->State == HAL_SPI_STATE_BUSY_RX) |
mbed_official | 235:685d5f11838f | 1358 | { |
mbed_official | 235:685d5f11838f | 1359 | /* Set the SPI Rx DMA Half transfer complete callback */ |
mbed_official | 235:685d5f11838f | 1360 | hspi->hdmarx->XferHalfCpltCallback = SPI_DMAHalfReceiveCplt; |
mbed_official | 235:685d5f11838f | 1361 | |
mbed_official | 235:685d5f11838f | 1362 | hspi->hdmarx->XferCpltCallback = SPI_DMAReceiveCplt; |
mbed_official | 235:685d5f11838f | 1363 | } |
mbed_official | 235:685d5f11838f | 1364 | else |
mbed_official | 235:685d5f11838f | 1365 | { |
mbed_official | 235:685d5f11838f | 1366 | /* Set the SPI Tx/Rx DMA Half transfer complete callback */ |
mbed_official | 235:685d5f11838f | 1367 | hspi->hdmarx->XferHalfCpltCallback = SPI_DMAHalfTransmitReceiveCplt; |
mbed_official | 235:685d5f11838f | 1368 | |
mbed_official | 235:685d5f11838f | 1369 | hspi->hdmarx->XferCpltCallback = SPI_DMATransmitReceiveCplt; |
mbed_official | 235:685d5f11838f | 1370 | } |
mbed_official | 235:685d5f11838f | 1371 | |
mbed_official | 235:685d5f11838f | 1372 | /* Set the DMA error callback */ |
mbed_official | 235:685d5f11838f | 1373 | hspi->hdmarx->XferErrorCallback = SPI_DMAError; |
mbed_official | 235:685d5f11838f | 1374 | |
mbed_official | 235:685d5f11838f | 1375 | /* Enable the Rx DMA Stream */ |
mbed_official | 235:685d5f11838f | 1376 | HAL_DMA_Start_IT(hspi->hdmarx, (uint32_t)&hspi->Instance->DR, (uint32_t)hspi->pRxBuffPtr, hspi->RxXferCount); |
mbed_official | 235:685d5f11838f | 1377 | |
mbed_official | 235:685d5f11838f | 1378 | /* Enable Rx DMA Request */ |
mbed_official | 235:685d5f11838f | 1379 | hspi->Instance->CR2 |= SPI_CR2_RXDMAEN; |
mbed_official | 235:685d5f11838f | 1380 | |
mbed_official | 235:685d5f11838f | 1381 | /* Set the SPI Tx DMA transfer complete callback as NULL because the communication closing |
mbed_official | 235:685d5f11838f | 1382 | is performed in DMA reception complete callback */ |
mbed_official | 235:685d5f11838f | 1383 | hspi->hdmatx->XferCpltCallback = NULL; |
mbed_official | 235:685d5f11838f | 1384 | |
mbed_official | 235:685d5f11838f | 1385 | /* Set the DMA error callback */ |
mbed_official | 235:685d5f11838f | 1386 | hspi->hdmatx->XferErrorCallback = SPI_DMAError; |
mbed_official | 235:685d5f11838f | 1387 | |
mbed_official | 235:685d5f11838f | 1388 | /* Enable the Tx DMA Stream */ |
mbed_official | 235:685d5f11838f | 1389 | HAL_DMA_Start_IT(hspi->hdmatx, (uint32_t)hspi->pTxBuffPtr, (uint32_t)&hspi->Instance->DR, hspi->TxXferCount); |
mbed_official | 235:685d5f11838f | 1390 | |
mbed_official | 235:685d5f11838f | 1391 | /* Check if the SPI is already enabled */ |
mbed_official | 235:685d5f11838f | 1392 | if((hspi->Instance->CR1 &SPI_CR1_SPE) != SPI_CR1_SPE) |
mbed_official | 235:685d5f11838f | 1393 | { |
mbed_official | 235:685d5f11838f | 1394 | /* Enable SPI peripheral */ |
mbed_official | 235:685d5f11838f | 1395 | __HAL_SPI_ENABLE(hspi); |
mbed_official | 235:685d5f11838f | 1396 | } |
mbed_official | 235:685d5f11838f | 1397 | |
mbed_official | 235:685d5f11838f | 1398 | /* Enable Tx DMA Request */ |
mbed_official | 235:685d5f11838f | 1399 | hspi->Instance->CR2 |= SPI_CR2_TXDMAEN; |
mbed_official | 235:685d5f11838f | 1400 | |
mbed_official | 235:685d5f11838f | 1401 | /* Process Unlocked */ |
mbed_official | 235:685d5f11838f | 1402 | __HAL_UNLOCK(hspi); |
mbed_official | 235:685d5f11838f | 1403 | return HAL_OK; |
mbed_official | 235:685d5f11838f | 1404 | } |
mbed_official | 235:685d5f11838f | 1405 | else |
mbed_official | 235:685d5f11838f | 1406 | { |
mbed_official | 235:685d5f11838f | 1407 | return HAL_BUSY; |
mbed_official | 235:685d5f11838f | 1408 | } |
mbed_official | 235:685d5f11838f | 1409 | } |
mbed_official | 235:685d5f11838f | 1410 | |
mbed_official | 235:685d5f11838f | 1411 | |
mbed_official | 235:685d5f11838f | 1412 | /** |
mbed_official | 235:685d5f11838f | 1413 | * @brief Pauses the DMA Transfer. |
mbed_official | 235:685d5f11838f | 1414 | * @param hspi: pointer to a SPI_HandleTypeDef structure that contains |
mbed_official | 235:685d5f11838f | 1415 | * the configuration information for the specified SPI module. |
mbed_official | 235:685d5f11838f | 1416 | * @retval HAL status |
mbed_official | 235:685d5f11838f | 1417 | */ |
mbed_official | 235:685d5f11838f | 1418 | HAL_StatusTypeDef HAL_SPI_DMAPause(SPI_HandleTypeDef *hspi) |
mbed_official | 235:685d5f11838f | 1419 | { |
mbed_official | 235:685d5f11838f | 1420 | /* Process Locked */ |
mbed_official | 235:685d5f11838f | 1421 | __HAL_LOCK(hspi); |
mbed_official | 235:685d5f11838f | 1422 | |
mbed_official | 235:685d5f11838f | 1423 | /* Disable the SPI DMA Tx & Rx requests */ |
mbed_official | 235:685d5f11838f | 1424 | hspi->Instance->CR2 &= (uint32_t)(~SPI_CR2_TXDMAEN); |
mbed_official | 235:685d5f11838f | 1425 | hspi->Instance->CR2 &= (uint32_t)(~SPI_CR2_RXDMAEN); |
mbed_official | 235:685d5f11838f | 1426 | |
mbed_official | 235:685d5f11838f | 1427 | /* Process Unlocked */ |
mbed_official | 235:685d5f11838f | 1428 | __HAL_UNLOCK(hspi); |
mbed_official | 235:685d5f11838f | 1429 | |
mbed_official | 235:685d5f11838f | 1430 | return HAL_OK; |
mbed_official | 235:685d5f11838f | 1431 | } |
mbed_official | 235:685d5f11838f | 1432 | |
mbed_official | 235:685d5f11838f | 1433 | /** |
mbed_official | 235:685d5f11838f | 1434 | * @brief Resumes the DMA Transfer. |
mbed_official | 235:685d5f11838f | 1435 | * @param hspi: pointer to a SPI_HandleTypeDef structure that contains |
mbed_official | 235:685d5f11838f | 1436 | * the configuration information for the specified SPI module. |
mbed_official | 235:685d5f11838f | 1437 | * @retval HAL status |
mbed_official | 235:685d5f11838f | 1438 | */ |
mbed_official | 235:685d5f11838f | 1439 | HAL_StatusTypeDef HAL_SPI_DMAResume(SPI_HandleTypeDef *hspi) |
mbed_official | 235:685d5f11838f | 1440 | { |
mbed_official | 235:685d5f11838f | 1441 | /* Process Locked */ |
mbed_official | 235:685d5f11838f | 1442 | __HAL_LOCK(hspi); |
mbed_official | 235:685d5f11838f | 1443 | |
mbed_official | 235:685d5f11838f | 1444 | /* Enable the SPI DMA Tx & Rx requests */ |
mbed_official | 235:685d5f11838f | 1445 | hspi->Instance->CR2 |= SPI_CR2_TXDMAEN; |
mbed_official | 235:685d5f11838f | 1446 | hspi->Instance->CR2 |= SPI_CR2_RXDMAEN; |
mbed_official | 235:685d5f11838f | 1447 | |
mbed_official | 235:685d5f11838f | 1448 | /* Process Unlocked */ |
mbed_official | 235:685d5f11838f | 1449 | __HAL_UNLOCK(hspi); |
mbed_official | 235:685d5f11838f | 1450 | |
mbed_official | 235:685d5f11838f | 1451 | return HAL_OK; |
mbed_official | 235:685d5f11838f | 1452 | } |
mbed_official | 235:685d5f11838f | 1453 | |
mbed_official | 235:685d5f11838f | 1454 | /** |
mbed_official | 235:685d5f11838f | 1455 | * @brief Stops the DMA Transfer. |
mbed_official | 235:685d5f11838f | 1456 | * @param huart: pointer to a UART_HandleTypeDef structure that contains |
mbed_official | 235:685d5f11838f | 1457 | * the configuration information for the specified UART module. |
mbed_official | 235:685d5f11838f | 1458 | * @retval HAL status |
mbed_official | 235:685d5f11838f | 1459 | */ |
mbed_official | 235:685d5f11838f | 1460 | HAL_StatusTypeDef HAL_SPI_DMAStop(SPI_HandleTypeDef *hspi) |
mbed_official | 235:685d5f11838f | 1461 | { |
mbed_official | 235:685d5f11838f | 1462 | /* The Lock is not implemented on this API to allow the user application |
mbed_official | 235:685d5f11838f | 1463 | to call the HAL SPI API under callbacks HAL_SPI_TxCpltCallback() or HAL_SPI_RxCpltCallback() or HAL_SPI_TxRxCpltCallback(): |
mbed_official | 235:685d5f11838f | 1464 | when calling HAL_DMA_Abort() API the DMA TX/RX Transfer complete interrupt is generated |
mbed_official | 235:685d5f11838f | 1465 | and the correspond call back is executed HAL_SPI_TxCpltCallback() or HAL_SPI_RxCpltCallback() or HAL_SPI_TxRxCpltCallback() |
mbed_official | 235:685d5f11838f | 1466 | */ |
mbed_official | 235:685d5f11838f | 1467 | |
mbed_official | 235:685d5f11838f | 1468 | /* Abort the SPI DMA tx Stream */ |
mbed_official | 235:685d5f11838f | 1469 | if(hspi->hdmatx != NULL) |
mbed_official | 235:685d5f11838f | 1470 | { |
mbed_official | 235:685d5f11838f | 1471 | HAL_DMA_Abort(hspi->hdmatx); |
mbed_official | 235:685d5f11838f | 1472 | } |
mbed_official | 235:685d5f11838f | 1473 | /* Abort the SPI DMA rx Stream */ |
mbed_official | 235:685d5f11838f | 1474 | if(hspi->hdmarx != NULL) |
mbed_official | 235:685d5f11838f | 1475 | { |
mbed_official | 235:685d5f11838f | 1476 | HAL_DMA_Abort(hspi->hdmarx); |
mbed_official | 235:685d5f11838f | 1477 | } |
mbed_official | 235:685d5f11838f | 1478 | |
mbed_official | 235:685d5f11838f | 1479 | /* Disable the SPI DMA Tx & Rx requests */ |
mbed_official | 235:685d5f11838f | 1480 | hspi->Instance->CR2 &= (uint32_t)(~SPI_CR2_TXDMAEN); |
mbed_official | 235:685d5f11838f | 1481 | hspi->Instance->CR2 &= (uint32_t)(~SPI_CR2_RXDMAEN); |
mbed_official | 235:685d5f11838f | 1482 | |
mbed_official | 235:685d5f11838f | 1483 | hspi->State = HAL_SPI_STATE_READY; |
mbed_official | 235:685d5f11838f | 1484 | |
mbed_official | 235:685d5f11838f | 1485 | return HAL_OK; |
mbed_official | 235:685d5f11838f | 1486 | } |
mbed_official | 235:685d5f11838f | 1487 | |
mbed_official | 235:685d5f11838f | 1488 | /** |
mbed_official | 235:685d5f11838f | 1489 | * @brief This function handles SPI interrupt request. |
mbed_official | 235:685d5f11838f | 1490 | * @param hspi: pointer to a SPI_HandleTypeDef structure that contains |
mbed_official | 235:685d5f11838f | 1491 | * the configuration information for SPI module. |
mbed_official | 235:685d5f11838f | 1492 | * @retval HAL status |
mbed_official | 235:685d5f11838f | 1493 | */ |
mbed_official | 235:685d5f11838f | 1494 | void HAL_SPI_IRQHandler(SPI_HandleTypeDef *hspi) |
mbed_official | 235:685d5f11838f | 1495 | { |
mbed_official | 235:685d5f11838f | 1496 | uint32_t tmp1 = 0, tmp2 = 0, tmp3 = 0; |
mbed_official | 235:685d5f11838f | 1497 | |
mbed_official | 235:685d5f11838f | 1498 | tmp1 = __HAL_SPI_GET_FLAG(hspi, SPI_FLAG_RXNE); |
mbed_official | 235:685d5f11838f | 1499 | tmp2 = __HAL_SPI_GET_IT_SOURCE(hspi, SPI_IT_RXNE); |
mbed_official | 235:685d5f11838f | 1500 | tmp3 = __HAL_SPI_GET_FLAG(hspi, SPI_FLAG_OVR); |
mbed_official | 235:685d5f11838f | 1501 | /* SPI in mode Receiver and Overrun not occurred ---------------------------*/ |
mbed_official | 235:685d5f11838f | 1502 | if((tmp1 != RESET) && (tmp2 != RESET) && (tmp3 == RESET)) |
mbed_official | 235:685d5f11838f | 1503 | { |
mbed_official | 235:685d5f11838f | 1504 | hspi->RxISR(hspi); |
mbed_official | 235:685d5f11838f | 1505 | return; |
mbed_official | 235:685d5f11838f | 1506 | } |
mbed_official | 235:685d5f11838f | 1507 | |
mbed_official | 235:685d5f11838f | 1508 | tmp1 = __HAL_SPI_GET_FLAG(hspi, SPI_FLAG_TXE); |
mbed_official | 235:685d5f11838f | 1509 | tmp2 = __HAL_SPI_GET_IT_SOURCE(hspi, SPI_IT_TXE); |
mbed_official | 235:685d5f11838f | 1510 | /* SPI in mode Tramitter ---------------------------------------------------*/ |
mbed_official | 235:685d5f11838f | 1511 | if((tmp1 != RESET) && (tmp2 != RESET)) |
mbed_official | 235:685d5f11838f | 1512 | { |
mbed_official | 235:685d5f11838f | 1513 | hspi->TxISR(hspi); |
mbed_official | 235:685d5f11838f | 1514 | return; |
mbed_official | 235:685d5f11838f | 1515 | } |
mbed_official | 235:685d5f11838f | 1516 | |
mbed_official | 235:685d5f11838f | 1517 | if(__HAL_SPI_GET_IT_SOURCE(hspi, SPI_IT_ERR) != RESET) |
mbed_official | 235:685d5f11838f | 1518 | { |
mbed_official | 235:685d5f11838f | 1519 | /* SPI CRC error interrupt occurred ---------------------------------------*/ |
mbed_official | 235:685d5f11838f | 1520 | if(__HAL_SPI_GET_FLAG(hspi, SPI_FLAG_CRCERR) != RESET) |
mbed_official | 235:685d5f11838f | 1521 | { |
mbed_official | 235:685d5f11838f | 1522 | hspi->ErrorCode |= HAL_SPI_ERROR_CRC; |
mbed_official | 235:685d5f11838f | 1523 | __HAL_SPI_CLEAR_CRCERRFLAG(hspi); |
mbed_official | 235:685d5f11838f | 1524 | } |
mbed_official | 235:685d5f11838f | 1525 | /* SPI Mode Fault error interrupt occurred --------------------------------*/ |
mbed_official | 235:685d5f11838f | 1526 | if(__HAL_SPI_GET_FLAG(hspi, SPI_FLAG_MODF) != RESET) |
mbed_official | 235:685d5f11838f | 1527 | { |
mbed_official | 235:685d5f11838f | 1528 | hspi->ErrorCode |= HAL_SPI_ERROR_MODF; |
mbed_official | 235:685d5f11838f | 1529 | __HAL_SPI_CLEAR_MODFFLAG(hspi); |
mbed_official | 235:685d5f11838f | 1530 | } |
mbed_official | 235:685d5f11838f | 1531 | |
mbed_official | 235:685d5f11838f | 1532 | /* SPI Overrun error interrupt occurred -----------------------------------*/ |
mbed_official | 235:685d5f11838f | 1533 | if(__HAL_SPI_GET_FLAG(hspi, SPI_FLAG_OVR) != RESET) |
mbed_official | 235:685d5f11838f | 1534 | { |
mbed_official | 235:685d5f11838f | 1535 | if(hspi->State != HAL_SPI_STATE_BUSY_TX) |
mbed_official | 235:685d5f11838f | 1536 | { |
mbed_official | 235:685d5f11838f | 1537 | hspi->ErrorCode |= HAL_SPI_ERROR_OVR; |
mbed_official | 235:685d5f11838f | 1538 | __HAL_SPI_CLEAR_OVRFLAG(hspi); |
mbed_official | 235:685d5f11838f | 1539 | } |
mbed_official | 235:685d5f11838f | 1540 | } |
mbed_official | 235:685d5f11838f | 1541 | |
mbed_official | 235:685d5f11838f | 1542 | /* SPI Frame error interrupt occurred -------------------------------------*/ |
mbed_official | 235:685d5f11838f | 1543 | if(__HAL_SPI_GET_FLAG(hspi, SPI_FLAG_FRE) != RESET) |
mbed_official | 235:685d5f11838f | 1544 | { |
mbed_official | 235:685d5f11838f | 1545 | hspi->ErrorCode |= HAL_SPI_ERROR_FRE; |
mbed_official | 235:685d5f11838f | 1546 | __HAL_SPI_CLEAR_FREFLAG(hspi); |
mbed_official | 235:685d5f11838f | 1547 | } |
mbed_official | 235:685d5f11838f | 1548 | |
mbed_official | 235:685d5f11838f | 1549 | /* Call the Error call Back in case of Errors */ |
mbed_official | 235:685d5f11838f | 1550 | if(hspi->ErrorCode!=HAL_SPI_ERROR_NONE) |
mbed_official | 235:685d5f11838f | 1551 | { |
mbed_official | 235:685d5f11838f | 1552 | hspi->State = HAL_SPI_STATE_READY; |
mbed_official | 235:685d5f11838f | 1553 | HAL_SPI_ErrorCallback(hspi); |
mbed_official | 235:685d5f11838f | 1554 | } |
mbed_official | 235:685d5f11838f | 1555 | } |
mbed_official | 235:685d5f11838f | 1556 | } |
mbed_official | 235:685d5f11838f | 1557 | |
mbed_official | 235:685d5f11838f | 1558 | /** |
mbed_official | 235:685d5f11838f | 1559 | * @brief Tx Transfer completed callbacks |
mbed_official | 235:685d5f11838f | 1560 | * @param hspi: pointer to a SPI_HandleTypeDef structure that contains |
mbed_official | 235:685d5f11838f | 1561 | * the configuration information for SPI module. |
mbed_official | 235:685d5f11838f | 1562 | * @retval None |
mbed_official | 235:685d5f11838f | 1563 | */ |
mbed_official | 235:685d5f11838f | 1564 | __weak void HAL_SPI_TxCpltCallback(SPI_HandleTypeDef *hspi) |
mbed_official | 235:685d5f11838f | 1565 | { |
mbed_official | 235:685d5f11838f | 1566 | /* NOTE : This function Should not be modified, when the callback is needed, |
mbed_official | 235:685d5f11838f | 1567 | the HAL_SPI_TxCpltCallback could be implenetd in the user file |
mbed_official | 235:685d5f11838f | 1568 | */ |
mbed_official | 235:685d5f11838f | 1569 | } |
mbed_official | 235:685d5f11838f | 1570 | |
mbed_official | 235:685d5f11838f | 1571 | /** |
mbed_official | 235:685d5f11838f | 1572 | * @brief Rx Transfer completed callbacks |
mbed_official | 235:685d5f11838f | 1573 | * @param hspi: pointer to a SPI_HandleTypeDef structure that contains |
mbed_official | 235:685d5f11838f | 1574 | * the configuration information for SPI module. |
mbed_official | 235:685d5f11838f | 1575 | * @retval None |
mbed_official | 235:685d5f11838f | 1576 | */ |
mbed_official | 235:685d5f11838f | 1577 | __weak void HAL_SPI_RxCpltCallback(SPI_HandleTypeDef *hspi) |
mbed_official | 235:685d5f11838f | 1578 | { |
mbed_official | 235:685d5f11838f | 1579 | /* NOTE : This function Should not be modified, when the callback is needed, |
mbed_official | 235:685d5f11838f | 1580 | the HAL_SPI_RxCpltCallback() could be implenetd in the user file |
mbed_official | 235:685d5f11838f | 1581 | */ |
mbed_official | 235:685d5f11838f | 1582 | } |
mbed_official | 235:685d5f11838f | 1583 | |
mbed_official | 235:685d5f11838f | 1584 | /** |
mbed_official | 235:685d5f11838f | 1585 | * @brief Tx and Rx Transfer completed callbacks |
mbed_official | 235:685d5f11838f | 1586 | * @param hspi: pointer to a SPI_HandleTypeDef structure that contains |
mbed_official | 235:685d5f11838f | 1587 | * the configuration information for SPI module. |
mbed_official | 235:685d5f11838f | 1588 | * @retval None |
mbed_official | 235:685d5f11838f | 1589 | */ |
mbed_official | 235:685d5f11838f | 1590 | __weak void HAL_SPI_TxRxCpltCallback(SPI_HandleTypeDef *hspi) |
mbed_official | 235:685d5f11838f | 1591 | { |
mbed_official | 235:685d5f11838f | 1592 | /* NOTE : This function Should not be modified, when the callback is needed, |
mbed_official | 235:685d5f11838f | 1593 | the HAL_SPI_TxRxCpltCallback() could be implenetd in the user file |
mbed_official | 235:685d5f11838f | 1594 | */ |
mbed_official | 235:685d5f11838f | 1595 | } |
mbed_official | 235:685d5f11838f | 1596 | |
mbed_official | 235:685d5f11838f | 1597 | /** |
mbed_official | 235:685d5f11838f | 1598 | * @brief Tx Half Transfer completed callbacks |
mbed_official | 235:685d5f11838f | 1599 | * @param hspi: pointer to a SPI_HandleTypeDef structure that contains |
mbed_official | 235:685d5f11838f | 1600 | * the configuration information for SPI module. |
mbed_official | 235:685d5f11838f | 1601 | * @retval None |
mbed_official | 235:685d5f11838f | 1602 | */ |
mbed_official | 235:685d5f11838f | 1603 | __weak void HAL_SPI_TxHalfCpltCallback(SPI_HandleTypeDef *hspi) |
mbed_official | 235:685d5f11838f | 1604 | { |
mbed_official | 235:685d5f11838f | 1605 | /* NOTE : This function Should not be modified, when the callback is needed, |
mbed_official | 235:685d5f11838f | 1606 | the HAL_SPI_TxHalfCpltCallback could be implenetd in the user file |
mbed_official | 235:685d5f11838f | 1607 | */ |
mbed_official | 235:685d5f11838f | 1608 | } |
mbed_official | 235:685d5f11838f | 1609 | |
mbed_official | 235:685d5f11838f | 1610 | /** |
mbed_official | 235:685d5f11838f | 1611 | * @brief Rx Half Transfer completed callbacks |
mbed_official | 235:685d5f11838f | 1612 | * @param hspi: pointer to a SPI_HandleTypeDef structure that contains |
mbed_official | 235:685d5f11838f | 1613 | * the configuration information for SPI module. |
mbed_official | 235:685d5f11838f | 1614 | * @retval None |
mbed_official | 235:685d5f11838f | 1615 | */ |
mbed_official | 235:685d5f11838f | 1616 | __weak void HAL_SPI_RxHalfCpltCallback(SPI_HandleTypeDef *hspi) |
mbed_official | 235:685d5f11838f | 1617 | { |
mbed_official | 235:685d5f11838f | 1618 | /* NOTE : This function Should not be modified, when the callback is needed, |
mbed_official | 235:685d5f11838f | 1619 | the HAL_SPI_RxHalfCpltCallback() could be implenetd in the user file |
mbed_official | 235:685d5f11838f | 1620 | */ |
mbed_official | 235:685d5f11838f | 1621 | } |
mbed_official | 235:685d5f11838f | 1622 | |
mbed_official | 235:685d5f11838f | 1623 | /** |
mbed_official | 235:685d5f11838f | 1624 | * @brief Tx and Rx Transfer completed callbacks |
mbed_official | 235:685d5f11838f | 1625 | * @param hspi: pointer to a SPI_HandleTypeDef structure that contains |
mbed_official | 235:685d5f11838f | 1626 | * the configuration information for SPI module. |
mbed_official | 235:685d5f11838f | 1627 | * @retval None |
mbed_official | 235:685d5f11838f | 1628 | */ |
mbed_official | 235:685d5f11838f | 1629 | __weak void HAL_SPI_TxRxHalfCpltCallback(SPI_HandleTypeDef *hspi) |
mbed_official | 235:685d5f11838f | 1630 | { |
mbed_official | 235:685d5f11838f | 1631 | /* NOTE : This function Should not be modified, when the callback is needed, |
mbed_official | 235:685d5f11838f | 1632 | the HAL_SPI_TxRxHalfCpltCallback() could be implenetd in the user file |
mbed_official | 235:685d5f11838f | 1633 | */ |
mbed_official | 235:685d5f11838f | 1634 | } |
mbed_official | 235:685d5f11838f | 1635 | |
mbed_official | 235:685d5f11838f | 1636 | /** |
mbed_official | 235:685d5f11838f | 1637 | * @brief SPI error callbacks |
mbed_official | 235:685d5f11838f | 1638 | * @param hspi: pointer to a SPI_HandleTypeDef structure that contains |
mbed_official | 235:685d5f11838f | 1639 | * the configuration information for SPI module. |
mbed_official | 235:685d5f11838f | 1640 | * @retval None |
mbed_official | 235:685d5f11838f | 1641 | */ |
mbed_official | 235:685d5f11838f | 1642 | __weak void HAL_SPI_ErrorCallback(SPI_HandleTypeDef *hspi) |
mbed_official | 235:685d5f11838f | 1643 | { |
mbed_official | 235:685d5f11838f | 1644 | /* NOTE : - This function Should not be modified, when the callback is needed, |
mbed_official | 235:685d5f11838f | 1645 | the HAL_SPI_ErrorCallback() could be implenetd in the user file. |
mbed_official | 235:685d5f11838f | 1646 | - The ErrorCode parameter in the hspi handle is updated by the SPI processes |
mbed_official | 235:685d5f11838f | 1647 | and user can use HAL_SPI_GetError() API to check the latest error occurred. |
mbed_official | 235:685d5f11838f | 1648 | */ |
mbed_official | 235:685d5f11838f | 1649 | } |
mbed_official | 235:685d5f11838f | 1650 | |
mbed_official | 235:685d5f11838f | 1651 | /** |
mbed_official | 235:685d5f11838f | 1652 | * @} |
mbed_official | 235:685d5f11838f | 1653 | */ |
mbed_official | 235:685d5f11838f | 1654 | |
mbed_official | 235:685d5f11838f | 1655 | /** @defgroup SPI_Group3 Peripheral State and Errors functions |
mbed_official | 235:685d5f11838f | 1656 | * @brief SPI control functions |
mbed_official | 235:685d5f11838f | 1657 | * |
mbed_official | 235:685d5f11838f | 1658 | @verbatim |
mbed_official | 235:685d5f11838f | 1659 | =============================================================================== |
mbed_official | 235:685d5f11838f | 1660 | ##### Peripheral State and Errors functions ##### |
mbed_official | 235:685d5f11838f | 1661 | =============================================================================== |
mbed_official | 235:685d5f11838f | 1662 | [..] |
mbed_official | 235:685d5f11838f | 1663 | This subsection provides a set of functions allowing to control the SPI. |
mbed_official | 235:685d5f11838f | 1664 | (+) HAL_SPI_GetState() API can be helpful to check in run-time the state of the SPI peripheral |
mbed_official | 235:685d5f11838f | 1665 | (+) HAL_SPI_GetError() check in run-time Errors occurring during communication |
mbed_official | 235:685d5f11838f | 1666 | @endverbatim |
mbed_official | 235:685d5f11838f | 1667 | * @{ |
mbed_official | 235:685d5f11838f | 1668 | */ |
mbed_official | 235:685d5f11838f | 1669 | |
mbed_official | 235:685d5f11838f | 1670 | /** |
mbed_official | 235:685d5f11838f | 1671 | * @brief Return the SPI state |
mbed_official | 235:685d5f11838f | 1672 | * @param hspi: pointer to a SPI_HandleTypeDef structure that contains |
mbed_official | 235:685d5f11838f | 1673 | * the configuration information for SPI module. |
mbed_official | 235:685d5f11838f | 1674 | * @retval HAL state |
mbed_official | 235:685d5f11838f | 1675 | */ |
mbed_official | 235:685d5f11838f | 1676 | HAL_SPI_StateTypeDef HAL_SPI_GetState(SPI_HandleTypeDef *hspi) |
mbed_official | 235:685d5f11838f | 1677 | { |
mbed_official | 235:685d5f11838f | 1678 | return hspi->State; |
mbed_official | 235:685d5f11838f | 1679 | } |
mbed_official | 235:685d5f11838f | 1680 | |
mbed_official | 235:685d5f11838f | 1681 | /** |
mbed_official | 235:685d5f11838f | 1682 | * @brief Return the SPI error code |
mbed_official | 235:685d5f11838f | 1683 | * @param hspi: pointer to a SPI_HandleTypeDef structure that contains |
mbed_official | 235:685d5f11838f | 1684 | * the configuration information for SPI module. |
mbed_official | 235:685d5f11838f | 1685 | * @retval SPI Error Code |
mbed_official | 235:685d5f11838f | 1686 | */ |
mbed_official | 235:685d5f11838f | 1687 | HAL_SPI_ErrorTypeDef HAL_SPI_GetError(SPI_HandleTypeDef *hspi) |
mbed_official | 235:685d5f11838f | 1688 | { |
mbed_official | 235:685d5f11838f | 1689 | return hspi->ErrorCode; |
mbed_official | 235:685d5f11838f | 1690 | } |
mbed_official | 235:685d5f11838f | 1691 | |
mbed_official | 235:685d5f11838f | 1692 | /** |
mbed_official | 235:685d5f11838f | 1693 | * @} |
mbed_official | 235:685d5f11838f | 1694 | */ |
mbed_official | 235:685d5f11838f | 1695 | |
mbed_official | 235:685d5f11838f | 1696 | /** |
mbed_official | 235:685d5f11838f | 1697 | * @brief Interrupt Handler to close Tx transfer |
mbed_official | 235:685d5f11838f | 1698 | * @param hspi: pointer to a SPI_HandleTypeDef structure that contains |
mbed_official | 235:685d5f11838f | 1699 | * the configuration information for SPI module. |
mbed_official | 235:685d5f11838f | 1700 | * @retval void |
mbed_official | 235:685d5f11838f | 1701 | */ |
mbed_official | 235:685d5f11838f | 1702 | static void SPI_TxCloseIRQHandler(SPI_HandleTypeDef *hspi) |
mbed_official | 235:685d5f11838f | 1703 | { |
mbed_official | 235:685d5f11838f | 1704 | /* Wait until TXE flag is set to send data */ |
mbed_official | 235:685d5f11838f | 1705 | if(SPI_WaitOnFlagUntilTimeout(hspi, SPI_FLAG_TXE, RESET, SPI_TIMEOUT_VALUE) != HAL_OK) |
mbed_official | 235:685d5f11838f | 1706 | { |
mbed_official | 235:685d5f11838f | 1707 | hspi->ErrorCode |= HAL_SPI_ERROR_FLAG; |
mbed_official | 235:685d5f11838f | 1708 | } |
mbed_official | 235:685d5f11838f | 1709 | |
mbed_official | 235:685d5f11838f | 1710 | /* Disable TXE interrupt */ |
mbed_official | 235:685d5f11838f | 1711 | __HAL_SPI_DISABLE_IT(hspi, (SPI_IT_TXE )); |
mbed_official | 235:685d5f11838f | 1712 | |
mbed_official | 235:685d5f11838f | 1713 | /* Disable ERR interrupt if Receive process is finished */ |
mbed_official | 235:685d5f11838f | 1714 | if(__HAL_SPI_GET_IT_SOURCE(hspi, SPI_IT_RXNE) == RESET) |
mbed_official | 235:685d5f11838f | 1715 | { |
mbed_official | 235:685d5f11838f | 1716 | __HAL_SPI_DISABLE_IT(hspi, (SPI_IT_ERR)); |
mbed_official | 235:685d5f11838f | 1717 | |
mbed_official | 235:685d5f11838f | 1718 | /* Wait until Busy flag is reset before disabling SPI */ |
mbed_official | 235:685d5f11838f | 1719 | if(SPI_WaitOnFlagUntilTimeout(hspi, SPI_FLAG_BSY, SET, SPI_TIMEOUT_VALUE) != HAL_OK) |
mbed_official | 235:685d5f11838f | 1720 | { |
mbed_official | 235:685d5f11838f | 1721 | hspi->ErrorCode |= HAL_SPI_ERROR_FLAG; |
mbed_official | 235:685d5f11838f | 1722 | } |
mbed_official | 235:685d5f11838f | 1723 | |
mbed_official | 235:685d5f11838f | 1724 | /* Clear OVERUN flag in 2 Lines communication mode because received is not read */ |
mbed_official | 235:685d5f11838f | 1725 | if(hspi->Init.Direction == SPI_DIRECTION_2LINES) |
mbed_official | 235:685d5f11838f | 1726 | { |
mbed_official | 235:685d5f11838f | 1727 | __HAL_SPI_CLEAR_OVRFLAG(hspi); |
mbed_official | 235:685d5f11838f | 1728 | } |
mbed_official | 235:685d5f11838f | 1729 | |
mbed_official | 235:685d5f11838f | 1730 | /* Check if Errors has been detected during transfer */ |
mbed_official | 235:685d5f11838f | 1731 | if(hspi->ErrorCode == HAL_SPI_ERROR_NONE) |
mbed_official | 235:685d5f11838f | 1732 | { |
mbed_official | 235:685d5f11838f | 1733 | /* Check if we are in Tx or in Rx/Tx Mode */ |
mbed_official | 235:685d5f11838f | 1734 | if(hspi->State == HAL_SPI_STATE_BUSY_TX_RX) |
mbed_official | 235:685d5f11838f | 1735 | { |
mbed_official | 235:685d5f11838f | 1736 | /* Set state to READY before run the Callback Complete */ |
mbed_official | 235:685d5f11838f | 1737 | hspi->State = HAL_SPI_STATE_READY; |
mbed_official | 235:685d5f11838f | 1738 | HAL_SPI_TxRxCpltCallback(hspi); |
mbed_official | 235:685d5f11838f | 1739 | } |
mbed_official | 235:685d5f11838f | 1740 | else |
mbed_official | 235:685d5f11838f | 1741 | { |
mbed_official | 235:685d5f11838f | 1742 | /* Set state to READY before run the Callback Complete */ |
mbed_official | 235:685d5f11838f | 1743 | hspi->State = HAL_SPI_STATE_READY; |
mbed_official | 235:685d5f11838f | 1744 | HAL_SPI_TxCpltCallback(hspi); |
mbed_official | 235:685d5f11838f | 1745 | } |
mbed_official | 235:685d5f11838f | 1746 | } |
mbed_official | 235:685d5f11838f | 1747 | else |
mbed_official | 235:685d5f11838f | 1748 | { |
mbed_official | 235:685d5f11838f | 1749 | /* Set state to READY before run the Callback Complete */ |
mbed_official | 235:685d5f11838f | 1750 | hspi->State = HAL_SPI_STATE_READY; |
mbed_official | 235:685d5f11838f | 1751 | /* Call Error call back in case of Error */ |
mbed_official | 235:685d5f11838f | 1752 | HAL_SPI_ErrorCallback(hspi); |
mbed_official | 235:685d5f11838f | 1753 | } |
mbed_official | 235:685d5f11838f | 1754 | } |
mbed_official | 235:685d5f11838f | 1755 | } |
mbed_official | 235:685d5f11838f | 1756 | |
mbed_official | 235:685d5f11838f | 1757 | /** |
mbed_official | 235:685d5f11838f | 1758 | * @brief Interrupt Handler to transmit amount of data in no-blocking mode |
mbed_official | 235:685d5f11838f | 1759 | * @param hspi: pointer to a SPI_HandleTypeDef structure that contains |
mbed_official | 235:685d5f11838f | 1760 | * the configuration information for SPI module. |
mbed_official | 235:685d5f11838f | 1761 | * @retval void |
mbed_official | 235:685d5f11838f | 1762 | */ |
mbed_official | 235:685d5f11838f | 1763 | static void SPI_TxISR(SPI_HandleTypeDef *hspi) |
mbed_official | 235:685d5f11838f | 1764 | { |
mbed_official | 235:685d5f11838f | 1765 | /* Transmit data in 8 Bit mode */ |
mbed_official | 235:685d5f11838f | 1766 | if(hspi->Init.DataSize == SPI_DATASIZE_8BIT) |
mbed_official | 235:685d5f11838f | 1767 | { |
mbed_official | 235:685d5f11838f | 1768 | hspi->Instance->DR = (*hspi->pTxBuffPtr++); |
mbed_official | 235:685d5f11838f | 1769 | } |
mbed_official | 235:685d5f11838f | 1770 | /* Transmit data in 16 Bit mode */ |
mbed_official | 235:685d5f11838f | 1771 | else |
mbed_official | 235:685d5f11838f | 1772 | { |
mbed_official | 235:685d5f11838f | 1773 | hspi->Instance->DR = *((uint16_t*)hspi->pTxBuffPtr); |
mbed_official | 235:685d5f11838f | 1774 | hspi->pTxBuffPtr+=2; |
mbed_official | 235:685d5f11838f | 1775 | } |
mbed_official | 235:685d5f11838f | 1776 | hspi->TxXferCount--; |
mbed_official | 235:685d5f11838f | 1777 | |
mbed_official | 235:685d5f11838f | 1778 | if(hspi->TxXferCount == 0) |
mbed_official | 235:685d5f11838f | 1779 | { |
mbed_official | 235:685d5f11838f | 1780 | if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLED) |
mbed_official | 235:685d5f11838f | 1781 | { |
mbed_official | 235:685d5f11838f | 1782 | /* calculate and transfer CRC on Tx line */ |
mbed_official | 235:685d5f11838f | 1783 | hspi->Instance->CR1 |= SPI_CR1_CRCNEXT; |
mbed_official | 235:685d5f11838f | 1784 | } |
mbed_official | 235:685d5f11838f | 1785 | SPI_TxCloseIRQHandler(hspi); |
mbed_official | 235:685d5f11838f | 1786 | } |
mbed_official | 235:685d5f11838f | 1787 | } |
mbed_official | 235:685d5f11838f | 1788 | |
mbed_official | 235:685d5f11838f | 1789 | /** |
mbed_official | 235:685d5f11838f | 1790 | * @brief Interrupt Handler to close Rx transfer |
mbed_official | 235:685d5f11838f | 1791 | * @param hspi: pointer to a SPI_HandleTypeDef structure that contains |
mbed_official | 235:685d5f11838f | 1792 | * the configuration information for SPI module. |
mbed_official | 235:685d5f11838f | 1793 | * @retval void |
mbed_official | 235:685d5f11838f | 1794 | */ |
mbed_official | 235:685d5f11838f | 1795 | static void SPI_RxCloseIRQHandler(SPI_HandleTypeDef *hspi) |
mbed_official | 235:685d5f11838f | 1796 | { |
mbed_official | 235:685d5f11838f | 1797 | __IO uint16_t tmpreg; |
mbed_official | 235:685d5f11838f | 1798 | |
mbed_official | 235:685d5f11838f | 1799 | if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLED) |
mbed_official | 235:685d5f11838f | 1800 | { |
mbed_official | 235:685d5f11838f | 1801 | /* Wait until RXNE flag is set to send data */ |
mbed_official | 235:685d5f11838f | 1802 | if(SPI_WaitOnFlagUntilTimeout(hspi, SPI_FLAG_RXNE, RESET, SPI_TIMEOUT_VALUE) != HAL_OK) |
mbed_official | 235:685d5f11838f | 1803 | { |
mbed_official | 235:685d5f11838f | 1804 | hspi->ErrorCode |= HAL_SPI_ERROR_FLAG; |
mbed_official | 235:685d5f11838f | 1805 | } |
mbed_official | 235:685d5f11838f | 1806 | |
mbed_official | 235:685d5f11838f | 1807 | /* Read CRC to reset RXNE flag */ |
mbed_official | 235:685d5f11838f | 1808 | tmpreg = hspi->Instance->DR; |
mbed_official | 235:685d5f11838f | 1809 | |
mbed_official | 235:685d5f11838f | 1810 | /* Wait until RXNE flag is set to send data */ |
mbed_official | 235:685d5f11838f | 1811 | if(SPI_WaitOnFlagUntilTimeout(hspi, SPI_FLAG_RXNE, SET, SPI_TIMEOUT_VALUE) != HAL_OK) |
mbed_official | 235:685d5f11838f | 1812 | { |
mbed_official | 235:685d5f11838f | 1813 | hspi->ErrorCode |= HAL_SPI_ERROR_FLAG; |
mbed_official | 235:685d5f11838f | 1814 | } |
mbed_official | 235:685d5f11838f | 1815 | |
mbed_official | 235:685d5f11838f | 1816 | /* Check if CRC error occurred */ |
mbed_official | 235:685d5f11838f | 1817 | if(__HAL_SPI_GET_FLAG(hspi, SPI_FLAG_CRCERR) != RESET) |
mbed_official | 235:685d5f11838f | 1818 | { |
mbed_official | 235:685d5f11838f | 1819 | hspi->ErrorCode |= HAL_SPI_ERROR_CRC; |
mbed_official | 235:685d5f11838f | 1820 | |
mbed_official | 235:685d5f11838f | 1821 | /* Reset CRC Calculation */ |
mbed_official | 235:685d5f11838f | 1822 | __HAL_SPI_RESET_CRC(hspi); |
mbed_official | 235:685d5f11838f | 1823 | } |
mbed_official | 235:685d5f11838f | 1824 | } |
mbed_official | 235:685d5f11838f | 1825 | |
mbed_official | 235:685d5f11838f | 1826 | /* Disable RXNE and ERR interrupt */ |
mbed_official | 235:685d5f11838f | 1827 | __HAL_SPI_DISABLE_IT(hspi, (SPI_IT_RXNE)); |
mbed_official | 235:685d5f11838f | 1828 | |
mbed_official | 235:685d5f11838f | 1829 | /* if Transmit process is finished */ |
mbed_official | 235:685d5f11838f | 1830 | if(__HAL_SPI_GET_IT_SOURCE(hspi, SPI_IT_TXE) == RESET) |
mbed_official | 235:685d5f11838f | 1831 | { |
mbed_official | 235:685d5f11838f | 1832 | /* Disable ERR interrupt */ |
mbed_official | 235:685d5f11838f | 1833 | __HAL_SPI_DISABLE_IT(hspi, (SPI_IT_ERR)); |
mbed_official | 235:685d5f11838f | 1834 | |
mbed_official | 235:685d5f11838f | 1835 | if((hspi->Init.Mode == SPI_MODE_MASTER)&&((hspi->Init.Direction == SPI_DIRECTION_1LINE)||(hspi->Init.Direction == SPI_DIRECTION_2LINES_RXONLY))) |
mbed_official | 235:685d5f11838f | 1836 | { |
mbed_official | 235:685d5f11838f | 1837 | /* Disable SPI peripheral */ |
mbed_official | 235:685d5f11838f | 1838 | __HAL_SPI_DISABLE(hspi); |
mbed_official | 235:685d5f11838f | 1839 | } |
mbed_official | 235:685d5f11838f | 1840 | |
mbed_official | 235:685d5f11838f | 1841 | /* Check if Errors has been detected during transfer */ |
mbed_official | 235:685d5f11838f | 1842 | if(hspi->ErrorCode == HAL_SPI_ERROR_NONE) |
mbed_official | 235:685d5f11838f | 1843 | { |
mbed_official | 235:685d5f11838f | 1844 | /* Check if we are in Rx or in Rx/Tx Mode */ |
mbed_official | 235:685d5f11838f | 1845 | if(hspi->State == HAL_SPI_STATE_BUSY_TX_RX) |
mbed_official | 235:685d5f11838f | 1846 | { |
mbed_official | 235:685d5f11838f | 1847 | /* Set state to READY before run the Callback Complete */ |
mbed_official | 235:685d5f11838f | 1848 | hspi->State = HAL_SPI_STATE_READY; |
mbed_official | 235:685d5f11838f | 1849 | HAL_SPI_TxRxCpltCallback(hspi); |
mbed_official | 235:685d5f11838f | 1850 | } |
mbed_official | 235:685d5f11838f | 1851 | else |
mbed_official | 235:685d5f11838f | 1852 | { |
mbed_official | 235:685d5f11838f | 1853 | /* Set state to READY before run the Callback Complete */ |
mbed_official | 235:685d5f11838f | 1854 | hspi->State = HAL_SPI_STATE_READY; |
mbed_official | 235:685d5f11838f | 1855 | HAL_SPI_RxCpltCallback(hspi); |
mbed_official | 235:685d5f11838f | 1856 | } |
mbed_official | 235:685d5f11838f | 1857 | } |
mbed_official | 235:685d5f11838f | 1858 | else |
mbed_official | 235:685d5f11838f | 1859 | { |
mbed_official | 235:685d5f11838f | 1860 | /* Set state to READY before run the Callback Complete */ |
mbed_official | 235:685d5f11838f | 1861 | hspi->State = HAL_SPI_STATE_READY; |
mbed_official | 235:685d5f11838f | 1862 | /* Call Error call back in case of Error */ |
mbed_official | 235:685d5f11838f | 1863 | HAL_SPI_ErrorCallback(hspi); |
mbed_official | 235:685d5f11838f | 1864 | } |
mbed_official | 235:685d5f11838f | 1865 | } |
mbed_official | 235:685d5f11838f | 1866 | } |
mbed_official | 235:685d5f11838f | 1867 | |
mbed_official | 235:685d5f11838f | 1868 | /** |
mbed_official | 235:685d5f11838f | 1869 | * @brief Interrupt Handler to receive amount of data in 2Lines mode |
mbed_official | 235:685d5f11838f | 1870 | * @param hspi: pointer to a SPI_HandleTypeDef structure that contains |
mbed_official | 235:685d5f11838f | 1871 | * the configuration information for SPI module. |
mbed_official | 235:685d5f11838f | 1872 | * @retval void |
mbed_official | 235:685d5f11838f | 1873 | */ |
mbed_official | 235:685d5f11838f | 1874 | static void SPI_2LinesRxISR(SPI_HandleTypeDef *hspi) |
mbed_official | 235:685d5f11838f | 1875 | { |
mbed_official | 235:685d5f11838f | 1876 | /* Receive data in 8 Bit mode */ |
mbed_official | 235:685d5f11838f | 1877 | if(hspi->Init.DataSize == SPI_DATASIZE_8BIT) |
mbed_official | 235:685d5f11838f | 1878 | { |
mbed_official | 235:685d5f11838f | 1879 | (*hspi->pRxBuffPtr++) = hspi->Instance->DR; |
mbed_official | 235:685d5f11838f | 1880 | } |
mbed_official | 235:685d5f11838f | 1881 | /* Receive data in 16 Bit mode */ |
mbed_official | 235:685d5f11838f | 1882 | else |
mbed_official | 235:685d5f11838f | 1883 | { |
mbed_official | 235:685d5f11838f | 1884 | *((uint16_t*)hspi->pRxBuffPtr) = hspi->Instance->DR; |
mbed_official | 235:685d5f11838f | 1885 | hspi->pRxBuffPtr+=2; |
mbed_official | 235:685d5f11838f | 1886 | } |
mbed_official | 235:685d5f11838f | 1887 | hspi->RxXferCount--; |
mbed_official | 235:685d5f11838f | 1888 | |
mbed_official | 235:685d5f11838f | 1889 | if(hspi->RxXferCount==0) |
mbed_official | 235:685d5f11838f | 1890 | { |
mbed_official | 235:685d5f11838f | 1891 | SPI_RxCloseIRQHandler(hspi); |
mbed_official | 235:685d5f11838f | 1892 | } |
mbed_official | 235:685d5f11838f | 1893 | } |
mbed_official | 235:685d5f11838f | 1894 | |
mbed_official | 235:685d5f11838f | 1895 | /** |
mbed_official | 235:685d5f11838f | 1896 | * @brief Interrupt Handler to receive amount of data in no-blocking mode |
mbed_official | 235:685d5f11838f | 1897 | * @param hspi: pointer to a SPI_HandleTypeDef structure that contains |
mbed_official | 235:685d5f11838f | 1898 | * the configuration information for SPI module. |
mbed_official | 235:685d5f11838f | 1899 | * @retval void |
mbed_official | 235:685d5f11838f | 1900 | */ |
mbed_official | 235:685d5f11838f | 1901 | static void SPI_RxISR(SPI_HandleTypeDef *hspi) |
mbed_official | 235:685d5f11838f | 1902 | { |
mbed_official | 235:685d5f11838f | 1903 | /* Receive data in 8 Bit mode */ |
mbed_official | 235:685d5f11838f | 1904 | if(hspi->Init.DataSize == SPI_DATASIZE_8BIT) |
mbed_official | 235:685d5f11838f | 1905 | { |
mbed_official | 235:685d5f11838f | 1906 | (*hspi->pRxBuffPtr++) = hspi->Instance->DR; |
mbed_official | 235:685d5f11838f | 1907 | } |
mbed_official | 235:685d5f11838f | 1908 | /* Receive data in 16 Bit mode */ |
mbed_official | 235:685d5f11838f | 1909 | else |
mbed_official | 235:685d5f11838f | 1910 | { |
mbed_official | 235:685d5f11838f | 1911 | *((uint16_t*)hspi->pRxBuffPtr) = hspi->Instance->DR; |
mbed_official | 235:685d5f11838f | 1912 | hspi->pRxBuffPtr+=2; |
mbed_official | 235:685d5f11838f | 1913 | } |
mbed_official | 235:685d5f11838f | 1914 | hspi->RxXferCount--; |
mbed_official | 235:685d5f11838f | 1915 | |
mbed_official | 235:685d5f11838f | 1916 | /* Enable CRC Transmission */ |
mbed_official | 235:685d5f11838f | 1917 | if((hspi->RxXferCount == 1) && (hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLED)) |
mbed_official | 235:685d5f11838f | 1918 | { |
mbed_official | 235:685d5f11838f | 1919 | /* Set CRC Next to calculate CRC on Rx side */ |
mbed_official | 235:685d5f11838f | 1920 | hspi->Instance->CR1 |= SPI_CR1_CRCNEXT; |
mbed_official | 235:685d5f11838f | 1921 | } |
mbed_official | 235:685d5f11838f | 1922 | |
mbed_official | 235:685d5f11838f | 1923 | if(hspi->RxXferCount == 0) |
mbed_official | 235:685d5f11838f | 1924 | { |
mbed_official | 235:685d5f11838f | 1925 | SPI_RxCloseIRQHandler(hspi); |
mbed_official | 235:685d5f11838f | 1926 | } |
mbed_official | 235:685d5f11838f | 1927 | } |
mbed_official | 235:685d5f11838f | 1928 | |
mbed_official | 235:685d5f11838f | 1929 | /** |
mbed_official | 235:685d5f11838f | 1930 | * @brief DMA SPI transmit process complete callback |
mbed_official | 235:685d5f11838f | 1931 | * @param hdma: pointer to a DMA_HandleTypeDef structure that contains |
mbed_official | 235:685d5f11838f | 1932 | * the configuration information for the specified DMA module. |
mbed_official | 235:685d5f11838f | 1933 | * @retval None |
mbed_official | 235:685d5f11838f | 1934 | */ |
mbed_official | 235:685d5f11838f | 1935 | static void SPI_DMATransmitCplt(DMA_HandleTypeDef *hdma) |
mbed_official | 235:685d5f11838f | 1936 | { |
mbed_official | 235:685d5f11838f | 1937 | SPI_HandleTypeDef* hspi = ( SPI_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent; |
mbed_official | 235:685d5f11838f | 1938 | |
mbed_official | 235:685d5f11838f | 1939 | /* DMA Normal Mode */ |
mbed_official | 235:685d5f11838f | 1940 | if((hdma->Instance->CR & DMA_SxCR_CIRC) == 0) |
mbed_official | 235:685d5f11838f | 1941 | { |
mbed_official | 235:685d5f11838f | 1942 | /* Wait until TXE flag is set to send data */ |
mbed_official | 235:685d5f11838f | 1943 | if(SPI_WaitOnFlagUntilTimeout(hspi, SPI_FLAG_TXE, RESET, SPI_TIMEOUT_VALUE) != HAL_OK) |
mbed_official | 235:685d5f11838f | 1944 | { |
mbed_official | 235:685d5f11838f | 1945 | hspi->ErrorCode |= HAL_SPI_ERROR_FLAG; |
mbed_official | 235:685d5f11838f | 1946 | } |
mbed_official | 235:685d5f11838f | 1947 | /* Disable Tx DMA Request */ |
mbed_official | 235:685d5f11838f | 1948 | hspi->Instance->CR2 &= (uint32_t)(~SPI_CR2_TXDMAEN); |
mbed_official | 235:685d5f11838f | 1949 | |
mbed_official | 235:685d5f11838f | 1950 | /* Wait until Busy flag is reset before disabling SPI */ |
mbed_official | 235:685d5f11838f | 1951 | if(SPI_WaitOnFlagUntilTimeout(hspi, SPI_FLAG_BSY, SET, SPI_TIMEOUT_VALUE) != HAL_OK) |
mbed_official | 235:685d5f11838f | 1952 | { |
mbed_official | 235:685d5f11838f | 1953 | hspi->ErrorCode |= HAL_SPI_ERROR_FLAG; |
mbed_official | 235:685d5f11838f | 1954 | } |
mbed_official | 235:685d5f11838f | 1955 | |
mbed_official | 235:685d5f11838f | 1956 | hspi->TxXferCount = 0; |
mbed_official | 235:685d5f11838f | 1957 | |
mbed_official | 235:685d5f11838f | 1958 | hspi->State = HAL_SPI_STATE_READY; |
mbed_official | 235:685d5f11838f | 1959 | } |
mbed_official | 235:685d5f11838f | 1960 | |
mbed_official | 235:685d5f11838f | 1961 | /* Clear OVERUN flag in 2 Lines communication mode because received is not read */ |
mbed_official | 235:685d5f11838f | 1962 | if(hspi->Init.Direction == SPI_DIRECTION_2LINES) |
mbed_official | 235:685d5f11838f | 1963 | { |
mbed_official | 235:685d5f11838f | 1964 | __HAL_SPI_CLEAR_OVRFLAG(hspi); |
mbed_official | 235:685d5f11838f | 1965 | } |
mbed_official | 235:685d5f11838f | 1966 | |
mbed_official | 235:685d5f11838f | 1967 | /* Check if Errors has been detected during transfer */ |
mbed_official | 235:685d5f11838f | 1968 | if(hspi->ErrorCode != HAL_SPI_ERROR_NONE) |
mbed_official | 235:685d5f11838f | 1969 | { |
mbed_official | 235:685d5f11838f | 1970 | HAL_SPI_ErrorCallback(hspi); |
mbed_official | 235:685d5f11838f | 1971 | } |
mbed_official | 235:685d5f11838f | 1972 | else |
mbed_official | 235:685d5f11838f | 1973 | { |
mbed_official | 235:685d5f11838f | 1974 | HAL_SPI_TxCpltCallback(hspi); |
mbed_official | 235:685d5f11838f | 1975 | } |
mbed_official | 235:685d5f11838f | 1976 | } |
mbed_official | 235:685d5f11838f | 1977 | |
mbed_official | 235:685d5f11838f | 1978 | /** |
mbed_official | 235:685d5f11838f | 1979 | * @brief DMA SPI receive process complete callback |
mbed_official | 235:685d5f11838f | 1980 | * @param hdma: pointer to a DMA_HandleTypeDef structure that contains |
mbed_official | 235:685d5f11838f | 1981 | * the configuration information for the specified DMA module. |
mbed_official | 235:685d5f11838f | 1982 | * @retval None |
mbed_official | 235:685d5f11838f | 1983 | */ |
mbed_official | 235:685d5f11838f | 1984 | static void SPI_DMAReceiveCplt(DMA_HandleTypeDef *hdma) |
mbed_official | 235:685d5f11838f | 1985 | { |
mbed_official | 235:685d5f11838f | 1986 | __IO uint16_t tmpreg; |
mbed_official | 235:685d5f11838f | 1987 | |
mbed_official | 235:685d5f11838f | 1988 | SPI_HandleTypeDef* hspi = ( SPI_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent; |
mbed_official | 235:685d5f11838f | 1989 | /* DMA Normal mode */ |
mbed_official | 235:685d5f11838f | 1990 | if((hdma->Instance->CR & DMA_SxCR_CIRC) == 0) |
mbed_official | 235:685d5f11838f | 1991 | { |
mbed_official | 235:685d5f11838f | 1992 | if((hspi->Init.Mode == SPI_MODE_MASTER)&&((hspi->Init.Direction == SPI_DIRECTION_1LINE)||(hspi->Init.Direction == SPI_DIRECTION_2LINES_RXONLY))) |
mbed_official | 235:685d5f11838f | 1993 | { |
mbed_official | 235:685d5f11838f | 1994 | /* Disable SPI peripheral */ |
mbed_official | 235:685d5f11838f | 1995 | __HAL_SPI_DISABLE(hspi); |
mbed_official | 235:685d5f11838f | 1996 | } |
mbed_official | 235:685d5f11838f | 1997 | |
mbed_official | 235:685d5f11838f | 1998 | /* Disable Rx DMA Request */ |
mbed_official | 235:685d5f11838f | 1999 | hspi->Instance->CR2 &= (uint32_t)(~SPI_CR2_RXDMAEN); |
mbed_official | 235:685d5f11838f | 2000 | /* Disable Tx DMA Request (done by default to handle the case Master RX direction 2 lines) */ |
mbed_official | 235:685d5f11838f | 2001 | hspi->Instance->CR2 &= (uint32_t)(~SPI_CR2_TXDMAEN); |
mbed_official | 235:685d5f11838f | 2002 | |
mbed_official | 235:685d5f11838f | 2003 | hspi->RxXferCount = 0; |
mbed_official | 235:685d5f11838f | 2004 | hspi->State = HAL_SPI_STATE_READY; |
mbed_official | 235:685d5f11838f | 2005 | |
mbed_official | 235:685d5f11838f | 2006 | |
mbed_official | 235:685d5f11838f | 2007 | /* Reset CRC Calculation */ |
mbed_official | 235:685d5f11838f | 2008 | if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLED) |
mbed_official | 235:685d5f11838f | 2009 | { |
mbed_official | 235:685d5f11838f | 2010 | /* Wait until RXNE flag is set to send data */ |
mbed_official | 235:685d5f11838f | 2011 | if(SPI_WaitOnFlagUntilTimeout(hspi, SPI_FLAG_RXNE, RESET, SPI_TIMEOUT_VALUE) != HAL_OK) |
mbed_official | 235:685d5f11838f | 2012 | { |
mbed_official | 235:685d5f11838f | 2013 | hspi->ErrorCode |= HAL_SPI_ERROR_FLAG; |
mbed_official | 235:685d5f11838f | 2014 | } |
mbed_official | 235:685d5f11838f | 2015 | |
mbed_official | 235:685d5f11838f | 2016 | /* Read CRC */ |
mbed_official | 235:685d5f11838f | 2017 | tmpreg = hspi->Instance->DR; |
mbed_official | 235:685d5f11838f | 2018 | |
mbed_official | 235:685d5f11838f | 2019 | /* Wait until RXNE flag is set */ |
mbed_official | 235:685d5f11838f | 2020 | if(SPI_WaitOnFlagUntilTimeout(hspi, SPI_FLAG_RXNE, SET, SPI_TIMEOUT_VALUE) != HAL_OK) |
mbed_official | 235:685d5f11838f | 2021 | { |
mbed_official | 235:685d5f11838f | 2022 | hspi->ErrorCode |= HAL_SPI_ERROR_FLAG; |
mbed_official | 235:685d5f11838f | 2023 | } |
mbed_official | 235:685d5f11838f | 2024 | |
mbed_official | 235:685d5f11838f | 2025 | /* Check if CRC error occurred */ |
mbed_official | 235:685d5f11838f | 2026 | if(__HAL_SPI_GET_FLAG(hspi, SPI_FLAG_CRCERR) != RESET) |
mbed_official | 235:685d5f11838f | 2027 | { |
mbed_official | 235:685d5f11838f | 2028 | hspi->ErrorCode |= HAL_SPI_ERROR_CRC; |
mbed_official | 235:685d5f11838f | 2029 | __HAL_SPI_CLEAR_CRCERRFLAG(hspi); |
mbed_official | 235:685d5f11838f | 2030 | } |
mbed_official | 235:685d5f11838f | 2031 | } |
mbed_official | 235:685d5f11838f | 2032 | |
mbed_official | 235:685d5f11838f | 2033 | /* Check if Errors has been detected during transfer */ |
mbed_official | 235:685d5f11838f | 2034 | if(hspi->ErrorCode != HAL_SPI_ERROR_NONE) |
mbed_official | 235:685d5f11838f | 2035 | { |
mbed_official | 235:685d5f11838f | 2036 | HAL_SPI_ErrorCallback(hspi); |
mbed_official | 235:685d5f11838f | 2037 | } |
mbed_official | 235:685d5f11838f | 2038 | else |
mbed_official | 235:685d5f11838f | 2039 | { |
mbed_official | 235:685d5f11838f | 2040 | HAL_SPI_RxCpltCallback(hspi); |
mbed_official | 235:685d5f11838f | 2041 | } |
mbed_official | 235:685d5f11838f | 2042 | } |
mbed_official | 235:685d5f11838f | 2043 | else |
mbed_official | 235:685d5f11838f | 2044 | { |
mbed_official | 235:685d5f11838f | 2045 | HAL_SPI_RxCpltCallback(hspi); |
mbed_official | 235:685d5f11838f | 2046 | } |
mbed_official | 235:685d5f11838f | 2047 | } |
mbed_official | 235:685d5f11838f | 2048 | |
mbed_official | 235:685d5f11838f | 2049 | /** |
mbed_official | 235:685d5f11838f | 2050 | * @brief DMA SPI transmit receive process complete callback |
mbed_official | 235:685d5f11838f | 2051 | * @param hdma: pointer to a DMA_HandleTypeDef structure that contains |
mbed_official | 235:685d5f11838f | 2052 | * the configuration information for the specified DMA module. |
mbed_official | 235:685d5f11838f | 2053 | * @retval None |
mbed_official | 235:685d5f11838f | 2054 | */ |
mbed_official | 235:685d5f11838f | 2055 | static void SPI_DMATransmitReceiveCplt(DMA_HandleTypeDef *hdma) |
mbed_official | 235:685d5f11838f | 2056 | { |
mbed_official | 235:685d5f11838f | 2057 | __IO uint16_t tmpreg; |
mbed_official | 235:685d5f11838f | 2058 | |
mbed_official | 235:685d5f11838f | 2059 | SPI_HandleTypeDef* hspi = ( SPI_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent; |
mbed_official | 235:685d5f11838f | 2060 | if((hdma->Instance->CR & DMA_SxCR_CIRC) == 0) |
mbed_official | 235:685d5f11838f | 2061 | { |
mbed_official | 235:685d5f11838f | 2062 | /* Reset CRC Calculation */ |
mbed_official | 235:685d5f11838f | 2063 | if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLED) |
mbed_official | 235:685d5f11838f | 2064 | { |
mbed_official | 235:685d5f11838f | 2065 | /* Check if CRC is done on going (RXNE flag set) */ |
mbed_official | 235:685d5f11838f | 2066 | if(SPI_WaitOnFlagUntilTimeout(hspi, SPI_FLAG_RXNE, SET, SPI_TIMEOUT_VALUE) == HAL_OK) |
mbed_official | 235:685d5f11838f | 2067 | { |
mbed_official | 235:685d5f11838f | 2068 | /* Wait until RXNE flag is set to send data */ |
mbed_official | 235:685d5f11838f | 2069 | if(SPI_WaitOnFlagUntilTimeout(hspi, SPI_FLAG_RXNE, RESET, SPI_TIMEOUT_VALUE) != HAL_OK) |
mbed_official | 235:685d5f11838f | 2070 | { |
mbed_official | 235:685d5f11838f | 2071 | hspi->ErrorCode |= HAL_SPI_ERROR_FLAG; |
mbed_official | 235:685d5f11838f | 2072 | } |
mbed_official | 235:685d5f11838f | 2073 | } |
mbed_official | 235:685d5f11838f | 2074 | /* Read CRC */ |
mbed_official | 235:685d5f11838f | 2075 | tmpreg = hspi->Instance->DR; |
mbed_official | 235:685d5f11838f | 2076 | |
mbed_official | 235:685d5f11838f | 2077 | /* Check if CRC error occurred */ |
mbed_official | 235:685d5f11838f | 2078 | if(__HAL_SPI_GET_FLAG(hspi, SPI_FLAG_CRCERR) != RESET) |
mbed_official | 235:685d5f11838f | 2079 | { |
mbed_official | 235:685d5f11838f | 2080 | hspi->ErrorCode |= HAL_SPI_ERROR_CRC; |
mbed_official | 235:685d5f11838f | 2081 | __HAL_SPI_CLEAR_CRCERRFLAG(hspi); |
mbed_official | 235:685d5f11838f | 2082 | } |
mbed_official | 235:685d5f11838f | 2083 | } |
mbed_official | 235:685d5f11838f | 2084 | |
mbed_official | 235:685d5f11838f | 2085 | /* Wait until TXE flag is set to send data */ |
mbed_official | 235:685d5f11838f | 2086 | if(SPI_WaitOnFlagUntilTimeout(hspi, SPI_FLAG_TXE, RESET, SPI_TIMEOUT_VALUE) != HAL_OK) |
mbed_official | 235:685d5f11838f | 2087 | { |
mbed_official | 235:685d5f11838f | 2088 | hspi->ErrorCode |= HAL_SPI_ERROR_FLAG; |
mbed_official | 235:685d5f11838f | 2089 | } |
mbed_official | 235:685d5f11838f | 2090 | /* Disable Tx DMA Request */ |
mbed_official | 235:685d5f11838f | 2091 | hspi->Instance->CR2 &= (uint32_t)(~SPI_CR2_TXDMAEN); |
mbed_official | 235:685d5f11838f | 2092 | |
mbed_official | 235:685d5f11838f | 2093 | /* Wait until Busy flag is reset before disabling SPI */ |
mbed_official | 235:685d5f11838f | 2094 | if(SPI_WaitOnFlagUntilTimeout(hspi, SPI_FLAG_BSY, SET, SPI_TIMEOUT_VALUE) != HAL_OK) |
mbed_official | 235:685d5f11838f | 2095 | { |
mbed_official | 235:685d5f11838f | 2096 | hspi->ErrorCode |= HAL_SPI_ERROR_FLAG; |
mbed_official | 235:685d5f11838f | 2097 | } |
mbed_official | 235:685d5f11838f | 2098 | |
mbed_official | 235:685d5f11838f | 2099 | /* Disable Rx DMA Request */ |
mbed_official | 235:685d5f11838f | 2100 | hspi->Instance->CR2 &= (uint32_t)(~SPI_CR2_RXDMAEN); |
mbed_official | 235:685d5f11838f | 2101 | |
mbed_official | 235:685d5f11838f | 2102 | hspi->TxXferCount = 0; |
mbed_official | 235:685d5f11838f | 2103 | hspi->RxXferCount = 0; |
mbed_official | 235:685d5f11838f | 2104 | |
mbed_official | 235:685d5f11838f | 2105 | hspi->State = HAL_SPI_STATE_READY; |
mbed_official | 235:685d5f11838f | 2106 | |
mbed_official | 235:685d5f11838f | 2107 | |
mbed_official | 235:685d5f11838f | 2108 | /* Check if Errors has been detected during transfer */ |
mbed_official | 235:685d5f11838f | 2109 | if(hspi->ErrorCode != HAL_SPI_ERROR_NONE) |
mbed_official | 235:685d5f11838f | 2110 | { |
mbed_official | 235:685d5f11838f | 2111 | HAL_SPI_ErrorCallback(hspi); |
mbed_official | 235:685d5f11838f | 2112 | } |
mbed_official | 235:685d5f11838f | 2113 | else |
mbed_official | 235:685d5f11838f | 2114 | { |
mbed_official | 235:685d5f11838f | 2115 | HAL_SPI_TxRxCpltCallback(hspi); |
mbed_official | 235:685d5f11838f | 2116 | } |
mbed_official | 235:685d5f11838f | 2117 | } |
mbed_official | 235:685d5f11838f | 2118 | else |
mbed_official | 235:685d5f11838f | 2119 | { |
mbed_official | 235:685d5f11838f | 2120 | HAL_SPI_TxRxCpltCallback(hspi); |
mbed_official | 235:685d5f11838f | 2121 | } |
mbed_official | 235:685d5f11838f | 2122 | } |
mbed_official | 235:685d5f11838f | 2123 | |
mbed_official | 235:685d5f11838f | 2124 | /** |
mbed_official | 235:685d5f11838f | 2125 | * @brief DMA SPI half transmit process complete callback |
mbed_official | 235:685d5f11838f | 2126 | * @param hdma: pointer to a DMA_HandleTypeDef structure that contains |
mbed_official | 235:685d5f11838f | 2127 | * the configuration information for the specified DMA module. |
mbed_official | 235:685d5f11838f | 2128 | * @retval None |
mbed_official | 235:685d5f11838f | 2129 | */ |
mbed_official | 235:685d5f11838f | 2130 | static void SPI_DMAHalfTransmitCplt(DMA_HandleTypeDef *hdma) |
mbed_official | 235:685d5f11838f | 2131 | { |
mbed_official | 235:685d5f11838f | 2132 | SPI_HandleTypeDef* hspi = ( SPI_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent; |
mbed_official | 235:685d5f11838f | 2133 | |
mbed_official | 235:685d5f11838f | 2134 | HAL_SPI_TxHalfCpltCallback(hspi); |
mbed_official | 235:685d5f11838f | 2135 | } |
mbed_official | 235:685d5f11838f | 2136 | |
mbed_official | 235:685d5f11838f | 2137 | /** |
mbed_official | 235:685d5f11838f | 2138 | * @brief DMA SPI half receive process complete callback |
mbed_official | 235:685d5f11838f | 2139 | * @param hdma: pointer to a DMA_HandleTypeDef structure that contains |
mbed_official | 235:685d5f11838f | 2140 | * the configuration information for the specified DMA module. |
mbed_official | 235:685d5f11838f | 2141 | * @retval None |
mbed_official | 235:685d5f11838f | 2142 | */ |
mbed_official | 235:685d5f11838f | 2143 | static void SPI_DMAHalfReceiveCplt(DMA_HandleTypeDef *hdma) |
mbed_official | 235:685d5f11838f | 2144 | { |
mbed_official | 235:685d5f11838f | 2145 | SPI_HandleTypeDef* hspi = ( SPI_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent; |
mbed_official | 235:685d5f11838f | 2146 | |
mbed_official | 235:685d5f11838f | 2147 | HAL_SPI_RxHalfCpltCallback(hspi); |
mbed_official | 235:685d5f11838f | 2148 | } |
mbed_official | 235:685d5f11838f | 2149 | |
mbed_official | 235:685d5f11838f | 2150 | /** |
mbed_official | 235:685d5f11838f | 2151 | * @brief DMA SPI Half transmit receive process complete callback |
mbed_official | 235:685d5f11838f | 2152 | * @param hdma: pointer to a DMA_HandleTypeDef structure that contains |
mbed_official | 235:685d5f11838f | 2153 | * the configuration information for the specified DMA module. |
mbed_official | 235:685d5f11838f | 2154 | * @retval None |
mbed_official | 235:685d5f11838f | 2155 | */ |
mbed_official | 235:685d5f11838f | 2156 | static void SPI_DMAHalfTransmitReceiveCplt(DMA_HandleTypeDef *hdma) |
mbed_official | 235:685d5f11838f | 2157 | { |
mbed_official | 235:685d5f11838f | 2158 | SPI_HandleTypeDef* hspi = ( SPI_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent; |
mbed_official | 235:685d5f11838f | 2159 | |
mbed_official | 235:685d5f11838f | 2160 | HAL_SPI_TxRxHalfCpltCallback(hspi); |
mbed_official | 235:685d5f11838f | 2161 | } |
mbed_official | 235:685d5f11838f | 2162 | |
mbed_official | 235:685d5f11838f | 2163 | /** |
mbed_official | 235:685d5f11838f | 2164 | * @brief DMA SPI communication error callback |
mbed_official | 235:685d5f11838f | 2165 | * @param hdma: pointer to a DMA_HandleTypeDef structure that contains |
mbed_official | 235:685d5f11838f | 2166 | * the configuration information for the specified DMA module. |
mbed_official | 235:685d5f11838f | 2167 | * @retval None |
mbed_official | 235:685d5f11838f | 2168 | */ |
mbed_official | 235:685d5f11838f | 2169 | static void SPI_DMAError(DMA_HandleTypeDef *hdma) |
mbed_official | 235:685d5f11838f | 2170 | { |
mbed_official | 235:685d5f11838f | 2171 | SPI_HandleTypeDef* hspi = (SPI_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent; |
mbed_official | 235:685d5f11838f | 2172 | hspi->TxXferCount = 0; |
mbed_official | 235:685d5f11838f | 2173 | hspi->RxXferCount = 0; |
mbed_official | 235:685d5f11838f | 2174 | hspi->State= HAL_SPI_STATE_READY; |
mbed_official | 235:685d5f11838f | 2175 | hspi->ErrorCode |= HAL_SPI_ERROR_DMA; |
mbed_official | 235:685d5f11838f | 2176 | HAL_SPI_ErrorCallback(hspi); |
mbed_official | 235:685d5f11838f | 2177 | } |
mbed_official | 235:685d5f11838f | 2178 | |
mbed_official | 235:685d5f11838f | 2179 | /** |
mbed_official | 235:685d5f11838f | 2180 | * @brief This function handles SPI Communication Timeout. |
mbed_official | 235:685d5f11838f | 2181 | * @param hspi: pointer to a SPI_HandleTypeDef structure that contains |
mbed_official | 235:685d5f11838f | 2182 | * the configuration information for SPI module. |
mbed_official | 235:685d5f11838f | 2183 | * @retval HAL status |
mbed_official | 235:685d5f11838f | 2184 | */ |
mbed_official | 235:685d5f11838f | 2185 | static HAL_StatusTypeDef SPI_WaitOnFlagUntilTimeout(SPI_HandleTypeDef *hspi, uint32_t Flag, FlagStatus Status, uint32_t Timeout) |
mbed_official | 235:685d5f11838f | 2186 | { |
mbed_official | 235:685d5f11838f | 2187 | uint32_t tickstart = 0; |
mbed_official | 235:685d5f11838f | 2188 | |
mbed_official | 235:685d5f11838f | 2189 | /* Get tick */ |
mbed_official | 235:685d5f11838f | 2190 | tickstart = HAL_GetTick(); |
mbed_official | 235:685d5f11838f | 2191 | |
mbed_official | 235:685d5f11838f | 2192 | /* Wait until flag is set */ |
mbed_official | 235:685d5f11838f | 2193 | if(Status == RESET) |
mbed_official | 235:685d5f11838f | 2194 | { |
mbed_official | 235:685d5f11838f | 2195 | while(__HAL_SPI_GET_FLAG(hspi, Flag) == RESET) |
mbed_official | 235:685d5f11838f | 2196 | { |
mbed_official | 235:685d5f11838f | 2197 | if(Timeout != HAL_MAX_DELAY) |
mbed_official | 235:685d5f11838f | 2198 | { |
mbed_official | 235:685d5f11838f | 2199 | if((Timeout == 0)||((HAL_GetTick() - tickstart ) > Timeout)) |
mbed_official | 235:685d5f11838f | 2200 | { |
mbed_official | 235:685d5f11838f | 2201 | /* Disable the SPI and reset the CRC: the CRC value should be cleared |
mbed_official | 235:685d5f11838f | 2202 | on both master and slave sides in order to resynchronize the master |
mbed_official | 235:685d5f11838f | 2203 | and slave for their respective CRC calculation */ |
mbed_official | 235:685d5f11838f | 2204 | |
mbed_official | 235:685d5f11838f | 2205 | /* Disable TXE, RXNE and ERR interrupts for the interrupt process */ |
mbed_official | 235:685d5f11838f | 2206 | __HAL_SPI_DISABLE_IT(hspi, (SPI_IT_TXE | SPI_IT_RXNE | SPI_IT_ERR)); |
mbed_official | 235:685d5f11838f | 2207 | |
mbed_official | 235:685d5f11838f | 2208 | /* Disable SPI peripheral */ |
mbed_official | 235:685d5f11838f | 2209 | __HAL_SPI_DISABLE(hspi); |
mbed_official | 235:685d5f11838f | 2210 | |
mbed_official | 235:685d5f11838f | 2211 | /* Reset CRC Calculation */ |
mbed_official | 235:685d5f11838f | 2212 | if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLED) |
mbed_official | 235:685d5f11838f | 2213 | { |
mbed_official | 235:685d5f11838f | 2214 | __HAL_SPI_RESET_CRC(hspi); |
mbed_official | 235:685d5f11838f | 2215 | } |
mbed_official | 235:685d5f11838f | 2216 | |
mbed_official | 235:685d5f11838f | 2217 | hspi->State= HAL_SPI_STATE_READY; |
mbed_official | 235:685d5f11838f | 2218 | |
mbed_official | 235:685d5f11838f | 2219 | /* Process Unlocked */ |
mbed_official | 235:685d5f11838f | 2220 | __HAL_UNLOCK(hspi); |
mbed_official | 235:685d5f11838f | 2221 | |
mbed_official | 235:685d5f11838f | 2222 | return HAL_TIMEOUT; |
mbed_official | 235:685d5f11838f | 2223 | } |
mbed_official | 235:685d5f11838f | 2224 | } |
mbed_official | 235:685d5f11838f | 2225 | } |
mbed_official | 235:685d5f11838f | 2226 | } |
mbed_official | 235:685d5f11838f | 2227 | else |
mbed_official | 235:685d5f11838f | 2228 | { |
mbed_official | 235:685d5f11838f | 2229 | while(__HAL_SPI_GET_FLAG(hspi, Flag) != RESET) |
mbed_official | 235:685d5f11838f | 2230 | { |
mbed_official | 235:685d5f11838f | 2231 | if(Timeout != HAL_MAX_DELAY) |
mbed_official | 235:685d5f11838f | 2232 | { |
mbed_official | 235:685d5f11838f | 2233 | if((Timeout == 0)||((HAL_GetTick() - tickstart ) > Timeout)) |
mbed_official | 235:685d5f11838f | 2234 | { |
mbed_official | 235:685d5f11838f | 2235 | /* Disable the SPI and reset the CRC: the CRC value should be cleared |
mbed_official | 235:685d5f11838f | 2236 | on both master and slave sides in order to resynchronize the master |
mbed_official | 235:685d5f11838f | 2237 | and slave for their respective CRC calculation */ |
mbed_official | 235:685d5f11838f | 2238 | |
mbed_official | 235:685d5f11838f | 2239 | /* Disable TXE, RXNE and ERR interrupts for the interrupt process */ |
mbed_official | 235:685d5f11838f | 2240 | __HAL_SPI_DISABLE_IT(hspi, (SPI_IT_TXE | SPI_IT_RXNE | SPI_IT_ERR)); |
mbed_official | 235:685d5f11838f | 2241 | |
mbed_official | 235:685d5f11838f | 2242 | /* Disable SPI peripheral */ |
mbed_official | 235:685d5f11838f | 2243 | __HAL_SPI_DISABLE(hspi); |
mbed_official | 235:685d5f11838f | 2244 | |
mbed_official | 235:685d5f11838f | 2245 | /* Reset CRC Calculation */ |
mbed_official | 235:685d5f11838f | 2246 | if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLED) |
mbed_official | 235:685d5f11838f | 2247 | { |
mbed_official | 235:685d5f11838f | 2248 | __HAL_SPI_RESET_CRC(hspi); |
mbed_official | 235:685d5f11838f | 2249 | } |
mbed_official | 235:685d5f11838f | 2250 | |
mbed_official | 235:685d5f11838f | 2251 | hspi->State= HAL_SPI_STATE_READY; |
mbed_official | 235:685d5f11838f | 2252 | |
mbed_official | 235:685d5f11838f | 2253 | /* Process Unlocked */ |
mbed_official | 235:685d5f11838f | 2254 | __HAL_UNLOCK(hspi); |
mbed_official | 235:685d5f11838f | 2255 | |
mbed_official | 235:685d5f11838f | 2256 | return HAL_TIMEOUT; |
mbed_official | 235:685d5f11838f | 2257 | } |
mbed_official | 235:685d5f11838f | 2258 | } |
mbed_official | 235:685d5f11838f | 2259 | } |
mbed_official | 235:685d5f11838f | 2260 | } |
mbed_official | 235:685d5f11838f | 2261 | return HAL_OK; |
mbed_official | 235:685d5f11838f | 2262 | } |
mbed_official | 235:685d5f11838f | 2263 | |
mbed_official | 235:685d5f11838f | 2264 | |
mbed_official | 235:685d5f11838f | 2265 | /** |
mbed_official | 235:685d5f11838f | 2266 | * @} |
mbed_official | 235:685d5f11838f | 2267 | */ |
mbed_official | 235:685d5f11838f | 2268 | |
mbed_official | 235:685d5f11838f | 2269 | #endif /* HAL_SPI_MODULE_ENABLED */ |
mbed_official | 235:685d5f11838f | 2270 | /** |
mbed_official | 235:685d5f11838f | 2271 | * @} |
mbed_official | 235:685d5f11838f | 2272 | */ |
mbed_official | 235:685d5f11838f | 2273 | |
mbed_official | 235:685d5f11838f | 2274 | /** |
mbed_official | 235:685d5f11838f | 2275 | * @} |
mbed_official | 235:685d5f11838f | 2276 | */ |
mbed_official | 235:685d5f11838f | 2277 | |
mbed_official | 235:685d5f11838f | 2278 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |