shao ziyang
mbed library sources
Dependents: frdm_kl05z_gpio_test
Fork of
mbed-src
by 
mbed official
targets/cmsis/TARGET_STM/TARGET_NUCLEO_F411RE/stm32f4xx_hal_i2s_ex.c@323:9e901b0a5aa1, 2014-09-13 (annotated)
- Committer:
- shaoziyang
- Date:
- Sat Sep 13 14:25:46 2014 +0000
- Revision:
- 323:9e901b0a5aa1
- Parent:
- 235:685d5f11838f
test with CLOCK_SETUP = 0
Who changed what in which revision?
| User | Revision | Line number | New contents of line |
|---|---|---|---|
| mbed_official | 235:685d5f11838f | 1 | /** |
| mbed_official | 235:685d5f11838f | 2 | ****************************************************************************** |
| mbed_official | 235:685d5f11838f | 3 | * @file stm32f4xx_hal_i2s_ex.c |
| mbed_official | 235:685d5f11838f | 4 | * @author MCD Application Team |
| mbed_official | 235:685d5f11838f | 5 | * @version V1.1.0 |
| mbed_official | 235:685d5f11838f | 6 | * @date 19-June-2014 |
| mbed_official | 235:685d5f11838f | 7 | * @brief I2S HAL module driver. |
| mbed_official | 235:685d5f11838f | 8 | * This file provides firmware functions to manage the following |
| mbed_official | 235:685d5f11838f | 9 | * functionalities of I2S extension peripheral: |
| mbed_official | 235:685d5f11838f | 10 | * + Extension features Functions |
| mbed_official | 235:685d5f11838f | 11 | * |
| mbed_official | 235:685d5f11838f | 12 | @verbatim |
| mbed_official | 235:685d5f11838f | 13 | ============================================================================== |
| mbed_official | 235:685d5f11838f | 14 | ##### I2S Extension features ##### |
| mbed_official | 235:685d5f11838f | 15 | ============================================================================== |
| mbed_official | 235:685d5f11838f | 16 | [..] |
| mbed_official | 235:685d5f11838f | 17 | (#) In I2S full duplex mode, each SPI peripheral is able to manage sending and receiving |
| mbed_official | 235:685d5f11838f | 18 | data simultaneously using two data lines. Each SPI peripheral has an extended block |
| mbed_official | 235:685d5f11838f | 19 | called I2Sxext (i.e I2S2ext for SPI2 and I2S3ext for SPI3). |
| mbed_official | 235:685d5f11838f | 20 | (#) The extension block is not a full SPI IP, it is used only as I2S slave to |
| mbed_official | 235:685d5f11838f | 21 | implement full duplex mode. The extension block uses the same clock sources |
| mbed_official | 235:685d5f11838f | 22 | as its master. |
| mbed_official | 235:685d5f11838f | 23 | |
| mbed_official | 235:685d5f11838f | 24 | (#) Both I2Sx and I2Sx_ext can be configured as transmitters or receivers. |
| mbed_official | 235:685d5f11838f | 25 | |
| mbed_official | 235:685d5f11838f | 26 | [..] |
| mbed_official | 235:685d5f11838f | 27 | (@) Only I2Sx can deliver SCK and WS to I2Sx_ext in full duplex mode, where |
| mbed_official | 235:685d5f11838f | 28 | I2Sx can be I2S2 or I2S3. |
| mbed_official | 235:685d5f11838f | 29 | |
| mbed_official | 235:685d5f11838f | 30 | ##### How to use this driver ##### |
| mbed_official | 235:685d5f11838f | 31 | =============================================================================== |
| mbed_official | 235:685d5f11838f | 32 | [..] |
| mbed_official | 235:685d5f11838f | 33 | Three operation modes are available within this driver : |
| mbed_official | 235:685d5f11838f | 34 | |
| mbed_official | 235:685d5f11838f | 35 | *** Polling mode IO operation *** |
| mbed_official | 235:685d5f11838f | 36 | ================================= |
| mbed_official | 235:685d5f11838f | 37 | [..] |
| mbed_official | 235:685d5f11838f | 38 | (+) Send and receive in the same time an amount of data in blocking mode using HAL_I2S_TransmitReceive() |
| mbed_official | 235:685d5f11838f | 39 | |
| mbed_official | 235:685d5f11838f | 40 | *** Interrupt mode IO operation *** |
| mbed_official | 235:685d5f11838f | 41 | =================================== |
| mbed_official | 235:685d5f11838f | 42 | [..] |
| mbed_official | 235:685d5f11838f | 43 | (+) Send and receive in the same time an amount of data in non blocking mode using HAL_I2S_TransmitReceive_IT() |
| mbed_official | 235:685d5f11838f | 44 | (+) At transmission end of half transfer HAL_I2S_TxHalfCpltCallback is executed and user can |
| mbed_official | 235:685d5f11838f | 45 | add his own code by customization of function pointer HAL_I2S_TxHalfCpltCallback |
| mbed_official | 235:685d5f11838f | 46 | (+) At transmission end of transfer HAL_I2S_TxCpltCallback is executed and user can |
| mbed_official | 235:685d5f11838f | 47 | add his own code by customization of function pointer HAL_I2S_TxCpltCallback |
| mbed_official | 235:685d5f11838f | 48 | (+) At reception end of half transfer HAL_I2S_RxHalfCpltCallback is executed and user can |
| mbed_official | 235:685d5f11838f | 49 | add his own code by customization of function pointer HAL_I2S_RxHalfCpltCallback |
| mbed_official | 235:685d5f11838f | 50 | (+) At reception end of transfer HAL_I2S_RxCpltCallback is executed and user can |
| mbed_official | 235:685d5f11838f | 51 | add his own code by customization of function pointer HAL_I2S_RxCpltCallback |
| mbed_official | 235:685d5f11838f | 52 | (+) In case of transfer Error, HAL_I2S_ErrorCallback() function is executed and user can |
| mbed_official | 235:685d5f11838f | 53 | add his own code by customization of function pointer HAL_I2S_ErrorCallback |
| mbed_official | 235:685d5f11838f | 54 | |
| mbed_official | 235:685d5f11838f | 55 | *** DMA mode IO operation *** |
| mbed_official | 235:685d5f11838f | 56 | ============================== |
| mbed_official | 235:685d5f11838f | 57 | [..] |
| mbed_official | 235:685d5f11838f | 58 | (+) Send and receive an amount of data in non blocking mode (DMA) using HAL_I2S_TransmitReceive_DMA() |
| mbed_official | 235:685d5f11838f | 59 | (+) At transmission end of half transfer HAL_I2S_TxHalfCpltCallback is executed and user can |
| mbed_official | 235:685d5f11838f | 60 | add his own code by customization of function pointer HAL_I2S_TxHalfCpltCallback |
| mbed_official | 235:685d5f11838f | 61 | (+) At transmission end of transfer HAL_I2S_TxCpltCallback is executed and user can |
| mbed_official | 235:685d5f11838f | 62 | add his own code by customization of function pointer HAL_I2S_TxCpltCallback |
| mbed_official | 235:685d5f11838f | 63 | (+) At reception end of half transfer HAL_I2S_RxHalfCpltCallback is executed and user can |
| mbed_official | 235:685d5f11838f | 64 | add his own code by customization of function pointer HAL_I2S_RxHalfCpltCallback |
| mbed_official | 235:685d5f11838f | 65 | (+) At reception end of transfer HAL_I2S_RxCpltCallback is executed and user can |
| mbed_official | 235:685d5f11838f | 66 | add his own code by customization of function pointer HAL_I2S_RxCpltCallback |
| mbed_official | 235:685d5f11838f | 67 | (+) In case of transfer Error, HAL_I2S_ErrorCallback() function is executed and user can |
| mbed_official | 235:685d5f11838f | 68 | add his own code by customization of function pointer HAL_I2S_ErrorCallback |
| mbed_official | 235:685d5f11838f | 69 | (+) Pause the DMA Transfer using HAL_I2S_DMAPause() |
| mbed_official | 235:685d5f11838f | 70 | (+) Resume the DMA Transfer using HAL_I2S_DMAResume() |
| mbed_official | 235:685d5f11838f | 71 | (+) Stop the DMA Transfer using HAL_I2S_DMAStop() |
| mbed_official | 235:685d5f11838f | 72 | |
| mbed_official | 235:685d5f11838f | 73 | @endverbatim |
| mbed_official | 235:685d5f11838f | 74 | ****************************************************************************** |
| mbed_official | 235:685d5f11838f | 75 | * @attention |
| mbed_official | 235:685d5f11838f | 76 | * |
| mbed_official | 235:685d5f11838f | 77 | * <h2><center>© COPYRIGHT(c) 2014 STMicroelectronics</center></h2> |
| mbed_official | 235:685d5f11838f | 78 | * |
| mbed_official | 235:685d5f11838f | 79 | * Redistribution and use in source and binary forms, with or without modification, |
| mbed_official | 235:685d5f11838f | 80 | * are permitted provided that the following conditions are met: |
| mbed_official | 235:685d5f11838f | 81 | * 1. Redistributions of source code must retain the above copyright notice, |
| mbed_official | 235:685d5f11838f | 82 | * this list of conditions and the following disclaimer. |
| mbed_official | 235:685d5f11838f | 83 | * 2. Redistributions in binary form must reproduce the above copyright notice, |
| mbed_official | 235:685d5f11838f | 84 | * this list of conditions and the following disclaimer in the documentation |
| mbed_official | 235:685d5f11838f | 85 | * and/or other materials provided with the distribution. |
| mbed_official | 235:685d5f11838f | 86 | * 3. Neither the name of STMicroelectronics nor the names of its contributors |
| mbed_official | 235:685d5f11838f | 87 | * may be used to endorse or promote products derived from this software |
| mbed_official | 235:685d5f11838f | 88 | * without specific prior written permission. |
| mbed_official | 235:685d5f11838f | 89 | * |
| mbed_official | 235:685d5f11838f | 90 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
| mbed_official | 235:685d5f11838f | 91 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
| mbed_official | 235:685d5f11838f | 92 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
| mbed_official | 235:685d5f11838f | 93 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE |
| mbed_official | 235:685d5f11838f | 94 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
| mbed_official | 235:685d5f11838f | 95 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR |
| mbed_official | 235:685d5f11838f | 96 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
| mbed_official | 235:685d5f11838f | 97 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, |
| mbed_official | 235:685d5f11838f | 98 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
| mbed_official | 235:685d5f11838f | 99 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
| mbed_official | 235:685d5f11838f | 100 | * |
| mbed_official | 235:685d5f11838f | 101 | ****************************************************************************** |
| mbed_official | 235:685d5f11838f | 102 | */ |
| mbed_official | 235:685d5f11838f | 103 | |
| mbed_official | 235:685d5f11838f | 104 | /* Includes ------------------------------------------------------------------*/ |
| mbed_official | 235:685d5f11838f | 105 | #include "stm32f4xx_hal.h" |
| mbed_official | 235:685d5f11838f | 106 | |
| mbed_official | 235:685d5f11838f | 107 | /** @addtogroup STM32F4xx_HAL_Driver |
| mbed_official | 235:685d5f11838f | 108 | * @{ |
| mbed_official | 235:685d5f11838f | 109 | */ |
| mbed_official | 235:685d5f11838f | 110 | |
| mbed_official | 235:685d5f11838f | 111 | /** @defgroup I2SEx |
| mbed_official | 235:685d5f11838f | 112 | * @brief I2S HAL module driver |
| mbed_official | 235:685d5f11838f | 113 | * @{ |
| mbed_official | 235:685d5f11838f | 114 | */ |
| mbed_official | 235:685d5f11838f | 115 | |
| mbed_official | 235:685d5f11838f | 116 | #ifdef HAL_I2S_MODULE_ENABLED |
| mbed_official | 235:685d5f11838f | 117 | |
| mbed_official | 235:685d5f11838f | 118 | /* Private typedef -----------------------------------------------------------*/ |
| mbed_official | 235:685d5f11838f | 119 | /* Private define ------------------------------------------------------------*/ |
| mbed_official | 235:685d5f11838f | 120 | /* Private macro -------------------------------------------------------------*/ |
| mbed_official | 235:685d5f11838f | 121 | /* Private variables ---------------------------------------------------------*/ |
| mbed_official | 235:685d5f11838f | 122 | /* Private function prototypes -----------------------------------------------*/ |
| mbed_official | 235:685d5f11838f | 123 | /* Private functions ---------------------------------------------------------*/ |
| mbed_official | 235:685d5f11838f | 124 | |
| mbed_official | 235:685d5f11838f | 125 | /** @defgroup I2SEx_Private_Functions |
| mbed_official | 235:685d5f11838f | 126 | * @{ |
| mbed_official | 235:685d5f11838f | 127 | */ |
| mbed_official | 235:685d5f11838f | 128 | |
| mbed_official | 235:685d5f11838f | 129 | /** @defgroup I2SEx_Group1 Extension features functions |
| mbed_official | 235:685d5f11838f | 130 | * @brief Extension features functions |
| mbed_official | 235:685d5f11838f | 131 | * |
| mbed_official | 235:685d5f11838f | 132 | @verbatim |
| mbed_official | 235:685d5f11838f | 133 | =============================================================================== |
| mbed_official | 235:685d5f11838f | 134 | ##### Extension features Functions ##### |
| mbed_official | 235:685d5f11838f | 135 | =============================================================================== |
| mbed_official | 235:685d5f11838f | 136 | [..] |
| mbed_official | 235:685d5f11838f | 137 | This subsection provides a set of functions allowing to manage the I2S data |
| mbed_official | 235:685d5f11838f | 138 | transfers. |
| mbed_official | 235:685d5f11838f | 139 | |
| mbed_official | 235:685d5f11838f | 140 | (#) There are two modes of transfer: |
| mbed_official | 235:685d5f11838f | 141 | (++) Blocking mode : The communication is performed in the polling mode. |
| mbed_official | 235:685d5f11838f | 142 | The status of all data processing is returned by the same function |
| mbed_official | 235:685d5f11838f | 143 | after finishing transfer. |
| mbed_official | 235:685d5f11838f | 144 | (++) No-Blocking mode : The communication is performed using Interrupts |
| mbed_official | 235:685d5f11838f | 145 | or DMA. These functions return the status of the transfer startup. |
| mbed_official | 235:685d5f11838f | 146 | The end of the data processing will be indicated through the |
| mbed_official | 235:685d5f11838f | 147 | dedicated I2S IRQ when using Interrupt mode or the DMA IRQ when |
| mbed_official | 235:685d5f11838f | 148 | using DMA mode. |
| mbed_official | 235:685d5f11838f | 149 | |
| mbed_official | 235:685d5f11838f | 150 | (#) Blocking mode functions are : |
| mbed_official | 235:685d5f11838f | 151 | (++) HAL_I2S_TransmitReceive() |
| mbed_official | 235:685d5f11838f | 152 | |
| mbed_official | 235:685d5f11838f | 153 | (#) No-Blocking mode functions with Interrupt are : |
| mbed_official | 235:685d5f11838f | 154 | (++) HAL_I2S_TransmitReceive_IT() |
| mbed_official | 235:685d5f11838f | 155 | |
| mbed_official | 235:685d5f11838f | 156 | (#) No-Blocking mode functions with DMA are : |
| mbed_official | 235:685d5f11838f | 157 | (++) HAL_I2S_TransmitReceive_DMA() |
| mbed_official | 235:685d5f11838f | 158 | |
| mbed_official | 235:685d5f11838f | 159 | (#) A set of Transfer Complete Callbacks are provided in non Blocking mode: |
| mbed_official | 235:685d5f11838f | 160 | (++) HAL_I2S_TxCpltCallback() |
| mbed_official | 235:685d5f11838f | 161 | (++) HAL_I2S_RxCpltCallback() |
| mbed_official | 235:685d5f11838f | 162 | (++) HAL_I2S_ErrorCallback() |
| mbed_official | 235:685d5f11838f | 163 | |
| mbed_official | 235:685d5f11838f | 164 | @endverbatim |
| mbed_official | 235:685d5f11838f | 165 | * @{ |
| mbed_official | 235:685d5f11838f | 166 | */ |
| mbed_official | 235:685d5f11838f | 167 | |
| mbed_official | 235:685d5f11838f | 168 | /** |
| mbed_official | 235:685d5f11838f | 169 | * @brief Full-Duplex Transmit/Receive data in blocking mode. |
| mbed_official | 235:685d5f11838f | 170 | * @param hi2s: pointer to a I2S_HandleTypeDef structure that contains |
| mbed_official | 235:685d5f11838f | 171 | * the configuration information for I2S module |
| mbed_official | 235:685d5f11838f | 172 | * @param pTxData: a 16-bit pointer to the Transmit data buffer. |
| mbed_official | 235:685d5f11838f | 173 | * @param pRxData: a 16-bit pointer to the Receive data buffer. |
| mbed_official | 235:685d5f11838f | 174 | * @param Size: number of data sample to be sent: |
| mbed_official | 235:685d5f11838f | 175 | * @note When a 16-bit data frame or a 16-bit data frame extended is selected during the I2S |
| mbed_official | 235:685d5f11838f | 176 | * configuration phase, the Size parameter means the number of 16-bit data length |
| mbed_official | 235:685d5f11838f | 177 | * in the transaction and when a 24-bit data frame or a 32-bit data frame is selected |
| mbed_official | 235:685d5f11838f | 178 | * the Size parameter means the number of 16-bit data length. |
| mbed_official | 235:685d5f11838f | 179 | * @param Timeout: Timeout duration |
| mbed_official | 235:685d5f11838f | 180 | * @note The I2S is kept enabled at the end of transaction to avoid the clock de-synchronization |
| mbed_official | 235:685d5f11838f | 181 | * between Master and Slave(example: audio streaming). |
| mbed_official | 235:685d5f11838f | 182 | * @retval HAL status |
| mbed_official | 235:685d5f11838f | 183 | */ |
| mbed_official | 235:685d5f11838f | 184 | HAL_StatusTypeDef HAL_I2SEx_TransmitReceive(I2S_HandleTypeDef *hi2s, uint16_t *pTxData, uint16_t *pRxData, uint16_t Size, uint32_t Timeout) |
| mbed_official | 235:685d5f11838f | 185 | { |
| mbed_official | 235:685d5f11838f | 186 | uint32_t tickstart = 0; |
| mbed_official | 235:685d5f11838f | 187 | uint32_t tmp1 = 0, tmp2 = 0; |
| mbed_official | 235:685d5f11838f | 188 | |
| mbed_official | 235:685d5f11838f | 189 | if((pTxData == NULL ) || (pRxData == NULL ) || (Size == 0)) |
| mbed_official | 235:685d5f11838f | 190 | { |
| mbed_official | 235:685d5f11838f | 191 | return HAL_ERROR; |
| mbed_official | 235:685d5f11838f | 192 | } |
| mbed_official | 235:685d5f11838f | 193 | |
| mbed_official | 235:685d5f11838f | 194 | /* Check the I2S State */ |
| mbed_official | 235:685d5f11838f | 195 | if(hi2s->State == HAL_I2S_STATE_READY) |
| mbed_official | 235:685d5f11838f | 196 | { |
| mbed_official | 235:685d5f11838f | 197 | tmp1 = hi2s->Instance->I2SCFGR & (SPI_I2SCFGR_DATLEN | SPI_I2SCFGR_CHLEN); |
| mbed_official | 235:685d5f11838f | 198 | tmp2 = hi2s->Instance->I2SCFGR & (SPI_I2SCFGR_DATLEN | SPI_I2SCFGR_CHLEN); |
| mbed_official | 235:685d5f11838f | 199 | /* Check the Data format: When a 16-bit data frame or a 16-bit data frame extended |
| mbed_official | 235:685d5f11838f | 200 | is selected during the I2S configuration phase, the Size parameter means the number |
| mbed_official | 235:685d5f11838f | 201 | of 16-bit data length in the transaction and when a 24-bit data frame or a 32-bit data |
| mbed_official | 235:685d5f11838f | 202 | frame is selected the Size parameter means the number of 16-bit data length. */ |
| mbed_official | 235:685d5f11838f | 203 | if((tmp1 == I2S_DATAFORMAT_24B)|| \ |
| mbed_official | 235:685d5f11838f | 204 | (tmp2 == I2S_DATAFORMAT_32B)) |
| mbed_official | 235:685d5f11838f | 205 | { |
| mbed_official | 235:685d5f11838f | 206 | hi2s->TxXferSize = Size*2; |
| mbed_official | 235:685d5f11838f | 207 | hi2s->TxXferCount = Size*2; |
| mbed_official | 235:685d5f11838f | 208 | hi2s->RxXferSize = Size*2; |
| mbed_official | 235:685d5f11838f | 209 | hi2s->RxXferCount = Size*2; |
| mbed_official | 235:685d5f11838f | 210 | } |
| mbed_official | 235:685d5f11838f | 211 | else |
| mbed_official | 235:685d5f11838f | 212 | { |
| mbed_official | 235:685d5f11838f | 213 | hi2s->TxXferSize = Size; |
| mbed_official | 235:685d5f11838f | 214 | hi2s->TxXferCount = Size; |
| mbed_official | 235:685d5f11838f | 215 | hi2s->RxXferSize = Size; |
| mbed_official | 235:685d5f11838f | 216 | hi2s->RxXferCount = Size; |
| mbed_official | 235:685d5f11838f | 217 | } |
| mbed_official | 235:685d5f11838f | 218 | |
| mbed_official | 235:685d5f11838f | 219 | /* Process Locked */ |
| mbed_official | 235:685d5f11838f | 220 | __HAL_LOCK(hi2s); |
| mbed_official | 235:685d5f11838f | 221 | |
| mbed_official | 235:685d5f11838f | 222 | /* Set the I2S State busy TX/RX */ |
| mbed_official | 235:685d5f11838f | 223 | hi2s->State = HAL_I2S_STATE_BUSY_TX_RX; |
| mbed_official | 235:685d5f11838f | 224 | |
| mbed_official | 235:685d5f11838f | 225 | tmp1 = hi2s->Instance->I2SCFGR & SPI_I2SCFGR_I2SCFG; |
| mbed_official | 235:685d5f11838f | 226 | tmp2 = hi2s->Instance->I2SCFGR & SPI_I2SCFGR_I2SCFG; |
| mbed_official | 235:685d5f11838f | 227 | /* Check if the I2S_MODE_MASTER_TX or I2S_MODE_SLAVE_TX Mode is selected */ |
| mbed_official | 235:685d5f11838f | 228 | if((tmp1 == I2S_MODE_MASTER_TX) || (tmp2 == I2S_MODE_SLAVE_TX)) |
| mbed_official | 235:685d5f11838f | 229 | { |
| mbed_official | 235:685d5f11838f | 230 | /* Check if the I2S is already enabled: The I2S is kept enabled at the end of transaction |
| mbed_official | 235:685d5f11838f | 231 | to avoid the clock de-synchronization between Master and Slave. */ |
| mbed_official | 235:685d5f11838f | 232 | if((hi2s->Instance->I2SCFGR &SPI_I2SCFGR_I2SE) != SPI_I2SCFGR_I2SE) |
| mbed_official | 235:685d5f11838f | 233 | { |
| mbed_official | 235:685d5f11838f | 234 | /* Enable I2Sext(receiver) before enabling I2Sx peripheral */ |
| mbed_official | 235:685d5f11838f | 235 | I2SxEXT(hi2s->Instance)->I2SCFGR |= SPI_I2SCFGR_I2SE; |
| mbed_official | 235:685d5f11838f | 236 | |
| mbed_official | 235:685d5f11838f | 237 | /* Enable I2Sx peripheral */ |
| mbed_official | 235:685d5f11838f | 238 | __HAL_I2S_ENABLE(hi2s); |
| mbed_official | 235:685d5f11838f | 239 | } |
| mbed_official | 235:685d5f11838f | 240 | |
| mbed_official | 235:685d5f11838f | 241 | while(hi2s->TxXferCount > 0) |
| mbed_official | 235:685d5f11838f | 242 | { |
| mbed_official | 235:685d5f11838f | 243 | /* Wait until TXE flag is set */ |
| mbed_official | 235:685d5f11838f | 244 | if (I2S_WaitFlagStateUntilTimeout(hi2s, I2S_FLAG_TXE, RESET, Timeout) != HAL_OK) |
| mbed_official | 235:685d5f11838f | 245 | { |
| mbed_official | 235:685d5f11838f | 246 | return HAL_TIMEOUT; |
| mbed_official | 235:685d5f11838f | 247 | } |
| mbed_official | 235:685d5f11838f | 248 | hi2s->Instance->DR = (*pTxData++); |
| mbed_official | 235:685d5f11838f | 249 | |
| mbed_official | 235:685d5f11838f | 250 | /* Get tick */ |
| mbed_official | 235:685d5f11838f | 251 | tickstart = HAL_GetTick(); |
| mbed_official | 235:685d5f11838f | 252 | |
| mbed_official | 235:685d5f11838f | 253 | /* Wait until RXNE flag is set */ |
| mbed_official | 235:685d5f11838f | 254 | while((I2SxEXT(hi2s->Instance)->SR & SPI_SR_RXNE) != SPI_SR_RXNE) |
| mbed_official | 235:685d5f11838f | 255 | { |
| mbed_official | 235:685d5f11838f | 256 | if(Timeout != HAL_MAX_DELAY) |
| mbed_official | 235:685d5f11838f | 257 | { |
| mbed_official | 235:685d5f11838f | 258 | if((Timeout == 0)||((HAL_GetTick() - tickstart ) > Timeout)) |
| mbed_official | 235:685d5f11838f | 259 | { |
| mbed_official | 235:685d5f11838f | 260 | /* Process Unlocked */ |
| mbed_official | 235:685d5f11838f | 261 | __HAL_UNLOCK(hi2s); |
| mbed_official | 235:685d5f11838f | 262 | |
| mbed_official | 235:685d5f11838f | 263 | return HAL_TIMEOUT; |
| mbed_official | 235:685d5f11838f | 264 | } |
| mbed_official | 235:685d5f11838f | 265 | } |
| mbed_official | 235:685d5f11838f | 266 | } |
| mbed_official | 235:685d5f11838f | 267 | (*pRxData++) = I2SxEXT(hi2s->Instance)->DR; |
| mbed_official | 235:685d5f11838f | 268 | |
| mbed_official | 235:685d5f11838f | 269 | hi2s->TxXferCount--; |
| mbed_official | 235:685d5f11838f | 270 | hi2s->RxXferCount--; |
| mbed_official | 235:685d5f11838f | 271 | } |
| mbed_official | 235:685d5f11838f | 272 | } |
| mbed_official | 235:685d5f11838f | 273 | /* The I2S_MODE_MASTER_RX or I2S_MODE_SLAVE_RX Mode is selected */ |
| mbed_official | 235:685d5f11838f | 274 | else |
| mbed_official | 235:685d5f11838f | 275 | { |
| mbed_official | 235:685d5f11838f | 276 | /* Check if the I2S is already enabled */ |
| mbed_official | 235:685d5f11838f | 277 | if((hi2s->Instance->I2SCFGR &SPI_I2SCFGR_I2SE) != SPI_I2SCFGR_I2SE) |
| mbed_official | 235:685d5f11838f | 278 | { |
| mbed_official | 235:685d5f11838f | 279 | /* Enable I2S peripheral before the I2Sext*/ |
| mbed_official | 235:685d5f11838f | 280 | __HAL_I2S_ENABLE(hi2s); |
| mbed_official | 235:685d5f11838f | 281 | |
| mbed_official | 235:685d5f11838f | 282 | /* Enable I2Sext(transmitter) after enabling I2Sx peripheral */ |
| mbed_official | 235:685d5f11838f | 283 | I2SxEXT(hi2s->Instance)->I2SCFGR |= SPI_I2SCFGR_I2SE; |
| mbed_official | 235:685d5f11838f | 284 | } |
| mbed_official | 235:685d5f11838f | 285 | else |
| mbed_official | 235:685d5f11838f | 286 | { |
| mbed_official | 235:685d5f11838f | 287 | /* Check if Master Receiver mode is selected */ |
| mbed_official | 235:685d5f11838f | 288 | if((hi2s->Instance->I2SCFGR & SPI_I2SCFGR_I2SCFG) == I2S_MODE_MASTER_RX) |
| mbed_official | 235:685d5f11838f | 289 | { |
| mbed_official | 235:685d5f11838f | 290 | /* Clear the Overrun Flag by a read operation on the SPI_DR register followed by a read |
| mbed_official | 235:685d5f11838f | 291 | access to the SPI_SR register. */ |
| mbed_official | 235:685d5f11838f | 292 | __HAL_I2S_CLEAR_OVRFLAG(hi2s); |
| mbed_official | 235:685d5f11838f | 293 | } |
| mbed_official | 235:685d5f11838f | 294 | } |
| mbed_official | 235:685d5f11838f | 295 | while(hi2s->TxXferCount > 0) |
| mbed_official | 235:685d5f11838f | 296 | { |
| mbed_official | 235:685d5f11838f | 297 | /* Get tick */ |
| mbed_official | 235:685d5f11838f | 298 | tickstart = HAL_GetTick(); |
| mbed_official | 235:685d5f11838f | 299 | |
| mbed_official | 235:685d5f11838f | 300 | /* Wait until TXE flag is set */ |
| mbed_official | 235:685d5f11838f | 301 | while((I2SxEXT(hi2s->Instance)->SR & SPI_SR_TXE) != SPI_SR_TXE) |
| mbed_official | 235:685d5f11838f | 302 | { |
| mbed_official | 235:685d5f11838f | 303 | if(Timeout != HAL_MAX_DELAY) |
| mbed_official | 235:685d5f11838f | 304 | { |
| mbed_official | 235:685d5f11838f | 305 | if((Timeout == 0)||((HAL_GetTick() - tickstart ) > Timeout)) |
| mbed_official | 235:685d5f11838f | 306 | { |
| mbed_official | 235:685d5f11838f | 307 | /* Process Unlocked */ |
| mbed_official | 235:685d5f11838f | 308 | __HAL_UNLOCK(hi2s); |
| mbed_official | 235:685d5f11838f | 309 | |
| mbed_official | 235:685d5f11838f | 310 | return HAL_TIMEOUT; |
| mbed_official | 235:685d5f11838f | 311 | } |
| mbed_official | 235:685d5f11838f | 312 | } |
| mbed_official | 235:685d5f11838f | 313 | } |
| mbed_official | 235:685d5f11838f | 314 | I2SxEXT(hi2s->Instance)->DR = (*pTxData++); |
| mbed_official | 235:685d5f11838f | 315 | |
| mbed_official | 235:685d5f11838f | 316 | /* Wait until RXNE flag is set */ |
| mbed_official | 235:685d5f11838f | 317 | if (I2S_WaitFlagStateUntilTimeout(hi2s, I2S_FLAG_RXNE, RESET, Timeout) != HAL_OK) |
| mbed_official | 235:685d5f11838f | 318 | { |
| mbed_official | 235:685d5f11838f | 319 | return HAL_TIMEOUT; |
| mbed_official | 235:685d5f11838f | 320 | } |
| mbed_official | 235:685d5f11838f | 321 | (*pRxData++) = hi2s->Instance->DR; |
| mbed_official | 235:685d5f11838f | 322 | |
| mbed_official | 235:685d5f11838f | 323 | hi2s->TxXferCount--; |
| mbed_official | 235:685d5f11838f | 324 | hi2s->RxXferCount--; |
| mbed_official | 235:685d5f11838f | 325 | } |
| mbed_official | 235:685d5f11838f | 326 | } |
| mbed_official | 235:685d5f11838f | 327 | |
| mbed_official | 235:685d5f11838f | 328 | /* Set the I2S State ready */ |
| mbed_official | 235:685d5f11838f | 329 | hi2s->State = HAL_I2S_STATE_READY; |
| mbed_official | 235:685d5f11838f | 330 | |
| mbed_official | 235:685d5f11838f | 331 | /* Process Unlocked */ |
| mbed_official | 235:685d5f11838f | 332 | __HAL_UNLOCK(hi2s); |
| mbed_official | 235:685d5f11838f | 333 | |
| mbed_official | 235:685d5f11838f | 334 | return HAL_OK; |
| mbed_official | 235:685d5f11838f | 335 | } |
| mbed_official | 235:685d5f11838f | 336 | else |
| mbed_official | 235:685d5f11838f | 337 | { |
| mbed_official | 235:685d5f11838f | 338 | return HAL_BUSY; |
| mbed_official | 235:685d5f11838f | 339 | } |
| mbed_official | 235:685d5f11838f | 340 | } |
| mbed_official | 235:685d5f11838f | 341 | |
| mbed_official | 235:685d5f11838f | 342 | /** |
| mbed_official | 235:685d5f11838f | 343 | * @brief Full-Duplex Transmit/Receive data in non-blocking mode using Interrupt |
| mbed_official | 235:685d5f11838f | 344 | * @param hi2s: pointer to a I2S_HandleTypeDef structure that contains |
| mbed_official | 235:685d5f11838f | 345 | * the configuration information for I2S module |
| mbed_official | 235:685d5f11838f | 346 | * @param pTxData: a 16-bit pointer to the Transmit data buffer. |
| mbed_official | 235:685d5f11838f | 347 | * @param pRxData: a 16-bit pointer to the Receive data buffer. |
| mbed_official | 235:685d5f11838f | 348 | * @param Size: number of data sample to be sent: |
| mbed_official | 235:685d5f11838f | 349 | * @note When a 16-bit data frame or a 16-bit data frame extended is selected during the I2S |
| mbed_official | 235:685d5f11838f | 350 | * configuration phase, the Size parameter means the number of 16-bit data length |
| mbed_official | 235:685d5f11838f | 351 | * in the transaction and when a 24-bit data frame or a 32-bit data frame is selected |
| mbed_official | 235:685d5f11838f | 352 | * the Size parameter means the number of 16-bit data length. |
| mbed_official | 235:685d5f11838f | 353 | * @note The I2S is kept enabled at the end of transaction to avoid the clock de-synchronization |
| mbed_official | 235:685d5f11838f | 354 | * between Master and Slave(example: audio streaming). |
| mbed_official | 235:685d5f11838f | 355 | * @retval HAL status |
| mbed_official | 235:685d5f11838f | 356 | */ |
| mbed_official | 235:685d5f11838f | 357 | HAL_StatusTypeDef HAL_I2SEx_TransmitReceive_IT(I2S_HandleTypeDef *hi2s, uint16_t *pTxData, uint16_t *pRxData, uint16_t Size) |
| mbed_official | 235:685d5f11838f | 358 | { |
| mbed_official | 235:685d5f11838f | 359 | uint32_t tmp1 = 0, tmp2 = 0; |
| mbed_official | 235:685d5f11838f | 360 | |
| mbed_official | 235:685d5f11838f | 361 | if(hi2s->State == HAL_I2S_STATE_READY) |
| mbed_official | 235:685d5f11838f | 362 | { |
| mbed_official | 235:685d5f11838f | 363 | if((pTxData == NULL ) || (pRxData == NULL ) || (Size == 0)) |
| mbed_official | 235:685d5f11838f | 364 | { |
| mbed_official | 235:685d5f11838f | 365 | return HAL_ERROR; |
| mbed_official | 235:685d5f11838f | 366 | } |
| mbed_official | 235:685d5f11838f | 367 | |
| mbed_official | 235:685d5f11838f | 368 | hi2s->pTxBuffPtr = pTxData; |
| mbed_official | 235:685d5f11838f | 369 | hi2s->pRxBuffPtr = pRxData; |
| mbed_official | 235:685d5f11838f | 370 | |
| mbed_official | 235:685d5f11838f | 371 | tmp1 = hi2s->Instance->I2SCFGR & (SPI_I2SCFGR_DATLEN | SPI_I2SCFGR_CHLEN); |
| mbed_official | 235:685d5f11838f | 372 | tmp2 = hi2s->Instance->I2SCFGR & (SPI_I2SCFGR_DATLEN | SPI_I2SCFGR_CHLEN); |
| mbed_official | 235:685d5f11838f | 373 | /* Check the Data format: When a 16-bit data frame or a 16-bit data frame extended |
| mbed_official | 235:685d5f11838f | 374 | is selected during the I2S configuration phase, the Size parameter means the number |
| mbed_official | 235:685d5f11838f | 375 | of 16-bit data length in the transaction and when a 24-bit data frame or a 32-bit data |
| mbed_official | 235:685d5f11838f | 376 | frame is selected the Size parameter means the number of 16-bit data length. */ |
| mbed_official | 235:685d5f11838f | 377 | if((tmp1 == I2S_DATAFORMAT_24B)||\ |
| mbed_official | 235:685d5f11838f | 378 | (tmp2 == I2S_DATAFORMAT_32B)) |
| mbed_official | 235:685d5f11838f | 379 | { |
| mbed_official | 235:685d5f11838f | 380 | hi2s->TxXferSize = Size*2; |
| mbed_official | 235:685d5f11838f | 381 | hi2s->TxXferCount = Size*2; |
| mbed_official | 235:685d5f11838f | 382 | hi2s->RxXferSize = Size*2; |
| mbed_official | 235:685d5f11838f | 383 | hi2s->RxXferCount = Size*2; |
| mbed_official | 235:685d5f11838f | 384 | } |
| mbed_official | 235:685d5f11838f | 385 | else |
| mbed_official | 235:685d5f11838f | 386 | { |
| mbed_official | 235:685d5f11838f | 387 | hi2s->TxXferSize = Size; |
| mbed_official | 235:685d5f11838f | 388 | hi2s->TxXferCount = Size; |
| mbed_official | 235:685d5f11838f | 389 | hi2s->RxXferSize = Size; |
| mbed_official | 235:685d5f11838f | 390 | hi2s->RxXferCount = Size; |
| mbed_official | 235:685d5f11838f | 391 | } |
| mbed_official | 235:685d5f11838f | 392 | |
| mbed_official | 235:685d5f11838f | 393 | /* Process Locked */ |
| mbed_official | 235:685d5f11838f | 394 | __HAL_LOCK(hi2s); |
| mbed_official | 235:685d5f11838f | 395 | |
| mbed_official | 235:685d5f11838f | 396 | hi2s->State = HAL_I2S_STATE_BUSY_TX_RX; |
| mbed_official | 235:685d5f11838f | 397 | hi2s->ErrorCode = HAL_I2S_ERROR_NONE; |
| mbed_official | 235:685d5f11838f | 398 | |
| mbed_official | 235:685d5f11838f | 399 | tmp1 = hi2s->Instance->I2SCFGR & SPI_I2SCFGR_I2SCFG; |
| mbed_official | 235:685d5f11838f | 400 | tmp2 = hi2s->Instance->I2SCFGR & SPI_I2SCFGR_I2SCFG; |
| mbed_official | 235:685d5f11838f | 401 | /* Check if the I2S_MODE_MASTER_TX or I2S_MODE_SLAVE_TX Mode is selected */ |
| mbed_official | 235:685d5f11838f | 402 | if((tmp1 == I2S_MODE_MASTER_TX) || (tmp2 == I2S_MODE_SLAVE_TX)) |
| mbed_official | 235:685d5f11838f | 403 | { |
| mbed_official | 235:685d5f11838f | 404 | /* Enable I2Sext RXNE and ERR interrupts */ |
| mbed_official | 235:685d5f11838f | 405 | I2SxEXT(hi2s->Instance)->CR2 |= (I2S_IT_RXNE | I2S_IT_ERR); |
| mbed_official | 235:685d5f11838f | 406 | |
| mbed_official | 235:685d5f11838f | 407 | /* Enable I2Sx TXE and ERR interrupts */ |
| mbed_official | 235:685d5f11838f | 408 | __HAL_I2S_ENABLE_IT(hi2s, (I2S_IT_TXE | I2S_IT_ERR)); |
| mbed_official | 235:685d5f11838f | 409 | |
| mbed_official | 235:685d5f11838f | 410 | /* Check if the I2S is already enabled */ |
| mbed_official | 235:685d5f11838f | 411 | if((hi2s->Instance->I2SCFGR &SPI_I2SCFGR_I2SE) != SPI_I2SCFGR_I2SE) |
| mbed_official | 235:685d5f11838f | 412 | { |
| mbed_official | 235:685d5f11838f | 413 | /* Enable I2Sext(receiver) before enabling I2Sx peripheral */ |
| mbed_official | 235:685d5f11838f | 414 | I2SxEXT(hi2s->Instance)->I2SCFGR |= SPI_I2SCFGR_I2SE; |
| mbed_official | 235:685d5f11838f | 415 | |
| mbed_official | 235:685d5f11838f | 416 | /* Enable I2Sx peripheral */ |
| mbed_official | 235:685d5f11838f | 417 | __HAL_I2S_ENABLE(hi2s); |
| mbed_official | 235:685d5f11838f | 418 | } |
| mbed_official | 235:685d5f11838f | 419 | } |
| mbed_official | 235:685d5f11838f | 420 | /* The I2S_MODE_MASTER_RX or I2S_MODE_SLAVE_RX Mode is selected */ |
| mbed_official | 235:685d5f11838f | 421 | else |
| mbed_official | 235:685d5f11838f | 422 | { |
| mbed_official | 235:685d5f11838f | 423 | /* Enable I2Sext TXE and ERR interrupts */ |
| mbed_official | 235:685d5f11838f | 424 | I2SxEXT(hi2s->Instance)->CR2 |= (I2S_IT_TXE |I2S_IT_ERR); |
| mbed_official | 235:685d5f11838f | 425 | |
| mbed_official | 235:685d5f11838f | 426 | /* Enable I2Sext RXNE and ERR interrupts */ |
| mbed_official | 235:685d5f11838f | 427 | __HAL_I2S_ENABLE_IT(hi2s, (I2S_IT_RXNE | I2S_IT_ERR)); |
| mbed_official | 235:685d5f11838f | 428 | |
| mbed_official | 235:685d5f11838f | 429 | /* Check if the I2S is already enabled */ |
| mbed_official | 235:685d5f11838f | 430 | if((hi2s->Instance->I2SCFGR &SPI_I2SCFGR_I2SE) != SPI_I2SCFGR_I2SE) |
| mbed_official | 235:685d5f11838f | 431 | { |
| mbed_official | 235:685d5f11838f | 432 | /* Check if the I2S_MODE_MASTER_RX is selected */ |
| mbed_official | 235:685d5f11838f | 433 | if((hi2s->Instance->I2SCFGR & SPI_I2SCFGR_I2SCFG) == I2S_MODE_MASTER_RX) |
| mbed_official | 235:685d5f11838f | 434 | { |
| mbed_official | 235:685d5f11838f | 435 | /* Prepare the First Data before enabling the I2S */ |
| mbed_official | 235:685d5f11838f | 436 | if(hi2s->TxXferCount != 0) |
| mbed_official | 235:685d5f11838f | 437 | { |
| mbed_official | 235:685d5f11838f | 438 | /* Transmit First data */ |
| mbed_official | 235:685d5f11838f | 439 | I2SxEXT(hi2s->Instance)->DR = (*hi2s->pTxBuffPtr++); |
| mbed_official | 235:685d5f11838f | 440 | hi2s->TxXferCount--; |
| mbed_official | 235:685d5f11838f | 441 | |
| mbed_official | 235:685d5f11838f | 442 | if(hi2s->TxXferCount == 0) |
| mbed_official | 235:685d5f11838f | 443 | { |
| mbed_official | 235:685d5f11838f | 444 | /* Disable I2Sext TXE interrupt */ |
| mbed_official | 235:685d5f11838f | 445 | I2SxEXT(hi2s->Instance)->CR2 &= ~I2S_IT_TXE; |
| mbed_official | 235:685d5f11838f | 446 | } |
| mbed_official | 235:685d5f11838f | 447 | } |
| mbed_official | 235:685d5f11838f | 448 | } |
| mbed_official | 235:685d5f11838f | 449 | /* Enable I2S peripheral */ |
| mbed_official | 235:685d5f11838f | 450 | __HAL_I2S_ENABLE(hi2s); |
| mbed_official | 235:685d5f11838f | 451 | |
| mbed_official | 235:685d5f11838f | 452 | /* Enable I2Sext(transmitter) after enabling I2Sx peripheral */ |
| mbed_official | 235:685d5f11838f | 453 | I2SxEXT(hi2s->Instance)->I2SCFGR |= SPI_I2SCFGR_I2SE; |
| mbed_official | 235:685d5f11838f | 454 | } |
| mbed_official | 235:685d5f11838f | 455 | } |
| mbed_official | 235:685d5f11838f | 456 | /* Process Unlocked */ |
| mbed_official | 235:685d5f11838f | 457 | __HAL_UNLOCK(hi2s); |
| mbed_official | 235:685d5f11838f | 458 | |
| mbed_official | 235:685d5f11838f | 459 | return HAL_OK; |
| mbed_official | 235:685d5f11838f | 460 | } |
| mbed_official | 235:685d5f11838f | 461 | else |
| mbed_official | 235:685d5f11838f | 462 | { |
| mbed_official | 235:685d5f11838f | 463 | return HAL_BUSY; |
| mbed_official | 235:685d5f11838f | 464 | } |
| mbed_official | 235:685d5f11838f | 465 | } |
| mbed_official | 235:685d5f11838f | 466 | |
| mbed_official | 235:685d5f11838f | 467 | |
| mbed_official | 235:685d5f11838f | 468 | /** |
| mbed_official | 235:685d5f11838f | 469 | * @brief Full-Duplex Transmit/Receive data in non-blocking mode using DMA |
| mbed_official | 235:685d5f11838f | 470 | * @param hi2s: pointer to a I2S_HandleTypeDef structure that contains |
| mbed_official | 235:685d5f11838f | 471 | * the configuration information for I2S module |
| mbed_official | 235:685d5f11838f | 472 | * @param pTxData: a 16-bit pointer to the Transmit data buffer. |
| mbed_official | 235:685d5f11838f | 473 | * @param pRxData: a 16-bit pointer to the Receive data buffer. |
| mbed_official | 235:685d5f11838f | 474 | * @param Size: number of data sample to be sent: |
| mbed_official | 235:685d5f11838f | 475 | * @note When a 16-bit data frame or a 16-bit data frame extended is selected during the I2S |
| mbed_official | 235:685d5f11838f | 476 | * configuration phase, the Size parameter means the number of 16-bit data length |
| mbed_official | 235:685d5f11838f | 477 | * in the transaction and when a 24-bit data frame or a 32-bit data frame is selected |
| mbed_official | 235:685d5f11838f | 478 | * the Size parameter means the number of 16-bit data length. |
| mbed_official | 235:685d5f11838f | 479 | * @note The I2S is kept enabled at the end of transaction to avoid the clock de-synchronization |
| mbed_official | 235:685d5f11838f | 480 | * between Master and Slave(example: audio streaming). |
| mbed_official | 235:685d5f11838f | 481 | * @retval HAL status |
| mbed_official | 235:685d5f11838f | 482 | */ |
| mbed_official | 235:685d5f11838f | 483 | HAL_StatusTypeDef HAL_I2SEx_TransmitReceive_DMA(I2S_HandleTypeDef *hi2s, uint16_t *pTxData, uint16_t *pRxData, uint16_t Size) |
| mbed_official | 235:685d5f11838f | 484 | { |
| mbed_official | 235:685d5f11838f | 485 | uint32_t *tmp; |
| mbed_official | 235:685d5f11838f | 486 | uint32_t tmp1 = 0, tmp2 = 0; |
| mbed_official | 235:685d5f11838f | 487 | |
| mbed_official | 235:685d5f11838f | 488 | if((pTxData == NULL ) || (pRxData == NULL ) || (Size == 0)) |
| mbed_official | 235:685d5f11838f | 489 | { |
| mbed_official | 235:685d5f11838f | 490 | return HAL_ERROR; |
| mbed_official | 235:685d5f11838f | 491 | } |
| mbed_official | 235:685d5f11838f | 492 | |
| mbed_official | 235:685d5f11838f | 493 | if(hi2s->State == HAL_I2S_STATE_READY) |
| mbed_official | 235:685d5f11838f | 494 | { |
| mbed_official | 235:685d5f11838f | 495 | hi2s->pTxBuffPtr = pTxData; |
| mbed_official | 235:685d5f11838f | 496 | hi2s->pRxBuffPtr = pRxData; |
| mbed_official | 235:685d5f11838f | 497 | |
| mbed_official | 235:685d5f11838f | 498 | tmp1 = hi2s->Instance->I2SCFGR & (SPI_I2SCFGR_DATLEN | SPI_I2SCFGR_CHLEN); |
| mbed_official | 235:685d5f11838f | 499 | tmp2 = hi2s->Instance->I2SCFGR & (SPI_I2SCFGR_DATLEN | SPI_I2SCFGR_CHLEN); |
| mbed_official | 235:685d5f11838f | 500 | /* Check the Data format: When a 16-bit data frame or a 16-bit data frame extended |
| mbed_official | 235:685d5f11838f | 501 | is selected during the I2S configuration phase, the Size parameter means the number |
| mbed_official | 235:685d5f11838f | 502 | of 16-bit data length in the transaction and when a 24-bit data frame or a 32-bit data |
| mbed_official | 235:685d5f11838f | 503 | frame is selected the Size parameter means the number of 16-bit data length. */ |
| mbed_official | 235:685d5f11838f | 504 | if((tmp1 == I2S_DATAFORMAT_24B)||\ |
| mbed_official | 235:685d5f11838f | 505 | (tmp2 == I2S_DATAFORMAT_32B)) |
| mbed_official | 235:685d5f11838f | 506 | { |
| mbed_official | 235:685d5f11838f | 507 | hi2s->TxXferSize = Size*2; |
| mbed_official | 235:685d5f11838f | 508 | hi2s->TxXferCount = Size*2; |
| mbed_official | 235:685d5f11838f | 509 | hi2s->RxXferSize = Size*2; |
| mbed_official | 235:685d5f11838f | 510 | hi2s->RxXferCount = Size*2; |
| mbed_official | 235:685d5f11838f | 511 | } |
| mbed_official | 235:685d5f11838f | 512 | else |
| mbed_official | 235:685d5f11838f | 513 | { |
| mbed_official | 235:685d5f11838f | 514 | hi2s->TxXferSize = Size; |
| mbed_official | 235:685d5f11838f | 515 | hi2s->TxXferCount = Size; |
| mbed_official | 235:685d5f11838f | 516 | hi2s->RxXferSize = Size; |
| mbed_official | 235:685d5f11838f | 517 | hi2s->RxXferCount = Size; |
| mbed_official | 235:685d5f11838f | 518 | } |
| mbed_official | 235:685d5f11838f | 519 | |
| mbed_official | 235:685d5f11838f | 520 | /* Process Locked */ |
| mbed_official | 235:685d5f11838f | 521 | __HAL_LOCK(hi2s); |
| mbed_official | 235:685d5f11838f | 522 | |
| mbed_official | 235:685d5f11838f | 523 | hi2s->State = HAL_I2S_STATE_BUSY_TX_RX; |
| mbed_official | 235:685d5f11838f | 524 | hi2s->ErrorCode = HAL_I2S_ERROR_NONE; |
| mbed_official | 235:685d5f11838f | 525 | |
| mbed_official | 235:685d5f11838f | 526 | /* Set the I2S Rx DMA Half transfert complete callback */ |
| mbed_official | 235:685d5f11838f | 527 | hi2s->hdmarx->XferHalfCpltCallback = I2S_DMARxHalfCplt; |
| mbed_official | 235:685d5f11838f | 528 | |
| mbed_official | 235:685d5f11838f | 529 | /* Set the I2S Rx DMA transfert complete callback */ |
| mbed_official | 235:685d5f11838f | 530 | hi2s->hdmarx->XferCpltCallback = I2S_DMARxCplt; |
| mbed_official | 235:685d5f11838f | 531 | |
| mbed_official | 235:685d5f11838f | 532 | /* Set the I2S Rx DMA error callback */ |
| mbed_official | 235:685d5f11838f | 533 | hi2s->hdmarx->XferErrorCallback = I2S_DMAError; |
| mbed_official | 235:685d5f11838f | 534 | |
| mbed_official | 235:685d5f11838f | 535 | /* Set the I2S Tx DMA Half transfert complete callback */ |
| mbed_official | 235:685d5f11838f | 536 | hi2s->hdmatx->XferHalfCpltCallback = I2S_DMATxHalfCplt; |
| mbed_official | 235:685d5f11838f | 537 | |
| mbed_official | 235:685d5f11838f | 538 | /* Set the I2S Tx DMA transfert complete callback */ |
| mbed_official | 235:685d5f11838f | 539 | hi2s->hdmatx->XferCpltCallback = I2S_DMATxCplt; |
| mbed_official | 235:685d5f11838f | 540 | |
| mbed_official | 235:685d5f11838f | 541 | /* Set the I2S Tx DMA error callback */ |
| mbed_official | 235:685d5f11838f | 542 | hi2s->hdmatx->XferErrorCallback = I2S_DMAError; |
| mbed_official | 235:685d5f11838f | 543 | |
| mbed_official | 235:685d5f11838f | 544 | tmp1 = hi2s->Instance->I2SCFGR & SPI_I2SCFGR_I2SCFG; |
| mbed_official | 235:685d5f11838f | 545 | tmp2 = hi2s->Instance->I2SCFGR & SPI_I2SCFGR_I2SCFG; |
| mbed_official | 235:685d5f11838f | 546 | /* Check if the I2S_MODE_MASTER_TX or I2S_MODE_SLAVE_TX Mode is selected */ |
| mbed_official | 235:685d5f11838f | 547 | if((tmp1 == I2S_MODE_MASTER_TX) || (tmp2 == I2S_MODE_SLAVE_TX)) |
| mbed_official | 235:685d5f11838f | 548 | { |
| mbed_official | 235:685d5f11838f | 549 | /* Enable the Rx DMA Stream */ |
| mbed_official | 235:685d5f11838f | 550 | tmp = (uint32_t*)&pRxData; |
| mbed_official | 235:685d5f11838f | 551 | HAL_DMA_Start_IT(hi2s->hdmarx, (uint32_t)&I2SxEXT(hi2s->Instance)->DR, *(uint32_t*)tmp, hi2s->RxXferSize); |
| mbed_official | 235:685d5f11838f | 552 | |
| mbed_official | 235:685d5f11838f | 553 | /* Enable Rx DMA Request */ |
| mbed_official | 235:685d5f11838f | 554 | I2SxEXT(hi2s->Instance)->CR2 |= SPI_CR2_RXDMAEN; |
| mbed_official | 235:685d5f11838f | 555 | |
| mbed_official | 235:685d5f11838f | 556 | /* Enable the Tx DMA Stream */ |
| mbed_official | 235:685d5f11838f | 557 | tmp = (uint32_t*)&pTxData; |
| mbed_official | 235:685d5f11838f | 558 | HAL_DMA_Start_IT(hi2s->hdmatx, *(uint32_t*)tmp, (uint32_t)&hi2s->Instance->DR, hi2s->TxXferSize); |
| mbed_official | 235:685d5f11838f | 559 | |
| mbed_official | 235:685d5f11838f | 560 | /* Enable Tx DMA Request */ |
| mbed_official | 235:685d5f11838f | 561 | hi2s->Instance->CR2 |= SPI_CR2_TXDMAEN; |
| mbed_official | 235:685d5f11838f | 562 | |
| mbed_official | 235:685d5f11838f | 563 | /* Check if the I2S is already enabled */ |
| mbed_official | 235:685d5f11838f | 564 | if((hi2s->Instance->I2SCFGR &SPI_I2SCFGR_I2SE) != SPI_I2SCFGR_I2SE) |
| mbed_official | 235:685d5f11838f | 565 | { |
| mbed_official | 235:685d5f11838f | 566 | /* Enable I2Sext(receiver) before enabling I2Sx peripheral */ |
| mbed_official | 235:685d5f11838f | 567 | I2SxEXT(hi2s->Instance)->I2SCFGR |= SPI_I2SCFGR_I2SE; |
| mbed_official | 235:685d5f11838f | 568 | |
| mbed_official | 235:685d5f11838f | 569 | /* Enable I2S peripheral after the I2Sext */ |
| mbed_official | 235:685d5f11838f | 570 | __HAL_I2S_ENABLE(hi2s); |
| mbed_official | 235:685d5f11838f | 571 | } |
| mbed_official | 235:685d5f11838f | 572 | } |
| mbed_official | 235:685d5f11838f | 573 | else |
| mbed_official | 235:685d5f11838f | 574 | { |
| mbed_official | 235:685d5f11838f | 575 | /* Enable the Tx DMA Stream */ |
| mbed_official | 235:685d5f11838f | 576 | tmp = (uint32_t*)&pTxData; |
| mbed_official | 235:685d5f11838f | 577 | HAL_DMA_Start_IT(hi2s->hdmatx, *(uint32_t*)tmp, (uint32_t)&I2SxEXT(hi2s->Instance)->DR, hi2s->TxXferSize); |
| mbed_official | 235:685d5f11838f | 578 | |
| mbed_official | 235:685d5f11838f | 579 | /* Enable Tx DMA Request */ |
| mbed_official | 235:685d5f11838f | 580 | I2SxEXT(hi2s->Instance)->CR2 |= SPI_CR2_TXDMAEN; |
| mbed_official | 235:685d5f11838f | 581 | |
| mbed_official | 235:685d5f11838f | 582 | /* Enable the Rx DMA Stream */ |
| mbed_official | 235:685d5f11838f | 583 | tmp = (uint32_t*)&pRxData; |
| mbed_official | 235:685d5f11838f | 584 | HAL_DMA_Start_IT(hi2s->hdmarx, (uint32_t)&hi2s->Instance->DR, *(uint32_t*)tmp, hi2s->RxXferSize); |
| mbed_official | 235:685d5f11838f | 585 | |
| mbed_official | 235:685d5f11838f | 586 | /* Enable Rx DMA Request */ |
| mbed_official | 235:685d5f11838f | 587 | hi2s->Instance->CR2 |= SPI_CR2_RXDMAEN; |
| mbed_official | 235:685d5f11838f | 588 | |
| mbed_official | 235:685d5f11838f | 589 | /* Check if the I2S is already enabled */ |
| mbed_official | 235:685d5f11838f | 590 | if((hi2s->Instance->I2SCFGR &SPI_I2SCFGR_I2SE) != SPI_I2SCFGR_I2SE) |
| mbed_official | 235:685d5f11838f | 591 | { |
| mbed_official | 235:685d5f11838f | 592 | /* Enable I2S peripheral before the I2Sext */ |
| mbed_official | 235:685d5f11838f | 593 | __HAL_I2S_ENABLE(hi2s); |
| mbed_official | 235:685d5f11838f | 594 | |
| mbed_official | 235:685d5f11838f | 595 | /* Enable I2Sext(transmitter) after enabling I2Sx peripheral */ |
| mbed_official | 235:685d5f11838f | 596 | I2SxEXT(hi2s->Instance)->I2SCFGR |= SPI_I2SCFGR_I2SE; |
| mbed_official | 235:685d5f11838f | 597 | } |
| mbed_official | 235:685d5f11838f | 598 | else |
| mbed_official | 235:685d5f11838f | 599 | { |
| mbed_official | 235:685d5f11838f | 600 | /* Check if Master Receiver mode is selected */ |
| mbed_official | 235:685d5f11838f | 601 | if((hi2s->Instance->I2SCFGR & SPI_I2SCFGR_I2SCFG) == I2S_MODE_MASTER_RX) |
| mbed_official | 235:685d5f11838f | 602 | { |
| mbed_official | 235:685d5f11838f | 603 | /* Clear the Overrun Flag by a read operation on the SPI_DR register followed by a read |
| mbed_official | 235:685d5f11838f | 604 | access to the SPI_SR register. */ |
| mbed_official | 235:685d5f11838f | 605 | __HAL_I2S_CLEAR_OVRFLAG(hi2s); |
| mbed_official | 235:685d5f11838f | 606 | } |
| mbed_official | 235:685d5f11838f | 607 | } |
| mbed_official | 235:685d5f11838f | 608 | } |
| mbed_official | 235:685d5f11838f | 609 | |
| mbed_official | 235:685d5f11838f | 610 | /* Process Unlocked */ |
| mbed_official | 235:685d5f11838f | 611 | __HAL_UNLOCK(hi2s); |
| mbed_official | 235:685d5f11838f | 612 | |
| mbed_official | 235:685d5f11838f | 613 | return HAL_OK; |
| mbed_official | 235:685d5f11838f | 614 | } |
| mbed_official | 235:685d5f11838f | 615 | else |
| mbed_official | 235:685d5f11838f | 616 | { |
| mbed_official | 235:685d5f11838f | 617 | return HAL_BUSY; |
| mbed_official | 235:685d5f11838f | 618 | } |
| mbed_official | 235:685d5f11838f | 619 | } |
| mbed_official | 235:685d5f11838f | 620 | |
| mbed_official | 235:685d5f11838f | 621 | /** |
| mbed_official | 235:685d5f11838f | 622 | * @} |
| mbed_official | 235:685d5f11838f | 623 | */ |
| mbed_official | 235:685d5f11838f | 624 | |
| mbed_official | 235:685d5f11838f | 625 | /** |
| mbed_official | 235:685d5f11838f | 626 | * @brief Full-Duplex Transmit/Receive data in non-blocking mode using Interrupt |
| mbed_official | 235:685d5f11838f | 627 | * @param hi2s: pointer to a I2S_HandleTypeDef structure that contains |
| mbed_official | 235:685d5f11838f | 628 | * the configuration information for I2S module |
| mbed_official | 235:685d5f11838f | 629 | * @retval HAL status |
| mbed_official | 235:685d5f11838f | 630 | */ |
| mbed_official | 235:685d5f11838f | 631 | HAL_StatusTypeDef I2SEx_TransmitReceive_IT(I2S_HandleTypeDef *hi2s) |
| mbed_official | 235:685d5f11838f | 632 | { |
| mbed_official | 235:685d5f11838f | 633 | uint32_t tmp1 = 0, tmp2 = 0; |
| mbed_official | 235:685d5f11838f | 634 | |
| mbed_official | 235:685d5f11838f | 635 | if(hi2s->State == HAL_I2S_STATE_BUSY_TX_RX) |
| mbed_official | 235:685d5f11838f | 636 | { |
| mbed_official | 235:685d5f11838f | 637 | /* Process Locked */ |
| mbed_official | 235:685d5f11838f | 638 | __HAL_LOCK(hi2s); |
| mbed_official | 235:685d5f11838f | 639 | |
| mbed_official | 235:685d5f11838f | 640 | tmp1 = hi2s->Instance->I2SCFGR & SPI_I2SCFGR_I2SCFG; |
| mbed_official | 235:685d5f11838f | 641 | tmp2 = hi2s->Instance->I2SCFGR & SPI_I2SCFGR_I2SCFG; |
| mbed_official | 235:685d5f11838f | 642 | /* Check if the I2S_MODE_MASTER_TX or I2S_MODE_SLAVE_TX Mode is selected */ |
| mbed_official | 235:685d5f11838f | 643 | if((tmp1 == I2S_MODE_MASTER_TX) || (tmp2 == I2S_MODE_SLAVE_TX)) |
| mbed_official | 235:685d5f11838f | 644 | { |
| mbed_official | 235:685d5f11838f | 645 | if(hi2s->TxXferCount != 0) |
| mbed_official | 235:685d5f11838f | 646 | { |
| mbed_official | 235:685d5f11838f | 647 | if(__HAL_I2S_GET_FLAG(hi2s, I2S_FLAG_TXE) != RESET) |
| mbed_official | 235:685d5f11838f | 648 | { |
| mbed_official | 235:685d5f11838f | 649 | /* Transmit data */ |
| mbed_official | 235:685d5f11838f | 650 | hi2s->Instance->DR = (*hi2s->pTxBuffPtr++); |
| mbed_official | 235:685d5f11838f | 651 | hi2s->TxXferCount--; |
| mbed_official | 235:685d5f11838f | 652 | |
| mbed_official | 235:685d5f11838f | 653 | if(hi2s->TxXferCount == 0) |
| mbed_official | 235:685d5f11838f | 654 | { |
| mbed_official | 235:685d5f11838f | 655 | /* Disable TXE interrupt */ |
| mbed_official | 235:685d5f11838f | 656 | __HAL_I2S_DISABLE_IT(hi2s, I2S_IT_TXE); |
| mbed_official | 235:685d5f11838f | 657 | } |
| mbed_official | 235:685d5f11838f | 658 | } |
| mbed_official | 235:685d5f11838f | 659 | } |
| mbed_official | 235:685d5f11838f | 660 | |
| mbed_official | 235:685d5f11838f | 661 | if(hi2s->RxXferCount != 0) |
| mbed_official | 235:685d5f11838f | 662 | { |
| mbed_official | 235:685d5f11838f | 663 | if((I2SxEXT(hi2s->Instance)->SR & SPI_SR_RXNE) == SPI_SR_RXNE) |
| mbed_official | 235:685d5f11838f | 664 | { |
| mbed_official | 235:685d5f11838f | 665 | /* Receive data */ |
| mbed_official | 235:685d5f11838f | 666 | (*hi2s->pRxBuffPtr++) = I2SxEXT(hi2s->Instance)->DR; |
| mbed_official | 235:685d5f11838f | 667 | hi2s->RxXferCount--; |
| mbed_official | 235:685d5f11838f | 668 | |
| mbed_official | 235:685d5f11838f | 669 | if(hi2s->RxXferCount == 0) |
| mbed_official | 235:685d5f11838f | 670 | { |
| mbed_official | 235:685d5f11838f | 671 | /* Disable I2Sext RXNE interrupt */ |
| mbed_official | 235:685d5f11838f | 672 | I2SxEXT(hi2s->Instance)->CR2 &= ~I2S_IT_RXNE; |
| mbed_official | 235:685d5f11838f | 673 | } |
| mbed_official | 235:685d5f11838f | 674 | } |
| mbed_official | 235:685d5f11838f | 675 | } |
| mbed_official | 235:685d5f11838f | 676 | } |
| mbed_official | 235:685d5f11838f | 677 | /* The I2S_MODE_MASTER_RX or I2S_MODE_SLAVE_RX Mode is selected */ |
| mbed_official | 235:685d5f11838f | 678 | else |
| mbed_official | 235:685d5f11838f | 679 | { |
| mbed_official | 235:685d5f11838f | 680 | if(hi2s->TxXferCount != 0) |
| mbed_official | 235:685d5f11838f | 681 | { |
| mbed_official | 235:685d5f11838f | 682 | if((I2SxEXT(hi2s->Instance)->SR & SPI_SR_TXE) == SPI_SR_TXE) |
| mbed_official | 235:685d5f11838f | 683 | { |
| mbed_official | 235:685d5f11838f | 684 | /* Transmit data */ |
| mbed_official | 235:685d5f11838f | 685 | I2SxEXT(hi2s->Instance)->DR = (*hi2s->pTxBuffPtr++); |
| mbed_official | 235:685d5f11838f | 686 | hi2s->TxXferCount--; |
| mbed_official | 235:685d5f11838f | 687 | |
| mbed_official | 235:685d5f11838f | 688 | if(hi2s->TxXferCount == 0) |
| mbed_official | 235:685d5f11838f | 689 | { |
| mbed_official | 235:685d5f11838f | 690 | /* Disable I2Sext TXE interrupt */ |
| mbed_official | 235:685d5f11838f | 691 | I2SxEXT(hi2s->Instance)->CR2 &= ~I2S_IT_TXE; |
| mbed_official | 235:685d5f11838f | 692 | |
| mbed_official | 235:685d5f11838f | 693 | HAL_I2S_TxCpltCallback(hi2s); |
| mbed_official | 235:685d5f11838f | 694 | } |
| mbed_official | 235:685d5f11838f | 695 | } |
| mbed_official | 235:685d5f11838f | 696 | } |
| mbed_official | 235:685d5f11838f | 697 | if(hi2s->RxXferCount != 0) |
| mbed_official | 235:685d5f11838f | 698 | { |
| mbed_official | 235:685d5f11838f | 699 | if(__HAL_I2S_GET_FLAG(hi2s, I2S_FLAG_RXNE) != RESET) |
| mbed_official | 235:685d5f11838f | 700 | { |
| mbed_official | 235:685d5f11838f | 701 | /* Receive data */ |
| mbed_official | 235:685d5f11838f | 702 | (*hi2s->pRxBuffPtr++) = hi2s->Instance->DR; |
| mbed_official | 235:685d5f11838f | 703 | hi2s->RxXferCount--; |
| mbed_official | 235:685d5f11838f | 704 | |
| mbed_official | 235:685d5f11838f | 705 | if(hi2s->RxXferCount == 0) |
| mbed_official | 235:685d5f11838f | 706 | { |
| mbed_official | 235:685d5f11838f | 707 | /* Disable RXNE interrupt */ |
| mbed_official | 235:685d5f11838f | 708 | __HAL_I2S_DISABLE_IT(hi2s, I2S_IT_RXNE); |
| mbed_official | 235:685d5f11838f | 709 | |
| mbed_official | 235:685d5f11838f | 710 | HAL_I2S_RxCpltCallback(hi2s); |
| mbed_official | 235:685d5f11838f | 711 | } |
| mbed_official | 235:685d5f11838f | 712 | } |
| mbed_official | 235:685d5f11838f | 713 | } |
| mbed_official | 235:685d5f11838f | 714 | } |
| mbed_official | 235:685d5f11838f | 715 | |
| mbed_official | 235:685d5f11838f | 716 | tmp1 = hi2s->RxXferCount; |
| mbed_official | 235:685d5f11838f | 717 | tmp2 = hi2s->TxXferCount; |
| mbed_official | 235:685d5f11838f | 718 | if((tmp1 == 0) && (tmp2 == 0)) |
| mbed_official | 235:685d5f11838f | 719 | { |
| mbed_official | 235:685d5f11838f | 720 | /* Disable I2Sx ERR interrupt */ |
| mbed_official | 235:685d5f11838f | 721 | __HAL_I2S_DISABLE_IT(hi2s, I2S_IT_ERR); |
| mbed_official | 235:685d5f11838f | 722 | /* Disable I2Sext ERR interrupt */ |
| mbed_official | 235:685d5f11838f | 723 | I2SxEXT(hi2s->Instance)->CR2 &= ~I2S_IT_ERR; |
| mbed_official | 235:685d5f11838f | 724 | |
| mbed_official | 235:685d5f11838f | 725 | hi2s->State = HAL_I2S_STATE_READY; |
| mbed_official | 235:685d5f11838f | 726 | } |
| mbed_official | 235:685d5f11838f | 727 | |
| mbed_official | 235:685d5f11838f | 728 | /* Process Unlocked */ |
| mbed_official | 235:685d5f11838f | 729 | __HAL_UNLOCK(hi2s); |
| mbed_official | 235:685d5f11838f | 730 | |
| mbed_official | 235:685d5f11838f | 731 | return HAL_OK; |
| mbed_official | 235:685d5f11838f | 732 | } |
| mbed_official | 235:685d5f11838f | 733 | else |
| mbed_official | 235:685d5f11838f | 734 | { |
| mbed_official | 235:685d5f11838f | 735 | return HAL_BUSY; |
| mbed_official | 235:685d5f11838f | 736 | } |
| mbed_official | 235:685d5f11838f | 737 | } |
| mbed_official | 235:685d5f11838f | 738 | |
| mbed_official | 235:685d5f11838f | 739 | /** |
| mbed_official | 235:685d5f11838f | 740 | * @} |
| mbed_official | 235:685d5f11838f | 741 | */ |
| mbed_official | 235:685d5f11838f | 742 | |
| mbed_official | 235:685d5f11838f | 743 | #endif /* HAL_I2S_MODULE_ENABLED */ |
| mbed_official | 235:685d5f11838f | 744 | /** |
| mbed_official | 235:685d5f11838f | 745 | * @} |
| mbed_official | 235:685d5f11838f | 746 | */ |
| mbed_official | 235:685d5f11838f | 747 | |
| mbed_official | 235:685d5f11838f | 748 | /** |
| mbed_official | 235:685d5f11838f | 749 | * @} |
| mbed_official | 235:685d5f11838f | 750 | */ |
| mbed_official | 235:685d5f11838f | 751 | |
| mbed_official | 235:685d5f11838f | 752 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |