shao ziyang / mbed-src-kl05

mbed library sources

Dependents:   frdm_kl05z_gpio_test

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targets/cmsis/TARGET_STM/TARGET_NUCLEO_F401RE/stm32f4xx_hal_cryp_ex.c@323:9e901b0a5aa1, 2014-09-13 (annotated)

Committer:
shaoziyang
Date:
Sat Sep 13 14:25:46 2014 +0000
Revision:
323:9e901b0a5aa1
Parent:
226:b062af740e40 
test with CLOCK_SETUP = 0

Who changed what in which revision?

UserRevisionLine numberNew contents of line
mbed_official 87:085cde657901 1 /**
mbed_official 87:085cde657901 2 ******************************************************************************
mbed_official 87:085cde657901 3 * @file stm32f4xx_hal_cryp_ex.c
mbed_official 87:085cde657901 4 * @author MCD Application Team
mbed_official 226:b062af740e40 5 * @version V1.1.0RC2
mbed_official 226:b062af740e40 6 * @date 14-May-2014
mbed_official 87:085cde657901 7 * @brief Extended CRYP HAL module driver
mbed_official 87:085cde657901 8 * This file provides firmware functions to manage the following
mbed_official 87:085cde657901 9 * functionalities of CRYP extension peripheral:
mbed_official 87:085cde657901 10 * + Extended AES processing functions
mbed_official 87:085cde657901 11 *
mbed_official 87:085cde657901 12 @verbatim
mbed_official 87:085cde657901 13 ==============================================================================
mbed_official 87:085cde657901 14 ##### How to use this driver #####
mbed_official 87:085cde657901 15 ==============================================================================
mbed_official 87:085cde657901 16 [..]
mbed_official 87:085cde657901 17 The CRYP Extension HAL driver can be used as follows:
mbed_official 87:085cde657901 18 (#)Initialize the CRYP low level resources by implementing the HAL_CRYP_MspInit():
mbed_official 87:085cde657901 19 (##) Enable the CRYP interface clock using __CRYP_CLK_ENABLE()
mbed_official 87:085cde657901 20 (##) In case of using interrupts (e.g. HAL_CRYPEx_AESGCM_Encrypt_IT())
mbed_official 87:085cde657901 21 (+++) Configure the CRYP interrupt priority using HAL_NVIC_SetPriority()
mbed_official 87:085cde657901 22 (+++) Enable the CRYP IRQ handler using HAL_NVIC_EnableIRQ()
mbed_official 87:085cde657901 23 (+) In CRYP IRQ handler, call HAL_CRYP_IRQHandler()
mbed_official 87:085cde657901 24 (##) In case of using DMA to control data transfer (e.g. HAL_AES_ECB_Encrypt_DMA())
mbed_official 87:085cde657901 25 (+++) Enable the DMAx interface clock using __DMAx_CLK_ENABLE()
mbed_official 87:085cde657901 26 (+++) Configure and enable two DMA streams one for managing data transfer from
mbed_official 87:085cde657901 27 memory to peripheral (input stream) and another stream for managing data
mbed_official 87:085cde657901 28 transfer from peripheral to memory (output stream)
mbed_official 87:085cde657901 29 (+++) Associate the initilalized DMA handle to the CRYP DMA handle
mbed_official 87:085cde657901 30 using __HAL_LINKDMA()
mbed_official 87:085cde657901 31 (+++) Configure the priority and enable the NVIC for the transfer complete
mbed_official 87:085cde657901 32 interrupt on the two DMA Streams. The output stream should have higher
mbed_official 87:085cde657901 33 priority than the input stream HAL_NVIC_SetPriority() and HAL_NVIC_EnableIRQ()
mbed_official 87:085cde657901 34 (#)Initialize the CRYP HAL using HAL_CRYP_Init(). This function configures mainly:
mbed_official 87:085cde657901 35 (##) The data type: 1-bit, 8-bit, 16-bit and 32-bit
mbed_official 87:085cde657901 36 (##) The key size: 128, 192 and 256. This parameter is relevant only for AES
mbed_official 87:085cde657901 37 (##) The encryption/decryption key. Its size depends on the algorithm
mbed_official 87:085cde657901 38 used for encryption/decryption
mbed_official 87:085cde657901 39 (##) The initialization vector (counter). It is not used ECB mode.
mbed_official 87:085cde657901 40 (#)Three processing (encryption/decryption) functions are available:
mbed_official 87:085cde657901 41 (##) Polling mode: encryption and decryption APIs are blocking functions
mbed_official 87:085cde657901 42 i.e. they process the data and wait till the processing is finished
mbed_official 87:085cde657901 43 e.g. HAL_CRYPEx_AESGCM_Encrypt()
mbed_official 87:085cde657901 44 (##) Interrupt mode: encryption and decryption APIs are not blocking functions
mbed_official 87:085cde657901 45 i.e. they process the data under interrupt
mbed_official 87:085cde657901 46 e.g. HAL_CRYPEx_AESGCM_Encrypt_IT()
mbed_official 87:085cde657901 47 (##) DMA mode: encryption and decryption APIs are not blocking functions
mbed_official 87:085cde657901 48 i.e. the data transfer is ensured by DMA
mbed_official 87:085cde657901 49 e.g. HAL_CRYPEx_AESGCM_Encrypt_DMA()
mbed_official 87:085cde657901 50 (#)When the processing function is called at first time after HAL_CRYP_Init()
mbed_official 87:085cde657901 51 the CRYP peripheral is initialized and processes the buffer in input.
mbed_official 87:085cde657901 52 At second call, the processing function performs an append of the already
mbed_official 87:085cde657901 53 processed buffer.
mbed_official 87:085cde657901 54 When a new data block is to be processed, call HAL_CRYP_Init() then the
mbed_official 87:085cde657901 55 processing function.
mbed_official 87:085cde657901 56 (#)In AES-GCM and AES-CCM modes are an authenticated encryption algorithms
mbed_official 87:085cde657901 57 which provide authentication messages.
mbed_official 87:085cde657901 58 HAL_AES_GCM_Finish() and HAL_AES_CCM_Finish() are used to provide those
mbed_official 87:085cde657901 59 authentication messages.
mbed_official 87:085cde657901 60 Call those functions after the processing ones (polling, interrupt or DMA).
mbed_official 87:085cde657901 61 e.g. in AES-CCM mode call HAL_CRYPEx_AESCCM_Encrypt() to encrypt the plain data
mbed_official 87:085cde657901 62 then call HAL_CRYPEx_AESCCM_Finish() to get the authentication message
mbed_official 87:085cde657901 63 (#)Call HAL_CRYP_DeInit() to deinitialize the CRYP peripheral.
mbed_official 87:085cde657901 64
mbed_official 87:085cde657901 65 @endverbatim
mbed_official 87:085cde657901 66 ******************************************************************************
mbed_official 87:085cde657901 67 * @attention
mbed_official 87:085cde657901 68 *
mbed_official 87:085cde657901 69 * <h2><center>&copy; COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
mbed_official 87:085cde657901 70 *
mbed_official 87:085cde657901 71 * Redistribution and use in source and binary forms, with or without modification,
mbed_official 87:085cde657901 72 * are permitted provided that the following conditions are met:
mbed_official 87:085cde657901 73 * 1. Redistributions of source code must retain the above copyright notice,
mbed_official 87:085cde657901 74 * this list of conditions and the following disclaimer.
mbed_official 87:085cde657901 75 * 2. Redistributions in binary form must reproduce the above copyright notice,
mbed_official 87:085cde657901 76 * this list of conditions and the following disclaimer in the documentation
mbed_official 87:085cde657901 77 * and/or other materials provided with the distribution.
mbed_official 87:085cde657901 78 * 3. Neither the name of STMicroelectronics nor the names of its contributors
mbed_official 87:085cde657901 79 * may be used to endorse or promote products derived from this software
mbed_official 87:085cde657901 80 * without specific prior written permission.
mbed_official 87:085cde657901 81 *
mbed_official 87:085cde657901 82 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
mbed_official 87:085cde657901 83 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
mbed_official 87:085cde657901 84 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
mbed_official 87:085cde657901 85 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
mbed_official 87:085cde657901 86 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
mbed_official 87:085cde657901 87 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
mbed_official 87:085cde657901 88 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
mbed_official 87:085cde657901 89 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
mbed_official 87:085cde657901 90 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
mbed_official 87:085cde657901 91 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
mbed_official 87:085cde657901 92 *
mbed_official 87:085cde657901 93 ******************************************************************************
mbed_official 87:085cde657901 94 */
mbed_official 87:085cde657901 95
mbed_official 87:085cde657901 96 /* Includes ------------------------------------------------------------------*/
mbed_official 87:085cde657901 97 #include "stm32f4xx_hal.h"
mbed_official 87:085cde657901 98
mbed_official 87:085cde657901 99 /** @addtogroup STM32F4xx_HAL_Driver
mbed_official 87:085cde657901 100 * @{
mbed_official 87:085cde657901 101 */
mbed_official 87:085cde657901 102
mbed_official 87:085cde657901 103 /** @defgroup CRYPEx
mbed_official 87:085cde657901 104 * @brief CRYP Extension HAL module driver.
mbed_official 87:085cde657901 105 * @{
mbed_official 87:085cde657901 106 */
mbed_official 87:085cde657901 107
mbed_official 87:085cde657901 108 #ifdef HAL_CRYP_MODULE_ENABLED
mbed_official 87:085cde657901 109
mbed_official 87:085cde657901 110 #if defined(STM32F437xx) || defined(STM32F439xx)
mbed_official 87:085cde657901 111
mbed_official 87:085cde657901 112 /* Private typedef -----------------------------------------------------------*/
mbed_official 87:085cde657901 113 /* Private define ------------------------------------------------------------*/
mbed_official 87:085cde657901 114 /* Private macro -------------------------------------------------------------*/
mbed_official 87:085cde657901 115 /* Private variables ---------------------------------------------------------*/
mbed_official 87:085cde657901 116 /* Private function prototypes -----------------------------------------------*/
mbed_official 87:085cde657901 117 static void CRYPEx_GCMCCM_SetInitVector(CRYP_HandleTypeDef *hcryp, uint8_t *InitVector, uint32_t IVSize);
mbed_official 87:085cde657901 118 static void CRYPEx_GCMCCM_SetKey(CRYP_HandleTypeDef *hcryp, uint8_t *Key, uint32_t KeySize);
mbed_official 87:085cde657901 119 static HAL_StatusTypeDef CRYPEx_GCMCCM_ProcessData(CRYP_HandleTypeDef *hcryp, uint8_t *Input, uint16_t Ilength, uint8_t *Output, uint32_t Timeout);
mbed_official 87:085cde657901 120 static HAL_StatusTypeDef CRYPEx_GCMCCM_SetHeaderPhase(CRYP_HandleTypeDef *hcryp, uint8_t* Input, uint16_t Ilength, uint32_t Timeout);
mbed_official 87:085cde657901 121 static void CRYPEx_GCMCCM_DMAInCplt(DMA_HandleTypeDef *hdma);
mbed_official 87:085cde657901 122 static void CRYPEx_GCMCCM_DMAOutCplt(DMA_HandleTypeDef *hdma);
mbed_official 87:085cde657901 123 static void CRYPEx_GCMCCM_DMAError(DMA_HandleTypeDef *hdma);
mbed_official 87:085cde657901 124 static void CRYPEx_GCMCCM_SetDMAConfig(CRYP_HandleTypeDef *hcryp, uint32_t inputaddr, uint16_t Size, uint32_t outputaddr);
mbed_official 87:085cde657901 125
mbed_official 87:085cde657901 126 /* Private functions ---------------------------------------------------------*/
mbed_official 87:085cde657901 127
mbed_official 87:085cde657901 128 /** @defgroup CRYPEx_Private_Functions
mbed_official 87:085cde657901 129 * @{
mbed_official 87:085cde657901 130 */
mbed_official 87:085cde657901 131
mbed_official 87:085cde657901 132 /** @defgroup CRYPEx_Group1 Extended AES processing functions
mbed_official 87:085cde657901 133 * @brief Extended processing functions.
mbed_official 87:085cde657901 134 *
mbed_official 87:085cde657901 135 @verbatim
mbed_official 87:085cde657901 136 ==============================================================================
mbed_official 87:085cde657901 137 ##### Extended AES processing functions #####
mbed_official 87:085cde657901 138 ==============================================================================
mbed_official 87:085cde657901 139 [..] This section provides functions allowing to:
mbed_official 87:085cde657901 140 (+) Encrypt plaintext using AES-128/192/256 using GCM and CCM chaining modes
mbed_official 87:085cde657901 141 (+) Decrypt cyphertext using AES-128/192/256 using GCM and CCM chaining modes
mbed_official 87:085cde657901 142 (+) Finish the processing. This function is available only for GCM and CCM
mbed_official 87:085cde657901 143 [..] Three processing methods are available:
mbed_official 87:085cde657901 144 (+) Polling mode
mbed_official 87:085cde657901 145 (+) Interrupt mode
mbed_official 87:085cde657901 146 (+) DMA mode
mbed_official 87:085cde657901 147
mbed_official 87:085cde657901 148 @endverbatim
mbed_official 87:085cde657901 149 * @{
mbed_official 87:085cde657901 150 */
mbed_official 87:085cde657901 151
mbed_official 87:085cde657901 152
mbed_official 87:085cde657901 153 /**
mbed_official 87:085cde657901 154 * @brief Initializes the CRYP peripheral in AES CCM encryption mode then
mbed_official 87:085cde657901 155 * encrypt pPlainData. The cypher data are available in pCypherData.
mbed_official 226:b062af740e40 156 * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
mbed_official 226:b062af740e40 157 * the configuration information for CRYP module
mbed_official 87:085cde657901 158 * @param pPlainData: Pointer to the plaintext buffer
mbed_official 87:085cde657901 159 * @param Size: Length of the plaintext buffer, must be a multiple of 16
mbed_official 87:085cde657901 160 * @param pCypherData: Pointer to the cyphertext buffer
mbed_official 87:085cde657901 161 * @param Timeout: Timeout duration
mbed_official 87:085cde657901 162 * @retval HAL status
mbed_official 87:085cde657901 163 */
mbed_official 87:085cde657901 164 HAL_StatusTypeDef HAL_CRYPEx_AESCCM_Encrypt(CRYP_HandleTypeDef *hcryp, uint8_t *pPlainData, uint16_t Size, uint8_t *pCypherData, uint32_t Timeout)
mbed_official 87:085cde657901 165 {
mbed_official 87:085cde657901 166 uint32_t timeout = 0;
mbed_official 87:085cde657901 167 uint32_t headersize = hcryp->Init.HeaderSize;
mbed_official 87:085cde657901 168 uint32_t headeraddr = (uint32_t)hcryp->Init.Header;
mbed_official 87:085cde657901 169 uint32_t loopcounter = 0;
mbed_official 87:085cde657901 170 uint32_t bufferidx = 0;
mbed_official 87:085cde657901 171 uint8_t blockb0[16] = {0};/* Block B0 */
mbed_official 87:085cde657901 172 uint8_t ctr[16] = {0}; /* Counter */
mbed_official 87:085cde657901 173 uint32_t b0addr = (uint32_t)blockb0;
mbed_official 87:085cde657901 174
mbed_official 87:085cde657901 175 /* Process Locked */
mbed_official 87:085cde657901 176 __HAL_LOCK(hcryp);
mbed_official 87:085cde657901 177
mbed_official 87:085cde657901 178 /* Change the CRYP peripheral state */
mbed_official 87:085cde657901 179 hcryp->State = HAL_CRYP_STATE_BUSY;
mbed_official 87:085cde657901 180
mbed_official 87:085cde657901 181 /* Check if initialization phase has already been performed */
mbed_official 87:085cde657901 182 if(hcryp->Phase == HAL_CRYP_PHASE_READY)
mbed_official 87:085cde657901 183 {
mbed_official 87:085cde657901 184 /************************ Formatting the header block *********************/
mbed_official 87:085cde657901 185 if(headersize != 0)
mbed_official 87:085cde657901 186 {
mbed_official 87:085cde657901 187 /* Check that the associated data (or header) length is lower than 2^16 - 2^8 = 65536 - 256 = 65280 */
mbed_official 87:085cde657901 188 if(headersize < 65280)
mbed_official 87:085cde657901 189 {
mbed_official 87:085cde657901 190 hcryp->Init.pScratch[bufferidx++] = (uint8_t) ((headersize >> 8) & 0xFF);
mbed_official 87:085cde657901 191 hcryp->Init.pScratch[bufferidx++] = (uint8_t) ((headersize) & 0xFF);
mbed_official 87:085cde657901 192 headersize += 2;
mbed_official 87:085cde657901 193 }
mbed_official 87:085cde657901 194 else
mbed_official 87:085cde657901 195 {
mbed_official 87:085cde657901 196 /* Header is encoded as 0xff || 0xfe || [headersize]32, i.e., six octets */
mbed_official 87:085cde657901 197 hcryp->Init.pScratch[bufferidx++] = 0xFF;
mbed_official 87:085cde657901 198 hcryp->Init.pScratch[bufferidx++] = 0xFE;
mbed_official 87:085cde657901 199 hcryp->Init.pScratch[bufferidx++] = headersize & 0xff000000;
mbed_official 87:085cde657901 200 hcryp->Init.pScratch[bufferidx++] = headersize & 0x00ff0000;
mbed_official 87:085cde657901 201 hcryp->Init.pScratch[bufferidx++] = headersize & 0x0000ff00;
mbed_official 87:085cde657901 202 hcryp->Init.pScratch[bufferidx++] = headersize & 0x000000ff;
mbed_official 87:085cde657901 203 headersize += 6;
mbed_official 87:085cde657901 204 }
mbed_official 87:085cde657901 205 /* Copy the header buffer in internal buffer "hcryp->Init.pScratch" */
mbed_official 87:085cde657901 206 for(loopcounter = 0; loopcounter < headersize; loopcounter++)
mbed_official 87:085cde657901 207 {
mbed_official 87:085cde657901 208 hcryp->Init.pScratch[bufferidx++] = hcryp->Init.Header[loopcounter];
mbed_official 87:085cde657901 209 }
mbed_official 87:085cde657901 210 /* Check if the header size is modulo 16 */
mbed_official 87:085cde657901 211 if ((headersize % 16) != 0)
mbed_official 87:085cde657901 212 {
mbed_official 87:085cde657901 213 /* Padd the header buffer with 0s till the hcryp->Init.pScratch length is modulo 16 */
mbed_official 87:085cde657901 214 for(loopcounter = headersize; loopcounter <= ((headersize/16) + 1) * 16; loopcounter++)
mbed_official 87:085cde657901 215 {
mbed_official 87:085cde657901 216 hcryp->Init.pScratch[loopcounter] = 0;
mbed_official 87:085cde657901 217 }
mbed_official 87:085cde657901 218 /* Set the header size to modulo 16 */
mbed_official 87:085cde657901 219 headersize = ((headersize/16) + 1) * 16;
mbed_official 87:085cde657901 220 }
mbed_official 87:085cde657901 221 /* Set the pointer headeraddr to hcryp->Init.pScratch */
mbed_official 87:085cde657901 222 headeraddr = (uint32_t)hcryp->Init.pScratch;
mbed_official 87:085cde657901 223 }
mbed_official 87:085cde657901 224 /*********************** Formatting the block B0 **************************/
mbed_official 87:085cde657901 225 if(headersize != 0)
mbed_official 87:085cde657901 226 {
mbed_official 87:085cde657901 227 blockb0[0] = 0x40;
mbed_official 87:085cde657901 228 }
mbed_official 87:085cde657901 229 /* Flags byte */
mbed_official 87:085cde657901 230 /* blockb0[0] |= 0u | (((( (uint8_t) hcryp->Init.TagSize - 2) / 2) & 0x07 ) << 3 ) | ( ( (uint8_t) (15 - hcryp->Init.IVSize) - 1) & 0x07) */
mbed_official 87:085cde657901 231 blockb0[0] |= (uint8_t)((uint8_t)((uint8_t)(((uint8_t)(hcryp->Init.TagSize - (uint8_t)(2))) >> 1) & (uint8_t)0x07 ) << 3);
mbed_official 87:085cde657901 232 blockb0[0] |= (uint8_t)((uint8_t)((uint8_t)((uint8_t)(15) - hcryp->Init.IVSize) - (uint8_t)1) & (uint8_t)0x07);
mbed_official 87:085cde657901 233
mbed_official 87:085cde657901 234 for (loopcounter = 0; loopcounter < hcryp->Init.IVSize; loopcounter++)
mbed_official 87:085cde657901 235 {
mbed_official 87:085cde657901 236 blockb0[loopcounter+1] = hcryp->Init.pInitVect[loopcounter];
mbed_official 87:085cde657901 237 }
mbed_official 87:085cde657901 238 for ( ; loopcounter < 13; loopcounter++)
mbed_official 87:085cde657901 239 {
mbed_official 87:085cde657901 240 blockb0[loopcounter+1] = 0;
mbed_official 87:085cde657901 241 }
mbed_official 87:085cde657901 242
mbed_official 87:085cde657901 243 blockb0[14] = (Size >> 8);
mbed_official 87:085cde657901 244 blockb0[15] = (Size & 0xFF);
mbed_official 87:085cde657901 245
mbed_official 87:085cde657901 246 /************************* Formatting the initial counter *****************/
mbed_official 87:085cde657901 247 /* Byte 0:
mbed_official 87:085cde657901 248 Bits 7 and 6 are reserved and shall be set to 0
mbed_official 87:085cde657901 249 Bits 3, 4, and 5 shall also be set to 0, to ensure that all the counter blocks
mbed_official 87:085cde657901 250 are distinct from B0
mbed_official 87:085cde657901 251 Bits 0, 1, and 2 contain the same encoding of q as in B0
mbed_official 87:085cde657901 252 */
mbed_official 87:085cde657901 253 ctr[0] = blockb0[0] & 0x07;
mbed_official 87:085cde657901 254 /* byte 1 to NonceSize is the IV (Nonce) */
mbed_official 87:085cde657901 255 for(loopcounter = 1; loopcounter < hcryp->Init.IVSize + 1; loopcounter++)
mbed_official 87:085cde657901 256 {
mbed_official 87:085cde657901 257 ctr[loopcounter] = blockb0[loopcounter];
mbed_official 87:085cde657901 258 }
mbed_official 87:085cde657901 259 /* Set the LSB to 1 */
mbed_official 87:085cde657901 260 ctr[15] |= 0x01;
mbed_official 87:085cde657901 261
mbed_official 87:085cde657901 262 /* Set the key */
mbed_official 87:085cde657901 263 CRYPEx_GCMCCM_SetKey(hcryp, hcryp->Init.pKey, hcryp->Init.KeySize);
mbed_official 87:085cde657901 264
mbed_official 87:085cde657901 265 /* Set the CRYP peripheral in AES CCM mode */
mbed_official 87:085cde657901 266 __HAL_CRYP_SET_MODE(CRYP_CR_ALGOMODE_AES_CCM_ENCRYPT);
mbed_official 87:085cde657901 267
mbed_official 87:085cde657901 268 /* Set the Initialization Vector */
mbed_official 87:085cde657901 269 CRYPEx_GCMCCM_SetInitVector(hcryp, ctr, CRYP_KEYSIZE_128B);
mbed_official 87:085cde657901 270
mbed_official 87:085cde657901 271 /* Select init phase */
mbed_official 87:085cde657901 272 __HAL_CRYP_SET_PHASE(CRYP_PHASE_INIT);
mbed_official 87:085cde657901 273
mbed_official 87:085cde657901 274 b0addr = (uint32_t)blockb0;
mbed_official 87:085cde657901 275 /* Write the blockb0 block in the IN FIFO */
mbed_official 87:085cde657901 276 CRYP->DR = *(uint32_t*)(b0addr);
mbed_official 87:085cde657901 277 b0addr+=4;
mbed_official 87:085cde657901 278 CRYP->DR = *(uint32_t*)(b0addr);
mbed_official 87:085cde657901 279 b0addr+=4;
mbed_official 87:085cde657901 280 CRYP->DR = *(uint32_t*)(b0addr);
mbed_official 87:085cde657901 281 b0addr+=4;
mbed_official 87:085cde657901 282 CRYP->DR = *(uint32_t*)(b0addr);
mbed_official 87:085cde657901 283
mbed_official 87:085cde657901 284 /* Enable the CRYP peripheral */
mbed_official 87:085cde657901 285 __HAL_CRYP_ENABLE();
mbed_official 87:085cde657901 286
mbed_official 87:085cde657901 287 /* Get timeout */
mbed_official 87:085cde657901 288 timeout = HAL_GetTick() + Timeout;
mbed_official 87:085cde657901 289
mbed_official 87:085cde657901 290 while((CRYP->CR & CRYP_CR_CRYPEN) == CRYP_CR_CRYPEN)
mbed_official 87:085cde657901 291 {
mbed_official 87:085cde657901 292 /* Check for the Timeout */
mbed_official 87:085cde657901 293 if(Timeout != HAL_MAX_DELAY)
mbed_official 87:085cde657901 294 {
mbed_official 87:085cde657901 295 if(HAL_GetTick() >= timeout)
mbed_official 87:085cde657901 296 {
mbed_official 87:085cde657901 297 /* Change state */
mbed_official 87:085cde657901 298 hcryp->State = HAL_CRYP_STATE_TIMEOUT;
mbed_official 87:085cde657901 299
mbed_official 87:085cde657901 300 /* Process Unlocked */
mbed_official 87:085cde657901 301 __HAL_UNLOCK(hcryp);
mbed_official 87:085cde657901 302
mbed_official 87:085cde657901 303 return HAL_TIMEOUT;
mbed_official 87:085cde657901 304 }
mbed_official 87:085cde657901 305 }
mbed_official 87:085cde657901 306 }
mbed_official 87:085cde657901 307 /***************************** Header phase *******************************/
mbed_official 87:085cde657901 308 if(headersize != 0)
mbed_official 87:085cde657901 309 {
mbed_official 87:085cde657901 310 /* Select header phase */
mbed_official 87:085cde657901 311 __HAL_CRYP_SET_PHASE(CRYP_PHASE_HEADER);
mbed_official 87:085cde657901 312
mbed_official 87:085cde657901 313 /* Enable the CRYP peripheral */
mbed_official 87:085cde657901 314 __HAL_CRYP_ENABLE();
mbed_official 87:085cde657901 315
mbed_official 87:085cde657901 316 for(loopcounter = 0; (loopcounter < headersize); loopcounter+=16)
mbed_official 87:085cde657901 317 {
mbed_official 87:085cde657901 318 /* Get timeout */
mbed_official 87:085cde657901 319 timeout = HAL_GetTick() + Timeout;
mbed_official 87:085cde657901 320 while(HAL_IS_BIT_CLR(CRYP->SR, CRYP_FLAG_IFEM))
mbed_official 87:085cde657901 321 {
mbed_official 87:085cde657901 322 {
mbed_official 87:085cde657901 323 /* Check for the Timeout */
mbed_official 87:085cde657901 324 if(Timeout != HAL_MAX_DELAY)
mbed_official 87:085cde657901 325 {
mbed_official 87:085cde657901 326 if(HAL_GetTick() >= timeout)
mbed_official 87:085cde657901 327 {
mbed_official 87:085cde657901 328 /* Change state */
mbed_official 87:085cde657901 329 hcryp->State = HAL_CRYP_STATE_TIMEOUT;
mbed_official 87:085cde657901 330
mbed_official 87:085cde657901 331 /* Process Unlocked */
mbed_official 87:085cde657901 332 __HAL_UNLOCK(hcryp);
mbed_official 87:085cde657901 333
mbed_official 87:085cde657901 334 return HAL_TIMEOUT;
mbed_official 87:085cde657901 335 }
mbed_official 87:085cde657901 336 }
mbed_official 87:085cde657901 337 }
mbed_official 87:085cde657901 338 }
mbed_official 87:085cde657901 339 /* Write the header block in the IN FIFO */
mbed_official 87:085cde657901 340 CRYP->DR = *(uint32_t*)(headeraddr);
mbed_official 87:085cde657901 341 headeraddr+=4;
mbed_official 87:085cde657901 342 CRYP->DR = *(uint32_t*)(headeraddr);
mbed_official 87:085cde657901 343 headeraddr+=4;
mbed_official 87:085cde657901 344 CRYP->DR = *(uint32_t*)(headeraddr);
mbed_official 87:085cde657901 345 headeraddr+=4;
mbed_official 87:085cde657901 346 CRYP->DR = *(uint32_t*)(headeraddr);
mbed_official 87:085cde657901 347 headeraddr+=4;
mbed_official 87:085cde657901 348 }
mbed_official 87:085cde657901 349
mbed_official 87:085cde657901 350 /* Get timeout */
mbed_official 87:085cde657901 351 timeout = HAL_GetTick() + Timeout;
mbed_official 87:085cde657901 352
mbed_official 87:085cde657901 353 while((CRYP->SR & CRYP_FLAG_BUSY) == CRYP_FLAG_BUSY)
mbed_official 87:085cde657901 354 {
mbed_official 87:085cde657901 355 /* Check for the Timeout */
mbed_official 87:085cde657901 356 if(Timeout != HAL_MAX_DELAY)
mbed_official 87:085cde657901 357 {
mbed_official 87:085cde657901 358 if(HAL_GetTick() >= timeout)
mbed_official 87:085cde657901 359 {
mbed_official 87:085cde657901 360 /* Change state */
mbed_official 87:085cde657901 361 hcryp->State = HAL_CRYP_STATE_TIMEOUT;
mbed_official 87:085cde657901 362
mbed_official 87:085cde657901 363 /* Process Unlocked */
mbed_official 87:085cde657901 364 __HAL_UNLOCK(hcryp);
mbed_official 87:085cde657901 365
mbed_official 87:085cde657901 366 return HAL_TIMEOUT;
mbed_official 87:085cde657901 367 }
mbed_official 87:085cde657901 368 }
mbed_official 87:085cde657901 369 }
mbed_official 87:085cde657901 370 }
mbed_official 87:085cde657901 371 /* Save formatted counter into the scratch buffer pScratch */
mbed_official 87:085cde657901 372 for(loopcounter = 0; (loopcounter < 16); loopcounter++)
mbed_official 87:085cde657901 373 {
mbed_official 87:085cde657901 374 hcryp->Init.pScratch[loopcounter] = ctr[loopcounter];
mbed_official 87:085cde657901 375 }
mbed_official 87:085cde657901 376 /* Reset bit 0 */
mbed_official 87:085cde657901 377 hcryp->Init.pScratch[15] &= 0xfe;
mbed_official 87:085cde657901 378
mbed_official 87:085cde657901 379 /* Select payload phase once the header phase is performed */
mbed_official 87:085cde657901 380 __HAL_CRYP_SET_PHASE(CRYP_PHASE_PAYLOAD);
mbed_official 87:085cde657901 381
mbed_official 87:085cde657901 382 /* Flush FIFO */
mbed_official 87:085cde657901 383 __HAL_CRYP_FIFO_FLUSH();
mbed_official 87:085cde657901 384
mbed_official 87:085cde657901 385 /* Enable the CRYP peripheral */
mbed_official 87:085cde657901 386 __HAL_CRYP_ENABLE();
mbed_official 87:085cde657901 387
mbed_official 87:085cde657901 388 /* Set the phase */
mbed_official 87:085cde657901 389 hcryp->Phase = HAL_CRYP_PHASE_PROCESS;
mbed_official 87:085cde657901 390 }
mbed_official 87:085cde657901 391
mbed_official 87:085cde657901 392 /* Write Plain Data and Get Cypher Data */
mbed_official 87:085cde657901 393 if(CRYPEx_GCMCCM_ProcessData(hcryp,pPlainData, Size, pCypherData, Timeout) != HAL_OK)
mbed_official 87:085cde657901 394 {
mbed_official 87:085cde657901 395 return HAL_TIMEOUT;
mbed_official 87:085cde657901 396 }
mbed_official 87:085cde657901 397
mbed_official 87:085cde657901 398 /* Change the CRYP peripheral state */
mbed_official 87:085cde657901 399 hcryp->State = HAL_CRYP_STATE_READY;
mbed_official 87:085cde657901 400
mbed_official 87:085cde657901 401 /* Process Unlocked */
mbed_official 87:085cde657901 402 __HAL_UNLOCK(hcryp);
mbed_official 87:085cde657901 403
mbed_official 87:085cde657901 404 /* Return function status */
mbed_official 87:085cde657901 405 return HAL_OK;
mbed_official 87:085cde657901 406 }
mbed_official 87:085cde657901 407
mbed_official 87:085cde657901 408 /**
mbed_official 87:085cde657901 409 * @brief Initializes the CRYP peripheral in AES GCM encryption mode then
mbed_official 87:085cde657901 410 * encrypt pPlainData. The cypher data are available in pCypherData.
mbed_official 226:b062af740e40 411 * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
mbed_official 226:b062af740e40 412 * the configuration information for CRYP module
mbed_official 87:085cde657901 413 * @param pPlainData: Pointer to the plaintext buffer
mbed_official 87:085cde657901 414 * @param Size: Length of the plaintext buffer, must be a multiple of 16
mbed_official 87:085cde657901 415 * @param pCypherData: Pointer to the cyphertext buffer
mbed_official 87:085cde657901 416 * @param Timeout: Timeout duration
mbed_official 87:085cde657901 417 * @retval HAL status
mbed_official 87:085cde657901 418 */
mbed_official 87:085cde657901 419 HAL_StatusTypeDef HAL_CRYPEx_AESGCM_Encrypt(CRYP_HandleTypeDef *hcryp, uint8_t *pPlainData, uint16_t Size, uint8_t *pCypherData, uint32_t Timeout)
mbed_official 87:085cde657901 420 {
mbed_official 87:085cde657901 421 uint32_t timeout = 0;
mbed_official 87:085cde657901 422
mbed_official 87:085cde657901 423 /* Process Locked */
mbed_official 87:085cde657901 424 __HAL_LOCK(hcryp);
mbed_official 87:085cde657901 425
mbed_official 87:085cde657901 426 /* Change the CRYP peripheral state */
mbed_official 87:085cde657901 427 hcryp->State = HAL_CRYP_STATE_BUSY;
mbed_official 87:085cde657901 428
mbed_official 87:085cde657901 429 /* Check if initialization phase has already been performed */
mbed_official 87:085cde657901 430 if(hcryp->Phase == HAL_CRYP_PHASE_READY)
mbed_official 87:085cde657901 431 {
mbed_official 87:085cde657901 432 /* Set the key */
mbed_official 87:085cde657901 433 CRYPEx_GCMCCM_SetKey(hcryp, hcryp->Init.pKey, hcryp->Init.KeySize);
mbed_official 87:085cde657901 434
mbed_official 87:085cde657901 435 /* Set the CRYP peripheral in AES GCM mode */
mbed_official 87:085cde657901 436 __HAL_CRYP_SET_MODE(CRYP_CR_ALGOMODE_AES_GCM_ENCRYPT);
mbed_official 87:085cde657901 437
mbed_official 87:085cde657901 438 /* Set the Initialization Vector */
mbed_official 87:085cde657901 439 CRYPEx_GCMCCM_SetInitVector(hcryp, hcryp->Init.pInitVect, CRYP_KEYSIZE_128B);
mbed_official 87:085cde657901 440
mbed_official 87:085cde657901 441 /* Flush FIFO */
mbed_official 87:085cde657901 442 __HAL_CRYP_FIFO_FLUSH();
mbed_official 87:085cde657901 443
mbed_official 87:085cde657901 444 /* Enable the CRYP peripheral */
mbed_official 87:085cde657901 445 __HAL_CRYP_ENABLE();
mbed_official 87:085cde657901 446
mbed_official 87:085cde657901 447 /* Get timeout */
mbed_official 87:085cde657901 448 timeout = HAL_GetTick() + Timeout;
mbed_official 87:085cde657901 449
mbed_official 87:085cde657901 450 while((CRYP->CR & CRYP_CR_CRYPEN) == CRYP_CR_CRYPEN)
mbed_official 87:085cde657901 451 {
mbed_official 87:085cde657901 452 /* Check for the Timeout */
mbed_official 87:085cde657901 453 if(Timeout != HAL_MAX_DELAY)
mbed_official 87:085cde657901 454 {
mbed_official 87:085cde657901 455 if(HAL_GetTick() >= timeout)
mbed_official 87:085cde657901 456 {
mbed_official 87:085cde657901 457 /* Change state */
mbed_official 87:085cde657901 458 hcryp->State = HAL_CRYP_STATE_TIMEOUT;
mbed_official 87:085cde657901 459
mbed_official 87:085cde657901 460 /* Process Unlocked */
mbed_official 87:085cde657901 461 __HAL_UNLOCK(hcryp);
mbed_official 87:085cde657901 462
mbed_official 87:085cde657901 463 return HAL_TIMEOUT;
mbed_official 87:085cde657901 464 }
mbed_official 87:085cde657901 465 }
mbed_official 87:085cde657901 466 }
mbed_official 87:085cde657901 467
mbed_official 87:085cde657901 468 /* Set the header phase */
mbed_official 87:085cde657901 469 if(CRYPEx_GCMCCM_SetHeaderPhase(hcryp, hcryp->Init.Header, hcryp->Init.HeaderSize, Timeout) != HAL_OK)
mbed_official 87:085cde657901 470 {
mbed_official 87:085cde657901 471 return HAL_TIMEOUT;
mbed_official 87:085cde657901 472 }
mbed_official 87:085cde657901 473
mbed_official 87:085cde657901 474 /* Disable the CRYP peripheral */
mbed_official 87:085cde657901 475 __HAL_CRYP_DISABLE();
mbed_official 87:085cde657901 476
mbed_official 87:085cde657901 477 /* Select payload phase once the header phase is performed */
mbed_official 87:085cde657901 478 __HAL_CRYP_SET_PHASE(CRYP_PHASE_PAYLOAD);
mbed_official 87:085cde657901 479
mbed_official 87:085cde657901 480 /* Flush FIFO */
mbed_official 87:085cde657901 481 __HAL_CRYP_FIFO_FLUSH();
mbed_official 87:085cde657901 482
mbed_official 87:085cde657901 483 /* Enable the CRYP peripheral */
mbed_official 87:085cde657901 484 __HAL_CRYP_ENABLE();
mbed_official 87:085cde657901 485
mbed_official 87:085cde657901 486 /* Set the phase */
mbed_official 87:085cde657901 487 hcryp->Phase = HAL_CRYP_PHASE_PROCESS;
mbed_official 87:085cde657901 488 }
mbed_official 87:085cde657901 489
mbed_official 87:085cde657901 490 /* Write Plain Data and Get Cypher Data */
mbed_official 87:085cde657901 491 if(CRYPEx_GCMCCM_ProcessData(hcryp, pPlainData, Size, pCypherData, Timeout) != HAL_OK)
mbed_official 87:085cde657901 492 {
mbed_official 87:085cde657901 493 return HAL_TIMEOUT;
mbed_official 87:085cde657901 494 }
mbed_official 87:085cde657901 495
mbed_official 87:085cde657901 496 /* Change the CRYP peripheral state */
mbed_official 87:085cde657901 497 hcryp->State = HAL_CRYP_STATE_READY;
mbed_official 87:085cde657901 498
mbed_official 87:085cde657901 499 /* Process Unlocked */
mbed_official 87:085cde657901 500 __HAL_UNLOCK(hcryp);
mbed_official 87:085cde657901 501
mbed_official 87:085cde657901 502 /* Return function status */
mbed_official 87:085cde657901 503 return HAL_OK;
mbed_official 87:085cde657901 504 }
mbed_official 87:085cde657901 505
mbed_official 87:085cde657901 506 /**
mbed_official 87:085cde657901 507 * @brief Initializes the CRYP peripheral in AES GCM decryption mode then
mbed_official 87:085cde657901 508 * decrypted pCypherData. The cypher data are available in pPlainData.
mbed_official 226:b062af740e40 509 * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
mbed_official 226:b062af740e40 510 * the configuration information for CRYP module
mbed_official 87:085cde657901 511 * @param pCypherData: Pointer to the cyphertext buffer
mbed_official 87:085cde657901 512 * @param Size: Length of the cyphertext buffer, must be a multiple of 16
mbed_official 87:085cde657901 513 * @param pPlainData: Pointer to the plaintext buffer
mbed_official 87:085cde657901 514 * @param Timeout: Timeout duration
mbed_official 87:085cde657901 515 * @retval HAL status
mbed_official 87:085cde657901 516 */
mbed_official 87:085cde657901 517 HAL_StatusTypeDef HAL_CRYPEx_AESGCM_Decrypt(CRYP_HandleTypeDef *hcryp, uint8_t *pCypherData, uint16_t Size, uint8_t *pPlainData, uint32_t Timeout)
mbed_official 87:085cde657901 518 {
mbed_official 87:085cde657901 519 uint32_t timeout = 0;
mbed_official 87:085cde657901 520
mbed_official 87:085cde657901 521 /* Process Locked */
mbed_official 87:085cde657901 522 __HAL_LOCK(hcryp);
mbed_official 87:085cde657901 523
mbed_official 87:085cde657901 524 /* Change the CRYP peripheral state */
mbed_official 87:085cde657901 525 hcryp->State = HAL_CRYP_STATE_BUSY;
mbed_official 87:085cde657901 526
mbed_official 87:085cde657901 527 /* Check if initialization phase has already been performed */
mbed_official 87:085cde657901 528 if(hcryp->Phase == HAL_CRYP_PHASE_READY)
mbed_official 87:085cde657901 529 {
mbed_official 87:085cde657901 530 /* Set the key */
mbed_official 87:085cde657901 531 CRYPEx_GCMCCM_SetKey(hcryp, hcryp->Init.pKey, hcryp->Init.KeySize);
mbed_official 87:085cde657901 532
mbed_official 87:085cde657901 533 /* Set the CRYP peripheral in AES GCM decryption mode */
mbed_official 87:085cde657901 534 __HAL_CRYP_SET_MODE(CRYP_CR_ALGOMODE_AES_GCM_DECRYPT);
mbed_official 87:085cde657901 535
mbed_official 87:085cde657901 536 /* Set the Initialization Vector */
mbed_official 87:085cde657901 537 CRYPEx_GCMCCM_SetInitVector(hcryp, hcryp->Init.pInitVect, CRYP_KEYSIZE_128B);
mbed_official 87:085cde657901 538
mbed_official 87:085cde657901 539 /* Flush FIFO */
mbed_official 87:085cde657901 540 __HAL_CRYP_FIFO_FLUSH();
mbed_official 87:085cde657901 541
mbed_official 87:085cde657901 542 /* Enable the CRYP peripheral */
mbed_official 87:085cde657901 543 __HAL_CRYP_ENABLE();
mbed_official 87:085cde657901 544
mbed_official 87:085cde657901 545 /* Get the timeout */
mbed_official 87:085cde657901 546 timeout = HAL_GetTick() + Timeout;
mbed_official 87:085cde657901 547
mbed_official 87:085cde657901 548 while((CRYP->CR & CRYP_CR_CRYPEN) == CRYP_CR_CRYPEN)
mbed_official 87:085cde657901 549 {
mbed_official 87:085cde657901 550 /* Check for the Timeout */
mbed_official 87:085cde657901 551 if(Timeout != HAL_MAX_DELAY)
mbed_official 87:085cde657901 552 {
mbed_official 87:085cde657901 553 if(HAL_GetTick() >= timeout)
mbed_official 87:085cde657901 554 {
mbed_official 87:085cde657901 555 /* Change state */
mbed_official 87:085cde657901 556 hcryp->State = HAL_CRYP_STATE_TIMEOUT;
mbed_official 87:085cde657901 557
mbed_official 87:085cde657901 558 /* Process Unlocked */
mbed_official 87:085cde657901 559 __HAL_UNLOCK(hcryp);
mbed_official 87:085cde657901 560
mbed_official 87:085cde657901 561 return HAL_TIMEOUT;
mbed_official 87:085cde657901 562 }
mbed_official 87:085cde657901 563 }
mbed_official 87:085cde657901 564 }
mbed_official 87:085cde657901 565
mbed_official 87:085cde657901 566 /* Set the header phase */
mbed_official 87:085cde657901 567 if(CRYPEx_GCMCCM_SetHeaderPhase(hcryp, hcryp->Init.Header, hcryp->Init.HeaderSize, Timeout) != HAL_OK)
mbed_official 87:085cde657901 568 {
mbed_official 87:085cde657901 569 return HAL_TIMEOUT;
mbed_official 87:085cde657901 570 }
mbed_official 87:085cde657901 571 /* Disable the CRYP peripheral */
mbed_official 87:085cde657901 572 __HAL_CRYP_DISABLE();
mbed_official 87:085cde657901 573
mbed_official 87:085cde657901 574 /* Select payload phase once the header phase is performed */
mbed_official 87:085cde657901 575 __HAL_CRYP_SET_PHASE(CRYP_PHASE_PAYLOAD);
mbed_official 87:085cde657901 576
mbed_official 87:085cde657901 577 /* Enable the CRYP peripheral */
mbed_official 87:085cde657901 578 __HAL_CRYP_ENABLE();
mbed_official 87:085cde657901 579
mbed_official 87:085cde657901 580 /* Set the phase */
mbed_official 87:085cde657901 581 hcryp->Phase = HAL_CRYP_PHASE_PROCESS;
mbed_official 87:085cde657901 582 }
mbed_official 87:085cde657901 583
mbed_official 87:085cde657901 584 /* Write Plain Data and Get Cypher Data */
mbed_official 87:085cde657901 585 if(CRYPEx_GCMCCM_ProcessData(hcryp, pCypherData, Size, pPlainData, Timeout) != HAL_OK)
mbed_official 87:085cde657901 586 {
mbed_official 87:085cde657901 587 return HAL_TIMEOUT;
mbed_official 87:085cde657901 588 }
mbed_official 87:085cde657901 589
mbed_official 87:085cde657901 590 /* Change the CRYP peripheral state */
mbed_official 87:085cde657901 591 hcryp->State = HAL_CRYP_STATE_READY;
mbed_official 87:085cde657901 592
mbed_official 87:085cde657901 593 /* Process Unlocked */
mbed_official 87:085cde657901 594 __HAL_UNLOCK(hcryp);
mbed_official 87:085cde657901 595
mbed_official 87:085cde657901 596 /* Return function status */
mbed_official 87:085cde657901 597 return HAL_OK;
mbed_official 87:085cde657901 598 }
mbed_official 87:085cde657901 599
mbed_official 87:085cde657901 600 /**
mbed_official 87:085cde657901 601 * @brief Computes the authentication TAG.
mbed_official 226:b062af740e40 602 * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
mbed_official 226:b062af740e40 603 * the configuration information for CRYP module
mbed_official 87:085cde657901 604 * @param Size: Total length of the plain/cyphertext buffer
mbed_official 87:085cde657901 605 * @param AuthTag: Pointer to the authentication buffer
mbed_official 87:085cde657901 606 * @param Timeout: Timeout duration
mbed_official 87:085cde657901 607 * @retval HAL status
mbed_official 87:085cde657901 608 */
mbed_official 87:085cde657901 609 HAL_StatusTypeDef HAL_CRYPEx_AESGCM_Finish(CRYP_HandleTypeDef *hcryp, uint16_t Size, uint8_t *AuthTag, uint32_t Timeout)
mbed_official 87:085cde657901 610 {
mbed_official 87:085cde657901 611 uint32_t timeout = 0;
mbed_official 87:085cde657901 612 uint32_t headerlength = hcryp->Init.HeaderSize * 8; /* Header length in bits */
mbed_official 87:085cde657901 613 uint32_t inputlength = Size * 8; /* input length in bits */
mbed_official 87:085cde657901 614 uint32_t tagaddr = (uint32_t)AuthTag;
mbed_official 87:085cde657901 615
mbed_official 87:085cde657901 616 /* Process Locked */
mbed_official 87:085cde657901 617 __HAL_LOCK(hcryp);
mbed_official 87:085cde657901 618
mbed_official 87:085cde657901 619 /* Change the CRYP peripheral state */
mbed_official 87:085cde657901 620 hcryp->State = HAL_CRYP_STATE_BUSY;
mbed_official 87:085cde657901 621
mbed_official 87:085cde657901 622 /* Check if initialization phase has already been performed */
mbed_official 87:085cde657901 623 if(hcryp->Phase == HAL_CRYP_PHASE_PROCESS)
mbed_official 87:085cde657901 624 {
mbed_official 87:085cde657901 625 /* Change the CRYP phase */
mbed_official 87:085cde657901 626 hcryp->Phase = HAL_CRYP_PHASE_FINAL;
mbed_official 87:085cde657901 627
mbed_official 87:085cde657901 628 /* Disable CRYP to start the final phase */
mbed_official 87:085cde657901 629 __HAL_CRYP_DISABLE();
mbed_official 87:085cde657901 630
mbed_official 87:085cde657901 631 /* Select final phase */
mbed_official 87:085cde657901 632 __HAL_CRYP_SET_PHASE(CRYP_PHASE_FINAL);
mbed_official 87:085cde657901 633
mbed_official 87:085cde657901 634 /* Enable the CRYP peripheral */
mbed_official 87:085cde657901 635 __HAL_CRYP_ENABLE();
mbed_official 87:085cde657901 636
mbed_official 87:085cde657901 637 /* Write the number of bits in header (64 bits) followed by the number of bits
mbed_official 87:085cde657901 638 in the payload */
mbed_official 87:085cde657901 639 if(hcryp->Init.DataType == CRYP_DATATYPE_1B)
mbed_official 87:085cde657901 640 {
mbed_official 87:085cde657901 641 CRYP->DR = 0;
mbed_official 87:085cde657901 642 CRYP->DR = __RBIT(headerlength);
mbed_official 87:085cde657901 643 CRYP->DR = 0;
mbed_official 87:085cde657901 644 CRYP->DR = __RBIT(inputlength);
mbed_official 87:085cde657901 645 }
mbed_official 87:085cde657901 646 else if(hcryp->Init.DataType == CRYP_DATATYPE_8B)
mbed_official 87:085cde657901 647 {
mbed_official 87:085cde657901 648 CRYP->DR = 0;
mbed_official 87:085cde657901 649 CRYP->DR = __REV(headerlength);
mbed_official 87:085cde657901 650 CRYP->DR = 0;
mbed_official 87:085cde657901 651 CRYP->DR = __REV(inputlength);
mbed_official 87:085cde657901 652 }
mbed_official 87:085cde657901 653 else if(hcryp->Init.DataType == CRYP_DATATYPE_16B)
mbed_official 87:085cde657901 654 {
mbed_official 87:085cde657901 655 CRYP->DR = 0;
mbed_official 87:085cde657901 656 CRYP->DR = __REV16(headerlength);
mbed_official 87:085cde657901 657 CRYP->DR = 0;
mbed_official 87:085cde657901 658 CRYP->DR = __REV16(inputlength);
mbed_official 87:085cde657901 659 }
mbed_official 87:085cde657901 660 else if(hcryp->Init.DataType == CRYP_DATATYPE_32B)
mbed_official 87:085cde657901 661 {
mbed_official 87:085cde657901 662 CRYP->DR = 0;
mbed_official 87:085cde657901 663 CRYP->DR = (uint32_t)(headerlength);
mbed_official 87:085cde657901 664 CRYP->DR = 0;
mbed_official 87:085cde657901 665 CRYP->DR = (uint32_t)(inputlength);
mbed_official 87:085cde657901 666 }
mbed_official 87:085cde657901 667 /* Get timeout */
mbed_official 87:085cde657901 668 timeout = HAL_GetTick() + Timeout;
mbed_official 87:085cde657901 669
mbed_official 87:085cde657901 670 while(HAL_IS_BIT_CLR(CRYP->SR, CRYP_FLAG_OFNE))
mbed_official 87:085cde657901 671 {
mbed_official 87:085cde657901 672 /* Check for the Timeout */
mbed_official 87:085cde657901 673 if(Timeout != HAL_MAX_DELAY)
mbed_official 87:085cde657901 674 {
mbed_official 87:085cde657901 675 if(HAL_GetTick() >= timeout)
mbed_official 87:085cde657901 676 {
mbed_official 87:085cde657901 677 /* Change state */
mbed_official 87:085cde657901 678 hcryp->State = HAL_CRYP_STATE_TIMEOUT;
mbed_official 87:085cde657901 679
mbed_official 87:085cde657901 680 /* Process Unlocked */
mbed_official 87:085cde657901 681 __HAL_UNLOCK(hcryp);
mbed_official 87:085cde657901 682
mbed_official 87:085cde657901 683 return HAL_TIMEOUT;
mbed_official 87:085cde657901 684 }
mbed_official 87:085cde657901 685 }
mbed_official 87:085cde657901 686 }
mbed_official 87:085cde657901 687
mbed_official 87:085cde657901 688 /* Read the Auth TAG in the IN FIFO */
mbed_official 87:085cde657901 689 *(uint32_t*)(tagaddr) = CRYP->DOUT;
mbed_official 87:085cde657901 690 tagaddr+=4;
mbed_official 87:085cde657901 691 *(uint32_t*)(tagaddr) = CRYP->DOUT;
mbed_official 87:085cde657901 692 tagaddr+=4;
mbed_official 87:085cde657901 693 *(uint32_t*)(tagaddr) = CRYP->DOUT;
mbed_official 87:085cde657901 694 tagaddr+=4;
mbed_official 87:085cde657901 695 *(uint32_t*)(tagaddr) = CRYP->DOUT;
mbed_official 87:085cde657901 696 }
mbed_official 87:085cde657901 697
mbed_official 87:085cde657901 698 /* Change the CRYP peripheral state */
mbed_official 87:085cde657901 699 hcryp->State = HAL_CRYP_STATE_READY;
mbed_official 87:085cde657901 700
mbed_official 87:085cde657901 701 /* Process Unlocked */
mbed_official 87:085cde657901 702 __HAL_UNLOCK(hcryp);
mbed_official 87:085cde657901 703
mbed_official 87:085cde657901 704 /* Return function status */
mbed_official 87:085cde657901 705 return HAL_OK;
mbed_official 87:085cde657901 706 }
mbed_official 87:085cde657901 707
mbed_official 87:085cde657901 708 /**
mbed_official 87:085cde657901 709 * @brief Computes the authentication TAG for AES CCM mode.
mbed_official 87:085cde657901 710 * @note This API is called after HAL_AES_CCM_Encrypt()/HAL_AES_CCM_Decrypt()
mbed_official 226:b062af740e40 711 * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
mbed_official 226:b062af740e40 712 * the configuration information for CRYP module
mbed_official 87:085cde657901 713 * @param AuthTag: Pointer to the authentication buffer
mbed_official 87:085cde657901 714 * @param Timeout: Timeout duration
mbed_official 87:085cde657901 715 * @retval HAL status
mbed_official 87:085cde657901 716 */
mbed_official 87:085cde657901 717 HAL_StatusTypeDef HAL_CRYPEx_AESCCM_Finish(CRYP_HandleTypeDef *hcryp, uint8_t *AuthTag, uint32_t Timeout)
mbed_official 87:085cde657901 718 {
mbed_official 87:085cde657901 719 uint32_t timeout = 0;
mbed_official 87:085cde657901 720 uint32_t tagaddr = (uint32_t)AuthTag;
mbed_official 87:085cde657901 721 uint32_t ctraddr = (uint32_t)hcryp->Init.pScratch;
mbed_official 87:085cde657901 722 uint32_t temptag[4] = {0}; /* Temporary TAG (MAC) */
mbed_official 87:085cde657901 723 uint32_t loopcounter;
mbed_official 87:085cde657901 724
mbed_official 87:085cde657901 725 /* Process Locked */
mbed_official 87:085cde657901 726 __HAL_LOCK(hcryp);
mbed_official 87:085cde657901 727
mbed_official 87:085cde657901 728 /* Change the CRYP peripheral state */
mbed_official 87:085cde657901 729 hcryp->State = HAL_CRYP_STATE_BUSY;
mbed_official 87:085cde657901 730
mbed_official 87:085cde657901 731 /* Check if initialization phase has already been performed */
mbed_official 87:085cde657901 732 if(hcryp->Phase == HAL_CRYP_PHASE_PROCESS)
mbed_official 87:085cde657901 733 {
mbed_official 87:085cde657901 734 /* Change the CRYP phase */
mbed_official 87:085cde657901 735 hcryp->Phase = HAL_CRYP_PHASE_FINAL;
mbed_official 87:085cde657901 736
mbed_official 87:085cde657901 737 /* Disable CRYP to start the final phase */
mbed_official 87:085cde657901 738 __HAL_CRYP_DISABLE();
mbed_official 87:085cde657901 739
mbed_official 87:085cde657901 740 /* Select final phase */
mbed_official 87:085cde657901 741 __HAL_CRYP_SET_PHASE(CRYP_PHASE_FINAL);
mbed_official 87:085cde657901 742
mbed_official 87:085cde657901 743 /* Enable the CRYP peripheral */
mbed_official 87:085cde657901 744 __HAL_CRYP_ENABLE();
mbed_official 87:085cde657901 745
mbed_official 87:085cde657901 746 /* Write the counter block in the IN FIFO */
mbed_official 87:085cde657901 747 CRYP->DR = *(uint32_t*)ctraddr;
mbed_official 87:085cde657901 748 ctraddr+=4;
mbed_official 87:085cde657901 749 CRYP->DR = *(uint32_t*)ctraddr;
mbed_official 87:085cde657901 750 ctraddr+=4;
mbed_official 87:085cde657901 751 CRYP->DR = *(uint32_t*)ctraddr;
mbed_official 87:085cde657901 752 ctraddr+=4;
mbed_official 87:085cde657901 753 CRYP->DR = *(uint32_t*)ctraddr;
mbed_official 87:085cde657901 754
mbed_official 87:085cde657901 755 /* Get timeout */
mbed_official 87:085cde657901 756 timeout = HAL_GetTick() + Timeout;
mbed_official 87:085cde657901 757
mbed_official 87:085cde657901 758 while(HAL_IS_BIT_CLR(CRYP->SR, CRYP_FLAG_OFNE))
mbed_official 87:085cde657901 759 {
mbed_official 87:085cde657901 760 /* Check for the Timeout */
mbed_official 87:085cde657901 761 if(Timeout != HAL_MAX_DELAY)
mbed_official 87:085cde657901 762 {
mbed_official 87:085cde657901 763 if(HAL_GetTick() >= timeout)
mbed_official 87:085cde657901 764 {
mbed_official 87:085cde657901 765 /* Change state */
mbed_official 87:085cde657901 766 hcryp->State = HAL_CRYP_STATE_TIMEOUT;
mbed_official 87:085cde657901 767
mbed_official 87:085cde657901 768 /* Process Unlocked */
mbed_official 87:085cde657901 769 __HAL_UNLOCK(hcryp);
mbed_official 87:085cde657901 770
mbed_official 87:085cde657901 771 return HAL_TIMEOUT;
mbed_official 87:085cde657901 772 }
mbed_official 87:085cde657901 773 }
mbed_official 87:085cde657901 774 }
mbed_official 87:085cde657901 775
mbed_official 87:085cde657901 776 /* Read the Auth TAG in the IN FIFO */
mbed_official 87:085cde657901 777 temptag[0] = CRYP->DOUT;
mbed_official 87:085cde657901 778 temptag[1] = CRYP->DOUT;
mbed_official 87:085cde657901 779 temptag[2] = CRYP->DOUT;
mbed_official 87:085cde657901 780 temptag[3] = CRYP->DOUT;
mbed_official 87:085cde657901 781 }
mbed_official 87:085cde657901 782
mbed_official 87:085cde657901 783 /* Copy temporary authentication TAG in user TAG buffer */
mbed_official 87:085cde657901 784 for(loopcounter = 0; loopcounter < hcryp->Init.TagSize ; loopcounter++)
mbed_official 87:085cde657901 785 {
mbed_official 87:085cde657901 786 /* Set the authentication TAG buffer */
mbed_official 87:085cde657901 787 *((uint8_t*)tagaddr+loopcounter) = *((uint8_t*)temptag+loopcounter);
mbed_official 87:085cde657901 788 }
mbed_official 87:085cde657901 789
mbed_official 87:085cde657901 790 /* Change the CRYP peripheral state */
mbed_official 87:085cde657901 791 hcryp->State = HAL_CRYP_STATE_READY;
mbed_official 87:085cde657901 792
mbed_official 87:085cde657901 793 /* Process Unlocked */
mbed_official 87:085cde657901 794 __HAL_UNLOCK(hcryp);
mbed_official 87:085cde657901 795
mbed_official 87:085cde657901 796 /* Return function status */
mbed_official 87:085cde657901 797 return HAL_OK;
mbed_official 87:085cde657901 798 }
mbed_official 87:085cde657901 799
mbed_official 87:085cde657901 800 /**
mbed_official 87:085cde657901 801 * @brief Initializes the CRYP peripheral in AES CCM decryption mode then
mbed_official 87:085cde657901 802 * decrypted pCypherData. The cypher data are available in pPlainData.
mbed_official 226:b062af740e40 803 * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
mbed_official 226:b062af740e40 804 * the configuration information for CRYP module
mbed_official 87:085cde657901 805 * @param pPlainData: Pointer to the plaintext buffer
mbed_official 87:085cde657901 806 * @param Size: Length of the plaintext buffer, must be a multiple of 16
mbed_official 87:085cde657901 807 * @param pCypherData: Pointer to the cyphertext buffer
mbed_official 87:085cde657901 808 * @param Timeout: Timeout duration
mbed_official 87:085cde657901 809 * @retval HAL status
mbed_official 87:085cde657901 810 */
mbed_official 87:085cde657901 811 HAL_StatusTypeDef HAL_CRYPEx_AESCCM_Decrypt(CRYP_HandleTypeDef *hcryp, uint8_t *pCypherData, uint16_t Size, uint8_t *pPlainData, uint32_t Timeout)
mbed_official 87:085cde657901 812 {
mbed_official 87:085cde657901 813 uint32_t timeout = 0;
mbed_official 87:085cde657901 814 uint32_t headersize = hcryp->Init.HeaderSize;
mbed_official 87:085cde657901 815 uint32_t headeraddr = (uint32_t)hcryp->Init.Header;
mbed_official 87:085cde657901 816 uint32_t loopcounter = 0;
mbed_official 87:085cde657901 817 uint32_t bufferidx = 0;
mbed_official 87:085cde657901 818 uint8_t blockb0[16] = {0};/* Block B0 */
mbed_official 87:085cde657901 819 uint8_t ctr[16] = {0}; /* Counter */
mbed_official 87:085cde657901 820 uint32_t b0addr = (uint32_t)blockb0;
mbed_official 87:085cde657901 821
mbed_official 87:085cde657901 822 /* Process Locked */
mbed_official 87:085cde657901 823 __HAL_LOCK(hcryp);
mbed_official 87:085cde657901 824
mbed_official 87:085cde657901 825 /* Change the CRYP peripheral state */
mbed_official 87:085cde657901 826 hcryp->State = HAL_CRYP_STATE_BUSY;
mbed_official 87:085cde657901 827
mbed_official 87:085cde657901 828 /* Check if initialization phase has already been performed */
mbed_official 87:085cde657901 829 if(hcryp->Phase == HAL_CRYP_PHASE_READY)
mbed_official 87:085cde657901 830 {
mbed_official 87:085cde657901 831 /************************ Formatting the header block *********************/
mbed_official 87:085cde657901 832 if(headersize != 0)
mbed_official 87:085cde657901 833 {
mbed_official 87:085cde657901 834 /* Check that the associated data (or header) length is lower than 2^16 - 2^8 = 65536 - 256 = 65280 */
mbed_official 87:085cde657901 835 if(headersize < 65280)
mbed_official 87:085cde657901 836 {
mbed_official 87:085cde657901 837 hcryp->Init.pScratch[bufferidx++] = (uint8_t) ((headersize >> 8) & 0xFF);
mbed_official 87:085cde657901 838 hcryp->Init.pScratch[bufferidx++] = (uint8_t) ((headersize) & 0xFF);
mbed_official 87:085cde657901 839 headersize += 2;
mbed_official 87:085cde657901 840 }
mbed_official 87:085cde657901 841 else
mbed_official 87:085cde657901 842 {
mbed_official 87:085cde657901 843 /* Header is encoded as 0xff || 0xfe || [headersize]32, i.e., six octets */
mbed_official 87:085cde657901 844 hcryp->Init.pScratch[bufferidx++] = 0xFF;
mbed_official 87:085cde657901 845 hcryp->Init.pScratch[bufferidx++] = 0xFE;
mbed_official 87:085cde657901 846 hcryp->Init.pScratch[bufferidx++] = headersize & 0xff000000;
mbed_official 87:085cde657901 847 hcryp->Init.pScratch[bufferidx++] = headersize & 0x00ff0000;
mbed_official 87:085cde657901 848 hcryp->Init.pScratch[bufferidx++] = headersize & 0x0000ff00;
mbed_official 87:085cde657901 849 hcryp->Init.pScratch[bufferidx++] = headersize & 0x000000ff;
mbed_official 87:085cde657901 850 headersize += 6;
mbed_official 87:085cde657901 851 }
mbed_official 87:085cde657901 852 /* Copy the header buffer in internal buffer "hcryp->Init.pScratch" */
mbed_official 87:085cde657901 853 for(loopcounter = 0; loopcounter < headersize; loopcounter++)
mbed_official 87:085cde657901 854 {
mbed_official 87:085cde657901 855 hcryp->Init.pScratch[bufferidx++] = hcryp->Init.Header[loopcounter];
mbed_official 87:085cde657901 856 }
mbed_official 87:085cde657901 857 /* Check if the header size is modulo 16 */
mbed_official 87:085cde657901 858 if ((headersize % 16) != 0)
mbed_official 87:085cde657901 859 {
mbed_official 87:085cde657901 860 /* Padd the header buffer with 0s till the hcryp->Init.pScratch length is modulo 16 */
mbed_official 87:085cde657901 861 for(loopcounter = headersize; loopcounter <= ((headersize/16) + 1) * 16; loopcounter++)
mbed_official 87:085cde657901 862 {
mbed_official 87:085cde657901 863 hcryp->Init.pScratch[loopcounter] = 0;
mbed_official 87:085cde657901 864 }
mbed_official 87:085cde657901 865 /* Set the header size to modulo 16 */
mbed_official 87:085cde657901 866 headersize = ((headersize/16) + 1) * 16;
mbed_official 87:085cde657901 867 }
mbed_official 87:085cde657901 868 /* Set the pointer headeraddr to hcryp->Init.pScratch */
mbed_official 87:085cde657901 869 headeraddr = (uint32_t)hcryp->Init.pScratch;
mbed_official 87:085cde657901 870 }
mbed_official 87:085cde657901 871 /*********************** Formatting the block B0 **************************/
mbed_official 87:085cde657901 872 if(headersize != 0)
mbed_official 87:085cde657901 873 {
mbed_official 87:085cde657901 874 blockb0[0] = 0x40;
mbed_official 87:085cde657901 875 }
mbed_official 87:085cde657901 876 /* Flags byte */
mbed_official 87:085cde657901 877 /* blockb0[0] |= 0u | (((( (uint8_t) hcryp->Init.TagSize - 2) / 2) & 0x07 ) << 3 ) | ( ( (uint8_t) (15 - hcryp->Init.IVSize) - 1) & 0x07) */
mbed_official 87:085cde657901 878 blockb0[0] |= (uint8_t)((uint8_t)((uint8_t)(((uint8_t)(hcryp->Init.TagSize - (uint8_t)(2))) >> 1) & (uint8_t)0x07 ) << 3);
mbed_official 87:085cde657901 879 blockb0[0] |= (uint8_t)((uint8_t)((uint8_t)((uint8_t)(15) - hcryp->Init.IVSize) - (uint8_t)1) & (uint8_t)0x07);
mbed_official 87:085cde657901 880
mbed_official 87:085cde657901 881 for (loopcounter = 0; loopcounter < hcryp->Init.IVSize; loopcounter++)
mbed_official 87:085cde657901 882 {
mbed_official 87:085cde657901 883 blockb0[loopcounter+1] = hcryp->Init.pInitVect[loopcounter];
mbed_official 87:085cde657901 884 }
mbed_official 87:085cde657901 885 for ( ; loopcounter < 13; loopcounter++)
mbed_official 87:085cde657901 886 {
mbed_official 87:085cde657901 887 blockb0[loopcounter+1] = 0;
mbed_official 87:085cde657901 888 }
mbed_official 87:085cde657901 889
mbed_official 87:085cde657901 890 blockb0[14] = (Size >> 8);
mbed_official 87:085cde657901 891 blockb0[15] = (Size & 0xFF);
mbed_official 87:085cde657901 892
mbed_official 87:085cde657901 893 /************************* Formatting the initial counter *****************/
mbed_official 87:085cde657901 894 /* Byte 0:
mbed_official 87:085cde657901 895 Bits 7 and 6 are reserved and shall be set to 0
mbed_official 87:085cde657901 896 Bits 3, 4, and 5 shall also be set to 0, to ensure that all the counter
mbed_official 87:085cde657901 897 blocks are distinct from B0
mbed_official 87:085cde657901 898 Bits 0, 1, and 2 contain the same encoding of q as in B0
mbed_official 87:085cde657901 899 */
mbed_official 87:085cde657901 900 ctr[0] = blockb0[0] & 0x07;
mbed_official 87:085cde657901 901 /* byte 1 to NonceSize is the IV (Nonce) */
mbed_official 87:085cde657901 902 for(loopcounter = 1; loopcounter < hcryp->Init.IVSize + 1; loopcounter++)
mbed_official 87:085cde657901 903 {
mbed_official 87:085cde657901 904 ctr[loopcounter] = blockb0[loopcounter];
mbed_official 87:085cde657901 905 }
mbed_official 87:085cde657901 906 /* Set the LSB to 1 */
mbed_official 87:085cde657901 907 ctr[15] |= 0x01;
mbed_official 87:085cde657901 908
mbed_official 87:085cde657901 909 /* Set the key */
mbed_official 87:085cde657901 910 CRYPEx_GCMCCM_SetKey(hcryp, hcryp->Init.pKey, hcryp->Init.KeySize);
mbed_official 87:085cde657901 911
mbed_official 87:085cde657901 912 /* Set the CRYP peripheral in AES CCM mode */
mbed_official 87:085cde657901 913 __HAL_CRYP_SET_MODE(CRYP_CR_ALGOMODE_AES_CCM_DECRYPT);
mbed_official 87:085cde657901 914
mbed_official 87:085cde657901 915 /* Set the Initialization Vector */
mbed_official 87:085cde657901 916 CRYPEx_GCMCCM_SetInitVector(hcryp, ctr, CRYP_KEYSIZE_128B);
mbed_official 87:085cde657901 917
mbed_official 87:085cde657901 918 /* Select init phase */
mbed_official 87:085cde657901 919 __HAL_CRYP_SET_PHASE(CRYP_PHASE_INIT);
mbed_official 87:085cde657901 920
mbed_official 87:085cde657901 921 b0addr = (uint32_t)blockb0;
mbed_official 87:085cde657901 922 /* Write the blockb0 block in the IN FIFO */
mbed_official 87:085cde657901 923 CRYP->DR = *(uint32_t*)(b0addr);
mbed_official 87:085cde657901 924 b0addr+=4;
mbed_official 87:085cde657901 925 CRYP->DR = *(uint32_t*)(b0addr);
mbed_official 87:085cde657901 926 b0addr+=4;
mbed_official 87:085cde657901 927 CRYP->DR = *(uint32_t*)(b0addr);
mbed_official 87:085cde657901 928 b0addr+=4;
mbed_official 87:085cde657901 929 CRYP->DR = *(uint32_t*)(b0addr);
mbed_official 87:085cde657901 930
mbed_official 87:085cde657901 931 /* Enable the CRYP peripheral */
mbed_official 87:085cde657901 932 __HAL_CRYP_ENABLE();
mbed_official 87:085cde657901 933
mbed_official 87:085cde657901 934 /* Get timeout */
mbed_official 87:085cde657901 935 timeout = HAL_GetTick() + Timeout;
mbed_official 87:085cde657901 936
mbed_official 87:085cde657901 937 while((CRYP->CR & CRYP_CR_CRYPEN) == CRYP_CR_CRYPEN)
mbed_official 87:085cde657901 938 {
mbed_official 87:085cde657901 939 /* Check for the Timeout */
mbed_official 87:085cde657901 940 if(Timeout != HAL_MAX_DELAY)
mbed_official 87:085cde657901 941 {
mbed_official 87:085cde657901 942 if(HAL_GetTick() >= timeout)
mbed_official 87:085cde657901 943 {
mbed_official 87:085cde657901 944 /* Change state */
mbed_official 87:085cde657901 945 hcryp->State = HAL_CRYP_STATE_TIMEOUT;
mbed_official 87:085cde657901 946
mbed_official 87:085cde657901 947 /* Process Unlocked */
mbed_official 87:085cde657901 948 __HAL_UNLOCK(hcryp);
mbed_official 87:085cde657901 949
mbed_official 87:085cde657901 950 return HAL_TIMEOUT;
mbed_official 87:085cde657901 951 }
mbed_official 87:085cde657901 952 }
mbed_official 87:085cde657901 953 }
mbed_official 87:085cde657901 954 /***************************** Header phase *******************************/
mbed_official 87:085cde657901 955 if(headersize != 0)
mbed_official 87:085cde657901 956 {
mbed_official 87:085cde657901 957 /* Select header phase */
mbed_official 87:085cde657901 958 __HAL_CRYP_SET_PHASE(CRYP_PHASE_HEADER);
mbed_official 87:085cde657901 959
mbed_official 87:085cde657901 960 /* Enable Crypto processor */
mbed_official 87:085cde657901 961 __HAL_CRYP_ENABLE();
mbed_official 87:085cde657901 962
mbed_official 87:085cde657901 963 for(loopcounter = 0; (loopcounter < headersize); loopcounter+=16)
mbed_official 87:085cde657901 964 {
mbed_official 87:085cde657901 965 /* Get timeout */
mbed_official 87:085cde657901 966 timeout = HAL_GetTick() + Timeout;
mbed_official 87:085cde657901 967
mbed_official 87:085cde657901 968 while(HAL_IS_BIT_CLR(CRYP->SR, CRYP_FLAG_IFEM))
mbed_official 87:085cde657901 969 {
mbed_official 87:085cde657901 970 /* Check for the Timeout */
mbed_official 87:085cde657901 971 if(Timeout != HAL_MAX_DELAY)
mbed_official 87:085cde657901 972 {
mbed_official 87:085cde657901 973 if(HAL_GetTick() >= timeout)
mbed_official 87:085cde657901 974 {
mbed_official 87:085cde657901 975 /* Change state */
mbed_official 87:085cde657901 976 hcryp->State = HAL_CRYP_STATE_TIMEOUT;
mbed_official 87:085cde657901 977
mbed_official 87:085cde657901 978 /* Process Unlocked */
mbed_official 87:085cde657901 979 __HAL_UNLOCK(hcryp);
mbed_official 87:085cde657901 980
mbed_official 87:085cde657901 981 return HAL_TIMEOUT;
mbed_official 87:085cde657901 982 }
mbed_official 87:085cde657901 983 }
mbed_official 87:085cde657901 984 }
mbed_official 87:085cde657901 985 /* Write the header block in the IN FIFO */
mbed_official 87:085cde657901 986 CRYP->DR = *(uint32_t*)(headeraddr);
mbed_official 87:085cde657901 987 headeraddr+=4;
mbed_official 87:085cde657901 988 CRYP->DR = *(uint32_t*)(headeraddr);
mbed_official 87:085cde657901 989 headeraddr+=4;
mbed_official 87:085cde657901 990 CRYP->DR = *(uint32_t*)(headeraddr);
mbed_official 87:085cde657901 991 headeraddr+=4;
mbed_official 87:085cde657901 992 CRYP->DR = *(uint32_t*)(headeraddr);
mbed_official 87:085cde657901 993 headeraddr+=4;
mbed_official 87:085cde657901 994 }
mbed_official 87:085cde657901 995
mbed_official 87:085cde657901 996 /* Get timeout */
mbed_official 87:085cde657901 997 timeout = HAL_GetTick() + Timeout;
mbed_official 87:085cde657901 998
mbed_official 87:085cde657901 999 while((CRYP->SR & CRYP_FLAG_BUSY) == CRYP_FLAG_BUSY)
mbed_official 87:085cde657901 1000 {
mbed_official 87:085cde657901 1001 /* Check for the Timeout */
mbed_official 87:085cde657901 1002 if(Timeout != HAL_MAX_DELAY)
mbed_official 87:085cde657901 1003 {
mbed_official 87:085cde657901 1004 if(HAL_GetTick() >= timeout)
mbed_official 87:085cde657901 1005 {
mbed_official 87:085cde657901 1006 /* Change state */
mbed_official 87:085cde657901 1007 hcryp->State = HAL_CRYP_STATE_TIMEOUT;
mbed_official 87:085cde657901 1008
mbed_official 87:085cde657901 1009 /* Process Unlocked */
mbed_official 87:085cde657901 1010 __HAL_UNLOCK(hcryp);
mbed_official 87:085cde657901 1011
mbed_official 87:085cde657901 1012 return HAL_TIMEOUT;
mbed_official 87:085cde657901 1013 }
mbed_official 87:085cde657901 1014 }
mbed_official 87:085cde657901 1015 }
mbed_official 87:085cde657901 1016 }
mbed_official 87:085cde657901 1017 /* Save formatted counter into the scratch buffer pScratch */
mbed_official 87:085cde657901 1018 for(loopcounter = 0; (loopcounter < 16); loopcounter++)
mbed_official 87:085cde657901 1019 {
mbed_official 87:085cde657901 1020 hcryp->Init.pScratch[loopcounter] = ctr[loopcounter];
mbed_official 87:085cde657901 1021 }
mbed_official 87:085cde657901 1022 /* Reset bit 0 */
mbed_official 87:085cde657901 1023 hcryp->Init.pScratch[15] &= 0xfe;
mbed_official 87:085cde657901 1024 /* Select payload phase once the header phase is performed */
mbed_official 87:085cde657901 1025 __HAL_CRYP_SET_PHASE(CRYP_PHASE_PAYLOAD);
mbed_official 87:085cde657901 1026
mbed_official 87:085cde657901 1027 /* Flush FIFO */
mbed_official 87:085cde657901 1028 __HAL_CRYP_FIFO_FLUSH();
mbed_official 87:085cde657901 1029
mbed_official 87:085cde657901 1030 /* Enable the CRYP peripheral */
mbed_official 87:085cde657901 1031 __HAL_CRYP_ENABLE();
mbed_official 87:085cde657901 1032
mbed_official 87:085cde657901 1033 /* Set the phase */
mbed_official 87:085cde657901 1034 hcryp->Phase = HAL_CRYP_PHASE_PROCESS;
mbed_official 87:085cde657901 1035 }
mbed_official 87:085cde657901 1036
mbed_official 87:085cde657901 1037 /* Write Plain Data and Get Cypher Data */
mbed_official 87:085cde657901 1038 if(CRYPEx_GCMCCM_ProcessData(hcryp, pCypherData, Size, pPlainData, Timeout) != HAL_OK)
mbed_official 87:085cde657901 1039 {
mbed_official 87:085cde657901 1040 return HAL_TIMEOUT;
mbed_official 87:085cde657901 1041 }
mbed_official 87:085cde657901 1042
mbed_official 87:085cde657901 1043 /* Change the CRYP peripheral state */
mbed_official 87:085cde657901 1044 hcryp->State = HAL_CRYP_STATE_READY;
mbed_official 87:085cde657901 1045
mbed_official 87:085cde657901 1046 /* Process Unlocked */
mbed_official 87:085cde657901 1047 __HAL_UNLOCK(hcryp);
mbed_official 87:085cde657901 1048
mbed_official 87:085cde657901 1049 /* Return function status */
mbed_official 87:085cde657901 1050 return HAL_OK;
mbed_official 87:085cde657901 1051 }
mbed_official 87:085cde657901 1052
mbed_official 87:085cde657901 1053 /**
mbed_official 87:085cde657901 1054 * @brief Initializes the CRYP peripheral in AES GCM encryption mode using IT.
mbed_official 226:b062af740e40 1055 * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
mbed_official 226:b062af740e40 1056 * the configuration information for CRYP module
mbed_official 87:085cde657901 1057 * @param pPlainData: Pointer to the plaintext buffer
mbed_official 87:085cde657901 1058 * @param Size: Length of the plaintext buffer, must be a multiple of 16
mbed_official 87:085cde657901 1059 * @param pCypherData: Pointer to the cyphertext buffer
mbed_official 87:085cde657901 1060 * @retval HAL status
mbed_official 87:085cde657901 1061 */
mbed_official 87:085cde657901 1062 HAL_StatusTypeDef HAL_CRYPEx_AESGCM_Encrypt_IT(CRYP_HandleTypeDef *hcryp, uint8_t *pPlainData, uint16_t Size, uint8_t *pCypherData)
mbed_official 87:085cde657901 1063 {
mbed_official 87:085cde657901 1064 uint32_t timeout = 0;
mbed_official 87:085cde657901 1065 uint32_t inputaddr;
mbed_official 87:085cde657901 1066 uint32_t outputaddr;
mbed_official 87:085cde657901 1067
mbed_official 87:085cde657901 1068 if(hcryp->State == HAL_CRYP_STATE_READY)
mbed_official 87:085cde657901 1069 {
mbed_official 87:085cde657901 1070 /* Process Locked */
mbed_official 87:085cde657901 1071 __HAL_LOCK(hcryp);
mbed_official 87:085cde657901 1072
mbed_official 87:085cde657901 1073 /* Get the buffer addresses and sizes */
mbed_official 87:085cde657901 1074 hcryp->CrypInCount = Size;
mbed_official 87:085cde657901 1075 hcryp->pCrypInBuffPtr = pPlainData;
mbed_official 87:085cde657901 1076 hcryp->pCrypOutBuffPtr = pCypherData;
mbed_official 87:085cde657901 1077 hcryp->CrypOutCount = Size;
mbed_official 87:085cde657901 1078
mbed_official 87:085cde657901 1079 /* Change the CRYP peripheral state */
mbed_official 87:085cde657901 1080 hcryp->State = HAL_CRYP_STATE_BUSY;
mbed_official 87:085cde657901 1081
mbed_official 87:085cde657901 1082 /* Check if initialization phase has already been performed */
mbed_official 87:085cde657901 1083 if(hcryp->Phase == HAL_CRYP_PHASE_READY)
mbed_official 87:085cde657901 1084 {
mbed_official 87:085cde657901 1085 /* Set the key */
mbed_official 87:085cde657901 1086 CRYPEx_GCMCCM_SetKey(hcryp, hcryp->Init.pKey, hcryp->Init.KeySize);
mbed_official 87:085cde657901 1087
mbed_official 87:085cde657901 1088 /* Set the CRYP peripheral in AES GCM mode */
mbed_official 87:085cde657901 1089 __HAL_CRYP_SET_MODE(CRYP_CR_ALGOMODE_AES_GCM_ENCRYPT);
mbed_official 87:085cde657901 1090
mbed_official 87:085cde657901 1091 /* Set the Initialization Vector */
mbed_official 87:085cde657901 1092 CRYPEx_GCMCCM_SetInitVector(hcryp, hcryp->Init.pInitVect, CRYP_KEYSIZE_128B);
mbed_official 87:085cde657901 1093
mbed_official 87:085cde657901 1094 /* Flush FIFO */
mbed_official 87:085cde657901 1095 __HAL_CRYP_FIFO_FLUSH();
mbed_official 87:085cde657901 1096
mbed_official 87:085cde657901 1097 /* Enable CRYP to start the init phase */
mbed_official 87:085cde657901 1098 __HAL_CRYP_ENABLE();
mbed_official 87:085cde657901 1099
mbed_official 87:085cde657901 1100 /* Get timeout */
mbed_official 87:085cde657901 1101 timeout = HAL_GetTick() + 1;
mbed_official 87:085cde657901 1102
mbed_official 87:085cde657901 1103 while((CRYP->CR & CRYP_CR_CRYPEN) == CRYP_CR_CRYPEN)
mbed_official 87:085cde657901 1104 {
mbed_official 87:085cde657901 1105 /* Check for the Timeout */
mbed_official 87:085cde657901 1106
mbed_official 87:085cde657901 1107 if(HAL_GetTick() >= timeout)
mbed_official 87:085cde657901 1108 {
mbed_official 87:085cde657901 1109 /* Change state */
mbed_official 87:085cde657901 1110 hcryp->State = HAL_CRYP_STATE_TIMEOUT;
mbed_official 87:085cde657901 1111
mbed_official 87:085cde657901 1112 /* Process Unlocked */
mbed_official 87:085cde657901 1113 __HAL_UNLOCK(hcryp);
mbed_official 87:085cde657901 1114
mbed_official 87:085cde657901 1115 return HAL_TIMEOUT;
mbed_official 87:085cde657901 1116
mbed_official 87:085cde657901 1117 }
mbed_official 87:085cde657901 1118 }
mbed_official 87:085cde657901 1119
mbed_official 87:085cde657901 1120 /* Set the header phase */
mbed_official 87:085cde657901 1121 if(CRYPEx_GCMCCM_SetHeaderPhase(hcryp, hcryp->Init.Header, hcryp->Init.HeaderSize, 1) != HAL_OK)
mbed_official 87:085cde657901 1122 {
mbed_official 87:085cde657901 1123 return HAL_TIMEOUT;
mbed_official 87:085cde657901 1124 }
mbed_official 87:085cde657901 1125 /* Disable the CRYP peripheral */
mbed_official 87:085cde657901 1126 __HAL_CRYP_DISABLE();
mbed_official 87:085cde657901 1127
mbed_official 87:085cde657901 1128 /* Select payload phase once the header phase is performed */
mbed_official 87:085cde657901 1129 __HAL_CRYP_SET_PHASE(CRYP_PHASE_PAYLOAD);
mbed_official 87:085cde657901 1130
mbed_official 87:085cde657901 1131 /* Flush FIFO */
mbed_official 87:085cde657901 1132 __HAL_CRYP_FIFO_FLUSH();
mbed_official 87:085cde657901 1133
mbed_official 87:085cde657901 1134 /* Set the phase */
mbed_official 87:085cde657901 1135 hcryp->Phase = HAL_CRYP_PHASE_PROCESS;
mbed_official 87:085cde657901 1136 }
mbed_official 87:085cde657901 1137
mbed_official 87:085cde657901 1138 if(Size != 0)
mbed_official 87:085cde657901 1139 {
mbed_official 87:085cde657901 1140 /* Enable Interrupts */
mbed_official 87:085cde657901 1141 __HAL_CRYP_ENABLE_IT(CRYP_IT_INI | CRYP_IT_OUTI);
mbed_official 87:085cde657901 1142 /* Enable the CRYP peripheral */
mbed_official 87:085cde657901 1143 __HAL_CRYP_ENABLE();
mbed_official 87:085cde657901 1144 }
mbed_official 87:085cde657901 1145 else
mbed_official 87:085cde657901 1146 {
mbed_official 87:085cde657901 1147 /* Process Locked */
mbed_official 87:085cde657901 1148 __HAL_UNLOCK(hcryp);
mbed_official 87:085cde657901 1149 /* Change the CRYP state and phase */
mbed_official 87:085cde657901 1150 hcryp->State = HAL_CRYP_STATE_READY;
mbed_official 87:085cde657901 1151 }
mbed_official 87:085cde657901 1152 /* Return function status */
mbed_official 87:085cde657901 1153 return HAL_OK;
mbed_official 87:085cde657901 1154 }
mbed_official 87:085cde657901 1155 else if (__HAL_CRYP_GET_IT(CRYP_IT_INI))
mbed_official 87:085cde657901 1156 {
mbed_official 87:085cde657901 1157 inputaddr = (uint32_t)hcryp->pCrypInBuffPtr;
mbed_official 87:085cde657901 1158 /* Write the Input block in the IN FIFO */
mbed_official 87:085cde657901 1159 CRYP->DR = *(uint32_t*)(inputaddr);
mbed_official 87:085cde657901 1160 inputaddr+=4;
mbed_official 87:085cde657901 1161 CRYP->DR = *(uint32_t*)(inputaddr);
mbed_official 87:085cde657901 1162 inputaddr+=4;
mbed_official 87:085cde657901 1163 CRYP->DR = *(uint32_t*)(inputaddr);
mbed_official 87:085cde657901 1164 inputaddr+=4;
mbed_official 87:085cde657901 1165 CRYP->DR = *(uint32_t*)(inputaddr);
mbed_official 87:085cde657901 1166 hcryp->pCrypInBuffPtr += 16;
mbed_official 87:085cde657901 1167 hcryp->CrypInCount -= 16;
mbed_official 87:085cde657901 1168 if(hcryp->CrypInCount == 0)
mbed_official 87:085cde657901 1169 {
mbed_official 87:085cde657901 1170 __HAL_CRYP_DISABLE_IT(CRYP_IT_INI);
mbed_official 87:085cde657901 1171 /* Call the Input data transfer complete callback */
mbed_official 87:085cde657901 1172 HAL_CRYP_InCpltCallback(hcryp);
mbed_official 87:085cde657901 1173 }
mbed_official 87:085cde657901 1174 }
mbed_official 87:085cde657901 1175 else if (__HAL_CRYP_GET_IT(CRYP_IT_OUTI))
mbed_official 87:085cde657901 1176 {
mbed_official 87:085cde657901 1177 outputaddr = (uint32_t)hcryp->pCrypOutBuffPtr;
mbed_official 87:085cde657901 1178 /* Read the Output block from the Output FIFO */
mbed_official 87:085cde657901 1179 *(uint32_t*)(outputaddr) = CRYP->DOUT;
mbed_official 87:085cde657901 1180 outputaddr+=4;
mbed_official 87:085cde657901 1181 *(uint32_t*)(outputaddr) = CRYP->DOUT;
mbed_official 87:085cde657901 1182 outputaddr+=4;
mbed_official 87:085cde657901 1183 *(uint32_t*)(outputaddr) = CRYP->DOUT;
mbed_official 87:085cde657901 1184 outputaddr+=4;
mbed_official 87:085cde657901 1185 *(uint32_t*)(outputaddr) = CRYP->DOUT;
mbed_official 87:085cde657901 1186 hcryp->pCrypOutBuffPtr += 16;
mbed_official 87:085cde657901 1187 hcryp->CrypOutCount -= 16;
mbed_official 87:085cde657901 1188 if(hcryp->CrypOutCount == 0)
mbed_official 87:085cde657901 1189 {
mbed_official 87:085cde657901 1190 __HAL_CRYP_DISABLE_IT(CRYP_IT_OUTI);
mbed_official 87:085cde657901 1191 /* Process Unlocked */
mbed_official 87:085cde657901 1192 __HAL_UNLOCK(hcryp);
mbed_official 87:085cde657901 1193 /* Change the CRYP peripheral state */
mbed_official 87:085cde657901 1194 hcryp->State = HAL_CRYP_STATE_READY;
mbed_official 87:085cde657901 1195 /* Call Input transfer complete callback */
mbed_official 87:085cde657901 1196 HAL_CRYP_OutCpltCallback(hcryp);
mbed_official 87:085cde657901 1197 }
mbed_official 87:085cde657901 1198 }
mbed_official 87:085cde657901 1199
mbed_official 87:085cde657901 1200 /* Return function status */
mbed_official 87:085cde657901 1201 return HAL_OK;
mbed_official 87:085cde657901 1202 }
mbed_official 87:085cde657901 1203
mbed_official 87:085cde657901 1204 /**
mbed_official 87:085cde657901 1205 * @brief Initializes the CRYP peripheral in AES CCM encryption mode using interrupt.
mbed_official 226:b062af740e40 1206 * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
mbed_official 226:b062af740e40 1207 * the configuration information for CRYP module
mbed_official 87:085cde657901 1208 * @param pPlainData: Pointer to the plaintext buffer
mbed_official 87:085cde657901 1209 * @param Size: Length of the plaintext buffer, must be a multiple of 16
mbed_official 87:085cde657901 1210 * @param pCypherData: Pointer to the cyphertext buffer
mbed_official 87:085cde657901 1211 * @retval HAL status
mbed_official 87:085cde657901 1212 */
mbed_official 87:085cde657901 1213 HAL_StatusTypeDef HAL_CRYPEx_AESCCM_Encrypt_IT(CRYP_HandleTypeDef *hcryp, uint8_t *pPlainData, uint16_t Size, uint8_t *pCypherData)
mbed_official 87:085cde657901 1214 {
mbed_official 87:085cde657901 1215 uint32_t timeout = 0;
mbed_official 87:085cde657901 1216 uint32_t inputaddr;
mbed_official 87:085cde657901 1217 uint32_t outputaddr;
mbed_official 87:085cde657901 1218
mbed_official 87:085cde657901 1219 uint32_t headersize = hcryp->Init.HeaderSize;
mbed_official 87:085cde657901 1220 uint32_t headeraddr = (uint32_t)hcryp->Init.Header;
mbed_official 87:085cde657901 1221 uint32_t loopcounter = 0;
mbed_official 87:085cde657901 1222 uint32_t bufferidx = 0;
mbed_official 87:085cde657901 1223 uint8_t blockb0[16] = {0};/* Block B0 */
mbed_official 87:085cde657901 1224 uint8_t ctr[16] = {0}; /* Counter */
mbed_official 87:085cde657901 1225 uint32_t b0addr = (uint32_t)blockb0;
mbed_official 87:085cde657901 1226
mbed_official 87:085cde657901 1227 if(hcryp->State == HAL_CRYP_STATE_READY)
mbed_official 87:085cde657901 1228 {
mbed_official 87:085cde657901 1229 /* Process Locked */
mbed_official 87:085cde657901 1230 __HAL_LOCK(hcryp);
mbed_official 87:085cde657901 1231
mbed_official 87:085cde657901 1232 hcryp->CrypInCount = Size;
mbed_official 87:085cde657901 1233 hcryp->pCrypInBuffPtr = pPlainData;
mbed_official 87:085cde657901 1234 hcryp->pCrypOutBuffPtr = pCypherData;
mbed_official 87:085cde657901 1235 hcryp->CrypOutCount = Size;
mbed_official 87:085cde657901 1236
mbed_official 87:085cde657901 1237 /* Change the CRYP peripheral state */
mbed_official 87:085cde657901 1238 hcryp->State = HAL_CRYP_STATE_BUSY;
mbed_official 87:085cde657901 1239
mbed_official 87:085cde657901 1240 /* Check if initialization phase has already been performed */
mbed_official 87:085cde657901 1241 if(hcryp->Phase == HAL_CRYP_PHASE_READY)
mbed_official 87:085cde657901 1242 {
mbed_official 87:085cde657901 1243 /************************ Formatting the header block *******************/
mbed_official 87:085cde657901 1244 if(headersize != 0)
mbed_official 87:085cde657901 1245 {
mbed_official 87:085cde657901 1246 /* Check that the associated data (or header) length is lower than 2^16 - 2^8 = 65536 - 256 = 65280 */
mbed_official 87:085cde657901 1247 if(headersize < 65280)
mbed_official 87:085cde657901 1248 {
mbed_official 87:085cde657901 1249 hcryp->Init.pScratch[bufferidx++] = (uint8_t) ((headersize >> 8) & 0xFF);
mbed_official 87:085cde657901 1250 hcryp->Init.pScratch[bufferidx++] = (uint8_t) ((headersize) & 0xFF);
mbed_official 87:085cde657901 1251 headersize += 2;
mbed_official 87:085cde657901 1252 }
mbed_official 87:085cde657901 1253 else
mbed_official 87:085cde657901 1254 {
mbed_official 87:085cde657901 1255 /* Header is encoded as 0xff || 0xfe || [headersize]32, i.e., six octets */
mbed_official 87:085cde657901 1256 hcryp->Init.pScratch[bufferidx++] = 0xFF;
mbed_official 87:085cde657901 1257 hcryp->Init.pScratch[bufferidx++] = 0xFE;
mbed_official 87:085cde657901 1258 hcryp->Init.pScratch[bufferidx++] = headersize & 0xff000000;
mbed_official 87:085cde657901 1259 hcryp->Init.pScratch[bufferidx++] = headersize & 0x00ff0000;
mbed_official 87:085cde657901 1260 hcryp->Init.pScratch[bufferidx++] = headersize & 0x0000ff00;
mbed_official 87:085cde657901 1261 hcryp->Init.pScratch[bufferidx++] = headersize & 0x000000ff;
mbed_official 87:085cde657901 1262 headersize += 6;
mbed_official 87:085cde657901 1263 }
mbed_official 87:085cde657901 1264 /* Copy the header buffer in internal buffer "hcryp->Init.pScratch" */
mbed_official 87:085cde657901 1265 for(loopcounter = 0; loopcounter < headersize; loopcounter++)
mbed_official 87:085cde657901 1266 {
mbed_official 87:085cde657901 1267 hcryp->Init.pScratch[bufferidx++] = hcryp->Init.Header[loopcounter];
mbed_official 87:085cde657901 1268 }
mbed_official 87:085cde657901 1269 /* Check if the header size is modulo 16 */
mbed_official 87:085cde657901 1270 if ((headersize % 16) != 0)
mbed_official 87:085cde657901 1271 {
mbed_official 87:085cde657901 1272 /* Padd the header buffer with 0s till the hcryp->Init.pScratch length is modulo 16 */
mbed_official 87:085cde657901 1273 for(loopcounter = headersize; loopcounter <= ((headersize/16) + 1) * 16; loopcounter++)
mbed_official 87:085cde657901 1274 {
mbed_official 87:085cde657901 1275 hcryp->Init.pScratch[loopcounter] = 0;
mbed_official 87:085cde657901 1276 }
mbed_official 87:085cde657901 1277 /* Set the header size to modulo 16 */
mbed_official 87:085cde657901 1278 headersize = ((headersize/16) + 1) * 16;
mbed_official 87:085cde657901 1279 }
mbed_official 87:085cde657901 1280 /* Set the pointer headeraddr to hcryp->Init.pScratch */
mbed_official 87:085cde657901 1281 headeraddr = (uint32_t)hcryp->Init.pScratch;
mbed_official 87:085cde657901 1282 }
mbed_official 87:085cde657901 1283 /*********************** Formatting the block B0 ************************/
mbed_official 87:085cde657901 1284 if(headersize != 0)
mbed_official 87:085cde657901 1285 {
mbed_official 87:085cde657901 1286 blockb0[0] = 0x40;
mbed_official 87:085cde657901 1287 }
mbed_official 87:085cde657901 1288 /* Flags byte */
mbed_official 87:085cde657901 1289 /* blockb0[0] |= 0u | (((( (uint8_t) hcryp->Init.TagSize - 2) / 2) & 0x07 ) << 3 ) | ( ( (uint8_t) (15 - hcryp->Init.IVSize) - 1) & 0x07) */
mbed_official 87:085cde657901 1290 blockb0[0] |= (uint8_t)((uint8_t)((uint8_t)(((uint8_t)(hcryp->Init.TagSize - (uint8_t)(2))) >> 1) & (uint8_t)0x07 ) << 3);
mbed_official 87:085cde657901 1291 blockb0[0] |= (uint8_t)((uint8_t)((uint8_t)((uint8_t)(15) - hcryp->Init.IVSize) - (uint8_t)1) & (uint8_t)0x07);
mbed_official 87:085cde657901 1292
mbed_official 87:085cde657901 1293 for (loopcounter = 0; loopcounter < hcryp->Init.IVSize; loopcounter++)
mbed_official 87:085cde657901 1294 {
mbed_official 87:085cde657901 1295 blockb0[loopcounter+1] = hcryp->Init.pInitVect[loopcounter];
mbed_official 87:085cde657901 1296 }
mbed_official 87:085cde657901 1297 for ( ; loopcounter < 13; loopcounter++)
mbed_official 87:085cde657901 1298 {
mbed_official 87:085cde657901 1299 blockb0[loopcounter+1] = 0;
mbed_official 87:085cde657901 1300 }
mbed_official 87:085cde657901 1301
mbed_official 87:085cde657901 1302 blockb0[14] = (Size >> 8);
mbed_official 87:085cde657901 1303 blockb0[15] = (Size & 0xFF);
mbed_official 87:085cde657901 1304
mbed_official 87:085cde657901 1305 /************************* Formatting the initial counter ***************/
mbed_official 87:085cde657901 1306 /* Byte 0:
mbed_official 87:085cde657901 1307 Bits 7 and 6 are reserved and shall be set to 0
mbed_official 87:085cde657901 1308 Bits 3, 4, and 5 shall also be set to 0, to ensure that all the counter
mbed_official 87:085cde657901 1309 blocks are distinct from B0
mbed_official 87:085cde657901 1310 Bits 0, 1, and 2 contain the same encoding of q as in B0
mbed_official 87:085cde657901 1311 */
mbed_official 87:085cde657901 1312 ctr[0] = blockb0[0] & 0x07;
mbed_official 87:085cde657901 1313 /* byte 1 to NonceSize is the IV (Nonce) */
mbed_official 87:085cde657901 1314 for(loopcounter = 1; loopcounter < hcryp->Init.IVSize + 1; loopcounter++)
mbed_official 87:085cde657901 1315 {
mbed_official 87:085cde657901 1316 ctr[loopcounter] = blockb0[loopcounter];
mbed_official 87:085cde657901 1317 }
mbed_official 87:085cde657901 1318 /* Set the LSB to 1 */
mbed_official 87:085cde657901 1319 ctr[15] |= 0x01;
mbed_official 87:085cde657901 1320
mbed_official 87:085cde657901 1321 /* Set the key */
mbed_official 87:085cde657901 1322 CRYPEx_GCMCCM_SetKey(hcryp, hcryp->Init.pKey, hcryp->Init.KeySize);
mbed_official 87:085cde657901 1323
mbed_official 87:085cde657901 1324 /* Set the CRYP peripheral in AES CCM mode */
mbed_official 87:085cde657901 1325 __HAL_CRYP_SET_MODE(CRYP_CR_ALGOMODE_AES_CCM_ENCRYPT);
mbed_official 87:085cde657901 1326
mbed_official 87:085cde657901 1327 /* Set the Initialization Vector */
mbed_official 87:085cde657901 1328 CRYPEx_GCMCCM_SetInitVector(hcryp, ctr, hcryp->Init.KeySize);
mbed_official 87:085cde657901 1329
mbed_official 87:085cde657901 1330 /* Select init phase */
mbed_official 87:085cde657901 1331 __HAL_CRYP_SET_PHASE(CRYP_PHASE_INIT);
mbed_official 87:085cde657901 1332
mbed_official 87:085cde657901 1333 b0addr = (uint32_t)blockb0;
mbed_official 87:085cde657901 1334 /* Write the blockb0 block in the IN FIFO */
mbed_official 87:085cde657901 1335 CRYP->DR = *(uint32_t*)(b0addr);
mbed_official 87:085cde657901 1336 b0addr+=4;
mbed_official 87:085cde657901 1337 CRYP->DR = *(uint32_t*)(b0addr);
mbed_official 87:085cde657901 1338 b0addr+=4;
mbed_official 87:085cde657901 1339 CRYP->DR = *(uint32_t*)(b0addr);
mbed_official 87:085cde657901 1340 b0addr+=4;
mbed_official 87:085cde657901 1341 CRYP->DR = *(uint32_t*)(b0addr);
mbed_official 87:085cde657901 1342
mbed_official 87:085cde657901 1343 /* Enable the CRYP peripheral */
mbed_official 87:085cde657901 1344 __HAL_CRYP_ENABLE();
mbed_official 87:085cde657901 1345
mbed_official 87:085cde657901 1346 /* Get timeout */
mbed_official 87:085cde657901 1347 timeout = HAL_GetTick() + 1;
mbed_official 87:085cde657901 1348
mbed_official 87:085cde657901 1349 while((CRYP->CR & CRYP_CR_CRYPEN) == CRYP_CR_CRYPEN)
mbed_official 87:085cde657901 1350 {
mbed_official 87:085cde657901 1351 /* Check for the Timeout */
mbed_official 87:085cde657901 1352 if(HAL_GetTick() >= timeout)
mbed_official 87:085cde657901 1353 {
mbed_official 87:085cde657901 1354 /* Change state */
mbed_official 87:085cde657901 1355 hcryp->State = HAL_CRYP_STATE_TIMEOUT;
mbed_official 87:085cde657901 1356
mbed_official 87:085cde657901 1357 /* Process Unlocked */
mbed_official 87:085cde657901 1358 __HAL_UNLOCK(hcryp);
mbed_official 87:085cde657901 1359
mbed_official 87:085cde657901 1360 return HAL_TIMEOUT;
mbed_official 87:085cde657901 1361 }
mbed_official 87:085cde657901 1362 }
mbed_official 87:085cde657901 1363 /***************************** Header phase *****************************/
mbed_official 87:085cde657901 1364 if(headersize != 0)
mbed_official 87:085cde657901 1365 {
mbed_official 87:085cde657901 1366 /* Select header phase */
mbed_official 87:085cde657901 1367 __HAL_CRYP_SET_PHASE(CRYP_PHASE_HEADER);
mbed_official 87:085cde657901 1368
mbed_official 87:085cde657901 1369 /* Enable Crypto processor */
mbed_official 87:085cde657901 1370 __HAL_CRYP_ENABLE();
mbed_official 87:085cde657901 1371
mbed_official 87:085cde657901 1372 for(loopcounter = 0; (loopcounter < headersize); loopcounter+=16)
mbed_official 87:085cde657901 1373 {
mbed_official 87:085cde657901 1374 /* Get timeout */
mbed_official 87:085cde657901 1375 timeout = HAL_GetTick() + 1;
mbed_official 87:085cde657901 1376
mbed_official 87:085cde657901 1377 while(HAL_IS_BIT_CLR(CRYP->SR, CRYP_FLAG_IFEM))
mbed_official 87:085cde657901 1378 {
mbed_official 87:085cde657901 1379 /* Check for the Timeout */
mbed_official 87:085cde657901 1380 if(HAL_GetTick() >= timeout)
mbed_official 87:085cde657901 1381 {
mbed_official 87:085cde657901 1382 /* Change state */
mbed_official 87:085cde657901 1383 hcryp->State = HAL_CRYP_STATE_TIMEOUT;
mbed_official 87:085cde657901 1384
mbed_official 87:085cde657901 1385 /* Process Unlocked */
mbed_official 87:085cde657901 1386 __HAL_UNLOCK(hcryp);
mbed_official 87:085cde657901 1387
mbed_official 87:085cde657901 1388 return HAL_TIMEOUT;
mbed_official 87:085cde657901 1389 }
mbed_official 87:085cde657901 1390 }
mbed_official 87:085cde657901 1391 /* Write the header block in the IN FIFO */
mbed_official 87:085cde657901 1392 CRYP->DR = *(uint32_t*)(headeraddr);
mbed_official 87:085cde657901 1393 headeraddr+=4;
mbed_official 87:085cde657901 1394 CRYP->DR = *(uint32_t*)(headeraddr);
mbed_official 87:085cde657901 1395 headeraddr+=4;
mbed_official 87:085cde657901 1396 CRYP->DR = *(uint32_t*)(headeraddr);
mbed_official 87:085cde657901 1397 headeraddr+=4;
mbed_official 87:085cde657901 1398 CRYP->DR = *(uint32_t*)(headeraddr);
mbed_official 87:085cde657901 1399 headeraddr+=4;
mbed_official 87:085cde657901 1400 }
mbed_official 87:085cde657901 1401
mbed_official 87:085cde657901 1402 /* Get timeout */
mbed_official 87:085cde657901 1403 timeout = HAL_GetTick() + 1;
mbed_official 87:085cde657901 1404
mbed_official 87:085cde657901 1405 while((CRYP->SR & CRYP_FLAG_BUSY) == CRYP_FLAG_BUSY)
mbed_official 87:085cde657901 1406 {
mbed_official 87:085cde657901 1407 /* Check for the Timeout */
mbed_official 87:085cde657901 1408 if(HAL_GetTick() >= timeout)
mbed_official 87:085cde657901 1409 {
mbed_official 87:085cde657901 1410 /* Change state */
mbed_official 87:085cde657901 1411 hcryp->State = HAL_CRYP_STATE_TIMEOUT;
mbed_official 87:085cde657901 1412
mbed_official 87:085cde657901 1413 /* Process Unlocked */
mbed_official 87:085cde657901 1414 __HAL_UNLOCK(hcryp);
mbed_official 87:085cde657901 1415
mbed_official 87:085cde657901 1416 return HAL_TIMEOUT;
mbed_official 87:085cde657901 1417 }
mbed_official 87:085cde657901 1418 }
mbed_official 87:085cde657901 1419 }
mbed_official 87:085cde657901 1420 /* Save formatted counter into the scratch buffer pScratch */
mbed_official 87:085cde657901 1421 for(loopcounter = 0; (loopcounter < 16); loopcounter++)
mbed_official 87:085cde657901 1422 {
mbed_official 87:085cde657901 1423 hcryp->Init.pScratch[loopcounter] = ctr[loopcounter];
mbed_official 87:085cde657901 1424 }
mbed_official 87:085cde657901 1425 /* Reset bit 0 */
mbed_official 87:085cde657901 1426 hcryp->Init.pScratch[15] &= 0xfe;
mbed_official 87:085cde657901 1427
mbed_official 87:085cde657901 1428 /* Select payload phase once the header phase is performed */
mbed_official 87:085cde657901 1429 __HAL_CRYP_SET_PHASE(CRYP_PHASE_PAYLOAD);
mbed_official 87:085cde657901 1430
mbed_official 87:085cde657901 1431 /* Flush FIFO */
mbed_official 87:085cde657901 1432 __HAL_CRYP_FIFO_FLUSH();
mbed_official 87:085cde657901 1433
mbed_official 87:085cde657901 1434 /* Set the phase */
mbed_official 87:085cde657901 1435 hcryp->Phase = HAL_CRYP_PHASE_PROCESS;
mbed_official 87:085cde657901 1436 }
mbed_official 87:085cde657901 1437
mbed_official 87:085cde657901 1438 if(Size != 0)
mbed_official 87:085cde657901 1439 {
mbed_official 87:085cde657901 1440 /* Enable Interrupts */
mbed_official 87:085cde657901 1441 __HAL_CRYP_ENABLE_IT(CRYP_IT_INI | CRYP_IT_OUTI);
mbed_official 87:085cde657901 1442 /* Enable the CRYP peripheral */
mbed_official 87:085cde657901 1443 __HAL_CRYP_ENABLE();
mbed_official 87:085cde657901 1444 }
mbed_official 87:085cde657901 1445 else
mbed_official 87:085cde657901 1446 {
mbed_official 87:085cde657901 1447 /* Change the CRYP state and phase */
mbed_official 87:085cde657901 1448 hcryp->State = HAL_CRYP_STATE_READY;
mbed_official 87:085cde657901 1449 }
mbed_official 87:085cde657901 1450
mbed_official 87:085cde657901 1451 /* Return function status */
mbed_official 87:085cde657901 1452 return HAL_OK;
mbed_official 87:085cde657901 1453 }
mbed_official 87:085cde657901 1454 else if (__HAL_CRYP_GET_IT(CRYP_IT_INI))
mbed_official 87:085cde657901 1455 {
mbed_official 87:085cde657901 1456 inputaddr = (uint32_t)hcryp->pCrypInBuffPtr;
mbed_official 87:085cde657901 1457 /* Write the Input block in the IN FIFO */
mbed_official 87:085cde657901 1458 CRYP->DR = *(uint32_t*)(inputaddr);
mbed_official 87:085cde657901 1459 inputaddr+=4;
mbed_official 87:085cde657901 1460 CRYP->DR = *(uint32_t*)(inputaddr);
mbed_official 87:085cde657901 1461 inputaddr+=4;
mbed_official 87:085cde657901 1462 CRYP->DR = *(uint32_t*)(inputaddr);
mbed_official 87:085cde657901 1463 inputaddr+=4;
mbed_official 87:085cde657901 1464 CRYP->DR = *(uint32_t*)(inputaddr);
mbed_official 87:085cde657901 1465 hcryp->pCrypInBuffPtr += 16;
mbed_official 87:085cde657901 1466 hcryp->CrypInCount -= 16;
mbed_official 87:085cde657901 1467 if(hcryp->CrypInCount == 0)
mbed_official 87:085cde657901 1468 {
mbed_official 87:085cde657901 1469 __HAL_CRYP_DISABLE_IT(CRYP_IT_INI);
mbed_official 87:085cde657901 1470 /* Call Input transfer complete callback */
mbed_official 87:085cde657901 1471 HAL_CRYP_InCpltCallback(hcryp);
mbed_official 87:085cde657901 1472 }
mbed_official 87:085cde657901 1473 }
mbed_official 87:085cde657901 1474 else if (__HAL_CRYP_GET_IT(CRYP_IT_OUTI))
mbed_official 87:085cde657901 1475 {
mbed_official 87:085cde657901 1476 outputaddr = (uint32_t)hcryp->pCrypOutBuffPtr;
mbed_official 87:085cde657901 1477 /* Read the Output block from the Output FIFO */
mbed_official 87:085cde657901 1478 *(uint32_t*)(outputaddr) = CRYP->DOUT;
mbed_official 87:085cde657901 1479 outputaddr+=4;
mbed_official 87:085cde657901 1480 *(uint32_t*)(outputaddr) = CRYP->DOUT;
mbed_official 87:085cde657901 1481 outputaddr+=4;
mbed_official 87:085cde657901 1482 *(uint32_t*)(outputaddr) = CRYP->DOUT;
mbed_official 87:085cde657901 1483 outputaddr+=4;
mbed_official 87:085cde657901 1484 *(uint32_t*)(outputaddr) = CRYP->DOUT;
mbed_official 87:085cde657901 1485 hcryp->pCrypOutBuffPtr += 16;
mbed_official 87:085cde657901 1486 hcryp->CrypOutCount -= 16;
mbed_official 87:085cde657901 1487 if(hcryp->CrypOutCount == 0)
mbed_official 87:085cde657901 1488 {
mbed_official 87:085cde657901 1489 __HAL_CRYP_DISABLE_IT(CRYP_IT_OUTI);
mbed_official 87:085cde657901 1490 /* Process Unlocked */
mbed_official 87:085cde657901 1491 __HAL_UNLOCK(hcryp);
mbed_official 87:085cde657901 1492 /* Change the CRYP peripheral state */
mbed_official 87:085cde657901 1493 hcryp->State = HAL_CRYP_STATE_READY;
mbed_official 87:085cde657901 1494 /* Call Input transfer complete callback */
mbed_official 87:085cde657901 1495 HAL_CRYP_OutCpltCallback(hcryp);
mbed_official 87:085cde657901 1496 }
mbed_official 87:085cde657901 1497 }
mbed_official 87:085cde657901 1498
mbed_official 87:085cde657901 1499 /* Return function status */
mbed_official 87:085cde657901 1500 return HAL_OK;
mbed_official 87:085cde657901 1501 }
mbed_official 87:085cde657901 1502
mbed_official 87:085cde657901 1503 /**
mbed_official 87:085cde657901 1504 * @brief Initializes the CRYP peripheral in AES GCM decryption mode using IT.
mbed_official 226:b062af740e40 1505 * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
mbed_official 226:b062af740e40 1506 * the configuration information for CRYP module
mbed_official 87:085cde657901 1507 * @param pCypherData: Pointer to the cyphertext buffer
mbed_official 87:085cde657901 1508 * @param Size: Length of the cyphertext buffer, must be a multiple of 16
mbed_official 87:085cde657901 1509 * @param pPlainData: Pointer to the plaintext buffer
mbed_official 87:085cde657901 1510 * @retval HAL status
mbed_official 87:085cde657901 1511 */
mbed_official 87:085cde657901 1512 HAL_StatusTypeDef HAL_CRYPEx_AESGCM_Decrypt_IT(CRYP_HandleTypeDef *hcryp, uint8_t *pCypherData, uint16_t Size, uint8_t *pPlainData)
mbed_official 87:085cde657901 1513 {
mbed_official 87:085cde657901 1514 uint32_t timeout = 0;
mbed_official 87:085cde657901 1515 uint32_t inputaddr;
mbed_official 87:085cde657901 1516 uint32_t outputaddr;
mbed_official 87:085cde657901 1517
mbed_official 87:085cde657901 1518 if(hcryp->State == HAL_CRYP_STATE_READY)
mbed_official 87:085cde657901 1519 {
mbed_official 87:085cde657901 1520 /* Process Locked */
mbed_official 87:085cde657901 1521 __HAL_LOCK(hcryp);
mbed_official 87:085cde657901 1522
mbed_official 87:085cde657901 1523 /* Get the buffer addresses and sizes */
mbed_official 87:085cde657901 1524 hcryp->CrypInCount = Size;
mbed_official 87:085cde657901 1525 hcryp->pCrypInBuffPtr = pCypherData;
mbed_official 87:085cde657901 1526 hcryp->pCrypOutBuffPtr = pPlainData;
mbed_official 87:085cde657901 1527 hcryp->CrypOutCount = Size;
mbed_official 87:085cde657901 1528
mbed_official 87:085cde657901 1529 /* Change the CRYP peripheral state */
mbed_official 87:085cde657901 1530 hcryp->State = HAL_CRYP_STATE_BUSY;
mbed_official 87:085cde657901 1531
mbed_official 87:085cde657901 1532 /* Check if initialization phase has already been performed */
mbed_official 87:085cde657901 1533 if(hcryp->Phase == HAL_CRYP_PHASE_READY)
mbed_official 87:085cde657901 1534 {
mbed_official 87:085cde657901 1535 /* Set the key */
mbed_official 87:085cde657901 1536 CRYPEx_GCMCCM_SetKey(hcryp, hcryp->Init.pKey, hcryp->Init.KeySize);
mbed_official 87:085cde657901 1537
mbed_official 87:085cde657901 1538 /* Set the CRYP peripheral in AES GCM decryption mode */
mbed_official 87:085cde657901 1539 __HAL_CRYP_SET_MODE(CRYP_CR_ALGOMODE_AES_GCM_DECRYPT);
mbed_official 87:085cde657901 1540
mbed_official 87:085cde657901 1541 /* Set the Initialization Vector */
mbed_official 87:085cde657901 1542 CRYPEx_GCMCCM_SetInitVector(hcryp, hcryp->Init.pInitVect, CRYP_KEYSIZE_128B);
mbed_official 87:085cde657901 1543
mbed_official 87:085cde657901 1544 /* Flush FIFO */
mbed_official 87:085cde657901 1545 __HAL_CRYP_FIFO_FLUSH();
mbed_official 87:085cde657901 1546
mbed_official 87:085cde657901 1547 /* Enable CRYP to start the init phase */
mbed_official 87:085cde657901 1548 __HAL_CRYP_ENABLE();
mbed_official 87:085cde657901 1549
mbed_official 87:085cde657901 1550 /* Get timeout */
mbed_official 87:085cde657901 1551 timeout = HAL_GetTick() + 1;
mbed_official 87:085cde657901 1552
mbed_official 87:085cde657901 1553 while((CRYP->CR & CRYP_CR_CRYPEN) == CRYP_CR_CRYPEN)
mbed_official 87:085cde657901 1554 {
mbed_official 87:085cde657901 1555 /* Check for the Timeout */
mbed_official 87:085cde657901 1556 if(HAL_GetTick() >= timeout)
mbed_official 87:085cde657901 1557 {
mbed_official 87:085cde657901 1558 /* Change state */
mbed_official 87:085cde657901 1559 hcryp->State = HAL_CRYP_STATE_TIMEOUT;
mbed_official 87:085cde657901 1560
mbed_official 87:085cde657901 1561 /* Process Unlocked */
mbed_official 87:085cde657901 1562 __HAL_UNLOCK(hcryp);
mbed_official 87:085cde657901 1563
mbed_official 87:085cde657901 1564 return HAL_TIMEOUT;
mbed_official 87:085cde657901 1565 }
mbed_official 87:085cde657901 1566 }
mbed_official 87:085cde657901 1567
mbed_official 87:085cde657901 1568 /* Set the header phase */
mbed_official 87:085cde657901 1569 if(CRYPEx_GCMCCM_SetHeaderPhase(hcryp, hcryp->Init.Header, hcryp->Init.HeaderSize, 1) != HAL_OK)
mbed_official 87:085cde657901 1570 {
mbed_official 87:085cde657901 1571 return HAL_TIMEOUT;
mbed_official 87:085cde657901 1572 }
mbed_official 87:085cde657901 1573 /* Disable the CRYP peripheral */
mbed_official 87:085cde657901 1574 __HAL_CRYP_DISABLE();
mbed_official 87:085cde657901 1575
mbed_official 87:085cde657901 1576 /* Select payload phase once the header phase is performed */
mbed_official 87:085cde657901 1577 __HAL_CRYP_SET_PHASE(CRYP_PHASE_PAYLOAD);
mbed_official 87:085cde657901 1578
mbed_official 87:085cde657901 1579 /* Set the phase */
mbed_official 87:085cde657901 1580 hcryp->Phase = HAL_CRYP_PHASE_PROCESS;
mbed_official 87:085cde657901 1581 }
mbed_official 87:085cde657901 1582
mbed_official 87:085cde657901 1583 if(Size != 0)
mbed_official 87:085cde657901 1584 {
mbed_official 87:085cde657901 1585 /* Enable Interrupts */
mbed_official 87:085cde657901 1586 __HAL_CRYP_ENABLE_IT(CRYP_IT_INI | CRYP_IT_OUTI);
mbed_official 87:085cde657901 1587 /* Enable the CRYP peripheral */
mbed_official 87:085cde657901 1588 __HAL_CRYP_ENABLE();
mbed_official 87:085cde657901 1589 }
mbed_official 87:085cde657901 1590 else
mbed_official 87:085cde657901 1591 {
mbed_official 87:085cde657901 1592 /* Process Locked */
mbed_official 87:085cde657901 1593 __HAL_UNLOCK(hcryp);
mbed_official 87:085cde657901 1594 /* Change the CRYP state and phase */
mbed_official 87:085cde657901 1595 hcryp->State = HAL_CRYP_STATE_READY;
mbed_official 87:085cde657901 1596 }
mbed_official 87:085cde657901 1597
mbed_official 87:085cde657901 1598 /* Return function status */
mbed_official 87:085cde657901 1599 return HAL_OK;
mbed_official 87:085cde657901 1600 }
mbed_official 87:085cde657901 1601 else if (__HAL_CRYP_GET_IT(CRYP_IT_INI))
mbed_official 87:085cde657901 1602 {
mbed_official 87:085cde657901 1603 inputaddr = (uint32_t)hcryp->pCrypInBuffPtr;
mbed_official 87:085cde657901 1604 /* Write the Input block in the IN FIFO */
mbed_official 87:085cde657901 1605 CRYP->DR = *(uint32_t*)(inputaddr);
mbed_official 87:085cde657901 1606 inputaddr+=4;
mbed_official 87:085cde657901 1607 CRYP->DR = *(uint32_t*)(inputaddr);
mbed_official 87:085cde657901 1608 inputaddr+=4;
mbed_official 87:085cde657901 1609 CRYP->DR = *(uint32_t*)(inputaddr);
mbed_official 87:085cde657901 1610 inputaddr+=4;
mbed_official 87:085cde657901 1611 CRYP->DR = *(uint32_t*)(inputaddr);
mbed_official 87:085cde657901 1612 hcryp->pCrypInBuffPtr += 16;
mbed_official 87:085cde657901 1613 hcryp->CrypInCount -= 16;
mbed_official 87:085cde657901 1614 if(hcryp->CrypInCount == 0)
mbed_official 87:085cde657901 1615 {
mbed_official 87:085cde657901 1616 __HAL_CRYP_DISABLE_IT(CRYP_IT_INI);
mbed_official 87:085cde657901 1617 /* Call the Input data transfer complete callback */
mbed_official 87:085cde657901 1618 HAL_CRYP_InCpltCallback(hcryp);
mbed_official 87:085cde657901 1619 }
mbed_official 87:085cde657901 1620 }
mbed_official 87:085cde657901 1621 else if (__HAL_CRYP_GET_IT(CRYP_IT_OUTI))
mbed_official 87:085cde657901 1622 {
mbed_official 87:085cde657901 1623 outputaddr = (uint32_t)hcryp->pCrypOutBuffPtr;
mbed_official 87:085cde657901 1624 /* Read the Output block from the Output FIFO */
mbed_official 87:085cde657901 1625 *(uint32_t*)(outputaddr) = CRYP->DOUT;
mbed_official 87:085cde657901 1626 outputaddr+=4;
mbed_official 87:085cde657901 1627 *(uint32_t*)(outputaddr) = CRYP->DOUT;
mbed_official 87:085cde657901 1628 outputaddr+=4;
mbed_official 87:085cde657901 1629 *(uint32_t*)(outputaddr) = CRYP->DOUT;
mbed_official 87:085cde657901 1630 outputaddr+=4;
mbed_official 87:085cde657901 1631 *(uint32_t*)(outputaddr) = CRYP->DOUT;
mbed_official 87:085cde657901 1632 hcryp->pCrypOutBuffPtr += 16;
mbed_official 87:085cde657901 1633 hcryp->CrypOutCount -= 16;
mbed_official 87:085cde657901 1634 if(hcryp->CrypOutCount == 0)
mbed_official 87:085cde657901 1635 {
mbed_official 87:085cde657901 1636 __HAL_CRYP_DISABLE_IT(CRYP_IT_OUTI);
mbed_official 87:085cde657901 1637 /* Process Unlocked */
mbed_official 87:085cde657901 1638 __HAL_UNLOCK(hcryp);
mbed_official 87:085cde657901 1639 /* Change the CRYP peripheral state */
mbed_official 87:085cde657901 1640 hcryp->State = HAL_CRYP_STATE_READY;
mbed_official 87:085cde657901 1641 /* Call Input transfer complete callback */
mbed_official 87:085cde657901 1642 HAL_CRYP_OutCpltCallback(hcryp);
mbed_official 87:085cde657901 1643 }
mbed_official 87:085cde657901 1644 }
mbed_official 87:085cde657901 1645
mbed_official 87:085cde657901 1646 /* Return function status */
mbed_official 87:085cde657901 1647 return HAL_OK;
mbed_official 87:085cde657901 1648 }
mbed_official 87:085cde657901 1649
mbed_official 87:085cde657901 1650 /**
mbed_official 87:085cde657901 1651 * @brief Initializes the CRYP peripheral in AES CCM decryption mode using interrupt
mbed_official 87:085cde657901 1652 * then decrypted pCypherData. The cypher data are available in pPlainData.
mbed_official 226:b062af740e40 1653 * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
mbed_official 226:b062af740e40 1654 * the configuration information for CRYP module
mbed_official 87:085cde657901 1655 * @param pCypherData: Pointer to the cyphertext buffer
mbed_official 87:085cde657901 1656 * @param Size: Length of the plaintext buffer, must be a multiple of 16
mbed_official 87:085cde657901 1657 * @param pPlainData: Pointer to the plaintext buffer
mbed_official 87:085cde657901 1658 * @retval HAL status
mbed_official 87:085cde657901 1659 */
mbed_official 87:085cde657901 1660 HAL_StatusTypeDef HAL_CRYPEx_AESCCM_Decrypt_IT(CRYP_HandleTypeDef *hcryp, uint8_t *pCypherData, uint16_t Size, uint8_t *pPlainData)
mbed_official 87:085cde657901 1661 {
mbed_official 87:085cde657901 1662 uint32_t inputaddr;
mbed_official 87:085cde657901 1663 uint32_t outputaddr;
mbed_official 87:085cde657901 1664 uint32_t timeout = 0;
mbed_official 87:085cde657901 1665 uint32_t headersize = hcryp->Init.HeaderSize;
mbed_official 87:085cde657901 1666 uint32_t headeraddr = (uint32_t)hcryp->Init.Header;
mbed_official 87:085cde657901 1667 uint32_t loopcounter = 0;
mbed_official 87:085cde657901 1668 uint32_t bufferidx = 0;
mbed_official 87:085cde657901 1669 uint8_t blockb0[16] = {0};/* Block B0 */
mbed_official 87:085cde657901 1670 uint8_t ctr[16] = {0}; /* Counter */
mbed_official 87:085cde657901 1671 uint32_t b0addr = (uint32_t)blockb0;
mbed_official 87:085cde657901 1672
mbed_official 87:085cde657901 1673 if(hcryp->State == HAL_CRYP_STATE_READY)
mbed_official 87:085cde657901 1674 {
mbed_official 87:085cde657901 1675 /* Process Locked */
mbed_official 87:085cde657901 1676 __HAL_LOCK(hcryp);
mbed_official 87:085cde657901 1677
mbed_official 87:085cde657901 1678 hcryp->CrypInCount = Size;
mbed_official 87:085cde657901 1679 hcryp->pCrypInBuffPtr = pCypherData;
mbed_official 87:085cde657901 1680 hcryp->pCrypOutBuffPtr = pPlainData;
mbed_official 87:085cde657901 1681 hcryp->CrypOutCount = Size;
mbed_official 87:085cde657901 1682
mbed_official 87:085cde657901 1683 /* Change the CRYP peripheral state */
mbed_official 87:085cde657901 1684 hcryp->State = HAL_CRYP_STATE_BUSY;
mbed_official 87:085cde657901 1685
mbed_official 87:085cde657901 1686 /* Check if initialization phase has already been performed */
mbed_official 87:085cde657901 1687 if(hcryp->Phase == HAL_CRYP_PHASE_READY)
mbed_official 87:085cde657901 1688 {
mbed_official 87:085cde657901 1689 /************************ Formatting the header block *******************/
mbed_official 87:085cde657901 1690 if(headersize != 0)
mbed_official 87:085cde657901 1691 {
mbed_official 87:085cde657901 1692 /* Check that the associated data (or header) length is lower than 2^16 - 2^8 = 65536 - 256 = 65280 */
mbed_official 87:085cde657901 1693 if(headersize < 65280)
mbed_official 87:085cde657901 1694 {
mbed_official 87:085cde657901 1695 hcryp->Init.pScratch[bufferidx++] = (uint8_t) ((headersize >> 8) & 0xFF);
mbed_official 87:085cde657901 1696 hcryp->Init.pScratch[bufferidx++] = (uint8_t) ((headersize) & 0xFF);
mbed_official 87:085cde657901 1697 headersize += 2;
mbed_official 87:085cde657901 1698 }
mbed_official 87:085cde657901 1699 else
mbed_official 87:085cde657901 1700 {
mbed_official 87:085cde657901 1701 /* Header is encoded as 0xff || 0xfe || [headersize]32, i.e., six octets */
mbed_official 87:085cde657901 1702 hcryp->Init.pScratch[bufferidx++] = 0xFF;
mbed_official 87:085cde657901 1703 hcryp->Init.pScratch[bufferidx++] = 0xFE;
mbed_official 87:085cde657901 1704 hcryp->Init.pScratch[bufferidx++] = headersize & 0xff000000;
mbed_official 87:085cde657901 1705 hcryp->Init.pScratch[bufferidx++] = headersize & 0x00ff0000;
mbed_official 87:085cde657901 1706 hcryp->Init.pScratch[bufferidx++] = headersize & 0x0000ff00;
mbed_official 87:085cde657901 1707 hcryp->Init.pScratch[bufferidx++] = headersize & 0x000000ff;
mbed_official 87:085cde657901 1708 headersize += 6;
mbed_official 87:085cde657901 1709 }
mbed_official 87:085cde657901 1710 /* Copy the header buffer in internal buffer "hcryp->Init.pScratch" */
mbed_official 87:085cde657901 1711 for(loopcounter = 0; loopcounter < headersize; loopcounter++)
mbed_official 87:085cde657901 1712 {
mbed_official 87:085cde657901 1713 hcryp->Init.pScratch[bufferidx++] = hcryp->Init.Header[loopcounter];
mbed_official 87:085cde657901 1714 }
mbed_official 87:085cde657901 1715 /* Check if the header size is modulo 16 */
mbed_official 87:085cde657901 1716 if ((headersize % 16) != 0)
mbed_official 87:085cde657901 1717 {
mbed_official 87:085cde657901 1718 /* Padd the header buffer with 0s till the hcryp->Init.pScratch length is modulo 16 */
mbed_official 87:085cde657901 1719 for(loopcounter = headersize; loopcounter <= ((headersize/16) + 1) * 16; loopcounter++)
mbed_official 87:085cde657901 1720 {
mbed_official 87:085cde657901 1721 hcryp->Init.pScratch[loopcounter] = 0;
mbed_official 87:085cde657901 1722 }
mbed_official 87:085cde657901 1723 /* Set the header size to modulo 16 */
mbed_official 87:085cde657901 1724 headersize = ((headersize/16) + 1) * 16;
mbed_official 87:085cde657901 1725 }
mbed_official 87:085cde657901 1726 /* Set the pointer headeraddr to hcryp->Init.pScratch */
mbed_official 87:085cde657901 1727 headeraddr = (uint32_t)hcryp->Init.pScratch;
mbed_official 87:085cde657901 1728 }
mbed_official 87:085cde657901 1729 /*********************** Formatting the block B0 ************************/
mbed_official 87:085cde657901 1730 if(headersize != 0)
mbed_official 87:085cde657901 1731 {
mbed_official 87:085cde657901 1732 blockb0[0] = 0x40;
mbed_official 87:085cde657901 1733 }
mbed_official 87:085cde657901 1734 /* Flags byte */
mbed_official 87:085cde657901 1735 /* blockb0[0] |= 0u | (((( (uint8_t) hcryp->Init.TagSize - 2) / 2) & 0x07 ) << 3 ) | ( ( (uint8_t) (15 - hcryp->Init.IVSize) - 1) & 0x07) */
mbed_official 87:085cde657901 1736 blockb0[0] |= (uint8_t)((uint8_t)((uint8_t)(((uint8_t)(hcryp->Init.TagSize - (uint8_t)(2))) >> 1) & (uint8_t)0x07 ) << 3);
mbed_official 87:085cde657901 1737 blockb0[0] |= (uint8_t)((uint8_t)((uint8_t)((uint8_t)(15) - hcryp->Init.IVSize) - (uint8_t)1) & (uint8_t)0x07);
mbed_official 87:085cde657901 1738
mbed_official 87:085cde657901 1739 for (loopcounter = 0; loopcounter < hcryp->Init.IVSize; loopcounter++)
mbed_official 87:085cde657901 1740 {
mbed_official 87:085cde657901 1741 blockb0[loopcounter+1] = hcryp->Init.pInitVect[loopcounter];
mbed_official 87:085cde657901 1742 }
mbed_official 87:085cde657901 1743 for ( ; loopcounter < 13; loopcounter++)
mbed_official 87:085cde657901 1744 {
mbed_official 87:085cde657901 1745 blockb0[loopcounter+1] = 0;
mbed_official 87:085cde657901 1746 }
mbed_official 87:085cde657901 1747
mbed_official 87:085cde657901 1748 blockb0[14] = (Size >> 8);
mbed_official 87:085cde657901 1749 blockb0[15] = (Size & 0xFF);
mbed_official 87:085cde657901 1750
mbed_official 87:085cde657901 1751 /************************* Formatting the initial counter ***************/
mbed_official 87:085cde657901 1752 /* Byte 0:
mbed_official 87:085cde657901 1753 Bits 7 and 6 are reserved and shall be set to 0
mbed_official 87:085cde657901 1754 Bits 3, 4, and 5 shall also be set to 0, to ensure that all the counter
mbed_official 87:085cde657901 1755 blocks are distinct from B0
mbed_official 87:085cde657901 1756 Bits 0, 1, and 2 contain the same encoding of q as in B0
mbed_official 87:085cde657901 1757 */
mbed_official 87:085cde657901 1758 ctr[0] = blockb0[0] & 0x07;
mbed_official 87:085cde657901 1759 /* byte 1 to NonceSize is the IV (Nonce) */
mbed_official 87:085cde657901 1760 for(loopcounter = 1; loopcounter < hcryp->Init.IVSize + 1; loopcounter++)
mbed_official 87:085cde657901 1761 {
mbed_official 87:085cde657901 1762 ctr[loopcounter] = blockb0[loopcounter];
mbed_official 87:085cde657901 1763 }
mbed_official 87:085cde657901 1764 /* Set the LSB to 1 */
mbed_official 87:085cde657901 1765 ctr[15] |= 0x01;
mbed_official 87:085cde657901 1766
mbed_official 87:085cde657901 1767 /* Set the key */
mbed_official 87:085cde657901 1768 CRYPEx_GCMCCM_SetKey(hcryp, hcryp->Init.pKey, hcryp->Init.KeySize);
mbed_official 87:085cde657901 1769
mbed_official 87:085cde657901 1770 /* Set the CRYP peripheral in AES CCM mode */
mbed_official 87:085cde657901 1771 __HAL_CRYP_SET_MODE(CRYP_CR_ALGOMODE_AES_CCM_DECRYPT);
mbed_official 87:085cde657901 1772
mbed_official 87:085cde657901 1773 /* Set the Initialization Vector */
mbed_official 87:085cde657901 1774 CRYPEx_GCMCCM_SetInitVector(hcryp, ctr, hcryp->Init.KeySize);
mbed_official 87:085cde657901 1775
mbed_official 87:085cde657901 1776 /* Select init phase */
mbed_official 87:085cde657901 1777 __HAL_CRYP_SET_PHASE(CRYP_PHASE_INIT);
mbed_official 87:085cde657901 1778
mbed_official 87:085cde657901 1779 b0addr = (uint32_t)blockb0;
mbed_official 87:085cde657901 1780 /* Write the blockb0 block in the IN FIFO */
mbed_official 87:085cde657901 1781 CRYP->DR = *(uint32_t*)(b0addr);
mbed_official 87:085cde657901 1782 b0addr+=4;
mbed_official 87:085cde657901 1783 CRYP->DR = *(uint32_t*)(b0addr);
mbed_official 87:085cde657901 1784 b0addr+=4;
mbed_official 87:085cde657901 1785 CRYP->DR = *(uint32_t*)(b0addr);
mbed_official 87:085cde657901 1786 b0addr+=4;
mbed_official 87:085cde657901 1787 CRYP->DR = *(uint32_t*)(b0addr);
mbed_official 87:085cde657901 1788
mbed_official 87:085cde657901 1789 /* Enable the CRYP peripheral */
mbed_official 87:085cde657901 1790 __HAL_CRYP_ENABLE();
mbed_official 87:085cde657901 1791
mbed_official 87:085cde657901 1792 /* Get timeout */
mbed_official 87:085cde657901 1793 timeout = HAL_GetTick() + 1;
mbed_official 87:085cde657901 1794
mbed_official 87:085cde657901 1795 while((CRYP->CR & CRYP_CR_CRYPEN) == CRYP_CR_CRYPEN)
mbed_official 87:085cde657901 1796 {
mbed_official 87:085cde657901 1797 /* Check for the Timeout */
mbed_official 87:085cde657901 1798 if(HAL_GetTick() >= timeout)
mbed_official 87:085cde657901 1799 {
mbed_official 87:085cde657901 1800 /* Change state */
mbed_official 87:085cde657901 1801 hcryp->State = HAL_CRYP_STATE_TIMEOUT;
mbed_official 87:085cde657901 1802
mbed_official 87:085cde657901 1803 /* Process Unlocked */
mbed_official 87:085cde657901 1804 __HAL_UNLOCK(hcryp);
mbed_official 87:085cde657901 1805
mbed_official 87:085cde657901 1806 return HAL_TIMEOUT;
mbed_official 87:085cde657901 1807 }
mbed_official 87:085cde657901 1808 }
mbed_official 87:085cde657901 1809 /***************************** Header phase *****************************/
mbed_official 87:085cde657901 1810 if(headersize != 0)
mbed_official 87:085cde657901 1811 {
mbed_official 87:085cde657901 1812 /* Select header phase */
mbed_official 87:085cde657901 1813 __HAL_CRYP_SET_PHASE(CRYP_PHASE_HEADER);
mbed_official 87:085cde657901 1814
mbed_official 87:085cde657901 1815 /* Enable Crypto processor */
mbed_official 87:085cde657901 1816 __HAL_CRYP_ENABLE();
mbed_official 87:085cde657901 1817
mbed_official 87:085cde657901 1818 for(loopcounter = 0; (loopcounter < headersize); loopcounter+=16)
mbed_official 87:085cde657901 1819 {
mbed_official 87:085cde657901 1820 /* Get timeout */
mbed_official 87:085cde657901 1821 timeout = HAL_GetTick() + 1;
mbed_official 87:085cde657901 1822
mbed_official 87:085cde657901 1823 while(HAL_IS_BIT_CLR(CRYP->SR, CRYP_FLAG_IFEM))
mbed_official 87:085cde657901 1824 {
mbed_official 87:085cde657901 1825 /* Check for the Timeout */
mbed_official 87:085cde657901 1826 if(HAL_GetTick() >= timeout)
mbed_official 87:085cde657901 1827 {
mbed_official 87:085cde657901 1828 /* Change state */
mbed_official 87:085cde657901 1829 hcryp->State = HAL_CRYP_STATE_TIMEOUT;
mbed_official 87:085cde657901 1830
mbed_official 87:085cde657901 1831 /* Process Unlocked */
mbed_official 87:085cde657901 1832 __HAL_UNLOCK(hcryp);
mbed_official 87:085cde657901 1833
mbed_official 87:085cde657901 1834 return HAL_TIMEOUT;
mbed_official 87:085cde657901 1835 }
mbed_official 87:085cde657901 1836 }
mbed_official 87:085cde657901 1837 /* Write the header block in the IN FIFO */
mbed_official 87:085cde657901 1838 CRYP->DR = *(uint32_t*)(headeraddr);
mbed_official 87:085cde657901 1839 headeraddr+=4;
mbed_official 87:085cde657901 1840 CRYP->DR = *(uint32_t*)(headeraddr);
mbed_official 87:085cde657901 1841 headeraddr+=4;
mbed_official 87:085cde657901 1842 CRYP->DR = *(uint32_t*)(headeraddr);
mbed_official 87:085cde657901 1843 headeraddr+=4;
mbed_official 87:085cde657901 1844 CRYP->DR = *(uint32_t*)(headeraddr);
mbed_official 87:085cde657901 1845 headeraddr+=4;
mbed_official 87:085cde657901 1846 }
mbed_official 87:085cde657901 1847
mbed_official 87:085cde657901 1848 /* Get timeout */
mbed_official 87:085cde657901 1849 timeout = HAL_GetTick() + 1;
mbed_official 87:085cde657901 1850
mbed_official 87:085cde657901 1851 while((CRYP->SR & CRYP_FLAG_BUSY) == CRYP_FLAG_BUSY)
mbed_official 87:085cde657901 1852 {
mbed_official 87:085cde657901 1853 /* Check for the Timeout */
mbed_official 87:085cde657901 1854 if(HAL_GetTick() >= timeout)
mbed_official 87:085cde657901 1855 {
mbed_official 87:085cde657901 1856 /* Change state */
mbed_official 87:085cde657901 1857 hcryp->State = HAL_CRYP_STATE_TIMEOUT;
mbed_official 87:085cde657901 1858
mbed_official 87:085cde657901 1859 /* Process Unlocked */
mbed_official 87:085cde657901 1860 __HAL_UNLOCK(hcryp);
mbed_official 87:085cde657901 1861
mbed_official 87:085cde657901 1862 return HAL_TIMEOUT;
mbed_official 87:085cde657901 1863 }
mbed_official 87:085cde657901 1864 }
mbed_official 87:085cde657901 1865 }
mbed_official 87:085cde657901 1866 /* Save formatted counter into the scratch buffer pScratch */
mbed_official 87:085cde657901 1867 for(loopcounter = 0; (loopcounter < 16); loopcounter++)
mbed_official 87:085cde657901 1868 {
mbed_official 87:085cde657901 1869 hcryp->Init.pScratch[loopcounter] = ctr[loopcounter];
mbed_official 87:085cde657901 1870 }
mbed_official 87:085cde657901 1871 /* Reset bit 0 */
mbed_official 87:085cde657901 1872 hcryp->Init.pScratch[15] &= 0xfe;
mbed_official 87:085cde657901 1873 /* Select payload phase once the header phase is performed */
mbed_official 87:085cde657901 1874 __HAL_CRYP_SET_PHASE(CRYP_PHASE_PAYLOAD);
mbed_official 87:085cde657901 1875
mbed_official 87:085cde657901 1876 /* Flush FIFO */
mbed_official 87:085cde657901 1877 __HAL_CRYP_FIFO_FLUSH();
mbed_official 87:085cde657901 1878
mbed_official 87:085cde657901 1879 /* Set the phase */
mbed_official 87:085cde657901 1880 hcryp->Phase = HAL_CRYP_PHASE_PROCESS;
mbed_official 87:085cde657901 1881 }
mbed_official 87:085cde657901 1882
mbed_official 87:085cde657901 1883 /* Enable Interrupts */
mbed_official 87:085cde657901 1884 __HAL_CRYP_ENABLE_IT(CRYP_IT_INI | CRYP_IT_OUTI);
mbed_official 87:085cde657901 1885
mbed_official 87:085cde657901 1886 /* Enable the CRYP peripheral */
mbed_official 87:085cde657901 1887 __HAL_CRYP_ENABLE();
mbed_official 87:085cde657901 1888
mbed_official 87:085cde657901 1889 /* Return function status */
mbed_official 87:085cde657901 1890 return HAL_OK;
mbed_official 87:085cde657901 1891 }
mbed_official 87:085cde657901 1892 else if (__HAL_CRYP_GET_IT(CRYP_IT_INI))
mbed_official 87:085cde657901 1893 {
mbed_official 87:085cde657901 1894 inputaddr = (uint32_t)hcryp->pCrypInBuffPtr;
mbed_official 87:085cde657901 1895 /* Write the Input block in the IN FIFO */
mbed_official 87:085cde657901 1896 CRYP->DR = *(uint32_t*)(inputaddr);
mbed_official 87:085cde657901 1897 inputaddr+=4;
mbed_official 87:085cde657901 1898 CRYP->DR = *(uint32_t*)(inputaddr);
mbed_official 87:085cde657901 1899 inputaddr+=4;
mbed_official 87:085cde657901 1900 CRYP->DR = *(uint32_t*)(inputaddr);
mbed_official 87:085cde657901 1901 inputaddr+=4;
mbed_official 87:085cde657901 1902 CRYP->DR = *(uint32_t*)(inputaddr);
mbed_official 87:085cde657901 1903 hcryp->pCrypInBuffPtr += 16;
mbed_official 87:085cde657901 1904 hcryp->CrypInCount -= 16;
mbed_official 87:085cde657901 1905 if(hcryp->CrypInCount == 0)
mbed_official 87:085cde657901 1906 {
mbed_official 87:085cde657901 1907 __HAL_CRYP_DISABLE_IT(CRYP_IT_INI);
mbed_official 87:085cde657901 1908 /* Call the Input data transfer complete callback */
mbed_official 87:085cde657901 1909 HAL_CRYP_InCpltCallback(hcryp);
mbed_official 87:085cde657901 1910 }
mbed_official 87:085cde657901 1911 }
mbed_official 87:085cde657901 1912 else if (__HAL_CRYP_GET_IT(CRYP_IT_OUTI))
mbed_official 87:085cde657901 1913 {
mbed_official 87:085cde657901 1914 outputaddr = (uint32_t)hcryp->pCrypOutBuffPtr;
mbed_official 87:085cde657901 1915 /* Read the Output block from the Output FIFO */
mbed_official 87:085cde657901 1916 *(uint32_t*)(outputaddr) = CRYP->DOUT;
mbed_official 87:085cde657901 1917 outputaddr+=4;
mbed_official 87:085cde657901 1918 *(uint32_t*)(outputaddr) = CRYP->DOUT;
mbed_official 87:085cde657901 1919 outputaddr+=4;
mbed_official 87:085cde657901 1920 *(uint32_t*)(outputaddr) = CRYP->DOUT;
mbed_official 87:085cde657901 1921 outputaddr+=4;
mbed_official 87:085cde657901 1922 *(uint32_t*)(outputaddr) = CRYP->DOUT;
mbed_official 87:085cde657901 1923 hcryp->pCrypOutBuffPtr += 16;
mbed_official 87:085cde657901 1924 hcryp->CrypOutCount -= 16;
mbed_official 87:085cde657901 1925 if(hcryp->CrypOutCount == 0)
mbed_official 87:085cde657901 1926 {
mbed_official 87:085cde657901 1927 __HAL_CRYP_DISABLE_IT(CRYP_IT_OUTI);
mbed_official 87:085cde657901 1928 /* Process Unlocked */
mbed_official 87:085cde657901 1929 __HAL_UNLOCK(hcryp);
mbed_official 87:085cde657901 1930 /* Change the CRYP peripheral state */
mbed_official 87:085cde657901 1931 hcryp->State = HAL_CRYP_STATE_READY;
mbed_official 87:085cde657901 1932 /* Call Input transfer complete callback */
mbed_official 87:085cde657901 1933 HAL_CRYP_OutCpltCallback(hcryp);
mbed_official 87:085cde657901 1934 }
mbed_official 87:085cde657901 1935 }
mbed_official 87:085cde657901 1936
mbed_official 87:085cde657901 1937 /* Return function status */
mbed_official 87:085cde657901 1938 return HAL_OK;
mbed_official 87:085cde657901 1939 }
mbed_official 87:085cde657901 1940
mbed_official 87:085cde657901 1941 /**
mbed_official 87:085cde657901 1942 * @brief Initializes the CRYP peripheral in AES GCM encryption mode using DMA.
mbed_official 226:b062af740e40 1943 * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
mbed_official 226:b062af740e40 1944 * the configuration information for CRYP module
mbed_official 87:085cde657901 1945 * @param pPlainData: Pointer to the plaintext buffer
mbed_official 87:085cde657901 1946 * @param Size: Length of the plaintext buffer, must be a multiple of 16
mbed_official 87:085cde657901 1947 * @param pCypherData: Pointer to the cyphertext buffer
mbed_official 87:085cde657901 1948 * @retval HAL status
mbed_official 87:085cde657901 1949 */
mbed_official 87:085cde657901 1950 HAL_StatusTypeDef HAL_CRYPEx_AESGCM_Encrypt_DMA(CRYP_HandleTypeDef *hcryp, uint8_t *pPlainData, uint16_t Size, uint8_t *pCypherData)
mbed_official 87:085cde657901 1951 {
mbed_official 87:085cde657901 1952 uint32_t timeout = 0;
mbed_official 87:085cde657901 1953 uint32_t inputaddr;
mbed_official 87:085cde657901 1954 uint32_t outputaddr;
mbed_official 87:085cde657901 1955
mbed_official 87:085cde657901 1956 if((hcryp->State == HAL_CRYP_STATE_READY) || (hcryp->Phase == HAL_CRYP_PHASE_PROCESS))
mbed_official 87:085cde657901 1957 {
mbed_official 87:085cde657901 1958 /* Process Locked */
mbed_official 87:085cde657901 1959 __HAL_LOCK(hcryp);
mbed_official 87:085cde657901 1960
mbed_official 87:085cde657901 1961 inputaddr = (uint32_t)pPlainData;
mbed_official 87:085cde657901 1962 outputaddr = (uint32_t)pCypherData;
mbed_official 87:085cde657901 1963
mbed_official 87:085cde657901 1964 /* Change the CRYP peripheral state */
mbed_official 87:085cde657901 1965 hcryp->State = HAL_CRYP_STATE_BUSY;
mbed_official 87:085cde657901 1966
mbed_official 87:085cde657901 1967 /* Check if initialization phase has already been performed */
mbed_official 87:085cde657901 1968 if(hcryp->Phase == HAL_CRYP_PHASE_READY)
mbed_official 87:085cde657901 1969 {
mbed_official 87:085cde657901 1970 /* Set the key */
mbed_official 87:085cde657901 1971 CRYPEx_GCMCCM_SetKey(hcryp, hcryp->Init.pKey, hcryp->Init.KeySize);
mbed_official 87:085cde657901 1972
mbed_official 87:085cde657901 1973 /* Set the CRYP peripheral in AES GCM mode */
mbed_official 87:085cde657901 1974 __HAL_CRYP_SET_MODE(CRYP_CR_ALGOMODE_AES_GCM_ENCRYPT);
mbed_official 87:085cde657901 1975
mbed_official 87:085cde657901 1976 /* Set the Initialization Vector */
mbed_official 87:085cde657901 1977 CRYPEx_GCMCCM_SetInitVector(hcryp, hcryp->Init.pInitVect, CRYP_KEYSIZE_128B);
mbed_official 87:085cde657901 1978
mbed_official 87:085cde657901 1979 /* Flush FIFO */
mbed_official 87:085cde657901 1980 __HAL_CRYP_FIFO_FLUSH();
mbed_official 87:085cde657901 1981
mbed_official 87:085cde657901 1982 /* Enable CRYP to start the init phase */
mbed_official 87:085cde657901 1983 __HAL_CRYP_ENABLE();
mbed_official 87:085cde657901 1984
mbed_official 87:085cde657901 1985 /* Get timeout */
mbed_official 87:085cde657901 1986 timeout = HAL_GetTick() + 1;
mbed_official 87:085cde657901 1987
mbed_official 87:085cde657901 1988 while((CRYP->CR & CRYP_CR_CRYPEN) == CRYP_CR_CRYPEN)
mbed_official 87:085cde657901 1989 {
mbed_official 87:085cde657901 1990 /* Check for the Timeout */
mbed_official 87:085cde657901 1991 if(HAL_GetTick() >= timeout)
mbed_official 87:085cde657901 1992 {
mbed_official 87:085cde657901 1993 /* Change state */
mbed_official 87:085cde657901 1994 hcryp->State = HAL_CRYP_STATE_TIMEOUT;
mbed_official 87:085cde657901 1995
mbed_official 87:085cde657901 1996 /* Process Unlocked */
mbed_official 87:085cde657901 1997 __HAL_UNLOCK(hcryp);
mbed_official 87:085cde657901 1998
mbed_official 87:085cde657901 1999 return HAL_TIMEOUT;
mbed_official 87:085cde657901 2000 }
mbed_official 87:085cde657901 2001 }
mbed_official 87:085cde657901 2002 /* Flush FIFO */
mbed_official 87:085cde657901 2003 __HAL_CRYP_FIFO_FLUSH();
mbed_official 87:085cde657901 2004
mbed_official 87:085cde657901 2005 /* Set the header phase */
mbed_official 87:085cde657901 2006 if(CRYPEx_GCMCCM_SetHeaderPhase(hcryp, hcryp->Init.Header, hcryp->Init.HeaderSize, 1) != HAL_OK)
mbed_official 87:085cde657901 2007 {
mbed_official 87:085cde657901 2008 return HAL_TIMEOUT;
mbed_official 87:085cde657901 2009 }
mbed_official 87:085cde657901 2010 /* Disable the CRYP peripheral */
mbed_official 87:085cde657901 2011 __HAL_CRYP_DISABLE();
mbed_official 87:085cde657901 2012
mbed_official 87:085cde657901 2013 /* Select payload phase once the header phase is performed */
mbed_official 87:085cde657901 2014 __HAL_CRYP_SET_PHASE(CRYP_PHASE_PAYLOAD);
mbed_official 87:085cde657901 2015
mbed_official 87:085cde657901 2016 /* Flush FIFO */
mbed_official 87:085cde657901 2017 __HAL_CRYP_FIFO_FLUSH();
mbed_official 87:085cde657901 2018
mbed_official 87:085cde657901 2019 /* Set the phase */
mbed_official 87:085cde657901 2020 hcryp->Phase = HAL_CRYP_PHASE_PROCESS;
mbed_official 87:085cde657901 2021 }
mbed_official 87:085cde657901 2022
mbed_official 87:085cde657901 2023 /* Set the input and output addresses and start DMA transfer */
mbed_official 87:085cde657901 2024 CRYPEx_GCMCCM_SetDMAConfig(hcryp, inputaddr, Size, outputaddr);
mbed_official 87:085cde657901 2025
mbed_official 87:085cde657901 2026 /* Unlock process */
mbed_official 87:085cde657901 2027 __HAL_UNLOCK(hcryp);
mbed_official 87:085cde657901 2028
mbed_official 87:085cde657901 2029 /* Return function status */
mbed_official 87:085cde657901 2030 return HAL_OK;
mbed_official 87:085cde657901 2031 }
mbed_official 87:085cde657901 2032 else
mbed_official 87:085cde657901 2033 {
mbed_official 87:085cde657901 2034 return HAL_ERROR;
mbed_official 87:085cde657901 2035 }
mbed_official 87:085cde657901 2036 }
mbed_official 87:085cde657901 2037
mbed_official 87:085cde657901 2038 /**
mbed_official 87:085cde657901 2039 * @brief Initializes the CRYP peripheral in AES CCM encryption mode using interrupt.
mbed_official 226:b062af740e40 2040 * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
mbed_official 226:b062af740e40 2041 * the configuration information for CRYP module
mbed_official 87:085cde657901 2042 * @param pPlainData: Pointer to the plaintext buffer
mbed_official 87:085cde657901 2043 * @param Size: Length of the plaintext buffer, must be a multiple of 16
mbed_official 87:085cde657901 2044 * @param pCypherData: Pointer to the cyphertext buffer
mbed_official 87:085cde657901 2045 * @retval HAL status
mbed_official 87:085cde657901 2046 */
mbed_official 87:085cde657901 2047 HAL_StatusTypeDef HAL_CRYPEx_AESCCM_Encrypt_DMA(CRYP_HandleTypeDef *hcryp, uint8_t *pPlainData, uint16_t Size, uint8_t *pCypherData)
mbed_official 87:085cde657901 2048 {
mbed_official 87:085cde657901 2049 uint32_t timeout = 0;
mbed_official 87:085cde657901 2050 uint32_t inputaddr;
mbed_official 87:085cde657901 2051 uint32_t outputaddr;
mbed_official 87:085cde657901 2052 uint32_t headersize;
mbed_official 87:085cde657901 2053 uint32_t headeraddr;
mbed_official 87:085cde657901 2054 uint32_t loopcounter = 0;
mbed_official 87:085cde657901 2055 uint32_t bufferidx = 0;
mbed_official 87:085cde657901 2056 uint8_t blockb0[16] = {0};/* Block B0 */
mbed_official 87:085cde657901 2057 uint8_t ctr[16] = {0}; /* Counter */
mbed_official 87:085cde657901 2058 uint32_t b0addr = (uint32_t)blockb0;
mbed_official 87:085cde657901 2059
mbed_official 87:085cde657901 2060 if((hcryp->State == HAL_CRYP_STATE_READY) || (hcryp->Phase == HAL_CRYP_PHASE_PROCESS))
mbed_official 87:085cde657901 2061 {
mbed_official 87:085cde657901 2062 /* Process Locked */
mbed_official 87:085cde657901 2063 __HAL_LOCK(hcryp);
mbed_official 87:085cde657901 2064
mbed_official 87:085cde657901 2065 inputaddr = (uint32_t)pPlainData;
mbed_official 87:085cde657901 2066 outputaddr = (uint32_t)pCypherData;
mbed_official 87:085cde657901 2067
mbed_official 87:085cde657901 2068 headersize = hcryp->Init.HeaderSize;
mbed_official 87:085cde657901 2069 headeraddr = (uint32_t)hcryp->Init.Header;
mbed_official 87:085cde657901 2070
mbed_official 87:085cde657901 2071 hcryp->CrypInCount = Size;
mbed_official 87:085cde657901 2072 hcryp->pCrypInBuffPtr = pPlainData;
mbed_official 87:085cde657901 2073 hcryp->pCrypOutBuffPtr = pCypherData;
mbed_official 87:085cde657901 2074 hcryp->CrypOutCount = Size;
mbed_official 87:085cde657901 2075
mbed_official 87:085cde657901 2076 /* Change the CRYP peripheral state */
mbed_official 87:085cde657901 2077 hcryp->State = HAL_CRYP_STATE_BUSY;
mbed_official 87:085cde657901 2078
mbed_official 87:085cde657901 2079 /* Check if initialization phase has already been performed */
mbed_official 87:085cde657901 2080 if(hcryp->Phase == HAL_CRYP_PHASE_READY)
mbed_official 87:085cde657901 2081 {
mbed_official 87:085cde657901 2082 /************************ Formatting the header block *******************/
mbed_official 87:085cde657901 2083 if(headersize != 0)
mbed_official 87:085cde657901 2084 {
mbed_official 87:085cde657901 2085 /* Check that the associated data (or header) length is lower than 2^16 - 2^8 = 65536 - 256 = 65280 */
mbed_official 87:085cde657901 2086 if(headersize < 65280)
mbed_official 87:085cde657901 2087 {
mbed_official 87:085cde657901 2088 hcryp->Init.pScratch[bufferidx++] = (uint8_t) ((headersize >> 8) & 0xFF);
mbed_official 87:085cde657901 2089 hcryp->Init.pScratch[bufferidx++] = (uint8_t) ((headersize) & 0xFF);
mbed_official 87:085cde657901 2090 headersize += 2;
mbed_official 87:085cde657901 2091 }
mbed_official 87:085cde657901 2092 else
mbed_official 87:085cde657901 2093 {
mbed_official 87:085cde657901 2094 /* Header is encoded as 0xff || 0xfe || [headersize]32, i.e., six octets */
mbed_official 87:085cde657901 2095 hcryp->Init.pScratch[bufferidx++] = 0xFF;
mbed_official 87:085cde657901 2096 hcryp->Init.pScratch[bufferidx++] = 0xFE;
mbed_official 87:085cde657901 2097 hcryp->Init.pScratch[bufferidx++] = headersize & 0xff000000;
mbed_official 87:085cde657901 2098 hcryp->Init.pScratch[bufferidx++] = headersize & 0x00ff0000;
mbed_official 87:085cde657901 2099 hcryp->Init.pScratch[bufferidx++] = headersize & 0x0000ff00;
mbed_official 87:085cde657901 2100 hcryp->Init.pScratch[bufferidx++] = headersize & 0x000000ff;
mbed_official 87:085cde657901 2101 headersize += 6;
mbed_official 87:085cde657901 2102 }
mbed_official 87:085cde657901 2103 /* Copy the header buffer in internal buffer "hcryp->Init.pScratch" */
mbed_official 87:085cde657901 2104 for(loopcounter = 0; loopcounter < headersize; loopcounter++)
mbed_official 87:085cde657901 2105 {
mbed_official 87:085cde657901 2106 hcryp->Init.pScratch[bufferidx++] = hcryp->Init.Header[loopcounter];
mbed_official 87:085cde657901 2107 }
mbed_official 87:085cde657901 2108 /* Check if the header size is modulo 16 */
mbed_official 87:085cde657901 2109 if ((headersize % 16) != 0)
mbed_official 87:085cde657901 2110 {
mbed_official 87:085cde657901 2111 /* Padd the header buffer with 0s till the hcryp->Init.pScratch length is modulo 16 */
mbed_official 87:085cde657901 2112 for(loopcounter = headersize; loopcounter <= ((headersize/16) + 1) * 16; loopcounter++)
mbed_official 87:085cde657901 2113 {
mbed_official 87:085cde657901 2114 hcryp->Init.pScratch[loopcounter] = 0;
mbed_official 87:085cde657901 2115 }
mbed_official 87:085cde657901 2116 /* Set the header size to modulo 16 */
mbed_official 87:085cde657901 2117 headersize = ((headersize/16) + 1) * 16;
mbed_official 87:085cde657901 2118 }
mbed_official 87:085cde657901 2119 /* Set the pointer headeraddr to hcryp->Init.pScratch */
mbed_official 87:085cde657901 2120 headeraddr = (uint32_t)hcryp->Init.pScratch;
mbed_official 87:085cde657901 2121 }
mbed_official 87:085cde657901 2122 /*********************** Formatting the block B0 ************************/
mbed_official 87:085cde657901 2123 if(headersize != 0)
mbed_official 87:085cde657901 2124 {
mbed_official 87:085cde657901 2125 blockb0[0] = 0x40;
mbed_official 87:085cde657901 2126 }
mbed_official 87:085cde657901 2127 /* Flags byte */
mbed_official 87:085cde657901 2128 /* blockb0[0] |= 0u | (((( (uint8_t) hcryp->Init.TagSize - 2) / 2) & 0x07 ) << 3 ) | ( ( (uint8_t) (15 - hcryp->Init.IVSize) - 1) & 0x07) */
mbed_official 87:085cde657901 2129 blockb0[0] |= (uint8_t)((uint8_t)((uint8_t)(((uint8_t)(hcryp->Init.TagSize - (uint8_t)(2))) >> 1) & (uint8_t)0x07 ) << 3);
mbed_official 87:085cde657901 2130 blockb0[0] |= (uint8_t)((uint8_t)((uint8_t)((uint8_t)(15) - hcryp->Init.IVSize) - (uint8_t)1) & (uint8_t)0x07);
mbed_official 87:085cde657901 2131
mbed_official 87:085cde657901 2132 for (loopcounter = 0; loopcounter < hcryp->Init.IVSize; loopcounter++)
mbed_official 87:085cde657901 2133 {
mbed_official 87:085cde657901 2134 blockb0[loopcounter+1] = hcryp->Init.pInitVect[loopcounter];
mbed_official 87:085cde657901 2135 }
mbed_official 87:085cde657901 2136 for ( ; loopcounter < 13; loopcounter++)
mbed_official 87:085cde657901 2137 {
mbed_official 87:085cde657901 2138 blockb0[loopcounter+1] = 0;
mbed_official 87:085cde657901 2139 }
mbed_official 87:085cde657901 2140
mbed_official 87:085cde657901 2141 blockb0[14] = (Size >> 8);
mbed_official 87:085cde657901 2142 blockb0[15] = (Size & 0xFF);
mbed_official 87:085cde657901 2143
mbed_official 87:085cde657901 2144 /************************* Formatting the initial counter ***************/
mbed_official 87:085cde657901 2145 /* Byte 0:
mbed_official 87:085cde657901 2146 Bits 7 and 6 are reserved and shall be set to 0
mbed_official 87:085cde657901 2147 Bits 3, 4, and 5 shall also be set to 0, to ensure that all the counter
mbed_official 87:085cde657901 2148 blocks are distinct from B0
mbed_official 87:085cde657901 2149 Bits 0, 1, and 2 contain the same encoding of q as in B0
mbed_official 87:085cde657901 2150 */
mbed_official 87:085cde657901 2151 ctr[0] = blockb0[0] & 0x07;
mbed_official 87:085cde657901 2152 /* byte 1 to NonceSize is the IV (Nonce) */
mbed_official 87:085cde657901 2153 for(loopcounter = 1; loopcounter < hcryp->Init.IVSize + 1; loopcounter++)
mbed_official 87:085cde657901 2154 {
mbed_official 87:085cde657901 2155 ctr[loopcounter] = blockb0[loopcounter];
mbed_official 87:085cde657901 2156 }
mbed_official 87:085cde657901 2157 /* Set the LSB to 1 */
mbed_official 87:085cde657901 2158 ctr[15] |= 0x01;
mbed_official 87:085cde657901 2159
mbed_official 87:085cde657901 2160 /* Set the key */
mbed_official 87:085cde657901 2161 CRYPEx_GCMCCM_SetKey(hcryp, hcryp->Init.pKey, hcryp->Init.KeySize);
mbed_official 87:085cde657901 2162
mbed_official 87:085cde657901 2163 /* Set the CRYP peripheral in AES CCM mode */
mbed_official 87:085cde657901 2164 __HAL_CRYP_SET_MODE(CRYP_CR_ALGOMODE_AES_CCM_ENCRYPT);
mbed_official 87:085cde657901 2165
mbed_official 87:085cde657901 2166 /* Set the Initialization Vector */
mbed_official 87:085cde657901 2167 CRYPEx_GCMCCM_SetInitVector(hcryp, ctr, CRYP_KEYSIZE_128B);
mbed_official 87:085cde657901 2168
mbed_official 87:085cde657901 2169 /* Select init phase */
mbed_official 87:085cde657901 2170 __HAL_CRYP_SET_PHASE(CRYP_PHASE_INIT);
mbed_official 87:085cde657901 2171
mbed_official 87:085cde657901 2172 b0addr = (uint32_t)blockb0;
mbed_official 87:085cde657901 2173 /* Write the blockb0 block in the IN FIFO */
mbed_official 87:085cde657901 2174 CRYP->DR = *(uint32_t*)(b0addr);
mbed_official 87:085cde657901 2175 b0addr+=4;
mbed_official 87:085cde657901 2176 CRYP->DR = *(uint32_t*)(b0addr);
mbed_official 87:085cde657901 2177 b0addr+=4;
mbed_official 87:085cde657901 2178 CRYP->DR = *(uint32_t*)(b0addr);
mbed_official 87:085cde657901 2179 b0addr+=4;
mbed_official 87:085cde657901 2180 CRYP->DR = *(uint32_t*)(b0addr);
mbed_official 87:085cde657901 2181
mbed_official 87:085cde657901 2182 /* Enable the CRYP peripheral */
mbed_official 87:085cde657901 2183 __HAL_CRYP_ENABLE();
mbed_official 87:085cde657901 2184
mbed_official 87:085cde657901 2185 /* Get timeout */
mbed_official 87:085cde657901 2186 timeout = HAL_GetTick() + 1;
mbed_official 87:085cde657901 2187
mbed_official 87:085cde657901 2188 while((CRYP->CR & CRYP_CR_CRYPEN) == CRYP_CR_CRYPEN)
mbed_official 87:085cde657901 2189 {
mbed_official 87:085cde657901 2190 /* Check for the Timeout */
mbed_official 87:085cde657901 2191 if(HAL_GetTick() >= timeout)
mbed_official 87:085cde657901 2192 {
mbed_official 87:085cde657901 2193 /* Change state */
mbed_official 87:085cde657901 2194 hcryp->State = HAL_CRYP_STATE_TIMEOUT;
mbed_official 87:085cde657901 2195
mbed_official 87:085cde657901 2196 /* Process Unlocked */
mbed_official 87:085cde657901 2197 __HAL_UNLOCK(hcryp);
mbed_official 87:085cde657901 2198
mbed_official 87:085cde657901 2199 return HAL_TIMEOUT;
mbed_official 87:085cde657901 2200 }
mbed_official 87:085cde657901 2201 }
mbed_official 87:085cde657901 2202 /***************************** Header phase *****************************/
mbed_official 87:085cde657901 2203 if(headersize != 0)
mbed_official 87:085cde657901 2204 {
mbed_official 87:085cde657901 2205 /* Select header phase */
mbed_official 87:085cde657901 2206 __HAL_CRYP_SET_PHASE(CRYP_PHASE_HEADER);
mbed_official 87:085cde657901 2207
mbed_official 87:085cde657901 2208 /* Enable Crypto processor */
mbed_official 87:085cde657901 2209 __HAL_CRYP_ENABLE();
mbed_official 87:085cde657901 2210
mbed_official 87:085cde657901 2211 for(loopcounter = 0; (loopcounter < headersize); loopcounter+=16)
mbed_official 87:085cde657901 2212 {
mbed_official 87:085cde657901 2213 /* Get timeout */
mbed_official 87:085cde657901 2214 timeout = HAL_GetTick() + 1;
mbed_official 87:085cde657901 2215
mbed_official 87:085cde657901 2216 while(HAL_IS_BIT_CLR(CRYP->SR, CRYP_FLAG_IFEM))
mbed_official 87:085cde657901 2217 {
mbed_official 87:085cde657901 2218 /* Check for the Timeout */
mbed_official 87:085cde657901 2219 if(HAL_GetTick() >= timeout)
mbed_official 87:085cde657901 2220 {
mbed_official 87:085cde657901 2221 /* Change state */
mbed_official 87:085cde657901 2222 hcryp->State = HAL_CRYP_STATE_TIMEOUT;
mbed_official 87:085cde657901 2223
mbed_official 87:085cde657901 2224 /* Process Unlocked */
mbed_official 87:085cde657901 2225 __HAL_UNLOCK(hcryp);
mbed_official 87:085cde657901 2226
mbed_official 87:085cde657901 2227 return HAL_TIMEOUT;
mbed_official 87:085cde657901 2228 }
mbed_official 87:085cde657901 2229 }
mbed_official 87:085cde657901 2230 /* Write the header block in the IN FIFO */
mbed_official 87:085cde657901 2231 CRYP->DR = *(uint32_t*)(headeraddr);
mbed_official 87:085cde657901 2232 headeraddr+=4;
mbed_official 87:085cde657901 2233 CRYP->DR = *(uint32_t*)(headeraddr);
mbed_official 87:085cde657901 2234 headeraddr+=4;
mbed_official 87:085cde657901 2235 CRYP->DR = *(uint32_t*)(headeraddr);
mbed_official 87:085cde657901 2236 headeraddr+=4;
mbed_official 87:085cde657901 2237 CRYP->DR = *(uint32_t*)(headeraddr);
mbed_official 87:085cde657901 2238 headeraddr+=4;
mbed_official 87:085cde657901 2239 }
mbed_official 87:085cde657901 2240
mbed_official 87:085cde657901 2241 /* Get timeout */
mbed_official 87:085cde657901 2242 timeout = HAL_GetTick() + 1;
mbed_official 87:085cde657901 2243
mbed_official 87:085cde657901 2244 while((CRYP->SR & CRYP_FLAG_BUSY) == CRYP_FLAG_BUSY)
mbed_official 87:085cde657901 2245 {
mbed_official 87:085cde657901 2246 /* Check for the Timeout */
mbed_official 87:085cde657901 2247 if(HAL_GetTick() >= timeout)
mbed_official 87:085cde657901 2248 {
mbed_official 87:085cde657901 2249 /* Change state */
mbed_official 87:085cde657901 2250 hcryp->State = HAL_CRYP_STATE_TIMEOUT;
mbed_official 87:085cde657901 2251
mbed_official 87:085cde657901 2252 /* Process Unlocked */
mbed_official 87:085cde657901 2253 __HAL_UNLOCK(hcryp);
mbed_official 87:085cde657901 2254
mbed_official 87:085cde657901 2255 return HAL_TIMEOUT;
mbed_official 87:085cde657901 2256 }
mbed_official 87:085cde657901 2257 }
mbed_official 87:085cde657901 2258 }
mbed_official 87:085cde657901 2259 /* Save formatted counter into the scratch buffer pScratch */
mbed_official 87:085cde657901 2260 for(loopcounter = 0; (loopcounter < 16); loopcounter++)
mbed_official 87:085cde657901 2261 {
mbed_official 87:085cde657901 2262 hcryp->Init.pScratch[loopcounter] = ctr[loopcounter];
mbed_official 87:085cde657901 2263 }
mbed_official 87:085cde657901 2264 /* Reset bit 0 */
mbed_official 87:085cde657901 2265 hcryp->Init.pScratch[15] &= 0xfe;
mbed_official 87:085cde657901 2266
mbed_official 87:085cde657901 2267 /* Select payload phase once the header phase is performed */
mbed_official 87:085cde657901 2268 __HAL_CRYP_SET_PHASE(CRYP_PHASE_PAYLOAD);
mbed_official 87:085cde657901 2269
mbed_official 87:085cde657901 2270 /* Flush FIFO */
mbed_official 87:085cde657901 2271 __HAL_CRYP_FIFO_FLUSH();
mbed_official 87:085cde657901 2272
mbed_official 87:085cde657901 2273 /* Set the phase */
mbed_official 87:085cde657901 2274 hcryp->Phase = HAL_CRYP_PHASE_PROCESS;
mbed_official 87:085cde657901 2275 }
mbed_official 87:085cde657901 2276
mbed_official 87:085cde657901 2277 /* Set the input and output addresses and start DMA transfer */
mbed_official 87:085cde657901 2278 CRYPEx_GCMCCM_SetDMAConfig(hcryp, inputaddr, Size, outputaddr);
mbed_official 87:085cde657901 2279
mbed_official 87:085cde657901 2280 /* Unlock process */
mbed_official 87:085cde657901 2281 __HAL_UNLOCK(hcryp);
mbed_official 87:085cde657901 2282
mbed_official 87:085cde657901 2283 /* Return function status */
mbed_official 87:085cde657901 2284 return HAL_OK;
mbed_official 87:085cde657901 2285 }
mbed_official 87:085cde657901 2286 else
mbed_official 87:085cde657901 2287 {
mbed_official 87:085cde657901 2288 return HAL_ERROR;
mbed_official 87:085cde657901 2289 }
mbed_official 87:085cde657901 2290 }
mbed_official 87:085cde657901 2291
mbed_official 87:085cde657901 2292 /**
mbed_official 87:085cde657901 2293 * @brief Initializes the CRYP peripheral in AES GCM decryption mode using DMA.
mbed_official 226:b062af740e40 2294 * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
mbed_official 226:b062af740e40 2295 * the configuration information for CRYP module
mbed_official 87:085cde657901 2296 * @param pCypherData: Pointer to the cyphertext buffer.
mbed_official 87:085cde657901 2297 * @param Size: Length of the cyphertext buffer, must be a multiple of 16
mbed_official 87:085cde657901 2298 * @param pPlainData: Pointer to the plaintext buffer
mbed_official 87:085cde657901 2299 * @retval HAL status
mbed_official 87:085cde657901 2300 */
mbed_official 87:085cde657901 2301 HAL_StatusTypeDef HAL_CRYPEx_AESGCM_Decrypt_DMA(CRYP_HandleTypeDef *hcryp, uint8_t *pCypherData, uint16_t Size, uint8_t *pPlainData)
mbed_official 87:085cde657901 2302 {
mbed_official 87:085cde657901 2303 uint32_t timeout = 0;
mbed_official 87:085cde657901 2304 uint32_t inputaddr;
mbed_official 87:085cde657901 2305 uint32_t outputaddr;
mbed_official 87:085cde657901 2306
mbed_official 87:085cde657901 2307 if((hcryp->State == HAL_CRYP_STATE_READY) || (hcryp->Phase == HAL_CRYP_PHASE_PROCESS))
mbed_official 87:085cde657901 2308 {
mbed_official 87:085cde657901 2309 /* Process Locked */
mbed_official 87:085cde657901 2310 __HAL_LOCK(hcryp);
mbed_official 87:085cde657901 2311
mbed_official 87:085cde657901 2312 inputaddr = (uint32_t)pCypherData;
mbed_official 87:085cde657901 2313 outputaddr = (uint32_t)pPlainData;
mbed_official 87:085cde657901 2314
mbed_official 87:085cde657901 2315 /* Change the CRYP peripheral state */
mbed_official 87:085cde657901 2316 hcryp->State = HAL_CRYP_STATE_BUSY;
mbed_official 87:085cde657901 2317
mbed_official 87:085cde657901 2318 /* Check if initialization phase has already been performed */
mbed_official 87:085cde657901 2319 if(hcryp->Phase == HAL_CRYP_PHASE_READY)
mbed_official 87:085cde657901 2320 {
mbed_official 87:085cde657901 2321 /* Set the key */
mbed_official 87:085cde657901 2322 CRYPEx_GCMCCM_SetKey(hcryp, hcryp->Init.pKey, hcryp->Init.KeySize);
mbed_official 87:085cde657901 2323
mbed_official 87:085cde657901 2324 /* Set the CRYP peripheral in AES GCM decryption mode */
mbed_official 87:085cde657901 2325 __HAL_CRYP_SET_MODE(CRYP_CR_ALGOMODE_AES_GCM_DECRYPT);
mbed_official 87:085cde657901 2326
mbed_official 87:085cde657901 2327 /* Set the Initialization Vector */
mbed_official 87:085cde657901 2328 CRYPEx_GCMCCM_SetInitVector(hcryp, hcryp->Init.pInitVect, CRYP_KEYSIZE_128B);
mbed_official 87:085cde657901 2329
mbed_official 87:085cde657901 2330 /* Enable CRYP to start the init phase */
mbed_official 87:085cde657901 2331 __HAL_CRYP_ENABLE();
mbed_official 87:085cde657901 2332
mbed_official 87:085cde657901 2333 /* Get timeout */
mbed_official 87:085cde657901 2334 timeout = HAL_GetTick() + 1;
mbed_official 87:085cde657901 2335
mbed_official 87:085cde657901 2336 while((CRYP->CR & CRYP_CR_CRYPEN) == CRYP_CR_CRYPEN)
mbed_official 87:085cde657901 2337 {
mbed_official 87:085cde657901 2338 /* Check for the Timeout */
mbed_official 87:085cde657901 2339 if(HAL_GetTick() >= timeout)
mbed_official 87:085cde657901 2340 {
mbed_official 87:085cde657901 2341 /* Change state */
mbed_official 87:085cde657901 2342 hcryp->State = HAL_CRYP_STATE_TIMEOUT;
mbed_official 87:085cde657901 2343
mbed_official 87:085cde657901 2344 /* Process Unlocked */
mbed_official 87:085cde657901 2345 __HAL_UNLOCK(hcryp);
mbed_official 87:085cde657901 2346
mbed_official 87:085cde657901 2347 return HAL_TIMEOUT;
mbed_official 87:085cde657901 2348 }
mbed_official 87:085cde657901 2349 }
mbed_official 87:085cde657901 2350
mbed_official 87:085cde657901 2351 /* Set the header phase */
mbed_official 87:085cde657901 2352 if(CRYPEx_GCMCCM_SetHeaderPhase(hcryp, hcryp->Init.Header, hcryp->Init.HeaderSize, 1) != HAL_OK)
mbed_official 87:085cde657901 2353 {
mbed_official 87:085cde657901 2354 return HAL_TIMEOUT;
mbed_official 87:085cde657901 2355 }
mbed_official 87:085cde657901 2356 /* Disable the CRYP peripheral */
mbed_official 87:085cde657901 2357 __HAL_CRYP_DISABLE();
mbed_official 87:085cde657901 2358
mbed_official 87:085cde657901 2359 /* Select payload phase once the header phase is performed */
mbed_official 87:085cde657901 2360 __HAL_CRYP_SET_PHASE(CRYP_PHASE_PAYLOAD);
mbed_official 87:085cde657901 2361
mbed_official 87:085cde657901 2362 /* Set the phase */
mbed_official 87:085cde657901 2363 hcryp->Phase = HAL_CRYP_PHASE_PROCESS;
mbed_official 87:085cde657901 2364 }
mbed_official 87:085cde657901 2365
mbed_official 87:085cde657901 2366 /* Set the input and output addresses and start DMA transfer */
mbed_official 87:085cde657901 2367 CRYPEx_GCMCCM_SetDMAConfig(hcryp, inputaddr, Size, outputaddr);
mbed_official 87:085cde657901 2368
mbed_official 87:085cde657901 2369 /* Unlock process */
mbed_official 87:085cde657901 2370 __HAL_UNLOCK(hcryp);
mbed_official 87:085cde657901 2371
mbed_official 87:085cde657901 2372 /* Return function status */
mbed_official 87:085cde657901 2373 return HAL_OK;
mbed_official 87:085cde657901 2374 }
mbed_official 87:085cde657901 2375 else
mbed_official 87:085cde657901 2376 {
mbed_official 87:085cde657901 2377 return HAL_ERROR;
mbed_official 87:085cde657901 2378 }
mbed_official 87:085cde657901 2379 }
mbed_official 87:085cde657901 2380
mbed_official 87:085cde657901 2381 /**
mbed_official 87:085cde657901 2382 * @brief Initializes the CRYP peripheral in AES CCM decryption mode using DMA
mbed_official 87:085cde657901 2383 * then decrypted pCypherData. The cypher data are available in pPlainData.
mbed_official 226:b062af740e40 2384 * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
mbed_official 226:b062af740e40 2385 * the configuration information for CRYP module
mbed_official 87:085cde657901 2386 * @param pCypherData: Pointer to the cyphertext buffer
mbed_official 87:085cde657901 2387 * @param Size: Length of the plaintext buffer, must be a multiple of 16
mbed_official 87:085cde657901 2388 * @param pPlainData: Pointer to the plaintext buffer
mbed_official 87:085cde657901 2389 * @retval HAL status
mbed_official 87:085cde657901 2390 */
mbed_official 87:085cde657901 2391 HAL_StatusTypeDef HAL_CRYPEx_AESCCM_Decrypt_DMA(CRYP_HandleTypeDef *hcryp, uint8_t *pCypherData, uint16_t Size, uint8_t *pPlainData)
mbed_official 87:085cde657901 2392 {
mbed_official 87:085cde657901 2393 uint32_t timeout = 0;
mbed_official 87:085cde657901 2394 uint32_t inputaddr;
mbed_official 87:085cde657901 2395 uint32_t outputaddr;
mbed_official 87:085cde657901 2396 uint32_t headersize;
mbed_official 87:085cde657901 2397 uint32_t headeraddr;
mbed_official 87:085cde657901 2398 uint32_t loopcounter = 0;
mbed_official 87:085cde657901 2399 uint32_t bufferidx = 0;
mbed_official 87:085cde657901 2400 uint8_t blockb0[16] = {0};/* Block B0 */
mbed_official 87:085cde657901 2401 uint8_t ctr[16] = {0}; /* Counter */
mbed_official 87:085cde657901 2402 uint32_t b0addr = (uint32_t)blockb0;
mbed_official 87:085cde657901 2403
mbed_official 87:085cde657901 2404 if((hcryp->State == HAL_CRYP_STATE_READY) || (hcryp->Phase == HAL_CRYP_PHASE_PROCESS))
mbed_official 87:085cde657901 2405 {
mbed_official 87:085cde657901 2406 /* Process Locked */
mbed_official 87:085cde657901 2407 __HAL_LOCK(hcryp);
mbed_official 87:085cde657901 2408
mbed_official 87:085cde657901 2409 inputaddr = (uint32_t)pCypherData;
mbed_official 87:085cde657901 2410 outputaddr = (uint32_t)pPlainData;
mbed_official 87:085cde657901 2411
mbed_official 87:085cde657901 2412 headersize = hcryp->Init.HeaderSize;
mbed_official 87:085cde657901 2413 headeraddr = (uint32_t)hcryp->Init.Header;
mbed_official 87:085cde657901 2414
mbed_official 87:085cde657901 2415 hcryp->CrypInCount = Size;
mbed_official 87:085cde657901 2416 hcryp->pCrypInBuffPtr = pCypherData;
mbed_official 87:085cde657901 2417 hcryp->pCrypOutBuffPtr = pPlainData;
mbed_official 87:085cde657901 2418 hcryp->CrypOutCount = Size;
mbed_official 87:085cde657901 2419
mbed_official 87:085cde657901 2420 /* Change the CRYP peripheral state */
mbed_official 87:085cde657901 2421 hcryp->State = HAL_CRYP_STATE_BUSY;
mbed_official 87:085cde657901 2422
mbed_official 87:085cde657901 2423 /* Check if initialization phase has already been performed */
mbed_official 87:085cde657901 2424 if(hcryp->Phase == HAL_CRYP_PHASE_READY)
mbed_official 87:085cde657901 2425 {
mbed_official 87:085cde657901 2426 /************************ Formatting the header block *******************/
mbed_official 87:085cde657901 2427 if(headersize != 0)
mbed_official 87:085cde657901 2428 {
mbed_official 87:085cde657901 2429 /* Check that the associated data (or header) length is lower than 2^16 - 2^8 = 65536 - 256 = 65280 */
mbed_official 87:085cde657901 2430 if(headersize < 65280)
mbed_official 87:085cde657901 2431 {
mbed_official 87:085cde657901 2432 hcryp->Init.pScratch[bufferidx++] = (uint8_t) ((headersize >> 8) & 0xFF);
mbed_official 87:085cde657901 2433 hcryp->Init.pScratch[bufferidx++] = (uint8_t) ((headersize) & 0xFF);
mbed_official 87:085cde657901 2434 headersize += 2;
mbed_official 87:085cde657901 2435 }
mbed_official 87:085cde657901 2436 else
mbed_official 87:085cde657901 2437 {
mbed_official 87:085cde657901 2438 /* Header is encoded as 0xff || 0xfe || [headersize]32, i.e., six octets */
mbed_official 87:085cde657901 2439 hcryp->Init.pScratch[bufferidx++] = 0xFF;
mbed_official 87:085cde657901 2440 hcryp->Init.pScratch[bufferidx++] = 0xFE;
mbed_official 87:085cde657901 2441 hcryp->Init.pScratch[bufferidx++] = headersize & 0xff000000;
mbed_official 87:085cde657901 2442 hcryp->Init.pScratch[bufferidx++] = headersize & 0x00ff0000;
mbed_official 87:085cde657901 2443 hcryp->Init.pScratch[bufferidx++] = headersize & 0x0000ff00;
mbed_official 87:085cde657901 2444 hcryp->Init.pScratch[bufferidx++] = headersize & 0x000000ff;
mbed_official 87:085cde657901 2445 headersize += 6;
mbed_official 87:085cde657901 2446 }
mbed_official 87:085cde657901 2447 /* Copy the header buffer in internal buffer "hcryp->Init.pScratch" */
mbed_official 87:085cde657901 2448 for(loopcounter = 0; loopcounter < headersize; loopcounter++)
mbed_official 87:085cde657901 2449 {
mbed_official 87:085cde657901 2450 hcryp->Init.pScratch[bufferidx++] = hcryp->Init.Header[loopcounter];
mbed_official 87:085cde657901 2451 }
mbed_official 87:085cde657901 2452 /* Check if the header size is modulo 16 */
mbed_official 87:085cde657901 2453 if ((headersize % 16) != 0)
mbed_official 87:085cde657901 2454 {
mbed_official 87:085cde657901 2455 /* Padd the header buffer with 0s till the hcryp->Init.pScratch length is modulo 16 */
mbed_official 87:085cde657901 2456 for(loopcounter = headersize; loopcounter <= ((headersize/16) + 1) * 16; loopcounter++)
mbed_official 87:085cde657901 2457 {
mbed_official 87:085cde657901 2458 hcryp->Init.pScratch[loopcounter] = 0;
mbed_official 87:085cde657901 2459 }
mbed_official 87:085cde657901 2460 /* Set the header size to modulo 16 */
mbed_official 87:085cde657901 2461 headersize = ((headersize/16) + 1) * 16;
mbed_official 87:085cde657901 2462 }
mbed_official 87:085cde657901 2463 /* Set the pointer headeraddr to hcryp->Init.pScratch */
mbed_official 87:085cde657901 2464 headeraddr = (uint32_t)hcryp->Init.pScratch;
mbed_official 87:085cde657901 2465 }
mbed_official 87:085cde657901 2466 /*********************** Formatting the block B0 ************************/
mbed_official 87:085cde657901 2467 if(headersize != 0)
mbed_official 87:085cde657901 2468 {
mbed_official 87:085cde657901 2469 blockb0[0] = 0x40;
mbed_official 87:085cde657901 2470 }
mbed_official 87:085cde657901 2471 /* Flags byte */
mbed_official 87:085cde657901 2472 /* blockb0[0] |= 0u | (((( (uint8_t) hcryp->Init.TagSize - 2) / 2) & 0x07 ) << 3 ) | ( ( (uint8_t) (15 - hcryp->Init.IVSize) - 1) & 0x07) */
mbed_official 87:085cde657901 2473 blockb0[0] |= (uint8_t)((uint8_t)((uint8_t)(((uint8_t)(hcryp->Init.TagSize - (uint8_t)(2))) >> 1) & (uint8_t)0x07 ) << 3);
mbed_official 87:085cde657901 2474 blockb0[0] |= (uint8_t)((uint8_t)((uint8_t)((uint8_t)(15) - hcryp->Init.IVSize) - (uint8_t)1) & (uint8_t)0x07);
mbed_official 87:085cde657901 2475
mbed_official 87:085cde657901 2476 for (loopcounter = 0; loopcounter < hcryp->Init.IVSize; loopcounter++)
mbed_official 87:085cde657901 2477 {
mbed_official 87:085cde657901 2478 blockb0[loopcounter+1] = hcryp->Init.pInitVect[loopcounter];
mbed_official 87:085cde657901 2479 }
mbed_official 87:085cde657901 2480 for ( ; loopcounter < 13; loopcounter++)
mbed_official 87:085cde657901 2481 {
mbed_official 87:085cde657901 2482 blockb0[loopcounter+1] = 0;
mbed_official 87:085cde657901 2483 }
mbed_official 87:085cde657901 2484
mbed_official 87:085cde657901 2485 blockb0[14] = (Size >> 8);
mbed_official 87:085cde657901 2486 blockb0[15] = (Size & 0xFF);
mbed_official 87:085cde657901 2487
mbed_official 87:085cde657901 2488 /************************* Formatting the initial counter ***************/
mbed_official 87:085cde657901 2489 /* Byte 0:
mbed_official 87:085cde657901 2490 Bits 7 and 6 are reserved and shall be set to 0
mbed_official 87:085cde657901 2491 Bits 3, 4, and 5 shall also be set to 0, to ensure that all the counter
mbed_official 87:085cde657901 2492 blocks are distinct from B0
mbed_official 87:085cde657901 2493 Bits 0, 1, and 2 contain the same encoding of q as in B0
mbed_official 87:085cde657901 2494 */
mbed_official 87:085cde657901 2495 ctr[0] = blockb0[0] & 0x07;
mbed_official 87:085cde657901 2496 /* byte 1 to NonceSize is the IV (Nonce) */
mbed_official 87:085cde657901 2497 for(loopcounter = 1; loopcounter < hcryp->Init.IVSize + 1; loopcounter++)
mbed_official 87:085cde657901 2498 {
mbed_official 87:085cde657901 2499 ctr[loopcounter] = blockb0[loopcounter];
mbed_official 87:085cde657901 2500 }
mbed_official 87:085cde657901 2501 /* Set the LSB to 1 */
mbed_official 87:085cde657901 2502 ctr[15] |= 0x01;
mbed_official 87:085cde657901 2503
mbed_official 87:085cde657901 2504 /* Set the key */
mbed_official 87:085cde657901 2505 CRYPEx_GCMCCM_SetKey(hcryp, hcryp->Init.pKey, hcryp->Init.KeySize);
mbed_official 87:085cde657901 2506
mbed_official 87:085cde657901 2507 /* Set the CRYP peripheral in AES CCM mode */
mbed_official 87:085cde657901 2508 __HAL_CRYP_SET_MODE(CRYP_CR_ALGOMODE_AES_CCM_DECRYPT);
mbed_official 87:085cde657901 2509
mbed_official 87:085cde657901 2510 /* Set the Initialization Vector */
mbed_official 87:085cde657901 2511 CRYPEx_GCMCCM_SetInitVector(hcryp, ctr, CRYP_KEYSIZE_128B);
mbed_official 87:085cde657901 2512
mbed_official 87:085cde657901 2513 /* Select init phase */
mbed_official 87:085cde657901 2514 __HAL_CRYP_SET_PHASE(CRYP_PHASE_INIT);
mbed_official 87:085cde657901 2515
mbed_official 87:085cde657901 2516 b0addr = (uint32_t)blockb0;
mbed_official 87:085cde657901 2517 /* Write the blockb0 block in the IN FIFO */
mbed_official 87:085cde657901 2518 CRYP->DR = *(uint32_t*)(b0addr);
mbed_official 87:085cde657901 2519 b0addr+=4;
mbed_official 87:085cde657901 2520 CRYP->DR = *(uint32_t*)(b0addr);
mbed_official 87:085cde657901 2521 b0addr+=4;
mbed_official 87:085cde657901 2522 CRYP->DR = *(uint32_t*)(b0addr);
mbed_official 87:085cde657901 2523 b0addr+=4;
mbed_official 87:085cde657901 2524 CRYP->DR = *(uint32_t*)(b0addr);
mbed_official 87:085cde657901 2525
mbed_official 87:085cde657901 2526 /* Enable the CRYP peripheral */
mbed_official 87:085cde657901 2527 __HAL_CRYP_ENABLE();
mbed_official 87:085cde657901 2528
mbed_official 87:085cde657901 2529 /* Get timeout */
mbed_official 87:085cde657901 2530 timeout = HAL_GetTick() + 1;
mbed_official 87:085cde657901 2531
mbed_official 87:085cde657901 2532 while((CRYP->CR & CRYP_CR_CRYPEN) == CRYP_CR_CRYPEN)
mbed_official 87:085cde657901 2533 {
mbed_official 87:085cde657901 2534 /* Check for the Timeout */
mbed_official 87:085cde657901 2535
mbed_official 87:085cde657901 2536 if(HAL_GetTick() >= timeout)
mbed_official 87:085cde657901 2537 {
mbed_official 87:085cde657901 2538 /* Change state */
mbed_official 87:085cde657901 2539 hcryp->State = HAL_CRYP_STATE_TIMEOUT;
mbed_official 87:085cde657901 2540
mbed_official 87:085cde657901 2541 /* Process Unlocked */
mbed_official 87:085cde657901 2542 __HAL_UNLOCK(hcryp);
mbed_official 87:085cde657901 2543
mbed_official 87:085cde657901 2544 return HAL_TIMEOUT;
mbed_official 87:085cde657901 2545
mbed_official 87:085cde657901 2546 }
mbed_official 87:085cde657901 2547 }
mbed_official 87:085cde657901 2548 /***************************** Header phase *****************************/
mbed_official 87:085cde657901 2549 if(headersize != 0)
mbed_official 87:085cde657901 2550 {
mbed_official 87:085cde657901 2551 /* Select header phase */
mbed_official 87:085cde657901 2552 __HAL_CRYP_SET_PHASE(CRYP_PHASE_HEADER);
mbed_official 87:085cde657901 2553
mbed_official 87:085cde657901 2554 /* Enable Crypto processor */
mbed_official 87:085cde657901 2555 __HAL_CRYP_ENABLE();
mbed_official 87:085cde657901 2556
mbed_official 87:085cde657901 2557 for(loopcounter = 0; (loopcounter < headersize); loopcounter+=16)
mbed_official 87:085cde657901 2558 {
mbed_official 87:085cde657901 2559 /* Get timeout */
mbed_official 87:085cde657901 2560 timeout = HAL_GetTick() + 1;
mbed_official 87:085cde657901 2561
mbed_official 87:085cde657901 2562 while(HAL_IS_BIT_CLR(CRYP->SR, CRYP_FLAG_IFEM))
mbed_official 87:085cde657901 2563 {
mbed_official 87:085cde657901 2564 /* Check for the Timeout */
mbed_official 87:085cde657901 2565 if(HAL_GetTick() >= timeout)
mbed_official 87:085cde657901 2566 {
mbed_official 87:085cde657901 2567 /* Change state */
mbed_official 87:085cde657901 2568 hcryp->State = HAL_CRYP_STATE_TIMEOUT;
mbed_official 87:085cde657901 2569
mbed_official 87:085cde657901 2570 /* Process Unlocked */
mbed_official 87:085cde657901 2571 __HAL_UNLOCK(hcryp);
mbed_official 87:085cde657901 2572
mbed_official 87:085cde657901 2573 return HAL_TIMEOUT;
mbed_official 87:085cde657901 2574 }
mbed_official 87:085cde657901 2575 }
mbed_official 87:085cde657901 2576 /* Write the header block in the IN FIFO */
mbed_official 87:085cde657901 2577 CRYP->DR = *(uint32_t*)(headeraddr);
mbed_official 87:085cde657901 2578 headeraddr+=4;
mbed_official 87:085cde657901 2579 CRYP->DR = *(uint32_t*)(headeraddr);
mbed_official 87:085cde657901 2580 headeraddr+=4;
mbed_official 87:085cde657901 2581 CRYP->DR = *(uint32_t*)(headeraddr);
mbed_official 87:085cde657901 2582 headeraddr+=4;
mbed_official 87:085cde657901 2583 CRYP->DR = *(uint32_t*)(headeraddr);
mbed_official 87:085cde657901 2584 headeraddr+=4;
mbed_official 87:085cde657901 2585 }
mbed_official 87:085cde657901 2586
mbed_official 87:085cde657901 2587 /* Get timeout */
mbed_official 87:085cde657901 2588 timeout = HAL_GetTick() + 1;
mbed_official 87:085cde657901 2589
mbed_official 87:085cde657901 2590 while((CRYP->SR & CRYP_FLAG_BUSY) == CRYP_FLAG_BUSY)
mbed_official 87:085cde657901 2591 {
mbed_official 87:085cde657901 2592 /* Check for the Timeout */
mbed_official 87:085cde657901 2593 if(HAL_GetTick() >= timeout)
mbed_official 87:085cde657901 2594 {
mbed_official 87:085cde657901 2595 /* Change state */
mbed_official 87:085cde657901 2596 hcryp->State = HAL_CRYP_STATE_TIMEOUT;
mbed_official 87:085cde657901 2597
mbed_official 87:085cde657901 2598 /* Process Unlocked */
mbed_official 87:085cde657901 2599 __HAL_UNLOCK(hcryp);
mbed_official 87:085cde657901 2600
mbed_official 87:085cde657901 2601 return HAL_TIMEOUT;
mbed_official 87:085cde657901 2602 }
mbed_official 87:085cde657901 2603 }
mbed_official 87:085cde657901 2604 }
mbed_official 87:085cde657901 2605 /* Save formatted counter into the scratch buffer pScratch */
mbed_official 87:085cde657901 2606 for(loopcounter = 0; (loopcounter < 16); loopcounter++)
mbed_official 87:085cde657901 2607 {
mbed_official 87:085cde657901 2608 hcryp->Init.pScratch[loopcounter] = ctr[loopcounter];
mbed_official 87:085cde657901 2609 }
mbed_official 87:085cde657901 2610 /* Reset bit 0 */
mbed_official 87:085cde657901 2611 hcryp->Init.pScratch[15] &= 0xfe;
mbed_official 87:085cde657901 2612 /* Select payload phase once the header phase is performed */
mbed_official 87:085cde657901 2613 __HAL_CRYP_SET_PHASE(CRYP_PHASE_PAYLOAD);
mbed_official 87:085cde657901 2614
mbed_official 87:085cde657901 2615 /* Flush FIFO */
mbed_official 87:085cde657901 2616 __HAL_CRYP_FIFO_FLUSH();
mbed_official 87:085cde657901 2617
mbed_official 87:085cde657901 2618 /* Set the phase */
mbed_official 87:085cde657901 2619 hcryp->Phase = HAL_CRYP_PHASE_PROCESS;
mbed_official 87:085cde657901 2620 }
mbed_official 87:085cde657901 2621 /* Set the input and output addresses and start DMA transfer */
mbed_official 87:085cde657901 2622 CRYPEx_GCMCCM_SetDMAConfig(hcryp, inputaddr, Size, outputaddr);
mbed_official 87:085cde657901 2623
mbed_official 87:085cde657901 2624 /* Unlock process */
mbed_official 87:085cde657901 2625 __HAL_UNLOCK(hcryp);
mbed_official 87:085cde657901 2626
mbed_official 87:085cde657901 2627 /* Return function status */
mbed_official 87:085cde657901 2628 return HAL_OK;
mbed_official 87:085cde657901 2629 }
mbed_official 87:085cde657901 2630 else
mbed_official 87:085cde657901 2631 {
mbed_official 87:085cde657901 2632 return HAL_ERROR;
mbed_official 87:085cde657901 2633 }
mbed_official 87:085cde657901 2634 }
mbed_official 87:085cde657901 2635
mbed_official 87:085cde657901 2636 /**
mbed_official 87:085cde657901 2637 * @brief This function handles CRYP interrupt request.
mbed_official 226:b062af740e40 2638 * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
mbed_official 226:b062af740e40 2639 * the configuration information for CRYP module
mbed_official 87:085cde657901 2640 * @retval None
mbed_official 87:085cde657901 2641 */
mbed_official 87:085cde657901 2642 void HAL_CRYPEx_GCMCCM_IRQHandler(CRYP_HandleTypeDef *hcryp)
mbed_official 87:085cde657901 2643 {
mbed_official 87:085cde657901 2644 switch(CRYP->CR & CRYP_CR_ALGOMODE_DIRECTION)
mbed_official 87:085cde657901 2645 {
mbed_official 87:085cde657901 2646 case CRYP_CR_ALGOMODE_AES_GCM_ENCRYPT:
mbed_official 87:085cde657901 2647 HAL_CRYPEx_AESGCM_Encrypt_IT(hcryp, NULL, 0, NULL);
mbed_official 87:085cde657901 2648 break;
mbed_official 87:085cde657901 2649
mbed_official 87:085cde657901 2650 case CRYP_CR_ALGOMODE_AES_GCM_DECRYPT:
mbed_official 87:085cde657901 2651 HAL_CRYPEx_AESGCM_Decrypt_IT(hcryp, NULL, 0, NULL);
mbed_official 87:085cde657901 2652 break;
mbed_official 87:085cde657901 2653
mbed_official 87:085cde657901 2654 case CRYP_CR_ALGOMODE_AES_CCM_ENCRYPT:
mbed_official 87:085cde657901 2655 HAL_CRYPEx_AESCCM_Encrypt_IT(hcryp, NULL, 0, NULL);
mbed_official 87:085cde657901 2656 break;
mbed_official 87:085cde657901 2657
mbed_official 87:085cde657901 2658 case CRYP_CR_ALGOMODE_AES_CCM_DECRYPT:
mbed_official 87:085cde657901 2659 HAL_CRYPEx_AESCCM_Decrypt_IT(hcryp, NULL, 0, NULL);
mbed_official 87:085cde657901 2660 break;
mbed_official 87:085cde657901 2661
mbed_official 87:085cde657901 2662 default:
mbed_official 87:085cde657901 2663 break;
mbed_official 87:085cde657901 2664 }
mbed_official 87:085cde657901 2665 }
mbed_official 87:085cde657901 2666
mbed_official 87:085cde657901 2667 /**
mbed_official 87:085cde657901 2668 * @}
mbed_official 87:085cde657901 2669 */
mbed_official 87:085cde657901 2670
mbed_official 87:085cde657901 2671 /**
mbed_official 87:085cde657901 2672 * @brief DMA CRYP Input Data process complete callback.
mbed_official 87:085cde657901 2673 * @param hdma: DMA handle
mbed_official 87:085cde657901 2674 * @retval None
mbed_official 87:085cde657901 2675 */
mbed_official 87:085cde657901 2676 static void CRYPEx_GCMCCM_DMAInCplt(DMA_HandleTypeDef *hdma)
mbed_official 87:085cde657901 2677 {
mbed_official 87:085cde657901 2678 CRYP_HandleTypeDef* hcryp = ( CRYP_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
mbed_official 87:085cde657901 2679
mbed_official 87:085cde657901 2680 /* Disable the DMA transfer for input Fifo request by resetting the DIEN bit
mbed_official 87:085cde657901 2681 in the DMACR register */
mbed_official 87:085cde657901 2682 CRYP->DMACR &= (uint32_t)(~CRYP_DMACR_DIEN);
mbed_official 87:085cde657901 2683
mbed_official 87:085cde657901 2684 /* Call input data transfer complete callback */
mbed_official 87:085cde657901 2685 HAL_CRYP_InCpltCallback(hcryp);
mbed_official 87:085cde657901 2686 }
mbed_official 87:085cde657901 2687
mbed_official 87:085cde657901 2688 /**
mbed_official 87:085cde657901 2689 * @brief DMA CRYP Output Data process complete callback.
mbed_official 87:085cde657901 2690 * @param hdma: DMA handle
mbed_official 87:085cde657901 2691 * @retval None
mbed_official 87:085cde657901 2692 */
mbed_official 87:085cde657901 2693 static void CRYPEx_GCMCCM_DMAOutCplt(DMA_HandleTypeDef *hdma)
mbed_official 87:085cde657901 2694 {
mbed_official 87:085cde657901 2695 CRYP_HandleTypeDef* hcryp = ( CRYP_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
mbed_official 87:085cde657901 2696
mbed_official 87:085cde657901 2697 /* Disable the DMA transfer for output Fifo request by resetting the DOEN bit
mbed_official 87:085cde657901 2698 in the DMACR register */
mbed_official 87:085cde657901 2699 CRYP->DMACR &= (uint32_t)(~CRYP_DMACR_DOEN);
mbed_official 87:085cde657901 2700
mbed_official 87:085cde657901 2701 /* Enable the CRYP peripheral */
mbed_official 87:085cde657901 2702 __HAL_CRYP_DISABLE();
mbed_official 87:085cde657901 2703
mbed_official 87:085cde657901 2704 /* Change the CRYP peripheral state */
mbed_official 87:085cde657901 2705 hcryp->State = HAL_CRYP_STATE_READY;
mbed_official 87:085cde657901 2706
mbed_official 87:085cde657901 2707 /* Call output data transfer complete callback */
mbed_official 87:085cde657901 2708 HAL_CRYP_OutCpltCallback(hcryp);
mbed_official 87:085cde657901 2709 }
mbed_official 87:085cde657901 2710
mbed_official 87:085cde657901 2711 /**
mbed_official 87:085cde657901 2712 * @brief DMA CRYP communication error callback.
mbed_official 87:085cde657901 2713 * @param hdma: DMA handle
mbed_official 87:085cde657901 2714 * @retval None
mbed_official 87:085cde657901 2715 */
mbed_official 87:085cde657901 2716 static void CRYPEx_GCMCCM_DMAError(DMA_HandleTypeDef *hdma)
mbed_official 87:085cde657901 2717 {
mbed_official 87:085cde657901 2718 CRYP_HandleTypeDef* hcryp = ( CRYP_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
mbed_official 87:085cde657901 2719 hcryp->State= HAL_CRYP_STATE_READY;
mbed_official 87:085cde657901 2720 HAL_CRYP_ErrorCallback(hcryp);
mbed_official 87:085cde657901 2721 }
mbed_official 87:085cde657901 2722
mbed_official 87:085cde657901 2723 /**
mbed_official 87:085cde657901 2724 * @brief Writes the Key in Key registers.
mbed_official 226:b062af740e40 2725 * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
mbed_official 226:b062af740e40 2726 * the configuration information for CRYP module
mbed_official 87:085cde657901 2727 * @param Key: Pointer to Key buffer
mbed_official 87:085cde657901 2728 * @param KeySize: Size of Key
mbed_official 87:085cde657901 2729 * @retval None
mbed_official 87:085cde657901 2730 */
mbed_official 87:085cde657901 2731 static void CRYPEx_GCMCCM_SetKey(CRYP_HandleTypeDef *hcryp, uint8_t *Key, uint32_t KeySize)
mbed_official 87:085cde657901 2732 {
mbed_official 87:085cde657901 2733 uint32_t keyaddr = (uint32_t)Key;
mbed_official 87:085cde657901 2734
mbed_official 87:085cde657901 2735 switch(KeySize)
mbed_official 87:085cde657901 2736 {
mbed_official 87:085cde657901 2737 case CRYP_KEYSIZE_256B:
mbed_official 87:085cde657901 2738 /* Key Initialisation */
mbed_official 87:085cde657901 2739 CRYP->K0LR = __REV(*(uint32_t*)(keyaddr));
mbed_official 87:085cde657901 2740 keyaddr+=4;
mbed_official 87:085cde657901 2741 CRYP->K0RR = __REV(*(uint32_t*)(keyaddr));
mbed_official 87:085cde657901 2742 keyaddr+=4;
mbed_official 87:085cde657901 2743 CRYP->K1LR = __REV(*(uint32_t*)(keyaddr));
mbed_official 87:085cde657901 2744 keyaddr+=4;
mbed_official 87:085cde657901 2745 CRYP->K1RR = __REV(*(uint32_t*)(keyaddr));
mbed_official 87:085cde657901 2746 keyaddr+=4;
mbed_official 87:085cde657901 2747 CRYP->K2LR = __REV(*(uint32_t*)(keyaddr));
mbed_official 87:085cde657901 2748 keyaddr+=4;
mbed_official 87:085cde657901 2749 CRYP->K2RR = __REV(*(uint32_t*)(keyaddr));
mbed_official 87:085cde657901 2750 keyaddr+=4;
mbed_official 87:085cde657901 2751 CRYP->K3LR = __REV(*(uint32_t*)(keyaddr));
mbed_official 87:085cde657901 2752 keyaddr+=4;
mbed_official 87:085cde657901 2753 CRYP->K3RR = __REV(*(uint32_t*)(keyaddr));
mbed_official 87:085cde657901 2754 break;
mbed_official 87:085cde657901 2755 case CRYP_KEYSIZE_192B:
mbed_official 87:085cde657901 2756 CRYP->K1LR = __REV(*(uint32_t*)(keyaddr));
mbed_official 87:085cde657901 2757 keyaddr+=4;
mbed_official 87:085cde657901 2758 CRYP->K1RR = __REV(*(uint32_t*)(keyaddr));
mbed_official 87:085cde657901 2759 keyaddr+=4;
mbed_official 87:085cde657901 2760 CRYP->K2LR = __REV(*(uint32_t*)(keyaddr));
mbed_official 87:085cde657901 2761 keyaddr+=4;
mbed_official 87:085cde657901 2762 CRYP->K2RR = __REV(*(uint32_t*)(keyaddr));
mbed_official 87:085cde657901 2763 keyaddr+=4;
mbed_official 87:085cde657901 2764 CRYP->K3LR = __REV(*(uint32_t*)(keyaddr));
mbed_official 87:085cde657901 2765 keyaddr+=4;
mbed_official 87:085cde657901 2766 CRYP->K3RR = __REV(*(uint32_t*)(keyaddr));
mbed_official 87:085cde657901 2767 break;
mbed_official 87:085cde657901 2768 case CRYP_KEYSIZE_128B:
mbed_official 87:085cde657901 2769 CRYP->K2LR = __REV(*(uint32_t*)(keyaddr));
mbed_official 87:085cde657901 2770 keyaddr+=4;
mbed_official 87:085cde657901 2771 CRYP->K2RR = __REV(*(uint32_t*)(keyaddr));
mbed_official 87:085cde657901 2772 keyaddr+=4;
mbed_official 87:085cde657901 2773 CRYP->K3LR = __REV(*(uint32_t*)(keyaddr));
mbed_official 87:085cde657901 2774 keyaddr+=4;
mbed_official 87:085cde657901 2775 CRYP->K3RR = __REV(*(uint32_t*)(keyaddr));
mbed_official 87:085cde657901 2776 break;
mbed_official 87:085cde657901 2777 default:
mbed_official 87:085cde657901 2778 break;
mbed_official 87:085cde657901 2779 }
mbed_official 87:085cde657901 2780 }
mbed_official 87:085cde657901 2781
mbed_official 87:085cde657901 2782 /**
mbed_official 87:085cde657901 2783 * @brief Writes the InitVector/InitCounter in IV registers.
mbed_official 226:b062af740e40 2784 * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
mbed_official 226:b062af740e40 2785 * the configuration information for CRYP module
mbed_official 87:085cde657901 2786 * @param InitVector: Pointer to InitVector/InitCounter buffer
mbed_official 87:085cde657901 2787 * @param IVSize: Size of the InitVector/InitCounter
mbed_official 87:085cde657901 2788 * @retval None
mbed_official 87:085cde657901 2789 */
mbed_official 87:085cde657901 2790 static void CRYPEx_GCMCCM_SetInitVector(CRYP_HandleTypeDef *hcryp, uint8_t *InitVector, uint32_t IVSize)
mbed_official 87:085cde657901 2791 {
mbed_official 87:085cde657901 2792 uint32_t ivaddr = (uint32_t)InitVector;
mbed_official 87:085cde657901 2793
mbed_official 87:085cde657901 2794 switch(IVSize)
mbed_official 87:085cde657901 2795 {
mbed_official 87:085cde657901 2796 case CRYP_KEYSIZE_128B:
mbed_official 87:085cde657901 2797 CRYP->IV0LR = __REV(*(uint32_t*)(ivaddr));
mbed_official 87:085cde657901 2798 ivaddr+=4;
mbed_official 87:085cde657901 2799 CRYP->IV0RR = __REV(*(uint32_t*)(ivaddr));
mbed_official 87:085cde657901 2800 ivaddr+=4;
mbed_official 87:085cde657901 2801 CRYP->IV1LR = __REV(*(uint32_t*)(ivaddr));
mbed_official 87:085cde657901 2802 ivaddr+=4;
mbed_official 87:085cde657901 2803 CRYP->IV1RR = __REV(*(uint32_t*)(ivaddr));
mbed_official 87:085cde657901 2804 break;
mbed_official 87:085cde657901 2805 /* Whatever key size 192 or 256, Init vector is written in IV0LR and IV0RR */
mbed_official 87:085cde657901 2806 case CRYP_KEYSIZE_192B:
mbed_official 87:085cde657901 2807 CRYP->IV0LR = __REV(*(uint32_t*)(ivaddr));
mbed_official 87:085cde657901 2808 ivaddr+=4;
mbed_official 87:085cde657901 2809 CRYP->IV0RR = __REV(*(uint32_t*)(ivaddr));
mbed_official 87:085cde657901 2810 break;
mbed_official 87:085cde657901 2811 case CRYP_KEYSIZE_256B:
mbed_official 87:085cde657901 2812 CRYP->IV0LR = __REV(*(uint32_t*)(ivaddr));
mbed_official 87:085cde657901 2813 ivaddr+=4;
mbed_official 87:085cde657901 2814 CRYP->IV0RR = __REV(*(uint32_t*)(ivaddr));
mbed_official 87:085cde657901 2815 break;
mbed_official 87:085cde657901 2816 default:
mbed_official 87:085cde657901 2817 break;
mbed_official 87:085cde657901 2818 }
mbed_official 87:085cde657901 2819 }
mbed_official 87:085cde657901 2820
mbed_official 87:085cde657901 2821 /**
mbed_official 87:085cde657901 2822 * @brief Process Data: Writes Input data in polling mode and read the Output data.
mbed_official 226:b062af740e40 2823 * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
mbed_official 226:b062af740e40 2824 * the configuration information for CRYP module
mbed_official 87:085cde657901 2825 * @param Input: Pointer to the Input buffer.
mbed_official 87:085cde657901 2826 * @param Ilength: Length of the Input buffer, must be a multiple of 16
mbed_official 87:085cde657901 2827 * @param Output: Pointer to the returned buffer
mbed_official 87:085cde657901 2828 * @param Timeout: Timeout value
mbed_official 87:085cde657901 2829 * @retval None
mbed_official 87:085cde657901 2830 */
mbed_official 87:085cde657901 2831 static HAL_StatusTypeDef CRYPEx_GCMCCM_ProcessData(CRYP_HandleTypeDef *hcryp, uint8_t *Input, uint16_t Ilength, uint8_t *Output, uint32_t Timeout)
mbed_official 87:085cde657901 2832 {
mbed_official 87:085cde657901 2833 uint32_t timeout = 0;
mbed_official 87:085cde657901 2834 uint32_t i = 0;
mbed_official 87:085cde657901 2835 uint32_t inputaddr = (uint32_t)Input;
mbed_official 87:085cde657901 2836 uint32_t outputaddr = (uint32_t)Output;
mbed_official 87:085cde657901 2837
mbed_official 87:085cde657901 2838 for(i=0; (i < Ilength); i+=16)
mbed_official 87:085cde657901 2839 {
mbed_official 87:085cde657901 2840 /* Write the Input block in the IN FIFO */
mbed_official 87:085cde657901 2841 CRYP->DR = *(uint32_t*)(inputaddr);
mbed_official 87:085cde657901 2842 inputaddr+=4;
mbed_official 87:085cde657901 2843 CRYP->DR = *(uint32_t*)(inputaddr);
mbed_official 87:085cde657901 2844 inputaddr+=4;
mbed_official 87:085cde657901 2845 CRYP->DR = *(uint32_t*)(inputaddr);
mbed_official 87:085cde657901 2846 inputaddr+=4;
mbed_official 87:085cde657901 2847 CRYP->DR = *(uint32_t*)(inputaddr);
mbed_official 87:085cde657901 2848 inputaddr+=4;
mbed_official 87:085cde657901 2849
mbed_official 87:085cde657901 2850 /* Get timeout */
mbed_official 87:085cde657901 2851 timeout = HAL_GetTick() + Timeout;
mbed_official 87:085cde657901 2852
mbed_official 87:085cde657901 2853 while(HAL_IS_BIT_CLR(CRYP->SR, CRYP_FLAG_OFNE))
mbed_official 87:085cde657901 2854 {
mbed_official 87:085cde657901 2855 /* Check for the Timeout */
mbed_official 87:085cde657901 2856 if(Timeout != HAL_MAX_DELAY)
mbed_official 87:085cde657901 2857 {
mbed_official 87:085cde657901 2858 if(HAL_GetTick() >= timeout)
mbed_official 87:085cde657901 2859 {
mbed_official 87:085cde657901 2860 /* Change state */
mbed_official 87:085cde657901 2861 hcryp->State = HAL_CRYP_STATE_TIMEOUT;
mbed_official 87:085cde657901 2862
mbed_official 87:085cde657901 2863 /* Process Unlocked */
mbed_official 87:085cde657901 2864 __HAL_UNLOCK(hcryp);
mbed_official 87:085cde657901 2865
mbed_official 87:085cde657901 2866 return HAL_TIMEOUT;
mbed_official 87:085cde657901 2867 }
mbed_official 87:085cde657901 2868 }
mbed_official 87:085cde657901 2869 }
mbed_official 87:085cde657901 2870 /* Read the Output block from the OUT FIFO */
mbed_official 87:085cde657901 2871 *(uint32_t*)(outputaddr) = CRYP->DOUT;
mbed_official 87:085cde657901 2872 outputaddr+=4;
mbed_official 87:085cde657901 2873 *(uint32_t*)(outputaddr) = CRYP->DOUT;
mbed_official 87:085cde657901 2874 outputaddr+=4;
mbed_official 87:085cde657901 2875 *(uint32_t*)(outputaddr) = CRYP->DOUT;
mbed_official 87:085cde657901 2876 outputaddr+=4;
mbed_official 87:085cde657901 2877 *(uint32_t*)(outputaddr) = CRYP->DOUT;
mbed_official 87:085cde657901 2878 outputaddr+=4;
mbed_official 87:085cde657901 2879 }
mbed_official 87:085cde657901 2880 /* Return function status */
mbed_official 87:085cde657901 2881 return HAL_OK;
mbed_official 87:085cde657901 2882 }
mbed_official 87:085cde657901 2883
mbed_official 87:085cde657901 2884 /**
mbed_official 87:085cde657901 2885 * @brief Sets the header phase
mbed_official 226:b062af740e40 2886 * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
mbed_official 226:b062af740e40 2887 * the configuration information for CRYP module
mbed_official 87:085cde657901 2888 * @param Input: Pointer to the Input buffer.
mbed_official 87:085cde657901 2889 * @param Ilength: Length of the Input buffer, must be a multiple of 16
mbed_official 87:085cde657901 2890 * @param Timeout: Timeout value
mbed_official 87:085cde657901 2891 * @retval None
mbed_official 87:085cde657901 2892 */
mbed_official 87:085cde657901 2893 static HAL_StatusTypeDef CRYPEx_GCMCCM_SetHeaderPhase(CRYP_HandleTypeDef *hcryp, uint8_t* Input, uint16_t Ilength, uint32_t Timeout)
mbed_official 87:085cde657901 2894 {
mbed_official 87:085cde657901 2895 uint32_t timeout = 0;
mbed_official 87:085cde657901 2896 uint32_t loopcounter = 0;
mbed_official 87:085cde657901 2897 uint32_t headeraddr = (uint32_t)Input;
mbed_official 87:085cde657901 2898
mbed_official 87:085cde657901 2899 /***************************** Header phase *********************************/
mbed_official 87:085cde657901 2900 if(hcryp->Init.HeaderSize != 0)
mbed_official 87:085cde657901 2901 {
mbed_official 87:085cde657901 2902 /* Select header phase */
mbed_official 87:085cde657901 2903 __HAL_CRYP_SET_PHASE(CRYP_PHASE_HEADER);
mbed_official 87:085cde657901 2904 /* Enable the CRYP peripheral */
mbed_official 87:085cde657901 2905 __HAL_CRYP_ENABLE();
mbed_official 87:085cde657901 2906
mbed_official 87:085cde657901 2907 for(loopcounter = 0; (loopcounter < hcryp->Init.HeaderSize); loopcounter+=16)
mbed_official 87:085cde657901 2908 {
mbed_official 87:085cde657901 2909 /* Get timeout */
mbed_official 87:085cde657901 2910 timeout = HAL_GetTick() + Timeout;
mbed_official 87:085cde657901 2911
mbed_official 87:085cde657901 2912 while(HAL_IS_BIT_CLR(CRYP->SR, CRYP_FLAG_IFEM))
mbed_official 87:085cde657901 2913 {
mbed_official 87:085cde657901 2914 /* Check for the Timeout */
mbed_official 87:085cde657901 2915 if(Timeout != HAL_MAX_DELAY)
mbed_official 87:085cde657901 2916 {
mbed_official 87:085cde657901 2917 if(HAL_GetTick() >= timeout)
mbed_official 87:085cde657901 2918 {
mbed_official 87:085cde657901 2919 /* Change state */
mbed_official 87:085cde657901 2920 hcryp->State = HAL_CRYP_STATE_TIMEOUT;
mbed_official 87:085cde657901 2921
mbed_official 87:085cde657901 2922 /* Process Unlocked */
mbed_official 87:085cde657901 2923 __HAL_UNLOCK(hcryp);
mbed_official 87:085cde657901 2924
mbed_official 87:085cde657901 2925 return HAL_TIMEOUT;
mbed_official 87:085cde657901 2926 }
mbed_official 87:085cde657901 2927 }
mbed_official 87:085cde657901 2928 }
mbed_official 87:085cde657901 2929 /* Write the Input block in the IN FIFO */
mbed_official 87:085cde657901 2930 CRYP->DR = *(uint32_t*)(headeraddr);
mbed_official 87:085cde657901 2931 headeraddr+=4;
mbed_official 87:085cde657901 2932 CRYP->DR = *(uint32_t*)(headeraddr);
mbed_official 87:085cde657901 2933 headeraddr+=4;
mbed_official 87:085cde657901 2934 CRYP->DR = *(uint32_t*)(headeraddr);
mbed_official 87:085cde657901 2935 headeraddr+=4;
mbed_official 87:085cde657901 2936 CRYP->DR = *(uint32_t*)(headeraddr);
mbed_official 87:085cde657901 2937 headeraddr+=4;
mbed_official 87:085cde657901 2938 }
mbed_official 87:085cde657901 2939
mbed_official 87:085cde657901 2940 /* Wait until the complete message has been processed */
mbed_official 87:085cde657901 2941
mbed_official 87:085cde657901 2942 /* Get timeout */
mbed_official 87:085cde657901 2943 timeout = HAL_GetTick() + Timeout;
mbed_official 87:085cde657901 2944
mbed_official 87:085cde657901 2945 while((CRYP->SR & CRYP_FLAG_BUSY) == CRYP_FLAG_BUSY)
mbed_official 87:085cde657901 2946 {
mbed_official 87:085cde657901 2947 /* Check for the Timeout */
mbed_official 87:085cde657901 2948 if(Timeout != HAL_MAX_DELAY)
mbed_official 87:085cde657901 2949 {
mbed_official 87:085cde657901 2950 if(HAL_GetTick() >= timeout)
mbed_official 87:085cde657901 2951 {
mbed_official 87:085cde657901 2952 /* Change state */
mbed_official 87:085cde657901 2953 hcryp->State = HAL_CRYP_STATE_TIMEOUT;
mbed_official 87:085cde657901 2954
mbed_official 87:085cde657901 2955 /* Process Unlocked */
mbed_official 87:085cde657901 2956 __HAL_UNLOCK(hcryp);
mbed_official 87:085cde657901 2957
mbed_official 87:085cde657901 2958 return HAL_TIMEOUT;
mbed_official 87:085cde657901 2959 }
mbed_official 87:085cde657901 2960 }
mbed_official 87:085cde657901 2961 }
mbed_official 87:085cde657901 2962 }
mbed_official 87:085cde657901 2963 /* Return function status */
mbed_official 87:085cde657901 2964 return HAL_OK;
mbed_official 87:085cde657901 2965 }
mbed_official 87:085cde657901 2966
mbed_official 87:085cde657901 2967 /**
mbed_official 87:085cde657901 2968 * @brief Sets the DMA configuration and start the DMA transfert.
mbed_official 226:b062af740e40 2969 * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
mbed_official 226:b062af740e40 2970 * the configuration information for CRYP module
mbed_official 87:085cde657901 2971 * @param inputaddr: Address of the Input buffer
mbed_official 87:085cde657901 2972 * @param Size: Size of the Input buffer, must be a multiple of 16
mbed_official 87:085cde657901 2973 * @param outputaddr: Address of the Output buffer
mbed_official 87:085cde657901 2974 * @retval None
mbed_official 87:085cde657901 2975 */
mbed_official 87:085cde657901 2976 static void CRYPEx_GCMCCM_SetDMAConfig(CRYP_HandleTypeDef *hcryp, uint32_t inputaddr, uint16_t Size, uint32_t outputaddr)
mbed_official 87:085cde657901 2977 {
mbed_official 87:085cde657901 2978 /* Set the CRYP DMA transfer complete callback */
mbed_official 87:085cde657901 2979 hcryp->hdmain->XferCpltCallback = CRYPEx_GCMCCM_DMAInCplt;
mbed_official 87:085cde657901 2980 /* Set the DMA error callback */
mbed_official 87:085cde657901 2981 hcryp->hdmain->XferErrorCallback = CRYPEx_GCMCCM_DMAError;
mbed_official 87:085cde657901 2982
mbed_official 87:085cde657901 2983 /* Set the CRYP DMA transfer complete callback */
mbed_official 87:085cde657901 2984 hcryp->hdmaout->XferCpltCallback = CRYPEx_GCMCCM_DMAOutCplt;
mbed_official 87:085cde657901 2985 /* Set the DMA error callback */
mbed_official 87:085cde657901 2986 hcryp->hdmaout->XferErrorCallback = CRYPEx_GCMCCM_DMAError;
mbed_official 87:085cde657901 2987
mbed_official 87:085cde657901 2988 /* Enable the CRYP peripheral */
mbed_official 87:085cde657901 2989 __HAL_CRYP_ENABLE();
mbed_official 87:085cde657901 2990
mbed_official 87:085cde657901 2991 /* Enable the DMA In DMA Stream */
mbed_official 87:085cde657901 2992 HAL_DMA_Start_IT(hcryp->hdmain, inputaddr, (uint32_t)&CRYP->DR, Size/4);
mbed_official 87:085cde657901 2993
mbed_official 87:085cde657901 2994 /* Enable In DMA request */
mbed_official 87:085cde657901 2995 CRYP->DMACR = CRYP_DMACR_DIEN;
mbed_official 87:085cde657901 2996
mbed_official 87:085cde657901 2997 /* Enable the DMA Out DMA Stream */
mbed_official 87:085cde657901 2998 HAL_DMA_Start_IT(hcryp->hdmaout, (uint32_t)&CRYP->DOUT, outputaddr, Size/4);
mbed_official 87:085cde657901 2999
mbed_official 87:085cde657901 3000 /* Enable Out DMA request */
mbed_official 87:085cde657901 3001 CRYP->DMACR |= CRYP_DMACR_DOEN;
mbed_official 87:085cde657901 3002 }
mbed_official 87:085cde657901 3003
mbed_official 87:085cde657901 3004 /**
mbed_official 87:085cde657901 3005 * @}
mbed_official 87:085cde657901 3006 */
mbed_official 87:085cde657901 3007 #endif /* STM32F437xx || STM32F439xx */
mbed_official 87:085cde657901 3008
mbed_official 87:085cde657901 3009 #endif /* HAL_CRYP_MODULE_ENABLED */
mbed_official 87:085cde657901 3010 /**
mbed_official 87:085cde657901 3011 * @}
mbed_official 87:085cde657901 3012 */
mbed_official 87:085cde657901 3013
mbed_official 87:085cde657901 3014 /**
mbed_official 87:085cde657901 3015 * @}
mbed_official 87:085cde657901 3016 */
mbed_official 87:085cde657901 3017
mbed_official 87:085cde657901 3018 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/