shao ziyang / mbed-src-kl05

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targets/cmsis/TARGET_STM/TARGET_NUCLEO_F334R8/stm32f3xx_hal_dma.h@323:9e901b0a5aa1, 2014-09-13 (annotated)

Committer:
shaoziyang
Date:
Sat Sep 13 14:25:46 2014 +0000
Revision:
323:9e901b0a5aa1
Parent:
237:f3da66175598 
test with CLOCK_SETUP = 0

Who changed what in which revision?

UserRevisionLine numberNew contents of line
mbed_official 237:f3da66175598 1 /**
mbed_official 237:f3da66175598 2 ******************************************************************************
mbed_official 237:f3da66175598 3 * @file stm32f3xx_hal_dma.h
mbed_official 237:f3da66175598 4 * @author MCD Application Team
mbed_official 237:f3da66175598 5 * @version V1.0.1
mbed_official 237:f3da66175598 6 * @date 18-June-2014
mbed_official 237:f3da66175598 7 * @brief Header file of DMA HAL module.
mbed_official 237:f3da66175598 8 ******************************************************************************
mbed_official 237:f3da66175598 9 * @attention
mbed_official 237:f3da66175598 10 *
mbed_official 237:f3da66175598 11 * <h2><center>&copy; COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
mbed_official 237:f3da66175598 12 *
mbed_official 237:f3da66175598 13 * Redistribution and use in source and binary forms, with or without modification,
mbed_official 237:f3da66175598 14 * are permitted provided that the following conditions are met:
mbed_official 237:f3da66175598 15 * 1. Redistributions of source code must retain the above copyright notice,
mbed_official 237:f3da66175598 16 * this list of conditions and the following disclaimer.
mbed_official 237:f3da66175598 17 * 2. Redistributions in binary form must reproduce the above copyright notice,
mbed_official 237:f3da66175598 18 * this list of conditions and the following disclaimer in the documentation
mbed_official 237:f3da66175598 19 * and/or other materials provided with the distribution.
mbed_official 237:f3da66175598 20 * 3. Neither the name of STMicroelectronics nor the names of its contributors
mbed_official 237:f3da66175598 21 * may be used to endorse or promote products derived from this software
mbed_official 237:f3da66175598 22 * without specific prior written permission.
mbed_official 237:f3da66175598 23 *
mbed_official 237:f3da66175598 24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
mbed_official 237:f3da66175598 25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
mbed_official 237:f3da66175598 26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
mbed_official 237:f3da66175598 27 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
mbed_official 237:f3da66175598 28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
mbed_official 237:f3da66175598 29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
mbed_official 237:f3da66175598 30 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
mbed_official 237:f3da66175598 31 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
mbed_official 237:f3da66175598 32 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
mbed_official 237:f3da66175598 33 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
mbed_official 237:f3da66175598 34 *
mbed_official 237:f3da66175598 35 ******************************************************************************
mbed_official 237:f3da66175598 36 */
mbed_official 237:f3da66175598 37
mbed_official 237:f3da66175598 38 /* Define to prevent recursive inclusion -------------------------------------*/
mbed_official 237:f3da66175598 39 #ifndef __STM32F3xx_HAL_DMA_H
mbed_official 237:f3da66175598 40 #define __STM32F3xx_HAL_DMA_H
mbed_official 237:f3da66175598 41
mbed_official 237:f3da66175598 42 #ifdef __cplusplus
mbed_official 237:f3da66175598 43 extern "C" {
mbed_official 237:f3da66175598 44 #endif
mbed_official 237:f3da66175598 45
mbed_official 237:f3da66175598 46 /* Includes ------------------------------------------------------------------*/
mbed_official 237:f3da66175598 47 #include "stm32f3xx_hal_def.h"
mbed_official 237:f3da66175598 48
mbed_official 237:f3da66175598 49 /** @addtogroup STM32F3xx_HAL_Driver
mbed_official 237:f3da66175598 50 * @{
mbed_official 237:f3da66175598 51 */
mbed_official 237:f3da66175598 52
mbed_official 237:f3da66175598 53 /** @addtogroup DMA
mbed_official 237:f3da66175598 54 * @{
mbed_official 237:f3da66175598 55 */
mbed_official 237:f3da66175598 56
mbed_official 237:f3da66175598 57 /* Exported types ------------------------------------------------------------*/
mbed_official 237:f3da66175598 58
mbed_official 237:f3da66175598 59 /**
mbed_official 237:f3da66175598 60 * @brief DMA Configuration Structure definition
mbed_official 237:f3da66175598 61 */
mbed_official 237:f3da66175598 62 typedef struct
mbed_official 237:f3da66175598 63 {
mbed_official 237:f3da66175598 64 uint32_t Direction; /*!< Specifies if the data will be transferred from memory to peripheral,
mbed_official 237:f3da66175598 65 from memory to memory or from peripheral to memory.
mbed_official 237:f3da66175598 66 This parameter can be a value of @ref DMA_Data_transfer_direction */
mbed_official 237:f3da66175598 67
mbed_official 237:f3da66175598 68 uint32_t PeriphInc; /*!< Specifies whether the Peripheral address register should be incremented or not.
mbed_official 237:f3da66175598 69 This parameter can be a value of @ref DMA_Peripheral_incremented_mode */
mbed_official 237:f3da66175598 70
mbed_official 237:f3da66175598 71 uint32_t MemInc; /*!< Specifies whether the memory address register should be incremented or not.
mbed_official 237:f3da66175598 72 This parameter can be a value of @ref DMA_Memory_incremented_mode */
mbed_official 237:f3da66175598 73
mbed_official 237:f3da66175598 74 uint32_t PeriphDataAlignment; /*!< Specifies the Peripheral data width.
mbed_official 237:f3da66175598 75 This parameter can be a value of @ref DMA_Peripheral_data_size */
mbed_official 237:f3da66175598 76
mbed_official 237:f3da66175598 77 uint32_t MemDataAlignment; /*!< Specifies the Memory data width.
mbed_official 237:f3da66175598 78 This parameter can be a value of @ref DMA_Memory_data_size */
mbed_official 237:f3da66175598 79
mbed_official 237:f3da66175598 80 uint32_t Mode; /*!< Specifies the operation mode of the DMAy Channelx.
mbed_official 237:f3da66175598 81 This parameter can be a value of @ref DMA_mode
mbed_official 237:f3da66175598 82 @note The circular buffer mode cannot be used if the memory-to-memory
mbed_official 237:f3da66175598 83 data transfer is configured on the selected Channel */
mbed_official 237:f3da66175598 84
mbed_official 237:f3da66175598 85 uint32_t Priority; /*!< Specifies the software priority for the DMAy Channelx.
mbed_official 237:f3da66175598 86 This parameter can be a value of @ref DMA_Priority_level */
mbed_official 237:f3da66175598 87
mbed_official 237:f3da66175598 88 } DMA_InitTypeDef;
mbed_official 237:f3da66175598 89
mbed_official 237:f3da66175598 90 /**
mbed_official 237:f3da66175598 91 * @brief DMA Configuration enumeration values definition
mbed_official 237:f3da66175598 92 */
mbed_official 237:f3da66175598 93 typedef enum
mbed_official 237:f3da66175598 94 {
mbed_official 237:f3da66175598 95 DMA_MODE = 0, /*!< Control related DMA mode Parameter in DMA_InitTypeDef */
mbed_official 237:f3da66175598 96 DMA_PRIORITY = 1, /*!< Control related priority level Parameter in DMA_InitTypeDef */
mbed_official 237:f3da66175598 97
mbed_official 237:f3da66175598 98 } DMA_ControlTypeDef;
mbed_official 237:f3da66175598 99
mbed_official 237:f3da66175598 100 /**
mbed_official 237:f3da66175598 101 * @brief HAL DMA State structures definition
mbed_official 237:f3da66175598 102 */
mbed_official 237:f3da66175598 103 typedef enum
mbed_official 237:f3da66175598 104 {
mbed_official 237:f3da66175598 105 HAL_DMA_STATE_RESET = 0x00, /*!< DMA not yet initialized or disabled */
mbed_official 237:f3da66175598 106 HAL_DMA_STATE_READY = 0x01, /*!< DMA process success and ready for use */
mbed_official 237:f3da66175598 107 HAL_DMA_STATE_READY_HALF = 0x11, /*!< DMA Half process success */
mbed_official 237:f3da66175598 108 HAL_DMA_STATE_BUSY = 0x02, /*!< DMA process is ongoing */
mbed_official 237:f3da66175598 109 HAL_DMA_STATE_TIMEOUT = 0x03, /*!< DMA timeout state */
mbed_official 237:f3da66175598 110 HAL_DMA_STATE_ERROR = 0x04, /*!< DMA error state */
mbed_official 237:f3da66175598 111
mbed_official 237:f3da66175598 112 }HAL_DMA_StateTypeDef;
mbed_official 237:f3da66175598 113
mbed_official 237:f3da66175598 114 /**
mbed_official 237:f3da66175598 115 * @brief HAL DMA Error Code structure definition
mbed_official 237:f3da66175598 116 */
mbed_official 237:f3da66175598 117 typedef enum
mbed_official 237:f3da66175598 118 {
mbed_official 237:f3da66175598 119 HAL_DMA_FULL_TRANSFER = 0x00, /*!< Full transfer */
mbed_official 237:f3da66175598 120 HAL_DMA_HALF_TRANSFER = 0x01, /*!< Half Transfer */
mbed_official 237:f3da66175598 121
mbed_official 237:f3da66175598 122 }HAL_DMA_LevelCompleteTypeDef;
mbed_official 237:f3da66175598 123
mbed_official 237:f3da66175598 124
mbed_official 237:f3da66175598 125 /**
mbed_official 237:f3da66175598 126 * @brief DMA handle Structure definition
mbed_official 237:f3da66175598 127 */
mbed_official 237:f3da66175598 128 typedef struct __DMA_HandleTypeDef
mbed_official 237:f3da66175598 129 {
mbed_official 237:f3da66175598 130 DMA_Channel_TypeDef *Instance; /*!< Register base address */
mbed_official 237:f3da66175598 131
mbed_official 237:f3da66175598 132 DMA_InitTypeDef Init; /*!< DMA communication parameters */
mbed_official 237:f3da66175598 133
mbed_official 237:f3da66175598 134 HAL_LockTypeDef Lock; /*!< DMA locking object */
mbed_official 237:f3da66175598 135
mbed_official 237:f3da66175598 136 HAL_DMA_StateTypeDef State; /*!< DMA transfer state */
mbed_official 237:f3da66175598 137
mbed_official 237:f3da66175598 138 void *Parent; /*!< Parent object state */
mbed_official 237:f3da66175598 139
mbed_official 237:f3da66175598 140 void (* XferCpltCallback)( struct __DMA_HandleTypeDef * hdma); /*!< DMA transfer complete callback */
mbed_official 237:f3da66175598 141
mbed_official 237:f3da66175598 142 void (* XferHalfCpltCallback)( struct __DMA_HandleTypeDef * hdma); /*!< DMA Half transfer complete callback */
mbed_official 237:f3da66175598 143
mbed_official 237:f3da66175598 144 void (* XferErrorCallback)( struct __DMA_HandleTypeDef * hdma); /*!< DMA transfer error callback */
mbed_official 237:f3da66175598 145
mbed_official 237:f3da66175598 146 __IO uint32_t ErrorCode; /*!< DMA Error code */
mbed_official 237:f3da66175598 147
mbed_official 237:f3da66175598 148 } DMA_HandleTypeDef;
mbed_official 237:f3da66175598 149
mbed_official 237:f3da66175598 150 /* Exported constants --------------------------------------------------------*/
mbed_official 237:f3da66175598 151
mbed_official 237:f3da66175598 152 /** @defgroup DMA_Exported_Constants
mbed_official 237:f3da66175598 153 * @{
mbed_official 237:f3da66175598 154 */
mbed_official 237:f3da66175598 155
mbed_official 237:f3da66175598 156 /** @defgroup DMA_Error_Code
mbed_official 237:f3da66175598 157 * @{
mbed_official 237:f3da66175598 158 */
mbed_official 237:f3da66175598 159 #define HAL_DMA_ERROR_NONE ((uint32_t)0x00000000) /*!< No error */
mbed_official 237:f3da66175598 160 #define HAL_DMA_ERROR_TE ((uint32_t)0x00000001) /*!< Transfer error */
mbed_official 237:f3da66175598 161 #define HAL_DMA_ERROR_TIMEOUT ((uint32_t)0x00000020) /*!< Timeout error */
mbed_official 237:f3da66175598 162 /**
mbed_official 237:f3da66175598 163 * @}
mbed_official 237:f3da66175598 164 */
mbed_official 237:f3da66175598 165
mbed_official 237:f3da66175598 166
mbed_official 237:f3da66175598 167 /** @defgroup DMA_Data_transfer_direction
mbed_official 237:f3da66175598 168 * @{
mbed_official 237:f3da66175598 169 */
mbed_official 237:f3da66175598 170 #define DMA_PERIPH_TO_MEMORY ((uint32_t)0x00000000) /*!< Peripheral to memory direction */
mbed_official 237:f3da66175598 171 #define DMA_MEMORY_TO_PERIPH ((uint32_t)DMA_CCR_DIR) /*!< Memory to peripheral direction */
mbed_official 237:f3da66175598 172 #define DMA_MEMORY_TO_MEMORY ((uint32_t)(DMA_CCR_MEM2MEM)) /*!< Memory to memory direction */
mbed_official 237:f3da66175598 173
mbed_official 237:f3da66175598 174 #define IS_DMA_DIRECTION(DIRECTION) (((DIRECTION) == DMA_PERIPH_TO_MEMORY ) || \
mbed_official 237:f3da66175598 175 ((DIRECTION) == DMA_MEMORY_TO_PERIPH) || \
mbed_official 237:f3da66175598 176 ((DIRECTION) == DMA_MEMORY_TO_MEMORY))
mbed_official 237:f3da66175598 177 /**
mbed_official 237:f3da66175598 178 * @}
mbed_official 237:f3da66175598 179 */
mbed_official 237:f3da66175598 180
mbed_official 237:f3da66175598 181 /** @defgroup DMA_Data_buffer_size
mbed_official 237:f3da66175598 182 * @{
mbed_official 237:f3da66175598 183 */
mbed_official 237:f3da66175598 184 #define IS_DMA_BUFFER_SIZE(SIZE) (((SIZE) >= 0x1) && ((SIZE) < 0x10000))
mbed_official 237:f3da66175598 185 /**
mbed_official 237:f3da66175598 186 * @}
mbed_official 237:f3da66175598 187 */
mbed_official 237:f3da66175598 188
mbed_official 237:f3da66175598 189 /** @defgroup DMA_Peripheral_incremented_mode
mbed_official 237:f3da66175598 190 * @{
mbed_official 237:f3da66175598 191 */
mbed_official 237:f3da66175598 192 #define DMA_PINC_ENABLE ((uint32_t)DMA_CCR_PINC) /*!< Peripheral increment mode Enable */
mbed_official 237:f3da66175598 193 #define DMA_PINC_DISABLE ((uint32_t)0x00000000) /*!< Peripheral increment mode Disable */
mbed_official 237:f3da66175598 194
mbed_official 237:f3da66175598 195 #define IS_DMA_PERIPHERAL_INC_STATE(STATE) (((STATE) == DMA_PINC_ENABLE) || \
mbed_official 237:f3da66175598 196 ((STATE) == DMA_PINC_DISABLE))
mbed_official 237:f3da66175598 197 /**
mbed_official 237:f3da66175598 198 * @}
mbed_official 237:f3da66175598 199 */
mbed_official 237:f3da66175598 200
mbed_official 237:f3da66175598 201 /** @defgroup DMA_Memory_incremented_mode
mbed_official 237:f3da66175598 202 * @{
mbed_official 237:f3da66175598 203 */
mbed_official 237:f3da66175598 204 #define DMA_MINC_ENABLE ((uint32_t)DMA_CCR_MINC) /*!< Memory increment mode Enable */
mbed_official 237:f3da66175598 205 #define DMA_MINC_DISABLE ((uint32_t)0x00000000) /*!< Memory increment mode Disable */
mbed_official 237:f3da66175598 206
mbed_official 237:f3da66175598 207 #define IS_DMA_MEMORY_INC_STATE(STATE) (((STATE) == DMA_MINC_ENABLE) || \
mbed_official 237:f3da66175598 208 ((STATE) == DMA_MINC_DISABLE))
mbed_official 237:f3da66175598 209 /**
mbed_official 237:f3da66175598 210 * @}
mbed_official 237:f3da66175598 211 */
mbed_official 237:f3da66175598 212
mbed_official 237:f3da66175598 213 /** @defgroup DMA_Peripheral_data_size
mbed_official 237:f3da66175598 214 * @{
mbed_official 237:f3da66175598 215 */
mbed_official 237:f3da66175598 216 #define DMA_PDATAALIGN_BYTE ((uint32_t)0x00000000) /*!< Peripheral data alignment : Byte */
mbed_official 237:f3da66175598 217 #define DMA_PDATAALIGN_HALFWORD ((uint32_t)DMA_CCR_PSIZE_0) /*!< Peripheral data alignment : HalfWord */
mbed_official 237:f3da66175598 218 #define DMA_PDATAALIGN_WORD ((uint32_t)DMA_CCR_PSIZE_1) /*!< Peripheral data alignment : Word */
mbed_official 237:f3da66175598 219
mbed_official 237:f3da66175598 220 #define IS_DMA_PERIPHERAL_DATA_SIZE(SIZE) (((SIZE) == DMA_PDATAALIGN_BYTE) || \
mbed_official 237:f3da66175598 221 ((SIZE) == DMA_PDATAALIGN_HALFWORD) || \
mbed_official 237:f3da66175598 222 ((SIZE) == DMA_PDATAALIGN_WORD))
mbed_official 237:f3da66175598 223 /**
mbed_official 237:f3da66175598 224 * @}
mbed_official 237:f3da66175598 225 */
mbed_official 237:f3da66175598 226
mbed_official 237:f3da66175598 227
mbed_official 237:f3da66175598 228 /** @defgroup DMA_Memory_data_size
mbed_official 237:f3da66175598 229 * @{
mbed_official 237:f3da66175598 230 */
mbed_official 237:f3da66175598 231 #define DMA_MDATAALIGN_BYTE ((uint32_t)0x00000000) /*!< Memory data alignment : Byte */
mbed_official 237:f3da66175598 232 #define DMA_MDATAALIGN_HALFWORD ((uint32_t)DMA_CCR_MSIZE_0) /*!< Memory data alignment : HalfWord */
mbed_official 237:f3da66175598 233 #define DMA_MDATAALIGN_WORD ((uint32_t)DMA_CCR_MSIZE_1) /*!< Memory data alignment : Word */
mbed_official 237:f3da66175598 234
mbed_official 237:f3da66175598 235 #define IS_DMA_MEMORY_DATA_SIZE(SIZE) (((SIZE) == DMA_MDATAALIGN_BYTE) || \
mbed_official 237:f3da66175598 236 ((SIZE) == DMA_MDATAALIGN_HALFWORD) || \
mbed_official 237:f3da66175598 237 ((SIZE) == DMA_MDATAALIGN_WORD ))
mbed_official 237:f3da66175598 238 /**
mbed_official 237:f3da66175598 239 * @}
mbed_official 237:f3da66175598 240 */
mbed_official 237:f3da66175598 241
mbed_official 237:f3da66175598 242 /** @defgroup DMA_mode
mbed_official 237:f3da66175598 243 * @{
mbed_official 237:f3da66175598 244 */
mbed_official 237:f3da66175598 245 #define DMA_NORMAL ((uint32_t)0x00000000) /*!< Normal Mode */
mbed_official 237:f3da66175598 246 #define DMA_CIRCULAR ((uint32_t)DMA_CCR_CIRC) /*!< Circular Mode */
mbed_official 237:f3da66175598 247
mbed_official 237:f3da66175598 248 #define IS_DMA_MODE(MODE) (((MODE) == DMA_NORMAL ) || \
mbed_official 237:f3da66175598 249 ((MODE) == DMA_CIRCULAR))
mbed_official 237:f3da66175598 250 /**
mbed_official 237:f3da66175598 251 * @}
mbed_official 237:f3da66175598 252 */
mbed_official 237:f3da66175598 253
mbed_official 237:f3da66175598 254 /** @defgroup DMA_Priority_level
mbed_official 237:f3da66175598 255 * @{
mbed_official 237:f3da66175598 256 */
mbed_official 237:f3da66175598 257 #define DMA_PRIORITY_LOW ((uint32_t)0x00000000) /*!< Priority level : Low */
mbed_official 237:f3da66175598 258 #define DMA_PRIORITY_MEDIUM ((uint32_t)DMA_CCR_PL_0) /*!< Priority level : Medium */
mbed_official 237:f3da66175598 259 #define DMA_PRIORITY_HIGH ((uint32_t)DMA_CCR_PL_1) /*!< Priority level : High */
mbed_official 237:f3da66175598 260 #define DMA_PRIORITY_VERY_HIGH ((uint32_t)DMA_CCR_PL) /*!< Priority level : Very_High */
mbed_official 237:f3da66175598 261
mbed_official 237:f3da66175598 262 #define IS_DMA_PRIORITY(PRIORITY) (((PRIORITY) == DMA_PRIORITY_LOW ) || \
mbed_official 237:f3da66175598 263 ((PRIORITY) == DMA_PRIORITY_MEDIUM) || \
mbed_official 237:f3da66175598 264 ((PRIORITY) == DMA_PRIORITY_HIGH) || \
mbed_official 237:f3da66175598 265 ((PRIORITY) == DMA_PRIORITY_VERY_HIGH))
mbed_official 237:f3da66175598 266 /**
mbed_official 237:f3da66175598 267 * @}
mbed_official 237:f3da66175598 268 */
mbed_official 237:f3da66175598 269
mbed_official 237:f3da66175598 270
mbed_official 237:f3da66175598 271 /** @defgroup DMA_interrupt_enable_definitions
mbed_official 237:f3da66175598 272 * @{
mbed_official 237:f3da66175598 273 */
mbed_official 237:f3da66175598 274
mbed_official 237:f3da66175598 275 #define DMA_IT_TC ((uint32_t)DMA_CCR_TCIE)
mbed_official 237:f3da66175598 276 #define DMA_IT_HT ((uint32_t)DMA_CCR_HTIE)
mbed_official 237:f3da66175598 277 #define DMA_IT_TE ((uint32_t)DMA_CCR_TEIE)
mbed_official 237:f3da66175598 278
mbed_official 237:f3da66175598 279 /**
mbed_official 237:f3da66175598 280 * @}
mbed_official 237:f3da66175598 281 */
mbed_official 237:f3da66175598 282
mbed_official 237:f3da66175598 283 /** @defgroup DMA_flag_definitions
mbed_official 237:f3da66175598 284 * @{
mbed_official 237:f3da66175598 285 */
mbed_official 237:f3da66175598 286
mbed_official 237:f3da66175598 287 #define DMA_FLAG_GL1 ((uint32_t)0x00000001)
mbed_official 237:f3da66175598 288 #define DMA_FLAG_TC1 ((uint32_t)0x00000002)
mbed_official 237:f3da66175598 289 #define DMA_FLAG_HT1 ((uint32_t)0x00000004)
mbed_official 237:f3da66175598 290 #define DMA_FLAG_TE1 ((uint32_t)0x00000008)
mbed_official 237:f3da66175598 291 #define DMA_FLAG_GL2 ((uint32_t)0x00000010)
mbed_official 237:f3da66175598 292 #define DMA_FLAG_TC2 ((uint32_t)0x00000020)
mbed_official 237:f3da66175598 293 #define DMA_FLAG_HT2 ((uint32_t)0x00000040)
mbed_official 237:f3da66175598 294 #define DMA_FLAG_TE2 ((uint32_t)0x00000080)
mbed_official 237:f3da66175598 295 #define DMA_FLAG_GL3 ((uint32_t)0x00000100)
mbed_official 237:f3da66175598 296 #define DMA_FLAG_TC3 ((uint32_t)0x00000200)
mbed_official 237:f3da66175598 297 #define DMA_FLAG_HT3 ((uint32_t)0x00000400)
mbed_official 237:f3da66175598 298 #define DMA_FLAG_TE3 ((uint32_t)0x00000800)
mbed_official 237:f3da66175598 299 #define DMA_FLAG_GL4 ((uint32_t)0x00001000)
mbed_official 237:f3da66175598 300 #define DMA_FLAG_TC4 ((uint32_t)0x00002000)
mbed_official 237:f3da66175598 301 #define DMA_FLAG_HT4 ((uint32_t)0x00004000)
mbed_official 237:f3da66175598 302 #define DMA_FLAG_TE4 ((uint32_t)0x00008000)
mbed_official 237:f3da66175598 303 #define DMA_FLAG_GL5 ((uint32_t)0x00010000)
mbed_official 237:f3da66175598 304 #define DMA_FLAG_TC5 ((uint32_t)0x00020000)
mbed_official 237:f3da66175598 305 #define DMA_FLAG_HT5 ((uint32_t)0x00040000)
mbed_official 237:f3da66175598 306 #define DMA_FLAG_TE5 ((uint32_t)0x00080000)
mbed_official 237:f3da66175598 307 #define DMA_FLAG_GL6 ((uint32_t)0x00100000)
mbed_official 237:f3da66175598 308 #define DMA_FLAG_TC6 ((uint32_t)0x00200000)
mbed_official 237:f3da66175598 309 #define DMA_FLAG_HT6 ((uint32_t)0x00400000)
mbed_official 237:f3da66175598 310 #define DMA_FLAG_TE6 ((uint32_t)0x00800000)
mbed_official 237:f3da66175598 311 #define DMA_FLAG_GL7 ((uint32_t)0x01000000)
mbed_official 237:f3da66175598 312 #define DMA_FLAG_TC7 ((uint32_t)0x02000000)
mbed_official 237:f3da66175598 313 #define DMA_FLAG_HT7 ((uint32_t)0x04000000)
mbed_official 237:f3da66175598 314 #define DMA_FLAG_TE7 ((uint32_t)0x08000000)
mbed_official 237:f3da66175598 315
mbed_official 237:f3da66175598 316
mbed_official 237:f3da66175598 317 /**
mbed_official 237:f3da66175598 318 * @}
mbed_official 237:f3da66175598 319 */
mbed_official 237:f3da66175598 320
mbed_official 237:f3da66175598 321 /**
mbed_official 237:f3da66175598 322 * @}
mbed_official 237:f3da66175598 323 */
mbed_official 237:f3da66175598 324
mbed_official 237:f3da66175598 325 /* Exported macros -----------------------------------------------------------*/
mbed_official 237:f3da66175598 326
mbed_official 237:f3da66175598 327 /** @brief Reset DMA handle state
mbed_official 237:f3da66175598 328 * @param __HANDLE__: DMA handle.
mbed_official 237:f3da66175598 329 * @retval None
mbed_official 237:f3da66175598 330 */
mbed_official 237:f3da66175598 331 #define __HAL_DMA_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_DMA_STATE_RESET)
mbed_official 237:f3da66175598 332
mbed_official 237:f3da66175598 333 /**
mbed_official 237:f3da66175598 334 * @brief Enable the specified DMA Channel.
mbed_official 237:f3da66175598 335 * @param __HANDLE__: DMA handle
mbed_official 237:f3da66175598 336 * @retval None.
mbed_official 237:f3da66175598 337 */
mbed_official 237:f3da66175598 338 #define __HAL_DMA_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CCR |= DMA_CCR_EN)
mbed_official 237:f3da66175598 339
mbed_official 237:f3da66175598 340 /**
mbed_official 237:f3da66175598 341 * @brief Disable the specified DMA Channel.
mbed_official 237:f3da66175598 342 * @param __HANDLE__: DMA handle
mbed_official 237:f3da66175598 343 * @retval None.
mbed_official 237:f3da66175598 344 */
mbed_official 237:f3da66175598 345 #define __HAL_DMA_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CCR &= ~DMA_CCR_EN)
mbed_official 237:f3da66175598 346
mbed_official 237:f3da66175598 347
mbed_official 237:f3da66175598 348 /* Interrupt & Flag management */
mbed_official 237:f3da66175598 349
mbed_official 237:f3da66175598 350 /**
mbed_official 237:f3da66175598 351 * @brief Enables the specified DMA Channel interrupts.
mbed_official 237:f3da66175598 352 * @param __HANDLE__: DMA handle
mbed_official 237:f3da66175598 353 * @param __INTERRUPT__: specifies the DMA interrupt sources to be enabled or disabled.
mbed_official 237:f3da66175598 354 * This parameter can be any combination of the following values:
mbed_official 237:f3da66175598 355 * @arg DMA_IT_TC: Transfer complete interrupt mask
mbed_official 237:f3da66175598 356 * @arg DMA_IT_HT: Half transfer complete interrupt mask
mbed_official 237:f3da66175598 357 * @arg DMA_IT_TE: Transfer error interrupt mask
mbed_official 237:f3da66175598 358 * @retval None
mbed_official 237:f3da66175598 359 */
mbed_official 237:f3da66175598 360 #define __HAL_DMA_ENABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->CCR |= (__INTERRUPT__))
mbed_official 237:f3da66175598 361
mbed_official 237:f3da66175598 362 /**
mbed_official 237:f3da66175598 363 * @brief Disables the specified DMA Channel interrupts.
mbed_official 237:f3da66175598 364 * @param __HANDLE__: DMA handle
mbed_official 237:f3da66175598 365 * @param __INTERRUPT__: specifies the DMA interrupt sources to be enabled or disabled.
mbed_official 237:f3da66175598 366 * This parameter can be any combination of the following values:
mbed_official 237:f3da66175598 367 * @arg DMA_IT_TC: Transfer complete interrupt mask
mbed_official 237:f3da66175598 368 * @arg DMA_IT_HT: Half transfer complete interrupt mask
mbed_official 237:f3da66175598 369 * @arg DMA_IT_TE: Transfer error interrupt mask
mbed_official 237:f3da66175598 370 * @retval None
mbed_official 237:f3da66175598 371 */
mbed_official 237:f3da66175598 372 #define __HAL_DMA_DISABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->CCR &= ~(__INTERRUPT__))
mbed_official 237:f3da66175598 373
mbed_official 237:f3da66175598 374 /**
mbed_official 237:f3da66175598 375 * @brief Checks whether the specified DMA Channel interrupt has occurred or not.
mbed_official 237:f3da66175598 376 * @param __HANDLE__: DMA handle
mbed_official 237:f3da66175598 377 * @param __INTERRUPT__: specifies the DMA interrupt source to check.
mbed_official 237:f3da66175598 378 * This parameter can be one of the following values:
mbed_official 237:f3da66175598 379 * @arg DMA_IT_TC: Transfer complete interrupt mask
mbed_official 237:f3da66175598 380 * @arg DMA_IT_HT: Half transfer complete interrupt mask
mbed_official 237:f3da66175598 381 * @arg DMA_IT_TE: Transfer error interrupt mask
mbed_official 237:f3da66175598 382 * @retval The state of DMA_IT (SET or RESET).
mbed_official 237:f3da66175598 383 */
mbed_official 237:f3da66175598 384 #define __HAL_DMA_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) ((((__HANDLE__)->Instance->CCR & (__INTERRUPT__)) == (__INTERRUPT__)) ? SET : RESET)
mbed_official 237:f3da66175598 385
mbed_official 237:f3da66175598 386 /* Include DMA HAL Extension module */
mbed_official 237:f3da66175598 387 #include "stm32f3xx_hal_dma_ex.h"
mbed_official 237:f3da66175598 388
mbed_official 237:f3da66175598 389 /* Exported functions --------------------------------------------------------*/
mbed_official 237:f3da66175598 390
mbed_official 237:f3da66175598 391 /* Initialization and de-initialization functions *****************************/
mbed_official 237:f3da66175598 392 HAL_StatusTypeDef HAL_DMA_Init(DMA_HandleTypeDef *hdma);
mbed_official 237:f3da66175598 393 HAL_StatusTypeDef HAL_DMA_DeInit (DMA_HandleTypeDef *hdma);
mbed_official 237:f3da66175598 394
mbed_official 237:f3da66175598 395 /* IO operation functions *****************************************************/
mbed_official 237:f3da66175598 396 HAL_StatusTypeDef HAL_DMA_Start (DMA_HandleTypeDef *hdma, uint32_t SrcAddress, uint32_t DstAddress, uint32_t DataLength);
mbed_official 237:f3da66175598 397 HAL_StatusTypeDef HAL_DMA_Start_IT(DMA_HandleTypeDef *hdma, uint32_t SrcAddress, uint32_t DstAddress, uint32_t DataLength);
mbed_official 237:f3da66175598 398 HAL_StatusTypeDef HAL_DMA_Abort(DMA_HandleTypeDef *hdma);
mbed_official 237:f3da66175598 399 HAL_StatusTypeDef HAL_DMA_PollForTransfer(DMA_HandleTypeDef *hdma, uint32_t CompleteLevel, uint32_t Timeout);
mbed_official 237:f3da66175598 400 void HAL_DMA_IRQHandler(DMA_HandleTypeDef *hdma);
mbed_official 237:f3da66175598 401
mbed_official 237:f3da66175598 402 /* Peripheral State and Error functions ***************************************/
mbed_official 237:f3da66175598 403 HAL_DMA_StateTypeDef HAL_DMA_GetState(DMA_HandleTypeDef *hdma);
mbed_official 237:f3da66175598 404 uint32_t HAL_DMA_GetError(DMA_HandleTypeDef *hdma);
mbed_official 237:f3da66175598 405
mbed_official 237:f3da66175598 406 /**
mbed_official 237:f3da66175598 407 * @}
mbed_official 237:f3da66175598 408 */
mbed_official 237:f3da66175598 409
mbed_official 237:f3da66175598 410 /**
mbed_official 237:f3da66175598 411 * @}
mbed_official 237:f3da66175598 412 */
mbed_official 237:f3da66175598 413
mbed_official 237:f3da66175598 414 #ifdef __cplusplus
mbed_official 237:f3da66175598 415 }
mbed_official 237:f3da66175598 416 #endif
mbed_official 237:f3da66175598 417
mbed_official 237:f3da66175598 418 #endif /* __STM32F3xx_HAL_DMA_H */
mbed_official 237:f3da66175598 419
mbed_official 237:f3da66175598 420 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/