shao ziyang / mbed-src-kl05

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targets/cmsis/TARGET_STM/TARGET_NUCLEO_F302R8/stm32f30x_tim.h@323:9e901b0a5aa1, 2014-09-13 (annotated)

Committer:
shaoziyang
Date:
Sat Sep 13 14:25:46 2014 +0000
Revision:
323:9e901b0a5aa1
Parent:
125:23cc3068a9e4 
test with CLOCK_SETUP = 0

Who changed what in which revision?

UserRevisionLine numberNew contents of line
mbed_official 125:23cc3068a9e4 1 /**
mbed_official 125:23cc3068a9e4 2 ******************************************************************************
mbed_official 125:23cc3068a9e4 3 * @file stm32f30x_tim.h
mbed_official 125:23cc3068a9e4 4 * @author MCD Application Team
mbed_official 125:23cc3068a9e4 5 * @version V1.1.0
mbed_official 125:23cc3068a9e4 6 * @date 27-February-2014
mbed_official 125:23cc3068a9e4 7 * @brief This file contains all the functions prototypes for the TIM firmware
mbed_official 125:23cc3068a9e4 8 * library.
mbed_official 125:23cc3068a9e4 9 ******************************************************************************
mbed_official 125:23cc3068a9e4 10 * @attention
mbed_official 125:23cc3068a9e4 11 *
mbed_official 125:23cc3068a9e4 12 * <h2><center>&copy; COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
mbed_official 125:23cc3068a9e4 13 *
mbed_official 125:23cc3068a9e4 14 * Redistribution and use in source and binary forms, with or without modification,
mbed_official 125:23cc3068a9e4 15 * are permitted provided that the following conditions are met:
mbed_official 125:23cc3068a9e4 16 * 1. Redistributions of source code must retain the above copyright notice,
mbed_official 125:23cc3068a9e4 17 * this list of conditions and the following disclaimer.
mbed_official 125:23cc3068a9e4 18 * 2. Redistributions in binary form must reproduce the above copyright notice,
mbed_official 125:23cc3068a9e4 19 * this list of conditions and the following disclaimer in the documentation
mbed_official 125:23cc3068a9e4 20 * and/or other materials provided with the distribution.
mbed_official 125:23cc3068a9e4 21 * 3. Neither the name of STMicroelectronics nor the names of its contributors
mbed_official 125:23cc3068a9e4 22 * may be used to endorse or promote products derived from this software
mbed_official 125:23cc3068a9e4 23 * without specific prior written permission.
mbed_official 125:23cc3068a9e4 24 *
mbed_official 125:23cc3068a9e4 25 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
mbed_official 125:23cc3068a9e4 26 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
mbed_official 125:23cc3068a9e4 27 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
mbed_official 125:23cc3068a9e4 28 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
mbed_official 125:23cc3068a9e4 29 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
mbed_official 125:23cc3068a9e4 30 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
mbed_official 125:23cc3068a9e4 31 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
mbed_official 125:23cc3068a9e4 32 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
mbed_official 125:23cc3068a9e4 33 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
mbed_official 125:23cc3068a9e4 34 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
mbed_official 125:23cc3068a9e4 35 *
mbed_official 125:23cc3068a9e4 36 ******************************************************************************
mbed_official 125:23cc3068a9e4 37 */
mbed_official 125:23cc3068a9e4 38
mbed_official 125:23cc3068a9e4 39 /* Define to prevent recursive inclusion -------------------------------------*/
mbed_official 125:23cc3068a9e4 40 #ifndef __STM32F30x_TIM_H
mbed_official 125:23cc3068a9e4 41 #define __STM32F30x_TIM_H
mbed_official 125:23cc3068a9e4 42
mbed_official 125:23cc3068a9e4 43 #ifdef __cplusplus
mbed_official 125:23cc3068a9e4 44 extern "C" {
mbed_official 125:23cc3068a9e4 45 #endif
mbed_official 125:23cc3068a9e4 46
mbed_official 125:23cc3068a9e4 47 /* Includes ------------------------------------------------------------------*/
mbed_official 125:23cc3068a9e4 48 #include "stm32f30x.h"
mbed_official 125:23cc3068a9e4 49
mbed_official 125:23cc3068a9e4 50 /** @addtogroup stm32f30x_StdPeriph_Driver
mbed_official 125:23cc3068a9e4 51 * @{
mbed_official 125:23cc3068a9e4 52 */
mbed_official 125:23cc3068a9e4 53
mbed_official 125:23cc3068a9e4 54 /** @addtogroup TIM
mbed_official 125:23cc3068a9e4 55 * @{
mbed_official 125:23cc3068a9e4 56 */
mbed_official 125:23cc3068a9e4 57
mbed_official 125:23cc3068a9e4 58 /* Exported types ------------------------------------------------------------*/
mbed_official 125:23cc3068a9e4 59
mbed_official 125:23cc3068a9e4 60 /**
mbed_official 125:23cc3068a9e4 61 * @brief TIM Time Base Init structure definition
mbed_official 125:23cc3068a9e4 62 * @note This structure is used with all TIMx except for TIM6 and TIM7.
mbed_official 125:23cc3068a9e4 63 */
mbed_official 125:23cc3068a9e4 64
mbed_official 125:23cc3068a9e4 65 typedef struct
mbed_official 125:23cc3068a9e4 66 {
mbed_official 125:23cc3068a9e4 67 uint16_t TIM_Prescaler; /*!< Specifies the prescaler value used to divide the TIM clock.
mbed_official 125:23cc3068a9e4 68 This parameter can be a number between 0x0000 and 0xFFFF */
mbed_official 125:23cc3068a9e4 69
mbed_official 125:23cc3068a9e4 70 uint16_t TIM_CounterMode; /*!< Specifies the counter mode.
mbed_official 125:23cc3068a9e4 71 This parameter can be a value of @ref TIM_Counter_Mode */
mbed_official 125:23cc3068a9e4 72
mbed_official 125:23cc3068a9e4 73 uint32_t TIM_Period; /*!< Specifies the period value to be loaded into the active
mbed_official 125:23cc3068a9e4 74 Auto-Reload Register at the next update event.
mbed_official 125:23cc3068a9e4 75 This parameter must be a number between 0x0000 and 0xFFFF. */
mbed_official 125:23cc3068a9e4 76
mbed_official 125:23cc3068a9e4 77 uint16_t TIM_ClockDivision; /*!< Specifies the clock division.
mbed_official 125:23cc3068a9e4 78 This parameter can be a value of @ref TIM_Clock_Division_CKD */
mbed_official 125:23cc3068a9e4 79
mbed_official 125:23cc3068a9e4 80 uint16_t TIM_RepetitionCounter; /*!< Specifies the repetition counter value. Each time the RCR downcounter
mbed_official 125:23cc3068a9e4 81 reaches zero, an update event is generated and counting restarts
mbed_official 125:23cc3068a9e4 82 from the RCR value (N).
mbed_official 125:23cc3068a9e4 83 This means in PWM mode that (N+1) corresponds to:
mbed_official 125:23cc3068a9e4 84 - the number of PWM periods in edge-aligned mode
mbed_official 125:23cc3068a9e4 85 - the number of half PWM period in center-aligned mode
mbed_official 125:23cc3068a9e4 86 This parameter must be a number between 0x00 and 0xFF.
mbed_official 125:23cc3068a9e4 87 @note This parameter is valid only for TIM1 and TIM8. */
mbed_official 125:23cc3068a9e4 88 } TIM_TimeBaseInitTypeDef;
mbed_official 125:23cc3068a9e4 89
mbed_official 125:23cc3068a9e4 90 /**
mbed_official 125:23cc3068a9e4 91 * @brief TIM Output Compare Init structure definition
mbed_official 125:23cc3068a9e4 92 */
mbed_official 125:23cc3068a9e4 93
mbed_official 125:23cc3068a9e4 94 typedef struct
mbed_official 125:23cc3068a9e4 95 {
mbed_official 125:23cc3068a9e4 96 uint32_t TIM_OCMode; /*!< Specifies the TIM mode.
mbed_official 125:23cc3068a9e4 97 This parameter can be a value of @ref TIM_Output_Compare_and_PWM_modes */
mbed_official 125:23cc3068a9e4 98
mbed_official 125:23cc3068a9e4 99 uint16_t TIM_OutputState; /*!< Specifies the TIM Output Compare state.
mbed_official 125:23cc3068a9e4 100 This parameter can be a value of @ref TIM_Output_Compare_State */
mbed_official 125:23cc3068a9e4 101
mbed_official 125:23cc3068a9e4 102 uint16_t TIM_OutputNState; /*!< Specifies the TIM complementary Output Compare state.
mbed_official 125:23cc3068a9e4 103 This parameter can be a value of @ref TIM_Output_Compare_N_State
mbed_official 125:23cc3068a9e4 104 @note This parameter is valid only for TIM1 and TIM8. */
mbed_official 125:23cc3068a9e4 105
mbed_official 125:23cc3068a9e4 106 uint32_t TIM_Pulse; /*!< Specifies the pulse value to be loaded into the Capture Compare Register.
mbed_official 125:23cc3068a9e4 107 This parameter can be a number between 0x0000 and 0xFFFF */
mbed_official 125:23cc3068a9e4 108
mbed_official 125:23cc3068a9e4 109 uint16_t TIM_OCPolarity; /*!< Specifies the output polarity.
mbed_official 125:23cc3068a9e4 110 This parameter can be a value of @ref TIM_Output_Compare_Polarity */
mbed_official 125:23cc3068a9e4 111
mbed_official 125:23cc3068a9e4 112 uint16_t TIM_OCNPolarity; /*!< Specifies the complementary output polarity.
mbed_official 125:23cc3068a9e4 113 This parameter can be a value of @ref TIM_Output_Compare_N_Polarity
mbed_official 125:23cc3068a9e4 114 @note This parameter is valid only for TIM1 and TIM8. */
mbed_official 125:23cc3068a9e4 115
mbed_official 125:23cc3068a9e4 116 uint16_t TIM_OCIdleState; /*!< Specifies the TIM Output Compare pin state during Idle state.
mbed_official 125:23cc3068a9e4 117 This parameter can be a value of @ref TIM_Output_Compare_Idle_State
mbed_official 125:23cc3068a9e4 118 @note This parameter is valid only for TIM1 and TIM8. */
mbed_official 125:23cc3068a9e4 119
mbed_official 125:23cc3068a9e4 120 uint16_t TIM_OCNIdleState; /*!< Specifies the TIM Output Compare pin state during Idle state.
mbed_official 125:23cc3068a9e4 121 This parameter can be a value of @ref TIM_Output_Compare_N_Idle_State
mbed_official 125:23cc3068a9e4 122 @note This parameter is valid only for TIM1 and TIM8. */
mbed_official 125:23cc3068a9e4 123 } TIM_OCInitTypeDef;
mbed_official 125:23cc3068a9e4 124
mbed_official 125:23cc3068a9e4 125 /**
mbed_official 125:23cc3068a9e4 126 * @brief TIM Input Capture Init structure definition
mbed_official 125:23cc3068a9e4 127 */
mbed_official 125:23cc3068a9e4 128
mbed_official 125:23cc3068a9e4 129 typedef struct
mbed_official 125:23cc3068a9e4 130 {
mbed_official 125:23cc3068a9e4 131
mbed_official 125:23cc3068a9e4 132 uint16_t TIM_Channel; /*!< Specifies the TIM channel.
mbed_official 125:23cc3068a9e4 133 This parameter can be a value of @ref TIM_Channel */
mbed_official 125:23cc3068a9e4 134
mbed_official 125:23cc3068a9e4 135 uint16_t TIM_ICPolarity; /*!< Specifies the active edge of the input signal.
mbed_official 125:23cc3068a9e4 136 This parameter can be a value of @ref TIM_Input_Capture_Polarity */
mbed_official 125:23cc3068a9e4 137
mbed_official 125:23cc3068a9e4 138 uint16_t TIM_ICSelection; /*!< Specifies the input.
mbed_official 125:23cc3068a9e4 139 This parameter can be a value of @ref TIM_Input_Capture_Selection */
mbed_official 125:23cc3068a9e4 140
mbed_official 125:23cc3068a9e4 141 uint16_t TIM_ICPrescaler; /*!< Specifies the Input Capture Prescaler.
mbed_official 125:23cc3068a9e4 142 This parameter can be a value of @ref TIM_Input_Capture_Prescaler */
mbed_official 125:23cc3068a9e4 143
mbed_official 125:23cc3068a9e4 144 uint16_t TIM_ICFilter; /*!< Specifies the input capture filter.
mbed_official 125:23cc3068a9e4 145 This parameter can be a number between 0x0 and 0xF */
mbed_official 125:23cc3068a9e4 146 } TIM_ICInitTypeDef;
mbed_official 125:23cc3068a9e4 147
mbed_official 125:23cc3068a9e4 148 /**
mbed_official 125:23cc3068a9e4 149 * @brief BDTR structure definition
mbed_official 125:23cc3068a9e4 150 * @note This structure is used only with TIM1 and TIM8.
mbed_official 125:23cc3068a9e4 151 */
mbed_official 125:23cc3068a9e4 152
mbed_official 125:23cc3068a9e4 153 typedef struct
mbed_official 125:23cc3068a9e4 154 {
mbed_official 125:23cc3068a9e4 155
mbed_official 125:23cc3068a9e4 156 uint16_t TIM_OSSRState; /*!< Specifies the Off-State selection used in Run mode.
mbed_official 125:23cc3068a9e4 157 This parameter can be a value of @ref TIM_OSSR_Off_State_Selection_for_Run_mode_state */
mbed_official 125:23cc3068a9e4 158
mbed_official 125:23cc3068a9e4 159 uint16_t TIM_OSSIState; /*!< Specifies the Off-State used in Idle state.
mbed_official 125:23cc3068a9e4 160 This parameter can be a value of @ref TIM_OSSI_Off_State_Selection_for_Idle_mode_state */
mbed_official 125:23cc3068a9e4 161
mbed_official 125:23cc3068a9e4 162 uint16_t TIM_LOCKLevel; /*!< Specifies the LOCK level parameters.
mbed_official 125:23cc3068a9e4 163 This parameter can be a value of @ref TIM_Lock_level */
mbed_official 125:23cc3068a9e4 164
mbed_official 125:23cc3068a9e4 165 uint16_t TIM_DeadTime; /*!< Specifies the delay time between the switching-off and the
mbed_official 125:23cc3068a9e4 166 switching-on of the outputs.
mbed_official 125:23cc3068a9e4 167 This parameter can be a number between 0x00 and 0xFF */
mbed_official 125:23cc3068a9e4 168
mbed_official 125:23cc3068a9e4 169 uint16_t TIM_Break; /*!< Specifies whether the TIM Break input is enabled or not.
mbed_official 125:23cc3068a9e4 170 This parameter can be a value of @ref TIM_Break_Input_enable_disable */
mbed_official 125:23cc3068a9e4 171
mbed_official 125:23cc3068a9e4 172 uint16_t TIM_BreakPolarity; /*!< Specifies the TIM Break Input pin polarity.
mbed_official 125:23cc3068a9e4 173 This parameter can be a value of @ref TIM_Break_Polarity */
mbed_official 125:23cc3068a9e4 174
mbed_official 125:23cc3068a9e4 175 uint16_t TIM_AutomaticOutput; /*!< Specifies whether the TIM Automatic Output feature is enabled or not.
mbed_official 125:23cc3068a9e4 176 This parameter can be a value of @ref TIM_AOE_Bit_Set_Reset */
mbed_official 125:23cc3068a9e4 177 } TIM_BDTRInitTypeDef;
mbed_official 125:23cc3068a9e4 178
mbed_official 125:23cc3068a9e4 179 /* Exported constants --------------------------------------------------------*/
mbed_official 125:23cc3068a9e4 180
mbed_official 125:23cc3068a9e4 181 /** @defgroup TIM_Exported_constants
mbed_official 125:23cc3068a9e4 182 * @{
mbed_official 125:23cc3068a9e4 183 */
mbed_official 125:23cc3068a9e4 184
mbed_official 125:23cc3068a9e4 185 #define IS_TIM_ALL_PERIPH(PERIPH) (((PERIPH) == TIM1) || \
mbed_official 125:23cc3068a9e4 186 ((PERIPH) == TIM2) || \
mbed_official 125:23cc3068a9e4 187 ((PERIPH) == TIM3) || \
mbed_official 125:23cc3068a9e4 188 ((PERIPH) == TIM4) || \
mbed_official 125:23cc3068a9e4 189 ((PERIPH) == TIM6) || \
mbed_official 125:23cc3068a9e4 190 ((PERIPH) == TIM7) || \
mbed_official 125:23cc3068a9e4 191 ((PERIPH) == TIM8) || \
mbed_official 125:23cc3068a9e4 192 ((PERIPH) == TIM15) || \
mbed_official 125:23cc3068a9e4 193 ((PERIPH) == TIM16) || \
mbed_official 125:23cc3068a9e4 194 ((PERIPH) == TIM17))
mbed_official 125:23cc3068a9e4 195 /* LIST1: TIM1, TIM2, TIM3, TIM4, TIM8, TIM15, TIM16 and TIM17 */
mbed_official 125:23cc3068a9e4 196 #define IS_TIM_LIST1_PERIPH(PERIPH) (((PERIPH) == TIM1) || \
mbed_official 125:23cc3068a9e4 197 ((PERIPH) == TIM2) || \
mbed_official 125:23cc3068a9e4 198 ((PERIPH) == TIM3) || \
mbed_official 125:23cc3068a9e4 199 ((PERIPH) == TIM4) || \
mbed_official 125:23cc3068a9e4 200 ((PERIPH) == TIM8) || \
mbed_official 125:23cc3068a9e4 201 ((PERIPH) == TIM15) || \
mbed_official 125:23cc3068a9e4 202 ((PERIPH) == TIM16) || \
mbed_official 125:23cc3068a9e4 203 ((PERIPH) == TIM17))
mbed_official 125:23cc3068a9e4 204
mbed_official 125:23cc3068a9e4 205 /* LIST2: TIM1, TIM2, TIM3, TIM4, TIM8 and TIM15 */
mbed_official 125:23cc3068a9e4 206 #define IS_TIM_LIST2_PERIPH(PERIPH) (((PERIPH) == TIM1) || \
mbed_official 125:23cc3068a9e4 207 ((PERIPH) == TIM2) || \
mbed_official 125:23cc3068a9e4 208 ((PERIPH) == TIM3) || \
mbed_official 125:23cc3068a9e4 209 ((PERIPH) == TIM4) || \
mbed_official 125:23cc3068a9e4 210 ((PERIPH) == TIM8) || \
mbed_official 125:23cc3068a9e4 211 ((PERIPH) == TIM15))
mbed_official 125:23cc3068a9e4 212 /* LIST3: TIM1, TIM2, TIM3, TIM4 and TIM8 */
mbed_official 125:23cc3068a9e4 213 #define IS_TIM_LIST3_PERIPH(PERIPH) (((PERIPH) == TIM1) || \
mbed_official 125:23cc3068a9e4 214 ((PERIPH) == TIM2) || \
mbed_official 125:23cc3068a9e4 215 ((PERIPH) == TIM3) || \
mbed_official 125:23cc3068a9e4 216 ((PERIPH) == TIM4) || \
mbed_official 125:23cc3068a9e4 217 ((PERIPH) == TIM8))
mbed_official 125:23cc3068a9e4 218 /* LIST4: TIM1 and TIM8 */
mbed_official 125:23cc3068a9e4 219 #define IS_TIM_LIST4_PERIPH(PERIPH) (((PERIPH) == TIM1) ||\
mbed_official 125:23cc3068a9e4 220 ((PERIPH) == TIM8))
mbed_official 125:23cc3068a9e4 221 /* LIST5: TIM1, TIM2, TIM3, TIM4, TIM5, TIM6, TIM7 and TIM8 */
mbed_official 125:23cc3068a9e4 222 #define IS_TIM_LIST5_PERIPH(PERIPH) (((PERIPH) == TIM1) || \
mbed_official 125:23cc3068a9e4 223 ((PERIPH) == TIM2) || \
mbed_official 125:23cc3068a9e4 224 ((PERIPH) == TIM3) || \
mbed_official 125:23cc3068a9e4 225 ((PERIPH) == TIM4) || \
mbed_official 125:23cc3068a9e4 226 ((PERIPH) == TIM6) || \
mbed_official 125:23cc3068a9e4 227 ((PERIPH) == TIM7) || \
mbed_official 125:23cc3068a9e4 228 ((PERIPH) == TIM8))
mbed_official 125:23cc3068a9e4 229 /* LIST6: TIM1, TIM8, TIM15, TIM16 and TIM17 */
mbed_official 125:23cc3068a9e4 230 #define IS_TIM_LIST6_PERIPH(PERIPH) (((PERIPH) == TIM1) || \
mbed_official 125:23cc3068a9e4 231 ((PERIPH) == TIM8) || \
mbed_official 125:23cc3068a9e4 232 ((PERIPH) == TIM15) || \
mbed_official 125:23cc3068a9e4 233 ((PERIPH) == TIM16) || \
mbed_official 125:23cc3068a9e4 234 ((PERIPH) == TIM17))
mbed_official 125:23cc3068a9e4 235
mbed_official 125:23cc3068a9e4 236 /* LIST5: TIM1, TIM2, TIM3, TIM4, TIM5, TIM6, TIM7 and TIM8 */
mbed_official 125:23cc3068a9e4 237 #define IS_TIM_LIST7_PERIPH(PERIPH) (((PERIPH) == TIM1) || \
mbed_official 125:23cc3068a9e4 238 ((PERIPH) == TIM2) || \
mbed_official 125:23cc3068a9e4 239 ((PERIPH) == TIM3) || \
mbed_official 125:23cc3068a9e4 240 ((PERIPH) == TIM4) || \
mbed_official 125:23cc3068a9e4 241 ((PERIPH) == TIM6) || \
mbed_official 125:23cc3068a9e4 242 ((PERIPH) == TIM7) || \
mbed_official 125:23cc3068a9e4 243 ((PERIPH) == TIM8) || \
mbed_official 125:23cc3068a9e4 244 ((PERIPH) == TIM15))
mbed_official 125:23cc3068a9e4 245 /* LIST8: TIM16 (option register) */
mbed_official 125:23cc3068a9e4 246 #define IS_TIM_LIST8_PERIPH(PERIPH) (((PERIPH) == TIM16)|| \
mbed_official 125:23cc3068a9e4 247 ((PERIPH) == TIM1)||\
mbed_official 125:23cc3068a9e4 248 ((PERIPH) == TIM8))
mbed_official 125:23cc3068a9e4 249
mbed_official 125:23cc3068a9e4 250 /** @defgroup TIM_Output_Compare_and_PWM_modes
mbed_official 125:23cc3068a9e4 251 * @{
mbed_official 125:23cc3068a9e4 252 */
mbed_official 125:23cc3068a9e4 253
mbed_official 125:23cc3068a9e4 254 #define TIM_OCMode_Timing ((uint32_t)0x00000)
mbed_official 125:23cc3068a9e4 255 #define TIM_OCMode_Active ((uint32_t)0x00010)
mbed_official 125:23cc3068a9e4 256 #define TIM_OCMode_Inactive ((uint32_t)0x00020)
mbed_official 125:23cc3068a9e4 257 #define TIM_OCMode_Toggle ((uint32_t)0x00030)
mbed_official 125:23cc3068a9e4 258 #define TIM_OCMode_PWM1 ((uint32_t)0x00060)
mbed_official 125:23cc3068a9e4 259 #define TIM_OCMode_PWM2 ((uint32_t)0x00070)
mbed_official 125:23cc3068a9e4 260
mbed_official 125:23cc3068a9e4 261 #define TIM_OCMode_Retrigerrable_OPM1 ((uint32_t)0x10000)
mbed_official 125:23cc3068a9e4 262 #define TIM_OCMode_Retrigerrable_OPM2 ((uint32_t)0x10010)
mbed_official 125:23cc3068a9e4 263 #define TIM_OCMode_Combined_PWM1 ((uint32_t)0x10040)
mbed_official 125:23cc3068a9e4 264 #define TIM_OCMode_Combined_PWM2 ((uint32_t)0x10050)
mbed_official 125:23cc3068a9e4 265 #define TIM_OCMode_Asymmetric_PWM1 ((uint32_t)0x10060)
mbed_official 125:23cc3068a9e4 266 #define TIM_OCMode_Asymmetric_PWM2 ((uint32_t)0x10070)
mbed_official 125:23cc3068a9e4 267
mbed_official 125:23cc3068a9e4 268 #define IS_TIM_OC_MODE(MODE) (((MODE) == TIM_OCMode_Timing) || \
mbed_official 125:23cc3068a9e4 269 ((MODE) == TIM_OCMode_Active) || \
mbed_official 125:23cc3068a9e4 270 ((MODE) == TIM_OCMode_Inactive) || \
mbed_official 125:23cc3068a9e4 271 ((MODE) == TIM_OCMode_Toggle)|| \
mbed_official 125:23cc3068a9e4 272 ((MODE) == TIM_OCMode_PWM1) || \
mbed_official 125:23cc3068a9e4 273 ((MODE) == TIM_OCMode_PWM2) || \
mbed_official 125:23cc3068a9e4 274 ((MODE) == TIM_OCMode_Retrigerrable_OPM1) || \
mbed_official 125:23cc3068a9e4 275 ((MODE) == TIM_OCMode_Retrigerrable_OPM2) || \
mbed_official 125:23cc3068a9e4 276 ((MODE) == TIM_OCMode_Combined_PWM1) || \
mbed_official 125:23cc3068a9e4 277 ((MODE) == TIM_OCMode_Combined_PWM2) || \
mbed_official 125:23cc3068a9e4 278 ((MODE) == TIM_OCMode_Asymmetric_PWM1) || \
mbed_official 125:23cc3068a9e4 279 ((MODE) == TIM_OCMode_Asymmetric_PWM2))
mbed_official 125:23cc3068a9e4 280
mbed_official 125:23cc3068a9e4 281 #define IS_TIM_OCM(MODE) (((MODE) == TIM_OCMode_Timing) || \
mbed_official 125:23cc3068a9e4 282 ((MODE) == TIM_OCMode_Active) || \
mbed_official 125:23cc3068a9e4 283 ((MODE) == TIM_OCMode_Inactive) || \
mbed_official 125:23cc3068a9e4 284 ((MODE) == TIM_OCMode_Toggle)|| \
mbed_official 125:23cc3068a9e4 285 ((MODE) == TIM_OCMode_PWM1) || \
mbed_official 125:23cc3068a9e4 286 ((MODE) == TIM_OCMode_PWM2) || \
mbed_official 125:23cc3068a9e4 287 ((MODE) == TIM_ForcedAction_Active) || \
mbed_official 125:23cc3068a9e4 288 ((MODE) == TIM_ForcedAction_InActive) || \
mbed_official 125:23cc3068a9e4 289 ((MODE) == TIM_OCMode_Retrigerrable_OPM1) || \
mbed_official 125:23cc3068a9e4 290 ((MODE) == TIM_OCMode_Retrigerrable_OPM2) || \
mbed_official 125:23cc3068a9e4 291 ((MODE) == TIM_OCMode_Combined_PWM1) || \
mbed_official 125:23cc3068a9e4 292 ((MODE) == TIM_OCMode_Combined_PWM2) || \
mbed_official 125:23cc3068a9e4 293 ((MODE) == TIM_OCMode_Asymmetric_PWM1) || \
mbed_official 125:23cc3068a9e4 294 ((MODE) == TIM_OCMode_Asymmetric_PWM2))
mbed_official 125:23cc3068a9e4 295 /**
mbed_official 125:23cc3068a9e4 296 * @}
mbed_official 125:23cc3068a9e4 297 */
mbed_official 125:23cc3068a9e4 298
mbed_official 125:23cc3068a9e4 299 /** @defgroup TIM_One_Pulse_Mode
mbed_official 125:23cc3068a9e4 300 * @{
mbed_official 125:23cc3068a9e4 301 */
mbed_official 125:23cc3068a9e4 302
mbed_official 125:23cc3068a9e4 303 #define TIM_OPMode_Single ((uint16_t)0x0008)
mbed_official 125:23cc3068a9e4 304 #define TIM_OPMode_Repetitive ((uint16_t)0x0000)
mbed_official 125:23cc3068a9e4 305 #define IS_TIM_OPM_MODE(MODE) (((MODE) == TIM_OPMode_Single) || \
mbed_official 125:23cc3068a9e4 306 ((MODE) == TIM_OPMode_Repetitive))
mbed_official 125:23cc3068a9e4 307 /**
mbed_official 125:23cc3068a9e4 308 * @}
mbed_official 125:23cc3068a9e4 309 */
mbed_official 125:23cc3068a9e4 310
mbed_official 125:23cc3068a9e4 311 /** @defgroup TIM_Channel
mbed_official 125:23cc3068a9e4 312 * @{
mbed_official 125:23cc3068a9e4 313 */
mbed_official 125:23cc3068a9e4 314
mbed_official 125:23cc3068a9e4 315 #define TIM_Channel_1 ((uint16_t)0x0000)
mbed_official 125:23cc3068a9e4 316 #define TIM_Channel_2 ((uint16_t)0x0004)
mbed_official 125:23cc3068a9e4 317 #define TIM_Channel_3 ((uint16_t)0x0008)
mbed_official 125:23cc3068a9e4 318 #define TIM_Channel_4 ((uint16_t)0x000C)
mbed_official 125:23cc3068a9e4 319 #define TIM_Channel_5 ((uint16_t)0x0010)
mbed_official 125:23cc3068a9e4 320 #define TIM_Channel_6 ((uint16_t)0x0014)
mbed_official 125:23cc3068a9e4 321
mbed_official 125:23cc3068a9e4 322 #define IS_TIM_CHANNEL(CHANNEL) (((CHANNEL) == TIM_Channel_1) || \
mbed_official 125:23cc3068a9e4 323 ((CHANNEL) == TIM_Channel_2) || \
mbed_official 125:23cc3068a9e4 324 ((CHANNEL) == TIM_Channel_3) || \
mbed_official 125:23cc3068a9e4 325 ((CHANNEL) == TIM_Channel_4))
mbed_official 125:23cc3068a9e4 326
mbed_official 125:23cc3068a9e4 327 #define IS_TIM_PWMI_CHANNEL(CHANNEL) (((CHANNEL) == TIM_Channel_1) || \
mbed_official 125:23cc3068a9e4 328 ((CHANNEL) == TIM_Channel_2))
mbed_official 125:23cc3068a9e4 329 #define IS_TIM_COMPLEMENTARY_CHANNEL(CHANNEL) (((CHANNEL) == TIM_Channel_1) || \
mbed_official 125:23cc3068a9e4 330 ((CHANNEL) == TIM_Channel_2) || \
mbed_official 125:23cc3068a9e4 331 ((CHANNEL) == TIM_Channel_3))
mbed_official 125:23cc3068a9e4 332 /**
mbed_official 125:23cc3068a9e4 333 * @}
mbed_official 125:23cc3068a9e4 334 */
mbed_official 125:23cc3068a9e4 335
mbed_official 125:23cc3068a9e4 336 /** @defgroup TIM_Clock_Division_CKD
mbed_official 125:23cc3068a9e4 337 * @{
mbed_official 125:23cc3068a9e4 338 */
mbed_official 125:23cc3068a9e4 339
mbed_official 125:23cc3068a9e4 340 #define TIM_CKD_DIV1 ((uint16_t)0x0000)
mbed_official 125:23cc3068a9e4 341 #define TIM_CKD_DIV2 ((uint16_t)0x0100)
mbed_official 125:23cc3068a9e4 342 #define TIM_CKD_DIV4 ((uint16_t)0x0200)
mbed_official 125:23cc3068a9e4 343 #define IS_TIM_CKD_DIV(DIV) (((DIV) == TIM_CKD_DIV1) || \
mbed_official 125:23cc3068a9e4 344 ((DIV) == TIM_CKD_DIV2) || \
mbed_official 125:23cc3068a9e4 345 ((DIV) == TIM_CKD_DIV4))
mbed_official 125:23cc3068a9e4 346 /**
mbed_official 125:23cc3068a9e4 347 * @}
mbed_official 125:23cc3068a9e4 348 */
mbed_official 125:23cc3068a9e4 349
mbed_official 125:23cc3068a9e4 350 /** @defgroup TIM_Counter_Mode
mbed_official 125:23cc3068a9e4 351 * @{
mbed_official 125:23cc3068a9e4 352 */
mbed_official 125:23cc3068a9e4 353
mbed_official 125:23cc3068a9e4 354 #define TIM_CounterMode_Up ((uint16_t)0x0000)
mbed_official 125:23cc3068a9e4 355 #define TIM_CounterMode_Down ((uint16_t)0x0010)
mbed_official 125:23cc3068a9e4 356 #define TIM_CounterMode_CenterAligned1 ((uint16_t)0x0020)
mbed_official 125:23cc3068a9e4 357 #define TIM_CounterMode_CenterAligned2 ((uint16_t)0x0040)
mbed_official 125:23cc3068a9e4 358 #define TIM_CounterMode_CenterAligned3 ((uint16_t)0x0060)
mbed_official 125:23cc3068a9e4 359 #define IS_TIM_COUNTER_MODE(MODE) (((MODE) == TIM_CounterMode_Up) || \
mbed_official 125:23cc3068a9e4 360 ((MODE) == TIM_CounterMode_Down) || \
mbed_official 125:23cc3068a9e4 361 ((MODE) == TIM_CounterMode_CenterAligned1) || \
mbed_official 125:23cc3068a9e4 362 ((MODE) == TIM_CounterMode_CenterAligned2) || \
mbed_official 125:23cc3068a9e4 363 ((MODE) == TIM_CounterMode_CenterAligned3))
mbed_official 125:23cc3068a9e4 364 /**
mbed_official 125:23cc3068a9e4 365 * @}
mbed_official 125:23cc3068a9e4 366 */
mbed_official 125:23cc3068a9e4 367
mbed_official 125:23cc3068a9e4 368 /** @defgroup TIM_Output_Compare_Polarity
mbed_official 125:23cc3068a9e4 369 * @{
mbed_official 125:23cc3068a9e4 370 */
mbed_official 125:23cc3068a9e4 371
mbed_official 125:23cc3068a9e4 372 #define TIM_OCPolarity_High ((uint16_t)0x0000)
mbed_official 125:23cc3068a9e4 373 #define TIM_OCPolarity_Low ((uint16_t)0x0002)
mbed_official 125:23cc3068a9e4 374 #define IS_TIM_OC_POLARITY(POLARITY) (((POLARITY) == TIM_OCPolarity_High) || \
mbed_official 125:23cc3068a9e4 375 ((POLARITY) == TIM_OCPolarity_Low))
mbed_official 125:23cc3068a9e4 376 /**
mbed_official 125:23cc3068a9e4 377 * @}
mbed_official 125:23cc3068a9e4 378 */
mbed_official 125:23cc3068a9e4 379
mbed_official 125:23cc3068a9e4 380 /** @defgroup TIM_Output_Compare_N_Polarity
mbed_official 125:23cc3068a9e4 381 * @{
mbed_official 125:23cc3068a9e4 382 */
mbed_official 125:23cc3068a9e4 383
mbed_official 125:23cc3068a9e4 384 #define TIM_OCNPolarity_High ((uint16_t)0x0000)
mbed_official 125:23cc3068a9e4 385 #define TIM_OCNPolarity_Low ((uint16_t)0x0008)
mbed_official 125:23cc3068a9e4 386 #define IS_TIM_OCN_POLARITY(POLARITY) (((POLARITY) == TIM_OCNPolarity_High) || \
mbed_official 125:23cc3068a9e4 387 ((POLARITY) == TIM_OCNPolarity_Low))
mbed_official 125:23cc3068a9e4 388 /**
mbed_official 125:23cc3068a9e4 389 * @}
mbed_official 125:23cc3068a9e4 390 */
mbed_official 125:23cc3068a9e4 391
mbed_official 125:23cc3068a9e4 392 /** @defgroup TIM_Output_Compare_State
mbed_official 125:23cc3068a9e4 393 * @{
mbed_official 125:23cc3068a9e4 394 */
mbed_official 125:23cc3068a9e4 395
mbed_official 125:23cc3068a9e4 396 #define TIM_OutputState_Disable ((uint16_t)0x0000)
mbed_official 125:23cc3068a9e4 397 #define TIM_OutputState_Enable ((uint16_t)0x0001)
mbed_official 125:23cc3068a9e4 398 #define IS_TIM_OUTPUT_STATE(STATE) (((STATE) == TIM_OutputState_Disable) || \
mbed_official 125:23cc3068a9e4 399 ((STATE) == TIM_OutputState_Enable))
mbed_official 125:23cc3068a9e4 400 /**
mbed_official 125:23cc3068a9e4 401 * @}
mbed_official 125:23cc3068a9e4 402 */
mbed_official 125:23cc3068a9e4 403
mbed_official 125:23cc3068a9e4 404 /** @defgroup TIM_Output_Compare_N_State
mbed_official 125:23cc3068a9e4 405 * @{
mbed_official 125:23cc3068a9e4 406 */
mbed_official 125:23cc3068a9e4 407
mbed_official 125:23cc3068a9e4 408 #define TIM_OutputNState_Disable ((uint16_t)0x0000)
mbed_official 125:23cc3068a9e4 409 #define TIM_OutputNState_Enable ((uint16_t)0x0004)
mbed_official 125:23cc3068a9e4 410 #define IS_TIM_OUTPUTN_STATE(STATE) (((STATE) == TIM_OutputNState_Disable) || \
mbed_official 125:23cc3068a9e4 411 ((STATE) == TIM_OutputNState_Enable))
mbed_official 125:23cc3068a9e4 412 /**
mbed_official 125:23cc3068a9e4 413 * @}
mbed_official 125:23cc3068a9e4 414 */
mbed_official 125:23cc3068a9e4 415
mbed_official 125:23cc3068a9e4 416 /** @defgroup TIM_Capture_Compare_State
mbed_official 125:23cc3068a9e4 417 * @{
mbed_official 125:23cc3068a9e4 418 */
mbed_official 125:23cc3068a9e4 419
mbed_official 125:23cc3068a9e4 420 #define TIM_CCx_Enable ((uint16_t)0x0001)
mbed_official 125:23cc3068a9e4 421 #define TIM_CCx_Disable ((uint16_t)0x0000)
mbed_official 125:23cc3068a9e4 422 #define IS_TIM_CCX(CCX) (((CCX) == TIM_CCx_Enable) || \
mbed_official 125:23cc3068a9e4 423 ((CCX) == TIM_CCx_Disable))
mbed_official 125:23cc3068a9e4 424 /**
mbed_official 125:23cc3068a9e4 425 * @}
mbed_official 125:23cc3068a9e4 426 */
mbed_official 125:23cc3068a9e4 427
mbed_official 125:23cc3068a9e4 428 /** @defgroup TIM_Capture_Compare_N_State
mbed_official 125:23cc3068a9e4 429 * @{
mbed_official 125:23cc3068a9e4 430 */
mbed_official 125:23cc3068a9e4 431
mbed_official 125:23cc3068a9e4 432 #define TIM_CCxN_Enable ((uint16_t)0x0004)
mbed_official 125:23cc3068a9e4 433 #define TIM_CCxN_Disable ((uint16_t)0x0000)
mbed_official 125:23cc3068a9e4 434 #define IS_TIM_CCXN(CCXN) (((CCXN) == TIM_CCxN_Enable) || \
mbed_official 125:23cc3068a9e4 435 ((CCXN) == TIM_CCxN_Disable))
mbed_official 125:23cc3068a9e4 436 /**
mbed_official 125:23cc3068a9e4 437 * @}
mbed_official 125:23cc3068a9e4 438 */
mbed_official 125:23cc3068a9e4 439
mbed_official 125:23cc3068a9e4 440 /** @defgroup TIM_Break_Input_enable_disable
mbed_official 125:23cc3068a9e4 441 * @{
mbed_official 125:23cc3068a9e4 442 */
mbed_official 125:23cc3068a9e4 443
mbed_official 125:23cc3068a9e4 444 #define TIM_Break_Enable ((uint16_t)0x1000)
mbed_official 125:23cc3068a9e4 445 #define TIM_Break_Disable ((uint16_t)0x0000)
mbed_official 125:23cc3068a9e4 446 #define IS_TIM_BREAK_STATE(STATE) (((STATE) == TIM_Break_Enable) || \
mbed_official 125:23cc3068a9e4 447 ((STATE) == TIM_Break_Disable))
mbed_official 125:23cc3068a9e4 448 /**
mbed_official 125:23cc3068a9e4 449 * @}
mbed_official 125:23cc3068a9e4 450 */
mbed_official 125:23cc3068a9e4 451
mbed_official 125:23cc3068a9e4 452 /** @defgroup TIM_Break1_Input_enable_disable
mbed_official 125:23cc3068a9e4 453 * @{
mbed_official 125:23cc3068a9e4 454 */
mbed_official 125:23cc3068a9e4 455
mbed_official 125:23cc3068a9e4 456 #define TIM_Break1_Enable ((uint32_t)0x00001000)
mbed_official 125:23cc3068a9e4 457 #define TIM_Break1_Disable ((uint32_t)0x00000000)
mbed_official 125:23cc3068a9e4 458 #define IS_TIM_BREAK1_STATE(STATE) (((STATE) == TIM_Break1_Enable) || \
mbed_official 125:23cc3068a9e4 459 ((STATE) == TIM_Break1_Disable))
mbed_official 125:23cc3068a9e4 460 /**
mbed_official 125:23cc3068a9e4 461 * @}
mbed_official 125:23cc3068a9e4 462 */
mbed_official 125:23cc3068a9e4 463
mbed_official 125:23cc3068a9e4 464 /** @defgroup TIM_Break2_Input_enable_disable
mbed_official 125:23cc3068a9e4 465 * @{
mbed_official 125:23cc3068a9e4 466 */
mbed_official 125:23cc3068a9e4 467
mbed_official 125:23cc3068a9e4 468 #define TIM_Break2_Enable ((uint32_t)0x01000000)
mbed_official 125:23cc3068a9e4 469 #define TIM_Break2_Disable ((uint32_t)0x00000000)
mbed_official 125:23cc3068a9e4 470 #define IS_TIM_BREAK2_STATE(STATE) (((STATE) == TIM_Break2_Enable) || \
mbed_official 125:23cc3068a9e4 471 ((STATE) == TIM_Break2_Disable))
mbed_official 125:23cc3068a9e4 472 /**
mbed_official 125:23cc3068a9e4 473 * @}
mbed_official 125:23cc3068a9e4 474 */
mbed_official 125:23cc3068a9e4 475
mbed_official 125:23cc3068a9e4 476 /** @defgroup TIM_Break_Polarity
mbed_official 125:23cc3068a9e4 477 * @{
mbed_official 125:23cc3068a9e4 478 */
mbed_official 125:23cc3068a9e4 479
mbed_official 125:23cc3068a9e4 480 #define TIM_BreakPolarity_Low ((uint16_t)0x0000)
mbed_official 125:23cc3068a9e4 481 #define TIM_BreakPolarity_High ((uint16_t)0x2000)
mbed_official 125:23cc3068a9e4 482 #define IS_TIM_BREAK_POLARITY(POLARITY) (((POLARITY) == TIM_BreakPolarity_Low) || \
mbed_official 125:23cc3068a9e4 483 ((POLARITY) == TIM_BreakPolarity_High))
mbed_official 125:23cc3068a9e4 484 /**
mbed_official 125:23cc3068a9e4 485 * @}
mbed_official 125:23cc3068a9e4 486 */
mbed_official 125:23cc3068a9e4 487
mbed_official 125:23cc3068a9e4 488 /** @defgroup TIM_Break1_Polarity
mbed_official 125:23cc3068a9e4 489 * @{
mbed_official 125:23cc3068a9e4 490 */
mbed_official 125:23cc3068a9e4 491
mbed_official 125:23cc3068a9e4 492 #define TIM_Break1Polarity_Low ((uint32_t)0x00000000)
mbed_official 125:23cc3068a9e4 493 #define TIM_Break1Polarity_High ((uint32_t)0x00002000)
mbed_official 125:23cc3068a9e4 494 #define IS_TIM_BREAK1_POLARITY(POLARITY) (((POLARITY) == TIM_Break1Polarity_Low) || \
mbed_official 125:23cc3068a9e4 495 ((POLARITY) == TIM_Break1Polarity_High))
mbed_official 125:23cc3068a9e4 496 /**
mbed_official 125:23cc3068a9e4 497 * @}
mbed_official 125:23cc3068a9e4 498 */
mbed_official 125:23cc3068a9e4 499
mbed_official 125:23cc3068a9e4 500 /** @defgroup TIM_Break2_Polarity
mbed_official 125:23cc3068a9e4 501 * @{
mbed_official 125:23cc3068a9e4 502 */
mbed_official 125:23cc3068a9e4 503
mbed_official 125:23cc3068a9e4 504 #define TIM_Break2Polarity_Low ((uint32_t)0x00000000)
mbed_official 125:23cc3068a9e4 505 #define TIM_Break2Polarity_High ((uint32_t)0x02000000)
mbed_official 125:23cc3068a9e4 506 #define IS_TIM_BREAK2_POLARITY(POLARITY) (((POLARITY) == TIM_Break2Polarity_Low) || \
mbed_official 125:23cc3068a9e4 507 ((POLARITY) == TIM_Break2Polarity_High))
mbed_official 125:23cc3068a9e4 508 /**
mbed_official 125:23cc3068a9e4 509 * @}
mbed_official 125:23cc3068a9e4 510 */
mbed_official 125:23cc3068a9e4 511
mbed_official 125:23cc3068a9e4 512 /** @defgroup TIM_Break1_Filter
mbed_official 125:23cc3068a9e4 513 * @{
mbed_official 125:23cc3068a9e4 514 */
mbed_official 125:23cc3068a9e4 515
mbed_official 125:23cc3068a9e4 516 #define IS_TIM_BREAK1_FILTER(FILTER) ((FILTER) <= 0xF)
mbed_official 125:23cc3068a9e4 517 /**
mbed_official 125:23cc3068a9e4 518 * @}
mbed_official 125:23cc3068a9e4 519 */
mbed_official 125:23cc3068a9e4 520
mbed_official 125:23cc3068a9e4 521 /** @defgroup TIM_Break2_Filter
mbed_official 125:23cc3068a9e4 522 * @{
mbed_official 125:23cc3068a9e4 523 */
mbed_official 125:23cc3068a9e4 524
mbed_official 125:23cc3068a9e4 525 #define IS_TIM_BREAK2_FILTER(FILTER) ((FILTER) <= 0xF)
mbed_official 125:23cc3068a9e4 526 /**
mbed_official 125:23cc3068a9e4 527 * @}
mbed_official 125:23cc3068a9e4 528 */
mbed_official 125:23cc3068a9e4 529
mbed_official 125:23cc3068a9e4 530 /** @defgroup TIM_AOE_Bit_Set_Reset
mbed_official 125:23cc3068a9e4 531 * @{
mbed_official 125:23cc3068a9e4 532 */
mbed_official 125:23cc3068a9e4 533
mbed_official 125:23cc3068a9e4 534 #define TIM_AutomaticOutput_Enable ((uint16_t)0x4000)
mbed_official 125:23cc3068a9e4 535 #define TIM_AutomaticOutput_Disable ((uint16_t)0x0000)
mbed_official 125:23cc3068a9e4 536 #define IS_TIM_AUTOMATIC_OUTPUT_STATE(STATE) (((STATE) == TIM_AutomaticOutput_Enable) || \
mbed_official 125:23cc3068a9e4 537 ((STATE) == TIM_AutomaticOutput_Disable))
mbed_official 125:23cc3068a9e4 538 /**
mbed_official 125:23cc3068a9e4 539 * @}
mbed_official 125:23cc3068a9e4 540 */
mbed_official 125:23cc3068a9e4 541
mbed_official 125:23cc3068a9e4 542 /** @defgroup TIM_Lock_level
mbed_official 125:23cc3068a9e4 543 * @{
mbed_official 125:23cc3068a9e4 544 */
mbed_official 125:23cc3068a9e4 545
mbed_official 125:23cc3068a9e4 546 #define TIM_LOCKLevel_OFF ((uint16_t)0x0000)
mbed_official 125:23cc3068a9e4 547 #define TIM_LOCKLevel_1 ((uint16_t)0x0100)
mbed_official 125:23cc3068a9e4 548 #define TIM_LOCKLevel_2 ((uint16_t)0x0200)
mbed_official 125:23cc3068a9e4 549 #define TIM_LOCKLevel_3 ((uint16_t)0x0300)
mbed_official 125:23cc3068a9e4 550 #define IS_TIM_LOCK_LEVEL(LEVEL) (((LEVEL) == TIM_LOCKLevel_OFF) || \
mbed_official 125:23cc3068a9e4 551 ((LEVEL) == TIM_LOCKLevel_1) || \
mbed_official 125:23cc3068a9e4 552 ((LEVEL) == TIM_LOCKLevel_2) || \
mbed_official 125:23cc3068a9e4 553 ((LEVEL) == TIM_LOCKLevel_3))
mbed_official 125:23cc3068a9e4 554 /**
mbed_official 125:23cc3068a9e4 555 * @}
mbed_official 125:23cc3068a9e4 556 */
mbed_official 125:23cc3068a9e4 557
mbed_official 125:23cc3068a9e4 558 /** @defgroup TIM_OSSI_Off_State_Selection_for_Idle_mode_state
mbed_official 125:23cc3068a9e4 559 * @{
mbed_official 125:23cc3068a9e4 560 */
mbed_official 125:23cc3068a9e4 561
mbed_official 125:23cc3068a9e4 562 #define TIM_OSSIState_Enable ((uint16_t)0x0400)
mbed_official 125:23cc3068a9e4 563 #define TIM_OSSIState_Disable ((uint16_t)0x0000)
mbed_official 125:23cc3068a9e4 564 #define IS_TIM_OSSI_STATE(STATE) (((STATE) == TIM_OSSIState_Enable) || \
mbed_official 125:23cc3068a9e4 565 ((STATE) == TIM_OSSIState_Disable))
mbed_official 125:23cc3068a9e4 566 /**
mbed_official 125:23cc3068a9e4 567 * @}
mbed_official 125:23cc3068a9e4 568 */
mbed_official 125:23cc3068a9e4 569
mbed_official 125:23cc3068a9e4 570 /** @defgroup TIM_OSSR_Off_State_Selection_for_Run_mode_state
mbed_official 125:23cc3068a9e4 571 * @{
mbed_official 125:23cc3068a9e4 572 */
mbed_official 125:23cc3068a9e4 573
mbed_official 125:23cc3068a9e4 574 #define TIM_OSSRState_Enable ((uint16_t)0x0800)
mbed_official 125:23cc3068a9e4 575 #define TIM_OSSRState_Disable ((uint16_t)0x0000)
mbed_official 125:23cc3068a9e4 576 #define IS_TIM_OSSR_STATE(STATE) (((STATE) == TIM_OSSRState_Enable) || \
mbed_official 125:23cc3068a9e4 577 ((STATE) == TIM_OSSRState_Disable))
mbed_official 125:23cc3068a9e4 578 /**
mbed_official 125:23cc3068a9e4 579 * @}
mbed_official 125:23cc3068a9e4 580 */
mbed_official 125:23cc3068a9e4 581
mbed_official 125:23cc3068a9e4 582 /** @defgroup TIM_Output_Compare_Idle_State
mbed_official 125:23cc3068a9e4 583 * @{
mbed_official 125:23cc3068a9e4 584 */
mbed_official 125:23cc3068a9e4 585
mbed_official 125:23cc3068a9e4 586 #define TIM_OCIdleState_Set ((uint16_t)0x0100)
mbed_official 125:23cc3068a9e4 587 #define TIM_OCIdleState_Reset ((uint16_t)0x0000)
mbed_official 125:23cc3068a9e4 588 #define IS_TIM_OCIDLE_STATE(STATE) (((STATE) == TIM_OCIdleState_Set) || \
mbed_official 125:23cc3068a9e4 589 ((STATE) == TIM_OCIdleState_Reset))
mbed_official 125:23cc3068a9e4 590 /**
mbed_official 125:23cc3068a9e4 591 * @}
mbed_official 125:23cc3068a9e4 592 */
mbed_official 125:23cc3068a9e4 593
mbed_official 125:23cc3068a9e4 594 /** @defgroup TIM_Output_Compare_N_Idle_State
mbed_official 125:23cc3068a9e4 595 * @{
mbed_official 125:23cc3068a9e4 596 */
mbed_official 125:23cc3068a9e4 597
mbed_official 125:23cc3068a9e4 598 #define TIM_OCNIdleState_Set ((uint16_t)0x0200)
mbed_official 125:23cc3068a9e4 599 #define TIM_OCNIdleState_Reset ((uint16_t)0x0000)
mbed_official 125:23cc3068a9e4 600 #define IS_TIM_OCNIDLE_STATE(STATE) (((STATE) == TIM_OCNIdleState_Set) || \
mbed_official 125:23cc3068a9e4 601 ((STATE) == TIM_OCNIdleState_Reset))
mbed_official 125:23cc3068a9e4 602 /**
mbed_official 125:23cc3068a9e4 603 * @}
mbed_official 125:23cc3068a9e4 604 */
mbed_official 125:23cc3068a9e4 605
mbed_official 125:23cc3068a9e4 606 /** @defgroup TIM_Input_Capture_Polarity
mbed_official 125:23cc3068a9e4 607 * @{
mbed_official 125:23cc3068a9e4 608 */
mbed_official 125:23cc3068a9e4 609
mbed_official 125:23cc3068a9e4 610 #define TIM_ICPolarity_Rising ((uint16_t)0x0000)
mbed_official 125:23cc3068a9e4 611 #define TIM_ICPolarity_Falling ((uint16_t)0x0002)
mbed_official 125:23cc3068a9e4 612 #define TIM_ICPolarity_BothEdge ((uint16_t)0x000A)
mbed_official 125:23cc3068a9e4 613 #define IS_TIM_IC_POLARITY(POLARITY) (((POLARITY) == TIM_ICPolarity_Rising) || \
mbed_official 125:23cc3068a9e4 614 ((POLARITY) == TIM_ICPolarity_Falling)|| \
mbed_official 125:23cc3068a9e4 615 ((POLARITY) == TIM_ICPolarity_BothEdge))
mbed_official 125:23cc3068a9e4 616 /**
mbed_official 125:23cc3068a9e4 617 * @}
mbed_official 125:23cc3068a9e4 618 */
mbed_official 125:23cc3068a9e4 619
mbed_official 125:23cc3068a9e4 620 /** @defgroup TIM_Input_Capture_Selection
mbed_official 125:23cc3068a9e4 621 * @{
mbed_official 125:23cc3068a9e4 622 */
mbed_official 125:23cc3068a9e4 623
mbed_official 125:23cc3068a9e4 624 #define TIM_ICSelection_DirectTI ((uint16_t)0x0001) /*!< TIM Input 1, 2, 3 or 4 is selected to be
mbed_official 125:23cc3068a9e4 625 connected to IC1, IC2, IC3 or IC4, respectively */
mbed_official 125:23cc3068a9e4 626 #define TIM_ICSelection_IndirectTI ((uint16_t)0x0002) /*!< TIM Input 1, 2, 3 or 4 is selected to be
mbed_official 125:23cc3068a9e4 627 connected to IC2, IC1, IC4 or IC3, respectively. */
mbed_official 125:23cc3068a9e4 628 #define TIM_ICSelection_TRC ((uint16_t)0x0003) /*!< TIM Input 1, 2, 3 or 4 is selected to be connected to TRC. */
mbed_official 125:23cc3068a9e4 629 #define IS_TIM_IC_SELECTION(SELECTION) (((SELECTION) == TIM_ICSelection_DirectTI) || \
mbed_official 125:23cc3068a9e4 630 ((SELECTION) == TIM_ICSelection_IndirectTI) || \
mbed_official 125:23cc3068a9e4 631 ((SELECTION) == TIM_ICSelection_TRC))
mbed_official 125:23cc3068a9e4 632 /**
mbed_official 125:23cc3068a9e4 633 * @}
mbed_official 125:23cc3068a9e4 634 */
mbed_official 125:23cc3068a9e4 635
mbed_official 125:23cc3068a9e4 636 /** @defgroup TIM_Input_Capture_Prescaler
mbed_official 125:23cc3068a9e4 637 * @{
mbed_official 125:23cc3068a9e4 638 */
mbed_official 125:23cc3068a9e4 639
mbed_official 125:23cc3068a9e4 640 #define TIM_ICPSC_DIV1 ((uint16_t)0x0000) /*!< Capture performed each time an edge is detected on the capture input. */
mbed_official 125:23cc3068a9e4 641 #define TIM_ICPSC_DIV2 ((uint16_t)0x0004) /*!< Capture performed once every 2 events. */
mbed_official 125:23cc3068a9e4 642 #define TIM_ICPSC_DIV4 ((uint16_t)0x0008) /*!< Capture performed once every 4 events. */
mbed_official 125:23cc3068a9e4 643 #define TIM_ICPSC_DIV8 ((uint16_t)0x000C) /*!< Capture performed once every 8 events. */
mbed_official 125:23cc3068a9e4 644 #define IS_TIM_IC_PRESCALER(PRESCALER) (((PRESCALER) == TIM_ICPSC_DIV1) || \
mbed_official 125:23cc3068a9e4 645 ((PRESCALER) == TIM_ICPSC_DIV2) || \
mbed_official 125:23cc3068a9e4 646 ((PRESCALER) == TIM_ICPSC_DIV4) || \
mbed_official 125:23cc3068a9e4 647 ((PRESCALER) == TIM_ICPSC_DIV8))
mbed_official 125:23cc3068a9e4 648 /**
mbed_official 125:23cc3068a9e4 649 * @}
mbed_official 125:23cc3068a9e4 650 */
mbed_official 125:23cc3068a9e4 651
mbed_official 125:23cc3068a9e4 652 /** @defgroup TIM_interrupt_sources
mbed_official 125:23cc3068a9e4 653 * @{
mbed_official 125:23cc3068a9e4 654 */
mbed_official 125:23cc3068a9e4 655
mbed_official 125:23cc3068a9e4 656 #define TIM_IT_Update ((uint16_t)0x0001)
mbed_official 125:23cc3068a9e4 657 #define TIM_IT_CC1 ((uint16_t)0x0002)
mbed_official 125:23cc3068a9e4 658 #define TIM_IT_CC2 ((uint16_t)0x0004)
mbed_official 125:23cc3068a9e4 659 #define TIM_IT_CC3 ((uint16_t)0x0008)
mbed_official 125:23cc3068a9e4 660 #define TIM_IT_CC4 ((uint16_t)0x0010)
mbed_official 125:23cc3068a9e4 661 #define TIM_IT_COM ((uint16_t)0x0020)
mbed_official 125:23cc3068a9e4 662 #define TIM_IT_Trigger ((uint16_t)0x0040)
mbed_official 125:23cc3068a9e4 663 #define TIM_IT_Break ((uint16_t)0x0080)
mbed_official 125:23cc3068a9e4 664 #define IS_TIM_IT(IT) ((((IT) & (uint16_t)0xFF00) == 0x0000) && ((IT) != 0x0000))
mbed_official 125:23cc3068a9e4 665
mbed_official 125:23cc3068a9e4 666 #define IS_TIM_GET_IT(IT) (((IT) == TIM_IT_Update) || \
mbed_official 125:23cc3068a9e4 667 ((IT) == TIM_IT_CC1) || \
mbed_official 125:23cc3068a9e4 668 ((IT) == TIM_IT_CC2) || \
mbed_official 125:23cc3068a9e4 669 ((IT) == TIM_IT_CC3) || \
mbed_official 125:23cc3068a9e4 670 ((IT) == TIM_IT_CC4) || \
mbed_official 125:23cc3068a9e4 671 ((IT) == TIM_IT_COM) || \
mbed_official 125:23cc3068a9e4 672 ((IT) == TIM_IT_Trigger) || \
mbed_official 125:23cc3068a9e4 673 ((IT) == TIM_IT_Break))
mbed_official 125:23cc3068a9e4 674 /**
mbed_official 125:23cc3068a9e4 675 * @}
mbed_official 125:23cc3068a9e4 676 */
mbed_official 125:23cc3068a9e4 677
mbed_official 125:23cc3068a9e4 678 /** @defgroup TIM_DMA_Base_address
mbed_official 125:23cc3068a9e4 679 * @{
mbed_official 125:23cc3068a9e4 680 */
mbed_official 125:23cc3068a9e4 681
mbed_official 125:23cc3068a9e4 682 #define TIM_DMABase_CR1 ((uint16_t)0x0000)
mbed_official 125:23cc3068a9e4 683 #define TIM_DMABase_CR2 ((uint16_t)0x0001)
mbed_official 125:23cc3068a9e4 684 #define TIM_DMABase_SMCR ((uint16_t)0x0002)
mbed_official 125:23cc3068a9e4 685 #define TIM_DMABase_DIER ((uint16_t)0x0003)
mbed_official 125:23cc3068a9e4 686 #define TIM_DMABase_SR ((uint16_t)0x0004)
mbed_official 125:23cc3068a9e4 687 #define TIM_DMABase_EGR ((uint16_t)0x0005)
mbed_official 125:23cc3068a9e4 688 #define TIM_DMABase_CCMR1 ((uint16_t)0x0006)
mbed_official 125:23cc3068a9e4 689 #define TIM_DMABase_CCMR2 ((uint16_t)0x0007)
mbed_official 125:23cc3068a9e4 690 #define TIM_DMABase_CCER ((uint16_t)0x0008)
mbed_official 125:23cc3068a9e4 691 #define TIM_DMABase_CNT ((uint16_t)0x0009)
mbed_official 125:23cc3068a9e4 692 #define TIM_DMABase_PSC ((uint16_t)0x000A)
mbed_official 125:23cc3068a9e4 693 #define TIM_DMABase_ARR ((uint16_t)0x000B)
mbed_official 125:23cc3068a9e4 694 #define TIM_DMABase_RCR ((uint16_t)0x000C)
mbed_official 125:23cc3068a9e4 695 #define TIM_DMABase_CCR1 ((uint16_t)0x000D)
mbed_official 125:23cc3068a9e4 696 #define TIM_DMABase_CCR2 ((uint16_t)0x000E)
mbed_official 125:23cc3068a9e4 697 #define TIM_DMABase_CCR3 ((uint16_t)0x000F)
mbed_official 125:23cc3068a9e4 698 #define TIM_DMABase_CCR4 ((uint16_t)0x0010)
mbed_official 125:23cc3068a9e4 699 #define TIM_DMABase_BDTR ((uint16_t)0x0011)
mbed_official 125:23cc3068a9e4 700 #define TIM_DMABase_DCR ((uint16_t)0x0012)
mbed_official 125:23cc3068a9e4 701 #define TIM_DMABase_OR ((uint16_t)0x0013)
mbed_official 125:23cc3068a9e4 702 #define TIM_DMABase_CCMR3 ((uint16_t)0x0014)
mbed_official 125:23cc3068a9e4 703 #define TIM_DMABase_CCR5 ((uint16_t)0x0015)
mbed_official 125:23cc3068a9e4 704 #define TIM_DMABase_CCR6 ((uint16_t)0x0016)
mbed_official 125:23cc3068a9e4 705 #define IS_TIM_DMA_BASE(BASE) (((BASE) == TIM_DMABase_CR1) || \
mbed_official 125:23cc3068a9e4 706 ((BASE) == TIM_DMABase_CR2) || \
mbed_official 125:23cc3068a9e4 707 ((BASE) == TIM_DMABase_SMCR) || \
mbed_official 125:23cc3068a9e4 708 ((BASE) == TIM_DMABase_DIER) || \
mbed_official 125:23cc3068a9e4 709 ((BASE) == TIM_DMABase_SR) || \
mbed_official 125:23cc3068a9e4 710 ((BASE) == TIM_DMABase_EGR) || \
mbed_official 125:23cc3068a9e4 711 ((BASE) == TIM_DMABase_CCMR1) || \
mbed_official 125:23cc3068a9e4 712 ((BASE) == TIM_DMABase_CCMR2) || \
mbed_official 125:23cc3068a9e4 713 ((BASE) == TIM_DMABase_CCER) || \
mbed_official 125:23cc3068a9e4 714 ((BASE) == TIM_DMABase_CNT) || \
mbed_official 125:23cc3068a9e4 715 ((BASE) == TIM_DMABase_PSC) || \
mbed_official 125:23cc3068a9e4 716 ((BASE) == TIM_DMABase_ARR) || \
mbed_official 125:23cc3068a9e4 717 ((BASE) == TIM_DMABase_RCR) || \
mbed_official 125:23cc3068a9e4 718 ((BASE) == TIM_DMABase_CCR1) || \
mbed_official 125:23cc3068a9e4 719 ((BASE) == TIM_DMABase_CCR2) || \
mbed_official 125:23cc3068a9e4 720 ((BASE) == TIM_DMABase_CCR3) || \
mbed_official 125:23cc3068a9e4 721 ((BASE) == TIM_DMABase_CCR4) || \
mbed_official 125:23cc3068a9e4 722 ((BASE) == TIM_DMABase_BDTR) || \
mbed_official 125:23cc3068a9e4 723 ((BASE) == TIM_DMABase_DCR) || \
mbed_official 125:23cc3068a9e4 724 ((BASE) == TIM_DMABase_OR) || \
mbed_official 125:23cc3068a9e4 725 ((BASE) == TIM_DMABase_CCMR3) || \
mbed_official 125:23cc3068a9e4 726 ((BASE) == TIM_DMABase_CCR5) || \
mbed_official 125:23cc3068a9e4 727 ((BASE) == TIM_DMABase_CCR6))
mbed_official 125:23cc3068a9e4 728 /**
mbed_official 125:23cc3068a9e4 729 * @}
mbed_official 125:23cc3068a9e4 730 */
mbed_official 125:23cc3068a9e4 731
mbed_official 125:23cc3068a9e4 732 /** @defgroup TIM_DMA_Burst_Length
mbed_official 125:23cc3068a9e4 733 * @{
mbed_official 125:23cc3068a9e4 734 */
mbed_official 125:23cc3068a9e4 735
mbed_official 125:23cc3068a9e4 736 #define TIM_DMABurstLength_1Transfer ((uint16_t)0x0000)
mbed_official 125:23cc3068a9e4 737 #define TIM_DMABurstLength_2Transfers ((uint16_t)0x0100)
mbed_official 125:23cc3068a9e4 738 #define TIM_DMABurstLength_3Transfers ((uint16_t)0x0200)
mbed_official 125:23cc3068a9e4 739 #define TIM_DMABurstLength_4Transfers ((uint16_t)0x0300)
mbed_official 125:23cc3068a9e4 740 #define TIM_DMABurstLength_5Transfers ((uint16_t)0x0400)
mbed_official 125:23cc3068a9e4 741 #define TIM_DMABurstLength_6Transfers ((uint16_t)0x0500)
mbed_official 125:23cc3068a9e4 742 #define TIM_DMABurstLength_7Transfers ((uint16_t)0x0600)
mbed_official 125:23cc3068a9e4 743 #define TIM_DMABurstLength_8Transfers ((uint16_t)0x0700)
mbed_official 125:23cc3068a9e4 744 #define TIM_DMABurstLength_9Transfers ((uint16_t)0x0800)
mbed_official 125:23cc3068a9e4 745 #define TIM_DMABurstLength_10Transfers ((uint16_t)0x0900)
mbed_official 125:23cc3068a9e4 746 #define TIM_DMABurstLength_11Transfers ((uint16_t)0x0A00)
mbed_official 125:23cc3068a9e4 747 #define TIM_DMABurstLength_12Transfers ((uint16_t)0x0B00)
mbed_official 125:23cc3068a9e4 748 #define TIM_DMABurstLength_13Transfers ((uint16_t)0x0C00)
mbed_official 125:23cc3068a9e4 749 #define TIM_DMABurstLength_14Transfers ((uint16_t)0x0D00)
mbed_official 125:23cc3068a9e4 750 #define TIM_DMABurstLength_15Transfers ((uint16_t)0x0E00)
mbed_official 125:23cc3068a9e4 751 #define TIM_DMABurstLength_16Transfers ((uint16_t)0x0F00)
mbed_official 125:23cc3068a9e4 752 #define TIM_DMABurstLength_17Transfers ((uint16_t)0x1000)
mbed_official 125:23cc3068a9e4 753 #define TIM_DMABurstLength_18Transfers ((uint16_t)0x1100)
mbed_official 125:23cc3068a9e4 754 #define IS_TIM_DMA_LENGTH(LENGTH) (((LENGTH) == TIM_DMABurstLength_1Transfer) || \
mbed_official 125:23cc3068a9e4 755 ((LENGTH) == TIM_DMABurstLength_2Transfers) || \
mbed_official 125:23cc3068a9e4 756 ((LENGTH) == TIM_DMABurstLength_3Transfers) || \
mbed_official 125:23cc3068a9e4 757 ((LENGTH) == TIM_DMABurstLength_4Transfers) || \
mbed_official 125:23cc3068a9e4 758 ((LENGTH) == TIM_DMABurstLength_5Transfers) || \
mbed_official 125:23cc3068a9e4 759 ((LENGTH) == TIM_DMABurstLength_6Transfers) || \
mbed_official 125:23cc3068a9e4 760 ((LENGTH) == TIM_DMABurstLength_7Transfers) || \
mbed_official 125:23cc3068a9e4 761 ((LENGTH) == TIM_DMABurstLength_8Transfers) || \
mbed_official 125:23cc3068a9e4 762 ((LENGTH) == TIM_DMABurstLength_9Transfers) || \
mbed_official 125:23cc3068a9e4 763 ((LENGTH) == TIM_DMABurstLength_10Transfers) || \
mbed_official 125:23cc3068a9e4 764 ((LENGTH) == TIM_DMABurstLength_11Transfers) || \
mbed_official 125:23cc3068a9e4 765 ((LENGTH) == TIM_DMABurstLength_12Transfers) || \
mbed_official 125:23cc3068a9e4 766 ((LENGTH) == TIM_DMABurstLength_13Transfers) || \
mbed_official 125:23cc3068a9e4 767 ((LENGTH) == TIM_DMABurstLength_14Transfers) || \
mbed_official 125:23cc3068a9e4 768 ((LENGTH) == TIM_DMABurstLength_15Transfers) || \
mbed_official 125:23cc3068a9e4 769 ((LENGTH) == TIM_DMABurstLength_16Transfers) || \
mbed_official 125:23cc3068a9e4 770 ((LENGTH) == TIM_DMABurstLength_17Transfers) || \
mbed_official 125:23cc3068a9e4 771 ((LENGTH) == TIM_DMABurstLength_18Transfers))
mbed_official 125:23cc3068a9e4 772 /**
mbed_official 125:23cc3068a9e4 773 * @}
mbed_official 125:23cc3068a9e4 774 */
mbed_official 125:23cc3068a9e4 775
mbed_official 125:23cc3068a9e4 776 /** @defgroup TIM_DMA_sources
mbed_official 125:23cc3068a9e4 777 * @{
mbed_official 125:23cc3068a9e4 778 */
mbed_official 125:23cc3068a9e4 779
mbed_official 125:23cc3068a9e4 780 #define TIM_DMA_Update ((uint16_t)0x0100)
mbed_official 125:23cc3068a9e4 781 #define TIM_DMA_CC1 ((uint16_t)0x0200)
mbed_official 125:23cc3068a9e4 782 #define TIM_DMA_CC2 ((uint16_t)0x0400)
mbed_official 125:23cc3068a9e4 783 #define TIM_DMA_CC3 ((uint16_t)0x0800)
mbed_official 125:23cc3068a9e4 784 #define TIM_DMA_CC4 ((uint16_t)0x1000)
mbed_official 125:23cc3068a9e4 785 #define TIM_DMA_COM ((uint16_t)0x2000)
mbed_official 125:23cc3068a9e4 786 #define TIM_DMA_Trigger ((uint16_t)0x4000)
mbed_official 125:23cc3068a9e4 787 #define IS_TIM_DMA_SOURCE(SOURCE) ((((SOURCE) & (uint16_t)0x80FF) == 0x0000) && ((SOURCE) != 0x0000))
mbed_official 125:23cc3068a9e4 788
mbed_official 125:23cc3068a9e4 789 /**
mbed_official 125:23cc3068a9e4 790 * @}
mbed_official 125:23cc3068a9e4 791 */
mbed_official 125:23cc3068a9e4 792
mbed_official 125:23cc3068a9e4 793 /** @defgroup TIM_External_Trigger_Prescaler
mbed_official 125:23cc3068a9e4 794 * @{
mbed_official 125:23cc3068a9e4 795 */
mbed_official 125:23cc3068a9e4 796
mbed_official 125:23cc3068a9e4 797 #define TIM_ExtTRGPSC_OFF ((uint16_t)0x0000)
mbed_official 125:23cc3068a9e4 798 #define TIM_ExtTRGPSC_DIV2 ((uint16_t)0x1000)
mbed_official 125:23cc3068a9e4 799 #define TIM_ExtTRGPSC_DIV4 ((uint16_t)0x2000)
mbed_official 125:23cc3068a9e4 800 #define TIM_ExtTRGPSC_DIV8 ((uint16_t)0x3000)
mbed_official 125:23cc3068a9e4 801 #define IS_TIM_EXT_PRESCALER(PRESCALER) (((PRESCALER) == TIM_ExtTRGPSC_OFF) || \
mbed_official 125:23cc3068a9e4 802 ((PRESCALER) == TIM_ExtTRGPSC_DIV2) || \
mbed_official 125:23cc3068a9e4 803 ((PRESCALER) == TIM_ExtTRGPSC_DIV4) || \
mbed_official 125:23cc3068a9e4 804 ((PRESCALER) == TIM_ExtTRGPSC_DIV8))
mbed_official 125:23cc3068a9e4 805 /**
mbed_official 125:23cc3068a9e4 806 * @}
mbed_official 125:23cc3068a9e4 807 */
mbed_official 125:23cc3068a9e4 808
mbed_official 125:23cc3068a9e4 809 /** @defgroup TIM_Internal_Trigger_Selection
mbed_official 125:23cc3068a9e4 810 * @{
mbed_official 125:23cc3068a9e4 811 */
mbed_official 125:23cc3068a9e4 812
mbed_official 125:23cc3068a9e4 813 #define TIM_TS_ITR0 ((uint16_t)0x0000)
mbed_official 125:23cc3068a9e4 814 #define TIM_TS_ITR1 ((uint16_t)0x0010)
mbed_official 125:23cc3068a9e4 815 #define TIM_TS_ITR2 ((uint16_t)0x0020)
mbed_official 125:23cc3068a9e4 816 #define TIM_TS_ITR3 ((uint16_t)0x0030)
mbed_official 125:23cc3068a9e4 817 #define TIM_TS_TI1F_ED ((uint16_t)0x0040)
mbed_official 125:23cc3068a9e4 818 #define TIM_TS_TI1FP1 ((uint16_t)0x0050)
mbed_official 125:23cc3068a9e4 819 #define TIM_TS_TI2FP2 ((uint16_t)0x0060)
mbed_official 125:23cc3068a9e4 820 #define TIM_TS_ETRF ((uint16_t)0x0070)
mbed_official 125:23cc3068a9e4 821 #define IS_TIM_TRIGGER_SELECTION(SELECTION) (((SELECTION) == TIM_TS_ITR0) || \
mbed_official 125:23cc3068a9e4 822 ((SELECTION) == TIM_TS_ITR1) || \
mbed_official 125:23cc3068a9e4 823 ((SELECTION) == TIM_TS_ITR2) || \
mbed_official 125:23cc3068a9e4 824 ((SELECTION) == TIM_TS_ITR3) || \
mbed_official 125:23cc3068a9e4 825 ((SELECTION) == TIM_TS_TI1F_ED) || \
mbed_official 125:23cc3068a9e4 826 ((SELECTION) == TIM_TS_TI1FP1) || \
mbed_official 125:23cc3068a9e4 827 ((SELECTION) == TIM_TS_TI2FP2) || \
mbed_official 125:23cc3068a9e4 828 ((SELECTION) == TIM_TS_ETRF))
mbed_official 125:23cc3068a9e4 829 #define IS_TIM_INTERNAL_TRIGGER_SELECTION(SELECTION) (((SELECTION) == TIM_TS_ITR0) || \
mbed_official 125:23cc3068a9e4 830 ((SELECTION) == TIM_TS_ITR1) || \
mbed_official 125:23cc3068a9e4 831 ((SELECTION) == TIM_TS_ITR2) || \
mbed_official 125:23cc3068a9e4 832 ((SELECTION) == TIM_TS_ITR3))
mbed_official 125:23cc3068a9e4 833 /**
mbed_official 125:23cc3068a9e4 834 * @}
mbed_official 125:23cc3068a9e4 835 */
mbed_official 125:23cc3068a9e4 836
mbed_official 125:23cc3068a9e4 837 /** @defgroup TIM_TIx_External_Clock_Source
mbed_official 125:23cc3068a9e4 838 * @{
mbed_official 125:23cc3068a9e4 839 */
mbed_official 125:23cc3068a9e4 840
mbed_official 125:23cc3068a9e4 841 #define TIM_TIxExternalCLK1Source_TI1 ((uint16_t)0x0050)
mbed_official 125:23cc3068a9e4 842 #define TIM_TIxExternalCLK1Source_TI2 ((uint16_t)0x0060)
mbed_official 125:23cc3068a9e4 843 #define TIM_TIxExternalCLK1Source_TI1ED ((uint16_t)0x0040)
mbed_official 125:23cc3068a9e4 844
mbed_official 125:23cc3068a9e4 845 /**
mbed_official 125:23cc3068a9e4 846 * @}
mbed_official 125:23cc3068a9e4 847 */
mbed_official 125:23cc3068a9e4 848
mbed_official 125:23cc3068a9e4 849 /** @defgroup TIM_External_Trigger_Polarity
mbed_official 125:23cc3068a9e4 850 * @{
mbed_official 125:23cc3068a9e4 851 */
mbed_official 125:23cc3068a9e4 852 #define TIM_ExtTRGPolarity_Inverted ((uint16_t)0x8000)
mbed_official 125:23cc3068a9e4 853 #define TIM_ExtTRGPolarity_NonInverted ((uint16_t)0x0000)
mbed_official 125:23cc3068a9e4 854 #define IS_TIM_EXT_POLARITY(POLARITY) (((POLARITY) == TIM_ExtTRGPolarity_Inverted) || \
mbed_official 125:23cc3068a9e4 855 ((POLARITY) == TIM_ExtTRGPolarity_NonInverted))
mbed_official 125:23cc3068a9e4 856 /**
mbed_official 125:23cc3068a9e4 857 * @}
mbed_official 125:23cc3068a9e4 858 */
mbed_official 125:23cc3068a9e4 859
mbed_official 125:23cc3068a9e4 860 /** @defgroup TIM_Prescaler_Reload_Mode
mbed_official 125:23cc3068a9e4 861 * @{
mbed_official 125:23cc3068a9e4 862 */
mbed_official 125:23cc3068a9e4 863
mbed_official 125:23cc3068a9e4 864 #define TIM_PSCReloadMode_Update ((uint16_t)0x0000)
mbed_official 125:23cc3068a9e4 865 #define TIM_PSCReloadMode_Immediate ((uint16_t)0x0001)
mbed_official 125:23cc3068a9e4 866 #define IS_TIM_PRESCALER_RELOAD(RELOAD) (((RELOAD) == TIM_PSCReloadMode_Update) || \
mbed_official 125:23cc3068a9e4 867 ((RELOAD) == TIM_PSCReloadMode_Immediate))
mbed_official 125:23cc3068a9e4 868 /**
mbed_official 125:23cc3068a9e4 869 * @}
mbed_official 125:23cc3068a9e4 870 */
mbed_official 125:23cc3068a9e4 871
mbed_official 125:23cc3068a9e4 872 /** @defgroup TIM_Forced_Action
mbed_official 125:23cc3068a9e4 873 * @{
mbed_official 125:23cc3068a9e4 874 */
mbed_official 125:23cc3068a9e4 875
mbed_official 125:23cc3068a9e4 876 #define TIM_ForcedAction_Active ((uint16_t)0x0050)
mbed_official 125:23cc3068a9e4 877 #define TIM_ForcedAction_InActive ((uint16_t)0x0040)
mbed_official 125:23cc3068a9e4 878 #define IS_TIM_FORCED_ACTION(ACTION) (((ACTION) == TIM_ForcedAction_Active) || \
mbed_official 125:23cc3068a9e4 879 ((ACTION) == TIM_ForcedAction_InActive))
mbed_official 125:23cc3068a9e4 880 /**
mbed_official 125:23cc3068a9e4 881 * @}
mbed_official 125:23cc3068a9e4 882 */
mbed_official 125:23cc3068a9e4 883
mbed_official 125:23cc3068a9e4 884 /** @defgroup TIM_Encoder_Mode
mbed_official 125:23cc3068a9e4 885 * @{
mbed_official 125:23cc3068a9e4 886 */
mbed_official 125:23cc3068a9e4 887
mbed_official 125:23cc3068a9e4 888 #define TIM_EncoderMode_TI1 ((uint16_t)0x0001)
mbed_official 125:23cc3068a9e4 889 #define TIM_EncoderMode_TI2 ((uint16_t)0x0002)
mbed_official 125:23cc3068a9e4 890 #define TIM_EncoderMode_TI12 ((uint16_t)0x0003)
mbed_official 125:23cc3068a9e4 891 #define IS_TIM_ENCODER_MODE(MODE) (((MODE) == TIM_EncoderMode_TI1) || \
mbed_official 125:23cc3068a9e4 892 ((MODE) == TIM_EncoderMode_TI2) || \
mbed_official 125:23cc3068a9e4 893 ((MODE) == TIM_EncoderMode_TI12))
mbed_official 125:23cc3068a9e4 894 /**
mbed_official 125:23cc3068a9e4 895 * @}
mbed_official 125:23cc3068a9e4 896 */
mbed_official 125:23cc3068a9e4 897
mbed_official 125:23cc3068a9e4 898
mbed_official 125:23cc3068a9e4 899 /** @defgroup TIM_Event_Source
mbed_official 125:23cc3068a9e4 900 * @{
mbed_official 125:23cc3068a9e4 901 */
mbed_official 125:23cc3068a9e4 902
mbed_official 125:23cc3068a9e4 903 #define TIM_EventSource_Update ((uint16_t)0x0001)
mbed_official 125:23cc3068a9e4 904 #define TIM_EventSource_CC1 ((uint16_t)0x0002)
mbed_official 125:23cc3068a9e4 905 #define TIM_EventSource_CC2 ((uint16_t)0x0004)
mbed_official 125:23cc3068a9e4 906 #define TIM_EventSource_CC3 ((uint16_t)0x0008)
mbed_official 125:23cc3068a9e4 907 #define TIM_EventSource_CC4 ((uint16_t)0x0010)
mbed_official 125:23cc3068a9e4 908 #define TIM_EventSource_COM ((uint16_t)0x0020)
mbed_official 125:23cc3068a9e4 909 #define TIM_EventSource_Trigger ((uint16_t)0x0040)
mbed_official 125:23cc3068a9e4 910 #define TIM_EventSource_Break ((uint16_t)0x0080)
mbed_official 125:23cc3068a9e4 911 #define TIM_EventSource_Break2 ((uint16_t)0x0100)
mbed_official 125:23cc3068a9e4 912 #define IS_TIM_EVENT_SOURCE(SOURCE) ((((SOURCE) & (uint16_t)0xFE00) == 0x0000) && ((SOURCE) != 0x0000))
mbed_official 125:23cc3068a9e4 913
mbed_official 125:23cc3068a9e4 914 /**
mbed_official 125:23cc3068a9e4 915 * @}
mbed_official 125:23cc3068a9e4 916 */
mbed_official 125:23cc3068a9e4 917
mbed_official 125:23cc3068a9e4 918 /** @defgroup TIM_Update_Source
mbed_official 125:23cc3068a9e4 919 * @{
mbed_official 125:23cc3068a9e4 920 */
mbed_official 125:23cc3068a9e4 921
mbed_official 125:23cc3068a9e4 922 #define TIM_UpdateSource_Global ((uint16_t)0x0000) /*!< Source of update is the counter overflow/underflow
mbed_official 125:23cc3068a9e4 923 or the setting of UG bit, or an update generation
mbed_official 125:23cc3068a9e4 924 through the slave mode controller. */
mbed_official 125:23cc3068a9e4 925 #define TIM_UpdateSource_Regular ((uint16_t)0x0001) /*!< Source of update is counter overflow/underflow. */
mbed_official 125:23cc3068a9e4 926 #define IS_TIM_UPDATE_SOURCE(SOURCE) (((SOURCE) == TIM_UpdateSource_Global) || \
mbed_official 125:23cc3068a9e4 927 ((SOURCE) == TIM_UpdateSource_Regular))
mbed_official 125:23cc3068a9e4 928 /**
mbed_official 125:23cc3068a9e4 929 * @}
mbed_official 125:23cc3068a9e4 930 */
mbed_official 125:23cc3068a9e4 931
mbed_official 125:23cc3068a9e4 932 /** @defgroup TIM_Output_Compare_Preload_State
mbed_official 125:23cc3068a9e4 933 * @{
mbed_official 125:23cc3068a9e4 934 */
mbed_official 125:23cc3068a9e4 935
mbed_official 125:23cc3068a9e4 936 #define TIM_OCPreload_Enable ((uint16_t)0x0008)
mbed_official 125:23cc3068a9e4 937 #define TIM_OCPreload_Disable ((uint16_t)0x0000)
mbed_official 125:23cc3068a9e4 938 #define IS_TIM_OCPRELOAD_STATE(STATE) (((STATE) == TIM_OCPreload_Enable) || \
mbed_official 125:23cc3068a9e4 939 ((STATE) == TIM_OCPreload_Disable))
mbed_official 125:23cc3068a9e4 940 /**
mbed_official 125:23cc3068a9e4 941 * @}
mbed_official 125:23cc3068a9e4 942 */
mbed_official 125:23cc3068a9e4 943
mbed_official 125:23cc3068a9e4 944 /** @defgroup TIM_Output_Compare_Fast_State
mbed_official 125:23cc3068a9e4 945 * @{
mbed_official 125:23cc3068a9e4 946 */
mbed_official 125:23cc3068a9e4 947
mbed_official 125:23cc3068a9e4 948 #define TIM_OCFast_Enable ((uint16_t)0x0004)
mbed_official 125:23cc3068a9e4 949 #define TIM_OCFast_Disable ((uint16_t)0x0000)
mbed_official 125:23cc3068a9e4 950 #define IS_TIM_OCFAST_STATE(STATE) (((STATE) == TIM_OCFast_Enable) || \
mbed_official 125:23cc3068a9e4 951 ((STATE) == TIM_OCFast_Disable))
mbed_official 125:23cc3068a9e4 952
mbed_official 125:23cc3068a9e4 953 /**
mbed_official 125:23cc3068a9e4 954 * @}
mbed_official 125:23cc3068a9e4 955 */
mbed_official 125:23cc3068a9e4 956
mbed_official 125:23cc3068a9e4 957 /** @defgroup TIM_Output_Compare_Clear_State
mbed_official 125:23cc3068a9e4 958 * @{
mbed_official 125:23cc3068a9e4 959 */
mbed_official 125:23cc3068a9e4 960
mbed_official 125:23cc3068a9e4 961 #define TIM_OCClear_Enable ((uint16_t)0x0080)
mbed_official 125:23cc3068a9e4 962 #define TIM_OCClear_Disable ((uint16_t)0x0000)
mbed_official 125:23cc3068a9e4 963 #define IS_TIM_OCCLEAR_STATE(STATE) (((STATE) == TIM_OCClear_Enable) || \
mbed_official 125:23cc3068a9e4 964 ((STATE) == TIM_OCClear_Disable))
mbed_official 125:23cc3068a9e4 965 /**
mbed_official 125:23cc3068a9e4 966 * @}
mbed_official 125:23cc3068a9e4 967 */
mbed_official 125:23cc3068a9e4 968
mbed_official 125:23cc3068a9e4 969 /** @defgroup TIM_Trigger_Output_Source
mbed_official 125:23cc3068a9e4 970 * @{
mbed_official 125:23cc3068a9e4 971 */
mbed_official 125:23cc3068a9e4 972
mbed_official 125:23cc3068a9e4 973 #define TIM_TRGOSource_Reset ((uint16_t)0x0000)
mbed_official 125:23cc3068a9e4 974 #define TIM_TRGOSource_Enable ((uint16_t)0x0010)
mbed_official 125:23cc3068a9e4 975 #define TIM_TRGOSource_Update ((uint16_t)0x0020)
mbed_official 125:23cc3068a9e4 976 #define TIM_TRGOSource_OC1 ((uint16_t)0x0030)
mbed_official 125:23cc3068a9e4 977 #define TIM_TRGOSource_OC1Ref ((uint16_t)0x0040)
mbed_official 125:23cc3068a9e4 978 #define TIM_TRGOSource_OC2Ref ((uint16_t)0x0050)
mbed_official 125:23cc3068a9e4 979 #define TIM_TRGOSource_OC3Ref ((uint16_t)0x0060)
mbed_official 125:23cc3068a9e4 980 #define TIM_TRGOSource_OC4Ref ((uint16_t)0x0070)
mbed_official 125:23cc3068a9e4 981 #define IS_TIM_TRGO_SOURCE(SOURCE) (((SOURCE) == TIM_TRGOSource_Reset) || \
mbed_official 125:23cc3068a9e4 982 ((SOURCE) == TIM_TRGOSource_Enable) || \
mbed_official 125:23cc3068a9e4 983 ((SOURCE) == TIM_TRGOSource_Update) || \
mbed_official 125:23cc3068a9e4 984 ((SOURCE) == TIM_TRGOSource_OC1) || \
mbed_official 125:23cc3068a9e4 985 ((SOURCE) == TIM_TRGOSource_OC1Ref) || \
mbed_official 125:23cc3068a9e4 986 ((SOURCE) == TIM_TRGOSource_OC2Ref) || \
mbed_official 125:23cc3068a9e4 987 ((SOURCE) == TIM_TRGOSource_OC3Ref) || \
mbed_official 125:23cc3068a9e4 988 ((SOURCE) == TIM_TRGOSource_OC4Ref))
mbed_official 125:23cc3068a9e4 989
mbed_official 125:23cc3068a9e4 990
mbed_official 125:23cc3068a9e4 991 #define TIM_TRGO2Source_Reset ((uint32_t)0x00000000)
mbed_official 125:23cc3068a9e4 992 #define TIM_TRGO2Source_Enable ((uint32_t)0x00100000)
mbed_official 125:23cc3068a9e4 993 #define TIM_TRGO2Source_Update ((uint32_t)0x00200000)
mbed_official 125:23cc3068a9e4 994 #define TIM_TRGO2Source_OC1 ((uint32_t)0x00300000)
mbed_official 125:23cc3068a9e4 995 #define TIM_TRGO2Source_OC1Ref ((uint32_t)0x00400000)
mbed_official 125:23cc3068a9e4 996 #define TIM_TRGO2Source_OC2Ref ((uint32_t)0x00500000)
mbed_official 125:23cc3068a9e4 997 #define TIM_TRGO2Source_OC3Ref ((uint32_t)0x00600000)
mbed_official 125:23cc3068a9e4 998 #define TIM_TRGO2Source_OC4Ref ((uint32_t)0x00700000)
mbed_official 125:23cc3068a9e4 999 #define TIM_TRGO2Source_OC5Ref ((uint32_t)0x00800000)
mbed_official 125:23cc3068a9e4 1000 #define TIM_TRGO2Source_OC6Ref ((uint32_t)0x00900000)
mbed_official 125:23cc3068a9e4 1001 #define TIM_TRGO2Source_OC4Ref_RisingFalling ((uint32_t)0x00A00000)
mbed_official 125:23cc3068a9e4 1002 #define TIM_TRGO2Source_OC6Ref_RisingFalling ((uint32_t)0x00B00000)
mbed_official 125:23cc3068a9e4 1003 #define TIM_TRGO2Source_OC4RefRising_OC6RefRising ((uint32_t)0x00C00000)
mbed_official 125:23cc3068a9e4 1004 #define TIM_TRGO2Source_OC4RefRising_OC6RefFalling ((uint32_t)0x00D00000)
mbed_official 125:23cc3068a9e4 1005 #define TIM_TRGO2Source_OC5RefRising_OC6RefRising ((uint32_t)0x00E00000)
mbed_official 125:23cc3068a9e4 1006 #define TIM_TRGO2Source_OC5RefRising_OC6RefFalling ((uint32_t)0x00F00000)
mbed_official 125:23cc3068a9e4 1007 #define IS_TIM_TRGO2_SOURCE(SOURCE) (((SOURCE) == TIM_TRGO2Source_Reset) || \
mbed_official 125:23cc3068a9e4 1008 ((SOURCE) == TIM_TRGO2Source_Enable) || \
mbed_official 125:23cc3068a9e4 1009 ((SOURCE) == TIM_TRGO2Source_Update) || \
mbed_official 125:23cc3068a9e4 1010 ((SOURCE) == TIM_TRGO2Source_OC1) || \
mbed_official 125:23cc3068a9e4 1011 ((SOURCE) == TIM_TRGO2Source_OC1Ref) || \
mbed_official 125:23cc3068a9e4 1012 ((SOURCE) == TIM_TRGO2Source_OC2Ref) || \
mbed_official 125:23cc3068a9e4 1013 ((SOURCE) == TIM_TRGO2Source_OC3Ref) || \
mbed_official 125:23cc3068a9e4 1014 ((SOURCE) == TIM_TRGO2Source_OC4Ref) || \
mbed_official 125:23cc3068a9e4 1015 ((SOURCE) == TIM_TRGO2Source_OC5Ref) || \
mbed_official 125:23cc3068a9e4 1016 ((SOURCE) == TIM_TRGO2Source_OC6Ref) || \
mbed_official 125:23cc3068a9e4 1017 ((SOURCE) == TIM_TRGO2Source_OC4Ref_RisingFalling) || \
mbed_official 125:23cc3068a9e4 1018 ((SOURCE) == TIM_TRGO2Source_OC6Ref_RisingFalling) || \
mbed_official 125:23cc3068a9e4 1019 ((SOURCE) == TIM_TRGO2Source_OC4RefRising_OC6RefRising) || \
mbed_official 125:23cc3068a9e4 1020 ((SOURCE) == TIM_TRGO2Source_OC4RefRising_OC6RefFalling) || \
mbed_official 125:23cc3068a9e4 1021 ((SOURCE) == TIM_TRGO2Source_OC5RefRising_OC6RefRising) || \
mbed_official 125:23cc3068a9e4 1022 ((SOURCE) == TIM_TRGO2Source_OC5RefRising_OC6RefFalling))
mbed_official 125:23cc3068a9e4 1023 /**
mbed_official 125:23cc3068a9e4 1024 * @}
mbed_official 125:23cc3068a9e4 1025 */
mbed_official 125:23cc3068a9e4 1026
mbed_official 125:23cc3068a9e4 1027 /** @defgroup TIM_Slave_Mode
mbed_official 125:23cc3068a9e4 1028 * @{
mbed_official 125:23cc3068a9e4 1029 */
mbed_official 125:23cc3068a9e4 1030
mbed_official 125:23cc3068a9e4 1031 #define TIM_SlaveMode_Reset ((uint32_t)0x00004)
mbed_official 125:23cc3068a9e4 1032 #define TIM_SlaveMode_Gated ((uint32_t)0x00005)
mbed_official 125:23cc3068a9e4 1033 #define TIM_SlaveMode_Trigger ((uint32_t)0x00006)
mbed_official 125:23cc3068a9e4 1034 #define TIM_SlaveMode_External1 ((uint32_t)0x00007)
mbed_official 125:23cc3068a9e4 1035 #define TIM_SlaveMode_Combined_ResetTrigger ((uint32_t)0x10000)
mbed_official 125:23cc3068a9e4 1036 #define IS_TIM_SLAVE_MODE(MODE) (((MODE) == TIM_SlaveMode_Reset) || \
mbed_official 125:23cc3068a9e4 1037 ((MODE) == TIM_SlaveMode_Gated) || \
mbed_official 125:23cc3068a9e4 1038 ((MODE) == TIM_SlaveMode_Trigger) || \
mbed_official 125:23cc3068a9e4 1039 ((MODE) == TIM_SlaveMode_External1) || \
mbed_official 125:23cc3068a9e4 1040 ((MODE) == TIM_SlaveMode_Combined_ResetTrigger))
mbed_official 125:23cc3068a9e4 1041 /**
mbed_official 125:23cc3068a9e4 1042 * @}
mbed_official 125:23cc3068a9e4 1043 */
mbed_official 125:23cc3068a9e4 1044
mbed_official 125:23cc3068a9e4 1045 /** @defgroup TIM_Master_Slave_Mode
mbed_official 125:23cc3068a9e4 1046 * @{
mbed_official 125:23cc3068a9e4 1047 */
mbed_official 125:23cc3068a9e4 1048
mbed_official 125:23cc3068a9e4 1049 #define TIM_MasterSlaveMode_Enable ((uint16_t)0x0080)
mbed_official 125:23cc3068a9e4 1050 #define TIM_MasterSlaveMode_Disable ((uint16_t)0x0000)
mbed_official 125:23cc3068a9e4 1051 #define IS_TIM_MSM_STATE(STATE) (((STATE) == TIM_MasterSlaveMode_Enable) || \
mbed_official 125:23cc3068a9e4 1052 ((STATE) == TIM_MasterSlaveMode_Disable))
mbed_official 125:23cc3068a9e4 1053 /**
mbed_official 125:23cc3068a9e4 1054 * @}
mbed_official 125:23cc3068a9e4 1055 */
mbed_official 125:23cc3068a9e4 1056 /** @defgroup TIM_Remap
mbed_official 125:23cc3068a9e4 1057 * @{
mbed_official 125:23cc3068a9e4 1058 */
mbed_official 125:23cc3068a9e4 1059 #define TIM16_GPIO ((uint16_t)0x0000)
mbed_official 125:23cc3068a9e4 1060 #define TIM16_RTC_CLK ((uint16_t)0x0001)
mbed_official 125:23cc3068a9e4 1061 #define TIM16_HSEDiv32 ((uint16_t)0x0002)
mbed_official 125:23cc3068a9e4 1062 #define TIM16_MCO ((uint16_t)0x0003)
mbed_official 125:23cc3068a9e4 1063
mbed_official 125:23cc3068a9e4 1064 #define TIM1_ADC1_AWDG1 ((uint16_t)0x0001)
mbed_official 125:23cc3068a9e4 1065 #define TIM1_ADC1_AWDG2 ((uint16_t)0x0002)
mbed_official 125:23cc3068a9e4 1066 #define TIM1_ADC1_AWDG3 ((uint16_t)0x0003)
mbed_official 125:23cc3068a9e4 1067 #define TIM1_ADC4_AWDG1 ((uint16_t)0x0004)
mbed_official 125:23cc3068a9e4 1068 #define TIM1_ADC4_AWDG2 ((uint16_t)0x0008)
mbed_official 125:23cc3068a9e4 1069 #define TIM1_ADC4_AWDG3 ((uint16_t)0x000C)
mbed_official 125:23cc3068a9e4 1070
mbed_official 125:23cc3068a9e4 1071 #define TIM8_ADC2_AWDG1 ((uint16_t)0x0001)
mbed_official 125:23cc3068a9e4 1072 #define TIM8_ADC2_AWDG2 ((uint16_t)0x0002)
mbed_official 125:23cc3068a9e4 1073 #define TIM8_ADC2_AWDG3 ((uint16_t)0x0003)
mbed_official 125:23cc3068a9e4 1074 #define TIM8_ADC3_AWDG1 ((uint16_t)0x0004)
mbed_official 125:23cc3068a9e4 1075 #define TIM8_ADC3_AWDG2 ((uint16_t)0x0008)
mbed_official 125:23cc3068a9e4 1076 #define TIM8_ADC3_AWDG3 ((uint16_t)0x000C)
mbed_official 125:23cc3068a9e4 1077
mbed_official 125:23cc3068a9e4 1078 #define IS_TIM_REMAP(TIM_REMAP) (((TIM_REMAP) == TIM16_GPIO)|| \
mbed_official 125:23cc3068a9e4 1079 ((TIM_REMAP) == TIM16_RTC_CLK) || \
mbed_official 125:23cc3068a9e4 1080 ((TIM_REMAP) == TIM16_HSEDiv32) || \
mbed_official 125:23cc3068a9e4 1081 ((TIM_REMAP) == TIM16_MCO) ||\
mbed_official 125:23cc3068a9e4 1082 ((TIM_REMAP) == TIM1_ADC1_AWDG1) ||\
mbed_official 125:23cc3068a9e4 1083 ((TIM_REMAP) == TIM1_ADC1_AWDG2) ||\
mbed_official 125:23cc3068a9e4 1084 ((TIM_REMAP) == TIM1_ADC1_AWDG3) ||\
mbed_official 125:23cc3068a9e4 1085 ((TIM_REMAP) == TIM1_ADC4_AWDG1) ||\
mbed_official 125:23cc3068a9e4 1086 ((TIM_REMAP) == TIM1_ADC4_AWDG2) ||\
mbed_official 125:23cc3068a9e4 1087 ((TIM_REMAP) == TIM1_ADC4_AWDG3) ||\
mbed_official 125:23cc3068a9e4 1088 ((TIM_REMAP) == TIM8_ADC2_AWDG1) ||\
mbed_official 125:23cc3068a9e4 1089 ((TIM_REMAP) == TIM8_ADC2_AWDG2) ||\
mbed_official 125:23cc3068a9e4 1090 ((TIM_REMAP) == TIM8_ADC2_AWDG3) ||\
mbed_official 125:23cc3068a9e4 1091 ((TIM_REMAP) == TIM8_ADC3_AWDG1) ||\
mbed_official 125:23cc3068a9e4 1092 ((TIM_REMAP) == TIM8_ADC3_AWDG2) ||\
mbed_official 125:23cc3068a9e4 1093 ((TIM_REMAP) == TIM8_ADC3_AWDG3))
mbed_official 125:23cc3068a9e4 1094
mbed_official 125:23cc3068a9e4 1095 /**
mbed_official 125:23cc3068a9e4 1096 * @}
mbed_official 125:23cc3068a9e4 1097 */
mbed_official 125:23cc3068a9e4 1098 /** @defgroup TIM_Flags
mbed_official 125:23cc3068a9e4 1099 * @{
mbed_official 125:23cc3068a9e4 1100 */
mbed_official 125:23cc3068a9e4 1101
mbed_official 125:23cc3068a9e4 1102 #define TIM_FLAG_Update ((uint32_t)0x00001)
mbed_official 125:23cc3068a9e4 1103 #define TIM_FLAG_CC1 ((uint32_t)0x00002)
mbed_official 125:23cc3068a9e4 1104 #define TIM_FLAG_CC2 ((uint32_t)0x00004)
mbed_official 125:23cc3068a9e4 1105 #define TIM_FLAG_CC3 ((uint32_t)0x00008)
mbed_official 125:23cc3068a9e4 1106 #define TIM_FLAG_CC4 ((uint32_t)0x00010)
mbed_official 125:23cc3068a9e4 1107 #define TIM_FLAG_COM ((uint32_t)0x00020)
mbed_official 125:23cc3068a9e4 1108 #define TIM_FLAG_Trigger ((uint32_t)0x00040)
mbed_official 125:23cc3068a9e4 1109 #define TIM_FLAG_Break ((uint32_t)0x00080)
mbed_official 125:23cc3068a9e4 1110 #define TIM_FLAG_Break2 ((uint32_t)0x00100)
mbed_official 125:23cc3068a9e4 1111 #define TIM_FLAG_CC1OF ((uint32_t)0x00200)
mbed_official 125:23cc3068a9e4 1112 #define TIM_FLAG_CC2OF ((uint32_t)0x00400)
mbed_official 125:23cc3068a9e4 1113 #define TIM_FLAG_CC3OF ((uint32_t)0x00800)
mbed_official 125:23cc3068a9e4 1114 #define TIM_FLAG_CC4OF ((uint32_t)0x01000)
mbed_official 125:23cc3068a9e4 1115 #define TIM_FLAG_CC5 ((uint32_t)0x10000)
mbed_official 125:23cc3068a9e4 1116 #define TIM_FLAG_CC6 ((uint32_t)0x20000)
mbed_official 125:23cc3068a9e4 1117 #define IS_TIM_GET_FLAG(FLAG) (((FLAG) == TIM_FLAG_Update) || \
mbed_official 125:23cc3068a9e4 1118 ((FLAG) == TIM_FLAG_CC1) || \
mbed_official 125:23cc3068a9e4 1119 ((FLAG) == TIM_FLAG_CC2) || \
mbed_official 125:23cc3068a9e4 1120 ((FLAG) == TIM_FLAG_CC3) || \
mbed_official 125:23cc3068a9e4 1121 ((FLAG) == TIM_FLAG_CC4) || \
mbed_official 125:23cc3068a9e4 1122 ((FLAG) == TIM_FLAG_COM) || \
mbed_official 125:23cc3068a9e4 1123 ((FLAG) == TIM_FLAG_Trigger) || \
mbed_official 125:23cc3068a9e4 1124 ((FLAG) == TIM_FLAG_Break) || \
mbed_official 125:23cc3068a9e4 1125 ((FLAG) == TIM_FLAG_Break2) || \
mbed_official 125:23cc3068a9e4 1126 ((FLAG) == TIM_FLAG_CC1OF) || \
mbed_official 125:23cc3068a9e4 1127 ((FLAG) == TIM_FLAG_CC2OF) || \
mbed_official 125:23cc3068a9e4 1128 ((FLAG) == TIM_FLAG_CC3OF) || \
mbed_official 125:23cc3068a9e4 1129 ((FLAG) == TIM_FLAG_CC4OF) ||\
mbed_official 125:23cc3068a9e4 1130 ((FLAG) == TIM_FLAG_CC5) ||\
mbed_official 125:23cc3068a9e4 1131 ((FLAG) == TIM_FLAG_CC6))
mbed_official 125:23cc3068a9e4 1132
mbed_official 125:23cc3068a9e4 1133 #define IS_TIM_CLEAR_FLAG(TIM_FLAG) ((((TIM_FLAG) & (uint32_t)0xE000) == 0x0000) && ((TIM_FLAG) != 0x0000))
mbed_official 125:23cc3068a9e4 1134 /**
mbed_official 125:23cc3068a9e4 1135 * @}
mbed_official 125:23cc3068a9e4 1136 */
mbed_official 125:23cc3068a9e4 1137
mbed_official 125:23cc3068a9e4 1138 /** @defgroup TIM_OCReferenceClear
mbed_official 125:23cc3068a9e4 1139 * @{
mbed_official 125:23cc3068a9e4 1140 */
mbed_official 125:23cc3068a9e4 1141 #define TIM_OCReferenceClear_ETRF ((uint16_t)0x0008)
mbed_official 125:23cc3068a9e4 1142 #define TIM_OCReferenceClear_OCREFCLR ((uint16_t)0x0000)
mbed_official 125:23cc3068a9e4 1143 #define TIM_OCREFERENCECECLEAR_SOURCE(SOURCE) (((SOURCE) == TIM_OCReferenceClear_ETRF) || \
mbed_official 125:23cc3068a9e4 1144 ((SOURCE) == TIM_OCReferenceClear_OCREFCLR))
mbed_official 125:23cc3068a9e4 1145
mbed_official 125:23cc3068a9e4 1146 /** @defgroup TIM_Input_Capture_Filer_Value
mbed_official 125:23cc3068a9e4 1147 * @{
mbed_official 125:23cc3068a9e4 1148 */
mbed_official 125:23cc3068a9e4 1149
mbed_official 125:23cc3068a9e4 1150 #define IS_TIM_IC_FILTER(ICFILTER) ((ICFILTER) <= 0xF)
mbed_official 125:23cc3068a9e4 1151 /**
mbed_official 125:23cc3068a9e4 1152 * @}
mbed_official 125:23cc3068a9e4 1153 */
mbed_official 125:23cc3068a9e4 1154
mbed_official 125:23cc3068a9e4 1155 /** @defgroup TIM_External_Trigger_Filter
mbed_official 125:23cc3068a9e4 1156 * @{
mbed_official 125:23cc3068a9e4 1157 */
mbed_official 125:23cc3068a9e4 1158
mbed_official 125:23cc3068a9e4 1159 #define IS_TIM_EXT_FILTER(EXTFILTER) ((EXTFILTER) <= 0xF)
mbed_official 125:23cc3068a9e4 1160 /**
mbed_official 125:23cc3068a9e4 1161 * @}
mbed_official 125:23cc3068a9e4 1162 */
mbed_official 125:23cc3068a9e4 1163
mbed_official 125:23cc3068a9e4 1164 /** @defgroup TIM_Legacy
mbed_official 125:23cc3068a9e4 1165 * @{
mbed_official 125:23cc3068a9e4 1166 */
mbed_official 125:23cc3068a9e4 1167
mbed_official 125:23cc3068a9e4 1168 #define TIM_DMABurstLength_1Byte TIM_DMABurstLength_1Transfer
mbed_official 125:23cc3068a9e4 1169 #define TIM_DMABurstLength_2Bytes TIM_DMABurstLength_2Transfers
mbed_official 125:23cc3068a9e4 1170 #define TIM_DMABurstLength_3Bytes TIM_DMABurstLength_3Transfers
mbed_official 125:23cc3068a9e4 1171 #define TIM_DMABurstLength_4Bytes TIM_DMABurstLength_4Transfers
mbed_official 125:23cc3068a9e4 1172 #define TIM_DMABurstLength_5Bytes TIM_DMABurstLength_5Transfers
mbed_official 125:23cc3068a9e4 1173 #define TIM_DMABurstLength_6Bytes TIM_DMABurstLength_6Transfers
mbed_official 125:23cc3068a9e4 1174 #define TIM_DMABurstLength_7Bytes TIM_DMABurstLength_7Transfers
mbed_official 125:23cc3068a9e4 1175 #define TIM_DMABurstLength_8Bytes TIM_DMABurstLength_8Transfers
mbed_official 125:23cc3068a9e4 1176 #define TIM_DMABurstLength_9Bytes TIM_DMABurstLength_9Transfers
mbed_official 125:23cc3068a9e4 1177 #define TIM_DMABurstLength_10Bytes TIM_DMABurstLength_10Transfers
mbed_official 125:23cc3068a9e4 1178 #define TIM_DMABurstLength_11Bytes TIM_DMABurstLength_11Transfers
mbed_official 125:23cc3068a9e4 1179 #define TIM_DMABurstLength_12Bytes TIM_DMABurstLength_12Transfers
mbed_official 125:23cc3068a9e4 1180 #define TIM_DMABurstLength_13Bytes TIM_DMABurstLength_13Transfers
mbed_official 125:23cc3068a9e4 1181 #define TIM_DMABurstLength_14Bytes TIM_DMABurstLength_14Transfers
mbed_official 125:23cc3068a9e4 1182 #define TIM_DMABurstLength_15Bytes TIM_DMABurstLength_15Transfers
mbed_official 125:23cc3068a9e4 1183 #define TIM_DMABurstLength_16Bytes TIM_DMABurstLength_16Transfers
mbed_official 125:23cc3068a9e4 1184 #define TIM_DMABurstLength_17Bytes TIM_DMABurstLength_17Transfers
mbed_official 125:23cc3068a9e4 1185 #define TIM_DMABurstLength_18Bytes TIM_DMABurstLength_18Transfers
mbed_official 125:23cc3068a9e4 1186 /**
mbed_official 125:23cc3068a9e4 1187 * @}
mbed_official 125:23cc3068a9e4 1188 */
mbed_official 125:23cc3068a9e4 1189
mbed_official 125:23cc3068a9e4 1190 /**
mbed_official 125:23cc3068a9e4 1191 * @}
mbed_official 125:23cc3068a9e4 1192 */
mbed_official 125:23cc3068a9e4 1193
mbed_official 125:23cc3068a9e4 1194 /* Exported macro ------------------------------------------------------------*/
mbed_official 125:23cc3068a9e4 1195 /* Exported functions --------------------------------------------------------*/
mbed_official 125:23cc3068a9e4 1196
mbed_official 125:23cc3068a9e4 1197 /* TimeBase management ********************************************************/
mbed_official 125:23cc3068a9e4 1198 void TIM_DeInit(TIM_TypeDef* TIMx);
mbed_official 125:23cc3068a9e4 1199 void TIM_TimeBaseInit(TIM_TypeDef* TIMx, TIM_TimeBaseInitTypeDef* TIM_TimeBaseInitStruct);
mbed_official 125:23cc3068a9e4 1200 void TIM_TimeBaseStructInit(TIM_TimeBaseInitTypeDef* TIM_TimeBaseInitStruct);
mbed_official 125:23cc3068a9e4 1201 void TIM_PrescalerConfig(TIM_TypeDef* TIMx, uint16_t Prescaler, uint16_t TIM_PSCReloadMode);
mbed_official 125:23cc3068a9e4 1202 void TIM_CounterModeConfig(TIM_TypeDef* TIMx, uint16_t TIM_CounterMode);
mbed_official 125:23cc3068a9e4 1203 void TIM_SetCounter(TIM_TypeDef* TIMx, uint32_t Counter);
mbed_official 125:23cc3068a9e4 1204 void TIM_SetAutoreload(TIM_TypeDef* TIMx, uint32_t Autoreload);
mbed_official 125:23cc3068a9e4 1205 uint32_t TIM_GetCounter(TIM_TypeDef* TIMx);
mbed_official 125:23cc3068a9e4 1206 uint16_t TIM_GetPrescaler(TIM_TypeDef* TIMx);
mbed_official 125:23cc3068a9e4 1207 void TIM_UpdateDisableConfig(TIM_TypeDef* TIMx, FunctionalState NewState);
mbed_official 125:23cc3068a9e4 1208 void TIM_UpdateRequestConfig(TIM_TypeDef* TIMx, uint16_t TIM_UpdateSource);
mbed_official 125:23cc3068a9e4 1209 void TIM_UIFRemap(TIM_TypeDef* TIMx, FunctionalState NewState);
mbed_official 125:23cc3068a9e4 1210 void TIM_ARRPreloadConfig(TIM_TypeDef* TIMx, FunctionalState NewState);
mbed_official 125:23cc3068a9e4 1211 void TIM_SelectOnePulseMode(TIM_TypeDef* TIMx, uint16_t TIM_OPMode);
mbed_official 125:23cc3068a9e4 1212 void TIM_SetClockDivision(TIM_TypeDef* TIMx, uint16_t TIM_CKD);
mbed_official 125:23cc3068a9e4 1213 void TIM_Cmd(TIM_TypeDef* TIMx, FunctionalState NewState);
mbed_official 125:23cc3068a9e4 1214
mbed_official 125:23cc3068a9e4 1215 /* Output Compare management **************************************************/
mbed_official 125:23cc3068a9e4 1216 void TIM_OC1Init(TIM_TypeDef* TIMx, TIM_OCInitTypeDef* TIM_OCInitStruct);
mbed_official 125:23cc3068a9e4 1217 void TIM_OC2Init(TIM_TypeDef* TIMx, TIM_OCInitTypeDef* TIM_OCInitStruct);
mbed_official 125:23cc3068a9e4 1218 void TIM_OC3Init(TIM_TypeDef* TIMx, TIM_OCInitTypeDef* TIM_OCInitStruct);
mbed_official 125:23cc3068a9e4 1219 void TIM_OC4Init(TIM_TypeDef* TIMx, TIM_OCInitTypeDef* TIM_OCInitStruct);
mbed_official 125:23cc3068a9e4 1220 void TIM_OC5Init(TIM_TypeDef* TIMx, TIM_OCInitTypeDef* TIM_OCInitStruct);
mbed_official 125:23cc3068a9e4 1221 void TIM_OC6Init(TIM_TypeDef* TIMx, TIM_OCInitTypeDef* TIM_OCInitStruct);
mbed_official 125:23cc3068a9e4 1222 void TIM_SelectGC5C1(TIM_TypeDef* TIMx, FunctionalState NewState);
mbed_official 125:23cc3068a9e4 1223 void TIM_SelectGC5C2(TIM_TypeDef* TIMx, FunctionalState NewState);
mbed_official 125:23cc3068a9e4 1224 void TIM_SelectGC5C3(TIM_TypeDef* TIMx, FunctionalState NewState);
mbed_official 125:23cc3068a9e4 1225 void TIM_OCStructInit(TIM_OCInitTypeDef* TIM_OCInitStruct);
mbed_official 125:23cc3068a9e4 1226 void TIM_SelectOCxM(TIM_TypeDef* TIMx, uint16_t TIM_Channel, uint32_t TIM_OCMode);
mbed_official 125:23cc3068a9e4 1227 void TIM_SetCompare1(TIM_TypeDef* TIMx, uint32_t Compare1);
mbed_official 125:23cc3068a9e4 1228 void TIM_SetCompare2(TIM_TypeDef* TIMx, uint32_t Compare2);
mbed_official 125:23cc3068a9e4 1229 void TIM_SetCompare3(TIM_TypeDef* TIMx, uint32_t Compare3);
mbed_official 125:23cc3068a9e4 1230 void TIM_SetCompare4(TIM_TypeDef* TIMx, uint32_t Compare4);
mbed_official 125:23cc3068a9e4 1231 void TIM_SetCompare5(TIM_TypeDef* TIMx, uint32_t Compare5);
mbed_official 125:23cc3068a9e4 1232 void TIM_SetCompare6(TIM_TypeDef* TIMx, uint32_t Compare6);
mbed_official 125:23cc3068a9e4 1233 void TIM_ForcedOC1Config(TIM_TypeDef* TIMx, uint16_t TIM_ForcedAction);
mbed_official 125:23cc3068a9e4 1234 void TIM_ForcedOC2Config(TIM_TypeDef* TIMx, uint16_t TIM_ForcedAction);
mbed_official 125:23cc3068a9e4 1235 void TIM_ForcedOC3Config(TIM_TypeDef* TIMx, uint16_t TIM_ForcedAction);
mbed_official 125:23cc3068a9e4 1236 void TIM_ForcedOC4Config(TIM_TypeDef* TIMx, uint16_t TIM_ForcedAction);
mbed_official 125:23cc3068a9e4 1237 void TIM_ForcedOC5Config(TIM_TypeDef* TIMx, uint16_t TIM_ForcedAction);
mbed_official 125:23cc3068a9e4 1238 void TIM_ForcedOC6Config(TIM_TypeDef* TIMx, uint16_t TIM_ForcedAction);
mbed_official 125:23cc3068a9e4 1239 void TIM_OC1PreloadConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCPreload);
mbed_official 125:23cc3068a9e4 1240 void TIM_OC2PreloadConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCPreload);
mbed_official 125:23cc3068a9e4 1241 void TIM_OC3PreloadConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCPreload);
mbed_official 125:23cc3068a9e4 1242 void TIM_OC4PreloadConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCPreload);
mbed_official 125:23cc3068a9e4 1243 void TIM_OC5PreloadConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCPreload);
mbed_official 125:23cc3068a9e4 1244 void TIM_OC6PreloadConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCPreload);
mbed_official 125:23cc3068a9e4 1245 void TIM_OC1FastConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCFast);
mbed_official 125:23cc3068a9e4 1246 void TIM_OC2FastConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCFast);
mbed_official 125:23cc3068a9e4 1247 void TIM_OC3FastConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCFast);
mbed_official 125:23cc3068a9e4 1248 void TIM_OC4FastConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCFast);
mbed_official 125:23cc3068a9e4 1249 void TIM_ClearOC1Ref(TIM_TypeDef* TIMx, uint16_t TIM_OCClear);
mbed_official 125:23cc3068a9e4 1250 void TIM_ClearOC2Ref(TIM_TypeDef* TIMx, uint16_t TIM_OCClear);
mbed_official 125:23cc3068a9e4 1251 void TIM_ClearOC3Ref(TIM_TypeDef* TIMx, uint16_t TIM_OCClear);
mbed_official 125:23cc3068a9e4 1252 void TIM_ClearOC4Ref(TIM_TypeDef* TIMx, uint16_t TIM_OCClear);
mbed_official 125:23cc3068a9e4 1253 void TIM_ClearOC5Ref(TIM_TypeDef* TIMx, uint16_t TIM_OCClear);
mbed_official 125:23cc3068a9e4 1254 void TIM_ClearOC6Ref(TIM_TypeDef* TIMx, uint16_t TIM_OCClear);
mbed_official 125:23cc3068a9e4 1255 void TIM_SelectOCREFClear(TIM_TypeDef* TIMx, uint16_t TIM_OCReferenceClear);
mbed_official 125:23cc3068a9e4 1256 void TIM_OC1PolarityConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCPolarity);
mbed_official 125:23cc3068a9e4 1257 void TIM_OC1NPolarityConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCNPolarity);
mbed_official 125:23cc3068a9e4 1258 void TIM_OC2PolarityConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCPolarity);
mbed_official 125:23cc3068a9e4 1259 void TIM_OC2NPolarityConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCNPolarity);
mbed_official 125:23cc3068a9e4 1260 void TIM_OC3PolarityConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCPolarity);
mbed_official 125:23cc3068a9e4 1261 void TIM_OC3NPolarityConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCNPolarity);
mbed_official 125:23cc3068a9e4 1262 void TIM_OC4PolarityConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCPolarity);
mbed_official 125:23cc3068a9e4 1263 void TIM_OC5PolarityConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCPolarity);
mbed_official 125:23cc3068a9e4 1264 void TIM_OC6PolarityConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCPolarity);
mbed_official 125:23cc3068a9e4 1265 void TIM_CCxCmd(TIM_TypeDef* TIMx, uint16_t TIM_Channel, uint16_t TIM_CCx);
mbed_official 125:23cc3068a9e4 1266 void TIM_CCxNCmd(TIM_TypeDef* TIMx, uint16_t TIM_Channel, uint16_t TIM_CCxN);
mbed_official 125:23cc3068a9e4 1267
mbed_official 125:23cc3068a9e4 1268 /* Input Capture management ***************************************************/
mbed_official 125:23cc3068a9e4 1269 void TIM_ICInit(TIM_TypeDef* TIMx, TIM_ICInitTypeDef* TIM_ICInitStruct);
mbed_official 125:23cc3068a9e4 1270 void TIM_ICStructInit(TIM_ICInitTypeDef* TIM_ICInitStruct);
mbed_official 125:23cc3068a9e4 1271 void TIM_PWMIConfig(TIM_TypeDef* TIMx, TIM_ICInitTypeDef* TIM_ICInitStruct);
mbed_official 125:23cc3068a9e4 1272 uint32_t TIM_GetCapture1(TIM_TypeDef* TIMx);
mbed_official 125:23cc3068a9e4 1273 uint32_t TIM_GetCapture2(TIM_TypeDef* TIMx);
mbed_official 125:23cc3068a9e4 1274 uint32_t TIM_GetCapture3(TIM_TypeDef* TIMx);
mbed_official 125:23cc3068a9e4 1275 uint32_t TIM_GetCapture4(TIM_TypeDef* TIMx);
mbed_official 125:23cc3068a9e4 1276 void TIM_SetIC1Prescaler(TIM_TypeDef* TIMx, uint16_t TIM_ICPSC);
mbed_official 125:23cc3068a9e4 1277 void TIM_SetIC2Prescaler(TIM_TypeDef* TIMx, uint16_t TIM_ICPSC);
mbed_official 125:23cc3068a9e4 1278 void TIM_SetIC3Prescaler(TIM_TypeDef* TIMx, uint16_t TIM_ICPSC);
mbed_official 125:23cc3068a9e4 1279 void TIM_SetIC4Prescaler(TIM_TypeDef* TIMx, uint16_t TIM_ICPSC);
mbed_official 125:23cc3068a9e4 1280
mbed_official 125:23cc3068a9e4 1281 /* Advanced-control timers (TIM1 and TIM8) specific features ******************/
mbed_official 125:23cc3068a9e4 1282 void TIM_BDTRConfig(TIM_TypeDef* TIMx, TIM_BDTRInitTypeDef *TIM_BDTRInitStruct);
mbed_official 125:23cc3068a9e4 1283 void TIM_Break1Config(TIM_TypeDef* TIMx, uint32_t TIM_Break1Polarity, uint8_t TIM_Break1Filter);
mbed_official 125:23cc3068a9e4 1284 void TIM_Break2Config(TIM_TypeDef* TIMx, uint32_t TIM_Break2Polarity, uint8_t TIM_Break2Filter);
mbed_official 125:23cc3068a9e4 1285 void TIM_Break1Cmd(TIM_TypeDef* TIMx, FunctionalState NewState);
mbed_official 125:23cc3068a9e4 1286 void TIM_Break2Cmd(TIM_TypeDef* TIMx, FunctionalState NewState);
mbed_official 125:23cc3068a9e4 1287 void TIM_BDTRStructInit(TIM_BDTRInitTypeDef* TIM_BDTRInitStruct);
mbed_official 125:23cc3068a9e4 1288 void TIM_CtrlPWMOutputs(TIM_TypeDef* TIMx, FunctionalState NewState);
mbed_official 125:23cc3068a9e4 1289 void TIM_SelectCOM(TIM_TypeDef* TIMx, FunctionalState NewState);
mbed_official 125:23cc3068a9e4 1290 void TIM_CCPreloadControl(TIM_TypeDef* TIMx, FunctionalState NewState);
mbed_official 125:23cc3068a9e4 1291
mbed_official 125:23cc3068a9e4 1292 /* Interrupts, DMA and flags management ***************************************/
mbed_official 125:23cc3068a9e4 1293 void TIM_ITConfig(TIM_TypeDef* TIMx, uint16_t TIM_IT, FunctionalState NewState);
mbed_official 125:23cc3068a9e4 1294 void TIM_GenerateEvent(TIM_TypeDef* TIMx, uint16_t TIM_EventSource);
mbed_official 125:23cc3068a9e4 1295 FlagStatus TIM_GetFlagStatus(TIM_TypeDef* TIMx, uint32_t TIM_FLAG);
mbed_official 125:23cc3068a9e4 1296 void TIM_ClearFlag(TIM_TypeDef* TIMx, uint16_t TIM_FLAG);
mbed_official 125:23cc3068a9e4 1297 ITStatus TIM_GetITStatus(TIM_TypeDef* TIMx, uint16_t TIM_IT);
mbed_official 125:23cc3068a9e4 1298 void TIM_ClearITPendingBit(TIM_TypeDef* TIMx, uint16_t TIM_IT);
mbed_official 125:23cc3068a9e4 1299 void TIM_DMAConfig(TIM_TypeDef* TIMx, uint16_t TIM_DMABase, uint16_t TIM_DMABurstLength);
mbed_official 125:23cc3068a9e4 1300 void TIM_DMACmd(TIM_TypeDef* TIMx, uint16_t TIM_DMASource, FunctionalState NewState);
mbed_official 125:23cc3068a9e4 1301 void TIM_SelectCCDMA(TIM_TypeDef* TIMx, FunctionalState NewState);
mbed_official 125:23cc3068a9e4 1302
mbed_official 125:23cc3068a9e4 1303 /* Clocks management **********************************************************/
mbed_official 125:23cc3068a9e4 1304 void TIM_InternalClockConfig(TIM_TypeDef* TIMx);
mbed_official 125:23cc3068a9e4 1305 void TIM_ITRxExternalClockConfig(TIM_TypeDef* TIMx, uint16_t TIM_InputTriggerSource);
mbed_official 125:23cc3068a9e4 1306 void TIM_TIxExternalClockConfig(TIM_TypeDef* TIMx, uint16_t TIM_TIxExternalCLKSource,
mbed_official 125:23cc3068a9e4 1307 uint16_t TIM_ICPolarity, uint16_t ICFilter);
mbed_official 125:23cc3068a9e4 1308 void TIM_ETRClockMode1Config(TIM_TypeDef* TIMx, uint16_t TIM_ExtTRGPrescaler, uint16_t TIM_ExtTRGPolarity,
mbed_official 125:23cc3068a9e4 1309 uint16_t ExtTRGFilter);
mbed_official 125:23cc3068a9e4 1310 void TIM_ETRClockMode2Config(TIM_TypeDef* TIMx, uint16_t TIM_ExtTRGPrescaler,
mbed_official 125:23cc3068a9e4 1311 uint16_t TIM_ExtTRGPolarity, uint16_t ExtTRGFilter);
mbed_official 125:23cc3068a9e4 1312
mbed_official 125:23cc3068a9e4 1313 /* Synchronization management *************************************************/
mbed_official 125:23cc3068a9e4 1314 void TIM_SelectInputTrigger(TIM_TypeDef* TIMx, uint16_t TIM_InputTriggerSource);
mbed_official 125:23cc3068a9e4 1315 void TIM_SelectOutputTrigger(TIM_TypeDef* TIMx, uint16_t TIM_TRGOSource);
mbed_official 125:23cc3068a9e4 1316 void TIM_SelectOutputTrigger2(TIM_TypeDef* TIMx, uint32_t TIM_TRGO2Source);
mbed_official 125:23cc3068a9e4 1317 void TIM_SelectSlaveMode(TIM_TypeDef* TIMx, uint32_t TIM_SlaveMode);
mbed_official 125:23cc3068a9e4 1318 void TIM_SelectMasterSlaveMode(TIM_TypeDef* TIMx, uint16_t TIM_MasterSlaveMode);
mbed_official 125:23cc3068a9e4 1319 void TIM_ETRConfig(TIM_TypeDef* TIMx, uint16_t TIM_ExtTRGPrescaler, uint16_t TIM_ExtTRGPolarity,
mbed_official 125:23cc3068a9e4 1320 uint16_t ExtTRGFilter);
mbed_official 125:23cc3068a9e4 1321
mbed_official 125:23cc3068a9e4 1322 /* Specific interface management **********************************************/
mbed_official 125:23cc3068a9e4 1323 void TIM_EncoderInterfaceConfig(TIM_TypeDef* TIMx, uint16_t TIM_EncoderMode,
mbed_official 125:23cc3068a9e4 1324 uint16_t TIM_IC1Polarity, uint16_t TIM_IC2Polarity);
mbed_official 125:23cc3068a9e4 1325 void TIM_SelectHallSensor(TIM_TypeDef* TIMx, FunctionalState NewState);
mbed_official 125:23cc3068a9e4 1326
mbed_official 125:23cc3068a9e4 1327 /* Specific remapping management **********************************************/
mbed_official 125:23cc3068a9e4 1328 void TIM_RemapConfig(TIM_TypeDef* TIMx, uint16_t TIM_Remap);
mbed_official 125:23cc3068a9e4 1329
mbed_official 125:23cc3068a9e4 1330 #ifdef __cplusplus
mbed_official 125:23cc3068a9e4 1331 }
mbed_official 125:23cc3068a9e4 1332 #endif
mbed_official 125:23cc3068a9e4 1333
mbed_official 125:23cc3068a9e4 1334 #endif /*__STM32F30x_TIM_H */
mbed_official 125:23cc3068a9e4 1335
mbed_official 125:23cc3068a9e4 1336 /**
mbed_official 125:23cc3068a9e4 1337 * @}
mbed_official 125:23cc3068a9e4 1338 */
mbed_official 125:23cc3068a9e4 1339
mbed_official 125:23cc3068a9e4 1340 /**
mbed_official 125:23cc3068a9e4 1341 * @}
mbed_official 125:23cc3068a9e4 1342 */
mbed_official 125:23cc3068a9e4 1343
mbed_official 125:23cc3068a9e4 1344 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/