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targets/cmsis/TARGET_STM/TARGET_NUCLEO_F302R8/stm32f30x_hrtim.h@323:9e901b0a5aa1, 2014-09-13 (annotated)

Committer:: shaoziyang
Date:: Sat Sep 13 14:25:46 2014 +0000
Revision:: 323:9e901b0a5aa1
Parent:: 125:23cc3068a9e4

test with CLOCK_SETUP = 0

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User	Revision	Line number	New contents of line
mbed_official	125:23cc3068a9e4	1	/**
mbed_official	125:23cc3068a9e4	2	******************************************************************************
mbed_official	125:23cc3068a9e4	3	* @file stm32f30x_hrtim.h
mbed_official	125:23cc3068a9e4	4	* @author MCD Application Team
mbed_official	125:23cc3068a9e4	5	* @version V1.1.0
mbed_official	125:23cc3068a9e4	6	* @date 27-February-2014
mbed_official	125:23cc3068a9e4	7	* @brief This file contains all the functions prototypes for the HRTIM firmware
mbed_official	125:23cc3068a9e4	8	* library.
mbed_official	125:23cc3068a9e4	9	******************************************************************************
mbed_official	125:23cc3068a9e4	10	* @attention
mbed_official	125:23cc3068a9e4	11	*
mbed_official	125:23cc3068a9e4	12	* <h2><center>© COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
mbed_official	125:23cc3068a9e4	13	*
mbed_official	125:23cc3068a9e4	14	* Redistribution and use in source and binary forms, with or without modification,
mbed_official	125:23cc3068a9e4	15	* are permitted provided that the following conditions are met:
mbed_official	125:23cc3068a9e4	16	* 1. Redistributions of source code must retain the above copyright notice,
mbed_official	125:23cc3068a9e4	17	* this list of conditions and the following disclaimer.
mbed_official	125:23cc3068a9e4	18	* 2. Redistributions in binary form must reproduce the above copyright notice,
mbed_official	125:23cc3068a9e4	19	* this list of conditions and the following disclaimer in the documentation
mbed_official	125:23cc3068a9e4	20	* and/or other materials provided with the distribution.
mbed_official	125:23cc3068a9e4	21	* 3. Neither the name of STMicroelectronics nor the names of its contributors
mbed_official	125:23cc3068a9e4	22	* may be used to endorse or promote products derived from this software
mbed_official	125:23cc3068a9e4	23	* without specific prior written permission.
mbed_official	125:23cc3068a9e4	24	*
mbed_official	125:23cc3068a9e4	25	* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
mbed_official	125:23cc3068a9e4	26	* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
mbed_official	125:23cc3068a9e4	27	* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
mbed_official	125:23cc3068a9e4	28	* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
mbed_official	125:23cc3068a9e4	29	* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
mbed_official	125:23cc3068a9e4	30	* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
mbed_official	125:23cc3068a9e4	31	* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
mbed_official	125:23cc3068a9e4	32	* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
mbed_official	125:23cc3068a9e4	33	* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
mbed_official	125:23cc3068a9e4	34	* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
mbed_official	125:23cc3068a9e4	35	*
mbed_official	125:23cc3068a9e4	36	******************************************************************************
mbed_official	125:23cc3068a9e4	37	*/
mbed_official	125:23cc3068a9e4	38
mbed_official	125:23cc3068a9e4	39	/* Define to prevent recursive inclusion -------------------------------------*/
mbed_official	125:23cc3068a9e4	40	#ifndef __STM32F30x_HRTIM_H
mbed_official	125:23cc3068a9e4	41	#define __STM32F30x_HRTIM_H
mbed_official	125:23cc3068a9e4	42
mbed_official	125:23cc3068a9e4	43	#ifdef __cplusplus
mbed_official	125:23cc3068a9e4	44	extern "C" {
mbed_official	125:23cc3068a9e4	45	#endif
mbed_official	125:23cc3068a9e4	46
mbed_official	125:23cc3068a9e4	47	/* Includes ------------------------------------------------------------------*/
mbed_official	125:23cc3068a9e4	48	#include "stm32f30x.h"
mbed_official	125:23cc3068a9e4	49
mbed_official	125:23cc3068a9e4	50	/** @addtogroup STM32F30x_StdPeriph_Driver
mbed_official	125:23cc3068a9e4	51	* @{
mbed_official	125:23cc3068a9e4	52	*/
mbed_official	125:23cc3068a9e4	53
mbed_official	125:23cc3068a9e4	54	/** @addtogroup ADC
mbed_official	125:23cc3068a9e4	55	* @{
mbed_official	125:23cc3068a9e4	56	*/
mbed_official	125:23cc3068a9e4	57
mbed_official	125:23cc3068a9e4	58	/* Exported types ------------------------------------------------------------*/
mbed_official	125:23cc3068a9e4	59
mbed_official	125:23cc3068a9e4	60	/**
mbed_official	125:23cc3068a9e4	61	* @brief HRTIM Configuration Structure definition - Time base related parameters
mbed_official	125:23cc3068a9e4	62	*/
mbed_official	125:23cc3068a9e4	63	typedef struct
mbed_official	125:23cc3068a9e4	64	{
mbed_official	125:23cc3068a9e4	65	uint32_t Period; /*!< Specifies the timer period
mbed_official	125:23cc3068a9e4	66	The period value must be above 3 periods of the fHRTIM clock.
mbed_official	125:23cc3068a9e4	67	Maximum value is = 0xFFDF */
mbed_official	125:23cc3068a9e4	68	uint32_t RepetitionCounter; /*!< Specifies the timer repetition period
mbed_official	125:23cc3068a9e4	69	This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF. */
mbed_official	125:23cc3068a9e4	70	uint32_t PrescalerRatio; /*!< Specifies the timer clock prescaler ratio.
mbed_official	125:23cc3068a9e4	71	This parameter can be any value of @ref HRTIM_PrescalerRatio */
mbed_official	125:23cc3068a9e4	72	uint32_t Mode; /*!< Specifies the counter operating mode
mbed_official	125:23cc3068a9e4	73	This parameter can be any value of @ref HRTIM_Mode */
mbed_official	125:23cc3068a9e4	74	} HRTIM_BaseInitTypeDef;
mbed_official	125:23cc3068a9e4	75	/**
mbed_official	125:23cc3068a9e4	76	* @brief Waveform mode initialization parameters definition
mbed_official	125:23cc3068a9e4	77	*/
mbed_official	125:23cc3068a9e4	78	typedef struct {
mbed_official	125:23cc3068a9e4	79	uint32_t HalfModeEnable; /*!< Specifies whether or not half mode is enabled
mbed_official	125:23cc3068a9e4	80	This parameter can be a combination of @ref HRTIM_HalfModeEnable */
mbed_official	125:23cc3068a9e4	81	uint32_t StartOnSync; /*!< Specifies whether or not timer is reset by a rising edge on the synchronization input (when enabled)
mbed_official	125:23cc3068a9e4	82	This parameter can be a combination of @ref HRTIM_StartOnSyncInputEvent */
mbed_official	125:23cc3068a9e4	83	uint32_t ResetOnSync; /*!< Specifies whether or not timer is reset by a rising edge on the synchronization input (when enabled)
mbed_official	125:23cc3068a9e4	84	This parameter can be a combination of @ref HRTIM_ResetOnSyncInputEvent */
mbed_official	125:23cc3068a9e4	85	uint32_t DACSynchro; /*!< Indicates whether or not the a DAC synchronization event is generated
mbed_official	125:23cc3068a9e4	86	This parameter can be any value of @ref HRTIM_DACSynchronization */
mbed_official	125:23cc3068a9e4	87	uint32_t PreloadEnable; /*!< Specifies whether or not register preload is enabled
mbed_official	125:23cc3068a9e4	88	This parameter can be a combination of @ref HRTIM_RegisterPreloadEnable */
mbed_official	125:23cc3068a9e4	89	uint32_t UpdateGating; /*!< Specifies how the update occurs with respect to a burst DMA transaction or
mbed_official	125:23cc3068a9e4	90	update enable inputs (Slave timers only)
mbed_official	125:23cc3068a9e4	91	This parameter can be any value of @ref HRTIM_UpdateGating */
mbed_official	125:23cc3068a9e4	92	uint32_t BurstMode; /*!< Specifies how the timer behaves during a burst mode operation
mbed_official	125:23cc3068a9e4	93	This parameter can be a combination of @ref HRTIM_TimerBurstMode */
mbed_official	125:23cc3068a9e4	94	uint32_t RepetitionUpdate; /*!< Specifies whether or not registers update is triggered by the repetition event
mbed_official	125:23cc3068a9e4	95	This parameter can be a combination of @ref HRTIM_TimerRepetitionUpdate */
mbed_official	125:23cc3068a9e4	96	} HRTIM_TimerInitTypeDef;
mbed_official	125:23cc3068a9e4	97
mbed_official	125:23cc3068a9e4	98	/**
mbed_official	125:23cc3068a9e4	99	* @brief Basic output compare mode configuration definition
mbed_official	125:23cc3068a9e4	100	*/
mbed_official	125:23cc3068a9e4	101	typedef struct {
mbed_official	125:23cc3068a9e4	102	uint32_t Mode; /*!< Specifies the output compare mode (toggle, active, inactive)
mbed_official	125:23cc3068a9e4	103	This parameter can be a combination of @ref HRTIM_BasicOCMode */
mbed_official	125:23cc3068a9e4	104	uint32_t Pulse; /*!< Specifies the compare value to be loaded into the Compare Register.
mbed_official	125:23cc3068a9e4	105	The compare value must be above or equal to 3 periods of the fHRTIM clock */
mbed_official	125:23cc3068a9e4	106	uint32_t Polarity; /*!< Specifies the output polarity
mbed_official	125:23cc3068a9e4	107	This parameter can be any value of @ref HRTIM_Output_Polarity */
mbed_official	125:23cc3068a9e4	108	uint32_t IdleState; /*!< Specifies whether the output level is active or inactive when in IDLE state
mbed_official	125:23cc3068a9e4	109	This parameter can be any value of @ref HRTIM_OutputIDLEState */
mbed_official	125:23cc3068a9e4	110	} HRTIM_BasicOCChannelCfgTypeDef;
mbed_official	125:23cc3068a9e4	111
mbed_official	125:23cc3068a9e4	112	/**
mbed_official	125:23cc3068a9e4	113	* @brief Basic PWM output mode configuration definition
mbed_official	125:23cc3068a9e4	114	*/
mbed_official	125:23cc3068a9e4	115	typedef struct {
mbed_official	125:23cc3068a9e4	116	uint32_t Pulse; /*!< Specifies the compare value to be loaded into the Compare Register.
mbed_official	125:23cc3068a9e4	117	The compare value must be above or equal to 3 periods of the fHRTIM clock */
mbed_official	125:23cc3068a9e4	118	uint32_t Polarity; /*!< Specifies the output polarity
mbed_official	125:23cc3068a9e4	119	This parameter can be any value of @ref HRTIM_OutputPolarity */
mbed_official	125:23cc3068a9e4	120	uint32_t IdleState; /*!< Specifies whether the output level is active or inactive when in IDLE state
mbed_official	125:23cc3068a9e4	121	This parameter can be any value of @ref HRTIM_OutputIDLEState */
mbed_official	125:23cc3068a9e4	122	} HRTIM_BasicPWMChannelCfgTypeDef;
mbed_official	125:23cc3068a9e4	123
mbed_official	125:23cc3068a9e4	124	/**
mbed_official	125:23cc3068a9e4	125	* @brief Basic capture mode configuration definition
mbed_official	125:23cc3068a9e4	126	*/
mbed_official	125:23cc3068a9e4	127	typedef struct {
mbed_official	125:23cc3068a9e4	128	uint32_t CaptureUnit; /*!< Specifies the external event Channel
mbed_official	125:23cc3068a9e4	129	This parameter can be any 'EEVx' value of @ref HRTIM_CaptureUnit */
mbed_official	125:23cc3068a9e4	130	uint32_t Event; /*!< Specifies the external event triggering the capture
mbed_official	125:23cc3068a9e4	131	This parameter can be any 'EEVx' value of @ref HRTIM_ExternalEventChannels */
mbed_official	125:23cc3068a9e4	132	uint32_t EventPolarity; /*!< Specifies the polarity of the external event (in case of level sensitivity)
mbed_official	125:23cc3068a9e4	133	This parameter can be a value of @ref HRTIM_ExternalEventPolarity */
mbed_official	125:23cc3068a9e4	134	uint32_t EventSensitivity; /*!< Specifies the sensitivity of the external event
mbed_official	125:23cc3068a9e4	135	This parameter can be a value of @ref HRTIM_ExternalEventSensitivity */
mbed_official	125:23cc3068a9e4	136	uint32_t EventFilter; /*!< Defines the frequency used to sample the External Event and the length of the digital filter
mbed_official	125:23cc3068a9e4	137	This parameter can be a value of @ref HRTIM_ExternalEventFilter */
mbed_official	125:23cc3068a9e4	138	} HRTIM_BasicCaptureChannelCfgTypeDef;
mbed_official	125:23cc3068a9e4	139
mbed_official	125:23cc3068a9e4	140	/**
mbed_official	125:23cc3068a9e4	141	* @brief Basic One Pulse mode configuration definition
mbed_official	125:23cc3068a9e4	142	*/
mbed_official	125:23cc3068a9e4	143	typedef struct {
mbed_official	125:23cc3068a9e4	144	uint32_t Pulse; /*!< Specifies the compare value to be loaded into the Compare Register.
mbed_official	125:23cc3068a9e4	145	The compare value must be above or equal to 3 periods of the fHRTIM clock */
mbed_official	125:23cc3068a9e4	146	uint32_t OutputPolarity; /*!< Specifies the output polarity
mbed_official	125:23cc3068a9e4	147	This parameter can be any value of @ref HRTIM_Output_Polarity */
mbed_official	125:23cc3068a9e4	148	uint32_t OutputIdleState; /*!< Specifies whether the output level is active or inactive when in IDLE state
mbed_official	125:23cc3068a9e4	149	This parameter can be any value of @ref HRTIM_Output_IDLE_State */
mbed_official	125:23cc3068a9e4	150	uint32_t Event; /*!< Specifies the external event triggering the pulse generation
mbed_official	125:23cc3068a9e4	151	This parameter can be any 'EEVx' value of @ref HRTIM_Capture_Unit_Trigger */
mbed_official	125:23cc3068a9e4	152	uint32_t EventPolarity; /*!< Specifies the polarity of the external event (in case of level sensitivity)
mbed_official	125:23cc3068a9e4	153	This parameter can be a value of @ref HRTIM_ExternalEventPolarity */
mbed_official	125:23cc3068a9e4	154	uint32_t EventSensitivity; /*!< Specifies the sensitivity of the external event
mbed_official	125:23cc3068a9e4	155	This parameter can be a value of @ref HRTIM_ExternalEventSensitivity */
mbed_official	125:23cc3068a9e4	156	uint32_t EventFilter; /*!< Defines the frequency used to sample the External Event and the length of the digital filter
mbed_official	125:23cc3068a9e4	157	This parameter can be a value of @ref HRTIM_ExternalEventFilter */
mbed_official	125:23cc3068a9e4	158	} HRTIM_BasicOnePulseChannelCfgTypeDef;
mbed_official	125:23cc3068a9e4	159
mbed_official	125:23cc3068a9e4	160	/**
mbed_official	125:23cc3068a9e4	161	* @brief Timer configuration definition
mbed_official	125:23cc3068a9e4	162	*/
mbed_official	125:23cc3068a9e4	163	typedef struct {
mbed_official	125:23cc3068a9e4	164	uint32_t PushPull; /*!< Specifies whether or not the push-pull mode is enabled
mbed_official	125:23cc3068a9e4	165	This parameter can be a value of @ref HRTIM_TimerPushPullMode */
mbed_official	125:23cc3068a9e4	166	uint32_t FaultEnable; /*!< Specifies which fault channels are enabled for the timer
mbed_official	125:23cc3068a9e4	167	This parameter can be a combination of @ref HRTIM_TimerFaultEnabling */
mbed_official	125:23cc3068a9e4	168	uint32_t FaultLock; /*!< Specifies whether or not fault enabling status is write protected
mbed_official	125:23cc3068a9e4	169	This parameter can be a value of @ref HRTIM_TimerFaultLock */
mbed_official	125:23cc3068a9e4	170	uint32_t DeadTimeInsertion; /*!< Specifies whether or not dead time insertion is enabled for the timer
mbed_official	125:23cc3068a9e4	171	This parameter can be a value of @ref HRTIM_TimerDeadtimeInsertion */
mbed_official	125:23cc3068a9e4	172	uint32_t DelayedProtectionMode; /*!< Specifies the delayed protection mode
mbed_official	125:23cc3068a9e4	173	This parameter can be a value of @ref HRTIM_TimerDelayedProtectionMode */
mbed_official	125:23cc3068a9e4	174	uint32_t UpdateTrigger; /*!< Specifies source(s) triggering the timer registers update
mbed_official	125:23cc3068a9e4	175	This parameter can be a combination of @ref HRTIM_TimerUpdateTrigger */
mbed_official	125:23cc3068a9e4	176	uint32_t ResetTrigger; /*!< Specifies source(s) triggering the timer counter reset
mbed_official	125:23cc3068a9e4	177	This parameter can be a combination of @ref HRTIM_TimerResetTrigger */
mbed_official	125:23cc3068a9e4	178	uint32_t ResetUpdate; /*!< Specifies whether or not registers update is triggered when the timer counter is reset
mbed_official	125:23cc3068a9e4	179	This parameter can be a combination of @ref HRTIM_TimerResetUpdate */
mbed_official	125:23cc3068a9e4	180	} HRTIM_TimerCfgTypeDef;
mbed_official	125:23cc3068a9e4	181
mbed_official	125:23cc3068a9e4	182	/**
mbed_official	125:23cc3068a9e4	183	* @brief Compare unit configuration definition
mbed_official	125:23cc3068a9e4	184	*/
mbed_official	125:23cc3068a9e4	185	typedef struct {
mbed_official	125:23cc3068a9e4	186	uint32_t CompareValue; /*!< Specifies the compare value of the timer compare unit
mbed_official	125:23cc3068a9e4	187	the minimum value must be greater than or equal to 3 periods of the fHRTIM clock
mbed_official	125:23cc3068a9e4	188	the maximum value must be less than or equal to 0xFFFF - 1 periods of the fHRTIM clock */
mbed_official	125:23cc3068a9e4	189	uint32_t AutoDelayedMode; /*!< Specifies the auto delayed mode for compare unit 2 or 4
mbed_official	125:23cc3068a9e4	190	This parameter can be a value of @ref HRTIM_CompareUnitAutoDelayedMode */
mbed_official	125:23cc3068a9e4	191	uint32_t AutoDelayedTimeout; /*!< Specifies compare value for timing unit 1 or 3 when auto delayed mode with time out is selected
mbed_official	125:23cc3068a9e4	192	CompareValue + AutoDelayedTimeout must be less than 0xFFFF */
mbed_official	125:23cc3068a9e4	193	} HRTIM_CompareCfgTypeDef;
mbed_official	125:23cc3068a9e4	194
mbed_official	125:23cc3068a9e4	195	/**
mbed_official	125:23cc3068a9e4	196	* @brief Capture unit configuration definition
mbed_official	125:23cc3068a9e4	197	*/
mbed_official	125:23cc3068a9e4	198	typedef struct {
mbed_official	125:23cc3068a9e4	199	uint32_t Trigger; /*!< Specifies source(s) triggering the capture
mbed_official	125:23cc3068a9e4	200	This parameter can be a combination of @ref HRTIM_CaptureUnitTrigger */
mbed_official	125:23cc3068a9e4	201	} HRTIM_CaptureCfgTypeDef;
mbed_official	125:23cc3068a9e4	202
mbed_official	125:23cc3068a9e4	203	/**
mbed_official	125:23cc3068a9e4	204	* @brief Output configuration definition
mbed_official	125:23cc3068a9e4	205	*/
mbed_official	125:23cc3068a9e4	206	typedef struct {
mbed_official	125:23cc3068a9e4	207	uint32_t Polarity; /*!< Specifies the output polarity
mbed_official	125:23cc3068a9e4	208	This parameter can be any value of @ref HRTIM_Output_Polarity */
mbed_official	125:23cc3068a9e4	209	uint32_t SetSource; /*!< Specifies the event(s) transitioning the output from its inactive level to its active level
mbed_official	125:23cc3068a9e4	210	This parameter can be any value of @ref HRTIM_OutputSetSource */
mbed_official	125:23cc3068a9e4	211	uint32_t ResetSource; /*!< Specifies the event(s) transitioning the output from its active level to its inactive level
mbed_official	125:23cc3068a9e4	212	This parameter can be any value of @ref HRTIM_OutputResetSource */
mbed_official	125:23cc3068a9e4	213	uint32_t IdleMode; /*!< Specifies whether or not the output is affected by a burst mode operation
mbed_official	125:23cc3068a9e4	214	This parameter can be any value of @ref HRTIM_OutputIdleMode */
mbed_official	125:23cc3068a9e4	215	uint32_t IdleState; /*!< Specifies whether the output level is active or inactive when in IDLE state
mbed_official	125:23cc3068a9e4	216	This parameter can be any value of @ref HRTIM_OutputIDLEState */
mbed_official	125:23cc3068a9e4	217	uint32_t FaultState; /*!< Specifies whether the output level is active or inactive when in FAULT state
mbed_official	125:23cc3068a9e4	218	This parameter can be any value of @ref HRTIM_OutputFAULTState */
mbed_official	125:23cc3068a9e4	219	uint32_t ChopperModeEnable; /*!< Indicates whether or not the chopper mode is enabled
mbed_official	125:23cc3068a9e4	220	This parameter can be any value of @ref HRTIM_OutputChopperModeEnable */
mbed_official	125:23cc3068a9e4	221	uint32_t BurstModeEntryDelayed; /* !<Indicates whether or not deadtime is inserted when entering the IDLE state
mbed_official	125:23cc3068a9e4	222	during a burst mode operation
mbed_official	125:23cc3068a9e4	223	This parameters can be any value of @ref HRTIM_OutputBurstModeEntryDelayed */
mbed_official	125:23cc3068a9e4	224	} HRTIM_OutputCfgTypeDef;
mbed_official	125:23cc3068a9e4	225
mbed_official	125:23cc3068a9e4	226	/**
mbed_official	125:23cc3068a9e4	227	* @brief External event filtering in timing units configuration definition
mbed_official	125:23cc3068a9e4	228	*/
mbed_official	125:23cc3068a9e4	229	typedef struct {
mbed_official	125:23cc3068a9e4	230	uint32_t Filter; /*!< Specifies the type of event filtering within the timing unit
mbed_official	125:23cc3068a9e4	231	This parameter can be a value of @ref HRTIM_TimerExternalEventFilter */
mbed_official	125:23cc3068a9e4	232	uint32_t Latch; /*!< Specifies whether or not the signal is latched
mbed_official	125:23cc3068a9e4	233	This parameter can be a value of @ref HRTIM_TimerExternalEventLatch */
mbed_official	125:23cc3068a9e4	234	} HRTIM_TimerEventFilteringCfgTypeDef;
mbed_official	125:23cc3068a9e4	235
mbed_official	125:23cc3068a9e4	236	/**
mbed_official	125:23cc3068a9e4	237	* @brief Dead time feature configuration definition
mbed_official	125:23cc3068a9e4	238	*/
mbed_official	125:23cc3068a9e4	239	typedef struct {
mbed_official	125:23cc3068a9e4	240	uint32_t Prescaler; /*!< Specifies the Deadtime Prescaler
mbed_official	125:23cc3068a9e4	241	This parameter can be a number between 0x0 and = 0x7 */
mbed_official	125:23cc3068a9e4	242	uint32_t RisingValue; /*!< Specifies the Deadtime following a rising edge
mbed_official	125:23cc3068a9e4	243	This parameter can be a number between 0x0 and 0xFF */
mbed_official	125:23cc3068a9e4	244	uint32_t RisingSign; /*!< Specifies whether the deadtime is positive or negative on rising edge
mbed_official	125:23cc3068a9e4	245	This parameter can be a value of @ref HRTIM_DeadtimeRisingSign */
mbed_official	125:23cc3068a9e4	246	uint32_t RisingLock; /*!< Specifies whether or not deadtime rising settings (value and sign) are write protected
mbed_official	125:23cc3068a9e4	247	This parameter can be a value of @ref HRTIM_DeadtimeRisingLock */
mbed_official	125:23cc3068a9e4	248	uint32_t RisingSignLock; /*!< Specifies whether or not deadtime rising sign is write protected
mbed_official	125:23cc3068a9e4	249	This parameter can be a value of @ref HRTIM_DeadtimeRisingSignLock */
mbed_official	125:23cc3068a9e4	250	uint32_t FallingValue; /*!< Specifies the Deadtime following a falling edge
mbed_official	125:23cc3068a9e4	251	This parameter can be a number between 0x0 and 0xFF */
mbed_official	125:23cc3068a9e4	252	uint32_t FallingSign; /*!< Specifies whether the deadtime is positive or negative on falling edge
mbed_official	125:23cc3068a9e4	253	This parameter can be a value of @ref HRTIM_DeadtimeFallingSign */
mbed_official	125:23cc3068a9e4	254	uint32_t FallingLock; /*!< Specifies whether or not deadtime falling settings (value and sign) are write protected
mbed_official	125:23cc3068a9e4	255	This parameter can be a value of @ref HRTIM_DeadtimeFallingLock */
mbed_official	125:23cc3068a9e4	256	uint32_t FallingSignLock; /*!< Specifies whether or not deadtime falling sign is write protected
mbed_official	125:23cc3068a9e4	257	This parameter can be a value of @ref HRTIM_DeadtimeFallingSignLock */
mbed_official	125:23cc3068a9e4	258	} HRTIM_DeadTimeCfgTypeDef;
mbed_official	125:23cc3068a9e4	259
mbed_official	125:23cc3068a9e4	260	/**
mbed_official	125:23cc3068a9e4	261	* @brief Chopper mode configuration definition
mbed_official	125:23cc3068a9e4	262	*/
mbed_official	125:23cc3068a9e4	263	typedef struct {
mbed_official	125:23cc3068a9e4	264	uint32_t CarrierFreq; /*!< Specifies the Timer carrier frequency value.
mbed_official	125:23cc3068a9e4	265	This parameter can be a value between 0 and 0xF */
mbed_official	125:23cc3068a9e4	266	uint32_t DutyCycle; /*!< Specifies the Timer chopper duty cycle value.
mbed_official	125:23cc3068a9e4	267	This parameter can be a value between 0 and 0x7 */
mbed_official	125:23cc3068a9e4	268	uint32_t StartPulse; /*!< Specifies the Timer pulse width value.
mbed_official	125:23cc3068a9e4	269	This parameter can be a value between 0 and 0xF */
mbed_official	125:23cc3068a9e4	270	} HRTIM_ChopperModeCfgTypeDef;
mbed_official	125:23cc3068a9e4	271
mbed_official	125:23cc3068a9e4	272	/**
mbed_official	125:23cc3068a9e4	273	* @brief Master synchronization configuration definition
mbed_official	125:23cc3068a9e4	274	*/
mbed_official	125:23cc3068a9e4	275	typedef struct {
mbed_official	125:23cc3068a9e4	276	uint32_t SyncInputSource; /*!< Specifies the external synchronization input source
mbed_official	125:23cc3068a9e4	277	This parameter can be a value of @ref HRTIM_SynchronizationInputSource */
mbed_official	125:23cc3068a9e4	278	uint32_t SyncOutputSource; /*!< Specifies the source and event to be sent on the external synchronization outputs
mbed_official	125:23cc3068a9e4	279	This parameter can be a value of @ref HRTIM_SynchronizationOutputSource */
mbed_official	125:23cc3068a9e4	280	uint32_t SyncOutputPolarity; /*!< Specifies the conditioning of the event to be sent on the external synchronization outputs
mbed_official	125:23cc3068a9e4	281	This parameter can be a value of @ref HRTIM_SynchronizationOutputPolarity */
mbed_official	125:23cc3068a9e4	282	} HRTIM_SynchroCfgTypeDef;
mbed_official	125:23cc3068a9e4	283
mbed_official	125:23cc3068a9e4	284	/**
mbed_official	125:23cc3068a9e4	285	* @brief External event channel configuration definition
mbed_official	125:23cc3068a9e4	286	*/
mbed_official	125:23cc3068a9e4	287	typedef struct {
mbed_official	125:23cc3068a9e4	288	uint32_t Source; /*!< Identifies the source of the external event
mbed_official	125:23cc3068a9e4	289	This parameter can be a value of @ref HRTIM_ExternalEventSources */
mbed_official	125:23cc3068a9e4	290	uint32_t Polarity; /*!< Specifies the polarity of the external event (in case of level sensitivity)
mbed_official	125:23cc3068a9e4	291	This parameter can be a value of @ref HRTIM_ExternalEventPolarity */
mbed_official	125:23cc3068a9e4	292	uint32_t Sensitivity; /*!< Specifies the sensitivity of the external event
mbed_official	125:23cc3068a9e4	293	This parameter can be a value of @ref HRTIM_ExternalEventSensitivity */
mbed_official	125:23cc3068a9e4	294	uint32_t Filter; /*!< Defines the frequency used to sample the External Event and the length of the digital filter
mbed_official	125:23cc3068a9e4	295	This parameter can be a value of @ref HRTIM_ExternalEventFilter */
mbed_official	125:23cc3068a9e4	296	uint32_t FastMode; /*!< Indicates whether or not low latency mode is enabled for the external event
mbed_official	125:23cc3068a9e4	297	This parameter can be a value of @ref HRTIM_ExternalEventFastMode */
mbed_official	125:23cc3068a9e4	298	} HRTIM_EventCfgTypeDef;
mbed_official	125:23cc3068a9e4	299
mbed_official	125:23cc3068a9e4	300	/**
mbed_official	125:23cc3068a9e4	301	* @brief Fault channel configuration definition
mbed_official	125:23cc3068a9e4	302	*/
mbed_official	125:23cc3068a9e4	303	typedef struct {
mbed_official	125:23cc3068a9e4	304	uint32_t Source; /*!< Identifies the source of the fault
mbed_official	125:23cc3068a9e4	305	This parameter can be a value of @ref HRTIM_FaultSources */
mbed_official	125:23cc3068a9e4	306	uint32_t Polarity; /*!< Specifies the polarity of the fault event
mbed_official	125:23cc3068a9e4	307	This parameter can be a value of @ref HRTIM_FaultPolarity */
mbed_official	125:23cc3068a9e4	308	uint32_t Filter; /*!< Defines the frequency used to sample the Fault input and the length of the digital filter
mbed_official	125:23cc3068a9e4	309	This parameter can be a value of @ref HRTIM_FaultFilter */
mbed_official	125:23cc3068a9e4	310	uint32_t Lock; /*!< Indicates whether or not fault programming bits are write protected
mbed_official	125:23cc3068a9e4	311	This parameter can be a value of @ref HRTIM_FaultLock */
mbed_official	125:23cc3068a9e4	312	} HRTIM_FaultCfgTypeDef;
mbed_official	125:23cc3068a9e4	313
mbed_official	125:23cc3068a9e4	314	/**
mbed_official	125:23cc3068a9e4	315	* @brief Burst mode configuration definition
mbed_official	125:23cc3068a9e4	316	*/
mbed_official	125:23cc3068a9e4	317	typedef struct {
mbed_official	125:23cc3068a9e4	318	uint32_t Mode; /*!< Specifies the burst mode operating mode
mbed_official	125:23cc3068a9e4	319	This parameter can be a value of @ref HRTIM_BurstModeOperatingMode */
mbed_official	125:23cc3068a9e4	320	uint32_t ClockSource; /*!< Specifies the burst mode clock source
mbed_official	125:23cc3068a9e4	321	This parameter can be a value of @ref HRTIM_BurstModeClockSource */
mbed_official	125:23cc3068a9e4	322	uint32_t Prescaler; /*!< Specifies the burst mode prescaler
mbed_official	125:23cc3068a9e4	323	This parameter can be a value of @ref HRTIM_BurstModePrescaler */
mbed_official	125:23cc3068a9e4	324	uint32_t PreloadEnable; /*!< Specifies whether or not preload is enabled for burst mode related registers (HRTIM_BMCMPR and HRTIM_BMPER)
mbed_official	125:23cc3068a9e4	325	This parameter can be a combination of @ref HRTIM_BurstModeRegisterPreloadEnable */
mbed_official	125:23cc3068a9e4	326	uint32_t Trigger; /*!< Specifies the event(s) triggering the burst operation
mbed_official	125:23cc3068a9e4	327	This parameter can be a combination of @ref HRTIM_BurstModeTrigger */
mbed_official	125:23cc3068a9e4	328	uint32_t IdleDuration; /*!< Specifies number of periods during which the selected timers are in idle state
mbed_official	125:23cc3068a9e4	329	This parameter can be a number between 0x0 and 0xFFFF */
mbed_official	125:23cc3068a9e4	330	uint32_t Period; /*!< Specifies burst mode repetition period
mbed_official	125:23cc3068a9e4	331	This parameter can be a number between 0x1 and 0xFFFF */
mbed_official	125:23cc3068a9e4	332	} HRTIM_BurstModeCfgTypeDef;
mbed_official	125:23cc3068a9e4	333
mbed_official	125:23cc3068a9e4	334	/**
mbed_official	125:23cc3068a9e4	335	* @brief ADC trigger configuration definition
mbed_official	125:23cc3068a9e4	336	*/
mbed_official	125:23cc3068a9e4	337	typedef struct {
mbed_official	125:23cc3068a9e4	338	uint32_t UpdateSource; /*!< Specifies the ADC trigger update source
mbed_official	125:23cc3068a9e4	339	This parameter can be a combination of @ref HRTIM_ADCTriggerUpdateSource */
mbed_official	125:23cc3068a9e4	340	uint32_t Trigger; /*!< Specifies the event(s) triggering the ADC conversion
mbed_official	125:23cc3068a9e4	341	This parameter can be a combination of @ref HRTIM_ADCTriggerEvent */
mbed_official	125:23cc3068a9e4	342	} HRTIM_ADCTriggerCfgTypeDef;
mbed_official	125:23cc3068a9e4	343
mbed_official	125:23cc3068a9e4	344
mbed_official	125:23cc3068a9e4	345	/* Exported constants --------------------------------------------------------*/
mbed_official	125:23cc3068a9e4	346	/** @defgroup HRTIM_Exported_Constants
mbed_official	125:23cc3068a9e4	347	* @{
mbed_official	125:23cc3068a9e4	348	*/
mbed_official	125:23cc3068a9e4	349
mbed_official	125:23cc3068a9e4	350	/** @defgroup HRTIM_TimerIndex
mbed_official	125:23cc3068a9e4	351	* @{
mbed_official	125:23cc3068a9e4	352	* @brief Constants defining the timer indexes
mbed_official	125:23cc3068a9e4	353	*/
mbed_official	125:23cc3068a9e4	354	#define HRTIM_TIMERINDEX_TIMER_A (uint32_t)0x0 /!< Index associated to timer A /
mbed_official	125:23cc3068a9e4	355	#define HRTIM_TIMERINDEX_TIMER_B (uint32_t)0x1 /!< Index associated to timer B /
mbed_official	125:23cc3068a9e4	356	#define HRTIM_TIMERINDEX_TIMER_C (uint32_t)0x2 /!< Index associated to timer C /
mbed_official	125:23cc3068a9e4	357	#define HRTIM_TIMERINDEX_TIMER_D (uint32_t)0x3 /!< Index associated to timer D /
mbed_official	125:23cc3068a9e4	358	#define HRTIM_TIMERINDEX_TIMER_E (uint32_t)0x4 /!< Index associated to timer E /
mbed_official	125:23cc3068a9e4	359	#define HRTIM_TIMERINDEX_MASTER (uint32_t)0x5 /!< Index associated to master timer /
mbed_official	125:23cc3068a9e4	360	#define HRTIM_COMMONINDEX (uint32_t)0x6 /!< Index associated to Common space /
mbed_official	125:23cc3068a9e4	361
mbed_official	125:23cc3068a9e4	362	#define IS_HRTIM_TIMERINDEX(TIMERINDEX)\
mbed_official	125:23cc3068a9e4	363	(((TIMERINDEX) == HRTIM_TIMERINDEX_MASTER) \|\| \
mbed_official	125:23cc3068a9e4	364	((TIMERINDEX) == HRTIM_TIMERINDEX_TIMER_A) \|\| \
mbed_official	125:23cc3068a9e4	365	((TIMERINDEX) == HRTIM_TIMERINDEX_TIMER_B) \|\| \
mbed_official	125:23cc3068a9e4	366	((TIMERINDEX) == HRTIM_TIMERINDEX_TIMER_C) \|\| \
mbed_official	125:23cc3068a9e4	367	((TIMERINDEX) == HRTIM_TIMERINDEX_TIMER_D) \|\| \
mbed_official	125:23cc3068a9e4	368	((TIMERINDEX) == HRTIM_TIMERINDEX_TIMER_E))
mbed_official	125:23cc3068a9e4	369
mbed_official	125:23cc3068a9e4	370	#define IS_HRTIM_TIMING_UNIT(TIMERINDEX)\
mbed_official	125:23cc3068a9e4	371	(((TIMERINDEX) == HRTIM_TIMERINDEX_TIMER_A) \|\| \
mbed_official	125:23cc3068a9e4	372	((TIMERINDEX) == HRTIM_TIMERINDEX_TIMER_B) \|\| \
mbed_official	125:23cc3068a9e4	373	((TIMERINDEX) == HRTIM_TIMERINDEX_TIMER_C) \|\| \
mbed_official	125:23cc3068a9e4	374	((TIMERINDEX) == HRTIM_TIMERINDEX_TIMER_D) \|\| \
mbed_official	125:23cc3068a9e4	375	((TIMERINDEX) == HRTIM_TIMERINDEX_TIMER_E))
mbed_official	125:23cc3068a9e4	376	/**
mbed_official	125:23cc3068a9e4	377	* @}
mbed_official	125:23cc3068a9e4	378	*/
mbed_official	125:23cc3068a9e4	379
mbed_official	125:23cc3068a9e4	380	/** @defgroup HRTIM_TimerIdentifier
mbed_official	125:23cc3068a9e4	381	* @{
mbed_official	125:23cc3068a9e4	382	* @brief Constants defining timer identifiers
mbed_official	125:23cc3068a9e4	383	*/
mbed_official	125:23cc3068a9e4	384	#define HRTIM_TIMERID_MASTER (HRTIM_MCR_MCEN) /!< Master identifier/
mbed_official	125:23cc3068a9e4	385	#define HRTIM_TIMERID_TIMER_A (HRTIM_MCR_TACEN) /!< Timer A identifier /
mbed_official	125:23cc3068a9e4	386	#define HRTIM_TIMERID_TIMER_B (HRTIM_MCR_TBCEN) /!< Timer B identifier /
mbed_official	125:23cc3068a9e4	387	#define HRTIM_TIMERID_TIMER_C (HRTIM_MCR_TCCEN) /!< Timer C identifier /
mbed_official	125:23cc3068a9e4	388	#define HRTIM_TIMERID_TIMER_D (HRTIM_MCR_TDCEN) /!< Timer D identifier /
mbed_official	125:23cc3068a9e4	389	#define HRTIM_TIMERID_TIMER_E (HRTIM_MCR_TECEN) /!< Timer E identifier /
mbed_official	125:23cc3068a9e4	390
mbed_official	125:23cc3068a9e4	391	#define IS_HRTIM_TIMERID(TIMERID)\
mbed_official	125:23cc3068a9e4	392	(((TIMERID) == HRTIM_TIMERID_MASTER) \|\| \
mbed_official	125:23cc3068a9e4	393	((TIMERID) == HRTIM_TIMERID_TIMER_A) \|\| \
mbed_official	125:23cc3068a9e4	394	((TIMERID) == HRTIM_TIMERID_TIMER_B) \|\| \
mbed_official	125:23cc3068a9e4	395	((TIMERID) == HRTIM_TIMERID_TIMER_C) \|\| \
mbed_official	125:23cc3068a9e4	396	((TIMERID) == HRTIM_TIMERID_TIMER_D) \|\| \
mbed_official	125:23cc3068a9e4	397	((TIMERID) == HRTIM_TIMERID_TIMER_E))
mbed_official	125:23cc3068a9e4	398	/**
mbed_official	125:23cc3068a9e4	399	* @}
mbed_official	125:23cc3068a9e4	400	*/
mbed_official	125:23cc3068a9e4	401
mbed_official	125:23cc3068a9e4	402	/** @defgroup HRTIM_CompareUnit
mbed_official	125:23cc3068a9e4	403	* @{
mbed_official	125:23cc3068a9e4	404	* @brief Constants defining compare unit identifiers
mbed_official	125:23cc3068a9e4	405	*/
mbed_official	125:23cc3068a9e4	406	#define HRTIM_COMPAREUNIT_1 (uint32_t)0x00000001 /!< Compare unit 1 identifier /
mbed_official	125:23cc3068a9e4	407	#define HRTIM_COMPAREUNIT_2 (uint32_t)0x00000002 /!< Compare unit 2 identifier /
mbed_official	125:23cc3068a9e4	408	#define HRTIM_COMPAREUNIT_3 (uint32_t)0x00000004 /!< Compare unit 3 identifier /
mbed_official	125:23cc3068a9e4	409	#define HRTIM_COMPAREUNIT_4 (uint32_t)0x00000008 /!< Compare unit 4 identifier /
mbed_official	125:23cc3068a9e4	410
mbed_official	125:23cc3068a9e4	411	#define IS_HRTIM_COMPAREUNIT(COMPAREUNIT)\
mbed_official	125:23cc3068a9e4	412	(((COMPAREUNIT) == HRTIM_COMPAREUNIT_1) \|\| \
mbed_official	125:23cc3068a9e4	413	((COMPAREUNIT) == HRTIM_COMPAREUNIT_2) \|\| \
mbed_official	125:23cc3068a9e4	414	((COMPAREUNIT) == HRTIM_COMPAREUNIT_3) \|\| \
mbed_official	125:23cc3068a9e4	415	((COMPAREUNIT) == HRTIM_COMPAREUNIT_4))
mbed_official	125:23cc3068a9e4	416	/**
mbed_official	125:23cc3068a9e4	417	* @}
mbed_official	125:23cc3068a9e4	418	*/
mbed_official	125:23cc3068a9e4	419
mbed_official	125:23cc3068a9e4	420	/** @defgroup HRTIM_CaptureUnit
mbed_official	125:23cc3068a9e4	421	* @{
mbed_official	125:23cc3068a9e4	422	* @brief Constants defining capture unit identifiers
mbed_official	125:23cc3068a9e4	423	*/
mbed_official	125:23cc3068a9e4	424	#define HRTIM_CAPTUREUNIT_1 (uint32_t)0x00000001 /!< Capture unit 1 identifier /
mbed_official	125:23cc3068a9e4	425	#define HRTIM_CAPTUREUNIT_2 (uint32_t)0x00000002 /!< Capture unit 2 identifier /
mbed_official	125:23cc3068a9e4	426
mbed_official	125:23cc3068a9e4	427	#define IS_HRTIM_CAPTUREUNIT(CAPTUREUNIT)\
mbed_official	125:23cc3068a9e4	428	(((CAPTUREUNIT) == HRTIM_CAPTUREUNIT_1) \|\| \
mbed_official	125:23cc3068a9e4	429	((CAPTUREUNIT) == HRTIM_CAPTUREUNIT_2))
mbed_official	125:23cc3068a9e4	430	/**
mbed_official	125:23cc3068a9e4	431	* @}
mbed_official	125:23cc3068a9e4	432	*/
mbed_official	125:23cc3068a9e4	433
mbed_official	125:23cc3068a9e4	434	/** @defgroup HRTIM_TimerOutput
mbed_official	125:23cc3068a9e4	435	* @{
mbed_official	125:23cc3068a9e4	436	* @brief Constants defining timer output identifiers
mbed_official	125:23cc3068a9e4	437	*/
mbed_official	125:23cc3068a9e4	438	#define HRTIM_OUTPUT_TA1 (uint32_t)0x00000001 /!< Timer A - Ouput 1 identifier /
mbed_official	125:23cc3068a9e4	439	#define HRTIM_OUTPUT_TA2 (uint32_t)0x00000002 /!< Timer A - Ouput 2 identifier /
mbed_official	125:23cc3068a9e4	440	#define HRTIM_OUTPUT_TB1 (uint32_t)0x00000004 /!< Timer B - Ouput 1 identifier /
mbed_official	125:23cc3068a9e4	441	#define HRTIM_OUTPUT_TB2 (uint32_t)0x00000008 /!< Timer B - Ouput 2 identifier /
mbed_official	125:23cc3068a9e4	442	#define HRTIM_OUTPUT_TC1 (uint32_t)0x00000010 /!< Timer C - Ouput 1 identifier /
mbed_official	125:23cc3068a9e4	443	#define HRTIM_OUTPUT_TC2 (uint32_t)0x00000020 /!< Timer C - Ouput 2 identifier /
mbed_official	125:23cc3068a9e4	444	#define HRTIM_OUTPUT_TD1 (uint32_t)0x00000040 /!< Timer D - Ouput 1 identifier /
mbed_official	125:23cc3068a9e4	445	#define HRTIM_OUTPUT_TD2 (uint32_t)0x00000080 /!< Timer D - Ouput 2 identifier /
mbed_official	125:23cc3068a9e4	446	#define HRTIM_OUTPUT_TE1 (uint32_t)0x00000100 /!< Timer E - Ouput 1 identifier /
mbed_official	125:23cc3068a9e4	447	#define HRTIM_OUTPUT_TE2 (uint32_t)0x00000200 /!< Timer E - Ouput 2 identifier /
mbed_official	125:23cc3068a9e4	448
mbed_official	125:23cc3068a9e4	449	#define IS_HRTIM_OUTPUT(OUTPUT)\
mbed_official	125:23cc3068a9e4	450	(((OUTPUT) == HRTIM_OUTPUT_TA1) \|\| \
mbed_official	125:23cc3068a9e4	451	((OUTPUT) == HRTIM_OUTPUT_TA2) \|\| \
mbed_official	125:23cc3068a9e4	452	((OUTPUT) == HRTIM_OUTPUT_TB1) \|\| \
mbed_official	125:23cc3068a9e4	453	((OUTPUT) == HRTIM_OUTPUT_TB2) \|\| \
mbed_official	125:23cc3068a9e4	454	((OUTPUT) == HRTIM_OUTPUT_TC1) \|\| \
mbed_official	125:23cc3068a9e4	455	((OUTPUT) == HRTIM_OUTPUT_TC2) \|\| \
mbed_official	125:23cc3068a9e4	456	((OUTPUT) == HRTIM_OUTPUT_TD1) \|\| \
mbed_official	125:23cc3068a9e4	457	((OUTPUT) == HRTIM_OUTPUT_TD2) \|\| \
mbed_official	125:23cc3068a9e4	458	((OUTPUT) == HRTIM_OUTPUT_TE1) \|\| \
mbed_official	125:23cc3068a9e4	459	((OUTPUT) == HRTIM_OUTPUT_TE2))
mbed_official	125:23cc3068a9e4	460
mbed_official	125:23cc3068a9e4	461	#define IS_HRTIM_TIMER_OUTPUT(TIMER, OUTPUT)\
mbed_official	125:23cc3068a9e4	462	((((TIMER) == HRTIM_TIMERINDEX_TIMER_A) && \
mbed_official	125:23cc3068a9e4	463	(((OUTPUT) == HRTIM_OUTPUT_TA1) \|\| \
mbed_official	125:23cc3068a9e4	464	((OUTPUT) == HRTIM_OUTPUT_TA2))) \
mbed_official	125:23cc3068a9e4	465	\|\| \
mbed_official	125:23cc3068a9e4	466	(((TIMER) == HRTIM_TIMERINDEX_TIMER_B) && \
mbed_official	125:23cc3068a9e4	467	(((OUTPUT) == HRTIM_OUTPUT_TB1) \|\| \
mbed_official	125:23cc3068a9e4	468	((OUTPUT) == HRTIM_OUTPUT_TB2))) \
mbed_official	125:23cc3068a9e4	469	\|\| \
mbed_official	125:23cc3068a9e4	470	(((TIMER) == HRTIM_TIMERINDEX_TIMER_C) && \
mbed_official	125:23cc3068a9e4	471	(((OUTPUT) == HRTIM_OUTPUT_TC1) \|\| \
mbed_official	125:23cc3068a9e4	472	((OUTPUT) == HRTIM_OUTPUT_TC2))) \
mbed_official	125:23cc3068a9e4	473	\|\| \
mbed_official	125:23cc3068a9e4	474	(((TIMER) == HRTIM_TIMERINDEX_TIMER_D) && \
mbed_official	125:23cc3068a9e4	475	(((OUTPUT) == HRTIM_OUTPUT_TD1) \|\| \
mbed_official	125:23cc3068a9e4	476	((OUTPUT) == HRTIM_OUTPUT_TD2))) \
mbed_official	125:23cc3068a9e4	477	\|\| \
mbed_official	125:23cc3068a9e4	478	(((TIMER) == HRTIM_TIMERINDEX_TIMER_E) && \
mbed_official	125:23cc3068a9e4	479	(((OUTPUT) == HRTIM_OUTPUT_TE1) \|\| \
mbed_official	125:23cc3068a9e4	480	((OUTPUT) == HRTIM_OUTPUT_TE2))))
mbed_official	125:23cc3068a9e4	481	/**
mbed_official	125:23cc3068a9e4	482	* @}
mbed_official	125:23cc3068a9e4	483	*/
mbed_official	125:23cc3068a9e4	484
mbed_official	125:23cc3068a9e4	485	/** @defgroup HRTIM_ADCTrigger
mbed_official	125:23cc3068a9e4	486	* @{
mbed_official	125:23cc3068a9e4	487	* @brief Constants defining ADC triggers identifiers
mbed_official	125:23cc3068a9e4	488	*/
mbed_official	125:23cc3068a9e4	489	#define HRTIM_ADCTRIGGER_1 (uint32_t)0x00000001 /!< ADC trigger 1 identifier /
mbed_official	125:23cc3068a9e4	490	#define HRTIM_ADCTRIGGER_2 (uint32_t)0x00000002 /!< ADC trigger 1 identifier /
mbed_official	125:23cc3068a9e4	491	#define HRTIM_ADCTRIGGER_3 (uint32_t)0x00000004 /!< ADC trigger 1 identifier /
mbed_official	125:23cc3068a9e4	492	#define HRTIM_ADCTRIGGER_4 (uint32_t)0x00000008 /!< ADC trigger 1 identifier /
mbed_official	125:23cc3068a9e4	493
mbed_official	125:23cc3068a9e4	494	#define IS_HRTIM_ADCTRIGGER(ADCTRIGGER)\
mbed_official	125:23cc3068a9e4	495	(((ADCTRIGGER) == HRTIM_ADCTRIGGER_1) \|\| \
mbed_official	125:23cc3068a9e4	496	((ADCTRIGGER) == HRTIM_ADCTRIGGER_2) \|\| \
mbed_official	125:23cc3068a9e4	497	((ADCTRIGGER) == HRTIM_ADCTRIGGER_3) \|\| \
mbed_official	125:23cc3068a9e4	498	((ADCTRIGGER) == HRTIM_ADCTRIGGER_4))
mbed_official	125:23cc3068a9e4	499	/**
mbed_official	125:23cc3068a9e4	500	* @}
mbed_official	125:23cc3068a9e4	501	*/
mbed_official	125:23cc3068a9e4	502
mbed_official	125:23cc3068a9e4	503	/** @defgroup HRTIM_ExternalEventChannels
mbed_official	125:23cc3068a9e4	504	* @{
mbed_official	125:23cc3068a9e4	505	* @brief Constants defining external event channel identifiers
mbed_official	125:23cc3068a9e4	506	*/
mbed_official	125:23cc3068a9e4	507	#define HRTIM_EVENT_NONE ((uint32_t)0x00000000) /!< Undefined event channel /
mbed_official	125:23cc3068a9e4	508	#define HRTIM_EVENT_1 ((uint32_t)0x00000001) /!< External event channel 1 identifier /
mbed_official	125:23cc3068a9e4	509	#define HRTIM_EVENT_2 ((uint32_t)0x00000002) /!< External event channel 2 identifier /
mbed_official	125:23cc3068a9e4	510	#define HRTIM_EVENT_3 ((uint32_t)0x00000004) /!< External event channel 3 identifier /
mbed_official	125:23cc3068a9e4	511	#define HRTIM_EVENT_4 ((uint32_t)0x00000008) /!< External event channel 4 identifier /
mbed_official	125:23cc3068a9e4	512	#define HRTIM_EVENT_5 ((uint32_t)0x00000010) /!< External event channel 5 identifier /
mbed_official	125:23cc3068a9e4	513	#define HRTIM_EVENT_6 ((uint32_t)0x00000020) /!< External event channel 6 identifier /
mbed_official	125:23cc3068a9e4	514	#define HRTIM_EVENT_7 ((uint32_t)0x00000040) /!< External event channel 7 identifier /
mbed_official	125:23cc3068a9e4	515	#define HRTIM_EVENT_8 ((uint32_t)0x00000080) /!< External event channel 8 identifier /
mbed_official	125:23cc3068a9e4	516	#define HRTIM_EVENT_9 ((uint32_t)0x00000100) /!< External event channel 9 identifier /
mbed_official	125:23cc3068a9e4	517	#define HRTIM_EVENT_10 ((uint32_t)0x00000200) /!< External event channel 10 identifier /
mbed_official	125:23cc3068a9e4	518
mbed_official	125:23cc3068a9e4	519	#define IS_HRTIM_EVENT(EVENT)\
mbed_official	125:23cc3068a9e4	520	(((EVENT) == HRTIM_EVENT_1) \|\| \
mbed_official	125:23cc3068a9e4	521	((EVENT) == HRTIM_EVENT_2) \|\| \
mbed_official	125:23cc3068a9e4	522	((EVENT) == HRTIM_EVENT_3) \|\| \
mbed_official	125:23cc3068a9e4	523	((EVENT) == HRTIM_EVENT_4) \|\| \
mbed_official	125:23cc3068a9e4	524	((EVENT) == HRTIM_EVENT_5) \|\| \
mbed_official	125:23cc3068a9e4	525	((EVENT) == HRTIM_EVENT_6) \|\| \
mbed_official	125:23cc3068a9e4	526	((EVENT) == HRTIM_EVENT_7) \|\| \
mbed_official	125:23cc3068a9e4	527	((EVENT) == HRTIM_EVENT_8) \|\| \
mbed_official	125:23cc3068a9e4	528	((EVENT) == HRTIM_EVENT_9) \|\| \
mbed_official	125:23cc3068a9e4	529	((EVENT) == HRTIM_EVENT_10))
mbed_official	125:23cc3068a9e4	530	/**
mbed_official	125:23cc3068a9e4	531	* @}
mbed_official	125:23cc3068a9e4	532	*/
mbed_official	125:23cc3068a9e4	533
mbed_official	125:23cc3068a9e4	534	/** @defgroup HRTIM_FaultChannel
mbed_official	125:23cc3068a9e4	535	* @{
mbed_official	125:23cc3068a9e4	536	* @brief Constants defining fault channel identifiers
mbed_official	125:23cc3068a9e4	537	*/
mbed_official	125:23cc3068a9e4	538	#define HRTIM_FAULT_1 ((uint32_t)0x01) /!< Fault channel 1 identifier /
mbed_official	125:23cc3068a9e4	539	#define HRTIM_FAULT_2 ((uint32_t)0x02) /!< Fault channel 2 identifier /
mbed_official	125:23cc3068a9e4	540	#define HRTIM_FAULT_3 ((uint32_t)0x04) /!< Fault channel 3 identifier /
mbed_official	125:23cc3068a9e4	541	#define HRTIM_FAULT_4 ((uint32_t)0x08) /!< Fault channel 4 identifier /
mbed_official	125:23cc3068a9e4	542	#define HRTIM_FAULT_5 ((uint32_t)0x10) /!< Fault channel 5 identifier /
mbed_official	125:23cc3068a9e4	543
mbed_official	125:23cc3068a9e4	544	#define IS_HRTIM_FAULT(FAULT)\
mbed_official	125:23cc3068a9e4	545	(((FAULT) == HRTIM_FAULT_1) \|\| \
mbed_official	125:23cc3068a9e4	546	((FAULT) == HRTIM_FAULT_2) \|\| \
mbed_official	125:23cc3068a9e4	547	((FAULT) == HRTIM_FAULT_3) \|\| \
mbed_official	125:23cc3068a9e4	548	((FAULT) == HRTIM_FAULT_4) \|\| \
mbed_official	125:23cc3068a9e4	549	((FAULT) == HRTIM_FAULT_5))
mbed_official	125:23cc3068a9e4	550	/**
mbed_official	125:23cc3068a9e4	551	* @}
mbed_official	125:23cc3068a9e4	552	*/
mbed_official	125:23cc3068a9e4	553
mbed_official	125:23cc3068a9e4	554
mbed_official	125:23cc3068a9e4	555	/** @defgroup HRTIM_PrescalerRatio
mbed_official	125:23cc3068a9e4	556	* @{
mbed_official	125:23cc3068a9e4	557	* @brief Constants defining timer high-resolution clock prescaler ratio.
mbed_official	125:23cc3068a9e4	558	*/
mbed_official	125:23cc3068a9e4	559	#define HRTIM_PRESCALERRATIO_MUL32 ((uint32_t)0x00000000) /!< fHRCK: 4.608 GHz - Resolution: 217 ps - Min PWM frequency: 70.3 kHz (fHRTIM=144MHz) /
mbed_official	125:23cc3068a9e4	560	#define HRTIM_PRESCALERRATIO_MUL16 ((uint32_t)0x00000001) /!< fHRCK: 2.304 GHz - Resolution: 434 ps - Min PWM frequency: 35.1 KHz (fHRTIM=144MHz) /
mbed_official	125:23cc3068a9e4	561	#define HRTIM_PRESCALERRATIO_MUL8 ((uint32_t)0x00000002) /!< fHRCK: 1.152 GHz - Resolution: 868 ps - Min PWM frequency: 17.6 kHz (fHRTIM=144MHz) /
mbed_official	125:23cc3068a9e4	562	#define HRTIM_PRESCALERRATIO_MUL4 ((uint32_t)0x00000003) /!< fHRCK: 576 MHz - Resolution: 1.73 ns - Min PWM frequency: 8.8 kHz (fHRTIM=144MHz) /
mbed_official	125:23cc3068a9e4	563	#define HRTIM_PRESCALERRATIO_MUL2 ((uint32_t)0x00000004) /!< fHRCK: 288 MHz - Resolution: 3.47 ns - Min PWM frequency: 4.4 kHz (fHRTIM=144MHz) /
mbed_official	125:23cc3068a9e4	564	#define HRTIM_PRESCALERRATIO_DIV1 ((uint32_t)0x00000005) /!< fHRCK: 144 MHz - Resolution: 6.95 ns - Min PWM frequency: 2.2 kHz (fHRTIM=144MHz) /
mbed_official	125:23cc3068a9e4	565	#define HRTIM_PRESCALERRATIO_DIV2 ((uint32_t)0x00000006) /!< fHRCK: 72 MHz - Resolution: 13.88 ns- Min PWM frequency: 1.1 kHz (fHRTIM=144MHz) /
mbed_official	125:23cc3068a9e4	566	#define HRTIM_PRESCALERRATIO_DIV4 ((uint32_t)0x00000007) /!< fHRCK: 36 MHz - Resolution: 27.7 ns- Min PWM frequency: 550Hz (fHRTIM=144MHz) /
mbed_official	125:23cc3068a9e4	567
mbed_official	125:23cc3068a9e4	568	#define IS_HRTIM_PRESCALERRATIO(PRESCALERRATIO)\
mbed_official	125:23cc3068a9e4	569	(((PRESCALERRATIO) == HRTIM_PRESCALERRATIO_MUL32) \|\| \
mbed_official	125:23cc3068a9e4	570	((PRESCALERRATIO) == HRTIM_PRESCALERRATIO_MUL16) \|\| \
mbed_official	125:23cc3068a9e4	571	((PRESCALERRATIO) == HRTIM_PRESCALERRATIO_MUL8) \|\| \
mbed_official	125:23cc3068a9e4	572	((PRESCALERRATIO) == HRTIM_PRESCALERRATIO_MUL4) \|\| \
mbed_official	125:23cc3068a9e4	573	((PRESCALERRATIO) == HRTIM_PRESCALERRATIO_MUL2) \|\| \
mbed_official	125:23cc3068a9e4	574	((PRESCALERRATIO) == HRTIM_PRESCALERRATIO_DIV1) \|\| \
mbed_official	125:23cc3068a9e4	575	((PRESCALERRATIO) == HRTIM_PRESCALERRATIO_DIV2) \|\| \
mbed_official	125:23cc3068a9e4	576	((PRESCALERRATIO) == HRTIM_PRESCALERRATIO_DIV4))
mbed_official	125:23cc3068a9e4	577	/**
mbed_official	125:23cc3068a9e4	578	* @}
mbed_official	125:23cc3068a9e4	579	*/
mbed_official	125:23cc3068a9e4	580
mbed_official	125:23cc3068a9e4	581	/** @defgroup HRTIM_Mode
mbed_official	125:23cc3068a9e4	582	* @{
mbed_official	125:23cc3068a9e4	583	* @brief Constants defining timer counter operating mode.
mbed_official	125:23cc3068a9e4	584	*/
mbed_official	125:23cc3068a9e4	585	#define HRTIM_MODE_CONTINOUS ((uint32_t)0x00000008) /!< The timer operates in continuous (free-running) mode /
mbed_official	125:23cc3068a9e4	586	#define HRTIM_MODE_SINGLESHOT ((uint32_t)0x00000000) /!< The timer operates in non retriggerable single-shot mode /
mbed_official	125:23cc3068a9e4	587	#define HRTIM_MODE_SINGLESHOT_RETRIGGERABLE ((uint32_t)0x00000010) /!< The timer operates in retriggerable single-shot mode /
mbed_official	125:23cc3068a9e4	588
mbed_official	125:23cc3068a9e4	589	#define IS_HRTIM_MODE(MODE)\
mbed_official	125:23cc3068a9e4	590	(((MODE) == HRTIM_MODE_CONTINOUS) \|\| \
mbed_official	125:23cc3068a9e4	591	((MODE) == HRTIM_MODE_SINGLESHOT) \|\| \
mbed_official	125:23cc3068a9e4	592	((MODE) == HRTIM_MODE_SINGLESHOT_RETRIGGERABLE))
mbed_official	125:23cc3068a9e4	593
mbed_official	125:23cc3068a9e4	594	#define IS_HRTIM_MODE_ONEPULSE(MODE)\
mbed_official	125:23cc3068a9e4	595	(((MODE) == HRTIM_MODE_SINGLESHOT) \|\| \
mbed_official	125:23cc3068a9e4	596	((MODE) == HRTIM_MODE_SINGLESHOT_RETRIGGERABLE))
mbed_official	125:23cc3068a9e4	597
mbed_official	125:23cc3068a9e4	598	/**
mbed_official	125:23cc3068a9e4	599	* @}
mbed_official	125:23cc3068a9e4	600	*/
mbed_official	125:23cc3068a9e4	601
mbed_official	125:23cc3068a9e4	602	/** @defgroup HRTIM_HalfModeEnable
mbed_official	125:23cc3068a9e4	603	* @{
mbed_official	125:23cc3068a9e4	604	* @brief Constants defining half mode enabling status.
mbed_official	125:23cc3068a9e4	605	*/
mbed_official	125:23cc3068a9e4	606	#define HRTIM_HALFMODE_DISABLED ((uint32_t)0x00000000) /!< Half mode is disabled /
mbed_official	125:23cc3068a9e4	607	#define HRTIM_HALFMODE_ENABLED ((uint32_t)0x00000020) /!< Half mode is enabled /
mbed_official	125:23cc3068a9e4	608
mbed_official	125:23cc3068a9e4	609	#define IS_HRTIM_HALFMODE(HALFMODE)\
mbed_official	125:23cc3068a9e4	610	(((HALFMODE) == HRTIM_HALFMODE_DISABLED) \|\| \
mbed_official	125:23cc3068a9e4	611	((HALFMODE) == HRTIM_HALFMODE_ENABLED))
mbed_official	125:23cc3068a9e4	612	/**
mbed_official	125:23cc3068a9e4	613	* @}
mbed_official	125:23cc3068a9e4	614	*/
mbed_official	125:23cc3068a9e4	615
mbed_official	125:23cc3068a9e4	616	/** @defgroup HRTIM_StartOnSyncInputEvent
mbed_official	125:23cc3068a9e4	617	* @{
mbed_official	125:23cc3068a9e4	618	* @brief Constants defining the timer behavior following the synchronization event
mbed_official	125:23cc3068a9e4	619	*/
mbed_official	125:23cc3068a9e4	620	#define HRTIM_SYNCSTART_DISABLED ((uint32_t)0x00000000) /!< Synchronization input event has effect on the timer /
mbed_official	125:23cc3068a9e4	621	#define HRTIM_SYNCSTART_ENABLED (HRTIM_MCR_SYNCSTRTM) /!< Synchronization input event starts the timer /
mbed_official	125:23cc3068a9e4	622
mbed_official	125:23cc3068a9e4	623	#define IS_HRTIM_SYNCSTART(SYNCSTART)\
mbed_official	125:23cc3068a9e4	624	(((SYNCSTART) == HRTIM_SYNCSTART_DISABLED) \|\| \
mbed_official	125:23cc3068a9e4	625	((SYNCSTART) == HRTIM_SYNCSTART_ENABLED))
mbed_official	125:23cc3068a9e4	626	/**
mbed_official	125:23cc3068a9e4	627	* @}
mbed_official	125:23cc3068a9e4	628	*/
mbed_official	125:23cc3068a9e4	629
mbed_official	125:23cc3068a9e4	630	/** @defgroup HRTIM_ResetOnSyncInputEvent
mbed_official	125:23cc3068a9e4	631	* @{
mbed_official	125:23cc3068a9e4	632	* @brief Constants defining the timer behavior following the synchronization event
mbed_official	125:23cc3068a9e4	633	*/
mbed_official	125:23cc3068a9e4	634	#define HRTIM_SYNCRESET_DISABLED ((uint32_t)0x00000000) /!< Synchronization input event has effect on the timer /
mbed_official	125:23cc3068a9e4	635	#define HRTIM_SYNCRESET_ENABLED (HRTIM_MCR_SYNCRSTM) /!< Synchronization input event resets the timer /
mbed_official	125:23cc3068a9e4	636
mbed_official	125:23cc3068a9e4	637	#define IS_HRTIM_SYNCRESET(SYNCRESET)\
mbed_official	125:23cc3068a9e4	638	(((SYNCRESET) == HRTIM_SYNCRESET_DISABLED) \|\| \
mbed_official	125:23cc3068a9e4	639	((SYNCRESET) == HRTIM_SYNCRESET_ENABLED))
mbed_official	125:23cc3068a9e4	640	/**
mbed_official	125:23cc3068a9e4	641	* @}
mbed_official	125:23cc3068a9e4	642	*/
mbed_official	125:23cc3068a9e4	643
mbed_official	125:23cc3068a9e4	644	/** @defgroup HRTIM_DACSynchronization
mbed_official	125:23cc3068a9e4	645	* @{
mbed_official	125:23cc3068a9e4	646	* @brief Constants defining on which output the DAC synchronization event is sent
mbed_official	125:23cc3068a9e4	647	*/
mbed_official	125:23cc3068a9e4	648	#define HRTIM_DACSYNC_NONE (uint32_t)0x00000000 /!< No DAC synchronization event generated /
mbed_official	125:23cc3068a9e4	649	#define HRTIM_DACSYNC_DACTRIGOUT_1 (HRTIM_MCR_DACSYNC_0) /!< DAC synchronization event generated on DACTrigOut1 output upon timer update /
mbed_official	125:23cc3068a9e4	650	#define HRTIM_DACSYNC_DACTRIGOUT_2 (HRTIM_MCR_DACSYNC_1) /!< DAC synchronization event generated on DACTrigOut2 output upon timer update /
mbed_official	125:23cc3068a9e4	651	#define HRTIM_DACSYNC_DACTRIGOUT_3 (HRTIM_MCR_DACSYNC_1 \| HRTIM_MCR_DACSYNC_0) /!< DAC update generated on DACTrigOut3 output upon timer update /
mbed_official	125:23cc3068a9e4	652
mbed_official	125:23cc3068a9e4	653	#define IS_HRTIM_DACSYNC(DACSYNC)\
mbed_official	125:23cc3068a9e4	654	(((DACSYNC) == HRTIM_DACSYNC_NONE) \|\| \
mbed_official	125:23cc3068a9e4	655	((DACSYNC) == HRTIM_DACSYNC_DACTRIGOUT_1) \|\| \
mbed_official	125:23cc3068a9e4	656	((DACSYNC) == HRTIM_DACSYNC_DACTRIGOUT_2) \|\| \
mbed_official	125:23cc3068a9e4	657	((DACSYNC) == HRTIM_DACSYNC_DACTRIGOUT_3))
mbed_official	125:23cc3068a9e4	658	/**
mbed_official	125:23cc3068a9e4	659	* @}
mbed_official	125:23cc3068a9e4	660	*/
mbed_official	125:23cc3068a9e4	661
mbed_official	125:23cc3068a9e4	662	/** @defgroup HRTIM_RegisterPreloadEnable
mbed_official	125:23cc3068a9e4	663	* @{
mbed_official	125:23cc3068a9e4	664	* @brief Constants defining whether a write access into a preloadable
mbed_official	125:23cc3068a9e4	665	* register is done into the active or the preload register.
mbed_official	125:23cc3068a9e4	666	*/
mbed_official	125:23cc3068a9e4	667	#define HRTIM_PRELOAD_DISABLED ((uint32_t)0x00000000) /!< Preload disabled: the write access is directly done into the active register /
mbed_official	125:23cc3068a9e4	668	#define HRTIM_PRELOAD_ENABLED (HRTIM_MCR_PREEN) /!< Preload enabled: the write access is done into the preload register /
mbed_official	125:23cc3068a9e4	669
mbed_official	125:23cc3068a9e4	670	#define IS_HRTIM_PRELOAD(PRELOAD)\
mbed_official	125:23cc3068a9e4	671	(((PRELOAD) == HRTIM_PRELOAD_DISABLED) \|\| \
mbed_official	125:23cc3068a9e4	672	((PRELOAD) == HRTIM_PRELOAD_ENABLED))
mbed_official	125:23cc3068a9e4	673	/**
mbed_official	125:23cc3068a9e4	674	* @}
mbed_official	125:23cc3068a9e4	675	*/
mbed_official	125:23cc3068a9e4	676
mbed_official	125:23cc3068a9e4	677	/** @defgroup HRTIM_UpdateGating
mbed_official	125:23cc3068a9e4	678	* @{
mbed_official	125:23cc3068a9e4	679	* @brief Constants defining how the update occurs relatively to the burst DMA
mbed_official	125:23cc3068a9e4	680	* transaction and the external update request on update enable inputs 1 to 3.
mbed_official	125:23cc3068a9e4	681	*/
mbed_official	125:23cc3068a9e4	682	#define HRTIM_UPDATEGATING_INDEPENDENT (uint32_t)0x00000000 /!< Update done independently from the DMA burst transfer completion /
mbed_official	125:23cc3068a9e4	683	#define HRTIM_UPDATEGATING_DMABURST (HRTIM_TIMCR_UPDGAT_0) /!< Update done when the DMA burst transfer is completed /
mbed_official	125:23cc3068a9e4	684	#define HRTIM_UPDATEGATING_DMABURST_UPDATE (HRTIM_TIMCR_UPDGAT_1) /!< Update done on timer roll-over following a DMA burst transfer completion/
mbed_official	125:23cc3068a9e4	685	#define HRTIM_UPDATEGATING_UPDEN1 (HRTIM_TIMCR_UPDGAT_1 \| HRTIM_TIMCR_UPDGAT_0) /!< Slave timer only - Update done on a rising edge of HRTIM update enable input 1 /
mbed_official	125:23cc3068a9e4	686	#define HRTIM_UPDATEGATING_UPDEN2 (HRTIM_TIMCR_UPDGAT_2) /!< Slave timer only - Update done on a rising edge of HRTIM update enable input 2 /
mbed_official	125:23cc3068a9e4	687	#define HRTIM_UPDATEGATING_UPDEN3 (HRTIM_TIMCR_UPDGAT_2 \| HRTIM_TIMCR_UPDGAT_0) /!< Slave timer only - Update done on a rising edge of HRTIM update enable input 3 /
mbed_official	125:23cc3068a9e4	688	#define HRTIM_UPDATEGATING_UPDEN1_UPDATE (HRTIM_TIMCR_UPDGAT_2 \| HRTIM_TIMCR_UPDGAT_1) /!< Slave timer only - Update done on the update event following a rising edge of HRTIM update enable input 1 /
mbed_official	125:23cc3068a9e4	689	#define HRTIM_UPDATEGATING_UPDEN2_UPDATE (HRTIM_TIMCR_UPDGAT_2 \| HRTIM_TIMCR_UPDGAT_1 \| HRTIM_TIMCR_UPDGAT_0) /!< Slave timer only - Update done on the update event following a rising edge of HRTIM update enable input 2 /
mbed_official	125:23cc3068a9e4	690	#define HRTIM_UPDATEGATING_UPDEN3_UPDATE (HRTIM_TIMCR_UPDGAT_3) /!< Slave timer only - Update done on the update event following a rising edge of HRTIM update enable input 3 /
mbed_official	125:23cc3068a9e4	691
mbed_official	125:23cc3068a9e4	692	#define IS_HRTIM_UPDATEGATING_MASTER(UPDATEGATING)\
mbed_official	125:23cc3068a9e4	693	(((UPDATEGATING) == HRTIM_UPDATEGATING_INDEPENDENT) \|\| \
mbed_official	125:23cc3068a9e4	694	((UPDATEGATING) == HRTIM_UPDATEGATING_DMABURST) \|\| \
mbed_official	125:23cc3068a9e4	695	((UPDATEGATING) == HRTIM_UPDATEGATING_DMABURST_UPDATE))
mbed_official	125:23cc3068a9e4	696
mbed_official	125:23cc3068a9e4	697	#define IS_HRTIM_UPDATEGATING_TIM(UPDATEGATING)\
mbed_official	125:23cc3068a9e4	698	(((UPDATEGATING) == HRTIM_UPDATEGATING_INDEPENDENT) \|\| \
mbed_official	125:23cc3068a9e4	699	((UPDATEGATING) == HRTIM_UPDATEGATING_DMABURST) \|\| \
mbed_official	125:23cc3068a9e4	700	((UPDATEGATING) == HRTIM_UPDATEGATING_DMABURST_UPDATE) \|\| \
mbed_official	125:23cc3068a9e4	701	((UPDATEGATING) == HRTIM_UPDATEGATING_UPDEN1) \|\| \
mbed_official	125:23cc3068a9e4	702	((UPDATEGATING) == HRTIM_UPDATEGATING_UPDEN2) \|\| \
mbed_official	125:23cc3068a9e4	703	((UPDATEGATING) == HRTIM_UPDATEGATING_UPDEN3) \|\| \
mbed_official	125:23cc3068a9e4	704	((UPDATEGATING) == HRTIM_UPDATEGATING_UPDEN1_UPDATE) \|\| \
mbed_official	125:23cc3068a9e4	705	((UPDATEGATING) == HRTIM_UPDATEGATING_UPDEN2_UPDATE) \|\| \
mbed_official	125:23cc3068a9e4	706	((UPDATEGATING) == HRTIM_UPDATEGATING_UPDEN3_UPDATE))
mbed_official	125:23cc3068a9e4	707	/**
mbed_official	125:23cc3068a9e4	708	* @}
mbed_official	125:23cc3068a9e4	709	*/
mbed_official	125:23cc3068a9e4	710
mbed_official	125:23cc3068a9e4	711	/** @defgroup HRTIM_TimerBurstMode
mbed_official	125:23cc3068a9e4	712	* @{
mbed_official	125:23cc3068a9e4	713	* @brief Constants defining how the timer behaves during a burst
mbed_official	125:23cc3068a9e4	714	mode operation.
mbed_official	125:23cc3068a9e4	715	*/
mbed_official	125:23cc3068a9e4	716	#define HRTIM_TIMERBURSTMODE_MAINTAINCLOCK (uint32_t)0x000000 /!< Timer counter clock is maintained and the timer operates normally /
mbed_official	125:23cc3068a9e4	717	#define HRTIM_TIMERBURSTMODE_RESETCOUNTER (HRTIM_BMCR_MTBM) /!< Timer counter clock is stopped and the counter is reset /
mbed_official	125:23cc3068a9e4	718
mbed_official	125:23cc3068a9e4	719	#define IS_HRTIM_TIMERBURSTMODE(TIMERBURSTMODE) \
mbed_official	125:23cc3068a9e4	720	(((TIMERBURSTMODE) == HRTIM_TIMERBURSTMODE_MAINTAINCLOCK) \|\| \
mbed_official	125:23cc3068a9e4	721	((TIMERBURSTMODE) == HRTIM_TIMERBURSTMODE_RESETCOUNTER))
mbed_official	125:23cc3068a9e4	722	/**
mbed_official	125:23cc3068a9e4	723	* @}
mbed_official	125:23cc3068a9e4	724	*/
mbed_official	125:23cc3068a9e4	725
mbed_official	125:23cc3068a9e4	726	/** @defgroup HRTIM_TimerRepetitionUpdate
mbed_official	125:23cc3068a9e4	727	* @{
mbed_official	125:23cc3068a9e4	728	* @brief Constants defining whether registers are updated when the timer
mbed_official	125:23cc3068a9e4	729	* repetition period is completed (either due to roll-over or
mbed_official	125:23cc3068a9e4	730	* reset events)
mbed_official	125:23cc3068a9e4	731	*/
mbed_official	125:23cc3068a9e4	732	#define HRTIM_UPDATEONREPETITION_DISABLED (uint32_t)0x00000000 /!< Update on repetition disabled /
mbed_official	125:23cc3068a9e4	733	#define HRTIM_UPDATEONREPETITION_ENABLED (HRTIM_MCR_MREPU) /!< Update on repetition enabled /
mbed_official	125:23cc3068a9e4	734
mbed_official	125:23cc3068a9e4	735	#define IS_HRTIM_UPDATEONREPETITION(UPDATEONREPETITION) \
mbed_official	125:23cc3068a9e4	736	(((UPDATEONREPETITION) == HRTIM_UPDATEONREPETITION_DISABLED) \|\| \
mbed_official	125:23cc3068a9e4	737	((UPDATEONREPETITION) == HRTIM_UPDATEONREPETITION_ENABLED))
mbed_official	125:23cc3068a9e4	738	/**
mbed_official	125:23cc3068a9e4	739	* @}
mbed_official	125:23cc3068a9e4	740	*/
mbed_official	125:23cc3068a9e4	741
mbed_official	125:23cc3068a9e4	742
mbed_official	125:23cc3068a9e4	743	/** @defgroup HRTIM_TimerPushPullMode
mbed_official	125:23cc3068a9e4	744	* @{
mbed_official	125:23cc3068a9e4	745	* @brief Constants defining whether or not the push-pull mode is enabled for
mbed_official	125:23cc3068a9e4	746	* a timer.
mbed_official	125:23cc3068a9e4	747	*/
mbed_official	125:23cc3068a9e4	748	#define HRTIM_TIMPUSHPULLMODE_DISABLED ((uint32_t)0x00000000) /!< Push-Pull mode disabled /
mbed_official	125:23cc3068a9e4	749	#define HRTIM_TIMPUSHPULLMODE_ENABLED ((uint32_t)HRTIM_TIMCR_PSHPLL) /!< Push-Pull mode enabled /
mbed_official	125:23cc3068a9e4	750
mbed_official	125:23cc3068a9e4	751	#define IS_HRTIM_TIMPUSHPULLMODE(TIMPUSHPULLMODE)\
mbed_official	125:23cc3068a9e4	752	(((TIMPUSHPULLMODE) == HRTIM_TIMPUSHPULLMODE_DISABLED) \|\| \
mbed_official	125:23cc3068a9e4	753	((TIMPUSHPULLMODE) == HRTIM_TIMPUSHPULLMODE_ENABLED))
mbed_official	125:23cc3068a9e4	754	/**
mbed_official	125:23cc3068a9e4	755	* @}
mbed_official	125:23cc3068a9e4	756	*/
mbed_official	125:23cc3068a9e4	757
mbed_official	125:23cc3068a9e4	758	/** @defgroup HRTIM_TimerFaultEnabling
mbed_official	125:23cc3068a9e4	759	* @{
mbed_official	125:23cc3068a9e4	760	* @brief Constants defining whether a faut channel is enabled for a timer
mbed_official	125:23cc3068a9e4	761	*/
mbed_official	125:23cc3068a9e4	762	#define HRTIM_TIMFAULTENABLE_NONE (uint32_t)0x00000000 /!< No fault enabled /
mbed_official	125:23cc3068a9e4	763	#define HRTIM_TIMFAULTENABLE_FAULT1 (HRTIM_FLTR_FLT1EN) /!< Fault 1 enabled /
mbed_official	125:23cc3068a9e4	764	#define HRTIM_TIMFAULTENABLE_FAULT2 (HRTIM_FLTR_FLT2EN) /!< Fault 2 enabled /
mbed_official	125:23cc3068a9e4	765	#define HRTIM_TIMFAULTENABLE_FAULT3 (HRTIM_FLTR_FLT3EN) /!< Fault 3 enabled /
mbed_official	125:23cc3068a9e4	766	#define HRTIM_TIMFAULTENABLE_FAULT4 (HRTIM_FLTR_FLT4EN) /!< Fault 4 enabled /
mbed_official	125:23cc3068a9e4	767	#define HRTIM_TIMFAULTENABLE_FAULT5 (HRTIM_FLTR_FLT5EN) /!< Fault 5 enabled /
mbed_official	125:23cc3068a9e4	768
mbed_official	125:23cc3068a9e4	769	#define IS_HRTIM_TIMFAULTENABLE(TIMFAULTENABLE) (((TIMFAULTENABLE) & 0xFFFFFFE0) == 0x00000000)
mbed_official	125:23cc3068a9e4	770
mbed_official	125:23cc3068a9e4	771	/**
mbed_official	125:23cc3068a9e4	772	* @}
mbed_official	125:23cc3068a9e4	773	*/
mbed_official	125:23cc3068a9e4	774
mbed_official	125:23cc3068a9e4	775	/** @defgroup HRTIM_TimerFaultLock
mbed_official	125:23cc3068a9e4	776	* @{
mbed_official	125:23cc3068a9e4	777	* @brief Constants defining whether or not fault enabling bits are write
mbed_official	125:23cc3068a9e4	778	* protected for a timer
mbed_official	125:23cc3068a9e4	779	*/
mbed_official	125:23cc3068a9e4	780	#define HRTIM_TIMFAULTLOCK_READWRITE ((uint32_t)0x00000000) /!< Timer fault enabling bits are read/write /
mbed_official	125:23cc3068a9e4	781	#define HRTIM_TIMFAULTLOCK_READONLY (HRTIM_FLTR_FLTCLK) /!< Timer fault enabling bits are read only /
mbed_official	125:23cc3068a9e4	782
mbed_official	125:23cc3068a9e4	783	#define IS_HRTIM_TIMFAULTLOCK(TIMFAULTLOCK)\
mbed_official	125:23cc3068a9e4	784	(((TIMFAULTLOCK) == HRTIM_TIMFAULTLOCK_READWRITE) \|\| \
mbed_official	125:23cc3068a9e4	785	((TIMFAULTLOCK) == HRTIM_TIMFAULTLOCK_READONLY))
mbed_official	125:23cc3068a9e4	786	/**
mbed_official	125:23cc3068a9e4	787	* @}
mbed_official	125:23cc3068a9e4	788	*/
mbed_official	125:23cc3068a9e4	789
mbed_official	125:23cc3068a9e4	790	/** @defgroup HRTIM_TimerDeadtimeInsertion
mbed_official	125:23cc3068a9e4	791	* @{
mbed_official	125:23cc3068a9e4	792	* @brief Constants defining whether or not fault the dead time insertion
mbed_official	125:23cc3068a9e4	793	* feature is enabled for a timer
mbed_official	125:23cc3068a9e4	794	*/
mbed_official	125:23cc3068a9e4	795	#define HRTIM_TIMDEADTIMEINSERTION_DISABLED ((uint32_t)0x00000000) /!< Output 1 and output 2 signals are independent /
mbed_official	125:23cc3068a9e4	796	#define HRTIM_TIMDEADTIMEINSERTION_ENABLED HRTIM_OUTR_DTEN /!< Deadtime is inserted between output 1 and output 2 /
mbed_official	125:23cc3068a9e4	797
mbed_official	125:23cc3068a9e4	798	#define IS_HRTIM_TIMDEADTIMEINSERTION(TIMDEADTIMEINSERTION)\
mbed_official	125:23cc3068a9e4	799	(((TIMDEADTIMEINSERTION) == HRTIM_TIMDEADTIMEINSERTION_DISABLED) \|\| \
mbed_official	125:23cc3068a9e4	800	((TIMDEADTIMEINSERTION) == HRTIM_TIMDEADTIMEINSERTION_ENABLED))
mbed_official	125:23cc3068a9e4	801	/**
mbed_official	125:23cc3068a9e4	802	* @}
mbed_official	125:23cc3068a9e4	803	*/
mbed_official	125:23cc3068a9e4	804
mbed_official	125:23cc3068a9e4	805	/** @defgroup HRTIM_TimerDelayedProtectionMode
mbed_official	125:23cc3068a9e4	806	* @{
mbed_official	125:23cc3068a9e4	807	* @brief Constants defining all possible delayed protection modes
mbed_official	125:23cc3068a9e4	808	* for a timer. Also define the source and outputs on which the delayed
mbed_official	125:23cc3068a9e4	809	* protection schemes are applied
mbed_official	125:23cc3068a9e4	810	*/
mbed_official	125:23cc3068a9e4	811	#define HRTIM_TIMDELAYEDPROTECTION_DISABLED ((uint32_t)0x00000000) /!< No action /
mbed_official	125:23cc3068a9e4	812	#define HRTIM_TIMDELAYEDPROTECTION_DELAYEDOUT1_EEV68 (HRTIM_OUTR_DLYPRTEN) /!< Output 1 delayed Idle on external Event 6 or 8 /
mbed_official	125:23cc3068a9e4	813	#define HRTIM_TIMDELAYEDPROTECTION_DELAYEDOUT2_EEV68 (HRTIM_OUTR_DLYPRT_0 \| HRTIM_OUTR_DLYPRTEN) /!< Output 2 delayed Idle on external Event 6 or 8 /
mbed_official	125:23cc3068a9e4	814	#define HRTIM_TIMDELAYEDPROTECTION_DELAYEDBOTH_EEV68 (HRTIM_OUTR_DLYPRT_1 \| HRTIM_OUTR_DLYPRTEN) /!< Output 1 and output 2 delayed Idle on external Event 6 or 8 /
mbed_official	125:23cc3068a9e4	815	#define HRTIM_TIMDELAYEDPROTECTION_BALANCED_EEV68 (HRTIM_OUTR_DLYPRT_1 \| HRTIM_OUTR_DLYPRT_0 \| HRTIM_OUTR_DLYPRTEN) /!< Balanced Idle on external Event 6 or 8 /
mbed_official	125:23cc3068a9e4	816	#define HRTIM_TIMDELAYEDPROTECTION_DELAYEDOUT1_DEEV79 (HRTIM_OUTR_DLYPRT_2 \| HRTIM_OUTR_DLYPRTEN) /!< Output 1 delayed Idle on external Event 7 or 9 /
mbed_official	125:23cc3068a9e4	817	#define HRTIM_TIMDELAYEDPROTECTION_DELAYEDOUT2_DEEV79 (HRTIM_OUTR_DLYPRT_2 \| HRTIM_OUTR_DLYPRT_0 \| HRTIM_OUTR_DLYPRTEN) /!< Output 2 delayed Idle on external Event 7 or 9 /
mbed_official	125:23cc3068a9e4	818	#define HRTIM_TIMDELAYEDPROTECTION_DELAYEDBOTH_EEV79 (HRTIM_OUTR_DLYPRT_2 \| HRTIM_OUTR_DLYPRT_1 \| HRTIM_OUTR_DLYPRTEN) /!< Output 1 and output2 delayed Idle on external Event 7 or 9 /
mbed_official	125:23cc3068a9e4	819	#define HRTIM_TIMDELAYEDPROTECTION_BALANCED_EEV79 (HRTIM_OUTR_DLYPRT_2 \| HRTIM_OUTR_DLYPRT_1 \| HRTIM_OUTR_DLYPRT_0 \| HRTIM_OUTR_DLYPRTEN) /!< Balanced Idle on external Event 7 or 9 /
mbed_official	125:23cc3068a9e4	820
mbed_official	125:23cc3068a9e4	821	#define IS_HRTIM_TIMDELAYEDPROTECTION(TIMDELAYEDPROTECTION)\
mbed_official	125:23cc3068a9e4	822	(((TIMDELAYEDPROTECTION) == HRTIM_TIMDELAYEDPROTECTION_DISABLED) \|\| \
mbed_official	125:23cc3068a9e4	823	((TIMDELAYEDPROTECTION) == HRTIM_TIMDELAYEDPROTECTION_DELAYEDOUT1_EEV68) \|\| \
mbed_official	125:23cc3068a9e4	824	((TIMDELAYEDPROTECTION) == HRTIM_TIMDELAYEDPROTECTION_DELAYEDOUT2_EEV68) \|\| \
mbed_official	125:23cc3068a9e4	825	((TIMDELAYEDPROTECTION) == HRTIM_TIMDELAYEDPROTECTION_DELAYEDBOTH_EEV68) \|\| \
mbed_official	125:23cc3068a9e4	826	((TIMDELAYEDPROTECTION) == HRTIM_TIMDELAYEDPROTECTION_BALANCED_EEV68) \|\| \
mbed_official	125:23cc3068a9e4	827	((TIMDELAYEDPROTECTION) == HRTIM_TIMDELAYEDPROTECTION_DELAYEDOUT1_DEEV79) \|\| \
mbed_official	125:23cc3068a9e4	828	((TIMDELAYEDPROTECTION) == HRTIM_TIMDELAYEDPROTECTION_DELAYEDOUT2_DEEV79) \|\| \
mbed_official	125:23cc3068a9e4	829	((TIMDELAYEDPROTECTION) == HRTIM_TIMDELAYEDPROTECTION_DELAYEDBOTH_EEV79) \|\| \
mbed_official	125:23cc3068a9e4	830	((TIMDELAYEDPROTECTION) == HRTIM_TIMDELAYEDPROTECTION_BALANCED_EEV79))
mbed_official	125:23cc3068a9e4	831	/**
mbed_official	125:23cc3068a9e4	832	* @}
mbed_official	125:23cc3068a9e4	833	*/
mbed_official	125:23cc3068a9e4	834
mbed_official	125:23cc3068a9e4	835	/** @defgroup HRTIM_TimerUpdateTrigger
mbed_official	125:23cc3068a9e4	836	* @{
mbed_official	125:23cc3068a9e4	837	* @brief Constants defining whether the registers update is done synchronously
mbed_official	125:23cc3068a9e4	838	* with any other timer or master update
mbed_official	125:23cc3068a9e4	839	*/
mbed_official	125:23cc3068a9e4	840	#define HRTIM_TIMUPDATETRIGGER_NONE (uint32_t)0x00000000 /!< Register update is disabled /
mbed_official	125:23cc3068a9e4	841	#define HRTIM_TIMUPDATETRIGGER_MASTER (HRTIM_TIMCR_MSTU) /!< Register update is triggered by the master timer update /
mbed_official	125:23cc3068a9e4	842	#define HRTIM_TIMUPDATETRIGGER_TIMER_A (HRTIM_TIMCR_TAU) /!< Register update is triggered by the timer A update /
mbed_official	125:23cc3068a9e4	843	#define HRTIM_TIMUPDATETRIGGER_TIMER_B (HRTIM_TIMCR_TBU) /!< Register update is triggered by the timer B update /
mbed_official	125:23cc3068a9e4	844	#define HRTIM_TIMUPDATETRIGGER_TIMER_C (HRTIM_TIMCR_TCU) /!< Register update is triggered by the timer C update/
mbed_official	125:23cc3068a9e4	845	#define HRTIM_TIMUPDATETRIGGER_TIMER_D (HRTIM_TIMCR_TDU) /!< Register update is triggered by the timer D update /
mbed_official	125:23cc3068a9e4	846	#define HRTIM_TIMUPDATETRIGGER_TIMER_E (HRTIM_TIMCR_TEU) /!< Register update is triggered by the timer E update /
mbed_official	125:23cc3068a9e4	847
mbed_official	125:23cc3068a9e4	848	#define IS_HRTIM_TIMUPDATETRIGGER(TIMUPDATETRIGGER) (((TIMUPDATETRIGGER) & 0xFE07FFFF) == 0x00000000)
mbed_official	125:23cc3068a9e4	849	/**
mbed_official	125:23cc3068a9e4	850	* @}
mbed_official	125:23cc3068a9e4	851	*/
mbed_official	125:23cc3068a9e4	852
mbed_official	125:23cc3068a9e4	853	/** @defgroup HRTIM_TimerResetTrigger
mbed_official	125:23cc3068a9e4	854	* @{
mbed_official	125:23cc3068a9e4	855	* @brief Constants defining the events that can be selected to trigger the reset
mbed_official	125:23cc3068a9e4	856	* of the timer counter
mbed_official	125:23cc3068a9e4	857	*/
mbed_official	125:23cc3068a9e4	858	#define HRTIM_TIMRESETTRIGGER_NONE (uint32_t)0x00000000 /!< No counter reset trigger /
mbed_official	125:23cc3068a9e4	859	#define HRTIM_TIMRESETTRIGGER_UPDATE (HRTIM_RSTR_UPDATE) /!< The timer counter is reset upon update event /
mbed_official	125:23cc3068a9e4	860	#define HRTIM_TIMRESETTRIGGER_CMP2 (HRTIM_RSTR_CMP2) /!< The timer counter is reset upon Timer Compare 2 event /
mbed_official	125:23cc3068a9e4	861	#define HRTIM_TIMRESETTRIGGER_CMP4 (HRTIM_RSTR_CMP4) /!< The timer counter is reset upon Timer Compare 4 event /
mbed_official	125:23cc3068a9e4	862	#define HRTIM_TIMRESETTRIGGER_MASTER_PER (HRTIM_RSTR_MSTPER) /!< The timer counter is reset upon master timer period event /
mbed_official	125:23cc3068a9e4	863	#define HRTIM_TIMRESETTRIGGER_MASTER_CMP1 (HRTIM_RSTR_MSTCMP1) /!< The timer counter is reset upon master timer Compare 1 event /
mbed_official	125:23cc3068a9e4	864	#define HRTIM_TIMRESETTRIGGER_MASTER_CMP2 (HRTIM_RSTR_MSTCMP2) /!< The timer counter is reset upon master timer Compare 2 event /
mbed_official	125:23cc3068a9e4	865	#define HRTIM_TIMRESETTRIGGER_MASTER_CMP3 (HRTIM_RSTR_MSTCMP3) /!< The timer counter is reset upon master timer Compare 3 event /
mbed_official	125:23cc3068a9e4	866	#define HRTIM_TIMRESETTRIGGER_MASTER_CMP4 (HRTIM_RSTR_MSTCMP4) /!< The timer counter is reset upon master timer Compare 4 event /
mbed_official	125:23cc3068a9e4	867	#define HRTIM_TIMRESETTRIGGER_EEV_1 (HRTIM_RSTR_EXTEVNT1) /!< The timer counter is reset upon external event 1 /
mbed_official	125:23cc3068a9e4	868	#define HRTIM_TIMRESETTRIGGER_EEV_2 (HRTIM_RSTR_EXTEVNT2) /!< The timer counter is reset upon external event 2 /
mbed_official	125:23cc3068a9e4	869	#define HRTIM_TIMRESETTRIGGER_EEV_3 (HRTIM_RSTR_EXTEVNT3) /!< The timer counter is reset upon external event 3 /
mbed_official	125:23cc3068a9e4	870	#define HRTIM_TIMRESETTRIGGER_EEV_4 (HRTIM_RSTR_EXTEVNT4) /!< The timer counter is reset upon external event 4 /
mbed_official	125:23cc3068a9e4	871	#define HRTIM_TIMRESETTRIGGER_EEV_5 (HRTIM_RSTR_EXTEVNT5) /!< The timer counter is reset upon external event 5 /
mbed_official	125:23cc3068a9e4	872	#define HRTIM_TIMRESETTRIGGER_EEV_6 (HRTIM_RSTR_EXTEVNT6) /!< The timer counter is reset upon external event 6 /
mbed_official	125:23cc3068a9e4	873	#define HRTIM_TIMRESETTRIGGER_EEV_7 (HRTIM_RSTR_EXTEVNT7) /!< The timer counter is reset upon external event 7 /
mbed_official	125:23cc3068a9e4	874	#define HRTIM_TIMRESETTRIGGER_EEV_8 (HRTIM_RSTR_EXTEVNT8) /!< The timer counter is reset upon external event 8 /
mbed_official	125:23cc3068a9e4	875	#define HRTIM_TIMRESETTRIGGER_EEV_9 (HRTIM_RSTR_EXTEVNT9) /!< The timer counter is reset upon external event 9 /
mbed_official	125:23cc3068a9e4	876	#define HRTIM_TIMRESETTRIGGER_EEV_10 (HRTIM_RSTR_EXTEVNT10) /!< The timer counter is reset upon external event 10 /
mbed_official	125:23cc3068a9e4	877	#define HRTIM_TIMRESETTRIGGER_OTHER1_CMP1 (HRTIM_RSTR_TIMBCMP1) /!< The timer counter is reset upon other timer Compare 1 event /
mbed_official	125:23cc3068a9e4	878	#define HRTIM_TIMRESETTRIGGER_OTHER1_CMP2 (HRTIM_RSTR_TIMBCMP2) /!< The timer counter is reset upon other timer Compare 2 event /
mbed_official	125:23cc3068a9e4	879	#define HRTIM_TIMRESETTRIGGER_OTHER1_CMP4 (HRTIM_RSTR_TIMBCMP4) /!< The timer counter is reset upon other timer Compare 4 event /
mbed_official	125:23cc3068a9e4	880	#define HRTIM_TIMRESETTRIGGER_OTHER2_CMP1 (HRTIM_RSTR_TIMCCMP1) /!< The timer counter is reset upon other timer Compare 1 event /
mbed_official	125:23cc3068a9e4	881	#define HRTIM_TIMRESETTRIGGER_OTHER2_CMP2 (HRTIM_RSTR_TIMCCMP2) /!< The timer counter is reset upon other timer Compare 2 event /
mbed_official	125:23cc3068a9e4	882	#define HRTIM_TIMRESETTRIGGER_OTHER2_CMP4 (HRTIM_RSTR_TIMCCMP4) /!< The timer counter is reset upon other timer Compare 4 event /
mbed_official	125:23cc3068a9e4	883	#define HRTIM_TIMRESETTRIGGER_OTHER3_CMP1 (HRTIM_RSTR_TIMDCMP1) /!< The timer counter is reset upon other timer Compare 1 event /
mbed_official	125:23cc3068a9e4	884	#define HRTIM_TIMRESETTRIGGER_OTHER3_CMP2 (HRTIM_RSTR_TIMDCMP2) /!< The timer counter is reset upon other timer Compare 2 event /
mbed_official	125:23cc3068a9e4	885	#define HRTIM_TIMRESETTRIGGER_OTHER3_CMP4 (HRTIM_RSTR_TIMDCMP4) /!< The timer counter is reset upon other timer Compare 4 event /
mbed_official	125:23cc3068a9e4	886	#define HRTIM_TIMRESETTRIGGER_OTHER4_CMP1 (HRTIM_RSTR_TIMECMP1) /!< The timer counter is reset upon other timer Compare 1 event /
mbed_official	125:23cc3068a9e4	887	#define HRTIM_TIMRESETTRIGGER_OTHER4_CMP2 (HRTIM_RSTR_TIMECMP2) /!< The timer counter is reset upon other timer Compare 2 event /
mbed_official	125:23cc3068a9e4	888	#define HRTIM_TIMRESETTRIGGER_OTHER4_CMP4 (HRTIM_RSTR_TIMECMP4) /!< The timer counter is reset upon other timer Compare 4 event /
mbed_official	125:23cc3068a9e4	889
mbed_official	125:23cc3068a9e4	890	#define IS_HRTIM_TIMRESETTRIGGER(TIMRESETTRIGGER) (((TIMRESETTRIGGER) & 0x800000001) == 0x00000000)
mbed_official	125:23cc3068a9e4	891
mbed_official	125:23cc3068a9e4	892	/**
mbed_official	125:23cc3068a9e4	893	* @}
mbed_official	125:23cc3068a9e4	894	*/
mbed_official	125:23cc3068a9e4	895
mbed_official	125:23cc3068a9e4	896	/** @defgroup HRTIM_TimerResetUpdate
mbed_official	125:23cc3068a9e4	897	* @{
mbed_official	125:23cc3068a9e4	898	* @brief Constants defining whether the register are updated upon Timerx
mbed_official	125:23cc3068a9e4	899	* counter reset or rollover to 0 after reaching the period value
mbed_official	125:23cc3068a9e4	900	* in continuous mode
mbed_official	125:23cc3068a9e4	901	*/
mbed_official	125:23cc3068a9e4	902	#define HRTIM_TIMUPDATEONRESET_DISABLED (uint32_t)0x00000000 /!< Update by timer x reset / rollover disabled /
mbed_official	125:23cc3068a9e4	903	#define HRTIM_TIMUPDATEONRESET_ENABLED (HRTIM_TIMCR_TRSTU) /!< Update by timer x reset / rollover enabled /
mbed_official	125:23cc3068a9e4	904
mbed_official	125:23cc3068a9e4	905	#define IS_HRTIM_TIMUPDATEONRESET(TIMUPDATEONRESET) \
mbed_official	125:23cc3068a9e4	906	(((TIMUPDATEONRESET) == HRTIM_TIMUPDATEONRESET_DISABLED) \|\| \
mbed_official	125:23cc3068a9e4	907	((TIMUPDATEONRESET) == HRTIM_TIMUPDATEONRESET_ENABLED))
mbed_official	125:23cc3068a9e4	908	/**
mbed_official	125:23cc3068a9e4	909	* @}
mbed_official	125:23cc3068a9e4	910	*/
mbed_official	125:23cc3068a9e4	911
mbed_official	125:23cc3068a9e4	912	/** @defgroup HRTIM_CompareUnitAutoDelayedMode
mbed_official	125:23cc3068a9e4	913	* @{
mbed_official	125:23cc3068a9e4	914	* @brief Constants defining whether the compare register is behaving in
mbed_official	125:23cc3068a9e4	915	* regular mode (compare match issued as soon as counter equal compare),
mbed_official	125:23cc3068a9e4	916	* or in auto-delayed mode
mbed_official	125:23cc3068a9e4	917	*/
mbed_official	125:23cc3068a9e4	918	#define HRTIM_AUTODELAYEDMODE_REGULAR ((uint32_t)0x00000000) /!< standard compare mode /
mbed_official	125:23cc3068a9e4	919	#define HRTIM_AUTODELAYEDMODE_AUTODELAYED_NOTIMEOUT (HRTIM_TIMCR_DELCMP2_0) /!< Compare event generated only if a capture has occured /
mbed_official	125:23cc3068a9e4	920	#define HRTIM_AUTODELAYEDMODE_AUTODELAYED_TIMEOUTCMP1 (HRTIM_TIMCR_DELCMP2_1) /!< Compare event generated if a capture has occurred or after a Compare 1 match (timeout if capture event is missing) /
mbed_official	125:23cc3068a9e4	921	#define HRTIM_AUTODELAYEDMODE_AUTODELAYED_TIMEOUTCMP3 (HRTIM_TIMCR_DELCMP2_1 \| HRTIM_TIMCR_DELCMP2_0) /!< Compare event generated if a capture has occurred or after a Compare 3 match (timeout if capture event is missing) /
mbed_official	125:23cc3068a9e4	922
mbed_official	125:23cc3068a9e4	923	#define IS_HRTIM_AUTODELAYEDMODE(AUTODELAYEDMODE)\
mbed_official	125:23cc3068a9e4	924	(((AUTODELAYEDMODE) == HRTIM_AUTODELAYEDMODE_REGULAR) \|\| \
mbed_official	125:23cc3068a9e4	925	((AUTODELAYEDMODE) == HRTIM_AUTODELAYEDMODE_AUTODELAYED_NOTIMEOUT) \|\| \
mbed_official	125:23cc3068a9e4	926	((AUTODELAYEDMODE) == HRTIM_AUTODELAYEDMODE_AUTODELAYED_TIMEOUTCMP1) \|\| \
mbed_official	125:23cc3068a9e4	927	((AUTODELAYEDMODE) == HRTIM_AUTODELAYEDMODE_AUTODELAYED_TIMEOUTCMP3))
mbed_official	125:23cc3068a9e4	928
mbed_official	125:23cc3068a9e4	929	/* Auto delayed mode is only available for compare units 2 and 4 */
mbed_official	125:23cc3068a9e4	930	#define IS_HRTIM_COMPAREUNIT_AUTODELAYEDMODE(COMPAREUNIT, AUTODELAYEDMODE) \
mbed_official	125:23cc3068a9e4	931	((((COMPAREUNIT) == HRTIM_COMPAREUNIT_1) && \
mbed_official	125:23cc3068a9e4	932	((AUTODELAYEDMODE) == HRTIM_AUTODELAYEDMODE_REGULAR)) \
mbed_official	125:23cc3068a9e4	933	\|\| \
mbed_official	125:23cc3068a9e4	934	(((COMPAREUNIT) == HRTIM_COMPAREUNIT_2) && \
mbed_official	125:23cc3068a9e4	935	(((AUTODELAYEDMODE) == HRTIM_AUTODELAYEDMODE_REGULAR) \|\| \
mbed_official	125:23cc3068a9e4	936	((AUTODELAYEDMODE) == HRTIM_AUTODELAYEDMODE_AUTODELAYED_NOTIMEOUT) \|\| \
mbed_official	125:23cc3068a9e4	937	((AUTODELAYEDMODE) == HRTIM_AUTODELAYEDMODE_AUTODELAYED_TIMEOUTCMP1) \|\| \
mbed_official	125:23cc3068a9e4	938	((AUTODELAYEDMODE) == HRTIM_AUTODELAYEDMODE_AUTODELAYED_TIMEOUTCMP3))) \
mbed_official	125:23cc3068a9e4	939	\|\| \
mbed_official	125:23cc3068a9e4	940	(((COMPAREUNIT) == HRTIM_COMPAREUNIT_3) && \
mbed_official	125:23cc3068a9e4	941	((AUTODELAYEDMODE) == HRTIM_AUTODELAYEDMODE_REGULAR)) \
mbed_official	125:23cc3068a9e4	942	\|\| \
mbed_official	125:23cc3068a9e4	943	(((COMPAREUNIT) == HRTIM_COMPAREUNIT_4) && \
mbed_official	125:23cc3068a9e4	944	(((AUTODELAYEDMODE) == HRTIM_AUTODELAYEDMODE_REGULAR) \|\| \
mbed_official	125:23cc3068a9e4	945	((AUTODELAYEDMODE) == HRTIM_AUTODELAYEDMODE_AUTODELAYED_NOTIMEOUT) \|\| \
mbed_official	125:23cc3068a9e4	946	((AUTODELAYEDMODE) == HRTIM_AUTODELAYEDMODE_AUTODELAYED_TIMEOUTCMP1) \|\| \
mbed_official	125:23cc3068a9e4	947	((AUTODELAYEDMODE) == HRTIM_AUTODELAYEDMODE_AUTODELAYED_TIMEOUTCMP3))))
mbed_official	125:23cc3068a9e4	948	/**
mbed_official	125:23cc3068a9e4	949	* @}
mbed_official	125:23cc3068a9e4	950	*/
mbed_official	125:23cc3068a9e4	951
mbed_official	125:23cc3068a9e4	952	/** @defgroup HRTIM_BasicOCMode
mbed_official	125:23cc3068a9e4	953	* @{
mbed_official	125:23cc3068a9e4	954	* @brief Constants defining the behavior of the output signal when the timer
mbed_official	125:23cc3068a9e4	955	operates in basic output compare mode
mbed_official	125:23cc3068a9e4	956	*/
mbed_official	125:23cc3068a9e4	957	#define HRTIM_BASICOCMODE_TOGGLE ((uint32_t)0x00000001) /!< Output toggles when the timer counter reaches the compare value /
mbed_official	125:23cc3068a9e4	958	#define HRTIM_BASICOCMODE_INACTIVE ((uint32_t)0x00000002) /!< Output forced to active level when the timer counter reaches the compare value /
mbed_official	125:23cc3068a9e4	959	#define HRTIM_BASICOCMODE_ACTIVE ((uint32_t)0x00000003) /!< Output forced to inactive level when the timer counter reaches the compare value /
mbed_official	125:23cc3068a9e4	960
mbed_official	125:23cc3068a9e4	961	#define IS_HRTIM_BASICOCMODE(BASICOCMODE)\
mbed_official	125:23cc3068a9e4	962	(((BASICOCMODE) == HRTIM_BASICOCMODE_TOGGLE) \|\| \
mbed_official	125:23cc3068a9e4	963	((BASICOCMODE) == HRTIM_BASICOCMODE_INACTIVE) \|\| \
mbed_official	125:23cc3068a9e4	964	((BASICOCMODE) == HRTIM_BASICOCMODE_ACTIVE))
mbed_official	125:23cc3068a9e4	965	/**
mbed_official	125:23cc3068a9e4	966	* @}
mbed_official	125:23cc3068a9e4	967	*/
mbed_official	125:23cc3068a9e4	968
mbed_official	125:23cc3068a9e4	969	/** @defgroup HRTIM_OutputPolarity
mbed_official	125:23cc3068a9e4	970	* @{
mbed_official	125:23cc3068a9e4	971	* @brief Constants defining the polarity of a timer output
mbed_official	125:23cc3068a9e4	972	*/
mbed_official	125:23cc3068a9e4	973	#define HRTIM_OUTPUTPOLARITY_HIGH ((uint32_t)0x00000000) /!< Output is active HIGH /
mbed_official	125:23cc3068a9e4	974	#define HRTIM_OUTPUTPOLARITY_LOW (HRTIM_OUTR_POL1) /!< Output is active LOW /
mbed_official	125:23cc3068a9e4	975
mbed_official	125:23cc3068a9e4	976	#define IS_HRTIM_OUTPUTPOLARITY(OUTPUTPOLARITY)\
mbed_official	125:23cc3068a9e4	977	(((OUTPUTPOLARITY) == HRTIM_OUTPUTPOLARITY_HIGH) \|\| \
mbed_official	125:23cc3068a9e4	978	((OUTPUTPOLARITY) == HRTIM_OUTPUTPOLARITY_LOW))
mbed_official	125:23cc3068a9e4	979	/**
mbed_official	125:23cc3068a9e4	980	* @}
mbed_official	125:23cc3068a9e4	981	*/
mbed_official	125:23cc3068a9e4	982
mbed_official	125:23cc3068a9e4	983	/** @defgroup HRTIM_OutputSetSource
mbed_official	125:23cc3068a9e4	984	* @{
mbed_official	125:23cc3068a9e4	985	* @brief Constants defining the events that can be selected to configure the
mbed_official	125:23cc3068a9e4	986	* set crossbar of a timer output
mbed_official	125:23cc3068a9e4	987	*/
mbed_official	125:23cc3068a9e4	988	#define HRTIM_OUTPUTSET_NONE (uint32_t)0x00000000 /!< Reset the output set crossbar /
mbed_official	125:23cc3068a9e4	989	#define HRTIM_OUTPUTSET_RESYNC (HRTIM_SET1R_RESYNC) /!< Timer reset event coming solely from software or SYNC input forces the output to its active state /
mbed_official	125:23cc3068a9e4	990	#define HRTIM_OUTPUTSET_TIMPER (HRTIM_SET1R_PER) /!< Timer period event forces the output to its active state /
mbed_official	125:23cc3068a9e4	991	#define HRTIM_OUTPUTSET_TIMCMP1 (HRTIM_SET1R_CMP1) /!< Timer compare 1 event forces the output to its active state /
mbed_official	125:23cc3068a9e4	992	#define HRTIM_OUTPUTSET_TIMCMP2 (HRTIM_SET1R_CMP2) /!< Timer compare 2 event forces the output to its active state /
mbed_official	125:23cc3068a9e4	993	#define HRTIM_OUTPUTSET_TIMCMP3 (HRTIM_SET1R_CMP3) /!< Timer compare 3 event forces the output to its active state /
mbed_official	125:23cc3068a9e4	994	#define HRTIM_OUTPUTSET_TIMCMP4 (HRTIM_SET1R_CMP4) /!< Timer compare 4 event forces the output to its active state /
mbed_official	125:23cc3068a9e4	995	#define HRTIM_OUTPUTSET_MASTERPER (HRTIM_SET1R_MSTPER) /!< The master timer period event forces the output to its active state /
mbed_official	125:23cc3068a9e4	996	#define HRTIM_OUTPUTSET_MASTERCMP1 (HRTIM_SET1R_MSTCMP1) /!< Master Timer compare 1 event forces the output to its active state /
mbed_official	125:23cc3068a9e4	997	#define HRTIM_OUTPUTSET_MASTERCMP2 (HRTIM_SET1R_MSTCMP2) /!< Master Timer compare 2 event forces the output to its active state /
mbed_official	125:23cc3068a9e4	998	#define HRTIM_OUTPUTSET_MASTERCMP3 (HRTIM_SET1R_MSTCMP3) /!< Master Timer compare 3 event forces the output to its active state /
mbed_official	125:23cc3068a9e4	999	#define HRTIM_OUTPUTSET_MASTERCMP4 (HRTIM_SET1R_MSTCMP4) /!< Master Timer compare 4 event forces the output to its active state /
mbed_official	125:23cc3068a9e4	1000	#define HRTIM_OUTPUTSET_TIMEV_1 (HRTIM_SET1R_TIMEVNT1) /!< Timer event 1 forces the output to its active state /
mbed_official	125:23cc3068a9e4	1001	#define HRTIM_OUTPUTSET_TIMEV_2 (HRTIM_SET1R_TIMEVNT2) /!< Timer event 2 forces the output to its active state /
mbed_official	125:23cc3068a9e4	1002	#define HRTIM_OUTPUTSET_TIMEV_3 (HRTIM_SET1R_TIMEVNT3) /!< Timer event 3 forces the output to its active state /
mbed_official	125:23cc3068a9e4	1003	#define HRTIM_OUTPUTSET_TIMEV_4 (HRTIM_SET1R_TIMEVNT4) /!< Timer event 4 forces the output to its active state /
mbed_official	125:23cc3068a9e4	1004	#define HRTIM_OUTPUTSET_TIMEV_5 (HRTIM_SET1R_TIMEVNT5) /!< Timer event 5 forces the output to its active state /
mbed_official	125:23cc3068a9e4	1005	#define HRTIM_OUTPUTSET_TIMEV_6 (HRTIM_SET1R_TIMEVNT6) /!< Timer event 6 forces the output to its active state /
mbed_official	125:23cc3068a9e4	1006	#define HRTIM_OUTPUTSET_TIMEV_7 (HRTIM_SET1R_TIMEVNT7) /!< Timer event 7 forces the output to its active state /
mbed_official	125:23cc3068a9e4	1007	#define HRTIM_OUTPUTSET_TIMEV_8 (HRTIM_SET1R_TIMEVNT8) /!< Timer event 8 forces the output to its active state /
mbed_official	125:23cc3068a9e4	1008	#define HRTIM_OUTPUTSET_TIMEV_9 (HRTIM_SET1R_TIMEVNT9) /!< Timer event 9 forces the output to its active state /
mbed_official	125:23cc3068a9e4	1009	#define HRTIM_OUTPUTSET_EEV_1 (HRTIM_SET1R_EXTVNT1) /!< External event 1 forces the output to its active state /
mbed_official	125:23cc3068a9e4	1010	#define HRTIM_OUTPUTSET_EEV_2 (HRTIM_SET1R_EXTVNT2) /!< External event 2 forces the output to its active state /
mbed_official	125:23cc3068a9e4	1011	#define HRTIM_OUTPUTSET_EEV_3 (HRTIM_SET1R_EXTVNT3) /!< External event 3 forces the output to its active state /
mbed_official	125:23cc3068a9e4	1012	#define HRTIM_OUTPUTSET_EEV_4 (HRTIM_SET1R_EXTVNT4) /!< External event 4 forces the output to its active state /
mbed_official	125:23cc3068a9e4	1013	#define HRTIM_OUTPUTSET_EEV_5 (HRTIM_SET1R_EXTVNT5) /!< External event 5 forces the output to its active state /
mbed_official	125:23cc3068a9e4	1014	#define HRTIM_OUTPUTSET_EEV_6 (HRTIM_SET1R_EXTVNT6) /!< External event 6 forces the output to its active state /
mbed_official	125:23cc3068a9e4	1015	#define HRTIM_OUTPUTSET_EEV_7 (HRTIM_SET1R_EXTVNT7) /!< External event 7 forces the output to its active state /
mbed_official	125:23cc3068a9e4	1016	#define HRTIM_OUTPUTSET_EEV_8 (HRTIM_SET1R_EXTVNT8) /!< External event 8 forces the output to its active state /
mbed_official	125:23cc3068a9e4	1017	#define HRTIM_OUTPUTSET_EEV_9 (HRTIM_SET1R_EXTVNT9) /!< External event 9 forces the output to its active state /
mbed_official	125:23cc3068a9e4	1018	#define HRTIM_OUTPUTSET_EEV_10 (HRTIM_SET1R_EXTVNT10) /!< External event 10 forces the output to its active state /
mbed_official	125:23cc3068a9e4	1019	#define HRTIM_OUTPUTSET_UPDATE (HRTIM_SET1R_UPDATE) /!< Timer register update event forces the output to its active state /
mbed_official	125:23cc3068a9e4	1020
mbed_official	125:23cc3068a9e4	1021	#define IS_HRTIM_OUTPUTSET(OUTPUTSET)\
mbed_official	125:23cc3068a9e4	1022	(((OUTPUTSET) == HRTIM_OUTPUTSET_NONE) \|\| \
mbed_official	125:23cc3068a9e4	1023	((OUTPUTSET) == HRTIM_OUTPUTSET_RESYNC) \|\| \
mbed_official	125:23cc3068a9e4	1024	((OUTPUTSET) == HRTIM_OUTPUTSET_TIMPER) \|\| \
mbed_official	125:23cc3068a9e4	1025	((OUTPUTSET) == HRTIM_OUTPUTSET_TIMCMP1) \|\| \
mbed_official	125:23cc3068a9e4	1026	((OUTPUTSET) == HRTIM_OUTPUTSET_TIMCMP2) \|\| \
mbed_official	125:23cc3068a9e4	1027	((OUTPUTSET) == HRTIM_OUTPUTSET_TIMCMP3) \|\| \
mbed_official	125:23cc3068a9e4	1028	((OUTPUTSET) == HRTIM_OUTPUTSET_TIMCMP4) \|\| \
mbed_official	125:23cc3068a9e4	1029	((OUTPUTSET) == HRTIM_OUTPUTSET_MASTERPER) \|\| \
mbed_official	125:23cc3068a9e4	1030	((OUTPUTSET) == HRTIM_OUTPUTSET_MASTERCMP1) \|\| \
mbed_official	125:23cc3068a9e4	1031	((OUTPUTSET) == HRTIM_OUTPUTSET_MASTERCMP2) \|\| \
mbed_official	125:23cc3068a9e4	1032	((OUTPUTSET) == HRTIM_OUTPUTSET_MASTERCMP3) \|\| \
mbed_official	125:23cc3068a9e4	1033	((OUTPUTSET) == HRTIM_OUTPUTSET_MASTERCMP4) \|\| \
mbed_official	125:23cc3068a9e4	1034	((OUTPUTSET) == HRTIM_OUTPUTSET_TIMEV_1) \|\| \
mbed_official	125:23cc3068a9e4	1035	((OUTPUTSET) == HRTIM_OUTPUTSET_TIMEV_2) \|\| \
mbed_official	125:23cc3068a9e4	1036	((OUTPUTSET) == HRTIM_OUTPUTSET_TIMEV_3) \|\| \
mbed_official	125:23cc3068a9e4	1037	((OUTPUTSET) == HRTIM_OUTPUTSET_TIMEV_4) \|\| \
mbed_official	125:23cc3068a9e4	1038	((OUTPUTSET) == HRTIM_OUTPUTSET_TIMEV_5) \|\| \
mbed_official	125:23cc3068a9e4	1039	((OUTPUTSET) == HRTIM_OUTPUTSET_TIMEV_6) \|\| \
mbed_official	125:23cc3068a9e4	1040	((OUTPUTSET) == HRTIM_OUTPUTSET_TIMEV_7) \|\| \
mbed_official	125:23cc3068a9e4	1041	((OUTPUTSET) == HRTIM_OUTPUTSET_TIMEV_8) \|\| \
mbed_official	125:23cc3068a9e4	1042	((OUTPUTSET) == HRTIM_OUTPUTSET_TIMEV_9) \|\| \
mbed_official	125:23cc3068a9e4	1043	((OUTPUTSET) == HRTIM_OUTPUTSET_EEV_1) \|\| \
mbed_official	125:23cc3068a9e4	1044	((OUTPUTSET) == HRTIM_OUTPUTSET_EEV_2) \|\| \
mbed_official	125:23cc3068a9e4	1045	((OUTPUTSET) == HRTIM_OUTPUTSET_EEV_3) \|\| \
mbed_official	125:23cc3068a9e4	1046	((OUTPUTSET) == HRTIM_OUTPUTSET_EEV_4) \|\| \
mbed_official	125:23cc3068a9e4	1047	((OUTPUTSET) == HRTIM_OUTPUTSET_EEV_5) \|\| \
mbed_official	125:23cc3068a9e4	1048	((OUTPUTSET) == HRTIM_OUTPUTSET_EEV_6) \|\| \
mbed_official	125:23cc3068a9e4	1049	((OUTPUTSET) == HRTIM_OUTPUTSET_EEV_7) \|\| \
mbed_official	125:23cc3068a9e4	1050	((OUTPUTSET) == HRTIM_OUTPUTSET_EEV_8) \|\| \
mbed_official	125:23cc3068a9e4	1051	((OUTPUTSET) == HRTIM_OUTPUTSET_EEV_9) \|\| \
mbed_official	125:23cc3068a9e4	1052	((OUTPUTSET) == HRTIM_OUTPUTSET_EEV_10) \|\| \
mbed_official	125:23cc3068a9e4	1053	((OUTPUTSET) == HRTIM_OUTPUTSET_UPDATE))
mbed_official	125:23cc3068a9e4	1054	/**
mbed_official	125:23cc3068a9e4	1055	* @}
mbed_official	125:23cc3068a9e4	1056	*/
mbed_official	125:23cc3068a9e4	1057
mbed_official	125:23cc3068a9e4	1058	/** @defgroup HRTIM_OutputResetSource
mbed_official	125:23cc3068a9e4	1059	* @{
mbed_official	125:23cc3068a9e4	1060	* @brief Constants defining the events that can be selected to configure the
mbed_official	125:23cc3068a9e4	1061	* set crossbar of a timer output
mbed_official	125:23cc3068a9e4	1062	*/
mbed_official	125:23cc3068a9e4	1063	#define HRTIM_OUTPUTRESET_NONE (uint32_t)0x00000000 /!< Reset the output reset crossbar /
mbed_official	125:23cc3068a9e4	1064	#define HRTIM_OUTPUTRESET_RESYNC (HRTIM_RST1R_RESYNC) /!< Timer reset event coming solely from software or SYNC input forces the output to its inactive state /
mbed_official	125:23cc3068a9e4	1065	#define HRTIM_OUTPUTRESET_TIMPER (HRTIM_RST1R_PER) /!< Timer period event forces the output to its inactive state /
mbed_official	125:23cc3068a9e4	1066	#define HRTIM_OUTPUTRESET_TIMCMP1 (HRTIM_RST1R_CMP1) /!< Timer compare 1 event forces the output to its inactive state /
mbed_official	125:23cc3068a9e4	1067	#define HRTIM_OUTPUTRESET_TIMCMP2 (HRTIM_RST1R_CMP2) /!< Timer compare 2 event forces the output to its inactive state /
mbed_official	125:23cc3068a9e4	1068	#define HRTIM_OUTPUTRESET_TIMCMP3 (HRTIM_RST1R_CMP3) /!< Timer compare 3 event forces the output to its inactive state /
mbed_official	125:23cc3068a9e4	1069	#define HRTIM_OUTPUTRESET_TIMCMP4 (HRTIM_RST1R_CMP4) /!< Timer compare 4 event forces the output to its inactive state /
mbed_official	125:23cc3068a9e4	1070	#define HRTIM_OUTPUTRESET_MASTERPER (HRTIM_RST1R_MSTPER) /!< The master timer period event forces the output to its inactive state /
mbed_official	125:23cc3068a9e4	1071	#define HRTIM_OUTPUTRESET_MASTERCMP1 (HRTIM_RST1R_MSTCMP1) /!< Master Timer compare 1 event forces the output to its inactive state /
mbed_official	125:23cc3068a9e4	1072	#define HRTIM_OUTPUTRESET_MASTERCMP2 (HRTIM_RST1R_MSTCMP2) /!< Master Timer compare 2 event forces the output to its inactive state /
mbed_official	125:23cc3068a9e4	1073	#define HRTIM_OUTPUTRESET_MASTERCMP3 (HRTIM_RST1R_MSTCMP3) /!< Master Timer compare 3 event forces the output to its inactive state /
mbed_official	125:23cc3068a9e4	1074	#define HRTIM_OUTPUTRESET_MASTERCMP4 (HRTIM_RST1R_MSTCMP4) /!< Master Timer compare 4 event forces the output to its inactive state /
mbed_official	125:23cc3068a9e4	1075	#define HRTIM_OUTPUTRESET_TIMEV_1 (HRTIM_RST1R_TIMEVNT1) /!< Timer event 1 forces the output to its inactive state /
mbed_official	125:23cc3068a9e4	1076	#define HRTIM_OUTPUTRESET_TIMEV_2 (HRTIM_RST1R_TIMEVNT2) /!< Timer event 2 forces the output to its inactive state /
mbed_official	125:23cc3068a9e4	1077	#define HRTIM_OUTPUTRESET_TIMEV_3 (HRTIM_RST1R_TIMEVNT3) /!< Timer event 3 forces the output to its inactive state /
mbed_official	125:23cc3068a9e4	1078	#define HRTIM_OUTPUTRESET_TIMEV_4 (HRTIM_RST1R_TIMEVNT4) /!< Timer event 4 forces the output to its inactive state /
mbed_official	125:23cc3068a9e4	1079	#define HRTIM_OUTPUTRESET_TIMEV_5 (HRTIM_RST1R_TIMEVNT5) /!< Timer event 5 forces the output to its inactive state /
mbed_official	125:23cc3068a9e4	1080	#define HRTIM_OUTPUTRESET_TIMEV_6 (HRTIM_RST1R_TIMEVNT6) /!< Timer event 6 forces the output to its inactive state /
mbed_official	125:23cc3068a9e4	1081	#define HRTIM_OUTPUTRESET_TIMEV_7 (HRTIM_RST1R_TIMEVNT7) /!< Timer event 7 forces the output to its inactive state /
mbed_official	125:23cc3068a9e4	1082	#define HRTIM_OUTPUTRESET_TIMEV_8 (HRTIM_RST1R_TIMEVNT8) /!< Timer event 8 forces the output to its inactive state /
mbed_official	125:23cc3068a9e4	1083	#define HRTIM_OUTPUTRESET_TIMEV_9 (HRTIM_RST1R_TIMEVNT9) /!< Timer event 9 forces the output to its inactive state /
mbed_official	125:23cc3068a9e4	1084	#define HRTIM_OUTPUTRESET_EEV_1 (HRTIM_RST1R_EXTVNT1) /!< External event 1 forces the output to its inactive state /
mbed_official	125:23cc3068a9e4	1085	#define HRTIM_OUTPUTRESET_EEV_2 (HRTIM_RST1R_EXTVNT2) /!< External event 2 forces the output to its inactive state /
mbed_official	125:23cc3068a9e4	1086	#define HRTIM_OUTPUTRESET_EEV_3 (HRTIM_RST1R_EXTVNT3) /!< External event 3 forces the output to its inactive state /
mbed_official	125:23cc3068a9e4	1087	#define HRTIM_OUTPUTRESET_EEV_4 (HRTIM_RST1R_EXTVNT4) /!< External event 4 forces the output to its inactive state /
mbed_official	125:23cc3068a9e4	1088	#define HRTIM_OUTPUTRESET_EEV_5 (HRTIM_RST1R_EXTVNT5) /!< External event 5 forces the output to its inactive state /
mbed_official	125:23cc3068a9e4	1089	#define HRTIM_OUTPUTRESET_EEV_6 (HRTIM_RST1R_EXTVNT6) /!< External event 6 forces the output to its inactive state /
mbed_official	125:23cc3068a9e4	1090	#define HRTIM_OUTPUTRESET_EEV_7 (HRTIM_RST1R_EXTVNT7) /!< External event 7 forces the output to its inactive state /
mbed_official	125:23cc3068a9e4	1091	#define HRTIM_OUTPUTRESET_EEV_8 (HRTIM_RST1R_EXTVNT8) /!< External event 8 forces the output to its inactive state /
mbed_official	125:23cc3068a9e4	1092	#define HRTIM_OUTPUTRESET_EEV_9 (HRTIM_RST1R_EXTVNT9) /!< External event 9 forces the output to its inactive state /
mbed_official	125:23cc3068a9e4	1093	#define HRTIM_OUTPUTRESET_EEV_10 (HRTIM_RST1R_EXTVNT10) /!< External event 10 forces the output to its inactive state /
mbed_official	125:23cc3068a9e4	1094	#define HRTIM_OUTPUTRESET_UPDATE (HRTIM_RST1R_UPDATE) /!< Timer register update event forces the output to its inactive state /
mbed_official	125:23cc3068a9e4	1095
mbed_official	125:23cc3068a9e4	1096	#define IS_HRTIM_OUTPUTRESET(OUTPUTRESET)\
mbed_official	125:23cc3068a9e4	1097	(((OUTPUTRESET) == HRTIM_OUTPUTRESET_NONE) \|\| \
mbed_official	125:23cc3068a9e4	1098	((OUTPUTRESET) == HRTIM_OUTPUTRESET_RESYNC) \|\| \
mbed_official	125:23cc3068a9e4	1099	((OUTPUTRESET) == HRTIM_OUTPUTRESET_TIMPER) \|\| \
mbed_official	125:23cc3068a9e4	1100	((OUTPUTRESET) == HRTIM_OUTPUTRESET_TIMCMP1) \|\| \
mbed_official	125:23cc3068a9e4	1101	((OUTPUTRESET) == HRTIM_OUTPUTRESET_TIMCMP2) \|\| \
mbed_official	125:23cc3068a9e4	1102	((OUTPUTRESET) == HRTIM_OUTPUTRESET_TIMCMP3) \|\| \
mbed_official	125:23cc3068a9e4	1103	((OUTPUTRESET) == HRTIM_OUTPUTRESET_TIMCMP4) \|\| \
mbed_official	125:23cc3068a9e4	1104	((OUTPUTRESET) == HRTIM_OUTPUTRESET_MASTERPER) \|\| \
mbed_official	125:23cc3068a9e4	1105	((OUTPUTRESET) == HRTIM_OUTPUTRESET_MASTERCMP1) \|\| \
mbed_official	125:23cc3068a9e4	1106	((OUTPUTRESET) == HRTIM_OUTPUTRESET_MASTERCMP2) \|\| \
mbed_official	125:23cc3068a9e4	1107	((OUTPUTRESET) == HRTIM_OUTPUTRESET_MASTERCMP3) \|\| \
mbed_official	125:23cc3068a9e4	1108	((OUTPUTRESET) == HRTIM_OUTPUTRESET_MASTERCMP4) \|\| \
mbed_official	125:23cc3068a9e4	1109	((OUTPUTRESET) == HRTIM_OUTPUTRESET_TIMEV_1) \|\| \
mbed_official	125:23cc3068a9e4	1110	((OUTPUTRESET) == HRTIM_OUTPUTRESET_TIMEV_2) \|\| \
mbed_official	125:23cc3068a9e4	1111	((OUTPUTRESET) == HRTIM_OUTPUTRESET_TIMEV_3) \|\| \
mbed_official	125:23cc3068a9e4	1112	((OUTPUTRESET) == HRTIM_OUTPUTRESET_TIMEV_4) \|\| \
mbed_official	125:23cc3068a9e4	1113	((OUTPUTRESET) == HRTIM_OUTPUTRESET_TIMEV_5) \|\| \
mbed_official	125:23cc3068a9e4	1114	((OUTPUTRESET) == HRTIM_OUTPUTRESET_TIMEV_6) \|\| \
mbed_official	125:23cc3068a9e4	1115	((OUTPUTRESET) == HRTIM_OUTPUTRESET_TIMEV_7) \|\| \
mbed_official	125:23cc3068a9e4	1116	((OUTPUTRESET) == HRTIM_OUTPUTRESET_TIMEV_8) \|\| \
mbed_official	125:23cc3068a9e4	1117	((OUTPUTRESET) == HRTIM_OUTPUTRESET_TIMEV_9) \|\| \
mbed_official	125:23cc3068a9e4	1118	((OUTPUTRESET) == HRTIM_OUTPUTRESET_EEV_1) \|\| \
mbed_official	125:23cc3068a9e4	1119	((OUTPUTRESET) == HRTIM_OUTPUTRESET_EEV_2) \|\| \
mbed_official	125:23cc3068a9e4	1120	((OUTPUTRESET) == HRTIM_OUTPUTRESET_EEV_3) \|\| \
mbed_official	125:23cc3068a9e4	1121	((OUTPUTRESET) == HRTIM_OUTPUTRESET_EEV_4) \|\| \
mbed_official	125:23cc3068a9e4	1122	((OUTPUTRESET) == HRTIM_OUTPUTRESET_EEV_5) \|\| \
mbed_official	125:23cc3068a9e4	1123	((OUTPUTRESET) == HRTIM_OUTPUTRESET_EEV_6) \|\| \
mbed_official	125:23cc3068a9e4	1124	((OUTPUTRESET) == HRTIM_OUTPUTRESET_EEV_7) \|\| \
mbed_official	125:23cc3068a9e4	1125	((OUTPUTRESET) == HRTIM_OUTPUTRESET_EEV_8) \|\| \
mbed_official	125:23cc3068a9e4	1126	((OUTPUTRESET) == HRTIM_OUTPUTRESET_EEV_9) \|\| \
mbed_official	125:23cc3068a9e4	1127	((OUTPUTRESET) == HRTIM_OUTPUTRESET_EEV_10) \|\| \
mbed_official	125:23cc3068a9e4	1128	((OUTPUTRESET) == HRTIM_OUTPUTRESET_UPDATE))
mbed_official	125:23cc3068a9e4	1129	/**
mbed_official	125:23cc3068a9e4	1130	* @}
mbed_official	125:23cc3068a9e4	1131	*/
mbed_official	125:23cc3068a9e4	1132
mbed_official	125:23cc3068a9e4	1133	/** @defgroup HRTIM_OutputIdleMode
mbed_official	125:23cc3068a9e4	1134	* @{
mbed_official	125:23cc3068a9e4	1135	* @brief Constants defining whether or not the timer output transition to its
mbed_official	125:23cc3068a9e4	1136	IDLE state when burst mode is entered
mbed_official	125:23cc3068a9e4	1137	*/
mbed_official	125:23cc3068a9e4	1138	#define HRTIM_OUTPUTIDLEMODE_NONE (uint32_t)0x00000000 /!< The output is not affected by the burst mode operation /
mbed_official	125:23cc3068a9e4	1139	#define HRTIM_OUTPUTIDLEMODE_IDLE (HRTIM_OUTR_IDLM1) /!< The output is in idle state when requested by the burst mode controller /
mbed_official	125:23cc3068a9e4	1140
mbed_official	125:23cc3068a9e4	1141	#define IS_HRTIM_OUTPUTIDLEMODE(OUTPUTIDLEMODE)\
mbed_official	125:23cc3068a9e4	1142	(((OUTPUTIDLEMODE) == HRTIM_OUTPUTIDLEMODE_NONE) \|\| \
mbed_official	125:23cc3068a9e4	1143	((OUTPUTIDLEMODE) == HRTIM_OUTPUTIDLEMODE_IDLE))
mbed_official	125:23cc3068a9e4	1144	/**
mbed_official	125:23cc3068a9e4	1145	* @}
mbed_official	125:23cc3068a9e4	1146	*/
mbed_official	125:23cc3068a9e4	1147
mbed_official	125:23cc3068a9e4	1148	/** @defgroup HRTIM_OutputIDLEState
mbed_official	125:23cc3068a9e4	1149	* @{
mbed_official	125:23cc3068a9e4	1150	* @brief Constants defining the IDLE state of a timer output
mbed_official	125:23cc3068a9e4	1151	*/
mbed_official	125:23cc3068a9e4	1152	#define HRTIM_OUTPUTIDLESTATE_INACTIVE (uint32_t)0x00000000 /!< Output at inactive level when in IDLE state /
mbed_official	125:23cc3068a9e4	1153	#define HRTIM_OUTPUTIDLESTATE_ACTIVE (HRTIM_OUTR_IDLES1) /!< Output at active level when in IDLE state /
mbed_official	125:23cc3068a9e4	1154
mbed_official	125:23cc3068a9e4	1155	#define IS_HRTIM_OUTPUTIDLESTATE(OUTPUTIDLESTATE)\
mbed_official	125:23cc3068a9e4	1156	(((OUTPUTIDLESTATE) == HRTIM_OUTPUTIDLESTATE_INACTIVE) \|\| \
mbed_official	125:23cc3068a9e4	1157	((OUTPUTIDLESTATE) == HRTIM_OUTPUTIDLESTATE_ACTIVE))
mbed_official	125:23cc3068a9e4	1158	/**
mbed_official	125:23cc3068a9e4	1159	* @}
mbed_official	125:23cc3068a9e4	1160	*/
mbed_official	125:23cc3068a9e4	1161
mbed_official	125:23cc3068a9e4	1162	/** @defgroup HRTIM_OutputFAULTState
mbed_official	125:23cc3068a9e4	1163	* @{
mbed_official	125:23cc3068a9e4	1164	* @brief Constants defining the FAULT state of a timer output
mbed_official	125:23cc3068a9e4	1165	*/
mbed_official	125:23cc3068a9e4	1166	#define HRTIM_OUTPUTFAULTSTATE_NONE (uint32_t)0x00000000 /!< The output is not affected by the fault input /
mbed_official	125:23cc3068a9e4	1167	#define HRTIM_OUTPUTFAULTSTATE_ACTIVE (HRTIM_OUTR_FAULT1_0) /!< Output at active level when in FAULT state /
mbed_official	125:23cc3068a9e4	1168	#define HRTIM_OUTPUTFAULTSTATE_INACTIVE (HRTIM_OUTR_FAULT1_1) /!< Output at inactive level when in FAULT state /
mbed_official	125:23cc3068a9e4	1169	#define HRTIM_OUTPUTFAULTSTATE_HIGHZ (HRTIM_OUTR_FAULT1_1 \| HRTIM_OUTR_FAULT1_0) /!< Output is tri-stated when in FAULT state /
mbed_official	125:23cc3068a9e4	1170
mbed_official	125:23cc3068a9e4	1171	#define IS_HRTIM_OUTPUTFAULTSTATE(OUTPUTFAULTSTATE)\
mbed_official	125:23cc3068a9e4	1172	(((OUTPUTFAULTSTATE) == HRTIM_OUTPUTFAULTSTATE_NONE) \|\| \
mbed_official	125:23cc3068a9e4	1173	((OUTPUTFAULTSTATE) == HRTIM_OUTPUTFAULTSTATE_ACTIVE) \|\| \
mbed_official	125:23cc3068a9e4	1174	((OUTPUTFAULTSTATE) == HRTIM_OUTPUTFAULTSTATE_INACTIVE) \|\| \
mbed_official	125:23cc3068a9e4	1175	((OUTPUTFAULTSTATE) == HRTIM_OUTPUTFAULTSTATE_HIGHZ))
mbed_official	125:23cc3068a9e4	1176	/**
mbed_official	125:23cc3068a9e4	1177	* @}
mbed_official	125:23cc3068a9e4	1178	*/
mbed_official	125:23cc3068a9e4	1179
mbed_official	125:23cc3068a9e4	1180	/** @defgroup HRTIM_OutputChopperModeEnable
mbed_official	125:23cc3068a9e4	1181	* @{
mbed_official	125:23cc3068a9e4	1182	* @brief Constants defining whether or not chopper mode is enabled for a timer
mbed_official	125:23cc3068a9e4	1183	output
mbed_official	125:23cc3068a9e4	1184	*/
mbed_official	125:23cc3068a9e4	1185	#define HRTIM_OUTPUTCHOPPERMODE_DISABLED (uint32_t)0x00000000 /!< The output is not affected by the fault input /
mbed_official	125:23cc3068a9e4	1186	#define HRTIM_OUTPUTCHOPPERMODE_ENABLED (HRTIM_OUTR_CHP1) /!< Output at active level when in FAULT state /
mbed_official	125:23cc3068a9e4	1187
mbed_official	125:23cc3068a9e4	1188	#define IS_HRTIM_OUTPUTCHOPPERMODE(OUTPUTCHOPPERMODE)\
mbed_official	125:23cc3068a9e4	1189	(((OUTPUTCHOPPERMODE) == HRTIM_OUTPUTCHOPPERMODE_DISABLED) \|\| \
mbed_official	125:23cc3068a9e4	1190	((OUTPUTCHOPPERMODE) == HRTIM_OUTPUTCHOPPERMODE_ENABLED))
mbed_official	125:23cc3068a9e4	1191	/**
mbed_official	125:23cc3068a9e4	1192	* @}
mbed_official	125:23cc3068a9e4	1193	*/
mbed_official	125:23cc3068a9e4	1194
mbed_official	125:23cc3068a9e4	1195	/** @defgroup HRTIM_OutputBurstModeEntryDelayed
mbed_official	125:23cc3068a9e4	1196	* @{
mbed_official	125:23cc3068a9e4	1197	* @brief Constants defining the idle mode entry is delayed by forcing a
mbed_official	125:23cc3068a9e4	1198	deadtime insertion before switching the outputs to their idle state
mbed_official	125:23cc3068a9e4	1199	*/
mbed_official	125:23cc3068a9e4	1200	#define HRTIM_OUTPUTBURSTMODEENTRY_REGULAR (uint32_t)0x00000000 /!< The programmed Idle state is applied immediately to the Output /
mbed_official	125:23cc3068a9e4	1201	#define HRTIM_OUTPUTBURSTMODEENTRY_DELAYED (HRTIM_OUTR_DIDL1) /!< Deadtime is inserted on output before entering the idle mode /
mbed_official	125:23cc3068a9e4	1202
mbed_official	125:23cc3068a9e4	1203	#define IS_HRTIM_OUTPUTBURSTMODEENTRY(OUTPUTBURSTMODEENTRY)\
mbed_official	125:23cc3068a9e4	1204	(((OUTPUTBURSTMODEENTRY) == HRTIM_OUTPUTBURSTMODEENTRY_REGULAR) \|\| \
mbed_official	125:23cc3068a9e4	1205	((OUTPUTBURSTMODEENTRY) == HRTIM_OUTPUTBURSTMODEENTRY_DELAYED))
mbed_official	125:23cc3068a9e4	1206	/**
mbed_official	125:23cc3068a9e4	1207	* @}
mbed_official	125:23cc3068a9e4	1208	*/
mbed_official	125:23cc3068a9e4	1209
mbed_official	125:23cc3068a9e4	1210	/** @defgroup HRTIM_CaptureUnitTrigger
mbed_official	125:23cc3068a9e4	1211	* @{
mbed_official	125:23cc3068a9e4	1212	* @brief Constants defining the events that can be selected to trigger the
mbed_official	125:23cc3068a9e4	1213	* capture of the timing unit counter
mbed_official	125:23cc3068a9e4	1214	*/
mbed_official	125:23cc3068a9e4	1215	#define HRTIM_CAPTURETRIGGER_NONE (uint32_t)0x00000000 /!< Capture trigger is disabled /
mbed_official	125:23cc3068a9e4	1216	#define HRTIM_CAPTURETRIGGER_UPDATE (HRTIM_CPT1CR_UPDCPT) /!< The update event triggers the Capture /
mbed_official	125:23cc3068a9e4	1217	#define HRTIM_CAPTURETRIGGER_EEV_1 (HRTIM_CPT1CR_EXEV1CPT) /!< The External event 1 triggers the Capture /
mbed_official	125:23cc3068a9e4	1218	#define HRTIM_CAPTURETRIGGER_EEV_2 (HRTIM_CPT1CR_EXEV2CPT) /!< The External event 2 triggers the Capture /
mbed_official	125:23cc3068a9e4	1219	#define HRTIM_CAPTURETRIGGER_EEV_3 (HRTIM_CPT1CR_EXEV3CPT) /!< The External event 3 triggers the Capture /
mbed_official	125:23cc3068a9e4	1220	#define HRTIM_CAPTURETRIGGER_EEV_4 (HRTIM_CPT1CR_EXEV4CPT) /!< The External event 4 triggers the Capture /
mbed_official	125:23cc3068a9e4	1221	#define HRTIM_CAPTURETRIGGER_EEV_5 (HRTIM_CPT1CR_EXEV5CPT) /!< The External event 5 triggers the Capture /
mbed_official	125:23cc3068a9e4	1222	#define HRTIM_CAPTURETRIGGER_EEV_6 (HRTIM_CPT1CR_EXEV6CPT) /!< The External event 6 triggers the Capture /
mbed_official	125:23cc3068a9e4	1223	#define HRTIM_CAPTURETRIGGER_EEV_7 (HRTIM_CPT1CR_EXEV7CPT) /!< The External event 7 triggers the Capture /
mbed_official	125:23cc3068a9e4	1224	#define HRTIM_CAPTURETRIGGER_EEV_8 (HRTIM_CPT1CR_EXEV8CPT) /!< The External event 8 triggers the Capture /
mbed_official	125:23cc3068a9e4	1225	#define HRTIM_CAPTURETRIGGER_EEV_9 (HRTIM_CPT1CR_EXEV9CPT) /!< The External event 9 triggers the Capture /
mbed_official	125:23cc3068a9e4	1226	#define HRTIM_CAPTURETRIGGER_EEV_10 (HRTIM_CPT1CR_EXEV10CPT) /!< The External event 10 triggers the Capture /
mbed_official	125:23cc3068a9e4	1227	#define HRTIM_CAPTURETRIGGER_TA1_SET (HRTIM_CPT1CR_TA1SET) /!< Capture is triggered by TA1 output inactive to active transition /
mbed_official	125:23cc3068a9e4	1228	#define HRTIM_CAPTURETRIGGER_TA1_RESET (HRTIM_CPT1CR_TA1RST) /!< Capture is triggered by TA1 output active to inactive transition /
mbed_official	125:23cc3068a9e4	1229	#define HRTIM_CAPTURETRIGGER_TIMERA_CMP1 (HRTIM_CPT1CR_TA1CMP1) /!< Timer A Compare 1 triggers Capture /
mbed_official	125:23cc3068a9e4	1230	#define HRTIM_CAPTURETRIGGER_TIMERA_CMP2 (HRTIM_CPT1CR_TA1CMP2) /!< Timer A Compare 2 triggers Capture /
mbed_official	125:23cc3068a9e4	1231	#define HRTIM_CAPTURETRIGGER_TB1_SET (HRTIM_CPT1CR_TB1SET) /!< Capture is triggered by TB1 output inactive to active transition /
mbed_official	125:23cc3068a9e4	1232	#define HRTIM_CAPTURETRIGGER_TB1_RESET (HRTIM_CPT1CR_TB1RST) /!< Capture is triggered by TB1 output active to inactive transition /
mbed_official	125:23cc3068a9e4	1233	#define HRTIM_CAPTURETRIGGER_TIMERB_CMP1 (HRTIM_CPT1CR_TB1CMP1) /!< Timer B Compare 1 triggers Capture /
mbed_official	125:23cc3068a9e4	1234	#define HRTIM_CAPTURETRIGGER_TIMERB_CMP2 (HRTIM_CPT1CR_TB1CMP2) /!< Timer B Compare 2 triggers Capture /
mbed_official	125:23cc3068a9e4	1235	#define HRTIM_CAPTURETRIGGER_TC1_SET (HRTIM_CPT1CR_TC1SET) /!< Capture is triggered by TC1 output inactive to active transition /
mbed_official	125:23cc3068a9e4	1236	#define HRTIM_CAPTURETRIGGER_TC1_RESET (HRTIM_CPT1CR_TC1RST) /!< Capture is triggered by TC1 output active to inactive transition /
mbed_official	125:23cc3068a9e4	1237	#define HRTIM_CAPTURETRIGGER_TIMERC_CMP1 (HRTIM_CPT1CR_TC1CMP1) /!< Timer C Compare 1 triggers Capture /
mbed_official	125:23cc3068a9e4	1238	#define HRTIM_CAPTURETRIGGER_TIMERC_CMP2 (HRTIM_CPT1CR_TC1CMP2) /!< Timer C Compare 2 triggers Capture /
mbed_official	125:23cc3068a9e4	1239	#define HRTIM_CAPTURETRIGGER_TD1_SET (HRTIM_CPT1CR_TD1SET) /!< Capture is triggered by TD1 output inactive to active transition /
mbed_official	125:23cc3068a9e4	1240	#define HRTIM_CAPTURETRIGGER_TD1_RESET (HRTIM_CPT1CR_TD1RST) /!< Capture is triggered by TD1 output active to inactive transition /
mbed_official	125:23cc3068a9e4	1241	#define HRTIM_CAPTURETRIGGER_TIMERD_CMP1 (HRTIM_CPT1CR_TD1CMP1) /!< Timer D Compare 1 triggers Capture /
mbed_official	125:23cc3068a9e4	1242	#define HRTIM_CAPTURETRIGGER_TIMERD_CMP2 (HRTIM_CPT1CR_TD1CMP2) /!< Timer D Compare 2 triggers Capture /
mbed_official	125:23cc3068a9e4	1243	#define HRTIM_CAPTURETRIGGER_TE1_SET (HRTIM_CPT1CR_TE1SET) /!< Capture is triggered by TE1 output inactive to active transition /
mbed_official	125:23cc3068a9e4	1244	#define HRTIM_CAPTURETRIGGER_TE1_RESET (HRTIM_CPT1CR_TE1RST) /!< Capture is triggered by TE1 output active to inactive transition /
mbed_official	125:23cc3068a9e4	1245	#define HRTIM_CAPTURETRIGGER_TIMERE_CMP1 (HRTIM_CPT1CR_TE1CMP1) /!< Timer E Compare 1 triggers Capture /
mbed_official	125:23cc3068a9e4	1246	#define HRTIM_CAPTURETRIGGER_TIMERE_CMP2 (HRTIM_CPT1CR_TE1CMP2) /!< Timer E Compare 2 triggers Capture /
mbed_official	125:23cc3068a9e4	1247
mbed_official	125:23cc3068a9e4	1248	#define IS_HRTIM_TIMER_CAPTURETRIGGER(TIMER, CAPTURETRIGGER) \
mbed_official	125:23cc3068a9e4	1249	(((CAPTURETRIGGER) == HRTIM_CAPTURETRIGGER_NONE) \|\| \
mbed_official	125:23cc3068a9e4	1250	((CAPTURETRIGGER) == HRTIM_CAPTURETRIGGER_UPDATE) \|\| \
mbed_official	125:23cc3068a9e4	1251	((CAPTURETRIGGER) == HRTIM_CAPTURETRIGGER_EEV_1) \|\| \
mbed_official	125:23cc3068a9e4	1252	((CAPTURETRIGGER) == HRTIM_CAPTURETRIGGER_EEV_2) \|\| \
mbed_official	125:23cc3068a9e4	1253	((CAPTURETRIGGER) == HRTIM_CAPTURETRIGGER_EEV_3) \|\| \
mbed_official	125:23cc3068a9e4	1254	((CAPTURETRIGGER) == HRTIM_CAPTURETRIGGER_EEV_4) \|\| \
mbed_official	125:23cc3068a9e4	1255	((CAPTURETRIGGER) == HRTIM_CAPTURETRIGGER_EEV_5) \|\| \
mbed_official	125:23cc3068a9e4	1256	((CAPTURETRIGGER) == HRTIM_CAPTURETRIGGER_EEV_6) \|\| \
mbed_official	125:23cc3068a9e4	1257	((CAPTURETRIGGER) == HRTIM_CAPTURETRIGGER_EEV_7) \|\| \
mbed_official	125:23cc3068a9e4	1258	((CAPTURETRIGGER) == HRTIM_CAPTURETRIGGER_EEV_8) \|\| \
mbed_official	125:23cc3068a9e4	1259	((CAPTURETRIGGER) == HRTIM_CAPTURETRIGGER_EEV_9) \|\| \
mbed_official	125:23cc3068a9e4	1260	((CAPTURETRIGGER) == HRTIM_CAPTURETRIGGER_EEV_10) \
mbed_official	125:23cc3068a9e4	1261	\|\| \
mbed_official	125:23cc3068a9e4	1262	(((TIMER) == HRTIM_TIMERINDEX_TIMER_A) && \
mbed_official	125:23cc3068a9e4	1263	(((CAPTURETRIGGER) == HRTIM_CAPTURETRIGGER_TA1_SET) \|\| \
mbed_official	125:23cc3068a9e4	1264	((CAPTURETRIGGER) == HRTIM_CAPTURETRIGGER_TA1_RESET) \|\| \
mbed_official	125:23cc3068a9e4	1265	((CAPTURETRIGGER) == HRTIM_CAPTURETRIGGER_TIMERA_CMP1) \|\| \
mbed_official	125:23cc3068a9e4	1266	((CAPTURETRIGGER) == HRTIM_CAPTURETRIGGER_TIMERA_CMP2))) \
mbed_official	125:23cc3068a9e4	1267	\|\| \
mbed_official	125:23cc3068a9e4	1268	(((TIMER) == HRTIM_TIMERINDEX_TIMER_B) && \
mbed_official	125:23cc3068a9e4	1269	(((CAPTURETRIGGER) == HRTIM_CAPTURETRIGGER_TB1_SET) \|\| \
mbed_official	125:23cc3068a9e4	1270	((CAPTURETRIGGER) == HRTIM_CAPTURETRIGGER_TB1_RESET) \|\| \
mbed_official	125:23cc3068a9e4	1271	((CAPTURETRIGGER) == HRTIM_CAPTURETRIGGER_TIMERB_CMP1) \|\| \
mbed_official	125:23cc3068a9e4	1272	((CAPTURETRIGGER) == HRTIM_CAPTURETRIGGER_TIMERB_CMP2))) \
mbed_official	125:23cc3068a9e4	1273	\|\| \
mbed_official	125:23cc3068a9e4	1274	(((TIMER) == HRTIM_TIMERINDEX_TIMER_C) && \
mbed_official	125:23cc3068a9e4	1275	(((CAPTURETRIGGER) == HRTIM_CAPTURETRIGGER_TC1_SET) \|\| \
mbed_official	125:23cc3068a9e4	1276	((CAPTURETRIGGER) == HRTIM_CAPTURETRIGGER_TC1_RESET) \|\| \
mbed_official	125:23cc3068a9e4	1277	((CAPTURETRIGGER) == HRTIM_CAPTURETRIGGER_TIMERC_CMP1) \|\| \
mbed_official	125:23cc3068a9e4	1278	((CAPTURETRIGGER) == HRTIM_CAPTURETRIGGER_TIMERC_CMP2))) \
mbed_official	125:23cc3068a9e4	1279	\|\| \
mbed_official	125:23cc3068a9e4	1280	(((TIMER) == HRTIM_TIMERINDEX_TIMER_D) && \
mbed_official	125:23cc3068a9e4	1281	(((CAPTURETRIGGER) == HRTIM_CAPTURETRIGGER_TD1_SET) \|\| \
mbed_official	125:23cc3068a9e4	1282	((CAPTURETRIGGER) == HRTIM_CAPTURETRIGGER_TD1_RESET) \|\| \
mbed_official	125:23cc3068a9e4	1283	((CAPTURETRIGGER) == HRTIM_CAPTURETRIGGER_TIMERD_CMP1) \|\| \
mbed_official	125:23cc3068a9e4	1284	((CAPTURETRIGGER) == HRTIM_CAPTURETRIGGER_TIMERD_CMP2))) \
mbed_official	125:23cc3068a9e4	1285	\|\| \
mbed_official	125:23cc3068a9e4	1286	(((TIMER) == HRTIM_TIMERINDEX_TIMER_E) && \
mbed_official	125:23cc3068a9e4	1287	(((CAPTURETRIGGER) == HRTIM_CAPTURETRIGGER_TE1_SET) \|\| \
mbed_official	125:23cc3068a9e4	1288	((CAPTURETRIGGER) == HRTIM_CAPTURETRIGGER_TE1_RESET) \|\| \
mbed_official	125:23cc3068a9e4	1289	((CAPTURETRIGGER) == HRTIM_CAPTURETRIGGER_TIMERE_CMP1) \|\| \
mbed_official	125:23cc3068a9e4	1290	((CAPTURETRIGGER) == HRTIM_CAPTURETRIGGER_TIMERE_CMP2))))
mbed_official	125:23cc3068a9e4	1291	/**
mbed_official	125:23cc3068a9e4	1292	* @}
mbed_official	125:23cc3068a9e4	1293	*/
mbed_official	125:23cc3068a9e4	1294
mbed_official	125:23cc3068a9e4	1295	/** @defgroup HRTIM_TimerExternalEventFilter
mbed_official	125:23cc3068a9e4	1296	* @{
mbed_official	125:23cc3068a9e4	1297	* @brief Constants defining the event filtering applied to external events
mbed_official	125:23cc3068a9e4	1298	* by a timer
mbed_official	125:23cc3068a9e4	1299	*/
mbed_official	125:23cc3068a9e4	1300	#define HRTIM_TIMEVENTFILTER_NONE (0x00000000)
mbed_official	125:23cc3068a9e4	1301	#define HRTIM_TIMEVENTFILTER_BLANKINGCMP1 (HRTIM_EEFR1_EE1FLTR_0) /!< Blanking from counter reset/roll-over to Compare 1 /
mbed_official	125:23cc3068a9e4	1302	#define HRTIM_TIMEVENTFILTER_BLANKINGCMP2 (HRTIM_EEFR1_EE1FLTR_1) /!< Blanking from counter reset/roll-over to Compare 2 /
mbed_official	125:23cc3068a9e4	1303	#define HRTIM_TIMEVENTFILTER_BLANKINGCMP3 (HRTIM_EEFR1_EE1FLTR_1 \| HRTIM_EEFR1_EE1FLTR_0) /!< Blanking from counter reset/roll-over to Compare 3 /
mbed_official	125:23cc3068a9e4	1304	#define HRTIM_TIMEVENTFILTER_BLANKINGCMP4 (HRTIM_EEFR1_EE1FLTR_2) /!< Blanking from counter reset/roll-over to Compare 4 /
mbed_official	125:23cc3068a9e4	1305	#define HRTIM_TIMEVENTFILTER_BLANKINGFLTR1 (HRTIM_EEFR1_EE1FLTR_2 \| HRTIM_EEFR1_EE1FLTR_0) /!< Blanking from another timing unit: TIMFLTR1 source /
mbed_official	125:23cc3068a9e4	1306	#define HRTIM_TIMEVENTFILTER_BLANKINGFLTR2 (HRTIM_EEFR1_EE1FLTR_2 \| HRTIM_EEFR1_EE1FLTR_1) /!< Blanking from another timing unit: TIMFLTR2 source /
mbed_official	125:23cc3068a9e4	1307	#define HRTIM_TIMEVENTFILTER_BLANKINGFLTR3 (HRTIM_EEFR1_EE1FLTR_2 \| HRTIM_EEFR1_EE1FLTR_1 \| HRTIM_EEFR1_EE1FLTR_0) /!< Blanking from another timing unit: TIMFLTR3 source /
mbed_official	125:23cc3068a9e4	1308	#define HRTIM_TIMEVENTFILTER_BLANKINGFLTR4 (HRTIM_EEFR1_EE1FLTR_3) /!< Blanking from another timing unit: TIMFLTR4 source /
mbed_official	125:23cc3068a9e4	1309	#define HRTIM_TIMEVENTFILTER_BLANKINGFLTR5 (HRTIM_EEFR1_EE1FLTR_3 \| HRTIM_EEFR1_EE1FLTR_0) /!< Blanking from another timing unit: TIMFLTR5 source /
mbed_official	125:23cc3068a9e4	1310	#define HRTIM_TIMEVENTFILTER_BLANKINGFLTR6 (HRTIM_EEFR1_EE1FLTR_3 \| HRTIM_EEFR1_EE1FLTR_1) /!< Blanking from another timing unit: TIMFLTR6 source /
mbed_official	125:23cc3068a9e4	1311	#define HRTIM_TIMEVENTFILTER_BLANKINGFLTR7 (HRTIM_EEFR1_EE1FLTR_3 \| HRTIM_EEFR1_EE1FLTR_1 \| HRTIM_EEFR1_EE1FLTR_0) /!< Blanking from another timing unit: TIMFLTR7 source /
mbed_official	125:23cc3068a9e4	1312	#define HRTIM_TIMEVENTFILTER_BLANKINGFLTR8 (HRTIM_EEFR1_EE1FLTR_3 \| HRTIM_EEFR1_EE1FLTR_2) /!< Blanking from another timing unit: TIMFLTR8 source /
mbed_official	125:23cc3068a9e4	1313	#define HRTIM_TIMEVENTFILTER_WINDOWINGCMP2 (HRTIM_EEFR1_EE1FLTR_3 \| HRTIM_EEFR1_EE1FLTR_2 \| HRTIM_EEFR1_EE1FLTR_0) /!< Windowing from counter reset/roll-over to Compare 2 /
mbed_official	125:23cc3068a9e4	1314	#define HRTIM_TIMEVENTFILTER_WINDOWINGCMP3 (HRTIM_EEFR1_EE1FLTR_3 \| HRTIM_EEFR1_EE1FLTR_2 \| HRTIM_EEFR1_EE1FLTR_1) /!< Windowing from counter reset/roll-over to Compare 3 /
mbed_official	125:23cc3068a9e4	1315	#define HRTIM_TIMEVENTFILTER_WINDOWINGTIM (HRTIM_EEFR1_EE1FLTR_3 \| HRTIM_EEFR1_EE1FLTR_2 \| HRTIM_EEFR1_EE1FLTR_1 \| HRTIM_EEFR1_EE1FLTR_3 \| HRTIM_EEFR1_EE1FLTR_2 \| HRTIM_EEFR1_EE1FLTR_0) /!< Windowing from another timing unit: TIMWIN source /
mbed_official	125:23cc3068a9e4	1316
mbed_official	125:23cc3068a9e4	1317	#define IS_HRTIM_TIMEVENTFILTER(TIMEVENTFILTER)\
mbed_official	125:23cc3068a9e4	1318	(((TIMEVENTFILTER) == HRTIM_TIMEVENTFILTER_NONE) \|\| \
mbed_official	125:23cc3068a9e4	1319	((TIMEVENTFILTER) == HRTIM_TIMEVENTFILTER_BLANKINGCMP1) \|\| \
mbed_official	125:23cc3068a9e4	1320	((TIMEVENTFILTER) == HRTIM_TIMEVENTFILTER_BLANKINGCMP2) \|\| \
mbed_official	125:23cc3068a9e4	1321	((TIMEVENTFILTER) == HRTIM_TIMEVENTFILTER_BLANKINGCMP3) \|\| \
mbed_official	125:23cc3068a9e4	1322	((TIMEVENTFILTER) == HRTIM_TIMEVENTFILTER_BLANKINGCMP4) \|\| \
mbed_official	125:23cc3068a9e4	1323	((TIMEVENTFILTER) == HRTIM_TIMEVENTFILTER_BLANKINGFLTR1) \|\| \
mbed_official	125:23cc3068a9e4	1324	((TIMEVENTFILTER) == HRTIM_TIMEVENTFILTER_BLANKINGFLTR2) \|\| \
mbed_official	125:23cc3068a9e4	1325	((TIMEVENTFILTER) == HRTIM_TIMEVENTFILTER_BLANKINGFLTR3) \|\| \
mbed_official	125:23cc3068a9e4	1326	((TIMEVENTFILTER) == HRTIM_TIMEVENTFILTER_BLANKINGFLTR4) \|\| \
mbed_official	125:23cc3068a9e4	1327	((TIMEVENTFILTER) == HRTIM_TIMEVENTFILTER_BLANKINGFLTR5) \|\| \
mbed_official	125:23cc3068a9e4	1328	((TIMEVENTFILTER) == HRTIM_TIMEVENTFILTER_BLANKINGFLTR6) \|\| \
mbed_official	125:23cc3068a9e4	1329	((TIMEVENTFILTER) == HRTIM_TIMEVENTFILTER_BLANKINGFLTR7) \|\| \
mbed_official	125:23cc3068a9e4	1330	((TIMEVENTFILTER) == HRTIM_TIMEVENTFILTER_BLANKINGFLTR8) \|\| \
mbed_official	125:23cc3068a9e4	1331	((TIMEVENTFILTER) == HRTIM_TIMEVENTFILTER_WINDOWINGCMP2) \|\| \
mbed_official	125:23cc3068a9e4	1332	((TIMEVENTFILTER) == HRTIM_TIMEVENTFILTER_WINDOWINGCMP3) \|\| \
mbed_official	125:23cc3068a9e4	1333	((TIMEVENTFILTER) == HRTIM_TIMEVENTFILTER_WINDOWINGTIM))
mbed_official	125:23cc3068a9e4	1334	/**
mbed_official	125:23cc3068a9e4	1335	* @}
mbed_official	125:23cc3068a9e4	1336	*/
mbed_official	125:23cc3068a9e4	1337
mbed_official	125:23cc3068a9e4	1338	/** @defgroup HRTIM_TimerExternalEventLatch
mbed_official	125:23cc3068a9e4	1339	* @{
mbed_official	125:23cc3068a9e4	1340	* @brief Constants defining whether or not the external event is
mbed_official	125:23cc3068a9e4	1341	* memorized (latched) and generated as soon as the blanking period
mbed_official	125:23cc3068a9e4	1342	* is completed or the window ends
mbed_official	125:23cc3068a9e4	1343	*/
mbed_official	125:23cc3068a9e4	1344	#define HRTIM_TIMEVENTLATCH_DISABLED ((uint32_t)0x00000000) /!< Event is ignored if it happens during a blank, or passed through during a window /
mbed_official	125:23cc3068a9e4	1345	#define HRTIM_TIMEVENTLATCH_ENABLED HRTIM_EEFR1_EE1LTCH /!< Event 1 is latched and delayed till the end of the blanking or windowing period / /!< Blanking from counter reset/roll-over to Compare 1 /
mbed_official	125:23cc3068a9e4	1346
mbed_official	125:23cc3068a9e4	1347	#define IS_HRTIM_TIMEVENTLATCH(TIMEVENTLATCH)\
mbed_official	125:23cc3068a9e4	1348	(((TIMEVENTLATCH) == HRTIM_TIMEVENTLATCH_DISABLED) \|\| \
mbed_official	125:23cc3068a9e4	1349	((TIMEVENTLATCH) == HRTIM_TIMEVENTLATCH_ENABLED))
mbed_official	125:23cc3068a9e4	1350	/**
mbed_official	125:23cc3068a9e4	1351	* @}
mbed_official	125:23cc3068a9e4	1352	*/
mbed_official	125:23cc3068a9e4	1353
mbed_official	125:23cc3068a9e4	1354	/** @defgroup HRTIM_DeadtimeRisingSign
mbed_official	125:23cc3068a9e4	1355	* @{
mbed_official	125:23cc3068a9e4	1356	* @brief Constants defining whether the deadtime is positive or negative
mbed_official	125:23cc3068a9e4	1357	* (overlapping signal) on rising edge
mbed_official	125:23cc3068a9e4	1358	*/
mbed_official	125:23cc3068a9e4	1359	#define HRTIM_TIMDEADTIME_RISINGSIGN_POSITIVE ((uint32_t)0x00000000) /!< Positive deadtime on rising edge /
mbed_official	125:23cc3068a9e4	1360	#define HRTIM_TIMDEADTIME_RISINGSIGN_NEGATIVE (HRTIM_DTR_SDTR) /!< Negative deadtime on rising edge /
mbed_official	125:23cc3068a9e4	1361
mbed_official	125:23cc3068a9e4	1362	#define IS_HRTIM_TIMDEADTIME_RISINGSIGN(RISINGSIGN)\
mbed_official	125:23cc3068a9e4	1363	(((RISINGSIGN) == HRTIM_TIMDEADTIME_RISINGSIGN_POSITIVE) \|\| \
mbed_official	125:23cc3068a9e4	1364	((RISINGSIGN) == HRTIM_TIMDEADTIME_RISINGSIGN_NEGATIVE))
mbed_official	125:23cc3068a9e4	1365	/**
mbed_official	125:23cc3068a9e4	1366	* @}
mbed_official	125:23cc3068a9e4	1367	*/
mbed_official	125:23cc3068a9e4	1368
mbed_official	125:23cc3068a9e4	1369	/** @defgroup HRTIM_DeadtimeRisingLock
mbed_official	125:23cc3068a9e4	1370	* @{
mbed_official	125:23cc3068a9e4	1371	* @brief Constants defining whether or not the deadtime (rising sign and
mbed_official	125:23cc3068a9e4	1372	* value) is write protected
mbed_official	125:23cc3068a9e4	1373	*/
mbed_official	125:23cc3068a9e4	1374	#define HRTIM_TIMDEADTIME_RISINGLOCK_WRITE ((uint32_t)0x00000000) /!< Deadtime rising value and sign is writable /
mbed_official	125:23cc3068a9e4	1375	#define HRTIM_TIMDEADTIME_RISINGLOCK_READONLY (HRTIM_DTR_DTRLK) /!< Deadtime rising value and sign is read-only /
mbed_official	125:23cc3068a9e4	1376
mbed_official	125:23cc3068a9e4	1377	#define IS_HRTIM_TIMDEADTIME_RISINGLOCK(RISINGLOCK)\
mbed_official	125:23cc3068a9e4	1378	(((RISINGLOCK) == HRTIM_TIMDEADTIME_RISINGLOCK_WRITE) \|\| \
mbed_official	125:23cc3068a9e4	1379	((RISINGLOCK) == HRTIM_TIMDEADTIME_RISINGLOCK_READONLY))
mbed_official	125:23cc3068a9e4	1380	/**
mbed_official	125:23cc3068a9e4	1381	* @}
mbed_official	125:23cc3068a9e4	1382	*/
mbed_official	125:23cc3068a9e4	1383
mbed_official	125:23cc3068a9e4	1384	/** @defgroup HRTIM_DeadtimeRisingSignLock
mbed_official	125:23cc3068a9e4	1385	* @{
mbed_official	125:23cc3068a9e4	1386	* @brief Constants defining whether or not the deadtime rising sign is write
mbed_official	125:23cc3068a9e4	1387	* protected
mbed_official	125:23cc3068a9e4	1388	*/
mbed_official	125:23cc3068a9e4	1389	#define HRTIM_TIMDEADTIME_RISINGSIGNLOCK_WRITE ((uint32_t)0x00000000) /!< Deadtime rising sign is writable /
mbed_official	125:23cc3068a9e4	1390	#define HRTIM_TIMDEADTIME_RISINGSIGNLOCK_READONLY (HRTIM_DTR_DTRSLK) /!< Deadtime rising sign is read-only /
mbed_official	125:23cc3068a9e4	1391
mbed_official	125:23cc3068a9e4	1392	#define IS_HRTIM_TIMDEADTIME_RISINGSIGNLOCK(RISINGSIGNLOCK)\
mbed_official	125:23cc3068a9e4	1393	(((RISINGSIGNLOCK) == HRTIM_TIMDEADTIME_RISINGSIGNLOCK_WRITE) \|\| \
mbed_official	125:23cc3068a9e4	1394	((RISINGSIGNLOCK) == HRTIM_TIMDEADTIME_RISINGSIGNLOCK_READONLY))
mbed_official	125:23cc3068a9e4	1395	/**
mbed_official	125:23cc3068a9e4	1396	* @}
mbed_official	125:23cc3068a9e4	1397	*/
mbed_official	125:23cc3068a9e4	1398
mbed_official	125:23cc3068a9e4	1399	/** @defgroup HRTIM_DeadtimeFallingSign
mbed_official	125:23cc3068a9e4	1400	* @{
mbed_official	125:23cc3068a9e4	1401	* @brief Constants defining whether the deadtime is positive or negative
mbed_official	125:23cc3068a9e4	1402	* (overlapping signal) on falling edge
mbed_official	125:23cc3068a9e4	1403	*/
mbed_official	125:23cc3068a9e4	1404	#define HRTIM_TIMDEADTIME_FALLINGSIGN_POSITIVE ((uint32_t)0x00000000) /!< Positive deadtime on falling edge /
mbed_official	125:23cc3068a9e4	1405	#define HRTIM_TIMDEADTIME_FALLINGSIGN_NEGATIVE (HRTIM_DTR_SDTF) /!< Negative deadtime on falling edge /
mbed_official	125:23cc3068a9e4	1406
mbed_official	125:23cc3068a9e4	1407	#define IS_HRTIM_TIMDEADTIME_FALLINGSIGN(FALLINGSIGN)\
mbed_official	125:23cc3068a9e4	1408	(((FALLINGSIGN) == HRTIM_TIMDEADTIME_FALLINGSIGN_POSITIVE) \|\| \
mbed_official	125:23cc3068a9e4	1409	((FALLINGSIGN) == HRTIM_TIMDEADTIME_FALLINGSIGN_NEGATIVE))
mbed_official	125:23cc3068a9e4	1410	/**
mbed_official	125:23cc3068a9e4	1411	* @}
mbed_official	125:23cc3068a9e4	1412	*/
mbed_official	125:23cc3068a9e4	1413
mbed_official	125:23cc3068a9e4	1414	/** @defgroup HRTIM_DeadtimeFallingLock
mbed_official	125:23cc3068a9e4	1415	* @{
mbed_official	125:23cc3068a9e4	1416	* @brief Constants defining whether or not the deadtime (falling sign and
mbed_official	125:23cc3068a9e4	1417	* value) is write protected
mbed_official	125:23cc3068a9e4	1418	*/
mbed_official	125:23cc3068a9e4	1419	#define HRTIM_TIMDEADTIME_FALLINGLOCK_WRITE ((uint32_t)0x00000000) /!< Deadtime falling value and sign is writable /
mbed_official	125:23cc3068a9e4	1420	#define HRTIM_TIMDEADTIME_FALLINGLOCK_READONLY (HRTIM_DTR_DTFLK) /!< Deadtime falling value and sign is read-only /
mbed_official	125:23cc3068a9e4	1421
mbed_official	125:23cc3068a9e4	1422	#define IS_HRTIM_TIMDEADTIME_FALLINGLOCK(FALLINGLOCK)\
mbed_official	125:23cc3068a9e4	1423	(((FALLINGLOCK) == HRTIM_TIMDEADTIME_FALLINGLOCK_WRITE) \|\| \
mbed_official	125:23cc3068a9e4	1424	((FALLINGLOCK) == HRTIM_TIMDEADTIME_FALLINGLOCK_READONLY))
mbed_official	125:23cc3068a9e4	1425	/**
mbed_official	125:23cc3068a9e4	1426	* @}
mbed_official	125:23cc3068a9e4	1427	*/
mbed_official	125:23cc3068a9e4	1428
mbed_official	125:23cc3068a9e4	1429	/** @defgroup HRTIM_DeadtimeFallingSignLock
mbed_official	125:23cc3068a9e4	1430	* @{
mbed_official	125:23cc3068a9e4	1431	* @brief Constants defining whether or not the deadtime falling sign is write
mbed_official	125:23cc3068a9e4	1432	* protected
mbed_official	125:23cc3068a9e4	1433	*/
mbed_official	125:23cc3068a9e4	1434	#define HRTIM_TIMDEADTIME_FALLINGSIGNLOCK_WRITE ((uint32_t)0x00000000) /!< Deadtime falling sign is writable /
mbed_official	125:23cc3068a9e4	1435	#define HRTIM_TIMDEADTIME_FALLINGSIGNLOCK_READONLY (HRTIM_DTR_DTFSLK) /!< Deadtime falling sign is read-only /
mbed_official	125:23cc3068a9e4	1436
mbed_official	125:23cc3068a9e4	1437	#define IS_HRTIM_TIMDEADTIME_FALLINGSIGNLOCK(FALLINGSIGNLOCK)\
mbed_official	125:23cc3068a9e4	1438	(((FALLINGSIGNLOCK) == HRTIM_TIMDEADTIME_FALLINGSIGNLOCK_WRITE) \|\| \
mbed_official	125:23cc3068a9e4	1439	((FALLINGSIGNLOCK) == HRTIM_TIMDEADTIME_FALLINGSIGNLOCK_READONLY))
mbed_official	125:23cc3068a9e4	1440	/**
mbed_official	125:23cc3068a9e4	1441	* @}
mbed_official	125:23cc3068a9e4	1442	*/
mbed_official	125:23cc3068a9e4	1443
mbed_official	125:23cc3068a9e4	1444	/** @defgroup HRTIM_SynchronizationInputSource
mbed_official	125:23cc3068a9e4	1445	* @{
mbed_official	125:23cc3068a9e4	1446	* @brief Constants defining defining the synchronization input source
mbed_official	125:23cc3068a9e4	1447	*/
mbed_official	125:23cc3068a9e4	1448	#define HRTIM_SYNCINPUTSOURCE_NONE (uint32_t)0x00000000 /!< disabled. HRTIM is not synchronized and runs in standalone mode /
mbed_official	125:23cc3068a9e4	1449	#define HRTIM_SYNCINPUTSOURCE_INTERNALEVENT HRTIM_MCR_SYNC_IN_1 /!< The HRTIM is synchronized with the on-chip timer /
mbed_official	125:23cc3068a9e4	1450	#define HRTIM_SYNCINPUTSOURCE_EXTERNALEVENT (HRTIM_MCR_SYNC_IN_1 \| HRTIM_MCR_SYNC_IN_0) /!< A positive pulse on SYNCIN input triggers the HRTIM /
mbed_official	125:23cc3068a9e4	1451
mbed_official	125:23cc3068a9e4	1452	#define IS_HRTIM_SYNCINPUTSOURCE(SYNCINPUTSOURCE)\
mbed_official	125:23cc3068a9e4	1453	(((SYNCINPUTSOURCE) == HRTIM_SYNCINPUTSOURCE_NONE) \|\| \
mbed_official	125:23cc3068a9e4	1454	((SYNCINPUTSOURCE) == HRTIM_SYNCINPUTSOURCE_INTERNALEVENT) \|\| \
mbed_official	125:23cc3068a9e4	1455	((SYNCINPUTSOURCE) == HRTIM_SYNCINPUTSOURCE_EXTERNALEVENT))
mbed_official	125:23cc3068a9e4	1456	/**
mbed_official	125:23cc3068a9e4	1457	* @}
mbed_official	125:23cc3068a9e4	1458	*/
mbed_official	125:23cc3068a9e4	1459
mbed_official	125:23cc3068a9e4	1460	/** @defgroup HRTIM_SynchronizationOutputSource
mbed_official	125:23cc3068a9e4	1461	* @{
mbed_official	125:23cc3068a9e4	1462	* @brief Constants defining the source and event to be sent on the
mbed_official	125:23cc3068a9e4	1463	* synchronization outputs
mbed_official	125:23cc3068a9e4	1464	*/
mbed_official	125:23cc3068a9e4	1465	#define HRTIM_SYNCOUTPUTSOURCE_MASTER_START (uint32_t)0x00000000 /!< A pulse is sent on the SYNCOUT output (16x fHRTIM clock cycles) upon master timer start event /
mbed_official	125:23cc3068a9e4	1466	#define HRTIM_SYNCOUTPUTSOURCE_MASTER_CMP1 (HRTIM_MCR_SYNC_SRC_0) /!< A pulse is sent on the SYNCOUT output (16x fHRTIM clock cycles) upon master timer compare 1 event/
mbed_official	125:23cc3068a9e4	1467	#define HRTIM_SYNCOUTPUTSOURCE_TIMA_START (HRTIM_MCR_SYNC_SRC_1) /!< A pulse is sent on the SYNCOUT output (16x fHRTIM clock cycles) upon timer A start or reset events /
mbed_official	125:23cc3068a9e4	1468	#define HRTIM_SYNCOUTPUTSOURCE_TIMA_CMP1 (HRTIM_MCR_SYNC_SRC_1 \| HRTIM_MCR_SYNC_SRC_0) /!< A pulse is sent on the SYNCOUT output (16x fHRTIM clock cycles) upon timer A compare 1 event /
mbed_official	125:23cc3068a9e4	1469
mbed_official	125:23cc3068a9e4	1470	#define IS_HRTIM_SYNCOUTPUTSOURCE(SYNCOUTPUTSOURCE)\
mbed_official	125:23cc3068a9e4	1471	(((SYNCOUTPUTSOURCE) == HRTIM_SYNCOUTPUTSOURCE_MASTER_START) \|\| \
mbed_official	125:23cc3068a9e4	1472	((SYNCOUTPUTSOURCE) == HRTIM_SYNCOUTPUTSOURCE_MASTER_CMP1) \|\| \
mbed_official	125:23cc3068a9e4	1473	((SYNCOUTPUTSOURCE) == HRTIM_SYNCOUTPUTSOURCE_TIMA_START) \|\| \
mbed_official	125:23cc3068a9e4	1474	((SYNCOUTPUTSOURCE) == HRTIM_SYNCOUTPUTSOURCE_TIMA_CMP1))
mbed_official	125:23cc3068a9e4	1475	/**
mbed_official	125:23cc3068a9e4	1476	* @}
mbed_official	125:23cc3068a9e4	1477	*/
mbed_official	125:23cc3068a9e4	1478
mbed_official	125:23cc3068a9e4	1479	/** @defgroup HRTIM_SynchronizationOutputPolarity
mbed_official	125:23cc3068a9e4	1480	* @{
mbed_official	125:23cc3068a9e4	1481	* @brief Constants defining the routing and conditioning of the synchronization output event
mbed_official	125:23cc3068a9e4	1482	*/
mbed_official	125:23cc3068a9e4	1483	#define HRTIM_SYNCOUTPUTPOLARITY_NONE (uint32_t)0x00000000 /!< Synchronization output event is disabled /
mbed_official	125:23cc3068a9e4	1484	#define HRTIM_SYNCOUTPUTPOLARITY_POSITIVE (HRTIM_MCR_SYNC_OUT_0) /!< Positive pulse on SCOUT output (16x fHRTIM clock cycles) /
mbed_official	125:23cc3068a9e4	1485	#define HRTIM_SYNCOUTPUTPOLARITY_NEGATIVE (HRTIM_MCR_SYNC_OUT_1 \| HRTIM_MCR_SYNC_OUT_0) /!< Positive pulse on SCOUT output (16x fHRTIM clock cycles) /
mbed_official	125:23cc3068a9e4	1486
mbed_official	125:23cc3068a9e4	1487	#define IS_HRTIM_SYNCOUTPUTPOLARITY(SYNCOUTPUTPOLARITY)\
mbed_official	125:23cc3068a9e4	1488	(((SYNCOUTPUTPOLARITY) == HRTIM_SYNCOUTPUTPOLARITY_NONE) \|\| \
mbed_official	125:23cc3068a9e4	1489	((SYNCOUTPUTPOLARITY) == HRTIM_SYNCOUTPUTPOLARITY_POSITIVE) \|\| \
mbed_official	125:23cc3068a9e4	1490	((SYNCOUTPUTPOLARITY) == HRTIM_SYNCOUTPUTPOLARITY_NEGATIVE))
mbed_official	125:23cc3068a9e4	1491	/**
mbed_official	125:23cc3068a9e4	1492	* @}
mbed_official	125:23cc3068a9e4	1493	*/
mbed_official	125:23cc3068a9e4	1494
mbed_official	125:23cc3068a9e4	1495	/** @defgroup HRTIM_ExternalEventSources
mbed_official	125:23cc3068a9e4	1496	* @{
mbed_official	125:23cc3068a9e4	1497	* @brief Constants defining available sources associated to external events
mbed_official	125:23cc3068a9e4	1498	*/
mbed_official	125:23cc3068a9e4	1499	#define HRTIM_EVENTSRC_1 ((uint32_t)0x00000000) /!< External event source 1 /
mbed_official	125:23cc3068a9e4	1500	#define HRTIM_EVENTSRC_2 (HRTIM_EECR1_EE1SRC_0) /!< External event source 2 /
mbed_official	125:23cc3068a9e4	1501	#define HRTIM_EVENTSRC_3 (HRTIM_EECR1_EE1SRC_1) /!< External event source 3 /
mbed_official	125:23cc3068a9e4	1502	#define HRTIM_EVENTSRC_4 (HRTIM_EECR1_EE1SRC_1 \| HRTIM_EECR1_EE1SRC_0) /!< External event source 4 /
mbed_official	125:23cc3068a9e4	1503
mbed_official	125:23cc3068a9e4	1504	#define IS_HRTIM_EVENTSRC(EVENTSRC)\
mbed_official	125:23cc3068a9e4	1505	(((EVENTSRC) == HRTIM_EVENTSRC_1) \|\| \
mbed_official	125:23cc3068a9e4	1506	((EVENTSRC) == HRTIM_EVENTSRC_2) \|\| \
mbed_official	125:23cc3068a9e4	1507	((EVENTSRC) == HRTIM_EVENTSRC_3) \|\| \
mbed_official	125:23cc3068a9e4	1508	((EVENTSRC) == HRTIM_EVENTSRC_4))
mbed_official	125:23cc3068a9e4	1509	/**
mbed_official	125:23cc3068a9e4	1510	* @}
mbed_official	125:23cc3068a9e4	1511	*/
mbed_official	125:23cc3068a9e4	1512
mbed_official	125:23cc3068a9e4	1513	/** @defgroup HRTIM_ExternalEventPolarity
mbed_official	125:23cc3068a9e4	1514	* @{
mbed_official	125:23cc3068a9e4	1515	* @brief Constants defining the polarity of an external event
mbed_official	125:23cc3068a9e4	1516	*/
mbed_official	125:23cc3068a9e4	1517	#define HRTIM_EVENTPOLARITY_HIGH ((uint32_t)0x00000000) /!< External event is active high /
mbed_official	125:23cc3068a9e4	1518	#define HRTIM_EVENTPOLARITY_LOW (HRTIM_EECR1_EE1POL) /!< External event is active low /
mbed_official	125:23cc3068a9e4	1519
mbed_official	125:23cc3068a9e4	1520	#define IS_HRTIM_EVENTPOLARITY(EVENTPOLARITY)\
mbed_official	125:23cc3068a9e4	1521	(((EVENTPOLARITY) == HRTIM_EVENTPOLARITY_HIGH) \|\| \
mbed_official	125:23cc3068a9e4	1522	((EVENTPOLARITY) == HRTIM_EVENTPOLARITY_LOW))
mbed_official	125:23cc3068a9e4	1523	/**
mbed_official	125:23cc3068a9e4	1524	* @}
mbed_official	125:23cc3068a9e4	1525	*/
mbed_official	125:23cc3068a9e4	1526
mbed_official	125:23cc3068a9e4	1527	/** @defgroup HRTIM_ExternalEventSensitivity
mbed_official	125:23cc3068a9e4	1528	* @{
mbed_official	125:23cc3068a9e4	1529	* @brief Constants defining the sensitivity (level-sensitive or edge-sensitive)
mbed_official	125:23cc3068a9e4	1530	* of an external event
mbed_official	125:23cc3068a9e4	1531	*/
mbed_official	125:23cc3068a9e4	1532	#define HRTIM_EVENTSENSITIVITY_LEVEL ((uint32_t)0x00000000) /!< External event is active on level /
mbed_official	125:23cc3068a9e4	1533	#define HRTIM_EVENTSENSITIVITY_RISINGEDGE (HRTIM_EECR1_EE1SNS_0) /!< External event is active on Rising edge /
mbed_official	125:23cc3068a9e4	1534	#define HRTIM_EVENTSENSITIVITY_FALLINGEDGE (HRTIM_EECR1_EE1SNS_1) /!< External event is active on Falling edge /
mbed_official	125:23cc3068a9e4	1535	#define HRTIM_EVENTSENSITIVITY_BOTHEDGES (HRTIM_EECR1_EE1SNS_1 \| HRTIM_EECR1_EE1SNS_0) /!< External event is active on Rising and Falling edges /
mbed_official	125:23cc3068a9e4	1536
mbed_official	125:23cc3068a9e4	1537	#define IS_HRTIM_EVENTSENSITIVITY(EVENTSENSITIVITY)\
mbed_official	125:23cc3068a9e4	1538	(((EVENTSENSITIVITY) == HRTIM_EVENTSENSITIVITY_LEVEL) \|\| \
mbed_official	125:23cc3068a9e4	1539	((EVENTSENSITIVITY) == HRTIM_EVENTSENSITIVITY_RISINGEDGE) \|\| \
mbed_official	125:23cc3068a9e4	1540	((EVENTSENSITIVITY) == HRTIM_EVENTSENSITIVITY_FALLINGEDGE) \|\| \
mbed_official	125:23cc3068a9e4	1541	((EVENTSENSITIVITY) == HRTIM_EVENTSENSITIVITY_BOTHEDGES))
mbed_official	125:23cc3068a9e4	1542	/**
mbed_official	125:23cc3068a9e4	1543	* @}
mbed_official	125:23cc3068a9e4	1544	*/
mbed_official	125:23cc3068a9e4	1545
mbed_official	125:23cc3068a9e4	1546	/** @defgroup HRTIM_ExternalEventFastMode
mbed_official	125:23cc3068a9e4	1547	* @{
mbed_official	125:23cc3068a9e4	1548	* @brief Constants defining whether or not an external event is programmed in
mbed_official	125:23cc3068a9e4	1549	fast mode
mbed_official	125:23cc3068a9e4	1550	*/
mbed_official	125:23cc3068a9e4	1551	#define HRTIM_EVENTFASTMODE_DISABLE ((uint32_t)0x00000000) /!< External Event is acting asynchronously on outputs (low latency mode) /
mbed_official	125:23cc3068a9e4	1552	#define HRTIM_EVENTFASTMODE_ENABLE (HRTIM_EECR1_EE1FAST) /!< External Event is re-synchronized by the HRTIM logic before acting on outputs /
mbed_official	125:23cc3068a9e4	1553
mbed_official	125:23cc3068a9e4	1554	#define IS_HRTIM_EVENTFASTMODE(EVENTFASTMODE)\
mbed_official	125:23cc3068a9e4	1555	(((EVENTFASTMODE) == HRTIM_EVENTFASTMODE_ENABLE) \|\| \
mbed_official	125:23cc3068a9e4	1556	((EVENTFASTMODE) == HRTIM_EVENTFASTMODE_DISABLE))
mbed_official	125:23cc3068a9e4	1557
mbed_official	125:23cc3068a9e4	1558	#define IS_HRTIM_FASTMODE_AVAILABLE(EVENT)\
mbed_official	125:23cc3068a9e4	1559	(((EVENT) == HRTIM_EVENT_1) \|\| \
mbed_official	125:23cc3068a9e4	1560	((EVENT) == HRTIM_EVENT_2) \|\| \
mbed_official	125:23cc3068a9e4	1561	((EVENT) == HRTIM_EVENT_3) \|\| \
mbed_official	125:23cc3068a9e4	1562	((EVENT) == HRTIM_EVENT_4) \|\| \
mbed_official	125:23cc3068a9e4	1563	((EVENT) == HRTIM_EVENT_5))
mbed_official	125:23cc3068a9e4	1564	/**
mbed_official	125:23cc3068a9e4	1565	* @}
mbed_official	125:23cc3068a9e4	1566	*/
mbed_official	125:23cc3068a9e4	1567
mbed_official	125:23cc3068a9e4	1568	/** @defgroup HRTIM_ExternalEventFilter
mbed_official	125:23cc3068a9e4	1569	* @{
mbed_official	125:23cc3068a9e4	1570	* @brief Constants defining the frequency used to sample an external event 6
mbed_official	125:23cc3068a9e4	1571	* input and the length (N) of the digital filter applied
mbed_official	125:23cc3068a9e4	1572	*/
mbed_official	125:23cc3068a9e4	1573	#define HRTIM_EVENTFILTER_NONE ((uint32_t)0x00000000) /!< Filter disabled /
mbed_official	125:23cc3068a9e4	1574	#define HRTIM_EVENTFILTER_1 (HRTIM_EECR3_EE6F_0) /!< fSAMPLING= fHRTIM, N=2 /
mbed_official	125:23cc3068a9e4	1575	#define HRTIM_EVENTFILTER_2 (HRTIM_EECR3_EE6F_1) /!< fSAMPLING= fHRTIM, N=4 /
mbed_official	125:23cc3068a9e4	1576	#define HRTIM_EVENTFILTER_3 (HRTIM_EECR3_EE6F_1 \| HRTIM_EECR3_EE6F_0) /!< fSAMPLING= fHRTIM, N=8 /
mbed_official	125:23cc3068a9e4	1577	#define HRTIM_EVENTFILTER_4 (HRTIM_EECR3_EE6F_2) /!< fSAMPLING= fEEVS/2, N=6 /
mbed_official	125:23cc3068a9e4	1578	#define HRTIM_EVENTFILTER_5 (HRTIM_EECR3_EE6F_2 \| HRTIM_EECR3_EE6F_0) /!< fSAMPLING= fEEVS/2, N=8 /
mbed_official	125:23cc3068a9e4	1579	#define HRTIM_EVENTFILTER_6 (HRTIM_EECR3_EE6F_2 \| HRTIM_EECR3_EE6F_1) /!< fSAMPLING= fEEVS/4, N=6 /
mbed_official	125:23cc3068a9e4	1580	#define HRTIM_EVENTFILTER_7 (HRTIM_EECR3_EE6F_2 \| HRTIM_EECR3_EE6F_1 \| HRTIM_EECR3_EE6F_0) /!< fSAMPLING= fEEVS/4, N=8 /
mbed_official	125:23cc3068a9e4	1581	#define HRTIM_EVENTFILTER_8 (HRTIM_EECR3_EE6F_3) /!< fSAMPLING= fEEVS/8, N=6 /
mbed_official	125:23cc3068a9e4	1582	#define HRTIM_EVENTFILTER_9 (HRTIM_EECR3_EE6F_3 \| HRTIM_EECR3_EE6F_0) /!< fSAMPLING= fEEVS/8, N=8 /
mbed_official	125:23cc3068a9e4	1583	#define HRTIM_EVENTFILTER_10 (HRTIM_EECR3_EE6F_3 \| HRTIM_EECR3_EE6F_1) /!< fSAMPLING= fEEVS/16, N=5 /
mbed_official	125:23cc3068a9e4	1584	#define HRTIM_EVENTFILTER_11 (HRTIM_EECR3_EE6F_3 \| HRTIM_EECR3_EE6F_1 \| HRTIM_EECR3_EE6F_0) /!< fSAMPLING= fEEVS/16, N=6 /
mbed_official	125:23cc3068a9e4	1585	#define HRTIM_EVENTFILTER_12 (HRTIM_EECR3_EE6F_3 \| HRTIM_EECR3_EE6F_2) /!< fSAMPLING= fEEVS/16, N=8 /
mbed_official	125:23cc3068a9e4	1586	#define HRTIM_EVENTFILTER_13 (HRTIM_EECR3_EE6F_3 \| HRTIM_EECR3_EE6F_2 \| HRTIM_EECR3_EE6F_0) /!< fSAMPLING= fEEVS/32, N=5 /
mbed_official	125:23cc3068a9e4	1587	#define HRTIM_EVENTFILTER_14 (HRTIM_EECR3_EE6F_3 \| HRTIM_EECR3_EE6F_2 \| HRTIM_EECR3_EE6F_1) /!< fSAMPLING= fEEVS/32, N=6 /
mbed_official	125:23cc3068a9e4	1588	#define HRTIM_EVENTFILTER_15 (HRTIM_EECR3_EE6F_3 \| HRTIM_EECR3_EE6F_2 \| HRTIM_EECR3_EE6F_1 \| HRTIM_EECR3_EE6F_0) /!< fSAMPLING= fEEVS/32, N=8 /
mbed_official	125:23cc3068a9e4	1589
mbed_official	125:23cc3068a9e4	1590	#define IS_HRTIM_EVENTFILTER(EVENTFILTER)\
mbed_official	125:23cc3068a9e4	1591	(((EVENTFILTER) == HRTIM_EVENTFILTER_NONE) \|\| \
mbed_official	125:23cc3068a9e4	1592	((EVENTFILTER) == HRTIM_EVENTFILTER_1) \|\| \
mbed_official	125:23cc3068a9e4	1593	((EVENTFILTER) == HRTIM_EVENTFILTER_2) \|\| \
mbed_official	125:23cc3068a9e4	1594	((EVENTFILTER) == HRTIM_EVENTFILTER_3) \|\| \
mbed_official	125:23cc3068a9e4	1595	((EVENTFILTER) == HRTIM_EVENTFILTER_4) \|\| \
mbed_official	125:23cc3068a9e4	1596	((EVENTFILTER) == HRTIM_EVENTFILTER_5) \|\| \
mbed_official	125:23cc3068a9e4	1597	((EVENTFILTER) == HRTIM_EVENTFILTER_6) \|\| \
mbed_official	125:23cc3068a9e4	1598	((EVENTFILTER) == HRTIM_EVENTFILTER_7) \|\| \
mbed_official	125:23cc3068a9e4	1599	((EVENTFILTER) == HRTIM_EVENTFILTER_8) \|\| \
mbed_official	125:23cc3068a9e4	1600	((EVENTFILTER) == HRTIM_EVENTFILTER_9) \|\| \
mbed_official	125:23cc3068a9e4	1601	((EVENTFILTER) == HRTIM_EVENTFILTER_10) \|\| \
mbed_official	125:23cc3068a9e4	1602	((EVENTFILTER) == HRTIM_EVENTFILTER_11) \|\| \
mbed_official	125:23cc3068a9e4	1603	((EVENTFILTER) == HRTIM_EVENTFILTER_12) \|\| \
mbed_official	125:23cc3068a9e4	1604	((EVENTFILTER) == HRTIM_EVENTFILTER_13) \|\| \
mbed_official	125:23cc3068a9e4	1605	((EVENTFILTER) == HRTIM_EVENTFILTER_14) \|\| \
mbed_official	125:23cc3068a9e4	1606	((EVENTFILTER) == HRTIM_EVENTFILTER_15))
mbed_official	125:23cc3068a9e4	1607	/**
mbed_official	125:23cc3068a9e4	1608	* @}
mbed_official	125:23cc3068a9e4	1609	*/
mbed_official	125:23cc3068a9e4	1610
mbed_official	125:23cc3068a9e4	1611	/** @defgroup HRTIM_ ExternalEventPrescaler
mbed_official	125:23cc3068a9e4	1612	* @{
mbed_official	125:23cc3068a9e4	1613	* @brief Constants defining division ratio between the timer clock frequency
mbed_official	125:23cc3068a9e4	1614	* fHRTIM) and the external event signal sampling clock (fEEVS)
mbed_official	125:23cc3068a9e4	1615	* used by the digital filters
mbed_official	125:23cc3068a9e4	1616	*/
mbed_official	125:23cc3068a9e4	1617	#define HRTIM_EVENTPRESCALER_DIV1 ((uint32_t)0x00000000) /!< fEEVS=fHRTIM /
mbed_official	125:23cc3068a9e4	1618	#define HRTIM_EVENTPRESCALER_DIV2 (HRTIM_EECR3_EEVSD_0) /!< fEEVS=fHRTIM / 2 /
mbed_official	125:23cc3068a9e4	1619	#define HRTIM_EVENTPRESCALER_DIV4 (HRTIM_EECR3_EEVSD_1) /!< fEEVS=fHRTIM / 4 /
mbed_official	125:23cc3068a9e4	1620	#define HRTIM_EVENTPRESCALER_DIV8 (HRTIM_EECR3_EEVSD_1 \| HRTIM_EECR3_EEVSD_0) /!< fEEVS=fHRTIM / 8 /
mbed_official	125:23cc3068a9e4	1621
mbed_official	125:23cc3068a9e4	1622	#define IS_HRTIM_EVENTPRESCALER(EVENTPRESCALER)\
mbed_official	125:23cc3068a9e4	1623	(((EVENTPRESCALER) == HRTIM_EVENTPRESCALER_DIV1) \|\| \
mbed_official	125:23cc3068a9e4	1624	((EVENTPRESCALER) == HRTIM_EVENTPRESCALER_DIV2) \|\| \
mbed_official	125:23cc3068a9e4	1625	((EVENTPRESCALER) == HRTIM_EVENTPRESCALER_DIV4) \|\| \
mbed_official	125:23cc3068a9e4	1626	((EVENTPRESCALER) == HRTIM_EVENTPRESCALER_DIV8))
mbed_official	125:23cc3068a9e4	1627	/**
mbed_official	125:23cc3068a9e4	1628	* @}
mbed_official	125:23cc3068a9e4	1629	*/
mbed_official	125:23cc3068a9e4	1630
mbed_official	125:23cc3068a9e4	1631	/** @defgroup HRTIM_FaultSources
mbed_official	125:23cc3068a9e4	1632	* @{
mbed_official	125:23cc3068a9e4	1633	* @brief Constants defining whether a faults is be triggered by any external
mbed_official	125:23cc3068a9e4	1634	* or internal fault source
mbed_official	125:23cc3068a9e4	1635	*/
mbed_official	125:23cc3068a9e4	1636	#define HRTIM_FAULTSOURCE_DIGITALINPUT ((uint32_t)0x00000000) /!< Fault input is FLT input pin /
mbed_official	125:23cc3068a9e4	1637	#define HRTIM_FAULTSOURCE_INTERNAL (HRTIM_FLTINR1_FLT1SRC) /!< Fault input is FLT_Int signal (e.g. internal comparator) /
mbed_official	125:23cc3068a9e4	1638
mbed_official	125:23cc3068a9e4	1639
mbed_official	125:23cc3068a9e4	1640	#define IS_HRTIM_FAULTSOURCE(FAULTSOURCE)\
mbed_official	125:23cc3068a9e4	1641	(((FAULTSOURCE) == HRTIM_FAULTSOURCE_DIGITALINPUT) \|\| \
mbed_official	125:23cc3068a9e4	1642	((FAULTSOURCE) == HRTIM_FAULTSOURCE_INTERNAL))
mbed_official	125:23cc3068a9e4	1643	/**
mbed_official	125:23cc3068a9e4	1644	* @}
mbed_official	125:23cc3068a9e4	1645	*/
mbed_official	125:23cc3068a9e4	1646
mbed_official	125:23cc3068a9e4	1647	/** @defgroup HRTIM_FaultPolarity
mbed_official	125:23cc3068a9e4	1648	* @{
mbed_official	125:23cc3068a9e4	1649	* @brief Constants defining the polarity of a fault event
mbed_official	125:23cc3068a9e4	1650	*/
mbed_official	125:23cc3068a9e4	1651	#define HRTIM_FAULTPOLARITY_LOW ((uint32_t)0x00000000) /!< Fault input is active low /
mbed_official	125:23cc3068a9e4	1652	#define HRTIM_FAULTPOLARITY_HIGH (HRTIM_FLTINR1_FLT1P) /!< Fault input is active high /
mbed_official	125:23cc3068a9e4	1653
mbed_official	125:23cc3068a9e4	1654	#define IS_HRTIM_FAULTPOLARITY(HRTIM_FAULTPOLARITY)\
mbed_official	125:23cc3068a9e4	1655	(((HRTIM_FAULTPOLARITY) == HRTIM_FAULTPOLARITY_LOW) \|\| \
mbed_official	125:23cc3068a9e4	1656	((HRTIM_FAULTPOLARITY) == HRTIM_FAULTPOLARITY_HIGH))
mbed_official	125:23cc3068a9e4	1657	/**
mbed_official	125:23cc3068a9e4	1658	* @}
mbed_official	125:23cc3068a9e4	1659	*/
mbed_official	125:23cc3068a9e4	1660
mbed_official	125:23cc3068a9e4	1661	/** @defgroup HRTIM_FaultFilter
mbed_official	125:23cc3068a9e4	1662	* @{
mbed_official	125:23cc3068a9e4	1663	* @ brief Constants defining the frequency used to sample the fault input and
mbed_official	125:23cc3068a9e4	1664	* the length (N) of the digital filter applied
mbed_official	125:23cc3068a9e4	1665	*/
mbed_official	125:23cc3068a9e4	1666	#define HRTIM_FAULTFILTER_NONE ((uint32_t)0x00000000) /!< Filter disabled /
mbed_official	125:23cc3068a9e4	1667	#define HRTIM_FAULTFILTER_1 (HRTIM_FLTINR1_FLT1F_0) /!< fSAMPLING= fHRTIM, N=2 /
mbed_official	125:23cc3068a9e4	1668	#define HRTIM_FAULTFILTER_2 (HRTIM_FLTINR1_FLT1F_1) /!< fSAMPLING= fHRTIM, N=4 /
mbed_official	125:23cc3068a9e4	1669	#define HRTIM_FAULTFILTER_3 (HRTIM_FLTINR1_FLT1F_1 \| HRTIM_FLTINR1_FLT1F_0) /!< fSAMPLING= fHRTIM, N=8 /
mbed_official	125:23cc3068a9e4	1670	#define HRTIM_FAULTFILTER_4 (HRTIM_FLTINR1_FLT1F_2) /!< fSAMPLING= fFLTS/2, N=6 /
mbed_official	125:23cc3068a9e4	1671	#define HRTIM_FAULTFILTER_5 (HRTIM_FLTINR1_FLT1F_2 \| HRTIM_FLTINR1_FLT1F_0) /!< fSAMPLING= fFLTS/2, N=8 /
mbed_official	125:23cc3068a9e4	1672	#define HRTIM_FAULTFILTER_6 (HRTIM_FLTINR1_FLT1F_2 \| HRTIM_FLTINR1_FLT1F_1) /!< fSAMPLING= fFLTS/4, N=6 /
mbed_official	125:23cc3068a9e4	1673	#define HRTIM_FAULTFILTER_7 (HRTIM_FLTINR1_FLT1F_2 \| HRTIM_FLTINR1_FLT1F_1 \| HRTIM_FLTINR1_FLT1F_0) /!< fSAMPLING= fFLTS/4, N=8 /
mbed_official	125:23cc3068a9e4	1674	#define HRTIM_FAULTFILTER_8 (HRTIM_FLTINR1_FLT1F_3) /!< fSAMPLING= fFLTS/8, N=6 /
mbed_official	125:23cc3068a9e4	1675	#define HRTIM_FAULTFILTER_9 (HRTIM_FLTINR1_FLT1F_3 \| HRTIM_FLTINR1_FLT1F_0) /!< fSAMPLING= fFLTS/8, N=8 /
mbed_official	125:23cc3068a9e4	1676	#define HRTIM_FAULTFILTER_10 (HRTIM_FLTINR1_FLT1F_3 \| HRTIM_FLTINR1_FLT1F_1) /!< fSAMPLING= fFLTS/16, N=5 /
mbed_official	125:23cc3068a9e4	1677	#define HRTIM_FAULTFILTER_11 (HRTIM_FLTINR1_FLT1F_3 \| HRTIM_FLTINR1_FLT1F_1 \| HRTIM_FLTINR1_FLT1F_0) /!< fSAMPLING= fFLTS/16, N=6 /
mbed_official	125:23cc3068a9e4	1678	#define HRTIM_FAULTFILTER_12 (HRTIM_FLTINR1_FLT1F_3 \| HRTIM_FLTINR1_FLT1F_2) /!< fSAMPLING= fFLTS/16, N=8 /
mbed_official	125:23cc3068a9e4	1679	#define HRTIM_FAULTFILTER_13 (HRTIM_FLTINR1_FLT1F_3 \| HRTIM_FLTINR1_FLT1F_2 \| HRTIM_FLTINR1_FLT1F_0) /!< fSAMPLING= fFLTS/32, N=5 /
mbed_official	125:23cc3068a9e4	1680	#define HRTIM_FAULTFILTER_14 (HRTIM_FLTINR1_FLT1F_3 \| HRTIM_FLTINR1_FLT1F_2 \| HRTIM_FLTINR1_FLT1F_1) /!< fSAMPLING= fFLTS/32, N=6 /
mbed_official	125:23cc3068a9e4	1681	#define HRTIM_FAULTFILTER_15 (HRTIM_FLTINR1_FLT1F_3 \| HRTIM_FLTINR1_FLT1F_2 \| HRTIM_FLTINR1_FLT1F_1 \| HRTIM_FLTINR1_FLT1F_0) /!< fSAMPLING= fFLTS/32, N=8 /
mbed_official	125:23cc3068a9e4	1682
mbed_official	125:23cc3068a9e4	1683	#define IS_HRTIM_FAULTFILTER(FAULTFILTER)\
mbed_official	125:23cc3068a9e4	1684	(((FAULTFILTER) == HRTIM_FAULTFILTER_NONE) \|\| \
mbed_official	125:23cc3068a9e4	1685	((FAULTFILTER) == HRTIM_FAULTFILTER_1) \|\| \
mbed_official	125:23cc3068a9e4	1686	((FAULTFILTER) == HRTIM_FAULTFILTER_2) \|\| \
mbed_official	125:23cc3068a9e4	1687	((FAULTFILTER) == HRTIM_FAULTFILTER_3) \|\| \
mbed_official	125:23cc3068a9e4	1688	((FAULTFILTER) == HRTIM_FAULTFILTER_4) \|\| \
mbed_official	125:23cc3068a9e4	1689	((FAULTFILTER) == HRTIM_FAULTFILTER_5) \|\| \
mbed_official	125:23cc3068a9e4	1690	((FAULTFILTER) == HRTIM_FAULTFILTER_6) \|\| \
mbed_official	125:23cc3068a9e4	1691	((FAULTFILTER) == HRTIM_FAULTFILTER_7) \|\| \
mbed_official	125:23cc3068a9e4	1692	((FAULTFILTER) == HRTIM_FAULTFILTER_8) \|\| \
mbed_official	125:23cc3068a9e4	1693	((FAULTFILTER) == HRTIM_FAULTFILTER_9) \|\| \
mbed_official	125:23cc3068a9e4	1694	((FAULTFILTER) == HRTIM_FAULTFILTER_10) \|\| \
mbed_official	125:23cc3068a9e4	1695	((FAULTFILTER) == HRTIM_FAULTFILTER_11) \|\| \
mbed_official	125:23cc3068a9e4	1696	((FAULTFILTER) == HRTIM_FAULTFILTER_12) \|\| \
mbed_official	125:23cc3068a9e4	1697	((FAULTFILTER) == HRTIM_FAULTFILTER_13) \|\| \
mbed_official	125:23cc3068a9e4	1698	((FAULTFILTER) == HRTIM_FAULTFILTER_14) \|\| \
mbed_official	125:23cc3068a9e4	1699	((FAULTFILTER) == HRTIM_FAULTFILTER_15))
mbed_official	125:23cc3068a9e4	1700	/**
mbed_official	125:23cc3068a9e4	1701	* @}
mbed_official	125:23cc3068a9e4	1702	*/
mbed_official	125:23cc3068a9e4	1703
mbed_official	125:23cc3068a9e4	1704	/** @defgroup HRTIM_FaultLock
mbed_official	125:23cc3068a9e4	1705	* @{
mbed_official	125:23cc3068a9e4	1706	* @brief Constants defining whether or not the fault programming bits are
mbed_official	125:23cc3068a9e4	1707	write protected
mbed_official	125:23cc3068a9e4	1708	*/
mbed_official	125:23cc3068a9e4	1709	#define HRTIM_FAULTLOCK_READWRITE ((uint32_t)0x00000000) /!< Fault settings bits are read/write /
mbed_official	125:23cc3068a9e4	1710	#define HRTIM_FAULTLOCK_READONLY (HRTIM_FLTINR1_FLT1LCK) /!< Fault settings bits are read only /
mbed_official	125:23cc3068a9e4	1711
mbed_official	125:23cc3068a9e4	1712	#define IS_HRTIM_FAULTLOCK(FAULTLOCK)\
mbed_official	125:23cc3068a9e4	1713	(((FAULTLOCK) == HRTIM_FAULTLOCK_READWRITE) \|\| \
mbed_official	125:23cc3068a9e4	1714	((FAULTLOCK) == HRTIM_FAULTLOCK_READONLY))
mbed_official	125:23cc3068a9e4	1715	/**
mbed_official	125:23cc3068a9e4	1716	* @}
mbed_official	125:23cc3068a9e4	1717	*/
mbed_official	125:23cc3068a9e4	1718
mbed_official	125:23cc3068a9e4	1719	/** @defgroup HRTIM_ExternalFaultPrescaler
mbed_official	125:23cc3068a9e4	1720	* @{
mbed_official	125:23cc3068a9e4	1721	* @brief Constants defining the division ratio between the timer clock
mbed_official	125:23cc3068a9e4	1722	* frequency (fHRTIM) and the fault signal sampling clock (fFLTS) used
mbed_official	125:23cc3068a9e4	1723	* by the digital filters.
mbed_official	125:23cc3068a9e4	1724	*/
mbed_official	125:23cc3068a9e4	1725	#define HRTIM_FAULTPRESCALER_DIV1 ((uint32_t)0x00000000) /!< fFLTS=fHRTIM /
mbed_official	125:23cc3068a9e4	1726	#define HRTIM_FAULTPRESCALER_DIV2 (HRTIM_FLTINR2_FLTSD_0) /!< fFLTS=fHRTIM / 2 /
mbed_official	125:23cc3068a9e4	1727	#define HRTIM_FAULTPRESCALER_DIV4 (HRTIM_FLTINR2_FLTSD_1) /!< fFLTS=fHRTIM / 4 /
mbed_official	125:23cc3068a9e4	1728	#define HRTIM_FAULTPRESCALER_DIV8 (HRTIM_FLTINR2_FLTSD_1 \| HRTIM_FLTINR2_FLTSD_0) /!< fFLTS=fHRTIM / 8 /
mbed_official	125:23cc3068a9e4	1729
mbed_official	125:23cc3068a9e4	1730	#define IS_HRTIM_FAULTPRESCALER(FAULTPRESCALER)\
mbed_official	125:23cc3068a9e4	1731	(((FAULTPRESCALER) == HRTIM_FAULTPRESCALER_DIV1) \|\| \
mbed_official	125:23cc3068a9e4	1732	((FAULTPRESCALER) == HRTIM_FAULTPRESCALER_DIV2) \|\| \
mbed_official	125:23cc3068a9e4	1733	((FAULTPRESCALER) == HRTIM_FAULTPRESCALER_DIV4) \|\| \
mbed_official	125:23cc3068a9e4	1734	((FAULTPRESCALER) == HRTIM_FAULTPRESCALER_DIV8))
mbed_official	125:23cc3068a9e4	1735	/**
mbed_official	125:23cc3068a9e4	1736	* @}
mbed_official	125:23cc3068a9e4	1737	*/
mbed_official	125:23cc3068a9e4	1738
mbed_official	125:23cc3068a9e4	1739	/** @defgroup HRTIM_BurstModeOperatingmode
mbed_official	125:23cc3068a9e4	1740	* @{
mbed_official	125:23cc3068a9e4	1741	* @brief Constants defining if the burst mode is entered once or if it is
mbed_official	125:23cc3068a9e4	1742	* continuously operating
mbed_official	125:23cc3068a9e4	1743	*/
mbed_official	125:23cc3068a9e4	1744	#define HRTIM_BURSTMODE_SINGLESHOT ((uint32_t)0x00000000) /!< Burst mode operates in single shot mode /
mbed_official	125:23cc3068a9e4	1745	#define HRTIM_BURSTMODE_CONTINOUS (HRTIM_BMCR_BMOM) /!< Burst mode operates in continuous mode /
mbed_official	125:23cc3068a9e4	1746
mbed_official	125:23cc3068a9e4	1747	#define IS_HRTIM_BURSTMODE(BURSTMODE)\
mbed_official	125:23cc3068a9e4	1748	(((BURSTMODE) == HRTIM_BURSTMODE_SINGLESHOT) \|\| \
mbed_official	125:23cc3068a9e4	1749	((BURSTMODE) == HRTIM_BURSTMODE_CONTINOUS))
mbed_official	125:23cc3068a9e4	1750	/**
mbed_official	125:23cc3068a9e4	1751	* @}
mbed_official	125:23cc3068a9e4	1752	*/
mbed_official	125:23cc3068a9e4	1753
mbed_official	125:23cc3068a9e4	1754	/** @defgroup HRTIM_BurstModeClockSource
mbed_official	125:23cc3068a9e4	1755	* @{
mbed_official	125:23cc3068a9e4	1756	* @brief Constants defining the clock source for the burst mode counter
mbed_official	125:23cc3068a9e4	1757	*/
mbed_official	125:23cc3068a9e4	1758	#define HRTIM_BURSTMODECLOCKSOURCE_MASTER ((uint32_t)0x00000000) /!< Master timer counter reset/roll-over is used as clock source for the burst mode counter /
mbed_official	125:23cc3068a9e4	1759	#define HRTIM_BURSTMODECLOCKSOURCE_TIMER_A (HRTIM_BMCR_BMCLK_0) /!< Timer A counter reset/roll-over is used as clock source for the burst mode counter /
mbed_official	125:23cc3068a9e4	1760	#define HRTIM_BURSTMODECLOCKSOURCE_TIMER_B (HRTIM_BMCR_BMCLK_1) /!< Timer B counter reset/roll-over is used as clock source for the burst mode counter /
mbed_official	125:23cc3068a9e4	1761	#define HRTIM_BURSTMODECLOCKSOURCE_TIMER_C (HRTIM_BMCR_BMCLK_1 \| HRTIM_BMCR_BMCLK_0) /!< Timer C counter reset/roll-over is used as clock source for the burst mode counter /
mbed_official	125:23cc3068a9e4	1762	#define HRTIM_BURSTMODECLOCKSOURCE_TIMER_D (HRTIM_BMCR_BMCLK_2) /!< Timer D counter reset/roll-over is used as clock source for the burst mode counter /
mbed_official	125:23cc3068a9e4	1763	#define HRTIM_BURSTMODECLOCKSOURCE_TIMER_E (HRTIM_BMCR_BMCLK_2 \| HRTIM_BMCR_BMCLK_0) /!< Timer E counter reset/roll-over is used as clock source for the burst mode counter /
mbed_official	125:23cc3068a9e4	1764	#define HRTIM_BURSTMODECLOCKSOURCE_ONCHIPEV_1 (HRTIM_BMCR_BMCLK_2 \| HRTIM_BMCR_BMCLK_1) /!< On-chip Event 1 (BMClk[1]), acting as a burst mode counter clock /
mbed_official	125:23cc3068a9e4	1765	#define HRTIM_BURSTMODECLOCKSOURCE_ONCHIPEV_2 (HRTIM_BMCR_BMCLK_2 \| HRTIM_BMCR_BMCLK_1 \| HRTIM_BMCR_BMCLK_0) /!< On-chip Event 2 (BMClk[2]), acting as a burst mode counter clock /
mbed_official	125:23cc3068a9e4	1766	#define HRTIM_BURSTMODECLOCKSOURCE_ONCHIPEV_3 (HRTIM_BMCR_BMCLK_3) /!< On-chip Event 3 (BMClk[3]), acting as a burst mode counter clock /
mbed_official	125:23cc3068a9e4	1767	#define HRTIM_BURSTMODECLOCKSOURCE_ONCHIPEV_4 (HRTIM_BMCR_BMCLK_3 \| HRTIM_BMCR_BMCLK_0) /!< On-chip Event 4 (BMClk[4]), acting as a burst mode counter clock /
mbed_official	125:23cc3068a9e4	1768	#define HRTIM_BURSTMODECLOCKSOURCE_FHRTIM (HRTIM_BMCR_BMCLK_3 \| HRTIM_BMCR_BMCLK_1) /!< Prescaled fHRTIM clock is used as clock source for the burst mode counter /
mbed_official	125:23cc3068a9e4	1769
mbed_official	125:23cc3068a9e4	1770	#define IS_HRTIM_BURSTMODECLOCKSOURCE(BURSTMODECLOCKSOURCE)\
mbed_official	125:23cc3068a9e4	1771	(((BURSTMODECLOCKSOURCE) == HRTIM_BURSTMODECLOCKSOURCE_MASTER) \|\| \
mbed_official	125:23cc3068a9e4	1772	((BURSTMODECLOCKSOURCE) == HRTIM_BURSTMODECLOCKSOURCE_TIMER_A) \|\| \
mbed_official	125:23cc3068a9e4	1773	((BURSTMODECLOCKSOURCE) == HRTIM_BURSTMODECLOCKSOURCE_TIMER_B) \|\| \
mbed_official	125:23cc3068a9e4	1774	((BURSTMODECLOCKSOURCE) == HRTIM_BURSTMODECLOCKSOURCE_TIMER_C) \|\| \
mbed_official	125:23cc3068a9e4	1775	((BURSTMODECLOCKSOURCE) == HRTIM_BURSTMODECLOCKSOURCE_TIMER_D) \|\| \
mbed_official	125:23cc3068a9e4	1776	((BURSTMODECLOCKSOURCE) == HRTIM_BURSTMODECLOCKSOURCE_TIMER_E) \|\| \
mbed_official	125:23cc3068a9e4	1777	((BURSTMODECLOCKSOURCE) == HRTIM_BURSTMODECLOCKSOURCE_ONCHIPEV_1) \|\| \
mbed_official	125:23cc3068a9e4	1778	((BURSTMODECLOCKSOURCE) == HRTIM_BURSTMODECLOCKSOURCE_ONCHIPEV_2) \|\| \
mbed_official	125:23cc3068a9e4	1779	((BURSTMODECLOCKSOURCE) == HRTIM_BURSTMODECLOCKSOURCE_ONCHIPEV_3) \|\| \
mbed_official	125:23cc3068a9e4	1780	((BURSTMODECLOCKSOURCE) == HRTIM_BURSTMODECLOCKSOURCE_ONCHIPEV_4) \|\| \
mbed_official	125:23cc3068a9e4	1781	((BURSTMODECLOCKSOURCE) == HRTIM_BURSTMODECLOCKSOURCE_FHRTIM))
mbed_official	125:23cc3068a9e4	1782	/**
mbed_official	125:23cc3068a9e4	1783	* @}
mbed_official	125:23cc3068a9e4	1784	*/
mbed_official	125:23cc3068a9e4	1785
mbed_official	125:23cc3068a9e4	1786	/** @defgroup HRTIM_BurstModePrescaler
mbed_official	125:23cc3068a9e4	1787	* @{
mbed_official	125:23cc3068a9e4	1788	* @brief Constants defining the prescaling ratio of the fHRTIM clock
mbed_official	125:23cc3068a9e4	1789	* for the burst mode controller
mbed_official	125:23cc3068a9e4	1790	*/
mbed_official	125:23cc3068a9e4	1791	#define HRTIM_BURSTMODEPRESCALER_DIV1 ((uint32_t)0x00000000) /!< fBRST = fHRTIM /
mbed_official	125:23cc3068a9e4	1792	#define HRTIM_BURSTMODEPRESCALER_DIV2 (HRTIM_BMCR_BMPSC_0) /!< fBRST = fHRTIM/2 /
mbed_official	125:23cc3068a9e4	1793	#define HRTIM_BURSTMODEPRESCALER_DIV4 (HRTIM_BMCR_BMPSC_1) /!< fBRST = fHRTIM/4 /
mbed_official	125:23cc3068a9e4	1794	#define HRTIM_BURSTMODEPRESCALER_DIV8 (HRTIM_BMCR_BMPSC_1 \| HRTIM_BMCR_BMPSC_0) /!< fBRST = fHRTIM/8 /
mbed_official	125:23cc3068a9e4	1795	#define HRTIM_BURSTMODEPRESCALER_DIV16 (HRTIM_BMCR_BMPSC_2) /!< fBRST = fHRTIM/16 /
mbed_official	125:23cc3068a9e4	1796	#define HRTIM_BURSTMODEPRESCALER_DIV32 (HRTIM_BMCR_BMPSC_2 \| HRTIM_BMCR_BMPSC_0) /!< fBRST = fHRTIM/32 /
mbed_official	125:23cc3068a9e4	1797	#define HRTIM_BURSTMODEPRESCALER_DIV64 (HRTIM_BMCR_BMPSC_2 \| HRTIM_BMCR_BMPSC_1) /!< fBRST = fHRTIM/64 /
mbed_official	125:23cc3068a9e4	1798	#define HRTIM_BURSTMODEPRESCALER_DIV128 (HRTIM_BMCR_BMPSC_2 \| HRTIM_BMCR_BMPSC_1 \| HRTIM_BMCR_BMPSC_0) /!< fBRST = fHRTIM/128 /
mbed_official	125:23cc3068a9e4	1799	#define HRTIM_BURSTMODEPRESCALER_DIV256 (HRTIM_BMCR_BMPSC_3) /!< fBRST = fHRTIM/256 /
mbed_official	125:23cc3068a9e4	1800	#define HRTIM_BURSTMODEPRESCALER_DIV512 (HRTIM_BMCR_BMPSC_3 \| HRTIM_BMCR_BMPSC_0) /!< fBRST = fHRTIM/512 /
mbed_official	125:23cc3068a9e4	1801	#define HRTIM_BURSTMODEPRESCALER_DIV1024 (HRTIM_BMCR_BMPSC_3 \| HRTIM_BMCR_BMPSC_1) /!< fBRST = fHRTIM/1024 /
mbed_official	125:23cc3068a9e4	1802	#define HRTIM_BURSTMODEPRESCALER_DIV2048 (HRTIM_BMCR_BMPSC_3 \| HRTIM_BMCR_BMPSC_1 \| HRTIM_BMCR_BMPSC_0) /!< fBRST = fHRTIM/2048/
mbed_official	125:23cc3068a9e4	1803	#define HRTIM_BURSTMODEPRESCALER_DIV4096 (HRTIM_BMCR_BMPSC_3 \| HRTIM_BMCR_BMPSC_2) /!< fBRST = fHRTIM/4096 /
mbed_official	125:23cc3068a9e4	1804	#define HRTIM_BURSTMODEPRESCALER_DIV8192 (HRTIM_BMCR_BMPSC_3 \| HRTIM_BMCR_BMPSC_2 \| HRTIM_BMCR_BMPSC_0) /!< fBRST = fHRTIM/8192 /
mbed_official	125:23cc3068a9e4	1805	#define HRTIM_BURSTMODEPRESCALER_DIV16384 (HRTIM_BMCR_BMPSC_3 \| HRTIM_BMCR_BMPSC_2 \| HRTIM_BMCR_BMPSC_1) /!< fBRST = fHRTIM/16384 /
mbed_official	125:23cc3068a9e4	1806	#define HRTIM_BURSTMODEPRESCALER_DIV32768 (HRTIM_BMCR_BMPSC_3 \| HRTIM_BMCR_BMPSC_2 \| HRTIM_BMCR_BMPSC_1 \| HRTIM_BMCR_BMPSC_0) /!< fBRST = fHRTIM/32768 /
mbed_official	125:23cc3068a9e4	1807
mbed_official	125:23cc3068a9e4	1808	#define IS_HRTIM_HRTIM_BURSTMODEPRESCALER(BURSTMODEPRESCALER)\
mbed_official	125:23cc3068a9e4	1809	(((BURSTMODEPRESCALER) == HRTIM_BURSTMODEPRESCALER_DIV1) \|\| \
mbed_official	125:23cc3068a9e4	1810	((BURSTMODEPRESCALER) == HRTIM_BURSTMODEPRESCALER_DIV2) \|\| \
mbed_official	125:23cc3068a9e4	1811	((BURSTMODEPRESCALER) == HRTIM_BURSTMODEPRESCALER_DIV4) \|\| \
mbed_official	125:23cc3068a9e4	1812	((BURSTMODEPRESCALER) == HRTIM_BURSTMODEPRESCALER_DIV8) \|\| \
mbed_official	125:23cc3068a9e4	1813	((BURSTMODEPRESCALER) == HRTIM_BURSTMODEPRESCALER_DIV16) \|\| \
mbed_official	125:23cc3068a9e4	1814	((BURSTMODEPRESCALER) == HRTIM_BURSTMODEPRESCALER_DIV32) \|\| \
mbed_official	125:23cc3068a9e4	1815	((BURSTMODEPRESCALER) == HRTIM_BURSTMODEPRESCALER_DIV64) \|\| \
mbed_official	125:23cc3068a9e4	1816	((BURSTMODEPRESCALER) == HRTIM_BURSTMODEPRESCALER_DIV128) \|\| \
mbed_official	125:23cc3068a9e4	1817	((BURSTMODEPRESCALER) == HRTIM_BURSTMODEPRESCALER_DIV256) \|\| \
mbed_official	125:23cc3068a9e4	1818	((BURSTMODEPRESCALER) == HRTIM_BURSTMODEPRESCALER_DIV512) \|\| \
mbed_official	125:23cc3068a9e4	1819	((BURSTMODEPRESCALER) == HRTIM_BURSTMODEPRESCALER_DIV1024) \|\| \
mbed_official	125:23cc3068a9e4	1820	((BURSTMODEPRESCALER) == HRTIM_BURSTMODEPRESCALER_DIV2048) \|\| \
mbed_official	125:23cc3068a9e4	1821	((BURSTMODEPRESCALER) == HRTIM_BURSTMODEPRESCALER_DIV4096) \|\| \
mbed_official	125:23cc3068a9e4	1822	((BURSTMODEPRESCALER) == HRTIM_BURSTMODEPRESCALER_DIV8192) \|\| \
mbed_official	125:23cc3068a9e4	1823	((BURSTMODEPRESCALER) == HRTIM_BURSTMODEPRESCALER_DIV16384) \|\| \
mbed_official	125:23cc3068a9e4	1824	((BURSTMODEPRESCALER) == HRTIM_BURSTMODEPRESCALER_DIV32768))
mbed_official	125:23cc3068a9e4	1825	/**
mbed_official	125:23cc3068a9e4	1826	* @}
mbed_official	125:23cc3068a9e4	1827	*/
mbed_official	125:23cc3068a9e4	1828
mbed_official	125:23cc3068a9e4	1829	/** @defgroup HRTIM_BurstModeRegisterPreloadEnable
mbed_official	125:23cc3068a9e4	1830	* @{
mbed_official	125:23cc3068a9e4	1831	* @brief Constants defining whether or not burst mode registers preload
mbed_official	125:23cc3068a9e4	1832	mechanism is enabled, i.e. a write access into a preloadable register
mbed_official	125:23cc3068a9e4	1833	(HRTIM_BMCMPR, HRTIM_BMPER) is done into the active or the preload register
mbed_official	125:23cc3068a9e4	1834	*/
mbed_official	125:23cc3068a9e4	1835	#define HRIM_BURSTMODEPRELOAD_DISABLED ((uint32_t)0x00000000) /!< Preload disabled: the write access is directly done into active registers /
mbed_official	125:23cc3068a9e4	1836	#define HRIM_BURSTMODEPRELOAD_ENABLED (HRTIM_BMCR_BMPREN) /!< Preload enabled: the write access is done into preload registers /
mbed_official	125:23cc3068a9e4	1837
mbed_official	125:23cc3068a9e4	1838	#define IS_HRTIM_BURSTMODEPRELOAD(BURSTMODEPRELOAD)\
mbed_official	125:23cc3068a9e4	1839	(((BURSTMODEPRELOAD) == HRIM_BURSTMODEPRELOAD_DISABLED) \|\| \
mbed_official	125:23cc3068a9e4	1840	((BURSTMODEPRELOAD) == HRIM_BURSTMODEPRELOAD_ENABLED))
mbed_official	125:23cc3068a9e4	1841	/**
mbed_official	125:23cc3068a9e4	1842	* @}
mbed_official	125:23cc3068a9e4	1843	*/
mbed_official	125:23cc3068a9e4	1844
mbed_official	125:23cc3068a9e4	1845	/** @defgroup HRTIM_BurstModeTrigger
mbed_official	125:23cc3068a9e4	1846	* @{
mbed_official	125:23cc3068a9e4	1847	* @brief Constants defining the events that can be used tor trig the burst
mbed_official	125:23cc3068a9e4	1848	* mode operation
mbed_official	125:23cc3068a9e4	1849	*/
mbed_official	125:23cc3068a9e4	1850	#define HRTIM_BURSTMODETRIGGER_SOFTWARE (uint32_t)0x00000000 /!< Software trigger /
mbed_official	125:23cc3068a9e4	1851	#define HRTIM_BURSTMODETRIGGER_MASTER_RESET (HRTIM_BMTRGR_MSTRST) /!< Master reset /
mbed_official	125:23cc3068a9e4	1852	#define HRTIM_BURSTMODETRIGGER_MASTER_REPETITION (HRTIM_BMTRGR_MSTREP) /!< Master repetition /
mbed_official	125:23cc3068a9e4	1853	#define HRTIM_BURSTMODETRIGGER_MASTER_CMP1 (HRTIM_BMTRGR_MSTCMP1) /!< Master compare 1 /
mbed_official	125:23cc3068a9e4	1854	#define HRTIM_BURSTMODETRIGGER_MASTER_CMP2 (HRTIM_BMTRGR_MSTCMP2) /!< Master compare 2 /
mbed_official	125:23cc3068a9e4	1855	#define HRTIM_BURSTMODETRIGGER_MASTER_CMP3 (HRTIM_BMTRGR_MSTCMP3) /!< Master compare 3 /
mbed_official	125:23cc3068a9e4	1856	#define HRTIM_BURSTMODETRIGGER_MASTER_CMP4 (HRTIM_BMTRGR_MSTCMP4) /!< Master compare 4 /
mbed_official	125:23cc3068a9e4	1857	#define HRTIM_BURSTMODETRIGGER_TIMERA_RESET (HRTIM_BMTRGR_TARST) /!< Timer A reset /
mbed_official	125:23cc3068a9e4	1858	#define HRTIM_BURSTMODETRIGGER_TIMERA_REPETITION (HRTIM_BMTRGR_TAREP) /!< Timer A repetition /
mbed_official	125:23cc3068a9e4	1859	#define HRTIM_BURSTMODETRIGGER_TIMERA_CMP1 (HRTIM_BMTRGR_TACMP1) /!< Timer A compare 1 /
mbed_official	125:23cc3068a9e4	1860	#define HRTIM_BURSTMODETRIGGER_TIMERA_CMP2 (HRTIM_BMTRGR_TACMP2) /!< Timer A compare 2 /
mbed_official	125:23cc3068a9e4	1861	#define HRTIM_BURSTMODETRIGGER_TIMERB_RESET (HRTIM_BMTRGR_TBRST) /!< Timer B reset /
mbed_official	125:23cc3068a9e4	1862	#define HRTIM_BURSTMODETRIGGER_TIMERB_REPETITION (HRTIM_BMTRGR_TBREP) /!< Timer B repetition /
mbed_official	125:23cc3068a9e4	1863	#define HRTIM_BURSTMODETRIGGER_TIMERB_CMP1 (HRTIM_BMTRGR_TBCMP1) /!< Timer B compare 1 /
mbed_official	125:23cc3068a9e4	1864	#define HRTIM_BURSTMODETRIGGER_TIMERB_CMP2 (HRTIM_BMTRGR_TBCMP2) /!< Timer B compare 2 /
mbed_official	125:23cc3068a9e4	1865	#define HRTIM_BURSTMODETRIGGER_TIMERC_RESET (HRTIM_BMTRGR_TCRST) /!< Timer C reset /
mbed_official	125:23cc3068a9e4	1866	#define HRTIM_BURSTMODETRIGGER_TIMERC_REPETITION (HRTIM_BMTRGR_TCREP) /!< Timer C repetition /
mbed_official	125:23cc3068a9e4	1867	#define HRTIM_BURSTMODETRIGGER_TIMERC_CMP1 (HRTIM_BMTRGR_TCCMP1) /!< Timer C compare 1 /
mbed_official	125:23cc3068a9e4	1868	#define HRTIM_BURSTMODETRIGGER_TIMERC_CMP2 (HRTIM_BMTRGR_TCCMP2) /!< Timer C compare 2 /
mbed_official	125:23cc3068a9e4	1869	#define HRTIM_BURSTMODETRIGGER_TIMERD_RESET (HRTIM_BMTRGR_TDRST) /!< Timer D reset /
mbed_official	125:23cc3068a9e4	1870	#define HRTIM_BURSTMODETRIGGER_TIMERD_REPETITION (HRTIM_BMTRGR_TDREP) /!< Timer D repetition /
mbed_official	125:23cc3068a9e4	1871	#define HRTIM_BURSTMODETRIGGER_TIMERD_CMP1 (HRTIM_BMTRGR_TDCMP1) /!< Timer D compare 1 /
mbed_official	125:23cc3068a9e4	1872	#define HRTIM_BURSTMODETRIGGER_TIMERD_CMP2 (HRTIM_BMTRGR_TDCMP2) /!< Timer D compare 2 /
mbed_official	125:23cc3068a9e4	1873	#define HRTIM_BURSTMODETRIGGER_TIMERE_RESET (HRTIM_BMTRGR_TERST) /!< Timer E reset /
mbed_official	125:23cc3068a9e4	1874	#define HRTIM_BURSTMODETRIGGER_TIMERE_REPETITION (HRTIM_BMTRGR_TEREP) /!< Timer E repetition /
mbed_official	125:23cc3068a9e4	1875	#define HRTIM_BURSTMODETRIGGER_TIMERE_CMP1 (HRTIM_BMTRGR_TECMP1) /!< Timer E compare 1 /
mbed_official	125:23cc3068a9e4	1876	#define HRTIM_BURSTMODETRIGGER_TIMERE_CMP2 (HRTIM_BMTRGR_TECMP2) /!< Timer E compare 2 /
mbed_official	125:23cc3068a9e4	1877	#define HRTIM_BURSTMODETRIGGER_TIMERA_EVENT7 (HRTIM_BMTRGR_TAEEV7) /!< Timer A period following External Event 7 /
mbed_official	125:23cc3068a9e4	1878	#define HRTIM_BURSTMODETRIGGER_TIMERD_EVENT8 (HRTIM_BMTRGR_TDEEV8) /!< Timer D period following External Event 8 /
mbed_official	125:23cc3068a9e4	1879	#define HRTIM_BURSTMODETRIGGER_EVENT_7 (HRTIM_BMTRGR_EEV7) /!< External Event 7 /
mbed_official	125:23cc3068a9e4	1880	#define HRTIM_BURSTMODETRIGGER_EVENT_8 (HRTIM_BMTRGR_EEV8) /!< External Event 8 /
mbed_official	125:23cc3068a9e4	1881	#define HRTIM_BURSTMODETRIGGER_EVENT_ONCHIP (HRTIM_BMTRGR_OCHPEV) /!< On-chip Event /
mbed_official	125:23cc3068a9e4	1882
mbed_official	125:23cc3068a9e4	1883	#define IS_HRTIM_BURSTMODETRIGGER(BURSTMODETRIGGER)\
mbed_official	125:23cc3068a9e4	1884	(((BURSTMODETRIGGER) == HRTIM_BURSTMODETRIGGER_NONE) \|\| \
mbed_official	125:23cc3068a9e4	1885	((BURSTMODETRIGGER) == HRTIM_BURSTMODETRIGGER_MASTER_RESET) \|\| \
mbed_official	125:23cc3068a9e4	1886	((BURSTMODETRIGGER) == HRTIM_BURSTMODETRIGGER_MASTER_REPETITION) \|\| \
mbed_official	125:23cc3068a9e4	1887	((BURSTMODETRIGGER) == HRTIM_BURSTMODETRIGGER_MASTER_CMP1) \|\| \
mbed_official	125:23cc3068a9e4	1888	((BURSTMODETRIGGER) == HRTIM_BURSTMODETRIGGER_MASTER_CMP2) \|\| \
mbed_official	125:23cc3068a9e4	1889	((BURSTMODETRIGGER) == HRTIM_BURSTMODETRIGGER_MASTER_CMP3) \|\| \
mbed_official	125:23cc3068a9e4	1890	((BURSTMODETRIGGER) == HRTIM_BURSTMODETRIGGER_MASTER_CMP4) \|\| \
mbed_official	125:23cc3068a9e4	1891	((BURSTMODETRIGGER) == HRTIM_BURSTMODETRIGGER_TIMERA_RESET) \|\| \
mbed_official	125:23cc3068a9e4	1892	((BURSTMODETRIGGER) == HRTIM_BURSTMODETRIGGER_TIMERA_REPETITION) \|\| \
mbed_official	125:23cc3068a9e4	1893	((BURSTMODETRIGGER) == HRTIM_BURSTMODETRIGGER_TIMERA_CMP1) \|\| \
mbed_official	125:23cc3068a9e4	1894	((BURSTMODETRIGGER) == HRTIM_BURSTMODETRIGGER_TIMERA_CMP2) \|\| \
mbed_official	125:23cc3068a9e4	1895	((BURSTMODETRIGGER) == HRTIM_BURSTMODETRIGGER_TIMERB_RESET) \|\| \
mbed_official	125:23cc3068a9e4	1896	((BURSTMODETRIGGER) == HRTIM_BURSTMODETRIGGER_TIMERB_REPETITION) \|\| \
mbed_official	125:23cc3068a9e4	1897	((BURSTMODETRIGGER) == HRTIM_BURSTMODETRIGGER_TIMERB_CMP1) \|\| \
mbed_official	125:23cc3068a9e4	1898	((BURSTMODETRIGGER) == HRTIM_BURSTMODETRIGGER_TIMERB_CMP2) \|\| \
mbed_official	125:23cc3068a9e4	1899	((BURSTMODETRIGGER) == HRTIM_BURSTMODETRIGGER_TIMERC_RESET) \|\| \
mbed_official	125:23cc3068a9e4	1900	((BURSTMODETRIGGER) == HRTIM_BURSTMODETRIGGER_TIMERC_REPETITION) \|\| \
mbed_official	125:23cc3068a9e4	1901	((BURSTMODETRIGGER) == HRTIM_BURSTMODETRIGGER_TIMERC_CMP1) \|\| \
mbed_official	125:23cc3068a9e4	1902	((BURSTMODETRIGGER) == HRTIM_BURSTMODETRIGGER_TIMERC_CMP2) \|\| \
mbed_official	125:23cc3068a9e4	1903	((BURSTMODETRIGGER) == HRTIM_BURSTMODETRIGGER_TIMERD_RESET) \|\| \
mbed_official	125:23cc3068a9e4	1904	((BURSTMODETRIGGER) == HRTIM_BURSTMODETRIGGER_TIMERD_REPETITION) \|\| \
mbed_official	125:23cc3068a9e4	1905	((BURSTMODETRIGGER) == HRTIM_BURSTMODETRIGGER_TIMERD_CMP1) \|\| \
mbed_official	125:23cc3068a9e4	1906	((BURSTMODETRIGGER) == HRTIM_BURSTMODETRIGGER_TIMERD_CMP2) \|\| \
mbed_official	125:23cc3068a9e4	1907	((BURSTMODETRIGGER) == HRTIM_BURSTMODETRIGGER_TIMERE_RESET) \|\| \
mbed_official	125:23cc3068a9e4	1908	((BURSTMODETRIGGER) == HRTIM_BURSTMODETRIGGER_TIMERE_REPETITION) \|\| \
mbed_official	125:23cc3068a9e4	1909	((BURSTMODETRIGGER) == HRTIM_BURSTMODETRIGGER_TIMERE_CMP1) \|\| \
mbed_official	125:23cc3068a9e4	1910	((BURSTMODETRIGGER) == HRTIM_BURSTMODETRIGGER_TIMERE_CMP2) \|\| \
mbed_official	125:23cc3068a9e4	1911	((BURSTMODETRIGGER) == HRTIM_BURSTMODETRIGGER_TIMERA_EVENT7) \|\| \
mbed_official	125:23cc3068a9e4	1912	((BURSTMODETRIGGER) == HRTIM_BURSTMODETRIGGER_TIMERD_EVENT8) \|\| \
mbed_official	125:23cc3068a9e4	1913	((BURSTMODETRIGGER) == HRTIM_BURSTMODETRIGGER_EVENT_7) \|\| \
mbed_official	125:23cc3068a9e4	1914	((BURSTMODETRIGGER) == HRTIM_BURSTMODETRIGGER_EVENT_8) \|\| \
mbed_official	125:23cc3068a9e4	1915	((BURSTMODETRIGGER) == HRTIM_BURSTMODETRIGGER_EVENT_ONCHIP))
mbed_official	125:23cc3068a9e4	1916	/**
mbed_official	125:23cc3068a9e4	1917	* @}
mbed_official	125:23cc3068a9e4	1918	*/
mbed_official	125:23cc3068a9e4	1919
mbed_official	125:23cc3068a9e4	1920	/** @defgroup HRTIM_ADCTriggerUpdateSource
mbed_official	125:23cc3068a9e4	1921	* @{
mbed_official	125:23cc3068a9e4	1922	* @brief constants defining the source triggering the update of the
mbed_official	125:23cc3068a9e4	1923	HRTIM_ADCxR register (transfer from preload to active register).
mbed_official	125:23cc3068a9e4	1924	*/
mbed_official	125:23cc3068a9e4	1925	#define HRTIM_ADCTRIGGERUPDATE_MASTER (uint32_t)0x00000000 /!< Master timer /
mbed_official	125:23cc3068a9e4	1926	#define HRTIM_ADCTRIGGERUPDATE_TIMER_A (HRTIM_CR1_ADC1USRC_0) /!< Timer A /
mbed_official	125:23cc3068a9e4	1927	#define HRTIM_ADCTRIGGERUPDATE_TIMER_B (HRTIM_CR1_ADC1USRC_1) /!< Timer B /
mbed_official	125:23cc3068a9e4	1928	#define HRTIM_ADCTRIGGERUPDATE_TIMER_C (HRTIM_CR1_ADC1USRC_1 \| HRTIM_CR1_ADC1USRC_0) /!< Timer C /
mbed_official	125:23cc3068a9e4	1929	#define HRTIM_ADCTRIGGERUPDATE_TIMER_D (HRTIM_CR1_ADC1USRC_2) /!< Timer D /
mbed_official	125:23cc3068a9e4	1930	#define HRTIM_ADCTRIGGERUPDATE_TIMER_E (HRTIM_CR1_ADC1USRC_2 \| HRTIM_CR1_ADC1USRC_0) /!< Timer E /
mbed_official	125:23cc3068a9e4	1931
mbed_official	125:23cc3068a9e4	1932	#define IS_HRTIM_ADCTRIGGERUPDATE(ADCTRIGGERUPDATE)\
mbed_official	125:23cc3068a9e4	1933	(((ADCTRIGGERUPDATE) == HRTIM_ADCTRIGGERUPDATE_MASTER) \|\| \
mbed_official	125:23cc3068a9e4	1934	((ADCTRIGGERUPDATE) == HRTIM_ADCTRIGGERUPDATE_TIMER_A) \|\| \
mbed_official	125:23cc3068a9e4	1935	((ADCTRIGGERUPDATE) == HRTIM_ADCTRIGGERUPDATE_TIMER_B) \|\| \
mbed_official	125:23cc3068a9e4	1936	((ADCTRIGGERUPDATE) == HRTIM_ADCTRIGGERUPDATE_TIMER_C) \|\| \
mbed_official	125:23cc3068a9e4	1937	((ADCTRIGGERUPDATE) == HRTIM_ADCTRIGGERUPDATE_TIMER_D) \|\| \
mbed_official	125:23cc3068a9e4	1938	((ADCTRIGGERUPDATE) == HRTIM_ADCTRIGGERUPDATE_TIMER_E))
mbed_official	125:23cc3068a9e4	1939	/**
mbed_official	125:23cc3068a9e4	1940	* @}
mbed_official	125:23cc3068a9e4	1941	*/
mbed_official	125:23cc3068a9e4	1942
mbed_official	125:23cc3068a9e4	1943	/** @defgroup HRTIM_ADCTriggerEvent
mbed_official	125:23cc3068a9e4	1944	* @{
mbed_official	125:23cc3068a9e4	1945	* @brief constants defining the events triggering ADC conversion.
mbed_official	125:23cc3068a9e4	1946	* HRTIM_ADCTRIGGEREVENT13_*: ADC Triggers 1 and 3
mbed_official	125:23cc3068a9e4	1947	* HRTIM_ADCTRIGGEREVENT24_*: ADC Triggers 2 and 4
mbed_official	125:23cc3068a9e4	1948	*/
mbed_official	125:23cc3068a9e4	1949	#define HRTIM_ADCTRIGGEREVENT13_NONE (uint32_t)0x00000000 /!< No ADC trigger event /
mbed_official	125:23cc3068a9e4	1950	#define HRTIM_ADCTRIGGEREVENT13_MASTER_CMP1 (HRTIM_ADC1R_AD1MC1) /!< ADC Trigger on master compare 1 /
mbed_official	125:23cc3068a9e4	1951	#define HRTIM_ADCTRIGGEREVENT13_MASTER_CMP2 (HRTIM_ADC1R_AD1MC2) /!< ADC Trigger on master compare 2 /
mbed_official	125:23cc3068a9e4	1952	#define HRTIM_ADCTRIGGEREVENT13_MASTER_CMP3 (HRTIM_ADC1R_AD1MC3) /!< ADC Trigger on master compare 3 /
mbed_official	125:23cc3068a9e4	1953	#define HRTIM_ADCTRIGGEREVENT13_MASTER_CMP4 (HRTIM_ADC1R_AD1MC4) /!< ADC Trigger on master compare 4 /
mbed_official	125:23cc3068a9e4	1954	#define HRTIM_ADCTRIGGEREVENT13_MASTER_PERIOD (HRTIM_ADC1R_AD1MPER) /!< ADC Trigger on master period /
mbed_official	125:23cc3068a9e4	1955	#define HRTIM_ADCTRIGGEREVENT13_EVENT_1 (HRTIM_ADC1R_AD1EEV1) /!< ADC Trigger on external event 1 /
mbed_official	125:23cc3068a9e4	1956	#define HRTIM_ADCTRIGGEREVENT13_EVENT_2 (HRTIM_ADC1R_AD1EEV2) /!< ADC Trigger on external event 2 /
mbed_official	125:23cc3068a9e4	1957	#define HRTIM_ADCTRIGGEREVENT13_EVENT_3 (HRTIM_ADC1R_AD1EEV3) /!< ADC Trigger on external event 3 /
mbed_official	125:23cc3068a9e4	1958	#define HRTIM_ADCTRIGGEREVENT13_EVENT_4 (HRTIM_ADC1R_AD1EEV4) /!< ADC Trigger on external event 4 /
mbed_official	125:23cc3068a9e4	1959	#define HRTIM_ADCTRIGGEREVENT13_EVENT_5 (HRTIM_ADC1R_AD1EEV5) /!< ADC Trigger on external event 5 /
mbed_official	125:23cc3068a9e4	1960	#define HRTIM_ADCTRIGGEREVENT13_TIMERA_CMP2 (HRTIM_ADC1R_AD1TAC2) /!< ADC Trigger on Timer A compare 2 /
mbed_official	125:23cc3068a9e4	1961	#define HRTIM_ADCTRIGGEREVENT13_TIMERA_CMP3 (HRTIM_ADC1R_AD1TAC3) /!< ADC Trigger on Timer A compare 3 /
mbed_official	125:23cc3068a9e4	1962	#define HRTIM_ADCTRIGGEREVENT13_TIMERA_CMP4 (HRTIM_ADC1R_AD1TAC4) /!< ADC Trigger on Timer A compare 4 /
mbed_official	125:23cc3068a9e4	1963	#define HRTIM_ADCTRIGGEREVENT13_TIMERA_PERIOD (HRTIM_ADC1R_AD1TAPER) /!< ADC Trigger on Timer A period /
mbed_official	125:23cc3068a9e4	1964	#define HRTIM_ADCTRIGGEREVENT13_TIMERA_RESET (HRTIM_ADC1R_AD1TARST) /!< ADC Trigger on Timer A reset /
mbed_official	125:23cc3068a9e4	1965	#define HRTIM_ADCTRIGGEREVENT13_TIMERB_CMP2 (HRTIM_ADC1R_AD1TBC2) /!< ADC Trigger on Timer B compare 2 /
mbed_official	125:23cc3068a9e4	1966	#define HRTIM_ADCTRIGGEREVENT13_TIMERB_CMP3 (HRTIM_ADC1R_AD1TBC3) /!< ADC Trigger on Timer B compare 3 /
mbed_official	125:23cc3068a9e4	1967	#define HRTIM_ADCTRIGGEREVENT13_TIMERB_CMP4 (HRTIM_ADC1R_AD1TBC4) /!< ADC Trigger on Timer B compare 4 /
mbed_official	125:23cc3068a9e4	1968	#define HRTIM_ADCTRIGGEREVENT13_TIMERB_PERIOD (HRTIM_ADC1R_AD1TBPER) /!< ADC Trigger on Timer B period /
mbed_official	125:23cc3068a9e4	1969	#define HRTIM_ADCTRIGGEREVENT13_TIMERB_RESET (HRTIM_ADC1R_AD1TBRST) /!< ADC Trigger on Timer B reset /
mbed_official	125:23cc3068a9e4	1970	#define HRTIM_ADCTRIGGEREVENT13_TIMERC_CMP2 (HRTIM_ADC1R_AD1TCC2) /!< ADC Trigger on Timer C compare 2 /
mbed_official	125:23cc3068a9e4	1971	#define HRTIM_ADCTRIGGEREVENT13_TIMERC_CMP3 (HRTIM_ADC1R_AD1TCC3) /!< ADC Trigger on Timer C compare 3 /
mbed_official	125:23cc3068a9e4	1972	#define HRTIM_ADCTRIGGEREVENT13_TIMERC_CMP4 (HRTIM_ADC1R_AD1TCC4) /!< ADC Trigger on Timer C compare 4 /
mbed_official	125:23cc3068a9e4	1973	#define HRTIM_ADCTRIGGEREVENT13_TIMERC_PERIOD (HRTIM_ADC1R_AD1TCPER) /!< ADC Trigger on Timer C period /
mbed_official	125:23cc3068a9e4	1974	#define HRTIM_ADCTRIGGEREVENT13_TIMERD_CMP2 (HRTIM_ADC1R_AD1TDC2) /!< ADC Trigger on Timer D compare 2 /
mbed_official	125:23cc3068a9e4	1975	#define HRTIM_ADCTRIGGEREVENT13_TIMERD_CMP3 (HRTIM_ADC1R_AD1TDC3) /!< ADC Trigger on Timer D compare 3 /
mbed_official	125:23cc3068a9e4	1976	#define HRTIM_ADCTRIGGEREVENT13_TIMERD_CMP4 (HRTIM_ADC1R_AD1TDC4) /!< ADC Trigger on Timer D compare 4 /
mbed_official	125:23cc3068a9e4	1977	#define HRTIM_ADCTRIGGEREVENT13_TIMERD_PERIOD (HRTIM_ADC1R_AD1TDPER) /!< ADC Trigger on Timer D period /
mbed_official	125:23cc3068a9e4	1978	#define HRTIM_ADCTRIGGEREVENT13_TIMERE_CMP2 (HRTIM_ADC1R_AD1TEC2) /!< ADC Trigger on Timer E compare 2 /
mbed_official	125:23cc3068a9e4	1979	#define HRTIM_ADCTRIGGEREVENT13_TIMERE_CMP3 (HRTIM_ADC1R_AD1TEC3) /!< ADC Trigger on Timer E compare 3 /
mbed_official	125:23cc3068a9e4	1980	#define HRTIM_ADCTRIGGEREVENT13_TIMERE_CMP4 (HRTIM_ADC1R_AD1TEC4) /!< ADC Trigger on Timer E compare 4 /
mbed_official	125:23cc3068a9e4	1981	#define HRTIM_ADCTRIGGEREVENT13_TIMERE_PERIOD (HRTIM_ADC1R_AD1TEPER) /!< ADC Trigger on Timer E period /
mbed_official	125:23cc3068a9e4	1982
mbed_official	125:23cc3068a9e4	1983	#define HRTIM_ADCTRIGGEREVENT24_NONE (uint32_t)0x00000000 /!< No ADC trigger event /
mbed_official	125:23cc3068a9e4	1984	#define HRTIM_ADCTRIGGEREVENT24_MASTER_CMP1 (HRTIM_ADC2R_AD2MC1) /!< ADC Trigger on master compare 1 /
mbed_official	125:23cc3068a9e4	1985	#define HRTIM_ADCTRIGGEREVENT24_MASTER_CMP2 (HRTIM_ADC2R_AD2MC2) /!< ADC Trigger on master compare 2 /
mbed_official	125:23cc3068a9e4	1986	#define HRTIM_ADCTRIGGEREVENT24_MASTER_CMP3 (HRTIM_ADC2R_AD2MC3) /!< ADC Trigger on master compare 3 /
mbed_official	125:23cc3068a9e4	1987	#define HRTIM_ADCTRIGGEREVENT24_MASTER_CMP4 (HRTIM_ADC2R_AD2MC4) /!< ADC Trigger on master compare 4 /
mbed_official	125:23cc3068a9e4	1988	#define HRTIM_ADCTRIGGEREVENT24_MASTER_PERIOD (HRTIM_ADC2R_AD2MPER) /!< ADC Trigger on master period /
mbed_official	125:23cc3068a9e4	1989	#define HRTIM_ADCTRIGGEREVENT24_EVENT_6 (HRTIM_ADC2R_AD2EEV6) /!< ADC Trigger on external event 6 /
mbed_official	125:23cc3068a9e4	1990	#define HRTIM_ADCTRIGGEREVENT24_EVENT_7 (HRTIM_ADC2R_AD2EEV7) /!< ADC Trigger on external event 7 /
mbed_official	125:23cc3068a9e4	1991	#define HRTIM_ADCTRIGGEREVENT24_EVENT_8 (HRTIM_ADC2R_AD2EEV8) /!< ADC Trigger on external event 8 /
mbed_official	125:23cc3068a9e4	1992	#define HRTIM_ADCTRIGGEREVENT24_EVENT_9 (HRTIM_ADC2R_AD2EEV9) /!< ADC Trigger on external event 9 /
mbed_official	125:23cc3068a9e4	1993	#define HRTIM_ADCTRIGGEREVENT24_EVENT_10 (HRTIM_ADC2R_AD2EEV10) /!< ADC Trigger on external event 10 /
mbed_official	125:23cc3068a9e4	1994	#define HRTIM_ADCTRIGGEREVENT24_TIMERA_CMP2 (HRTIM_ADC2R_AD2TAC2) /!< ADC Trigger on Timer A compare 2 /
mbed_official	125:23cc3068a9e4	1995	#define HRTIM_ADCTRIGGEREVENT24_TIMERA_CMP3 (HRTIM_ADC2R_AD2TAC3) /!< ADC Trigger on Timer A compare 3 /
mbed_official	125:23cc3068a9e4	1996	#define HRTIM_ADCTRIGGEREVENT24_TIMERA_CMP4 (HRTIM_ADC2R_AD2TAC4) /!< ADC Trigger on Timer A compare 4 /
mbed_official	125:23cc3068a9e4	1997	#define HRTIM_ADCTRIGGEREVENT24_TIMERA_PERIOD (HRTIM_ADC2R_AD2TAPER) /!< ADC Trigger on Timer A period /
mbed_official	125:23cc3068a9e4	1998	#define HRTIM_ADCTRIGGEREVENT24_TIMERB_CMP2 (HRTIM_ADC2R_AD2TBC2) /!< ADC Trigger on Timer B compare 2 /
mbed_official	125:23cc3068a9e4	1999	#define HRTIM_ADCTRIGGEREVENT24_TIMERB_CMP3 (HRTIM_ADC2R_AD2TBC3) /!< ADC Trigger on Timer B compare 3 /
mbed_official	125:23cc3068a9e4	2000	#define HRTIM_ADCTRIGGEREVENT24_TIMERB_CMP4 (HRTIM_ADC2R_AD2TBC4) /!< ADC Trigger on Timer B compare 4 /
mbed_official	125:23cc3068a9e4	2001	#define HRTIM_ADCTRIGGEREVENT24_TIMERB_PERIOD (HRTIM_ADC2R_AD2TBPER) /!< ADC Trigger on Timer B period /
mbed_official	125:23cc3068a9e4	2002	#define HRTIM_ADCTRIGGEREVENT24_TIMERC_CMP2 (HRTIM_ADC2R_AD2TCC2) /!< ADC Trigger on Timer C compare 2 /
mbed_official	125:23cc3068a9e4	2003	#define HRTIM_ADCTRIGGEREVENT24_TIMERC_CMP3 (HRTIM_ADC2R_AD2TCC3) /!< ADC Trigger on Timer C compare 3 /
mbed_official	125:23cc3068a9e4	2004	#define HRTIM_ADCTRIGGEREVENT24_TIMERC_CMP4 (HRTIM_ADC2R_AD2TCC4) /!< ADC Trigger on Timer C compare 4 /
mbed_official	125:23cc3068a9e4	2005	#define HRTIM_ADCTRIGGEREVENT24_TIMERC_PERIOD (HRTIM_ADC2R_AD2TCPER) /!< ADC Trigger on Timer C period /
mbed_official	125:23cc3068a9e4	2006	#define HRTIM_ADCTRIGGEREVENT24_TIMERC_RESET (HRTIM_ADC2R_AD2TCRST) /!< ADC Trigger on Timer C reset /
mbed_official	125:23cc3068a9e4	2007	#define HRTIM_ADCTRIGGEREVENT24_TIMERD_CMP2 (HRTIM_ADC2R_AD2TDC2) /!< ADC Trigger on Timer D compare 2 /
mbed_official	125:23cc3068a9e4	2008	#define HRTIM_ADCTRIGGEREVENT24_TIMERD_CMP3 (HRTIM_ADC2R_AD2TDC3) /!< ADC Trigger on Timer D compare 3 /
mbed_official	125:23cc3068a9e4	2009	#define HRTIM_ADCTRIGGEREVENT24_TIMERD_CMP4 (HRTIM_ADC2R_AD2TDC4) /!< ADC Trigger on Timer D compare 4 /
mbed_official	125:23cc3068a9e4	2010	#define HRTIM_ADCTRIGGEREVENT24_TIMERD_PERIOD (HRTIM_ADC2R_AD2TDPER) /!< ADC Trigger on Timer D period /
mbed_official	125:23cc3068a9e4	2011	#define HRTIM_ADCTRIGGEREVENT24_TIMERD_RESET (HRTIM_ADC2R_AD2TDRST) /!< ADC Trigger on Timer D reset /
mbed_official	125:23cc3068a9e4	2012	#define HRTIM_ADCTRIGGEREVENT24_TIMERE_CMP2 (HRTIM_ADC2R_AD2TEC2) /!< ADC Trigger on Timer E compare 2 /
mbed_official	125:23cc3068a9e4	2013	#define HRTIM_ADCTRIGGEREVENT24_TIMERE_CMP3 (HRTIM_ADC2R_AD2TEC3) /!< ADC Trigger on Timer E compare 3 /
mbed_official	125:23cc3068a9e4	2014	#define HRTIM_ADCTRIGGEREVENT24_TIMERE_CMP4 (HRTIM_ADC2R_AD2TEC4) /!< ADC Trigger on Timer E compare 4 /
mbed_official	125:23cc3068a9e4	2015	#define HRTIM_ADCTRIGGEREVENT24_TIMERE_RESET (HRTIM_ADC2R_AD2TERST) /!< ADC Trigger on Timer E reset /
mbed_official	125:23cc3068a9e4	2016
mbed_official	125:23cc3068a9e4	2017	/**
mbed_official	125:23cc3068a9e4	2018	* @}
mbed_official	125:23cc3068a9e4	2019	*/
mbed_official	125:23cc3068a9e4	2020
mbed_official	125:23cc3068a9e4	2021	/** @defgroup HRTIM_DLLCalibrationRate
mbed_official	125:23cc3068a9e4	2022	* @{
mbed_official	125:23cc3068a9e4	2023	* @brief Constants defining the DLL calibration periods (in micro seconds)
mbed_official	125:23cc3068a9e4	2024	*/
mbed_official	125:23cc3068a9e4	2025
mbed_official	125:23cc3068a9e4	2026	#define HRTIM_CALIBRATIONRATE_7300 (uint32_t)0x00000000 /!< 1048576 tHRTIM (7.3 ms) */
mbed_official	125:23cc3068a9e4	2027	#define HRTIM_CALIBRATIONRATE_910 (HRTIM_DLLCR_CALRTE_0) /!< 131072 tHRTIM (910 µs) */
mbed_official	125:23cc3068a9e4	2028	#define HRTIM_CALIBRATIONRATE_114 (HRTIM_DLLCR_CALRTE_1) /!< 131072 tHRTIM (910 µs) */
mbed_official	125:23cc3068a9e4	2029	#define HRTIM_CALIBRATIONRATE_14 (HRTIM_DLLCR_CALRTE_1 \| HRTIM_DLLCR_CALRTE_0) /!< 131072 tHRTIM (910 µs) */
mbed_official	125:23cc3068a9e4	2030
mbed_official	125:23cc3068a9e4	2031	#define IS_HRTIM_CALIBRATIONRATE(CALIBRATIONRATE)\
mbed_official	125:23cc3068a9e4	2032	(((CALIBRATIONRATE) == HRTIM_CALIBRATIONRATE_7300) \|\| \
mbed_official	125:23cc3068a9e4	2033	((CALIBRATIONRATE) == HRTIM_CALIBRATIONRATE_910) \|\| \
mbed_official	125:23cc3068a9e4	2034	((CALIBRATIONRATE) == HRTIM_CALIBRATIONRATE_114) \|\| \
mbed_official	125:23cc3068a9e4	2035	((CALIBRATIONRATE) == HRTIM_CALIBRATIONRATE_14))
mbed_official	125:23cc3068a9e4	2036	/**
mbed_official	125:23cc3068a9e4	2037	* @}
mbed_official	125:23cc3068a9e4	2038	*/
mbed_official	125:23cc3068a9e4	2039
mbed_official	125:23cc3068a9e4	2040	/** @defgroup HRTIM_BurstDMARegistersUpdate
mbed_official	125:23cc3068a9e4	2041	* @{
mbed_official	125:23cc3068a9e4	2042	* @brief Constants defining the registers that can be written during a burst
mbed_official	125:23cc3068a9e4	2043	* DMA operation
mbed_official	125:23cc3068a9e4	2044	*/
mbed_official	125:23cc3068a9e4	2045	#define HRTIM_BURSTDMA_NONE (uint32_t)0x00000000 /!< No register is updated by Burst DMA accesses /
mbed_official	125:23cc3068a9e4	2046	#define HRTIM_BURSTDMA_CR (HRTIM_BDTUPR_TIMCR) /!< MCR or TIMxCR register is updated by Burst DMA accesses /
mbed_official	125:23cc3068a9e4	2047	#define HRTIM_BURSTDMA_ICR (HRTIM_BDTUPR_TIMICR) /!< MICR or TIMxICR register is updated by Burst DMA accesses /
mbed_official	125:23cc3068a9e4	2048	#define HRTIM_BURSTDMA_DIER (HRTIM_BDTUPR_TIMDIER) /!< MDIER or TIMxDIER register is updated by Burst DMA accesses /
mbed_official	125:23cc3068a9e4	2049	#define HRTIM_BURSTDMA_CNT (HRTIM_BDTUPR_TIMCNT) /!< MCNTR or CNTxCR register is updated by Burst DMA accesses /
mbed_official	125:23cc3068a9e4	2050	#define HRTIM_BURSTDMA_PER (HRTIM_BDTUPR_TIMPER) /!< MPER or PERxR register is updated by Burst DMA accesses /
mbed_official	125:23cc3068a9e4	2051	#define HRTIM_BURSTDMA_REP (HRTIM_BDTUPR_TIMREP) /!< MREPR or REPxR register is updated by Burst DMA accesses /
mbed_official	125:23cc3068a9e4	2052	#define HRTIM_BURSTDMA_CMP1 (HRTIM_BDTUPR_TIMCMP1) /!< MCMP1R or CMP1xR register is updated by Burst DMA accesses /
mbed_official	125:23cc3068a9e4	2053	#define HRTIM_BURSTDMA_CMP2 (HRTIM_BDTUPR_TIMCMP2) /!< MCMP2R or CMP2xR register is updated by Burst DMA accesses /
mbed_official	125:23cc3068a9e4	2054	#define HRTIM_BURSTDMA_CMP3 (HRTIM_BDTUPR_TIMCMP3) /!< MCMP3R or CMP3xR register is updated by Burst DMA accesses /
mbed_official	125:23cc3068a9e4	2055	#define HRTIM_BURSTDMA_CMP4 (HRTIM_BDTUPR_TIMCMP4) /!< MCMP4R or CMP4xR register is updated by Burst DMA accesses /
mbed_official	125:23cc3068a9e4	2056	#define HRTIM_BURSTDMA_DTR (HRTIM_BDTUPR_TIMDTR) /!< TDxR register is updated by Burst DMA accesses /
mbed_official	125:23cc3068a9e4	2057	#define HRTIM_BURSTDMA_SET1R (HRTIM_BDTUPR_TIMSET1R) /!< SET1R register is updated by Burst DMA accesses /
mbed_official	125:23cc3068a9e4	2058	#define HRTIM_BURSTDMA_RST1R (HRTIM_BDTUPR_TIMRST1R) /!< RST1R register is updated by Burst DMA accesses /
mbed_official	125:23cc3068a9e4	2059	#define HRTIM_BURSTDMA_SET2R (HRTIM_BDTUPR_TIMSET2R) /!< SET2R register is updated by Burst DMA accesses /
mbed_official	125:23cc3068a9e4	2060	#define HRTIM_BURSTDMA_RST2R (HRTIM_BDTUPR_TIMRST2R) /!< RST1R register is updated by Burst DMA accesses /
mbed_official	125:23cc3068a9e4	2061	#define HRTIM_BURSTDMA_EEFR1 (HRTIM_BDTUPR_TIMEEFR1) /!< EEFxR1 register is updated by Burst DMA accesses /
mbed_official	125:23cc3068a9e4	2062	#define HRTIM_BURSTDMA_EEFR2 (HRTIM_BDTUPR_TIMEEFR2) /!< EEFxR2 register is updated by Burst DMA accesses /
mbed_official	125:23cc3068a9e4	2063	#define HRTIM_BURSTDMA_RSTR (HRTIM_BDTUPR_TIMRSTR) /!< RSTxR register is updated by Burst DMA accesses /
mbed_official	125:23cc3068a9e4	2064	#define HRTIM_BURSTDMA_CHPR (HRTIM_BDTUPR_TIMCHPR) /!< CHPxR register is updated by Burst DMA accesses /
mbed_official	125:23cc3068a9e4	2065	#define HRTIM_BURSTDMA_OUTR (HRTIM_BDTUPR_TIMOUTR) /!< OUTxR register is updated by Burst DMA accesses /
mbed_official	125:23cc3068a9e4	2066	#define HRTIM_BURSTDMA_FLTR (HRTIM_BDTUPR_TIMFLTR) /!< FLTxR register is updated by Burst DMA accesses /
mbed_official	125:23cc3068a9e4	2067
mbed_official	125:23cc3068a9e4	2068	#define IS_HRTIM_TIMER_BURSTDMA(TIMER, BURSTDMA) \
mbed_official	125:23cc3068a9e4	2069	((((TIMER) == HRTIM_TIMERINDEX_MASTER) && (((BURSTDMA) & 0xFFFFFC000) == 0x00000000)) \
mbed_official	125:23cc3068a9e4	2070	\|\| \
mbed_official	125:23cc3068a9e4	2071	(((TIMER) == HRTIM_TIMERINDEX_TIMER_A) && (((BURSTDMA) & 0xFFE00000) == 0x00000000)) \
mbed_official	125:23cc3068a9e4	2072	\|\| \
mbed_official	125:23cc3068a9e4	2073	(((TIMER) == HRTIM_TIMERINDEX_TIMER_B) && (((BURSTDMA) & 0xFFE00000) == 0x00000000)) \
mbed_official	125:23cc3068a9e4	2074	\|\| \
mbed_official	125:23cc3068a9e4	2075	(((TIMER) == HRTIM_TIMERINDEX_TIMER_C) && (((BURSTDMA) & 0xFFE00000) == 0x00000000)) \
mbed_official	125:23cc3068a9e4	2076	\|\| \
mbed_official	125:23cc3068a9e4	2077	(((TIMER) == HRTIM_TIMERINDEX_TIMER_D) && (((BURSTDMA) & 0xFFE00000) == 0x00000000)) \
mbed_official	125:23cc3068a9e4	2078	\|\| \
mbed_official	125:23cc3068a9e4	2079	(((TIMER) == HRTIM_TIMERINDEX_TIMER_E) && (((BURSTDMA) & 0xFFE00000) == 0x00000000)))
mbed_official	125:23cc3068a9e4	2080	/**
mbed_official	125:23cc3068a9e4	2081	* @}
mbed_official	125:23cc3068a9e4	2082	*/
mbed_official	125:23cc3068a9e4	2083
mbed_official	125:23cc3068a9e4	2084	/** @defgroup HRTIM_BursttModeControl
mbed_official	125:23cc3068a9e4	2085	* @{
mbed_official	125:23cc3068a9e4	2086	* @brief Constants used to enable or disable the burst mode controller
mbed_official	125:23cc3068a9e4	2087	*/
mbed_official	125:23cc3068a9e4	2088	#define HRTIM_BURSTMODECTL_DISABLED (uint32_t)0x00000000 /!< Burst mode disabled /
mbed_official	125:23cc3068a9e4	2089	#define HRTIM_BURSTMODECTL_ENABLED (HRTIM_BMCR_BME) /!< Burst mode enabled /
mbed_official	125:23cc3068a9e4	2090
mbed_official	125:23cc3068a9e4	2091	#define IS_HRTIM_BURSTMODECTL(BURSTMODECTL)\
mbed_official	125:23cc3068a9e4	2092	(((BURSTMODECTL) == HRTIM_BURSTMODECTL_DISABLED) \|\| \
mbed_official	125:23cc3068a9e4	2093	((BURSTMODECTL) == HRTIM_BURSTMODECTL_ENABLED))
mbed_official	125:23cc3068a9e4	2094	/**
mbed_official	125:23cc3068a9e4	2095	* @}
mbed_official	125:23cc3068a9e4	2096	*/
mbed_official	125:23cc3068a9e4	2097
mbed_official	125:23cc3068a9e4	2098	/** @defgroup HRTIM_FaultModeControl
mbed_official	125:23cc3068a9e4	2099	* @{
mbed_official	125:23cc3068a9e4	2100	* @brief Constants used to enable or disable the Fault mode
mbed_official	125:23cc3068a9e4	2101	*/
mbed_official	125:23cc3068a9e4	2102	#define HRTIM_FAULT_DISABLED (uint32_t)0x00000000 /!< Fault mode disabled /
mbed_official	125:23cc3068a9e4	2103	#define HRTIM_FAULT_ENABLED (HRTIM_FLTINR1_FLT1E) /!< Fault mode enabled /
mbed_official	125:23cc3068a9e4	2104
mbed_official	125:23cc3068a9e4	2105	#define IS_HRTIM_FAULTCTL(FAULTCTL)\
mbed_official	125:23cc3068a9e4	2106	(((FAULTCTL) == HRTIM_FAULT_DISABLED) \|\| \
mbed_official	125:23cc3068a9e4	2107	((FAULTCTL) == HRTIM_FAULT_ENABLED))
mbed_official	125:23cc3068a9e4	2108	/**
mbed_official	125:23cc3068a9e4	2109	* @}
mbed_official	125:23cc3068a9e4	2110	*/
mbed_official	125:23cc3068a9e4	2111
mbed_official	125:23cc3068a9e4	2112	/** @defgroup HRTIM_SoftwareTimerUpdate
mbed_official	125:23cc3068a9e4	2113	* @{
mbed_official	125:23cc3068a9e4	2114	* @brief Constants used to force timer registers update
mbed_official	125:23cc3068a9e4	2115	*/
mbed_official	125:23cc3068a9e4	2116	#define HRTIM_TIMERUPDATE_MASTER (HRTIM_CR2_MSWU) /!< Forces an immediate transfer from the preload to the active register in the master timer /
mbed_official	125:23cc3068a9e4	2117	#define HRTIM_TIMERUPDATE_A (HRTIM_CR2_TASWU) /!< Forces an immediate transfer from the preload to the active register in the timer A /
mbed_official	125:23cc3068a9e4	2118	#define HRTIM_TIMERUPDATE_B (HRTIM_CR2_TBSWU) /!< Forces an immediate transfer from the preload to the active register in the timer B /
mbed_official	125:23cc3068a9e4	2119	#define HRTIM_TIMERUPDATE_C (HRTIM_CR2_TCSWU) /!< Forces an immediate transfer from the preload to the active register in the timer C /
mbed_official	125:23cc3068a9e4	2120	#define HRTIM_TIMERUPDATE_D (HRTIM_CR2_TDSWU) /!< Forces an immediate transfer from the preload to the active register in the timer D /
mbed_official	125:23cc3068a9e4	2121	#define HRTIM_TIMERUPDATE_E (HRTIM_CR2_TESWU) /!< Forces an immediate transfer from the preload to the active register in the timer E /
mbed_official	125:23cc3068a9e4	2122
mbed_official	125:23cc3068a9e4	2123	#define IS_HRTIM_TIMERUPDATE(TIMERUPDATE) (((TIMERUPDATE) & 0xFFFFFFC0) == 0x00000000)
mbed_official	125:23cc3068a9e4	2124	/**
mbed_official	125:23cc3068a9e4	2125	* @}
mbed_official	125:23cc3068a9e4	2126	*/
mbed_official	125:23cc3068a9e4	2127
mbed_official	125:23cc3068a9e4	2128	/** @defgroup HRTIM_SoftwareTimerReset
mbed_official	125:23cc3068a9e4	2129	* @{
mbed_official	125:23cc3068a9e4	2130	* @brief Constants used to force timer counter reset
mbed_official	125:23cc3068a9e4	2131	*/
mbed_official	125:23cc3068a9e4	2132	#define HRTIM_TIMERRESET_MASTER (HRTIM_CR2_MRST) /!< Resets the master timer counter /
mbed_official	125:23cc3068a9e4	2133	#define HRTIM_TIMERRESET_A (HRTIM_CR2_TARST) /!< Resets the timer A counter /
mbed_official	125:23cc3068a9e4	2134	#define HRTIM_TIMERRESET_B (HRTIM_CR2_TBRST) /!< Resets the timer B counter /
mbed_official	125:23cc3068a9e4	2135	#define HRTIM_TIMERRESET_C (HRTIM_CR2_TCRST) /!< Resets the timer C counter /
mbed_official	125:23cc3068a9e4	2136	#define HRTIM_TIMERRESET_D (HRTIM_CR2_TDRST) /!< Resets the timer D counter /
mbed_official	125:23cc3068a9e4	2137	#define HRTIM_TIMERRESET_E (HRTIM_CR2_TERST) /!< Resets the timer E counter /
mbed_official	125:23cc3068a9e4	2138
mbed_official	125:23cc3068a9e4	2139	#define IS_HRTIM_TIMERRESET(TIMERRESET) (((TIMERRESET) & 0xFFFFC0FF) == 0x00000000)
mbed_official	125:23cc3068a9e4	2140	/**
mbed_official	125:23cc3068a9e4	2141	* @}
mbed_official	125:23cc3068a9e4	2142	*/
mbed_official	125:23cc3068a9e4	2143
mbed_official	125:23cc3068a9e4	2144	/** @defgroup HRTIM_OutputLevel
mbed_official	125:23cc3068a9e4	2145	* @{
mbed_official	125:23cc3068a9e4	2146	* @brief Constants defining the level of a timer output
mbed_official	125:23cc3068a9e4	2147	*/
mbed_official	125:23cc3068a9e4	2148	#define HRTIM_OUTPUTLEVEL_ACTIVE (uint32_t)0x00000001 /!< Forces the output to its active state /
mbed_official	125:23cc3068a9e4	2149	#define HRTIM_OUTPUTLEVEL_INACTIVE (uint32_t)0x00000002 /!< Forces the output to its inactive state /
mbed_official	125:23cc3068a9e4	2150
mbed_official	125:23cc3068a9e4	2151	#define IS_HRTIM_OUTPUTLEVEL(OUTPUTLEVEL)\
mbed_official	125:23cc3068a9e4	2152	(((OUTPUTLEVEL) == HRTIM_OUTPUTLEVEL_ACTIVE) \|\| \
mbed_official	125:23cc3068a9e4	2153	((OUTPUTLEVEL) == HRTIM_OUTPUTLEVEL_INACTIVE))
mbed_official	125:23cc3068a9e4	2154	/**
mbed_official	125:23cc3068a9e4	2155	* @}
mbed_official	125:23cc3068a9e4	2156	*/
mbed_official	125:23cc3068a9e4	2157
mbed_official	125:23cc3068a9e4	2158	/** @defgroup HRTIM_OutputState
mbed_official	125:23cc3068a9e4	2159	* @{
mbed_official	125:23cc3068a9e4	2160	* @brief Constants defining the state of a timer output
mbed_official	125:23cc3068a9e4	2161	*/
mbed_official	125:23cc3068a9e4	2162	#define HRTIM_OUTPUTSTATE_IDLE (uint32_t)0x00000001 /*!< Main operating mode, where the output can take the active or
mbed_official	125:23cc3068a9e4	2163	inactive level as programmed in the crossbar unit */
mbed_official	125:23cc3068a9e4	2164	#define HRTIM_OUTPUTSTATE_RUN (uint32_t)0x00000002 /*!< Default operating state (e.g. after an HRTIM reset, when the
mbed_official	125:23cc3068a9e4	2165	outputs are disabled by software or during a burst mode operation */
mbed_official	125:23cc3068a9e4	2166	#define HRTIM_OUTPUTSTATE_FAULT (uint32_t)0x00000003 /*!< Safety state, entered in case of a shut-down request on
mbed_official	125:23cc3068a9e4	2167	FAULTx inputs */
mbed_official	125:23cc3068a9e4	2168	/**
mbed_official	125:23cc3068a9e4	2169	* @}
mbed_official	125:23cc3068a9e4	2170	*/
mbed_official	125:23cc3068a9e4	2171
mbed_official	125:23cc3068a9e4	2172	/** @defgroup HRTIM_BurstModeStatus
mbed_official	125:23cc3068a9e4	2173	* @{
mbed_official	125:23cc3068a9e4	2174	* @brief Constants defining the operating state of the burst mode controller
mbed_official	125:23cc3068a9e4	2175	*/
mbed_official	125:23cc3068a9e4	2176	#define HRTIM_BURSTMODESTATUS_NORMAL (uint32_t) 0x00000000 /!< Normal operation /
mbed_official	125:23cc3068a9e4	2177	#define HRTIM_BURSTMODESTATUS_ONGOING (HRTIM_BMCR_BMSTAT) /!< Burst operation on-going /
mbed_official	125:23cc3068a9e4	2178	/**
mbed_official	125:23cc3068a9e4	2179	* @}
mbed_official	125:23cc3068a9e4	2180	*/
mbed_official	125:23cc3068a9e4	2181
mbed_official	125:23cc3068a9e4	2182	/** @defgroup HRTIM_CurrentPushPullStatus
mbed_official	125:23cc3068a9e4	2183	* @{
mbed_official	125:23cc3068a9e4	2184	* @brief Constants defining on which output the signal is currently applied
mbed_official	125:23cc3068a9e4	2185	* in push-pull mode
mbed_official	125:23cc3068a9e4	2186	*/
mbed_official	125:23cc3068a9e4	2187	#define HRTIM_PUSHPULL_CURRENTSTATUS_OUTPUT1 (uint32_t) 0x00000000 /!< Signal applied on output 1 and output 2 forced inactive /
mbed_official	125:23cc3068a9e4	2188	#define HRTIM_PUSHPULL_CURRENTSTATUS_OUTPUT2 (HRTIM_TIMISR_CPPSTAT) /!< Signal applied on output 2 and output 1 forced inactive /
mbed_official	125:23cc3068a9e4	2189	/**
mbed_official	125:23cc3068a9e4	2190	* @}
mbed_official	125:23cc3068a9e4	2191	*/
mbed_official	125:23cc3068a9e4	2192
mbed_official	125:23cc3068a9e4	2193	/** @defgroup HRTIM_IdlePushPullStatus
mbed_official	125:23cc3068a9e4	2194	* @{
mbed_official	125:23cc3068a9e4	2195	* @brief Constants defining on which output the signal was applied, in
mbed_official	125:23cc3068a9e4	2196	* push-pull mode balanced fault mode or delayed idle mode, when the
mbed_official	125:23cc3068a9e4	2197	* protection was triggered
mbed_official	125:23cc3068a9e4	2198	*/
mbed_official	125:23cc3068a9e4	2199	#define HRTIM_PUSHPULL_IDLESTATUS_OUTPUT1 (uint32_t) 0x00000000 /!< Protection occurred when the output 1 was active and output 2 forced inactive /
mbed_official	125:23cc3068a9e4	2200	#define HRTIM_PUSHPULL_IDLESTATUS_OUTPUT2 (HRTIM_TIMISR_IPPSTAT) /!< Protection occurred when the output 2 was active and output 1 forced inactive /
mbed_official	125:23cc3068a9e4	2201	/**
mbed_official	125:23cc3068a9e4	2202	* @}
mbed_official	125:23cc3068a9e4	2203	*/
mbed_official	125:23cc3068a9e4	2204
mbed_official	125:23cc3068a9e4	2205	/** @defgroup HRTIM_CommonInterrupt
mbed_official	125:23cc3068a9e4	2206	* @{
mbed_official	125:23cc3068a9e4	2207	*/
mbed_official	125:23cc3068a9e4	2208	#define HRTIM_IT_FLT1 HRTIM_ISR_FLT1 /!< Fault 1 interrupt flag /
mbed_official	125:23cc3068a9e4	2209	#define HRTIM_IT_FLT2 HRTIM_ISR_FLT2 /!< Fault 2 interrupt flag /
mbed_official	125:23cc3068a9e4	2210	#define HRTIM_IT_FLT3 HRTIM_ISR_FLT3 /!< Fault 3 interrupt flag /
mbed_official	125:23cc3068a9e4	2211	#define HRTIM_IT_FLT4 HRTIM_ISR_FLT4 /!< Fault 4 interrupt flag /
mbed_official	125:23cc3068a9e4	2212	#define HRTIM_IT_FLT5 HRTIM_ISR_FLT5 /!< Fault 5 interrupt flag /
mbed_official	125:23cc3068a9e4	2213	#define HRTIM_IT_SYSFLT HRTIM_ISR_SYSFLT /!< System Fault interrupt flag /
mbed_official	125:23cc3068a9e4	2214	#define HRTIM_IT_DLLRDY HRTIM_ISR_DLLRDY /!< DLL ready interrupt flag /
mbed_official	125:23cc3068a9e4	2215	#define HRTIM_IT_BMPER HRTIM_ISR_BMPER /!< Burst mode period interrupt flag /
mbed_official	125:23cc3068a9e4	2216
mbed_official	125:23cc3068a9e4	2217	#define IS_HRTIM_IT(IT)\
mbed_official	125:23cc3068a9e4	2218	(((IT) == HRTIM_ISR_FLT1) \|\| \
mbed_official	125:23cc3068a9e4	2219	((IT) == HRTIM_ISR_FLT2) \|\| \
mbed_official	125:23cc3068a9e4	2220	((IT) == HRTIM_ISR_FLT3) \|\| \
mbed_official	125:23cc3068a9e4	2221	((IT) == HRTIM_ISR_FLT4) \|\| \
mbed_official	125:23cc3068a9e4	2222	((IT) == HRTIM_ISR_FLT5) \|\| \
mbed_official	125:23cc3068a9e4	2223	((IT) == HRTIM_ISR_SYSFLT) \|\| \
mbed_official	125:23cc3068a9e4	2224	((IT) == HRTIM_ISR_DLLRDY) \|\| \
mbed_official	125:23cc3068a9e4	2225	((IT) == HRTIM_ISR_BMPER))
mbed_official	125:23cc3068a9e4	2226	/**
mbed_official	125:23cc3068a9e4	2227	* @}
mbed_official	125:23cc3068a9e4	2228	*/
mbed_official	125:23cc3068a9e4	2229
mbed_official	125:23cc3068a9e4	2230	/** @defgroup HRTIM_MasterInterrupt
mbed_official	125:23cc3068a9e4	2231	* @{
mbed_official	125:23cc3068a9e4	2232	*/
mbed_official	125:23cc3068a9e4	2233	#define HRTIM_MASTER_IT_MCMP1 HRTIM_MDIER_MCMP1IE /!< Master compare 1 interrupt flag /
mbed_official	125:23cc3068a9e4	2234	#define HRTIM_MASTER_IT_MCMP2 HRTIM_MDIER_MCMP2IE /!< Master compare 2 interrupt flag /
mbed_official	125:23cc3068a9e4	2235	#define HRTIM_MASTER_IT_MCMP3 HRTIM_MDIER_MCMP3IE /!< Master compare 3 interrupt flag /
mbed_official	125:23cc3068a9e4	2236	#define HRTIM_MASTER_IT_MCMP4 HRTIM_MDIER_MCMP4IE /!< Master compare 4 interrupt flag /
mbed_official	125:23cc3068a9e4	2237	#define HRTIM_MASTER_IT_MREP HRTIM_MDIER_MREPIE /!< Master Repetition interrupt flag /
mbed_official	125:23cc3068a9e4	2238	#define HRTIM_MASTER_IT_SYNC HRTIM_MDIER_SYNCIE /!< Synchronization input interrupt flag /
mbed_official	125:23cc3068a9e4	2239	#define HRTIM_MASTER_IT_MUPD HRTIM_MDIER_MUPDIE /!< Master update interrupt flag /
mbed_official	125:23cc3068a9e4	2240
mbed_official	125:23cc3068a9e4	2241	#define IS_HRTIM_MASTER_IT(IT)\
mbed_official	125:23cc3068a9e4	2242	(((IT) == HRTIM_MDIER_MCMP1IE) \|\| \
mbed_official	125:23cc3068a9e4	2243	((IT) == HRTIM_MDIER_MCMP2IE) \|\| \
mbed_official	125:23cc3068a9e4	2244	((IT) == HRTIM_MDIER_MCMP3IE) \|\| \
mbed_official	125:23cc3068a9e4	2245	((IT) == HRTIM_MDIER_MCMP4IE) \|\| \
mbed_official	125:23cc3068a9e4	2246	((IT) == HRTIM_MDIER_MREPIE) \|\| \
mbed_official	125:23cc3068a9e4	2247	((IT) == HRTIM_MDIER_SYNCIE) \|\| \
mbed_official	125:23cc3068a9e4	2248	((IT) == HRTIM_MDIER_MUPDIE))
mbed_official	125:23cc3068a9e4	2249
mbed_official	125:23cc3068a9e4	2250	/** @defgroup HRTIM_MasterFlag
mbed_official	125:23cc3068a9e4	2251	* @{
mbed_official	125:23cc3068a9e4	2252	*/
mbed_official	125:23cc3068a9e4	2253	#define HRTIM_MASTER_FLAG_MCMP1 HRTIM_MISR_MCMP1 /!< Master compare 1 interrupt flag /
mbed_official	125:23cc3068a9e4	2254	#define HRTIM_MASTER_FLAG_MCMP2 HRTIM_MISR_MCMP2 /!< Master compare 2 interrupt flag /
mbed_official	125:23cc3068a9e4	2255	#define HRTIM_MASTER_FLAG_MCMP3 HRTIM_MISR_MCMP3 /!< Master compare 3 interrupt flag /
mbed_official	125:23cc3068a9e4	2256	#define HRTIM_MASTER_FLAG_MCMP4 HRTIM_MISR_MCMP4 /!< Master compare 4 interrupt flag /
mbed_official	125:23cc3068a9e4	2257	#define HRTIM_MASTER_FLAG_MREP HRTIM_MISR_MREP /!< Master Repetition interrupt flag /
mbed_official	125:23cc3068a9e4	2258	#define HRTIM_MASTER_FLAG_SYNC HRTIM_MISR_SYNC /!< Synchronization input interrupt flag /
mbed_official	125:23cc3068a9e4	2259	#define HRTIM_MASTER_FLAG_MUPD HRTIM_MISR_MUPD /!< Master update interrupt flag /
mbed_official	125:23cc3068a9e4	2260
mbed_official	125:23cc3068a9e4	2261	#define IS_HRTIM_MASTER_FLAG(FLAG)\
mbed_official	125:23cc3068a9e4	2262	(((FLAG) == HRTIM_MISR_MCMP1) \|\| \
mbed_official	125:23cc3068a9e4	2263	((FLAG) == HRTIM_MISR_MCMP2) \|\| \
mbed_official	125:23cc3068a9e4	2264	((FLAG) == HRTIM_MISR_MCMP3) \|\| \
mbed_official	125:23cc3068a9e4	2265	((FLAG) == HRTIM_MISR_MCMP4) \|\| \
mbed_official	125:23cc3068a9e4	2266	((FLAG) == HRTIM_MISR_MREP) \|\| \
mbed_official	125:23cc3068a9e4	2267	((FLAG) == HRTIM_MISR_SYNC) \|\| \
mbed_official	125:23cc3068a9e4	2268	((FLAG) == HRTIM_MISR_MUPD))
mbed_official	125:23cc3068a9e4	2269	/**
mbed_official	125:23cc3068a9e4	2270	* @}
mbed_official	125:23cc3068a9e4	2271	*/
mbed_official	125:23cc3068a9e4	2272
mbed_official	125:23cc3068a9e4	2273	/** @defgroup HRTIM_TimingUnitInterrupt
mbed_official	125:23cc3068a9e4	2274	* @{
mbed_official	125:23cc3068a9e4	2275	*/
mbed_official	125:23cc3068a9e4	2276	#define HRTIM_TIM_IT_CMP1 HRTIM_TIMDIER_CMP1IE /!< Timer compare 1 interrupt flag /
mbed_official	125:23cc3068a9e4	2277	#define HRTIM_TIM_IT_CMP2 HRTIM_TIMDIER_CMP2IE /!< Timer compare 2 interrupt flag /
mbed_official	125:23cc3068a9e4	2278	#define HRTIM_TIM_IT_CMP3 HRTIM_TIMDIER_CMP3IE /!< Timer compare 3 interrupt flag /
mbed_official	125:23cc3068a9e4	2279	#define HRTIM_TIM_IT_CMP4 HRTIM_TIMDIER_CMP4IE /!< Timer compare 4 interrupt flag /
mbed_official	125:23cc3068a9e4	2280	#define HRTIM_TIM_IT_REP HRTIM_TIMDIER_REPIE /!< Timer repetition interrupt flag /
mbed_official	125:23cc3068a9e4	2281	#define HRTIM_TIM_IT_UPD HRTIM_TIMDIER_UPDIE /!< Timer update interrupt flag /
mbed_official	125:23cc3068a9e4	2282	#define HRTIM_TIM_IT_CPT1 HRTIM_TIMDIER_CPT1IE /!< Timer capture 1 interrupt flag /
mbed_official	125:23cc3068a9e4	2283	#define HRTIM_TIM_IT_CPT2 HRTIM_TIMDIER_CPT2IE /!< Timer capture 2 interrupt flag /
mbed_official	125:23cc3068a9e4	2284	#define HRTIM_TIM_IT_SET1 HRTIM_TIMDIER_SET1IE /!< Timer output 1 set interrupt flag /
mbed_official	125:23cc3068a9e4	2285	#define HRTIM_TIM_IT_RST1 HRTIM_TIMDIER_RST1IE /!< Timer output 1 reset interrupt flag /
mbed_official	125:23cc3068a9e4	2286	#define HRTIM_TIM_IT_SET2 HRTIM_TIMDIER_SET2IE /!< Timer output 2 set interrupt flag /
mbed_official	125:23cc3068a9e4	2287	#define HRTIM_TIM_IT_RST2 HRTIM_TIMDIER_RST2IE /!< Timer output 2 reset interrupt flag /
mbed_official	125:23cc3068a9e4	2288	#define HRTIM_TIM_IT_RST HRTIM_TIMDIER_RSTIE /!< Timer reset interrupt flag /
mbed_official	125:23cc3068a9e4	2289	#define HRTIM_TIM_IT_DLYPRT HRTIM_TIMDIER_DLYPRT1IE /!< Timer delay protection interrupt flag /
mbed_official	125:23cc3068a9e4	2290
mbed_official	125:23cc3068a9e4	2291	#define IS_HRTIM_TIM_IT(IT)\
mbed_official	125:23cc3068a9e4	2292	(((IT) == HRTIM_TIMDIER_CMP1IE) \|\| \
mbed_official	125:23cc3068a9e4	2293	((IT) == HRTIM_TIMDIER_CMP2IE) \|\| \
mbed_official	125:23cc3068a9e4	2294	((IT) == HRTIM_TIMDIER_CMP3IE) \|\| \
mbed_official	125:23cc3068a9e4	2295	((IT) == HRTIM_TIMDIER_CMP4IE) \|\| \
mbed_official	125:23cc3068a9e4	2296	((IT) == HRTIM_TIMDIER_REPIE) \|\| \
mbed_official	125:23cc3068a9e4	2297	((IT) == HRTIM_TIMDIER_UPDIE) \|\| \
mbed_official	125:23cc3068a9e4	2298	((IT) == HRTIM_TIMDIER_CPT1IE) \|\| \
mbed_official	125:23cc3068a9e4	2299	((IT) == HRTIM_TIMDIER_CPT2IE) \|\| \
mbed_official	125:23cc3068a9e4	2300	((IT) == HRTIM_TIMDIER_SET1IE) \|\| \
mbed_official	125:23cc3068a9e4	2301	((IT) == HRTIM_TIMDIER_RST1IE) \|\| \
mbed_official	125:23cc3068a9e4	2302	((IT) == HRTIM_TIMDIER_SET2IE) \|\| \
mbed_official	125:23cc3068a9e4	2303	((IT) == HRTIM_TIMDIER_RST2IE) \|\| \
mbed_official	125:23cc3068a9e4	2304	((IT) == HRTIM_TIMDIER_RSTIE) \|\| \
mbed_official	125:23cc3068a9e4	2305	((IT) == HRTIM_TIMDIER_DLYPRTIE))
mbed_official	125:23cc3068a9e4	2306
mbed_official	125:23cc3068a9e4	2307	/**
mbed_official	125:23cc3068a9e4	2308	* @}
mbed_official	125:23cc3068a9e4	2309	*/
mbed_official	125:23cc3068a9e4	2310
mbed_official	125:23cc3068a9e4	2311	/** @defgroup HRTIM_TimingUnitFlag
mbed_official	125:23cc3068a9e4	2312	* @{
mbed_official	125:23cc3068a9e4	2313	*/
mbed_official	125:23cc3068a9e4	2314	#define HRTIM_TIM_FLAG_CMP1 HRTIM_TIMISR_CMP1 /!< Timer compare 1 interrupt flag /
mbed_official	125:23cc3068a9e4	2315	#define HRTIM_TIM_FLAG_CMP2 HRTIM_TIMISR_CMP2 /!< Timer compare 2 interrupt flag /
mbed_official	125:23cc3068a9e4	2316	#define HRTIM_TIM_FLAG_CMP3 HRTIM_TIMISR_CMP3 /!< Timer compare 3 interrupt flag /
mbed_official	125:23cc3068a9e4	2317	#define HRTIM_TIM_FLAG_CMP4 HRTIM_TIMISR_CMP4 /!< Timer compare 4 interrupt flag /
mbed_official	125:23cc3068a9e4	2318	#define HRTIM_TIM_FLAG_REP HRTIM_TIMISR_REP /!< Timer repetition interrupt flag /
mbed_official	125:23cc3068a9e4	2319	#define HRTIM_TIM_FLAG_UPD HRTIM_TIMISR_UPD /!< Timer update interrupt flag /
mbed_official	125:23cc3068a9e4	2320	#define HRTIM_TIM_FLAG_CPT1 HRTIM_TIMISR_CPT1 /!< Timer capture 1 interrupt flag /
mbed_official	125:23cc3068a9e4	2321	#define HRTIM_TIM_FLAG_CPT2 HRTIM_TIMISR_CPT2 /!< Timer capture 2 interrupt flag /
mbed_official	125:23cc3068a9e4	2322	#define HRTIM_TIM_FLAG_SET1 HRTIM_TIMISR_SET1 /!< Timer output 1 set interrupt flag /
mbed_official	125:23cc3068a9e4	2323	#define HRTIM_TIM_FLAG_RST1 HRTIM_TIMISR_RST1 /!< Timer output 1 reset interrupt flag /
mbed_official	125:23cc3068a9e4	2324	#define HRTIM_TIM_FLAG_SET2 HRTIM_TIMISR_SET2 /!< Timer output 2 set interrupt flag /
mbed_official	125:23cc3068a9e4	2325	#define HRTIM_TIM_FLAG_RST2 HRTIM_TIMISR_RST2 /!< Timer output 2 reset interrupt flag /
mbed_official	125:23cc3068a9e4	2326	#define HRTIM_TIM_FLAG_RST HRTIM_TIMDIER_RSTIE /!< Timer reset interrupt flag /
mbed_official	125:23cc3068a9e4	2327	#define HRTIM_TIM_FLAG_DLYPRT1 HRTIM_TIMISR_DLYPRT /!< Timer delay protection interrupt flag /
mbed_official	125:23cc3068a9e4	2328
mbed_official	125:23cc3068a9e4	2329	#define IS_HRTIM_TIM_FLAG(FLAG)\
mbed_official	125:23cc3068a9e4	2330	(((FLAG) == HRTIM_TIM_FLAG_CMP1) \|\| \
mbed_official	125:23cc3068a9e4	2331	((FLAG) == HRTIM_TIM_FLAG_CMP2) \|\| \
mbed_official	125:23cc3068a9e4	2332	((FLAG) == HRTIM_TIM_FLAG_CMP3) \|\| \
mbed_official	125:23cc3068a9e4	2333	((FLAG) == HRTIM_TIM_FLAG_CMP4) \|\| \
mbed_official	125:23cc3068a9e4	2334	((FLAG) == HRTIM_TIM_FLAG_REP) \|\| \
mbed_official	125:23cc3068a9e4	2335	((FLAG) == HRTIM_TIM_FLAG_UPD) \|\| \
mbed_official	125:23cc3068a9e4	2336	((FLAG) == HRTIM_TIM_FLAG_CPT1) \|\| \
mbed_official	125:23cc3068a9e4	2337	((FLAG) == HRTIM_TIM_FLAG_CPT2) \|\| \
mbed_official	125:23cc3068a9e4	2338	((FLAG) == HRTIM_TIM_FLAG_SET1) \|\| \
mbed_official	125:23cc3068a9e4	2339	((FLAG) == HRTIM_TIM_FLAG_RST1) \|\| \
mbed_official	125:23cc3068a9e4	2340	((FLAG) == HRTIM_TIM_FLAG_SET2) \|\| \
mbed_official	125:23cc3068a9e4	2341	((FLAG) == HRTIM_TIM_FLAG_RST2) \|\| \
mbed_official	125:23cc3068a9e4	2342	((FLAG) == HRTIM_TIM_FLAG_RST) \|\| \
mbed_official	125:23cc3068a9e4	2343	((FLAG) == HRTIM_TIM_FLAG_DLYPRT1))
mbed_official	125:23cc3068a9e4	2344
mbed_official	125:23cc3068a9e4	2345	/**
mbed_official	125:23cc3068a9e4	2346	* @}
mbed_official	125:23cc3068a9e4	2347	*/
mbed_official	125:23cc3068a9e4	2348
mbed_official	125:23cc3068a9e4	2349	/** @defgroup HRTIM_MasterDMARequest
mbed_official	125:23cc3068a9e4	2350	* @{
mbed_official	125:23cc3068a9e4	2351	*/
mbed_official	125:23cc3068a9e4	2352	#define HRTIM_MASTER_DMA_MCMP1 HRTIM_MDIER_MCMP1DE /!< Master compare 1 DMA request flag /
mbed_official	125:23cc3068a9e4	2353	#define HRTIM_MASTER_DMA_MCMP2 HRTIM_MDIER_MCMP2DE /!< Master compare 2 DMA request flag /
mbed_official	125:23cc3068a9e4	2354	#define HRTIM_MASTER_DMA_MCMP3 HRTIM_MDIER_MCMP3DE /!< Master compare 3 DMA request flag /
mbed_official	125:23cc3068a9e4	2355	#define HRTIM_MASTER_DMA_MCMP4 HRTIM_MDIER_MCMP4DE /!< Master compare 4 DMA request flag /
mbed_official	125:23cc3068a9e4	2356	#define HRTIM_MASTER_DMA_MREP HRTIM_MDIER_MREPDE /!< Master Repetition DMA request flag /
mbed_official	125:23cc3068a9e4	2357	#define HRTIM_MASTER_DMA_SYNC HRTIM_MDIER_SYNCDE /!< Synchronization input DMA request flag /
mbed_official	125:23cc3068a9e4	2358	#define HRTIM_MASTER_DMA_MUPD HRTIM_MDIER_MUPDDE /!< Master update DMA request flag /
mbed_official	125:23cc3068a9e4	2359
mbed_official	125:23cc3068a9e4	2360	#define IS_HRTIM_MASTER_DMA(DMA)\
mbed_official	125:23cc3068a9e4	2361	(((DMA) == HRTIM_MDIER_MCMP1DE) \|\| \
mbed_official	125:23cc3068a9e4	2362	((DMA) == HRTIM_MDIER_MCMP2DE) \|\| \
mbed_official	125:23cc3068a9e4	2363	((DMA) == HRTIM_MDIER_MCMP3DE) \|\| \
mbed_official	125:23cc3068a9e4	2364	((DMA) == HRTIM_MDIER_MCMP4DE) \|\| \
mbed_official	125:23cc3068a9e4	2365	((DMA) == HRTIM_MDIER_MREPDE) \|\| \
mbed_official	125:23cc3068a9e4	2366	((DMA) == HRTIM_MDIER_SYNCDE) \|\| \
mbed_official	125:23cc3068a9e4	2367	((DMA) == HRTIM_MDIER_MUPDDE))
mbed_official	125:23cc3068a9e4	2368	/**
mbed_official	125:23cc3068a9e4	2369	* @}
mbed_official	125:23cc3068a9e4	2370	*/
mbed_official	125:23cc3068a9e4	2371
mbed_official	125:23cc3068a9e4	2372	/** @defgroup HRTIM_TimingUnitDMARequest
mbed_official	125:23cc3068a9e4	2373	* @{
mbed_official	125:23cc3068a9e4	2374	*/
mbed_official	125:23cc3068a9e4	2375	#define HRTIM_TIM_DMA_CMP1 HRTIM_TIMDIER_CMP1DE /!< Timer compare 1 interrupt flag /
mbed_official	125:23cc3068a9e4	2376	#define HRTIM_TIM_DMA_CMP2 HRTIM_TIMDIER_CMP2DE /!< Timer compare 2 interrupt flag /
mbed_official	125:23cc3068a9e4	2377	#define HRTIM_TIM_DMA_CMP3 HRTIM_TIMDIER_CMP3DE /!< Timer compare 3 interrupt flag /
mbed_official	125:23cc3068a9e4	2378	#define HRTIM_TIM_DMA_CMP4 HRTIM_TIMDIER_CMP4DE /!< Timer compare 4 interrupt flag /
mbed_official	125:23cc3068a9e4	2379	#define HRTIM_TIM_DMA_REP HRTIM_TIMDIER_REPDE /!< Timer repetition interrupt flag /
mbed_official	125:23cc3068a9e4	2380	#define HRTIM_TIM_DMA_UPD HRTIM_TIMDIER_UPDDE /!< Timer update interrupt flag /
mbed_official	125:23cc3068a9e4	2381	#define HRTIM_TIM_DMA_CPT1 HRTIM_TIMDIER_CPT1DE /!< Timer capture 1 interrupt flag /
mbed_official	125:23cc3068a9e4	2382	#define HRTIM_TIM_DMA_CPT2 HRTIM_TIMDIER_CPT2DE /!< Timer capture 2 interrupt flag /
mbed_official	125:23cc3068a9e4	2383	#define HRTIM_TIM_DMA_SET1 HRTIM_TIMDIER_SET1DE /!< Timer output 1 set interrupt flag /
mbed_official	125:23cc3068a9e4	2384	#define HRTIM_TIM_DMA_RST1 HRTIM_TIMDIER_RST1DE /!< Timer output 1 reset interrupt flag /
mbed_official	125:23cc3068a9e4	2385	#define HRTIM_TIM_DMA_SET2 HRTIM_TIMDIER_SET2DE /!< Timer output 2 set interrupt flag /
mbed_official	125:23cc3068a9e4	2386	#define HRTIM_TIM_DMA_RST2 HRTIM_TIMDIER_RST2DE /!< Timer output 2 reset interrupt flag /
mbed_official	125:23cc3068a9e4	2387	#define HRTIM_TIM_DMA_RST HRTIM_TIMDIER_RSTDE /!< Timer reset interrupt flag /
mbed_official	125:23cc3068a9e4	2388	#define HRTIM_TIM_DMA_DLYPRT HRTIM_TIMDIER_DLYPRTDE /!< Timer delay protection interrupt flag /
mbed_official	125:23cc3068a9e4	2389
mbed_official	125:23cc3068a9e4	2390	#define IS_HRTIM_TIM_DMA(DMA)\
mbed_official	125:23cc3068a9e4	2391	(((DMA) == HRTIM_TIMDIER_CMP1DE) \|\| \
mbed_official	125:23cc3068a9e4	2392	((DMA) == HRTIM_TIMDIER_CMP2DE) \|\| \
mbed_official	125:23cc3068a9e4	2393	((DMA) == HRTIM_TIMDIER_CMP3DE) \|\| \
mbed_official	125:23cc3068a9e4	2394	((DMA) == HRTIM_TIMDIER_CMP4DE) \|\| \
mbed_official	125:23cc3068a9e4	2395	((DMA) == HRTIM_TIMDIER_REPDE) \|\| \
mbed_official	125:23cc3068a9e4	2396	((DMA) == HRTIM_TIMDIER_UPDDE) \|\| \
mbed_official	125:23cc3068a9e4	2397	((DMA) == HRTIM_TIMDIER_CPT1DE) \|\| \
mbed_official	125:23cc3068a9e4	2398	((DMA) == HRTIM_TIMDIER_CPT2DE) \|\| \
mbed_official	125:23cc3068a9e4	2399	((DMA) == HRTIM_TIMDIER_SET1DE) \|\| \
mbed_official	125:23cc3068a9e4	2400	((DMA) == HRTIM_TIMDIER_RST1DE) \|\| \
mbed_official	125:23cc3068a9e4	2401	((DMA) == HRTIM_TIMDIER_SET2DE) \|\| \
mbed_official	125:23cc3068a9e4	2402	((DMA) == HRTIM_TIMDIER_RST2DE) \|\| \
mbed_official	125:23cc3068a9e4	2403	((DMA) == HRTIM_TIMDIER_RSTDE) \|\| \
mbed_official	125:23cc3068a9e4	2404	((DMA) == HRTIM_TIMDIER_DLYPRTDE))
mbed_official	125:23cc3068a9e4	2405
mbed_official	125:23cc3068a9e4	2406	/**
mbed_official	125:23cc3068a9e4	2407	* @}
mbed_official	125:23cc3068a9e4	2408	*/
mbed_official	125:23cc3068a9e4	2409
mbed_official	125:23cc3068a9e4	2410	/**
mbed_official	125:23cc3068a9e4	2411	* @}
mbed_official	125:23cc3068a9e4	2412	*/
mbed_official	125:23cc3068a9e4	2413
mbed_official	125:23cc3068a9e4	2414	/** @defgroup HRTIM_Instancedefinition
mbed_official	125:23cc3068a9e4	2415	* @{
mbed_official	125:23cc3068a9e4	2416	*/
mbed_official	125:23cc3068a9e4	2417	#define IS_HRTIM_INSTANCE(INSTANCE) (INSTANCE) == HRTIM1)
mbed_official	125:23cc3068a9e4	2418	/**
mbed_official	125:23cc3068a9e4	2419	* @}
mbed_official	125:23cc3068a9e4	2420	*/
mbed_official	125:23cc3068a9e4	2421
mbed_official	125:23cc3068a9e4	2422	/**
mbed_official	125:23cc3068a9e4	2423	* @}
mbed_official	125:23cc3068a9e4	2424	*/
mbed_official	125:23cc3068a9e4	2425
mbed_official	125:23cc3068a9e4	2426	/* Exported macro ------------------------------------------------------------*/
mbed_official	125:23cc3068a9e4	2427
mbed_official	125:23cc3068a9e4	2428
mbed_official	125:23cc3068a9e4	2429	/** @brief Enables or disables the timer counter(s)
mbed_official	125:23cc3068a9e4	2430	* @param __HANDLE__: specifies the HRTIM Handle.
mbed_official	125:23cc3068a9e4	2431	* @param __TIMERS__: timersto enable/disable
mbed_official	125:23cc3068a9e4	2432	* This parameter can be any combinations of the following values:
mbed_official	125:23cc3068a9e4	2433	* @arg HRTIM_TIMERID_MASTER: Master timer identifier
mbed_official	125:23cc3068a9e4	2434	* @arg HRTIM_TIMERID_TIMER_A: Timer A identifier
mbed_official	125:23cc3068a9e4	2435	* @arg HRTIM_TIMERID_TIMER_B: Timer B identifier
mbed_official	125:23cc3068a9e4	2436	* @arg HRTIM_TIMERID_TIMER_C: Timer C identifier
mbed_official	125:23cc3068a9e4	2437	* @arg HRTIM_TIMERID_TIMER_D: Timer D identifier
mbed_official	125:23cc3068a9e4	2438	* @arg HRTIM_TIMERID_TIMER_E: Timer E identifier
mbed_official	125:23cc3068a9e4	2439	* @retval None
mbed_official	125:23cc3068a9e4	2440	*/
mbed_official	125:23cc3068a9e4	2441	#define __HRTIM_ENABLE(__HANDLE__, __TIMERS__) ((__HANDLE__)->HRTIM_MASTER.MCR \|= (__TIMERS__))
mbed_official	125:23cc3068a9e4	2442
mbed_official	125:23cc3068a9e4	2443	/* The counter of a timing unit is disabled only if all the timer outputs */
mbed_official	125:23cc3068a9e4	2444	/* are disabled and no capture is configured */
mbed_official	125:23cc3068a9e4	2445	#define HRTIM_TAOEN_MASK (HRTIM_OENR_TA2OEN \| HRTIM_OENR_TA1OEN)
mbed_official	125:23cc3068a9e4	2446	#define HRTIM_TBOEN_MASK (HRTIM_OENR_TB2OEN \| HRTIM_OENR_TB1OEN)
mbed_official	125:23cc3068a9e4	2447	#define HRTIM_TCOEN_MASK (HRTIM_OENR_TC2OEN \| HRTIM_OENR_TC1OEN)
mbed_official	125:23cc3068a9e4	2448	#define HRTIM_TDOEN_MASK (HRTIM_OENR_TD2OEN \| HRTIM_OENR_TD1OEN)
mbed_official	125:23cc3068a9e4	2449	#define HRTIM_TEOEN_MASK (HRTIM_OENR_TE2OEN \| HRTIM_OENR_TE1OEN)
mbed_official	125:23cc3068a9e4	2450	#define __HRTIM_DISABLE(__HANDLE__, __TIMERS__)\
mbed_official	125:23cc3068a9e4	2451	do {\
mbed_official	125:23cc3068a9e4	2452	if (((__TIMERS__) & HRTIM_TIMERID_MASTER) == HRTIM_TIMERID_MASTER)\
mbed_official	125:23cc3068a9e4	2453	{\
mbed_official	125:23cc3068a9e4	2454	((__HANDLE__)->HRTIM_MASTER.MCR &= ~HRTIM_TIMERID_MASTER);\
mbed_official	125:23cc3068a9e4	2455	}\
mbed_official	125:23cc3068a9e4	2456	if (((__TIMERS__) & HRTIM_TIMERID_TIMER_A) == HRTIM_TIMERID_TIMER_A)\
mbed_official	125:23cc3068a9e4	2457	{\
mbed_official	125:23cc3068a9e4	2458	if (((__HANDLE__)->HRTIM_COMMON.OENR & HRTIM_TAOEN_MASK) == RESET)\
mbed_official	125:23cc3068a9e4	2459	{\
mbed_official	125:23cc3068a9e4	2460	((__HANDLE__)->HRTIM_MASTER.MCR &= ~HRTIM_TIMERID_TIMER_A);\
mbed_official	125:23cc3068a9e4	2461	}\
mbed_official	125:23cc3068a9e4	2462	}\
mbed_official	125:23cc3068a9e4	2463	if (((__TIMERS__) & HRTIM_TIMERID_TIMER_B) == HRTIM_TIMERID_TIMER_B)\
mbed_official	125:23cc3068a9e4	2464	{\
mbed_official	125:23cc3068a9e4	2465	if (((__HANDLE__)->HRTIM_COMMON.OENR & HRTIM_TBOEN_MASK) == RESET)\
mbed_official	125:23cc3068a9e4	2466	{\
mbed_official	125:23cc3068a9e4	2467	((__HANDLE__)->HRTIM_MASTER.MCR &= ~HRTIM_TIMERID_TIMER_B);\
mbed_official	125:23cc3068a9e4	2468	}\
mbed_official	125:23cc3068a9e4	2469	}\
mbed_official	125:23cc3068a9e4	2470	if (((__TIMERS__) & HRTIM_TIMERID_TIMER_C) == HRTIM_TIMERID_TIMER_C)\
mbed_official	125:23cc3068a9e4	2471	{\
mbed_official	125:23cc3068a9e4	2472	if (((__HANDLE__)->HRTIM_COMMON.OENR & HRTIM_TCOEN_MASK) == RESET)\
mbed_official	125:23cc3068a9e4	2473	{\
mbed_official	125:23cc3068a9e4	2474	((__HANDLE__)->HRTIM_MASTER.MCR &= ~HRTIM_TIMERID_TIMER_C);\
mbed_official	125:23cc3068a9e4	2475	}\
mbed_official	125:23cc3068a9e4	2476	}\
mbed_official	125:23cc3068a9e4	2477	if (((__TIMERS__) & HRTIM_TIMERID_TIMER_D) == HRTIM_TIMERID_TIMER_D)\
mbed_official	125:23cc3068a9e4	2478	{\
mbed_official	125:23cc3068a9e4	2479	if (((__HANDLE__)->HRTIM_COMMON.OENR & HRTIM_TDOEN_MASK) == RESET)\
mbed_official	125:23cc3068a9e4	2480	{\
mbed_official	125:23cc3068a9e4	2481	((__HANDLE__)->HRTIM_MASTER.MCR &= ~HRTIM_TIMERID_TIMER_D);\
mbed_official	125:23cc3068a9e4	2482	}\
mbed_official	125:23cc3068a9e4	2483	}\
mbed_official	125:23cc3068a9e4	2484	if (((__TIMERS__) & HRTIM_TIMERID_TIMER_E) == HRTIM_TIMERID_TIMER_E)\
mbed_official	125:23cc3068a9e4	2485	{\
mbed_official	125:23cc3068a9e4	2486	if (((__HANDLE__)->HRTIM_COMMON.OENR & HRTIM_TEOEN_MASK) == RESET)\
mbed_official	125:23cc3068a9e4	2487	{\
mbed_official	125:23cc3068a9e4	2488	((__HANDLE__)->HRTIM_MASTER.MCR &= ~HRTIM_TIMERID_TIMER_E);\
mbed_official	125:23cc3068a9e4	2489	}\
mbed_official	125:23cc3068a9e4	2490	}\
mbed_official	125:23cc3068a9e4	2491	} while(0)
mbed_official	125:23cc3068a9e4	2492
mbed_official	125:23cc3068a9e4	2493	/* Exported functions --------------------------------------------------------*/
mbed_official	125:23cc3068a9e4	2494
mbed_official	125:23cc3068a9e4	2495	/* Simple time base related functions *****************************************/
mbed_official	125:23cc3068a9e4	2496	void HRTIM_SimpleBase_Init(HRTIM_TypeDef* HRTIMx, uint32_t TimerIdx, HRTIM_BaseInitTypeDef* HRTIM_BaseInitStruct);
mbed_official	125:23cc3068a9e4	2497
mbed_official	125:23cc3068a9e4	2498	void HRTIM_DeInit(HRTIM_TypeDef* HRTIMx);
mbed_official	125:23cc3068a9e4	2499
mbed_official	125:23cc3068a9e4	2500	void HRTIM_SimpleBaseStart(HRTIM_TypeDef *hrtim, uint32_t TimerIdx);
mbed_official	125:23cc3068a9e4	2501	void HRTIM_SimpleBaseStop(HRTIM_TypeDef *hrtim, uint32_t TimerIdx);
mbed_official	125:23cc3068a9e4	2502
mbed_official	125:23cc3068a9e4	2503	/* Simple output compare related functions ************************************/
mbed_official	125:23cc3068a9e4	2504	void HRTIM_SimpleOC_Init(HRTIM_TypeDef * HRTIMx, uint32_t TimerIdx, HRTIM_BaseInitTypeDef* HRTIM_BaseInitStruct);
mbed_official	125:23cc3068a9e4	2505
mbed_official	125:23cc3068a9e4	2506	void HRTIM_SimpleOCChannelConfig(HRTIM_TypeDef *hrtim,
mbed_official	125:23cc3068a9e4	2507	uint32_t TimerIdx,
mbed_official	125:23cc3068a9e4	2508	uint32_t OCChannel,
mbed_official	125:23cc3068a9e4	2509	HRTIM_BasicOCChannelCfgTypeDef* pBasicOCChannelCfg);
mbed_official	125:23cc3068a9e4	2510
mbed_official	125:23cc3068a9e4	2511	void HRTIM_SimpleOCStart(HRTIM_TypeDef *hrtim,
mbed_official	125:23cc3068a9e4	2512	uint32_t TimerIdx,
mbed_official	125:23cc3068a9e4	2513	uint32_t OCChannel);
mbed_official	125:23cc3068a9e4	2514	void HRTIM_SimpleOCStop(HRTIM_TypeDef * HRTIMx,
mbed_official	125:23cc3068a9e4	2515	uint32_t TimerIdx,
mbed_official	125:23cc3068a9e4	2516	uint32_t OCChannel);
mbed_official	125:23cc3068a9e4	2517	/* Simple PWM output related functions ****************************************/
mbed_official	125:23cc3068a9e4	2518	void HRTIM_SimplePWM_Init(HRTIM_TypeDef * HRTIMx, uint32_t TimerIdx, HRTIM_BaseInitTypeDef* HRTIM_BaseInitStruct);
mbed_official	125:23cc3068a9e4	2519
mbed_official	125:23cc3068a9e4	2520	void HRTIM_SimplePWMChannelConfig(HRTIM_TypeDef *hrtim,
mbed_official	125:23cc3068a9e4	2521	uint32_t TimerIdx,
mbed_official	125:23cc3068a9e4	2522	uint32_t PWMChannel,
mbed_official	125:23cc3068a9e4	2523	HRTIM_BasicPWMChannelCfgTypeDef* pBasicPWMChannelCfg);
mbed_official	125:23cc3068a9e4	2524
mbed_official	125:23cc3068a9e4	2525	void HRTIM_SimplePWMStart(HRTIM_TypeDef * HRTIMx,
mbed_official	125:23cc3068a9e4	2526	uint32_t TimerIdx,
mbed_official	125:23cc3068a9e4	2527	uint32_t PWMChannel);
mbed_official	125:23cc3068a9e4	2528	void HRTIM_SimplePWMStop(HRTIM_TypeDef * HRTIMx,
mbed_official	125:23cc3068a9e4	2529	uint32_t TimerIdx,
mbed_official	125:23cc3068a9e4	2530	uint32_t PWMChannel);
mbed_official	125:23cc3068a9e4	2531	/* Simple capture related functions *******************************************/
mbed_official	125:23cc3068a9e4	2532	void HRTIM_SimpleCapture_Init(HRTIM_TypeDef * HRTIMx, uint32_t TimerIdx, HRTIM_BaseInitTypeDef* HRTIM_BaseInitStruct);
mbed_official	125:23cc3068a9e4	2533
mbed_official	125:23cc3068a9e4	2534	void HRTIM_SimpleCaptureChannelConfig(HRTIM_TypeDef *hrtim,
mbed_official	125:23cc3068a9e4	2535	uint32_t TimerIdx,
mbed_official	125:23cc3068a9e4	2536	uint32_t CaptureChannel,
mbed_official	125:23cc3068a9e4	2537	HRTIM_BasicCaptureChannelCfgTypeDef* pBasicCaptureChannelCfg);
mbed_official	125:23cc3068a9e4	2538
mbed_official	125:23cc3068a9e4	2539	void HRTIM_SimpleCaptureStart(HRTIM_TypeDef * HRTIMx,
mbed_official	125:23cc3068a9e4	2540	uint32_t TimerIdx,
mbed_official	125:23cc3068a9e4	2541	uint32_t CaptureChannel);
mbed_official	125:23cc3068a9e4	2542	void HRTIM_SimpleCaptureStop(HRTIM_TypeDef * HRTIMx,
mbed_official	125:23cc3068a9e4	2543	uint32_t TimerIdx,
mbed_official	125:23cc3068a9e4	2544	uint32_t CaptureChannel);
mbed_official	125:23cc3068a9e4	2545	/* SImple one pulse related functions *****************************************/
mbed_official	125:23cc3068a9e4	2546	void HRTIM_SimpleOnePulse_Init(HRTIM_TypeDef * HRTIMx, uint32_t TimerIdx, HRTIM_BaseInitTypeDef* HRTIM_BaseInitStruct);
mbed_official	125:23cc3068a9e4	2547
mbed_official	125:23cc3068a9e4	2548	void HRTIM_SimpleOnePulseChannelConfig(HRTIM_TypeDef *hrtim,
mbed_official	125:23cc3068a9e4	2549	uint32_t TimerIdx,
mbed_official	125:23cc3068a9e4	2550	uint32_t OnePulseChannel,
mbed_official	125:23cc3068a9e4	2551	HRTIM_BasicOnePulseChannelCfgTypeDef* pBasicOnePulseChannelCfg);
mbed_official	125:23cc3068a9e4	2552
mbed_official	125:23cc3068a9e4	2553	void HRTIM_SimpleOnePulseStart(HRTIM_TypeDef * HRTIMx,
mbed_official	125:23cc3068a9e4	2554	uint32_t TimerIdx,
mbed_official	125:23cc3068a9e4	2555	uint32_t OnePulseChannel);
mbed_official	125:23cc3068a9e4	2556	void HRTIM_SimpleOnePulseStop(HRTIM_TypeDef * HRTIM_,
mbed_official	125:23cc3068a9e4	2557	uint32_t TimerIdx,
mbed_official	125:23cc3068a9e4	2558	uint32_t OnePulseChannel);
mbed_official	125:23cc3068a9e4	2559	/* Waveform related functions *************************************************/
mbed_official	125:23cc3068a9e4	2560	void HRTIM_Waveform_Init(HRTIM_TypeDef * HRTIMx,
mbed_official	125:23cc3068a9e4	2561	uint32_t TimerIdx,
mbed_official	125:23cc3068a9e4	2562	HRTIM_BaseInitTypeDef* HRTIM_BaseInitStruct,
mbed_official	125:23cc3068a9e4	2563	HRTIM_TimerInitTypeDef* HRTIM_TimerInitStruct);
mbed_official	125:23cc3068a9e4	2564
mbed_official	125:23cc3068a9e4	2565	void HRTIM_WaveformTimerConfig(HRTIM_TypeDef *hrtim,
mbed_official	125:23cc3068a9e4	2566	uint32_t TimerIdx,
mbed_official	125:23cc3068a9e4	2567	HRTIM_TimerCfgTypeDef * HRTIM_TimerCfgStruct);
mbed_official	125:23cc3068a9e4	2568
mbed_official	125:23cc3068a9e4	2569	void HRTIM_WaveformCompareConfig(HRTIM_TypeDef *hrtim,
mbed_official	125:23cc3068a9e4	2570	uint32_t TimerIdx,
mbed_official	125:23cc3068a9e4	2571	uint32_t CompareUnit,
mbed_official	125:23cc3068a9e4	2572	HRTIM_CompareCfgTypeDef* pCompareCfg);
mbed_official	125:23cc3068a9e4	2573
mbed_official	125:23cc3068a9e4	2574	void HRTIM_MasterSetCompare(HRTIM_TypeDef * HRTIMx,
mbed_official	125:23cc3068a9e4	2575	uint32_t CompareUnit,
mbed_official	125:23cc3068a9e4	2576	uint32_t Compare);
mbed_official	125:23cc3068a9e4	2577	void HRTIM_WaveformCaptureConfig(HRTIM_TypeDef *hrtim,
mbed_official	125:23cc3068a9e4	2578	uint32_t TimerIdx,
mbed_official	125:23cc3068a9e4	2579	uint32_t CaptureUnit,
mbed_official	125:23cc3068a9e4	2580	HRTIM_CaptureCfgTypeDef* pCaptureCfg);
mbed_official	125:23cc3068a9e4	2581
mbed_official	125:23cc3068a9e4	2582	void HRTIM_WaveformOuputConfig(HRTIM_TypeDef *hrtim,
mbed_official	125:23cc3068a9e4	2583	uint32_t TimerIdx,
mbed_official	125:23cc3068a9e4	2584	uint32_t Output,
mbed_official	125:23cc3068a9e4	2585	HRTIM_OutputCfgTypeDef * pOutputCfg);
mbed_official	125:23cc3068a9e4	2586
mbed_official	125:23cc3068a9e4	2587	void HRTIM_TimerEventFilteringConfig(HRTIM_TypeDef *hrtim,
mbed_official	125:23cc3068a9e4	2588	uint32_t TimerIdx,
mbed_official	125:23cc3068a9e4	2589	uint32_t Event,
mbed_official	125:23cc3068a9e4	2590	HRTIM_TimerEventFilteringCfgTypeDef * pTimerEventFilteringCfg);
mbed_official	125:23cc3068a9e4	2591
mbed_official	125:23cc3068a9e4	2592	void HRTIM_DeadTimeConfig(HRTIM_TypeDef *hrtim,
mbed_official	125:23cc3068a9e4	2593	uint32_t TimerIdx,
mbed_official	125:23cc3068a9e4	2594	HRTIM_DeadTimeCfgTypeDef* pDeadTimeCfg);
mbed_official	125:23cc3068a9e4	2595
mbed_official	125:23cc3068a9e4	2596	void HRTIM_ChopperModeConfig(HRTIM_TypeDef *hrtim,
mbed_official	125:23cc3068a9e4	2597	uint32_t TimerIdx,
mbed_official	125:23cc3068a9e4	2598	HRTIM_ChopperModeCfgTypeDef* pChopperModeCfg);
mbed_official	125:23cc3068a9e4	2599
mbed_official	125:23cc3068a9e4	2600	void HRTIM_BurstDMAConfig(HRTIM_TypeDef *hrtim,
mbed_official	125:23cc3068a9e4	2601	uint32_t TimerIdx,
mbed_official	125:23cc3068a9e4	2602	uint32_t RegistersToUpdate);
mbed_official	125:23cc3068a9e4	2603
mbed_official	125:23cc3068a9e4	2604	void HRTIM_SynchronizationConfig(HRTIM_TypeDef *HRTIMx,
mbed_official	125:23cc3068a9e4	2605	HRTIM_SynchroCfgTypeDef * pSynchroCfg);
mbed_official	125:23cc3068a9e4	2606
mbed_official	125:23cc3068a9e4	2607	void HRTIM_BurstModeConfig(HRTIM_TypeDef *hrtim,
mbed_official	125:23cc3068a9e4	2608	HRTIM_BurstModeCfgTypeDef* pBurstModeCfg);
mbed_official	125:23cc3068a9e4	2609
mbed_official	125:23cc3068a9e4	2610	void HRTIM_EventConfig(HRTIM_TypeDef *hrtim,
mbed_official	125:23cc3068a9e4	2611	uint32_t Event,
mbed_official	125:23cc3068a9e4	2612	HRTIM_EventCfgTypeDef* pEventCfg);
mbed_official	125:23cc3068a9e4	2613
mbed_official	125:23cc3068a9e4	2614	void HRTIM_EventPrescalerConfig(HRTIM_TypeDef *hrtim,
mbed_official	125:23cc3068a9e4	2615	uint32_t Prescaler);
mbed_official	125:23cc3068a9e4	2616
mbed_official	125:23cc3068a9e4	2617	void HRTIM_FaultConfig(HRTIM_TypeDef *hrtim,
mbed_official	125:23cc3068a9e4	2618	HRTIM_FaultCfgTypeDef* pFaultCfg,
mbed_official	125:23cc3068a9e4	2619	uint32_t Fault);
mbed_official	125:23cc3068a9e4	2620
mbed_official	125:23cc3068a9e4	2621	void HRTIM_FaultPrescalerConfig(HRTIM_TypeDef *hrtim,
mbed_official	125:23cc3068a9e4	2622	uint32_t Prescaler);
mbed_official	125:23cc3068a9e4	2623	void HRTIM_FaultModeCtl(HRTIM_TypeDef * HRTIMx, uint32_t Fault, uint32_t Enable);
mbed_official	125:23cc3068a9e4	2624
mbed_official	125:23cc3068a9e4	2625	void HRTIM_ADCTriggerConfig(HRTIM_TypeDef *hrtim,
mbed_official	125:23cc3068a9e4	2626	uint32_t ADCTrigger,
mbed_official	125:23cc3068a9e4	2627	HRTIM_ADCTriggerCfgTypeDef* pADCTriggerCfg);
mbed_official	125:23cc3068a9e4	2628
mbed_official	125:23cc3068a9e4	2629	void HRTIM_WaveformCounterStart(HRTIM_TypeDef *hrtim,
mbed_official	125:23cc3068a9e4	2630	uint32_t TimersToStart);
mbed_official	125:23cc3068a9e4	2631
mbed_official	125:23cc3068a9e4	2632	void HRTIM_WaveformCounterStop(HRTIM_TypeDef *hrtim,
mbed_official	125:23cc3068a9e4	2633	uint32_t TimersToStop);
mbed_official	125:23cc3068a9e4	2634
mbed_official	125:23cc3068a9e4	2635	void HRTIM_WaveformOutputStart(HRTIM_TypeDef *hrtim,
mbed_official	125:23cc3068a9e4	2636	uint32_t OuputsToStart);
mbed_official	125:23cc3068a9e4	2637	void HRTIM_WaveformOutputStop(HRTIM_TypeDef * HRTIM_,
mbed_official	125:23cc3068a9e4	2638	uint32_t OuputsToStop);
mbed_official	125:23cc3068a9e4	2639
mbed_official	125:23cc3068a9e4	2640	void HRTIM_DLLCalibrationStart(HRTIM_TypeDef *hrtim,
mbed_official	125:23cc3068a9e4	2641	uint32_t CalibrationRate);
mbed_official	125:23cc3068a9e4	2642
mbed_official	125:23cc3068a9e4	2643	/* Interrupt/flags and DMA management */
mbed_official	125:23cc3068a9e4	2644	void HRTIM_ITConfig(HRTIM_TypeDef * HRTIMx, uint32_t TimerIdx, uint32_t HRTIM_TIM_IT, FunctionalState NewState);
mbed_official	125:23cc3068a9e4	2645	void HRTIM_ITCommonConfig(HRTIM_TypeDef * HRTIMx, uint32_t HRTIM_CommonIT, FunctionalState NewState);
mbed_official	125:23cc3068a9e4	2646
mbed_official	125:23cc3068a9e4	2647	void HRTIM_ClearFlag(HRTIM_TypeDef * HRTIMx, uint32_t TimerIdx, uint32_t HRTIM_FLAG);
mbed_official	125:23cc3068a9e4	2648	void HRTIM_ClearCommonFlag(HRTIM_TypeDef * HRTIMx, uint32_t HRTIM_CommonFLAG);
mbed_official	125:23cc3068a9e4	2649
mbed_official	125:23cc3068a9e4	2650	void HRTIM_ClearITPendingBit(HRTIM_TypeDef * HRTIMx, uint32_t TimerIdx, uint32_t HRTIM_IT);
mbed_official	125:23cc3068a9e4	2651	void HRTIM_ClearCommonITPendingBit(HRTIM_TypeDef * HRTIMx, uint32_t HRTIM_CommonIT);
mbed_official	125:23cc3068a9e4	2652
mbed_official	125:23cc3068a9e4	2653	FlagStatus HRTIM_GetFlagStatus(HRTIM_TypeDef * HRTIMx, uint32_t TimerIdx, uint32_t HRTIM_FLAG);
mbed_official	125:23cc3068a9e4	2654	FlagStatus HRTIM_GetCommonFlagStatus(HRTIM_TypeDef * HRTIMx, uint32_t HRTIM_CommonFLAG);
mbed_official	125:23cc3068a9e4	2655
mbed_official	125:23cc3068a9e4	2656	ITStatus HRTIM_GetITStatus(HRTIM_TypeDef * HRTIMx, uint32_t TimerIdx, uint32_t HRTIM_IT);
mbed_official	125:23cc3068a9e4	2657	ITStatus HRTIM_GetCommonITStatus(HRTIM_TypeDef * HRTIMx, uint32_t HRTIM_CommonIT);
mbed_official	125:23cc3068a9e4	2658
mbed_official	125:23cc3068a9e4	2659
mbed_official	125:23cc3068a9e4	2660	void HRTIM_DMACmd(HRTIM_TypeDef* HRTIMx, uint32_t TimerIdx, uint32_t HRTIM_DMA, FunctionalState NewState);
mbed_official	125:23cc3068a9e4	2661
mbed_official	125:23cc3068a9e4	2662	void HRTIM_BurstModeCtl(HRTIM_TypeDef *hrtim,
mbed_official	125:23cc3068a9e4	2663	uint32_t Enable);
mbed_official	125:23cc3068a9e4	2664
mbed_official	125:23cc3068a9e4	2665	void HRTIM_SoftwareCapture(HRTIM_TypeDef *hrtim,
mbed_official	125:23cc3068a9e4	2666	uint32_t TimerIdx,
mbed_official	125:23cc3068a9e4	2667	uint32_t CaptureUnit);
mbed_official	125:23cc3068a9e4	2668
mbed_official	125:23cc3068a9e4	2669	void HRTIM_SoftwareUpdate(HRTIM_TypeDef *hrtim,
mbed_official	125:23cc3068a9e4	2670	uint32_t TimersToUpdate);
mbed_official	125:23cc3068a9e4	2671
mbed_official	125:23cc3068a9e4	2672	void HRTIM_SoftwareReset(HRTIM_TypeDef *hrtim,
mbed_official	125:23cc3068a9e4	2673	uint32_t TimersToReset);
mbed_official	125:23cc3068a9e4	2674
mbed_official	125:23cc3068a9e4	2675
mbed_official	125:23cc3068a9e4	2676	uint32_t HRTIM_GetCapturedValue(HRTIM_TypeDef *hrtim,
mbed_official	125:23cc3068a9e4	2677	uint32_t TimerIdx,
mbed_official	125:23cc3068a9e4	2678	uint32_t CaptureUnit);
mbed_official	125:23cc3068a9e4	2679
mbed_official	125:23cc3068a9e4	2680	void HRTIM_WaveformOutputConfig(HRTIM_TypeDef * HRTIM_,
mbed_official	125:23cc3068a9e4	2681	uint32_t TimerIdx,
mbed_official	125:23cc3068a9e4	2682	uint32_t Output,
mbed_official	125:23cc3068a9e4	2683	HRTIM_OutputCfgTypeDef * pOutputCfg);
mbed_official	125:23cc3068a9e4	2684
mbed_official	125:23cc3068a9e4	2685	void HRTIM_WaveformSetOutputLevel(HRTIM_TypeDef *hrtim,
mbed_official	125:23cc3068a9e4	2686	uint32_t TimerIdx,
mbed_official	125:23cc3068a9e4	2687	uint32_t Output,
mbed_official	125:23cc3068a9e4	2688	uint32_t OutputLevel);
mbed_official	125:23cc3068a9e4	2689
mbed_official	125:23cc3068a9e4	2690	uint32_t HRTIM_WaveformGetOutputLevel(HRTIM_TypeDef *hrtim,
mbed_official	125:23cc3068a9e4	2691	uint32_t TimerIdx,
mbed_official	125:23cc3068a9e4	2692	uint32_t Output);
mbed_official	125:23cc3068a9e4	2693
mbed_official	125:23cc3068a9e4	2694	uint32_t HRTIM_WaveformGetOutputState(HRTIM_TypeDef * hhrtim,
mbed_official	125:23cc3068a9e4	2695	uint32_t TimerIdx,
mbed_official	125:23cc3068a9e4	2696	uint32_t Output);
mbed_official	125:23cc3068a9e4	2697
mbed_official	125:23cc3068a9e4	2698	uint32_t HRTIM_GetDelayedProtectionStatus(HRTIM_TypeDef *hrtim,
mbed_official	125:23cc3068a9e4	2699	uint32_t TimerIdx,
mbed_official	125:23cc3068a9e4	2700	uint32_t Output);
mbed_official	125:23cc3068a9e4	2701
mbed_official	125:23cc3068a9e4	2702	uint32_t HRTIM_GetBurstStatus(HRTIM_TypeDef *hrtim);
mbed_official	125:23cc3068a9e4	2703
mbed_official	125:23cc3068a9e4	2704	uint32_t HRTIM_GetCurrentPushPullStatus(HRTIM_TypeDef *hrtim,
mbed_official	125:23cc3068a9e4	2705	uint32_t TimerIdx);
mbed_official	125:23cc3068a9e4	2706
mbed_official	125:23cc3068a9e4	2707	uint32_t HRTIM_GetIdlePushPullStatus(HRTIM_TypeDef *hrtim,
mbed_official	125:23cc3068a9e4	2708	uint32_t TimerIdx);
mbed_official	125:23cc3068a9e4	2709	/**
mbed_official	125:23cc3068a9e4	2710	* @}
mbed_official	125:23cc3068a9e4	2711	*/
mbed_official	125:23cc3068a9e4	2712
mbed_official	125:23cc3068a9e4	2713	/**
mbed_official	125:23cc3068a9e4	2714	* @}
mbed_official	125:23cc3068a9e4	2715	*/
mbed_official	125:23cc3068a9e4	2716
mbed_official	125:23cc3068a9e4	2717	#ifdef __cplusplus
mbed_official	125:23cc3068a9e4	2718	}
mbed_official	125:23cc3068a9e4	2719	#endif
mbed_official	125:23cc3068a9e4	2720
mbed_official	125:23cc3068a9e4	2721	#endif /* __STM32F30x_HRTIM_H */
mbed_official	125:23cc3068a9e4	2722
mbed_official	125:23cc3068a9e4	2723	/********************** (C) COPYRIGHT STMicroelectronics *END OF FILE**/

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Type:	Library
Created:	13 Sep 2014
Imports:	4
Forks:	0
Commits:	324
Dependents:	1
Dependencies:	0
Followers:	2

targets/cmsis/TARGET_STM/TARGET_NUCLEO_F302R8/stm32f30x_hrtim.h@323:9e901b0a5aa1, 2014-09-13 (annotated)

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