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targets/cmsis/TARGET_STM/TARGET_DISCO_F303VC/stm32f30x_tim.h@323:9e901b0a5aa1, 2014-09-13 (annotated)

Committer:
shaoziyang
Date:
Sat Sep 13 14:25:46 2014 +0000
Revision:
323:9e901b0a5aa1
Parent:
157:90e3acc479a2 
test with CLOCK_SETUP = 0

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mbed_official 157:90e3acc479a2 1 /**
mbed_official 157:90e3acc479a2 2 ******************************************************************************
mbed_official 157:90e3acc479a2 3 * @file stm32f30x_tim.h
mbed_official 157:90e3acc479a2 4 * @author MCD Application Team
mbed_official 157:90e3acc479a2 5 * @version V1.1.0
mbed_official 157:90e3acc479a2 6 * @date 27-February-2014
mbed_official 157:90e3acc479a2 7 * @brief This file contains all the functions prototypes for the TIM firmware
mbed_official 157:90e3acc479a2 8 * library.
mbed_official 157:90e3acc479a2 9 ******************************************************************************
mbed_official 157:90e3acc479a2 10 * @attention
mbed_official 157:90e3acc479a2 11 *
mbed_official 157:90e3acc479a2 12 * <h2><center>&copy; COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
mbed_official 157:90e3acc479a2 13 *
mbed_official 157:90e3acc479a2 14 * Redistribution and use in source and binary forms, with or without modification,
mbed_official 157:90e3acc479a2 15 * are permitted provided that the following conditions are met:
mbed_official 157:90e3acc479a2 16 * 1. Redistributions of source code must retain the above copyright notice,
mbed_official 157:90e3acc479a2 17 * this list of conditions and the following disclaimer.
mbed_official 157:90e3acc479a2 18 * 2. Redistributions in binary form must reproduce the above copyright notice,
mbed_official 157:90e3acc479a2 19 * this list of conditions and the following disclaimer in the documentation
mbed_official 157:90e3acc479a2 20 * and/or other materials provided with the distribution.
mbed_official 157:90e3acc479a2 21 * 3. Neither the name of STMicroelectronics nor the names of its contributors
mbed_official 157:90e3acc479a2 22 * may be used to endorse or promote products derived from this software
mbed_official 157:90e3acc479a2 23 * without specific prior written permission.
mbed_official 157:90e3acc479a2 24 *
mbed_official 157:90e3acc479a2 25 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
mbed_official 157:90e3acc479a2 26 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
mbed_official 157:90e3acc479a2 27 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
mbed_official 157:90e3acc479a2 28 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
mbed_official 157:90e3acc479a2 29 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
mbed_official 157:90e3acc479a2 30 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
mbed_official 157:90e3acc479a2 31 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
mbed_official 157:90e3acc479a2 32 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
mbed_official 157:90e3acc479a2 33 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
mbed_official 157:90e3acc479a2 34 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
mbed_official 157:90e3acc479a2 35 *
mbed_official 157:90e3acc479a2 36 ******************************************************************************
mbed_official 157:90e3acc479a2 37 */
mbed_official 157:90e3acc479a2 38
mbed_official 157:90e3acc479a2 39 /* Define to prevent recursive inclusion -------------------------------------*/
mbed_official 157:90e3acc479a2 40 #ifndef __STM32F30x_TIM_H
mbed_official 157:90e3acc479a2 41 #define __STM32F30x_TIM_H
mbed_official 157:90e3acc479a2 42
mbed_official 157:90e3acc479a2 43 #ifdef __cplusplus
mbed_official 157:90e3acc479a2 44 extern "C" {
mbed_official 157:90e3acc479a2 45 #endif
mbed_official 157:90e3acc479a2 46
mbed_official 157:90e3acc479a2 47 /* Includes ------------------------------------------------------------------*/
mbed_official 157:90e3acc479a2 48 #include "stm32f30x.h"
mbed_official 157:90e3acc479a2 49
mbed_official 157:90e3acc479a2 50 /** @addtogroup stm32f30x_StdPeriph_Driver
mbed_official 157:90e3acc479a2 51 * @{
mbed_official 157:90e3acc479a2 52 */
mbed_official 157:90e3acc479a2 53
mbed_official 157:90e3acc479a2 54 /** @addtogroup TIM
mbed_official 157:90e3acc479a2 55 * @{
mbed_official 157:90e3acc479a2 56 */
mbed_official 157:90e3acc479a2 57
mbed_official 157:90e3acc479a2 58 /* Exported types ------------------------------------------------------------*/
mbed_official 157:90e3acc479a2 59
mbed_official 157:90e3acc479a2 60 /**
mbed_official 157:90e3acc479a2 61 * @brief TIM Time Base Init structure definition
mbed_official 157:90e3acc479a2 62 * @note This structure is used with all TIMx except for TIM6 and TIM7.
mbed_official 157:90e3acc479a2 63 */
mbed_official 157:90e3acc479a2 64
mbed_official 157:90e3acc479a2 65 typedef struct
mbed_official 157:90e3acc479a2 66 {
mbed_official 157:90e3acc479a2 67 uint16_t TIM_Prescaler; /*!< Specifies the prescaler value used to divide the TIM clock.
mbed_official 157:90e3acc479a2 68 This parameter can be a number between 0x0000 and 0xFFFF */
mbed_official 157:90e3acc479a2 69
mbed_official 157:90e3acc479a2 70 uint16_t TIM_CounterMode; /*!< Specifies the counter mode.
mbed_official 157:90e3acc479a2 71 This parameter can be a value of @ref TIM_Counter_Mode */
mbed_official 157:90e3acc479a2 72
mbed_official 157:90e3acc479a2 73 uint32_t TIM_Period; /*!< Specifies the period value to be loaded into the active
mbed_official 157:90e3acc479a2 74 Auto-Reload Register at the next update event.
mbed_official 157:90e3acc479a2 75 This parameter must be a number between 0x0000 and 0xFFFF. */
mbed_official 157:90e3acc479a2 76
mbed_official 157:90e3acc479a2 77 uint16_t TIM_ClockDivision; /*!< Specifies the clock division.
mbed_official 157:90e3acc479a2 78 This parameter can be a value of @ref TIM_Clock_Division_CKD */
mbed_official 157:90e3acc479a2 79
mbed_official 157:90e3acc479a2 80 uint16_t TIM_RepetitionCounter; /*!< Specifies the repetition counter value. Each time the RCR downcounter
mbed_official 157:90e3acc479a2 81 reaches zero, an update event is generated and counting restarts
mbed_official 157:90e3acc479a2 82 from the RCR value (N).
mbed_official 157:90e3acc479a2 83 This means in PWM mode that (N+1) corresponds to:
mbed_official 157:90e3acc479a2 84 - the number of PWM periods in edge-aligned mode
mbed_official 157:90e3acc479a2 85 - the number of half PWM period in center-aligned mode
mbed_official 157:90e3acc479a2 86 This parameter must be a number between 0x00 and 0xFF.
mbed_official 157:90e3acc479a2 87 @note This parameter is valid only for TIM1 and TIM8. */
mbed_official 157:90e3acc479a2 88 } TIM_TimeBaseInitTypeDef;
mbed_official 157:90e3acc479a2 89
mbed_official 157:90e3acc479a2 90 /**
mbed_official 157:90e3acc479a2 91 * @brief TIM Output Compare Init structure definition
mbed_official 157:90e3acc479a2 92 */
mbed_official 157:90e3acc479a2 93
mbed_official 157:90e3acc479a2 94 typedef struct
mbed_official 157:90e3acc479a2 95 {
mbed_official 157:90e3acc479a2 96 uint32_t TIM_OCMode; /*!< Specifies the TIM mode.
mbed_official 157:90e3acc479a2 97 This parameter can be a value of @ref TIM_Output_Compare_and_PWM_modes */
mbed_official 157:90e3acc479a2 98
mbed_official 157:90e3acc479a2 99 uint16_t TIM_OutputState; /*!< Specifies the TIM Output Compare state.
mbed_official 157:90e3acc479a2 100 This parameter can be a value of @ref TIM_Output_Compare_State */
mbed_official 157:90e3acc479a2 101
mbed_official 157:90e3acc479a2 102 uint16_t TIM_OutputNState; /*!< Specifies the TIM complementary Output Compare state.
mbed_official 157:90e3acc479a2 103 This parameter can be a value of @ref TIM_Output_Compare_N_State
mbed_official 157:90e3acc479a2 104 @note This parameter is valid only for TIM1 and TIM8. */
mbed_official 157:90e3acc479a2 105
mbed_official 157:90e3acc479a2 106 uint32_t TIM_Pulse; /*!< Specifies the pulse value to be loaded into the Capture Compare Register.
mbed_official 157:90e3acc479a2 107 This parameter can be a number between 0x0000 and 0xFFFF */
mbed_official 157:90e3acc479a2 108
mbed_official 157:90e3acc479a2 109 uint16_t TIM_OCPolarity; /*!< Specifies the output polarity.
mbed_official 157:90e3acc479a2 110 This parameter can be a value of @ref TIM_Output_Compare_Polarity */
mbed_official 157:90e3acc479a2 111
mbed_official 157:90e3acc479a2 112 uint16_t TIM_OCNPolarity; /*!< Specifies the complementary output polarity.
mbed_official 157:90e3acc479a2 113 This parameter can be a value of @ref TIM_Output_Compare_N_Polarity
mbed_official 157:90e3acc479a2 114 @note This parameter is valid only for TIM1 and TIM8. */
mbed_official 157:90e3acc479a2 115
mbed_official 157:90e3acc479a2 116 uint16_t TIM_OCIdleState; /*!< Specifies the TIM Output Compare pin state during Idle state.
mbed_official 157:90e3acc479a2 117 This parameter can be a value of @ref TIM_Output_Compare_Idle_State
mbed_official 157:90e3acc479a2 118 @note This parameter is valid only for TIM1 and TIM8. */
mbed_official 157:90e3acc479a2 119
mbed_official 157:90e3acc479a2 120 uint16_t TIM_OCNIdleState; /*!< Specifies the TIM Output Compare pin state during Idle state.
mbed_official 157:90e3acc479a2 121 This parameter can be a value of @ref TIM_Output_Compare_N_Idle_State
mbed_official 157:90e3acc479a2 122 @note This parameter is valid only for TIM1 and TIM8. */
mbed_official 157:90e3acc479a2 123 } TIM_OCInitTypeDef;
mbed_official 157:90e3acc479a2 124
mbed_official 157:90e3acc479a2 125 /**
mbed_official 157:90e3acc479a2 126 * @brief TIM Input Capture Init structure definition
mbed_official 157:90e3acc479a2 127 */
mbed_official 157:90e3acc479a2 128
mbed_official 157:90e3acc479a2 129 typedef struct
mbed_official 157:90e3acc479a2 130 {
mbed_official 157:90e3acc479a2 131
mbed_official 157:90e3acc479a2 132 uint16_t TIM_Channel; /*!< Specifies the TIM channel.
mbed_official 157:90e3acc479a2 133 This parameter can be a value of @ref TIM_Channel */
mbed_official 157:90e3acc479a2 134
mbed_official 157:90e3acc479a2 135 uint16_t TIM_ICPolarity; /*!< Specifies the active edge of the input signal.
mbed_official 157:90e3acc479a2 136 This parameter can be a value of @ref TIM_Input_Capture_Polarity */
mbed_official 157:90e3acc479a2 137
mbed_official 157:90e3acc479a2 138 uint16_t TIM_ICSelection; /*!< Specifies the input.
mbed_official 157:90e3acc479a2 139 This parameter can be a value of @ref TIM_Input_Capture_Selection */
mbed_official 157:90e3acc479a2 140
mbed_official 157:90e3acc479a2 141 uint16_t TIM_ICPrescaler; /*!< Specifies the Input Capture Prescaler.
mbed_official 157:90e3acc479a2 142 This parameter can be a value of @ref TIM_Input_Capture_Prescaler */
mbed_official 157:90e3acc479a2 143
mbed_official 157:90e3acc479a2 144 uint16_t TIM_ICFilter; /*!< Specifies the input capture filter.
mbed_official 157:90e3acc479a2 145 This parameter can be a number between 0x0 and 0xF */
mbed_official 157:90e3acc479a2 146 } TIM_ICInitTypeDef;
mbed_official 157:90e3acc479a2 147
mbed_official 157:90e3acc479a2 148 /**
mbed_official 157:90e3acc479a2 149 * @brief BDTR structure definition
mbed_official 157:90e3acc479a2 150 * @note This structure is used only with TIM1 and TIM8.
mbed_official 157:90e3acc479a2 151 */
mbed_official 157:90e3acc479a2 152
mbed_official 157:90e3acc479a2 153 typedef struct
mbed_official 157:90e3acc479a2 154 {
mbed_official 157:90e3acc479a2 155
mbed_official 157:90e3acc479a2 156 uint16_t TIM_OSSRState; /*!< Specifies the Off-State selection used in Run mode.
mbed_official 157:90e3acc479a2 157 This parameter can be a value of @ref TIM_OSSR_Off_State_Selection_for_Run_mode_state */
mbed_official 157:90e3acc479a2 158
mbed_official 157:90e3acc479a2 159 uint16_t TIM_OSSIState; /*!< Specifies the Off-State used in Idle state.
mbed_official 157:90e3acc479a2 160 This parameter can be a value of @ref TIM_OSSI_Off_State_Selection_for_Idle_mode_state */
mbed_official 157:90e3acc479a2 161
mbed_official 157:90e3acc479a2 162 uint16_t TIM_LOCKLevel; /*!< Specifies the LOCK level parameters.
mbed_official 157:90e3acc479a2 163 This parameter can be a value of @ref TIM_Lock_level */
mbed_official 157:90e3acc479a2 164
mbed_official 157:90e3acc479a2 165 uint16_t TIM_DeadTime; /*!< Specifies the delay time between the switching-off and the
mbed_official 157:90e3acc479a2 166 switching-on of the outputs.
mbed_official 157:90e3acc479a2 167 This parameter can be a number between 0x00 and 0xFF */
mbed_official 157:90e3acc479a2 168
mbed_official 157:90e3acc479a2 169 uint16_t TIM_Break; /*!< Specifies whether the TIM Break input is enabled or not.
mbed_official 157:90e3acc479a2 170 This parameter can be a value of @ref TIM_Break_Input_enable_disable */
mbed_official 157:90e3acc479a2 171
mbed_official 157:90e3acc479a2 172 uint16_t TIM_BreakPolarity; /*!< Specifies the TIM Break Input pin polarity.
mbed_official 157:90e3acc479a2 173 This parameter can be a value of @ref TIM_Break_Polarity */
mbed_official 157:90e3acc479a2 174
mbed_official 157:90e3acc479a2 175 uint16_t TIM_AutomaticOutput; /*!< Specifies whether the TIM Automatic Output feature is enabled or not.
mbed_official 157:90e3acc479a2 176 This parameter can be a value of @ref TIM_AOE_Bit_Set_Reset */
mbed_official 157:90e3acc479a2 177 } TIM_BDTRInitTypeDef;
mbed_official 157:90e3acc479a2 178
mbed_official 157:90e3acc479a2 179 /* Exported constants --------------------------------------------------------*/
mbed_official 157:90e3acc479a2 180
mbed_official 157:90e3acc479a2 181 /** @defgroup TIM_Exported_constants
mbed_official 157:90e3acc479a2 182 * @{
mbed_official 157:90e3acc479a2 183 */
mbed_official 157:90e3acc479a2 184
mbed_official 157:90e3acc479a2 185 #define IS_TIM_ALL_PERIPH(PERIPH) (((PERIPH) == TIM1) || \
mbed_official 157:90e3acc479a2 186 ((PERIPH) == TIM2) || \
mbed_official 157:90e3acc479a2 187 ((PERIPH) == TIM3) || \
mbed_official 157:90e3acc479a2 188 ((PERIPH) == TIM4) || \
mbed_official 157:90e3acc479a2 189 ((PERIPH) == TIM6) || \
mbed_official 157:90e3acc479a2 190 ((PERIPH) == TIM7) || \
mbed_official 157:90e3acc479a2 191 ((PERIPH) == TIM8) || \
mbed_official 157:90e3acc479a2 192 ((PERIPH) == TIM15) || \
mbed_official 157:90e3acc479a2 193 ((PERIPH) == TIM16) || \
mbed_official 157:90e3acc479a2 194 ((PERIPH) == TIM17))
mbed_official 157:90e3acc479a2 195 /* LIST1: TIM1, TIM2, TIM3, TIM4, TIM8, TIM15, TIM16 and TIM17 */
mbed_official 157:90e3acc479a2 196 #define IS_TIM_LIST1_PERIPH(PERIPH) (((PERIPH) == TIM1) || \
mbed_official 157:90e3acc479a2 197 ((PERIPH) == TIM2) || \
mbed_official 157:90e3acc479a2 198 ((PERIPH) == TIM3) || \
mbed_official 157:90e3acc479a2 199 ((PERIPH) == TIM4) || \
mbed_official 157:90e3acc479a2 200 ((PERIPH) == TIM8) || \
mbed_official 157:90e3acc479a2 201 ((PERIPH) == TIM15) || \
mbed_official 157:90e3acc479a2 202 ((PERIPH) == TIM16) || \
mbed_official 157:90e3acc479a2 203 ((PERIPH) == TIM17))
mbed_official 157:90e3acc479a2 204
mbed_official 157:90e3acc479a2 205 /* LIST2: TIM1, TIM2, TIM3, TIM4, TIM8 and TIM15 */
mbed_official 157:90e3acc479a2 206 #define IS_TIM_LIST2_PERIPH(PERIPH) (((PERIPH) == TIM1) || \
mbed_official 157:90e3acc479a2 207 ((PERIPH) == TIM2) || \
mbed_official 157:90e3acc479a2 208 ((PERIPH) == TIM3) || \
mbed_official 157:90e3acc479a2 209 ((PERIPH) == TIM4) || \
mbed_official 157:90e3acc479a2 210 ((PERIPH) == TIM8) || \
mbed_official 157:90e3acc479a2 211 ((PERIPH) == TIM15))
mbed_official 157:90e3acc479a2 212 /* LIST3: TIM1, TIM2, TIM3, TIM4 and TIM8 */
mbed_official 157:90e3acc479a2 213 #define IS_TIM_LIST3_PERIPH(PERIPH) (((PERIPH) == TIM1) || \
mbed_official 157:90e3acc479a2 214 ((PERIPH) == TIM2) || \
mbed_official 157:90e3acc479a2 215 ((PERIPH) == TIM3) || \
mbed_official 157:90e3acc479a2 216 ((PERIPH) == TIM4) || \
mbed_official 157:90e3acc479a2 217 ((PERIPH) == TIM8))
mbed_official 157:90e3acc479a2 218 /* LIST4: TIM1 and TIM8 */
mbed_official 157:90e3acc479a2 219 #define IS_TIM_LIST4_PERIPH(PERIPH) (((PERIPH) == TIM1) ||\
mbed_official 157:90e3acc479a2 220 ((PERIPH) == TIM8))
mbed_official 157:90e3acc479a2 221 /* LIST5: TIM1, TIM2, TIM3, TIM4, TIM5, TIM6, TIM7 and TIM8 */
mbed_official 157:90e3acc479a2 222 #define IS_TIM_LIST5_PERIPH(PERIPH) (((PERIPH) == TIM1) || \
mbed_official 157:90e3acc479a2 223 ((PERIPH) == TIM2) || \
mbed_official 157:90e3acc479a2 224 ((PERIPH) == TIM3) || \
mbed_official 157:90e3acc479a2 225 ((PERIPH) == TIM4) || \
mbed_official 157:90e3acc479a2 226 ((PERIPH) == TIM6) || \
mbed_official 157:90e3acc479a2 227 ((PERIPH) == TIM7) || \
mbed_official 157:90e3acc479a2 228 ((PERIPH) == TIM8))
mbed_official 157:90e3acc479a2 229 /* LIST6: TIM1, TIM8, TIM15, TIM16 and TIM17 */
mbed_official 157:90e3acc479a2 230 #define IS_TIM_LIST6_PERIPH(PERIPH) (((PERIPH) == TIM1) || \
mbed_official 157:90e3acc479a2 231 ((PERIPH) == TIM8) || \
mbed_official 157:90e3acc479a2 232 ((PERIPH) == TIM15) || \
mbed_official 157:90e3acc479a2 233 ((PERIPH) == TIM16) || \
mbed_official 157:90e3acc479a2 234 ((PERIPH) == TIM17))
mbed_official 157:90e3acc479a2 235
mbed_official 157:90e3acc479a2 236 /* LIST5: TIM1, TIM2, TIM3, TIM4, TIM5, TIM6, TIM7 and TIM8 */
mbed_official 157:90e3acc479a2 237 #define IS_TIM_LIST7_PERIPH(PERIPH) (((PERIPH) == TIM1) || \
mbed_official 157:90e3acc479a2 238 ((PERIPH) == TIM2) || \
mbed_official 157:90e3acc479a2 239 ((PERIPH) == TIM3) || \
mbed_official 157:90e3acc479a2 240 ((PERIPH) == TIM4) || \
mbed_official 157:90e3acc479a2 241 ((PERIPH) == TIM6) || \
mbed_official 157:90e3acc479a2 242 ((PERIPH) == TIM7) || \
mbed_official 157:90e3acc479a2 243 ((PERIPH) == TIM8) || \
mbed_official 157:90e3acc479a2 244 ((PERIPH) == TIM15))
mbed_official 157:90e3acc479a2 245 /* LIST8: TIM16 (option register) */
mbed_official 157:90e3acc479a2 246 #define IS_TIM_LIST8_PERIPH(PERIPH) (((PERIPH) == TIM16)|| \
mbed_official 157:90e3acc479a2 247 ((PERIPH) == TIM1)||\
mbed_official 157:90e3acc479a2 248 ((PERIPH) == TIM8))
mbed_official 157:90e3acc479a2 249
mbed_official 157:90e3acc479a2 250 /** @defgroup TIM_Output_Compare_and_PWM_modes
mbed_official 157:90e3acc479a2 251 * @{
mbed_official 157:90e3acc479a2 252 */
mbed_official 157:90e3acc479a2 253
mbed_official 157:90e3acc479a2 254 #define TIM_OCMode_Timing ((uint32_t)0x00000)
mbed_official 157:90e3acc479a2 255 #define TIM_OCMode_Active ((uint32_t)0x00010)
mbed_official 157:90e3acc479a2 256 #define TIM_OCMode_Inactive ((uint32_t)0x00020)
mbed_official 157:90e3acc479a2 257 #define TIM_OCMode_Toggle ((uint32_t)0x00030)
mbed_official 157:90e3acc479a2 258 #define TIM_OCMode_PWM1 ((uint32_t)0x00060)
mbed_official 157:90e3acc479a2 259 #define TIM_OCMode_PWM2 ((uint32_t)0x00070)
mbed_official 157:90e3acc479a2 260
mbed_official 157:90e3acc479a2 261 #define TIM_OCMode_Retrigerrable_OPM1 ((uint32_t)0x10000)
mbed_official 157:90e3acc479a2 262 #define TIM_OCMode_Retrigerrable_OPM2 ((uint32_t)0x10010)
mbed_official 157:90e3acc479a2 263 #define TIM_OCMode_Combined_PWM1 ((uint32_t)0x10040)
mbed_official 157:90e3acc479a2 264 #define TIM_OCMode_Combined_PWM2 ((uint32_t)0x10050)
mbed_official 157:90e3acc479a2 265 #define TIM_OCMode_Asymmetric_PWM1 ((uint32_t)0x10060)
mbed_official 157:90e3acc479a2 266 #define TIM_OCMode_Asymmetric_PWM2 ((uint32_t)0x10070)
mbed_official 157:90e3acc479a2 267
mbed_official 157:90e3acc479a2 268 #define IS_TIM_OC_MODE(MODE) (((MODE) == TIM_OCMode_Timing) || \
mbed_official 157:90e3acc479a2 269 ((MODE) == TIM_OCMode_Active) || \
mbed_official 157:90e3acc479a2 270 ((MODE) == TIM_OCMode_Inactive) || \
mbed_official 157:90e3acc479a2 271 ((MODE) == TIM_OCMode_Toggle)|| \
mbed_official 157:90e3acc479a2 272 ((MODE) == TIM_OCMode_PWM1) || \
mbed_official 157:90e3acc479a2 273 ((MODE) == TIM_OCMode_PWM2) || \
mbed_official 157:90e3acc479a2 274 ((MODE) == TIM_OCMode_Retrigerrable_OPM1) || \
mbed_official 157:90e3acc479a2 275 ((MODE) == TIM_OCMode_Retrigerrable_OPM2) || \
mbed_official 157:90e3acc479a2 276 ((MODE) == TIM_OCMode_Combined_PWM1) || \
mbed_official 157:90e3acc479a2 277 ((MODE) == TIM_OCMode_Combined_PWM2) || \
mbed_official 157:90e3acc479a2 278 ((MODE) == TIM_OCMode_Asymmetric_PWM1) || \
mbed_official 157:90e3acc479a2 279 ((MODE) == TIM_OCMode_Asymmetric_PWM2))
mbed_official 157:90e3acc479a2 280
mbed_official 157:90e3acc479a2 281 #define IS_TIM_OCM(MODE) (((MODE) == TIM_OCMode_Timing) || \
mbed_official 157:90e3acc479a2 282 ((MODE) == TIM_OCMode_Active) || \
mbed_official 157:90e3acc479a2 283 ((MODE) == TIM_OCMode_Inactive) || \
mbed_official 157:90e3acc479a2 284 ((MODE) == TIM_OCMode_Toggle)|| \
mbed_official 157:90e3acc479a2 285 ((MODE) == TIM_OCMode_PWM1) || \
mbed_official 157:90e3acc479a2 286 ((MODE) == TIM_OCMode_PWM2) || \
mbed_official 157:90e3acc479a2 287 ((MODE) == TIM_ForcedAction_Active) || \
mbed_official 157:90e3acc479a2 288 ((MODE) == TIM_ForcedAction_InActive) || \
mbed_official 157:90e3acc479a2 289 ((MODE) == TIM_OCMode_Retrigerrable_OPM1) || \
mbed_official 157:90e3acc479a2 290 ((MODE) == TIM_OCMode_Retrigerrable_OPM2) || \
mbed_official 157:90e3acc479a2 291 ((MODE) == TIM_OCMode_Combined_PWM1) || \
mbed_official 157:90e3acc479a2 292 ((MODE) == TIM_OCMode_Combined_PWM2) || \
mbed_official 157:90e3acc479a2 293 ((MODE) == TIM_OCMode_Asymmetric_PWM1) || \
mbed_official 157:90e3acc479a2 294 ((MODE) == TIM_OCMode_Asymmetric_PWM2))
mbed_official 157:90e3acc479a2 295 /**
mbed_official 157:90e3acc479a2 296 * @}
mbed_official 157:90e3acc479a2 297 */
mbed_official 157:90e3acc479a2 298
mbed_official 157:90e3acc479a2 299 /** @defgroup TIM_One_Pulse_Mode
mbed_official 157:90e3acc479a2 300 * @{
mbed_official 157:90e3acc479a2 301 */
mbed_official 157:90e3acc479a2 302
mbed_official 157:90e3acc479a2 303 #define TIM_OPMode_Single ((uint16_t)0x0008)
mbed_official 157:90e3acc479a2 304 #define TIM_OPMode_Repetitive ((uint16_t)0x0000)
mbed_official 157:90e3acc479a2 305 #define IS_TIM_OPM_MODE(MODE) (((MODE) == TIM_OPMode_Single) || \
mbed_official 157:90e3acc479a2 306 ((MODE) == TIM_OPMode_Repetitive))
mbed_official 157:90e3acc479a2 307 /**
mbed_official 157:90e3acc479a2 308 * @}
mbed_official 157:90e3acc479a2 309 */
mbed_official 157:90e3acc479a2 310
mbed_official 157:90e3acc479a2 311 /** @defgroup TIM_Channel
mbed_official 157:90e3acc479a2 312 * @{
mbed_official 157:90e3acc479a2 313 */
mbed_official 157:90e3acc479a2 314
mbed_official 157:90e3acc479a2 315 #define TIM_Channel_1 ((uint16_t)0x0000)
mbed_official 157:90e3acc479a2 316 #define TIM_Channel_2 ((uint16_t)0x0004)
mbed_official 157:90e3acc479a2 317 #define TIM_Channel_3 ((uint16_t)0x0008)
mbed_official 157:90e3acc479a2 318 #define TIM_Channel_4 ((uint16_t)0x000C)
mbed_official 157:90e3acc479a2 319 #define TIM_Channel_5 ((uint16_t)0x0010)
mbed_official 157:90e3acc479a2 320 #define TIM_Channel_6 ((uint16_t)0x0014)
mbed_official 157:90e3acc479a2 321
mbed_official 157:90e3acc479a2 322 #define IS_TIM_CHANNEL(CHANNEL) (((CHANNEL) == TIM_Channel_1) || \
mbed_official 157:90e3acc479a2 323 ((CHANNEL) == TIM_Channel_2) || \
mbed_official 157:90e3acc479a2 324 ((CHANNEL) == TIM_Channel_3) || \
mbed_official 157:90e3acc479a2 325 ((CHANNEL) == TIM_Channel_4))
mbed_official 157:90e3acc479a2 326
mbed_official 157:90e3acc479a2 327 #define IS_TIM_PWMI_CHANNEL(CHANNEL) (((CHANNEL) == TIM_Channel_1) || \
mbed_official 157:90e3acc479a2 328 ((CHANNEL) == TIM_Channel_2))
mbed_official 157:90e3acc479a2 329 #define IS_TIM_COMPLEMENTARY_CHANNEL(CHANNEL) (((CHANNEL) == TIM_Channel_1) || \
mbed_official 157:90e3acc479a2 330 ((CHANNEL) == TIM_Channel_2) || \
mbed_official 157:90e3acc479a2 331 ((CHANNEL) == TIM_Channel_3))
mbed_official 157:90e3acc479a2 332 /**
mbed_official 157:90e3acc479a2 333 * @}
mbed_official 157:90e3acc479a2 334 */
mbed_official 157:90e3acc479a2 335
mbed_official 157:90e3acc479a2 336 /** @defgroup TIM_Clock_Division_CKD
mbed_official 157:90e3acc479a2 337 * @{
mbed_official 157:90e3acc479a2 338 */
mbed_official 157:90e3acc479a2 339
mbed_official 157:90e3acc479a2 340 #define TIM_CKD_DIV1 ((uint16_t)0x0000)
mbed_official 157:90e3acc479a2 341 #define TIM_CKD_DIV2 ((uint16_t)0x0100)
mbed_official 157:90e3acc479a2 342 #define TIM_CKD_DIV4 ((uint16_t)0x0200)
mbed_official 157:90e3acc479a2 343 #define IS_TIM_CKD_DIV(DIV) (((DIV) == TIM_CKD_DIV1) || \
mbed_official 157:90e3acc479a2 344 ((DIV) == TIM_CKD_DIV2) || \
mbed_official 157:90e3acc479a2 345 ((DIV) == TIM_CKD_DIV4))
mbed_official 157:90e3acc479a2 346 /**
mbed_official 157:90e3acc479a2 347 * @}
mbed_official 157:90e3acc479a2 348 */
mbed_official 157:90e3acc479a2 349
mbed_official 157:90e3acc479a2 350 /** @defgroup TIM_Counter_Mode
mbed_official 157:90e3acc479a2 351 * @{
mbed_official 157:90e3acc479a2 352 */
mbed_official 157:90e3acc479a2 353
mbed_official 157:90e3acc479a2 354 #define TIM_CounterMode_Up ((uint16_t)0x0000)
mbed_official 157:90e3acc479a2 355 #define TIM_CounterMode_Down ((uint16_t)0x0010)
mbed_official 157:90e3acc479a2 356 #define TIM_CounterMode_CenterAligned1 ((uint16_t)0x0020)
mbed_official 157:90e3acc479a2 357 #define TIM_CounterMode_CenterAligned2 ((uint16_t)0x0040)
mbed_official 157:90e3acc479a2 358 #define TIM_CounterMode_CenterAligned3 ((uint16_t)0x0060)
mbed_official 157:90e3acc479a2 359 #define IS_TIM_COUNTER_MODE(MODE) (((MODE) == TIM_CounterMode_Up) || \
mbed_official 157:90e3acc479a2 360 ((MODE) == TIM_CounterMode_Down) || \
mbed_official 157:90e3acc479a2 361 ((MODE) == TIM_CounterMode_CenterAligned1) || \
mbed_official 157:90e3acc479a2 362 ((MODE) == TIM_CounterMode_CenterAligned2) || \
mbed_official 157:90e3acc479a2 363 ((MODE) == TIM_CounterMode_CenterAligned3))
mbed_official 157:90e3acc479a2 364 /**
mbed_official 157:90e3acc479a2 365 * @}
mbed_official 157:90e3acc479a2 366 */
mbed_official 157:90e3acc479a2 367
mbed_official 157:90e3acc479a2 368 /** @defgroup TIM_Output_Compare_Polarity
mbed_official 157:90e3acc479a2 369 * @{
mbed_official 157:90e3acc479a2 370 */
mbed_official 157:90e3acc479a2 371
mbed_official 157:90e3acc479a2 372 #define TIM_OCPolarity_High ((uint16_t)0x0000)
mbed_official 157:90e3acc479a2 373 #define TIM_OCPolarity_Low ((uint16_t)0x0002)
mbed_official 157:90e3acc479a2 374 #define IS_TIM_OC_POLARITY(POLARITY) (((POLARITY) == TIM_OCPolarity_High) || \
mbed_official 157:90e3acc479a2 375 ((POLARITY) == TIM_OCPolarity_Low))
mbed_official 157:90e3acc479a2 376 /**
mbed_official 157:90e3acc479a2 377 * @}
mbed_official 157:90e3acc479a2 378 */
mbed_official 157:90e3acc479a2 379
mbed_official 157:90e3acc479a2 380 /** @defgroup TIM_Output_Compare_N_Polarity
mbed_official 157:90e3acc479a2 381 * @{
mbed_official 157:90e3acc479a2 382 */
mbed_official 157:90e3acc479a2 383
mbed_official 157:90e3acc479a2 384 #define TIM_OCNPolarity_High ((uint16_t)0x0000)
mbed_official 157:90e3acc479a2 385 #define TIM_OCNPolarity_Low ((uint16_t)0x0008)
mbed_official 157:90e3acc479a2 386 #define IS_TIM_OCN_POLARITY(POLARITY) (((POLARITY) == TIM_OCNPolarity_High) || \
mbed_official 157:90e3acc479a2 387 ((POLARITY) == TIM_OCNPolarity_Low))
mbed_official 157:90e3acc479a2 388 /**
mbed_official 157:90e3acc479a2 389 * @}
mbed_official 157:90e3acc479a2 390 */
mbed_official 157:90e3acc479a2 391
mbed_official 157:90e3acc479a2 392 /** @defgroup TIM_Output_Compare_State
mbed_official 157:90e3acc479a2 393 * @{
mbed_official 157:90e3acc479a2 394 */
mbed_official 157:90e3acc479a2 395
mbed_official 157:90e3acc479a2 396 #define TIM_OutputState_Disable ((uint16_t)0x0000)
mbed_official 157:90e3acc479a2 397 #define TIM_OutputState_Enable ((uint16_t)0x0001)
mbed_official 157:90e3acc479a2 398 #define IS_TIM_OUTPUT_STATE(STATE) (((STATE) == TIM_OutputState_Disable) || \
mbed_official 157:90e3acc479a2 399 ((STATE) == TIM_OutputState_Enable))
mbed_official 157:90e3acc479a2 400 /**
mbed_official 157:90e3acc479a2 401 * @}
mbed_official 157:90e3acc479a2 402 */
mbed_official 157:90e3acc479a2 403
mbed_official 157:90e3acc479a2 404 /** @defgroup TIM_Output_Compare_N_State
mbed_official 157:90e3acc479a2 405 * @{
mbed_official 157:90e3acc479a2 406 */
mbed_official 157:90e3acc479a2 407
mbed_official 157:90e3acc479a2 408 #define TIM_OutputNState_Disable ((uint16_t)0x0000)
mbed_official 157:90e3acc479a2 409 #define TIM_OutputNState_Enable ((uint16_t)0x0004)
mbed_official 157:90e3acc479a2 410 #define IS_TIM_OUTPUTN_STATE(STATE) (((STATE) == TIM_OutputNState_Disable) || \
mbed_official 157:90e3acc479a2 411 ((STATE) == TIM_OutputNState_Enable))
mbed_official 157:90e3acc479a2 412 /**
mbed_official 157:90e3acc479a2 413 * @}
mbed_official 157:90e3acc479a2 414 */
mbed_official 157:90e3acc479a2 415
mbed_official 157:90e3acc479a2 416 /** @defgroup TIM_Capture_Compare_State
mbed_official 157:90e3acc479a2 417 * @{
mbed_official 157:90e3acc479a2 418 */
mbed_official 157:90e3acc479a2 419
mbed_official 157:90e3acc479a2 420 #define TIM_CCx_Enable ((uint16_t)0x0001)
mbed_official 157:90e3acc479a2 421 #define TIM_CCx_Disable ((uint16_t)0x0000)
mbed_official 157:90e3acc479a2 422 #define IS_TIM_CCX(CCX) (((CCX) == TIM_CCx_Enable) || \
mbed_official 157:90e3acc479a2 423 ((CCX) == TIM_CCx_Disable))
mbed_official 157:90e3acc479a2 424 /**
mbed_official 157:90e3acc479a2 425 * @}
mbed_official 157:90e3acc479a2 426 */
mbed_official 157:90e3acc479a2 427
mbed_official 157:90e3acc479a2 428 /** @defgroup TIM_Capture_Compare_N_State
mbed_official 157:90e3acc479a2 429 * @{
mbed_official 157:90e3acc479a2 430 */
mbed_official 157:90e3acc479a2 431
mbed_official 157:90e3acc479a2 432 #define TIM_CCxN_Enable ((uint16_t)0x0004)
mbed_official 157:90e3acc479a2 433 #define TIM_CCxN_Disable ((uint16_t)0x0000)
mbed_official 157:90e3acc479a2 434 #define IS_TIM_CCXN(CCXN) (((CCXN) == TIM_CCxN_Enable) || \
mbed_official 157:90e3acc479a2 435 ((CCXN) == TIM_CCxN_Disable))
mbed_official 157:90e3acc479a2 436 /**
mbed_official 157:90e3acc479a2 437 * @}
mbed_official 157:90e3acc479a2 438 */
mbed_official 157:90e3acc479a2 439
mbed_official 157:90e3acc479a2 440 /** @defgroup TIM_Break_Input_enable_disable
mbed_official 157:90e3acc479a2 441 * @{
mbed_official 157:90e3acc479a2 442 */
mbed_official 157:90e3acc479a2 443
mbed_official 157:90e3acc479a2 444 #define TIM_Break_Enable ((uint16_t)0x1000)
mbed_official 157:90e3acc479a2 445 #define TIM_Break_Disable ((uint16_t)0x0000)
mbed_official 157:90e3acc479a2 446 #define IS_TIM_BREAK_STATE(STATE) (((STATE) == TIM_Break_Enable) || \
mbed_official 157:90e3acc479a2 447 ((STATE) == TIM_Break_Disable))
mbed_official 157:90e3acc479a2 448 /**
mbed_official 157:90e3acc479a2 449 * @}
mbed_official 157:90e3acc479a2 450 */
mbed_official 157:90e3acc479a2 451
mbed_official 157:90e3acc479a2 452 /** @defgroup TIM_Break1_Input_enable_disable
mbed_official 157:90e3acc479a2 453 * @{
mbed_official 157:90e3acc479a2 454 */
mbed_official 157:90e3acc479a2 455
mbed_official 157:90e3acc479a2 456 #define TIM_Break1_Enable ((uint32_t)0x00001000)
mbed_official 157:90e3acc479a2 457 #define TIM_Break1_Disable ((uint32_t)0x00000000)
mbed_official 157:90e3acc479a2 458 #define IS_TIM_BREAK1_STATE(STATE) (((STATE) == TIM_Break1_Enable) || \
mbed_official 157:90e3acc479a2 459 ((STATE) == TIM_Break1_Disable))
mbed_official 157:90e3acc479a2 460 /**
mbed_official 157:90e3acc479a2 461 * @}
mbed_official 157:90e3acc479a2 462 */
mbed_official 157:90e3acc479a2 463
mbed_official 157:90e3acc479a2 464 /** @defgroup TIM_Break2_Input_enable_disable
mbed_official 157:90e3acc479a2 465 * @{
mbed_official 157:90e3acc479a2 466 */
mbed_official 157:90e3acc479a2 467
mbed_official 157:90e3acc479a2 468 #define TIM_Break2_Enable ((uint32_t)0x01000000)
mbed_official 157:90e3acc479a2 469 #define TIM_Break2_Disable ((uint32_t)0x00000000)
mbed_official 157:90e3acc479a2 470 #define IS_TIM_BREAK2_STATE(STATE) (((STATE) == TIM_Break2_Enable) || \
mbed_official 157:90e3acc479a2 471 ((STATE) == TIM_Break2_Disable))
mbed_official 157:90e3acc479a2 472 /**
mbed_official 157:90e3acc479a2 473 * @}
mbed_official 157:90e3acc479a2 474 */
mbed_official 157:90e3acc479a2 475
mbed_official 157:90e3acc479a2 476 /** @defgroup TIM_Break_Polarity
mbed_official 157:90e3acc479a2 477 * @{
mbed_official 157:90e3acc479a2 478 */
mbed_official 157:90e3acc479a2 479
mbed_official 157:90e3acc479a2 480 #define TIM_BreakPolarity_Low ((uint16_t)0x0000)
mbed_official 157:90e3acc479a2 481 #define TIM_BreakPolarity_High ((uint16_t)0x2000)
mbed_official 157:90e3acc479a2 482 #define IS_TIM_BREAK_POLARITY(POLARITY) (((POLARITY) == TIM_BreakPolarity_Low) || \
mbed_official 157:90e3acc479a2 483 ((POLARITY) == TIM_BreakPolarity_High))
mbed_official 157:90e3acc479a2 484 /**
mbed_official 157:90e3acc479a2 485 * @}
mbed_official 157:90e3acc479a2 486 */
mbed_official 157:90e3acc479a2 487
mbed_official 157:90e3acc479a2 488 /** @defgroup TIM_Break1_Polarity
mbed_official 157:90e3acc479a2 489 * @{
mbed_official 157:90e3acc479a2 490 */
mbed_official 157:90e3acc479a2 491
mbed_official 157:90e3acc479a2 492 #define TIM_Break1Polarity_Low ((uint32_t)0x00000000)
mbed_official 157:90e3acc479a2 493 #define TIM_Break1Polarity_High ((uint32_t)0x00002000)
mbed_official 157:90e3acc479a2 494 #define IS_TIM_BREAK1_POLARITY(POLARITY) (((POLARITY) == TIM_Break1Polarity_Low) || \
mbed_official 157:90e3acc479a2 495 ((POLARITY) == TIM_Break1Polarity_High))
mbed_official 157:90e3acc479a2 496 /**
mbed_official 157:90e3acc479a2 497 * @}
mbed_official 157:90e3acc479a2 498 */
mbed_official 157:90e3acc479a2 499
mbed_official 157:90e3acc479a2 500 /** @defgroup TIM_Break2_Polarity
mbed_official 157:90e3acc479a2 501 * @{
mbed_official 157:90e3acc479a2 502 */
mbed_official 157:90e3acc479a2 503
mbed_official 157:90e3acc479a2 504 #define TIM_Break2Polarity_Low ((uint32_t)0x00000000)
mbed_official 157:90e3acc479a2 505 #define TIM_Break2Polarity_High ((uint32_t)0x02000000)
mbed_official 157:90e3acc479a2 506 #define IS_TIM_BREAK2_POLARITY(POLARITY) (((POLARITY) == TIM_Break2Polarity_Low) || \
mbed_official 157:90e3acc479a2 507 ((POLARITY) == TIM_Break2Polarity_High))
mbed_official 157:90e3acc479a2 508 /**
mbed_official 157:90e3acc479a2 509 * @}
mbed_official 157:90e3acc479a2 510 */
mbed_official 157:90e3acc479a2 511
mbed_official 157:90e3acc479a2 512 /** @defgroup TIM_Break1_Filter
mbed_official 157:90e3acc479a2 513 * @{
mbed_official 157:90e3acc479a2 514 */
mbed_official 157:90e3acc479a2 515
mbed_official 157:90e3acc479a2 516 #define IS_TIM_BREAK1_FILTER(FILTER) ((FILTER) <= 0xF)
mbed_official 157:90e3acc479a2 517 /**
mbed_official 157:90e3acc479a2 518 * @}
mbed_official 157:90e3acc479a2 519 */
mbed_official 157:90e3acc479a2 520
mbed_official 157:90e3acc479a2 521 /** @defgroup TIM_Break2_Filter
mbed_official 157:90e3acc479a2 522 * @{
mbed_official 157:90e3acc479a2 523 */
mbed_official 157:90e3acc479a2 524
mbed_official 157:90e3acc479a2 525 #define IS_TIM_BREAK2_FILTER(FILTER) ((FILTER) <= 0xF)
mbed_official 157:90e3acc479a2 526 /**
mbed_official 157:90e3acc479a2 527 * @}
mbed_official 157:90e3acc479a2 528 */
mbed_official 157:90e3acc479a2 529
mbed_official 157:90e3acc479a2 530 /** @defgroup TIM_AOE_Bit_Set_Reset
mbed_official 157:90e3acc479a2 531 * @{
mbed_official 157:90e3acc479a2 532 */
mbed_official 157:90e3acc479a2 533
mbed_official 157:90e3acc479a2 534 #define TIM_AutomaticOutput_Enable ((uint16_t)0x4000)
mbed_official 157:90e3acc479a2 535 #define TIM_AutomaticOutput_Disable ((uint16_t)0x0000)
mbed_official 157:90e3acc479a2 536 #define IS_TIM_AUTOMATIC_OUTPUT_STATE(STATE) (((STATE) == TIM_AutomaticOutput_Enable) || \
mbed_official 157:90e3acc479a2 537 ((STATE) == TIM_AutomaticOutput_Disable))
mbed_official 157:90e3acc479a2 538 /**
mbed_official 157:90e3acc479a2 539 * @}
mbed_official 157:90e3acc479a2 540 */
mbed_official 157:90e3acc479a2 541
mbed_official 157:90e3acc479a2 542 /** @defgroup TIM_Lock_level
mbed_official 157:90e3acc479a2 543 * @{
mbed_official 157:90e3acc479a2 544 */
mbed_official 157:90e3acc479a2 545
mbed_official 157:90e3acc479a2 546 #define TIM_LOCKLevel_OFF ((uint16_t)0x0000)
mbed_official 157:90e3acc479a2 547 #define TIM_LOCKLevel_1 ((uint16_t)0x0100)
mbed_official 157:90e3acc479a2 548 #define TIM_LOCKLevel_2 ((uint16_t)0x0200)
mbed_official 157:90e3acc479a2 549 #define TIM_LOCKLevel_3 ((uint16_t)0x0300)
mbed_official 157:90e3acc479a2 550 #define IS_TIM_LOCK_LEVEL(LEVEL) (((LEVEL) == TIM_LOCKLevel_OFF) || \
mbed_official 157:90e3acc479a2 551 ((LEVEL) == TIM_LOCKLevel_1) || \
mbed_official 157:90e3acc479a2 552 ((LEVEL) == TIM_LOCKLevel_2) || \
mbed_official 157:90e3acc479a2 553 ((LEVEL) == TIM_LOCKLevel_3))
mbed_official 157:90e3acc479a2 554 /**
mbed_official 157:90e3acc479a2 555 * @}
mbed_official 157:90e3acc479a2 556 */
mbed_official 157:90e3acc479a2 557
mbed_official 157:90e3acc479a2 558 /** @defgroup TIM_OSSI_Off_State_Selection_for_Idle_mode_state
mbed_official 157:90e3acc479a2 559 * @{
mbed_official 157:90e3acc479a2 560 */
mbed_official 157:90e3acc479a2 561
mbed_official 157:90e3acc479a2 562 #define TIM_OSSIState_Enable ((uint16_t)0x0400)
mbed_official 157:90e3acc479a2 563 #define TIM_OSSIState_Disable ((uint16_t)0x0000)
mbed_official 157:90e3acc479a2 564 #define IS_TIM_OSSI_STATE(STATE) (((STATE) == TIM_OSSIState_Enable) || \
mbed_official 157:90e3acc479a2 565 ((STATE) == TIM_OSSIState_Disable))
mbed_official 157:90e3acc479a2 566 /**
mbed_official 157:90e3acc479a2 567 * @}
mbed_official 157:90e3acc479a2 568 */
mbed_official 157:90e3acc479a2 569
mbed_official 157:90e3acc479a2 570 /** @defgroup TIM_OSSR_Off_State_Selection_for_Run_mode_state
mbed_official 157:90e3acc479a2 571 * @{
mbed_official 157:90e3acc479a2 572 */
mbed_official 157:90e3acc479a2 573
mbed_official 157:90e3acc479a2 574 #define TIM_OSSRState_Enable ((uint16_t)0x0800)
mbed_official 157:90e3acc479a2 575 #define TIM_OSSRState_Disable ((uint16_t)0x0000)
mbed_official 157:90e3acc479a2 576 #define IS_TIM_OSSR_STATE(STATE) (((STATE) == TIM_OSSRState_Enable) || \
mbed_official 157:90e3acc479a2 577 ((STATE) == TIM_OSSRState_Disable))
mbed_official 157:90e3acc479a2 578 /**
mbed_official 157:90e3acc479a2 579 * @}
mbed_official 157:90e3acc479a2 580 */
mbed_official 157:90e3acc479a2 581
mbed_official 157:90e3acc479a2 582 /** @defgroup TIM_Output_Compare_Idle_State
mbed_official 157:90e3acc479a2 583 * @{
mbed_official 157:90e3acc479a2 584 */
mbed_official 157:90e3acc479a2 585
mbed_official 157:90e3acc479a2 586 #define TIM_OCIdleState_Set ((uint16_t)0x0100)
mbed_official 157:90e3acc479a2 587 #define TIM_OCIdleState_Reset ((uint16_t)0x0000)
mbed_official 157:90e3acc479a2 588 #define IS_TIM_OCIDLE_STATE(STATE) (((STATE) == TIM_OCIdleState_Set) || \
mbed_official 157:90e3acc479a2 589 ((STATE) == TIM_OCIdleState_Reset))
mbed_official 157:90e3acc479a2 590 /**
mbed_official 157:90e3acc479a2 591 * @}
mbed_official 157:90e3acc479a2 592 */
mbed_official 157:90e3acc479a2 593
mbed_official 157:90e3acc479a2 594 /** @defgroup TIM_Output_Compare_N_Idle_State
mbed_official 157:90e3acc479a2 595 * @{
mbed_official 157:90e3acc479a2 596 */
mbed_official 157:90e3acc479a2 597
mbed_official 157:90e3acc479a2 598 #define TIM_OCNIdleState_Set ((uint16_t)0x0200)
mbed_official 157:90e3acc479a2 599 #define TIM_OCNIdleState_Reset ((uint16_t)0x0000)
mbed_official 157:90e3acc479a2 600 #define IS_TIM_OCNIDLE_STATE(STATE) (((STATE) == TIM_OCNIdleState_Set) || \
mbed_official 157:90e3acc479a2 601 ((STATE) == TIM_OCNIdleState_Reset))
mbed_official 157:90e3acc479a2 602 /**
mbed_official 157:90e3acc479a2 603 * @}
mbed_official 157:90e3acc479a2 604 */
mbed_official 157:90e3acc479a2 605
mbed_official 157:90e3acc479a2 606 /** @defgroup TIM_Input_Capture_Polarity
mbed_official 157:90e3acc479a2 607 * @{
mbed_official 157:90e3acc479a2 608 */
mbed_official 157:90e3acc479a2 609
mbed_official 157:90e3acc479a2 610 #define TIM_ICPolarity_Rising ((uint16_t)0x0000)
mbed_official 157:90e3acc479a2 611 #define TIM_ICPolarity_Falling ((uint16_t)0x0002)
mbed_official 157:90e3acc479a2 612 #define TIM_ICPolarity_BothEdge ((uint16_t)0x000A)
mbed_official 157:90e3acc479a2 613 #define IS_TIM_IC_POLARITY(POLARITY) (((POLARITY) == TIM_ICPolarity_Rising) || \
mbed_official 157:90e3acc479a2 614 ((POLARITY) == TIM_ICPolarity_Falling)|| \
mbed_official 157:90e3acc479a2 615 ((POLARITY) == TIM_ICPolarity_BothEdge))
mbed_official 157:90e3acc479a2 616 /**
mbed_official 157:90e3acc479a2 617 * @}
mbed_official 157:90e3acc479a2 618 */
mbed_official 157:90e3acc479a2 619
mbed_official 157:90e3acc479a2 620 /** @defgroup TIM_Input_Capture_Selection
mbed_official 157:90e3acc479a2 621 * @{
mbed_official 157:90e3acc479a2 622 */
mbed_official 157:90e3acc479a2 623
mbed_official 157:90e3acc479a2 624 #define TIM_ICSelection_DirectTI ((uint16_t)0x0001) /*!< TIM Input 1, 2, 3 or 4 is selected to be
mbed_official 157:90e3acc479a2 625 connected to IC1, IC2, IC3 or IC4, respectively */
mbed_official 157:90e3acc479a2 626 #define TIM_ICSelection_IndirectTI ((uint16_t)0x0002) /*!< TIM Input 1, 2, 3 or 4 is selected to be
mbed_official 157:90e3acc479a2 627 connected to IC2, IC1, IC4 or IC3, respectively. */
mbed_official 157:90e3acc479a2 628 #define TIM_ICSelection_TRC ((uint16_t)0x0003) /*!< TIM Input 1, 2, 3 or 4 is selected to be connected to TRC. */
mbed_official 157:90e3acc479a2 629 #define IS_TIM_IC_SELECTION(SELECTION) (((SELECTION) == TIM_ICSelection_DirectTI) || \
mbed_official 157:90e3acc479a2 630 ((SELECTION) == TIM_ICSelection_IndirectTI) || \
mbed_official 157:90e3acc479a2 631 ((SELECTION) == TIM_ICSelection_TRC))
mbed_official 157:90e3acc479a2 632 /**
mbed_official 157:90e3acc479a2 633 * @}
mbed_official 157:90e3acc479a2 634 */
mbed_official 157:90e3acc479a2 635
mbed_official 157:90e3acc479a2 636 /** @defgroup TIM_Input_Capture_Prescaler
mbed_official 157:90e3acc479a2 637 * @{
mbed_official 157:90e3acc479a2 638 */
mbed_official 157:90e3acc479a2 639
mbed_official 157:90e3acc479a2 640 #define TIM_ICPSC_DIV1 ((uint16_t)0x0000) /*!< Capture performed each time an edge is detected on the capture input. */
mbed_official 157:90e3acc479a2 641 #define TIM_ICPSC_DIV2 ((uint16_t)0x0004) /*!< Capture performed once every 2 events. */
mbed_official 157:90e3acc479a2 642 #define TIM_ICPSC_DIV4 ((uint16_t)0x0008) /*!< Capture performed once every 4 events. */
mbed_official 157:90e3acc479a2 643 #define TIM_ICPSC_DIV8 ((uint16_t)0x000C) /*!< Capture performed once every 8 events. */
mbed_official 157:90e3acc479a2 644 #define IS_TIM_IC_PRESCALER(PRESCALER) (((PRESCALER) == TIM_ICPSC_DIV1) || \
mbed_official 157:90e3acc479a2 645 ((PRESCALER) == TIM_ICPSC_DIV2) || \
mbed_official 157:90e3acc479a2 646 ((PRESCALER) == TIM_ICPSC_DIV4) || \
mbed_official 157:90e3acc479a2 647 ((PRESCALER) == TIM_ICPSC_DIV8))
mbed_official 157:90e3acc479a2 648 /**
mbed_official 157:90e3acc479a2 649 * @}
mbed_official 157:90e3acc479a2 650 */
mbed_official 157:90e3acc479a2 651
mbed_official 157:90e3acc479a2 652 /** @defgroup TIM_interrupt_sources
mbed_official 157:90e3acc479a2 653 * @{
mbed_official 157:90e3acc479a2 654 */
mbed_official 157:90e3acc479a2 655
mbed_official 157:90e3acc479a2 656 #define TIM_IT_Update ((uint16_t)0x0001)
mbed_official 157:90e3acc479a2 657 #define TIM_IT_CC1 ((uint16_t)0x0002)
mbed_official 157:90e3acc479a2 658 #define TIM_IT_CC2 ((uint16_t)0x0004)
mbed_official 157:90e3acc479a2 659 #define TIM_IT_CC3 ((uint16_t)0x0008)
mbed_official 157:90e3acc479a2 660 #define TIM_IT_CC4 ((uint16_t)0x0010)
mbed_official 157:90e3acc479a2 661 #define TIM_IT_COM ((uint16_t)0x0020)
mbed_official 157:90e3acc479a2 662 #define TIM_IT_Trigger ((uint16_t)0x0040)
mbed_official 157:90e3acc479a2 663 #define TIM_IT_Break ((uint16_t)0x0080)
mbed_official 157:90e3acc479a2 664 #define IS_TIM_IT(IT) ((((IT) & (uint16_t)0xFF00) == 0x0000) && ((IT) != 0x0000))
mbed_official 157:90e3acc479a2 665
mbed_official 157:90e3acc479a2 666 #define IS_TIM_GET_IT(IT) (((IT) == TIM_IT_Update) || \
mbed_official 157:90e3acc479a2 667 ((IT) == TIM_IT_CC1) || \
mbed_official 157:90e3acc479a2 668 ((IT) == TIM_IT_CC2) || \
mbed_official 157:90e3acc479a2 669 ((IT) == TIM_IT_CC3) || \
mbed_official 157:90e3acc479a2 670 ((IT) == TIM_IT_CC4) || \
mbed_official 157:90e3acc479a2 671 ((IT) == TIM_IT_COM) || \
mbed_official 157:90e3acc479a2 672 ((IT) == TIM_IT_Trigger) || \
mbed_official 157:90e3acc479a2 673 ((IT) == TIM_IT_Break))
mbed_official 157:90e3acc479a2 674 /**
mbed_official 157:90e3acc479a2 675 * @}
mbed_official 157:90e3acc479a2 676 */
mbed_official 157:90e3acc479a2 677
mbed_official 157:90e3acc479a2 678 /** @defgroup TIM_DMA_Base_address
mbed_official 157:90e3acc479a2 679 * @{
mbed_official 157:90e3acc479a2 680 */
mbed_official 157:90e3acc479a2 681
mbed_official 157:90e3acc479a2 682 #define TIM_DMABase_CR1 ((uint16_t)0x0000)
mbed_official 157:90e3acc479a2 683 #define TIM_DMABase_CR2 ((uint16_t)0x0001)
mbed_official 157:90e3acc479a2 684 #define TIM_DMABase_SMCR ((uint16_t)0x0002)
mbed_official 157:90e3acc479a2 685 #define TIM_DMABase_DIER ((uint16_t)0x0003)
mbed_official 157:90e3acc479a2 686 #define TIM_DMABase_SR ((uint16_t)0x0004)
mbed_official 157:90e3acc479a2 687 #define TIM_DMABase_EGR ((uint16_t)0x0005)
mbed_official 157:90e3acc479a2 688 #define TIM_DMABase_CCMR1 ((uint16_t)0x0006)
mbed_official 157:90e3acc479a2 689 #define TIM_DMABase_CCMR2 ((uint16_t)0x0007)
mbed_official 157:90e3acc479a2 690 #define TIM_DMABase_CCER ((uint16_t)0x0008)
mbed_official 157:90e3acc479a2 691 #define TIM_DMABase_CNT ((uint16_t)0x0009)
mbed_official 157:90e3acc479a2 692 #define TIM_DMABase_PSC ((uint16_t)0x000A)
mbed_official 157:90e3acc479a2 693 #define TIM_DMABase_ARR ((uint16_t)0x000B)
mbed_official 157:90e3acc479a2 694 #define TIM_DMABase_RCR ((uint16_t)0x000C)
mbed_official 157:90e3acc479a2 695 #define TIM_DMABase_CCR1 ((uint16_t)0x000D)
mbed_official 157:90e3acc479a2 696 #define TIM_DMABase_CCR2 ((uint16_t)0x000E)
mbed_official 157:90e3acc479a2 697 #define TIM_DMABase_CCR3 ((uint16_t)0x000F)
mbed_official 157:90e3acc479a2 698 #define TIM_DMABase_CCR4 ((uint16_t)0x0010)
mbed_official 157:90e3acc479a2 699 #define TIM_DMABase_BDTR ((uint16_t)0x0011)
mbed_official 157:90e3acc479a2 700 #define TIM_DMABase_DCR ((uint16_t)0x0012)
mbed_official 157:90e3acc479a2 701 #define TIM_DMABase_OR ((uint16_t)0x0013)
mbed_official 157:90e3acc479a2 702 #define TIM_DMABase_CCMR3 ((uint16_t)0x0014)
mbed_official 157:90e3acc479a2 703 #define TIM_DMABase_CCR5 ((uint16_t)0x0015)
mbed_official 157:90e3acc479a2 704 #define TIM_DMABase_CCR6 ((uint16_t)0x0016)
mbed_official 157:90e3acc479a2 705 #define IS_TIM_DMA_BASE(BASE) (((BASE) == TIM_DMABase_CR1) || \
mbed_official 157:90e3acc479a2 706 ((BASE) == TIM_DMABase_CR2) || \
mbed_official 157:90e3acc479a2 707 ((BASE) == TIM_DMABase_SMCR) || \
mbed_official 157:90e3acc479a2 708 ((BASE) == TIM_DMABase_DIER) || \
mbed_official 157:90e3acc479a2 709 ((BASE) == TIM_DMABase_SR) || \
mbed_official 157:90e3acc479a2 710 ((BASE) == TIM_DMABase_EGR) || \
mbed_official 157:90e3acc479a2 711 ((BASE) == TIM_DMABase_CCMR1) || \
mbed_official 157:90e3acc479a2 712 ((BASE) == TIM_DMABase_CCMR2) || \
mbed_official 157:90e3acc479a2 713 ((BASE) == TIM_DMABase_CCER) || \
mbed_official 157:90e3acc479a2 714 ((BASE) == TIM_DMABase_CNT) || \
mbed_official 157:90e3acc479a2 715 ((BASE) == TIM_DMABase_PSC) || \
mbed_official 157:90e3acc479a2 716 ((BASE) == TIM_DMABase_ARR) || \
mbed_official 157:90e3acc479a2 717 ((BASE) == TIM_DMABase_RCR) || \
mbed_official 157:90e3acc479a2 718 ((BASE) == TIM_DMABase_CCR1) || \
mbed_official 157:90e3acc479a2 719 ((BASE) == TIM_DMABase_CCR2) || \
mbed_official 157:90e3acc479a2 720 ((BASE) == TIM_DMABase_CCR3) || \
mbed_official 157:90e3acc479a2 721 ((BASE) == TIM_DMABase_CCR4) || \
mbed_official 157:90e3acc479a2 722 ((BASE) == TIM_DMABase_BDTR) || \
mbed_official 157:90e3acc479a2 723 ((BASE) == TIM_DMABase_DCR) || \
mbed_official 157:90e3acc479a2 724 ((BASE) == TIM_DMABase_OR) || \
mbed_official 157:90e3acc479a2 725 ((BASE) == TIM_DMABase_CCMR3) || \
mbed_official 157:90e3acc479a2 726 ((BASE) == TIM_DMABase_CCR5) || \
mbed_official 157:90e3acc479a2 727 ((BASE) == TIM_DMABase_CCR6))
mbed_official 157:90e3acc479a2 728 /**
mbed_official 157:90e3acc479a2 729 * @}
mbed_official 157:90e3acc479a2 730 */
mbed_official 157:90e3acc479a2 731
mbed_official 157:90e3acc479a2 732 /** @defgroup TIM_DMA_Burst_Length
mbed_official 157:90e3acc479a2 733 * @{
mbed_official 157:90e3acc479a2 734 */
mbed_official 157:90e3acc479a2 735
mbed_official 157:90e3acc479a2 736 #define TIM_DMABurstLength_1Transfer ((uint16_t)0x0000)
mbed_official 157:90e3acc479a2 737 #define TIM_DMABurstLength_2Transfers ((uint16_t)0x0100)
mbed_official 157:90e3acc479a2 738 #define TIM_DMABurstLength_3Transfers ((uint16_t)0x0200)
mbed_official 157:90e3acc479a2 739 #define TIM_DMABurstLength_4Transfers ((uint16_t)0x0300)
mbed_official 157:90e3acc479a2 740 #define TIM_DMABurstLength_5Transfers ((uint16_t)0x0400)
mbed_official 157:90e3acc479a2 741 #define TIM_DMABurstLength_6Transfers ((uint16_t)0x0500)
mbed_official 157:90e3acc479a2 742 #define TIM_DMABurstLength_7Transfers ((uint16_t)0x0600)
mbed_official 157:90e3acc479a2 743 #define TIM_DMABurstLength_8Transfers ((uint16_t)0x0700)
mbed_official 157:90e3acc479a2 744 #define TIM_DMABurstLength_9Transfers ((uint16_t)0x0800)
mbed_official 157:90e3acc479a2 745 #define TIM_DMABurstLength_10Transfers ((uint16_t)0x0900)
mbed_official 157:90e3acc479a2 746 #define TIM_DMABurstLength_11Transfers ((uint16_t)0x0A00)
mbed_official 157:90e3acc479a2 747 #define TIM_DMABurstLength_12Transfers ((uint16_t)0x0B00)
mbed_official 157:90e3acc479a2 748 #define TIM_DMABurstLength_13Transfers ((uint16_t)0x0C00)
mbed_official 157:90e3acc479a2 749 #define TIM_DMABurstLength_14Transfers ((uint16_t)0x0D00)
mbed_official 157:90e3acc479a2 750 #define TIM_DMABurstLength_15Transfers ((uint16_t)0x0E00)
mbed_official 157:90e3acc479a2 751 #define TIM_DMABurstLength_16Transfers ((uint16_t)0x0F00)
mbed_official 157:90e3acc479a2 752 #define TIM_DMABurstLength_17Transfers ((uint16_t)0x1000)
mbed_official 157:90e3acc479a2 753 #define TIM_DMABurstLength_18Transfers ((uint16_t)0x1100)
mbed_official 157:90e3acc479a2 754 #define IS_TIM_DMA_LENGTH(LENGTH) (((LENGTH) == TIM_DMABurstLength_1Transfer) || \
mbed_official 157:90e3acc479a2 755 ((LENGTH) == TIM_DMABurstLength_2Transfers) || \
mbed_official 157:90e3acc479a2 756 ((LENGTH) == TIM_DMABurstLength_3Transfers) || \
mbed_official 157:90e3acc479a2 757 ((LENGTH) == TIM_DMABurstLength_4Transfers) || \
mbed_official 157:90e3acc479a2 758 ((LENGTH) == TIM_DMABurstLength_5Transfers) || \
mbed_official 157:90e3acc479a2 759 ((LENGTH) == TIM_DMABurstLength_6Transfers) || \
mbed_official 157:90e3acc479a2 760 ((LENGTH) == TIM_DMABurstLength_7Transfers) || \
mbed_official 157:90e3acc479a2 761 ((LENGTH) == TIM_DMABurstLength_8Transfers) || \
mbed_official 157:90e3acc479a2 762 ((LENGTH) == TIM_DMABurstLength_9Transfers) || \
mbed_official 157:90e3acc479a2 763 ((LENGTH) == TIM_DMABurstLength_10Transfers) || \
mbed_official 157:90e3acc479a2 764 ((LENGTH) == TIM_DMABurstLength_11Transfers) || \
mbed_official 157:90e3acc479a2 765 ((LENGTH) == TIM_DMABurstLength_12Transfers) || \
mbed_official 157:90e3acc479a2 766 ((LENGTH) == TIM_DMABurstLength_13Transfers) || \
mbed_official 157:90e3acc479a2 767 ((LENGTH) == TIM_DMABurstLength_14Transfers) || \
mbed_official 157:90e3acc479a2 768 ((LENGTH) == TIM_DMABurstLength_15Transfers) || \
mbed_official 157:90e3acc479a2 769 ((LENGTH) == TIM_DMABurstLength_16Transfers) || \
mbed_official 157:90e3acc479a2 770 ((LENGTH) == TIM_DMABurstLength_17Transfers) || \
mbed_official 157:90e3acc479a2 771 ((LENGTH) == TIM_DMABurstLength_18Transfers))
mbed_official 157:90e3acc479a2 772 /**
mbed_official 157:90e3acc479a2 773 * @}
mbed_official 157:90e3acc479a2 774 */
mbed_official 157:90e3acc479a2 775
mbed_official 157:90e3acc479a2 776 /** @defgroup TIM_DMA_sources
mbed_official 157:90e3acc479a2 777 * @{
mbed_official 157:90e3acc479a2 778 */
mbed_official 157:90e3acc479a2 779
mbed_official 157:90e3acc479a2 780 #define TIM_DMA_Update ((uint16_t)0x0100)
mbed_official 157:90e3acc479a2 781 #define TIM_DMA_CC1 ((uint16_t)0x0200)
mbed_official 157:90e3acc479a2 782 #define TIM_DMA_CC2 ((uint16_t)0x0400)
mbed_official 157:90e3acc479a2 783 #define TIM_DMA_CC3 ((uint16_t)0x0800)
mbed_official 157:90e3acc479a2 784 #define TIM_DMA_CC4 ((uint16_t)0x1000)
mbed_official 157:90e3acc479a2 785 #define TIM_DMA_COM ((uint16_t)0x2000)
mbed_official 157:90e3acc479a2 786 #define TIM_DMA_Trigger ((uint16_t)0x4000)
mbed_official 157:90e3acc479a2 787 #define IS_TIM_DMA_SOURCE(SOURCE) ((((SOURCE) & (uint16_t)0x80FF) == 0x0000) && ((SOURCE) != 0x0000))
mbed_official 157:90e3acc479a2 788
mbed_official 157:90e3acc479a2 789 /**
mbed_official 157:90e3acc479a2 790 * @}
mbed_official 157:90e3acc479a2 791 */
mbed_official 157:90e3acc479a2 792
mbed_official 157:90e3acc479a2 793 /** @defgroup TIM_External_Trigger_Prescaler
mbed_official 157:90e3acc479a2 794 * @{
mbed_official 157:90e3acc479a2 795 */
mbed_official 157:90e3acc479a2 796
mbed_official 157:90e3acc479a2 797 #define TIM_ExtTRGPSC_OFF ((uint16_t)0x0000)
mbed_official 157:90e3acc479a2 798 #define TIM_ExtTRGPSC_DIV2 ((uint16_t)0x1000)
mbed_official 157:90e3acc479a2 799 #define TIM_ExtTRGPSC_DIV4 ((uint16_t)0x2000)
mbed_official 157:90e3acc479a2 800 #define TIM_ExtTRGPSC_DIV8 ((uint16_t)0x3000)
mbed_official 157:90e3acc479a2 801 #define IS_TIM_EXT_PRESCALER(PRESCALER) (((PRESCALER) == TIM_ExtTRGPSC_OFF) || \
mbed_official 157:90e3acc479a2 802 ((PRESCALER) == TIM_ExtTRGPSC_DIV2) || \
mbed_official 157:90e3acc479a2 803 ((PRESCALER) == TIM_ExtTRGPSC_DIV4) || \
mbed_official 157:90e3acc479a2 804 ((PRESCALER) == TIM_ExtTRGPSC_DIV8))
mbed_official 157:90e3acc479a2 805 /**
mbed_official 157:90e3acc479a2 806 * @}
mbed_official 157:90e3acc479a2 807 */
mbed_official 157:90e3acc479a2 808
mbed_official 157:90e3acc479a2 809 /** @defgroup TIM_Internal_Trigger_Selection
mbed_official 157:90e3acc479a2 810 * @{
mbed_official 157:90e3acc479a2 811 */
mbed_official 157:90e3acc479a2 812
mbed_official 157:90e3acc479a2 813 #define TIM_TS_ITR0 ((uint16_t)0x0000)
mbed_official 157:90e3acc479a2 814 #define TIM_TS_ITR1 ((uint16_t)0x0010)
mbed_official 157:90e3acc479a2 815 #define TIM_TS_ITR2 ((uint16_t)0x0020)
mbed_official 157:90e3acc479a2 816 #define TIM_TS_ITR3 ((uint16_t)0x0030)
mbed_official 157:90e3acc479a2 817 #define TIM_TS_TI1F_ED ((uint16_t)0x0040)
mbed_official 157:90e3acc479a2 818 #define TIM_TS_TI1FP1 ((uint16_t)0x0050)
mbed_official 157:90e3acc479a2 819 #define TIM_TS_TI2FP2 ((uint16_t)0x0060)
mbed_official 157:90e3acc479a2 820 #define TIM_TS_ETRF ((uint16_t)0x0070)
mbed_official 157:90e3acc479a2 821 #define IS_TIM_TRIGGER_SELECTION(SELECTION) (((SELECTION) == TIM_TS_ITR0) || \
mbed_official 157:90e3acc479a2 822 ((SELECTION) == TIM_TS_ITR1) || \
mbed_official 157:90e3acc479a2 823 ((SELECTION) == TIM_TS_ITR2) || \
mbed_official 157:90e3acc479a2 824 ((SELECTION) == TIM_TS_ITR3) || \
mbed_official 157:90e3acc479a2 825 ((SELECTION) == TIM_TS_TI1F_ED) || \
mbed_official 157:90e3acc479a2 826 ((SELECTION) == TIM_TS_TI1FP1) || \
mbed_official 157:90e3acc479a2 827 ((SELECTION) == TIM_TS_TI2FP2) || \
mbed_official 157:90e3acc479a2 828 ((SELECTION) == TIM_TS_ETRF))
mbed_official 157:90e3acc479a2 829 #define IS_TIM_INTERNAL_TRIGGER_SELECTION(SELECTION) (((SELECTION) == TIM_TS_ITR0) || \
mbed_official 157:90e3acc479a2 830 ((SELECTION) == TIM_TS_ITR1) || \
mbed_official 157:90e3acc479a2 831 ((SELECTION) == TIM_TS_ITR2) || \
mbed_official 157:90e3acc479a2 832 ((SELECTION) == TIM_TS_ITR3))
mbed_official 157:90e3acc479a2 833 /**
mbed_official 157:90e3acc479a2 834 * @}
mbed_official 157:90e3acc479a2 835 */
mbed_official 157:90e3acc479a2 836
mbed_official 157:90e3acc479a2 837 /** @defgroup TIM_TIx_External_Clock_Source
mbed_official 157:90e3acc479a2 838 * @{
mbed_official 157:90e3acc479a2 839 */
mbed_official 157:90e3acc479a2 840
mbed_official 157:90e3acc479a2 841 #define TIM_TIxExternalCLK1Source_TI1 ((uint16_t)0x0050)
mbed_official 157:90e3acc479a2 842 #define TIM_TIxExternalCLK1Source_TI2 ((uint16_t)0x0060)
mbed_official 157:90e3acc479a2 843 #define TIM_TIxExternalCLK1Source_TI1ED ((uint16_t)0x0040)
mbed_official 157:90e3acc479a2 844
mbed_official 157:90e3acc479a2 845 /**
mbed_official 157:90e3acc479a2 846 * @}
mbed_official 157:90e3acc479a2 847 */
mbed_official 157:90e3acc479a2 848
mbed_official 157:90e3acc479a2 849 /** @defgroup TIM_External_Trigger_Polarity
mbed_official 157:90e3acc479a2 850 * @{
mbed_official 157:90e3acc479a2 851 */
mbed_official 157:90e3acc479a2 852 #define TIM_ExtTRGPolarity_Inverted ((uint16_t)0x8000)
mbed_official 157:90e3acc479a2 853 #define TIM_ExtTRGPolarity_NonInverted ((uint16_t)0x0000)
mbed_official 157:90e3acc479a2 854 #define IS_TIM_EXT_POLARITY(POLARITY) (((POLARITY) == TIM_ExtTRGPolarity_Inverted) || \
mbed_official 157:90e3acc479a2 855 ((POLARITY) == TIM_ExtTRGPolarity_NonInverted))
mbed_official 157:90e3acc479a2 856 /**
mbed_official 157:90e3acc479a2 857 * @}
mbed_official 157:90e3acc479a2 858 */
mbed_official 157:90e3acc479a2 859
mbed_official 157:90e3acc479a2 860 /** @defgroup TIM_Prescaler_Reload_Mode
mbed_official 157:90e3acc479a2 861 * @{
mbed_official 157:90e3acc479a2 862 */
mbed_official 157:90e3acc479a2 863
mbed_official 157:90e3acc479a2 864 #define TIM_PSCReloadMode_Update ((uint16_t)0x0000)
mbed_official 157:90e3acc479a2 865 #define TIM_PSCReloadMode_Immediate ((uint16_t)0x0001)
mbed_official 157:90e3acc479a2 866 #define IS_TIM_PRESCALER_RELOAD(RELOAD) (((RELOAD) == TIM_PSCReloadMode_Update) || \
mbed_official 157:90e3acc479a2 867 ((RELOAD) == TIM_PSCReloadMode_Immediate))
mbed_official 157:90e3acc479a2 868 /**
mbed_official 157:90e3acc479a2 869 * @}
mbed_official 157:90e3acc479a2 870 */
mbed_official 157:90e3acc479a2 871
mbed_official 157:90e3acc479a2 872 /** @defgroup TIM_Forced_Action
mbed_official 157:90e3acc479a2 873 * @{
mbed_official 157:90e3acc479a2 874 */
mbed_official 157:90e3acc479a2 875
mbed_official 157:90e3acc479a2 876 #define TIM_ForcedAction_Active ((uint16_t)0x0050)
mbed_official 157:90e3acc479a2 877 #define TIM_ForcedAction_InActive ((uint16_t)0x0040)
mbed_official 157:90e3acc479a2 878 #define IS_TIM_FORCED_ACTION(ACTION) (((ACTION) == TIM_ForcedAction_Active) || \
mbed_official 157:90e3acc479a2 879 ((ACTION) == TIM_ForcedAction_InActive))
mbed_official 157:90e3acc479a2 880 /**
mbed_official 157:90e3acc479a2 881 * @}
mbed_official 157:90e3acc479a2 882 */
mbed_official 157:90e3acc479a2 883
mbed_official 157:90e3acc479a2 884 /** @defgroup TIM_Encoder_Mode
mbed_official 157:90e3acc479a2 885 * @{
mbed_official 157:90e3acc479a2 886 */
mbed_official 157:90e3acc479a2 887
mbed_official 157:90e3acc479a2 888 #define TIM_EncoderMode_TI1 ((uint16_t)0x0001)
mbed_official 157:90e3acc479a2 889 #define TIM_EncoderMode_TI2 ((uint16_t)0x0002)
mbed_official 157:90e3acc479a2 890 #define TIM_EncoderMode_TI12 ((uint16_t)0x0003)
mbed_official 157:90e3acc479a2 891 #define IS_TIM_ENCODER_MODE(MODE) (((MODE) == TIM_EncoderMode_TI1) || \
mbed_official 157:90e3acc479a2 892 ((MODE) == TIM_EncoderMode_TI2) || \
mbed_official 157:90e3acc479a2 893 ((MODE) == TIM_EncoderMode_TI12))
mbed_official 157:90e3acc479a2 894 /**
mbed_official 157:90e3acc479a2 895 * @}
mbed_official 157:90e3acc479a2 896 */
mbed_official 157:90e3acc479a2 897
mbed_official 157:90e3acc479a2 898
mbed_official 157:90e3acc479a2 899 /** @defgroup TIM_Event_Source
mbed_official 157:90e3acc479a2 900 * @{
mbed_official 157:90e3acc479a2 901 */
mbed_official 157:90e3acc479a2 902
mbed_official 157:90e3acc479a2 903 #define TIM_EventSource_Update ((uint16_t)0x0001)
mbed_official 157:90e3acc479a2 904 #define TIM_EventSource_CC1 ((uint16_t)0x0002)
mbed_official 157:90e3acc479a2 905 #define TIM_EventSource_CC2 ((uint16_t)0x0004)
mbed_official 157:90e3acc479a2 906 #define TIM_EventSource_CC3 ((uint16_t)0x0008)
mbed_official 157:90e3acc479a2 907 #define TIM_EventSource_CC4 ((uint16_t)0x0010)
mbed_official 157:90e3acc479a2 908 #define TIM_EventSource_COM ((uint16_t)0x0020)
mbed_official 157:90e3acc479a2 909 #define TIM_EventSource_Trigger ((uint16_t)0x0040)
mbed_official 157:90e3acc479a2 910 #define TIM_EventSource_Break ((uint16_t)0x0080)
mbed_official 157:90e3acc479a2 911 #define TIM_EventSource_Break2 ((uint16_t)0x0100)
mbed_official 157:90e3acc479a2 912 #define IS_TIM_EVENT_SOURCE(SOURCE) ((((SOURCE) & (uint16_t)0xFE00) == 0x0000) && ((SOURCE) != 0x0000))
mbed_official 157:90e3acc479a2 913
mbed_official 157:90e3acc479a2 914 /**
mbed_official 157:90e3acc479a2 915 * @}
mbed_official 157:90e3acc479a2 916 */
mbed_official 157:90e3acc479a2 917
mbed_official 157:90e3acc479a2 918 /** @defgroup TIM_Update_Source
mbed_official 157:90e3acc479a2 919 * @{
mbed_official 157:90e3acc479a2 920 */
mbed_official 157:90e3acc479a2 921
mbed_official 157:90e3acc479a2 922 #define TIM_UpdateSource_Global ((uint16_t)0x0000) /*!< Source of update is the counter overflow/underflow
mbed_official 157:90e3acc479a2 923 or the setting of UG bit, or an update generation
mbed_official 157:90e3acc479a2 924 through the slave mode controller. */
mbed_official 157:90e3acc479a2 925 #define TIM_UpdateSource_Regular ((uint16_t)0x0001) /*!< Source of update is counter overflow/underflow. */
mbed_official 157:90e3acc479a2 926 #define IS_TIM_UPDATE_SOURCE(SOURCE) (((SOURCE) == TIM_UpdateSource_Global) || \
mbed_official 157:90e3acc479a2 927 ((SOURCE) == TIM_UpdateSource_Regular))
mbed_official 157:90e3acc479a2 928 /**
mbed_official 157:90e3acc479a2 929 * @}
mbed_official 157:90e3acc479a2 930 */
mbed_official 157:90e3acc479a2 931
mbed_official 157:90e3acc479a2 932 /** @defgroup TIM_Output_Compare_Preload_State
mbed_official 157:90e3acc479a2 933 * @{
mbed_official 157:90e3acc479a2 934 */
mbed_official 157:90e3acc479a2 935
mbed_official 157:90e3acc479a2 936 #define TIM_OCPreload_Enable ((uint16_t)0x0008)
mbed_official 157:90e3acc479a2 937 #define TIM_OCPreload_Disable ((uint16_t)0x0000)
mbed_official 157:90e3acc479a2 938 #define IS_TIM_OCPRELOAD_STATE(STATE) (((STATE) == TIM_OCPreload_Enable) || \
mbed_official 157:90e3acc479a2 939 ((STATE) == TIM_OCPreload_Disable))
mbed_official 157:90e3acc479a2 940 /**
mbed_official 157:90e3acc479a2 941 * @}
mbed_official 157:90e3acc479a2 942 */
mbed_official 157:90e3acc479a2 943
mbed_official 157:90e3acc479a2 944 /** @defgroup TIM_Output_Compare_Fast_State
mbed_official 157:90e3acc479a2 945 * @{
mbed_official 157:90e3acc479a2 946 */
mbed_official 157:90e3acc479a2 947
mbed_official 157:90e3acc479a2 948 #define TIM_OCFast_Enable ((uint16_t)0x0004)
mbed_official 157:90e3acc479a2 949 #define TIM_OCFast_Disable ((uint16_t)0x0000)
mbed_official 157:90e3acc479a2 950 #define IS_TIM_OCFAST_STATE(STATE) (((STATE) == TIM_OCFast_Enable) || \
mbed_official 157:90e3acc479a2 951 ((STATE) == TIM_OCFast_Disable))
mbed_official 157:90e3acc479a2 952
mbed_official 157:90e3acc479a2 953 /**
mbed_official 157:90e3acc479a2 954 * @}
mbed_official 157:90e3acc479a2 955 */
mbed_official 157:90e3acc479a2 956
mbed_official 157:90e3acc479a2 957 /** @defgroup TIM_Output_Compare_Clear_State
mbed_official 157:90e3acc479a2 958 * @{
mbed_official 157:90e3acc479a2 959 */
mbed_official 157:90e3acc479a2 960
mbed_official 157:90e3acc479a2 961 #define TIM_OCClear_Enable ((uint16_t)0x0080)
mbed_official 157:90e3acc479a2 962 #define TIM_OCClear_Disable ((uint16_t)0x0000)
mbed_official 157:90e3acc479a2 963 #define IS_TIM_OCCLEAR_STATE(STATE) (((STATE) == TIM_OCClear_Enable) || \
mbed_official 157:90e3acc479a2 964 ((STATE) == TIM_OCClear_Disable))
mbed_official 157:90e3acc479a2 965 /**
mbed_official 157:90e3acc479a2 966 * @}
mbed_official 157:90e3acc479a2 967 */
mbed_official 157:90e3acc479a2 968
mbed_official 157:90e3acc479a2 969 /** @defgroup TIM_Trigger_Output_Source
mbed_official 157:90e3acc479a2 970 * @{
mbed_official 157:90e3acc479a2 971 */
mbed_official 157:90e3acc479a2 972
mbed_official 157:90e3acc479a2 973 #define TIM_TRGOSource_Reset ((uint16_t)0x0000)
mbed_official 157:90e3acc479a2 974 #define TIM_TRGOSource_Enable ((uint16_t)0x0010)
mbed_official 157:90e3acc479a2 975 #define TIM_TRGOSource_Update ((uint16_t)0x0020)
mbed_official 157:90e3acc479a2 976 #define TIM_TRGOSource_OC1 ((uint16_t)0x0030)
mbed_official 157:90e3acc479a2 977 #define TIM_TRGOSource_OC1Ref ((uint16_t)0x0040)
mbed_official 157:90e3acc479a2 978 #define TIM_TRGOSource_OC2Ref ((uint16_t)0x0050)
mbed_official 157:90e3acc479a2 979 #define TIM_TRGOSource_OC3Ref ((uint16_t)0x0060)
mbed_official 157:90e3acc479a2 980 #define TIM_TRGOSource_OC4Ref ((uint16_t)0x0070)
mbed_official 157:90e3acc479a2 981 #define IS_TIM_TRGO_SOURCE(SOURCE) (((SOURCE) == TIM_TRGOSource_Reset) || \
mbed_official 157:90e3acc479a2 982 ((SOURCE) == TIM_TRGOSource_Enable) || \
mbed_official 157:90e3acc479a2 983 ((SOURCE) == TIM_TRGOSource_Update) || \
mbed_official 157:90e3acc479a2 984 ((SOURCE) == TIM_TRGOSource_OC1) || \
mbed_official 157:90e3acc479a2 985 ((SOURCE) == TIM_TRGOSource_OC1Ref) || \
mbed_official 157:90e3acc479a2 986 ((SOURCE) == TIM_TRGOSource_OC2Ref) || \
mbed_official 157:90e3acc479a2 987 ((SOURCE) == TIM_TRGOSource_OC3Ref) || \
mbed_official 157:90e3acc479a2 988 ((SOURCE) == TIM_TRGOSource_OC4Ref))
mbed_official 157:90e3acc479a2 989
mbed_official 157:90e3acc479a2 990
mbed_official 157:90e3acc479a2 991 #define TIM_TRGO2Source_Reset ((uint32_t)0x00000000)
mbed_official 157:90e3acc479a2 992 #define TIM_TRGO2Source_Enable ((uint32_t)0x00100000)
mbed_official 157:90e3acc479a2 993 #define TIM_TRGO2Source_Update ((uint32_t)0x00200000)
mbed_official 157:90e3acc479a2 994 #define TIM_TRGO2Source_OC1 ((uint32_t)0x00300000)
mbed_official 157:90e3acc479a2 995 #define TIM_TRGO2Source_OC1Ref ((uint32_t)0x00400000)
mbed_official 157:90e3acc479a2 996 #define TIM_TRGO2Source_OC2Ref ((uint32_t)0x00500000)
mbed_official 157:90e3acc479a2 997 #define TIM_TRGO2Source_OC3Ref ((uint32_t)0x00600000)
mbed_official 157:90e3acc479a2 998 #define TIM_TRGO2Source_OC4Ref ((uint32_t)0x00700000)
mbed_official 157:90e3acc479a2 999 #define TIM_TRGO2Source_OC5Ref ((uint32_t)0x00800000)
mbed_official 157:90e3acc479a2 1000 #define TIM_TRGO2Source_OC6Ref ((uint32_t)0x00900000)
mbed_official 157:90e3acc479a2 1001 #define TIM_TRGO2Source_OC4Ref_RisingFalling ((uint32_t)0x00A00000)
mbed_official 157:90e3acc479a2 1002 #define TIM_TRGO2Source_OC6Ref_RisingFalling ((uint32_t)0x00B00000)
mbed_official 157:90e3acc479a2 1003 #define TIM_TRGO2Source_OC4RefRising_OC6RefRising ((uint32_t)0x00C00000)
mbed_official 157:90e3acc479a2 1004 #define TIM_TRGO2Source_OC4RefRising_OC6RefFalling ((uint32_t)0x00D00000)
mbed_official 157:90e3acc479a2 1005 #define TIM_TRGO2Source_OC5RefRising_OC6RefRising ((uint32_t)0x00E00000)
mbed_official 157:90e3acc479a2 1006 #define TIM_TRGO2Source_OC5RefRising_OC6RefFalling ((uint32_t)0x00F00000)
mbed_official 157:90e3acc479a2 1007 #define IS_TIM_TRGO2_SOURCE(SOURCE) (((SOURCE) == TIM_TRGO2Source_Reset) || \
mbed_official 157:90e3acc479a2 1008 ((SOURCE) == TIM_TRGO2Source_Enable) || \
mbed_official 157:90e3acc479a2 1009 ((SOURCE) == TIM_TRGO2Source_Update) || \
mbed_official 157:90e3acc479a2 1010 ((SOURCE) == TIM_TRGO2Source_OC1) || \
mbed_official 157:90e3acc479a2 1011 ((SOURCE) == TIM_TRGO2Source_OC1Ref) || \
mbed_official 157:90e3acc479a2 1012 ((SOURCE) == TIM_TRGO2Source_OC2Ref) || \
mbed_official 157:90e3acc479a2 1013 ((SOURCE) == TIM_TRGO2Source_OC3Ref) || \
mbed_official 157:90e3acc479a2 1014 ((SOURCE) == TIM_TRGO2Source_OC4Ref) || \
mbed_official 157:90e3acc479a2 1015 ((SOURCE) == TIM_TRGO2Source_OC5Ref) || \
mbed_official 157:90e3acc479a2 1016 ((SOURCE) == TIM_TRGO2Source_OC6Ref) || \
mbed_official 157:90e3acc479a2 1017 ((SOURCE) == TIM_TRGO2Source_OC4Ref_RisingFalling) || \
mbed_official 157:90e3acc479a2 1018 ((SOURCE) == TIM_TRGO2Source_OC6Ref_RisingFalling) || \
mbed_official 157:90e3acc479a2 1019 ((SOURCE) == TIM_TRGO2Source_OC4RefRising_OC6RefRising) || \
mbed_official 157:90e3acc479a2 1020 ((SOURCE) == TIM_TRGO2Source_OC4RefRising_OC6RefFalling) || \
mbed_official 157:90e3acc479a2 1021 ((SOURCE) == TIM_TRGO2Source_OC5RefRising_OC6RefRising) || \
mbed_official 157:90e3acc479a2 1022 ((SOURCE) == TIM_TRGO2Source_OC5RefRising_OC6RefFalling))
mbed_official 157:90e3acc479a2 1023 /**
mbed_official 157:90e3acc479a2 1024 * @}
mbed_official 157:90e3acc479a2 1025 */
mbed_official 157:90e3acc479a2 1026
mbed_official 157:90e3acc479a2 1027 /** @defgroup TIM_Slave_Mode
mbed_official 157:90e3acc479a2 1028 * @{
mbed_official 157:90e3acc479a2 1029 */
mbed_official 157:90e3acc479a2 1030
mbed_official 157:90e3acc479a2 1031 #define TIM_SlaveMode_Reset ((uint32_t)0x00004)
mbed_official 157:90e3acc479a2 1032 #define TIM_SlaveMode_Gated ((uint32_t)0x00005)
mbed_official 157:90e3acc479a2 1033 #define TIM_SlaveMode_Trigger ((uint32_t)0x00006)
mbed_official 157:90e3acc479a2 1034 #define TIM_SlaveMode_External1 ((uint32_t)0x00007)
mbed_official 157:90e3acc479a2 1035 #define TIM_SlaveMode_Combined_ResetTrigger ((uint32_t)0x10000)
mbed_official 157:90e3acc479a2 1036 #define IS_TIM_SLAVE_MODE(MODE) (((MODE) == TIM_SlaveMode_Reset) || \
mbed_official 157:90e3acc479a2 1037 ((MODE) == TIM_SlaveMode_Gated) || \
mbed_official 157:90e3acc479a2 1038 ((MODE) == TIM_SlaveMode_Trigger) || \
mbed_official 157:90e3acc479a2 1039 ((MODE) == TIM_SlaveMode_External1) || \
mbed_official 157:90e3acc479a2 1040 ((MODE) == TIM_SlaveMode_Combined_ResetTrigger))
mbed_official 157:90e3acc479a2 1041 /**
mbed_official 157:90e3acc479a2 1042 * @}
mbed_official 157:90e3acc479a2 1043 */
mbed_official 157:90e3acc479a2 1044
mbed_official 157:90e3acc479a2 1045 /** @defgroup TIM_Master_Slave_Mode
mbed_official 157:90e3acc479a2 1046 * @{
mbed_official 157:90e3acc479a2 1047 */
mbed_official 157:90e3acc479a2 1048
mbed_official 157:90e3acc479a2 1049 #define TIM_MasterSlaveMode_Enable ((uint16_t)0x0080)
mbed_official 157:90e3acc479a2 1050 #define TIM_MasterSlaveMode_Disable ((uint16_t)0x0000)
mbed_official 157:90e3acc479a2 1051 #define IS_TIM_MSM_STATE(STATE) (((STATE) == TIM_MasterSlaveMode_Enable) || \
mbed_official 157:90e3acc479a2 1052 ((STATE) == TIM_MasterSlaveMode_Disable))
mbed_official 157:90e3acc479a2 1053 /**
mbed_official 157:90e3acc479a2 1054 * @}
mbed_official 157:90e3acc479a2 1055 */
mbed_official 157:90e3acc479a2 1056 /** @defgroup TIM_Remap
mbed_official 157:90e3acc479a2 1057 * @{
mbed_official 157:90e3acc479a2 1058 */
mbed_official 157:90e3acc479a2 1059 #define TIM16_GPIO ((uint16_t)0x0000)
mbed_official 157:90e3acc479a2 1060 #define TIM16_RTC_CLK ((uint16_t)0x0001)
mbed_official 157:90e3acc479a2 1061 #define TIM16_HSEDiv32 ((uint16_t)0x0002)
mbed_official 157:90e3acc479a2 1062 #define TIM16_MCO ((uint16_t)0x0003)
mbed_official 157:90e3acc479a2 1063
mbed_official 157:90e3acc479a2 1064 #define TIM1_ADC1_AWDG1 ((uint16_t)0x0001)
mbed_official 157:90e3acc479a2 1065 #define TIM1_ADC1_AWDG2 ((uint16_t)0x0002)
mbed_official 157:90e3acc479a2 1066 #define TIM1_ADC1_AWDG3 ((uint16_t)0x0003)
mbed_official 157:90e3acc479a2 1067 #define TIM1_ADC4_AWDG1 ((uint16_t)0x0004)
mbed_official 157:90e3acc479a2 1068 #define TIM1_ADC4_AWDG2 ((uint16_t)0x0008)
mbed_official 157:90e3acc479a2 1069 #define TIM1_ADC4_AWDG3 ((uint16_t)0x000C)
mbed_official 157:90e3acc479a2 1070
mbed_official 157:90e3acc479a2 1071 #define TIM8_ADC2_AWDG1 ((uint16_t)0x0001)
mbed_official 157:90e3acc479a2 1072 #define TIM8_ADC2_AWDG2 ((uint16_t)0x0002)
mbed_official 157:90e3acc479a2 1073 #define TIM8_ADC2_AWDG3 ((uint16_t)0x0003)
mbed_official 157:90e3acc479a2 1074 #define TIM8_ADC3_AWDG1 ((uint16_t)0x0004)
mbed_official 157:90e3acc479a2 1075 #define TIM8_ADC3_AWDG2 ((uint16_t)0x0008)
mbed_official 157:90e3acc479a2 1076 #define TIM8_ADC3_AWDG3 ((uint16_t)0x000C)
mbed_official 157:90e3acc479a2 1077
mbed_official 157:90e3acc479a2 1078 #define IS_TIM_REMAP(TIM_REMAP) (((TIM_REMAP) == TIM16_GPIO)|| \
mbed_official 157:90e3acc479a2 1079 ((TIM_REMAP) == TIM16_RTC_CLK) || \
mbed_official 157:90e3acc479a2 1080 ((TIM_REMAP) == TIM16_HSEDiv32) || \
mbed_official 157:90e3acc479a2 1081 ((TIM_REMAP) == TIM16_MCO) ||\
mbed_official 157:90e3acc479a2 1082 ((TIM_REMAP) == TIM1_ADC1_AWDG1) ||\
mbed_official 157:90e3acc479a2 1083 ((TIM_REMAP) == TIM1_ADC1_AWDG2) ||\
mbed_official 157:90e3acc479a2 1084 ((TIM_REMAP) == TIM1_ADC1_AWDG3) ||\
mbed_official 157:90e3acc479a2 1085 ((TIM_REMAP) == TIM1_ADC4_AWDG1) ||\
mbed_official 157:90e3acc479a2 1086 ((TIM_REMAP) == TIM1_ADC4_AWDG2) ||\
mbed_official 157:90e3acc479a2 1087 ((TIM_REMAP) == TIM1_ADC4_AWDG3) ||\
mbed_official 157:90e3acc479a2 1088 ((TIM_REMAP) == TIM8_ADC2_AWDG1) ||\
mbed_official 157:90e3acc479a2 1089 ((TIM_REMAP) == TIM8_ADC2_AWDG2) ||\
mbed_official 157:90e3acc479a2 1090 ((TIM_REMAP) == TIM8_ADC2_AWDG3) ||\
mbed_official 157:90e3acc479a2 1091 ((TIM_REMAP) == TIM8_ADC3_AWDG1) ||\
mbed_official 157:90e3acc479a2 1092 ((TIM_REMAP) == TIM8_ADC3_AWDG2) ||\
mbed_official 157:90e3acc479a2 1093 ((TIM_REMAP) == TIM8_ADC3_AWDG3))
mbed_official 157:90e3acc479a2 1094
mbed_official 157:90e3acc479a2 1095 /**
mbed_official 157:90e3acc479a2 1096 * @}
mbed_official 157:90e3acc479a2 1097 */
mbed_official 157:90e3acc479a2 1098 /** @defgroup TIM_Flags
mbed_official 157:90e3acc479a2 1099 * @{
mbed_official 157:90e3acc479a2 1100 */
mbed_official 157:90e3acc479a2 1101
mbed_official 157:90e3acc479a2 1102 #define TIM_FLAG_Update ((uint32_t)0x00001)
mbed_official 157:90e3acc479a2 1103 #define TIM_FLAG_CC1 ((uint32_t)0x00002)
mbed_official 157:90e3acc479a2 1104 #define TIM_FLAG_CC2 ((uint32_t)0x00004)
mbed_official 157:90e3acc479a2 1105 #define TIM_FLAG_CC3 ((uint32_t)0x00008)
mbed_official 157:90e3acc479a2 1106 #define TIM_FLAG_CC4 ((uint32_t)0x00010)
mbed_official 157:90e3acc479a2 1107 #define TIM_FLAG_COM ((uint32_t)0x00020)
mbed_official 157:90e3acc479a2 1108 #define TIM_FLAG_Trigger ((uint32_t)0x00040)
mbed_official 157:90e3acc479a2 1109 #define TIM_FLAG_Break ((uint32_t)0x00080)
mbed_official 157:90e3acc479a2 1110 #define TIM_FLAG_Break2 ((uint32_t)0x00100)
mbed_official 157:90e3acc479a2 1111 #define TIM_FLAG_CC1OF ((uint32_t)0x00200)
mbed_official 157:90e3acc479a2 1112 #define TIM_FLAG_CC2OF ((uint32_t)0x00400)
mbed_official 157:90e3acc479a2 1113 #define TIM_FLAG_CC3OF ((uint32_t)0x00800)
mbed_official 157:90e3acc479a2 1114 #define TIM_FLAG_CC4OF ((uint32_t)0x01000)
mbed_official 157:90e3acc479a2 1115 #define TIM_FLAG_CC5 ((uint32_t)0x10000)
mbed_official 157:90e3acc479a2 1116 #define TIM_FLAG_CC6 ((uint32_t)0x20000)
mbed_official 157:90e3acc479a2 1117 #define IS_TIM_GET_FLAG(FLAG) (((FLAG) == TIM_FLAG_Update) || \
mbed_official 157:90e3acc479a2 1118 ((FLAG) == TIM_FLAG_CC1) || \
mbed_official 157:90e3acc479a2 1119 ((FLAG) == TIM_FLAG_CC2) || \
mbed_official 157:90e3acc479a2 1120 ((FLAG) == TIM_FLAG_CC3) || \
mbed_official 157:90e3acc479a2 1121 ((FLAG) == TIM_FLAG_CC4) || \
mbed_official 157:90e3acc479a2 1122 ((FLAG) == TIM_FLAG_COM) || \
mbed_official 157:90e3acc479a2 1123 ((FLAG) == TIM_FLAG_Trigger) || \
mbed_official 157:90e3acc479a2 1124 ((FLAG) == TIM_FLAG_Break) || \
mbed_official 157:90e3acc479a2 1125 ((FLAG) == TIM_FLAG_Break2) || \
mbed_official 157:90e3acc479a2 1126 ((FLAG) == TIM_FLAG_CC1OF) || \
mbed_official 157:90e3acc479a2 1127 ((FLAG) == TIM_FLAG_CC2OF) || \
mbed_official 157:90e3acc479a2 1128 ((FLAG) == TIM_FLAG_CC3OF) || \
mbed_official 157:90e3acc479a2 1129 ((FLAG) == TIM_FLAG_CC4OF) ||\
mbed_official 157:90e3acc479a2 1130 ((FLAG) == TIM_FLAG_CC5) ||\
mbed_official 157:90e3acc479a2 1131 ((FLAG) == TIM_FLAG_CC6))
mbed_official 157:90e3acc479a2 1132
mbed_official 157:90e3acc479a2 1133 #define IS_TIM_CLEAR_FLAG(TIM_FLAG) ((((TIM_FLAG) & (uint32_t)0xE000) == 0x0000) && ((TIM_FLAG) != 0x0000))
mbed_official 157:90e3acc479a2 1134 /**
mbed_official 157:90e3acc479a2 1135 * @}
mbed_official 157:90e3acc479a2 1136 */
mbed_official 157:90e3acc479a2 1137
mbed_official 157:90e3acc479a2 1138 /** @defgroup TIM_OCReferenceClear
mbed_official 157:90e3acc479a2 1139 * @{
mbed_official 157:90e3acc479a2 1140 */
mbed_official 157:90e3acc479a2 1141 #define TIM_OCReferenceClear_ETRF ((uint16_t)0x0008)
mbed_official 157:90e3acc479a2 1142 #define TIM_OCReferenceClear_OCREFCLR ((uint16_t)0x0000)
mbed_official 157:90e3acc479a2 1143 #define TIM_OCREFERENCECECLEAR_SOURCE(SOURCE) (((SOURCE) == TIM_OCReferenceClear_ETRF) || \
mbed_official 157:90e3acc479a2 1144 ((SOURCE) == TIM_OCReferenceClear_OCREFCLR))
mbed_official 157:90e3acc479a2 1145
mbed_official 157:90e3acc479a2 1146 /** @defgroup TIM_Input_Capture_Filer_Value
mbed_official 157:90e3acc479a2 1147 * @{
mbed_official 157:90e3acc479a2 1148 */
mbed_official 157:90e3acc479a2 1149
mbed_official 157:90e3acc479a2 1150 #define IS_TIM_IC_FILTER(ICFILTER) ((ICFILTER) <= 0xF)
mbed_official 157:90e3acc479a2 1151 /**
mbed_official 157:90e3acc479a2 1152 * @}
mbed_official 157:90e3acc479a2 1153 */
mbed_official 157:90e3acc479a2 1154
mbed_official 157:90e3acc479a2 1155 /** @defgroup TIM_External_Trigger_Filter
mbed_official 157:90e3acc479a2 1156 * @{
mbed_official 157:90e3acc479a2 1157 */
mbed_official 157:90e3acc479a2 1158
mbed_official 157:90e3acc479a2 1159 #define IS_TIM_EXT_FILTER(EXTFILTER) ((EXTFILTER) <= 0xF)
mbed_official 157:90e3acc479a2 1160 /**
mbed_official 157:90e3acc479a2 1161 * @}
mbed_official 157:90e3acc479a2 1162 */
mbed_official 157:90e3acc479a2 1163
mbed_official 157:90e3acc479a2 1164 /** @defgroup TIM_Legacy
mbed_official 157:90e3acc479a2 1165 * @{
mbed_official 157:90e3acc479a2 1166 */
mbed_official 157:90e3acc479a2 1167
mbed_official 157:90e3acc479a2 1168 #define TIM_DMABurstLength_1Byte TIM_DMABurstLength_1Transfer
mbed_official 157:90e3acc479a2 1169 #define TIM_DMABurstLength_2Bytes TIM_DMABurstLength_2Transfers
mbed_official 157:90e3acc479a2 1170 #define TIM_DMABurstLength_3Bytes TIM_DMABurstLength_3Transfers
mbed_official 157:90e3acc479a2 1171 #define TIM_DMABurstLength_4Bytes TIM_DMABurstLength_4Transfers
mbed_official 157:90e3acc479a2 1172 #define TIM_DMABurstLength_5Bytes TIM_DMABurstLength_5Transfers
mbed_official 157:90e3acc479a2 1173 #define TIM_DMABurstLength_6Bytes TIM_DMABurstLength_6Transfers
mbed_official 157:90e3acc479a2 1174 #define TIM_DMABurstLength_7Bytes TIM_DMABurstLength_7Transfers
mbed_official 157:90e3acc479a2 1175 #define TIM_DMABurstLength_8Bytes TIM_DMABurstLength_8Transfers
mbed_official 157:90e3acc479a2 1176 #define TIM_DMABurstLength_9Bytes TIM_DMABurstLength_9Transfers
mbed_official 157:90e3acc479a2 1177 #define TIM_DMABurstLength_10Bytes TIM_DMABurstLength_10Transfers
mbed_official 157:90e3acc479a2 1178 #define TIM_DMABurstLength_11Bytes TIM_DMABurstLength_11Transfers
mbed_official 157:90e3acc479a2 1179 #define TIM_DMABurstLength_12Bytes TIM_DMABurstLength_12Transfers
mbed_official 157:90e3acc479a2 1180 #define TIM_DMABurstLength_13Bytes TIM_DMABurstLength_13Transfers
mbed_official 157:90e3acc479a2 1181 #define TIM_DMABurstLength_14Bytes TIM_DMABurstLength_14Transfers
mbed_official 157:90e3acc479a2 1182 #define TIM_DMABurstLength_15Bytes TIM_DMABurstLength_15Transfers
mbed_official 157:90e3acc479a2 1183 #define TIM_DMABurstLength_16Bytes TIM_DMABurstLength_16Transfers
mbed_official 157:90e3acc479a2 1184 #define TIM_DMABurstLength_17Bytes TIM_DMABurstLength_17Transfers
mbed_official 157:90e3acc479a2 1185 #define TIM_DMABurstLength_18Bytes TIM_DMABurstLength_18Transfers
mbed_official 157:90e3acc479a2 1186 /**
mbed_official 157:90e3acc479a2 1187 * @}
mbed_official 157:90e3acc479a2 1188 */
mbed_official 157:90e3acc479a2 1189
mbed_official 157:90e3acc479a2 1190 /**
mbed_official 157:90e3acc479a2 1191 * @}
mbed_official 157:90e3acc479a2 1192 */
mbed_official 157:90e3acc479a2 1193
mbed_official 157:90e3acc479a2 1194 /* Exported macro ------------------------------------------------------------*/
mbed_official 157:90e3acc479a2 1195 /* Exported functions --------------------------------------------------------*/
mbed_official 157:90e3acc479a2 1196
mbed_official 157:90e3acc479a2 1197 /* TimeBase management ********************************************************/
mbed_official 157:90e3acc479a2 1198 void TIM_DeInit(TIM_TypeDef* TIMx);
mbed_official 157:90e3acc479a2 1199 void TIM_TimeBaseInit(TIM_TypeDef* TIMx, TIM_TimeBaseInitTypeDef* TIM_TimeBaseInitStruct);
mbed_official 157:90e3acc479a2 1200 void TIM_TimeBaseStructInit(TIM_TimeBaseInitTypeDef* TIM_TimeBaseInitStruct);
mbed_official 157:90e3acc479a2 1201 void TIM_PrescalerConfig(TIM_TypeDef* TIMx, uint16_t Prescaler, uint16_t TIM_PSCReloadMode);
mbed_official 157:90e3acc479a2 1202 void TIM_CounterModeConfig(TIM_TypeDef* TIMx, uint16_t TIM_CounterMode);
mbed_official 157:90e3acc479a2 1203 void TIM_SetCounter(TIM_TypeDef* TIMx, uint32_t Counter);
mbed_official 157:90e3acc479a2 1204 void TIM_SetAutoreload(TIM_TypeDef* TIMx, uint32_t Autoreload);
mbed_official 157:90e3acc479a2 1205 uint32_t TIM_GetCounter(TIM_TypeDef* TIMx);
mbed_official 157:90e3acc479a2 1206 uint16_t TIM_GetPrescaler(TIM_TypeDef* TIMx);
mbed_official 157:90e3acc479a2 1207 void TIM_UpdateDisableConfig(TIM_TypeDef* TIMx, FunctionalState NewState);
mbed_official 157:90e3acc479a2 1208 void TIM_UpdateRequestConfig(TIM_TypeDef* TIMx, uint16_t TIM_UpdateSource);
mbed_official 157:90e3acc479a2 1209 void TIM_UIFRemap(TIM_TypeDef* TIMx, FunctionalState NewState);
mbed_official 157:90e3acc479a2 1210 void TIM_ARRPreloadConfig(TIM_TypeDef* TIMx, FunctionalState NewState);
mbed_official 157:90e3acc479a2 1211 void TIM_SelectOnePulseMode(TIM_TypeDef* TIMx, uint16_t TIM_OPMode);
mbed_official 157:90e3acc479a2 1212 void TIM_SetClockDivision(TIM_TypeDef* TIMx, uint16_t TIM_CKD);
mbed_official 157:90e3acc479a2 1213 void TIM_Cmd(TIM_TypeDef* TIMx, FunctionalState NewState);
mbed_official 157:90e3acc479a2 1214
mbed_official 157:90e3acc479a2 1215 /* Output Compare management **************************************************/
mbed_official 157:90e3acc479a2 1216 void TIM_OC1Init(TIM_TypeDef* TIMx, TIM_OCInitTypeDef* TIM_OCInitStruct);
mbed_official 157:90e3acc479a2 1217 void TIM_OC2Init(TIM_TypeDef* TIMx, TIM_OCInitTypeDef* TIM_OCInitStruct);
mbed_official 157:90e3acc479a2 1218 void TIM_OC3Init(TIM_TypeDef* TIMx, TIM_OCInitTypeDef* TIM_OCInitStruct);
mbed_official 157:90e3acc479a2 1219 void TIM_OC4Init(TIM_TypeDef* TIMx, TIM_OCInitTypeDef* TIM_OCInitStruct);
mbed_official 157:90e3acc479a2 1220 void TIM_OC5Init(TIM_TypeDef* TIMx, TIM_OCInitTypeDef* TIM_OCInitStruct);
mbed_official 157:90e3acc479a2 1221 void TIM_OC6Init(TIM_TypeDef* TIMx, TIM_OCInitTypeDef* TIM_OCInitStruct);
mbed_official 157:90e3acc479a2 1222 void TIM_SelectGC5C1(TIM_TypeDef* TIMx, FunctionalState NewState);
mbed_official 157:90e3acc479a2 1223 void TIM_SelectGC5C2(TIM_TypeDef* TIMx, FunctionalState NewState);
mbed_official 157:90e3acc479a2 1224 void TIM_SelectGC5C3(TIM_TypeDef* TIMx, FunctionalState NewState);
mbed_official 157:90e3acc479a2 1225 void TIM_OCStructInit(TIM_OCInitTypeDef* TIM_OCInitStruct);
mbed_official 157:90e3acc479a2 1226 void TIM_SelectOCxM(TIM_TypeDef* TIMx, uint16_t TIM_Channel, uint32_t TIM_OCMode);
mbed_official 157:90e3acc479a2 1227 void TIM_SetCompare1(TIM_TypeDef* TIMx, uint32_t Compare1);
mbed_official 157:90e3acc479a2 1228 void TIM_SetCompare2(TIM_TypeDef* TIMx, uint32_t Compare2);
mbed_official 157:90e3acc479a2 1229 void TIM_SetCompare3(TIM_TypeDef* TIMx, uint32_t Compare3);
mbed_official 157:90e3acc479a2 1230 void TIM_SetCompare4(TIM_TypeDef* TIMx, uint32_t Compare4);
mbed_official 157:90e3acc479a2 1231 void TIM_SetCompare5(TIM_TypeDef* TIMx, uint32_t Compare5);
mbed_official 157:90e3acc479a2 1232 void TIM_SetCompare6(TIM_TypeDef* TIMx, uint32_t Compare6);
mbed_official 157:90e3acc479a2 1233 void TIM_ForcedOC1Config(TIM_TypeDef* TIMx, uint16_t TIM_ForcedAction);
mbed_official 157:90e3acc479a2 1234 void TIM_ForcedOC2Config(TIM_TypeDef* TIMx, uint16_t TIM_ForcedAction);
mbed_official 157:90e3acc479a2 1235 void TIM_ForcedOC3Config(TIM_TypeDef* TIMx, uint16_t TIM_ForcedAction);
mbed_official 157:90e3acc479a2 1236 void TIM_ForcedOC4Config(TIM_TypeDef* TIMx, uint16_t TIM_ForcedAction);
mbed_official 157:90e3acc479a2 1237 void TIM_ForcedOC5Config(TIM_TypeDef* TIMx, uint16_t TIM_ForcedAction);
mbed_official 157:90e3acc479a2 1238 void TIM_ForcedOC6Config(TIM_TypeDef* TIMx, uint16_t TIM_ForcedAction);
mbed_official 157:90e3acc479a2 1239 void TIM_OC1PreloadConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCPreload);
mbed_official 157:90e3acc479a2 1240 void TIM_OC2PreloadConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCPreload);
mbed_official 157:90e3acc479a2 1241 void TIM_OC3PreloadConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCPreload);
mbed_official 157:90e3acc479a2 1242 void TIM_OC4PreloadConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCPreload);
mbed_official 157:90e3acc479a2 1243 void TIM_OC5PreloadConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCPreload);
mbed_official 157:90e3acc479a2 1244 void TIM_OC6PreloadConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCPreload);
mbed_official 157:90e3acc479a2 1245 void TIM_OC1FastConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCFast);
mbed_official 157:90e3acc479a2 1246 void TIM_OC2FastConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCFast);
mbed_official 157:90e3acc479a2 1247 void TIM_OC3FastConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCFast);
mbed_official 157:90e3acc479a2 1248 void TIM_OC4FastConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCFast);
mbed_official 157:90e3acc479a2 1249 void TIM_ClearOC1Ref(TIM_TypeDef* TIMx, uint16_t TIM_OCClear);
mbed_official 157:90e3acc479a2 1250 void TIM_ClearOC2Ref(TIM_TypeDef* TIMx, uint16_t TIM_OCClear);
mbed_official 157:90e3acc479a2 1251 void TIM_ClearOC3Ref(TIM_TypeDef* TIMx, uint16_t TIM_OCClear);
mbed_official 157:90e3acc479a2 1252 void TIM_ClearOC4Ref(TIM_TypeDef* TIMx, uint16_t TIM_OCClear);
mbed_official 157:90e3acc479a2 1253 void TIM_ClearOC5Ref(TIM_TypeDef* TIMx, uint16_t TIM_OCClear);
mbed_official 157:90e3acc479a2 1254 void TIM_ClearOC6Ref(TIM_TypeDef* TIMx, uint16_t TIM_OCClear);
mbed_official 157:90e3acc479a2 1255 void TIM_SelectOCREFClear(TIM_TypeDef* TIMx, uint16_t TIM_OCReferenceClear);
mbed_official 157:90e3acc479a2 1256 void TIM_OC1PolarityConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCPolarity);
mbed_official 157:90e3acc479a2 1257 void TIM_OC1NPolarityConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCNPolarity);
mbed_official 157:90e3acc479a2 1258 void TIM_OC2PolarityConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCPolarity);
mbed_official 157:90e3acc479a2 1259 void TIM_OC2NPolarityConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCNPolarity);
mbed_official 157:90e3acc479a2 1260 void TIM_OC3PolarityConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCPolarity);
mbed_official 157:90e3acc479a2 1261 void TIM_OC3NPolarityConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCNPolarity);
mbed_official 157:90e3acc479a2 1262 void TIM_OC4PolarityConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCPolarity);
mbed_official 157:90e3acc479a2 1263 void TIM_OC5PolarityConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCPolarity);
mbed_official 157:90e3acc479a2 1264 void TIM_OC6PolarityConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCPolarity);
mbed_official 157:90e3acc479a2 1265 void TIM_CCxCmd(TIM_TypeDef* TIMx, uint16_t TIM_Channel, uint16_t TIM_CCx);
mbed_official 157:90e3acc479a2 1266 void TIM_CCxNCmd(TIM_TypeDef* TIMx, uint16_t TIM_Channel, uint16_t TIM_CCxN);
mbed_official 157:90e3acc479a2 1267
mbed_official 157:90e3acc479a2 1268 /* Input Capture management ***************************************************/
mbed_official 157:90e3acc479a2 1269 void TIM_ICInit(TIM_TypeDef* TIMx, TIM_ICInitTypeDef* TIM_ICInitStruct);
mbed_official 157:90e3acc479a2 1270 void TIM_ICStructInit(TIM_ICInitTypeDef* TIM_ICInitStruct);
mbed_official 157:90e3acc479a2 1271 void TIM_PWMIConfig(TIM_TypeDef* TIMx, TIM_ICInitTypeDef* TIM_ICInitStruct);
mbed_official 157:90e3acc479a2 1272 uint32_t TIM_GetCapture1(TIM_TypeDef* TIMx);
mbed_official 157:90e3acc479a2 1273 uint32_t TIM_GetCapture2(TIM_TypeDef* TIMx);
mbed_official 157:90e3acc479a2 1274 uint32_t TIM_GetCapture3(TIM_TypeDef* TIMx);
mbed_official 157:90e3acc479a2 1275 uint32_t TIM_GetCapture4(TIM_TypeDef* TIMx);
mbed_official 157:90e3acc479a2 1276 void TIM_SetIC1Prescaler(TIM_TypeDef* TIMx, uint16_t TIM_ICPSC);
mbed_official 157:90e3acc479a2 1277 void TIM_SetIC2Prescaler(TIM_TypeDef* TIMx, uint16_t TIM_ICPSC);
mbed_official 157:90e3acc479a2 1278 void TIM_SetIC3Prescaler(TIM_TypeDef* TIMx, uint16_t TIM_ICPSC);
mbed_official 157:90e3acc479a2 1279 void TIM_SetIC4Prescaler(TIM_TypeDef* TIMx, uint16_t TIM_ICPSC);
mbed_official 157:90e3acc479a2 1280
mbed_official 157:90e3acc479a2 1281 /* Advanced-control timers (TIM1 and TIM8) specific features ******************/
mbed_official 157:90e3acc479a2 1282 void TIM_BDTRConfig(TIM_TypeDef* TIMx, TIM_BDTRInitTypeDef *TIM_BDTRInitStruct);
mbed_official 157:90e3acc479a2 1283 void TIM_Break1Config(TIM_TypeDef* TIMx, uint32_t TIM_Break1Polarity, uint8_t TIM_Break1Filter);
mbed_official 157:90e3acc479a2 1284 void TIM_Break2Config(TIM_TypeDef* TIMx, uint32_t TIM_Break2Polarity, uint8_t TIM_Break2Filter);
mbed_official 157:90e3acc479a2 1285 void TIM_Break1Cmd(TIM_TypeDef* TIMx, FunctionalState NewState);
mbed_official 157:90e3acc479a2 1286 void TIM_Break2Cmd(TIM_TypeDef* TIMx, FunctionalState NewState);
mbed_official 157:90e3acc479a2 1287 void TIM_BDTRStructInit(TIM_BDTRInitTypeDef* TIM_BDTRInitStruct);
mbed_official 157:90e3acc479a2 1288 void TIM_CtrlPWMOutputs(TIM_TypeDef* TIMx, FunctionalState NewState);
mbed_official 157:90e3acc479a2 1289 void TIM_SelectCOM(TIM_TypeDef* TIMx, FunctionalState NewState);
mbed_official 157:90e3acc479a2 1290 void TIM_CCPreloadControl(TIM_TypeDef* TIMx, FunctionalState NewState);
mbed_official 157:90e3acc479a2 1291
mbed_official 157:90e3acc479a2 1292 /* Interrupts, DMA and flags management ***************************************/
mbed_official 157:90e3acc479a2 1293 void TIM_ITConfig(TIM_TypeDef* TIMx, uint16_t TIM_IT, FunctionalState NewState);
mbed_official 157:90e3acc479a2 1294 void TIM_GenerateEvent(TIM_TypeDef* TIMx, uint16_t TIM_EventSource);
mbed_official 157:90e3acc479a2 1295 FlagStatus TIM_GetFlagStatus(TIM_TypeDef* TIMx, uint32_t TIM_FLAG);
mbed_official 157:90e3acc479a2 1296 void TIM_ClearFlag(TIM_TypeDef* TIMx, uint16_t TIM_FLAG);
mbed_official 157:90e3acc479a2 1297 ITStatus TIM_GetITStatus(TIM_TypeDef* TIMx, uint16_t TIM_IT);
mbed_official 157:90e3acc479a2 1298 void TIM_ClearITPendingBit(TIM_TypeDef* TIMx, uint16_t TIM_IT);
mbed_official 157:90e3acc479a2 1299 void TIM_DMAConfig(TIM_TypeDef* TIMx, uint16_t TIM_DMABase, uint16_t TIM_DMABurstLength);
mbed_official 157:90e3acc479a2 1300 void TIM_DMACmd(TIM_TypeDef* TIMx, uint16_t TIM_DMASource, FunctionalState NewState);
mbed_official 157:90e3acc479a2 1301 void TIM_SelectCCDMA(TIM_TypeDef* TIMx, FunctionalState NewState);
mbed_official 157:90e3acc479a2 1302
mbed_official 157:90e3acc479a2 1303 /* Clocks management **********************************************************/
mbed_official 157:90e3acc479a2 1304 void TIM_InternalClockConfig(TIM_TypeDef* TIMx);
mbed_official 157:90e3acc479a2 1305 void TIM_ITRxExternalClockConfig(TIM_TypeDef* TIMx, uint16_t TIM_InputTriggerSource);
mbed_official 157:90e3acc479a2 1306 void TIM_TIxExternalClockConfig(TIM_TypeDef* TIMx, uint16_t TIM_TIxExternalCLKSource,
mbed_official 157:90e3acc479a2 1307 uint16_t TIM_ICPolarity, uint16_t ICFilter);
mbed_official 157:90e3acc479a2 1308 void TIM_ETRClockMode1Config(TIM_TypeDef* TIMx, uint16_t TIM_ExtTRGPrescaler, uint16_t TIM_ExtTRGPolarity,
mbed_official 157:90e3acc479a2 1309 uint16_t ExtTRGFilter);
mbed_official 157:90e3acc479a2 1310 void TIM_ETRClockMode2Config(TIM_TypeDef* TIMx, uint16_t TIM_ExtTRGPrescaler,
mbed_official 157:90e3acc479a2 1311 uint16_t TIM_ExtTRGPolarity, uint16_t ExtTRGFilter);
mbed_official 157:90e3acc479a2 1312
mbed_official 157:90e3acc479a2 1313 /* Synchronization management *************************************************/
mbed_official 157:90e3acc479a2 1314 void TIM_SelectInputTrigger(TIM_TypeDef* TIMx, uint16_t TIM_InputTriggerSource);
mbed_official 157:90e3acc479a2 1315 void TIM_SelectOutputTrigger(TIM_TypeDef* TIMx, uint16_t TIM_TRGOSource);
mbed_official 157:90e3acc479a2 1316 void TIM_SelectOutputTrigger2(TIM_TypeDef* TIMx, uint32_t TIM_TRGO2Source);
mbed_official 157:90e3acc479a2 1317 void TIM_SelectSlaveMode(TIM_TypeDef* TIMx, uint32_t TIM_SlaveMode);
mbed_official 157:90e3acc479a2 1318 void TIM_SelectMasterSlaveMode(TIM_TypeDef* TIMx, uint16_t TIM_MasterSlaveMode);
mbed_official 157:90e3acc479a2 1319 void TIM_ETRConfig(TIM_TypeDef* TIMx, uint16_t TIM_ExtTRGPrescaler, uint16_t TIM_ExtTRGPolarity,
mbed_official 157:90e3acc479a2 1320 uint16_t ExtTRGFilter);
mbed_official 157:90e3acc479a2 1321
mbed_official 157:90e3acc479a2 1322 /* Specific interface management **********************************************/
mbed_official 157:90e3acc479a2 1323 void TIM_EncoderInterfaceConfig(TIM_TypeDef* TIMx, uint16_t TIM_EncoderMode,
mbed_official 157:90e3acc479a2 1324 uint16_t TIM_IC1Polarity, uint16_t TIM_IC2Polarity);
mbed_official 157:90e3acc479a2 1325 void TIM_SelectHallSensor(TIM_TypeDef* TIMx, FunctionalState NewState);
mbed_official 157:90e3acc479a2 1326
mbed_official 157:90e3acc479a2 1327 /* Specific remapping management **********************************************/
mbed_official 157:90e3acc479a2 1328 void TIM_RemapConfig(TIM_TypeDef* TIMx, uint16_t TIM_Remap);
mbed_official 157:90e3acc479a2 1329
mbed_official 157:90e3acc479a2 1330 #ifdef __cplusplus
mbed_official 157:90e3acc479a2 1331 }
mbed_official 157:90e3acc479a2 1332 #endif
mbed_official 157:90e3acc479a2 1333
mbed_official 157:90e3acc479a2 1334 #endif /*__STM32F30x_TIM_H */
mbed_official 157:90e3acc479a2 1335
mbed_official 157:90e3acc479a2 1336 /**
mbed_official 157:90e3acc479a2 1337 * @}
mbed_official 157:90e3acc479a2 1338 */
mbed_official 157:90e3acc479a2 1339
mbed_official 157:90e3acc479a2 1340 /**
mbed_official 157:90e3acc479a2 1341 * @}
mbed_official 157:90e3acc479a2 1342 */
mbed_official 157:90e3acc479a2 1343
mbed_official 157:90e3acc479a2 1344 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/