shao ziyang
mbed library sources
Dependents: frdm_kl05z_gpio_test
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mbed official
targets/cmsis/TARGET_STM/TARGET_DISCO_F303VC/stm32f30x_syscfg.h@323:9e901b0a5aa1, 2014-09-13 (annotated)
- Committer:
- shaoziyang
- Date:
- Sat Sep 13 14:25:46 2014 +0000
- Revision:
- 323:9e901b0a5aa1
- Parent:
- 157:90e3acc479a2
test with CLOCK_SETUP = 0
Who changed what in which revision?
| User | Revision | Line number | New contents of line |
|---|---|---|---|
| mbed_official | 157:90e3acc479a2 | 1 | /** |
| mbed_official | 157:90e3acc479a2 | 2 | ****************************************************************************** |
| mbed_official | 157:90e3acc479a2 | 3 | * @file stm32f30x_syscfg.h |
| mbed_official | 157:90e3acc479a2 | 4 | * @author MCD Application Team |
| mbed_official | 157:90e3acc479a2 | 5 | * @version V1.1.0 |
| mbed_official | 157:90e3acc479a2 | 6 | * @date 27-February-2014 |
| mbed_official | 157:90e3acc479a2 | 7 | * @brief This file contains all the functions prototypes for the SYSCFG firmware |
| mbed_official | 157:90e3acc479a2 | 8 | * library. |
| mbed_official | 157:90e3acc479a2 | 9 | ****************************************************************************** |
| mbed_official | 157:90e3acc479a2 | 10 | * @attention |
| mbed_official | 157:90e3acc479a2 | 11 | * |
| mbed_official | 157:90e3acc479a2 | 12 | * <h2><center>© COPYRIGHT(c) 2014 STMicroelectronics</center></h2> |
| mbed_official | 157:90e3acc479a2 | 13 | * |
| mbed_official | 157:90e3acc479a2 | 14 | * Redistribution and use in source and binary forms, with or without modification, |
| mbed_official | 157:90e3acc479a2 | 15 | * are permitted provided that the following conditions are met: |
| mbed_official | 157:90e3acc479a2 | 16 | * 1. Redistributions of source code must retain the above copyright notice, |
| mbed_official | 157:90e3acc479a2 | 17 | * this list of conditions and the following disclaimer. |
| mbed_official | 157:90e3acc479a2 | 18 | * 2. Redistributions in binary form must reproduce the above copyright notice, |
| mbed_official | 157:90e3acc479a2 | 19 | * this list of conditions and the following disclaimer in the documentation |
| mbed_official | 157:90e3acc479a2 | 20 | * and/or other materials provided with the distribution. |
| mbed_official | 157:90e3acc479a2 | 21 | * 3. Neither the name of STMicroelectronics nor the names of its contributors |
| mbed_official | 157:90e3acc479a2 | 22 | * may be used to endorse or promote products derived from this software |
| mbed_official | 157:90e3acc479a2 | 23 | * without specific prior written permission. |
| mbed_official | 157:90e3acc479a2 | 24 | * |
| mbed_official | 157:90e3acc479a2 | 25 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
| mbed_official | 157:90e3acc479a2 | 26 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
| mbed_official | 157:90e3acc479a2 | 27 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
| mbed_official | 157:90e3acc479a2 | 28 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE |
| mbed_official | 157:90e3acc479a2 | 29 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
| mbed_official | 157:90e3acc479a2 | 30 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR |
| mbed_official | 157:90e3acc479a2 | 31 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
| mbed_official | 157:90e3acc479a2 | 32 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, |
| mbed_official | 157:90e3acc479a2 | 33 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
| mbed_official | 157:90e3acc479a2 | 34 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
| mbed_official | 157:90e3acc479a2 | 35 | * |
| mbed_official | 157:90e3acc479a2 | 36 | ****************************************************************************** |
| mbed_official | 157:90e3acc479a2 | 37 | */ |
| mbed_official | 157:90e3acc479a2 | 38 | |
| mbed_official | 157:90e3acc479a2 | 39 | /*!< Define to prevent recursive inclusion -----------------------------------*/ |
| mbed_official | 157:90e3acc479a2 | 40 | #ifndef __STM32F30x_SYSCFG_H |
| mbed_official | 157:90e3acc479a2 | 41 | #define __STM32F30x_SYSCFG_H |
| mbed_official | 157:90e3acc479a2 | 42 | |
| mbed_official | 157:90e3acc479a2 | 43 | #ifdef __cplusplus |
| mbed_official | 157:90e3acc479a2 | 44 | extern "C" { |
| mbed_official | 157:90e3acc479a2 | 45 | #endif |
| mbed_official | 157:90e3acc479a2 | 46 | |
| mbed_official | 157:90e3acc479a2 | 47 | /*!< Includes ----------------------------------------------------------------*/ |
| mbed_official | 157:90e3acc479a2 | 48 | #include "stm32f30x.h" |
| mbed_official | 157:90e3acc479a2 | 49 | |
| mbed_official | 157:90e3acc479a2 | 50 | /** @addtogroup STM32F30x_StdPeriph_Driver |
| mbed_official | 157:90e3acc479a2 | 51 | * @{ |
| mbed_official | 157:90e3acc479a2 | 52 | */ |
| mbed_official | 157:90e3acc479a2 | 53 | |
| mbed_official | 157:90e3acc479a2 | 54 | /** @addtogroup SYSCFG |
| mbed_official | 157:90e3acc479a2 | 55 | * @{ |
| mbed_official | 157:90e3acc479a2 | 56 | */ |
| mbed_official | 157:90e3acc479a2 | 57 | |
| mbed_official | 157:90e3acc479a2 | 58 | /* Exported types ------------------------------------------------------------*/ |
| mbed_official | 157:90e3acc479a2 | 59 | /* Exported constants --------------------------------------------------------*/ |
| mbed_official | 157:90e3acc479a2 | 60 | |
| mbed_official | 157:90e3acc479a2 | 61 | /** @defgroup SYSCFG_Exported_Constants |
| mbed_official | 157:90e3acc479a2 | 62 | * @{ |
| mbed_official | 157:90e3acc479a2 | 63 | */ |
| mbed_official | 157:90e3acc479a2 | 64 | |
| mbed_official | 157:90e3acc479a2 | 65 | /** @defgroup SYSCFG_EXTI_Port_Sources |
| mbed_official | 157:90e3acc479a2 | 66 | * @{ |
| mbed_official | 157:90e3acc479a2 | 67 | */ |
| mbed_official | 157:90e3acc479a2 | 68 | #define EXTI_PortSourceGPIOA ((uint8_t)0x00) |
| mbed_official | 157:90e3acc479a2 | 69 | #define EXTI_PortSourceGPIOB ((uint8_t)0x01) |
| mbed_official | 157:90e3acc479a2 | 70 | #define EXTI_PortSourceGPIOC ((uint8_t)0x02) |
| mbed_official | 157:90e3acc479a2 | 71 | #define EXTI_PortSourceGPIOD ((uint8_t)0x03) |
| mbed_official | 157:90e3acc479a2 | 72 | #define EXTI_PortSourceGPIOE ((uint8_t)0x04) |
| mbed_official | 157:90e3acc479a2 | 73 | #define EXTI_PortSourceGPIOF ((uint8_t)0x05) |
| mbed_official | 157:90e3acc479a2 | 74 | |
| mbed_official | 157:90e3acc479a2 | 75 | #define IS_EXTI_PORT_SOURCE(PORTSOURCE) (((PORTSOURCE) == EXTI_PortSourceGPIOA) || \ |
| mbed_official | 157:90e3acc479a2 | 76 | ((PORTSOURCE) == EXTI_PortSourceGPIOB) || \ |
| mbed_official | 157:90e3acc479a2 | 77 | ((PORTSOURCE) == EXTI_PortSourceGPIOC) || \ |
| mbed_official | 157:90e3acc479a2 | 78 | ((PORTSOURCE) == EXTI_PortSourceGPIOD) || \ |
| mbed_official | 157:90e3acc479a2 | 79 | ((PORTSOURCE) == EXTI_PortSourceGPIOE) || \ |
| mbed_official | 157:90e3acc479a2 | 80 | ((PORTSOURCE) == EXTI_PortSourceGPIOF)) |
| mbed_official | 157:90e3acc479a2 | 81 | /** |
| mbed_official | 157:90e3acc479a2 | 82 | * @} |
| mbed_official | 157:90e3acc479a2 | 83 | */ |
| mbed_official | 157:90e3acc479a2 | 84 | |
| mbed_official | 157:90e3acc479a2 | 85 | /** @defgroup SYSCFG_EXTI_Pin_sources |
| mbed_official | 157:90e3acc479a2 | 86 | * @{ |
| mbed_official | 157:90e3acc479a2 | 87 | */ |
| mbed_official | 157:90e3acc479a2 | 88 | #define EXTI_PinSource0 ((uint8_t)0x00) |
| mbed_official | 157:90e3acc479a2 | 89 | #define EXTI_PinSource1 ((uint8_t)0x01) |
| mbed_official | 157:90e3acc479a2 | 90 | #define EXTI_PinSource2 ((uint8_t)0x02) |
| mbed_official | 157:90e3acc479a2 | 91 | #define EXTI_PinSource3 ((uint8_t)0x03) |
| mbed_official | 157:90e3acc479a2 | 92 | #define EXTI_PinSource4 ((uint8_t)0x04) |
| mbed_official | 157:90e3acc479a2 | 93 | #define EXTI_PinSource5 ((uint8_t)0x05) |
| mbed_official | 157:90e3acc479a2 | 94 | #define EXTI_PinSource6 ((uint8_t)0x06) |
| mbed_official | 157:90e3acc479a2 | 95 | #define EXTI_PinSource7 ((uint8_t)0x07) |
| mbed_official | 157:90e3acc479a2 | 96 | #define EXTI_PinSource8 ((uint8_t)0x08) |
| mbed_official | 157:90e3acc479a2 | 97 | #define EXTI_PinSource9 ((uint8_t)0x09) |
| mbed_official | 157:90e3acc479a2 | 98 | #define EXTI_PinSource10 ((uint8_t)0x0A) |
| mbed_official | 157:90e3acc479a2 | 99 | #define EXTI_PinSource11 ((uint8_t)0x0B) |
| mbed_official | 157:90e3acc479a2 | 100 | #define EXTI_PinSource12 ((uint8_t)0x0C) |
| mbed_official | 157:90e3acc479a2 | 101 | #define EXTI_PinSource13 ((uint8_t)0x0D) |
| mbed_official | 157:90e3acc479a2 | 102 | #define EXTI_PinSource14 ((uint8_t)0x0E) |
| mbed_official | 157:90e3acc479a2 | 103 | #define EXTI_PinSource15 ((uint8_t)0x0F) |
| mbed_official | 157:90e3acc479a2 | 104 | |
| mbed_official | 157:90e3acc479a2 | 105 | #define IS_EXTI_PIN_SOURCE(PINSOURCE) (((PINSOURCE) == EXTI_PinSource0) || \ |
| mbed_official | 157:90e3acc479a2 | 106 | ((PINSOURCE) == EXTI_PinSource1) || \ |
| mbed_official | 157:90e3acc479a2 | 107 | ((PINSOURCE) == EXTI_PinSource2) || \ |
| mbed_official | 157:90e3acc479a2 | 108 | ((PINSOURCE) == EXTI_PinSource3) || \ |
| mbed_official | 157:90e3acc479a2 | 109 | ((PINSOURCE) == EXTI_PinSource4) || \ |
| mbed_official | 157:90e3acc479a2 | 110 | ((PINSOURCE) == EXTI_PinSource5) || \ |
| mbed_official | 157:90e3acc479a2 | 111 | ((PINSOURCE) == EXTI_PinSource6) || \ |
| mbed_official | 157:90e3acc479a2 | 112 | ((PINSOURCE) == EXTI_PinSource7) || \ |
| mbed_official | 157:90e3acc479a2 | 113 | ((PINSOURCE) == EXTI_PinSource8) || \ |
| mbed_official | 157:90e3acc479a2 | 114 | ((PINSOURCE) == EXTI_PinSource9) || \ |
| mbed_official | 157:90e3acc479a2 | 115 | ((PINSOURCE) == EXTI_PinSource10) || \ |
| mbed_official | 157:90e3acc479a2 | 116 | ((PINSOURCE) == EXTI_PinSource11) || \ |
| mbed_official | 157:90e3acc479a2 | 117 | ((PINSOURCE) == EXTI_PinSource12) || \ |
| mbed_official | 157:90e3acc479a2 | 118 | ((PINSOURCE) == EXTI_PinSource13) || \ |
| mbed_official | 157:90e3acc479a2 | 119 | ((PINSOURCE) == EXTI_PinSource14) || \ |
| mbed_official | 157:90e3acc479a2 | 120 | ((PINSOURCE) == EXTI_PinSource15)) |
| mbed_official | 157:90e3acc479a2 | 121 | /** |
| mbed_official | 157:90e3acc479a2 | 122 | * @} |
| mbed_official | 157:90e3acc479a2 | 123 | */ |
| mbed_official | 157:90e3acc479a2 | 124 | |
| mbed_official | 157:90e3acc479a2 | 125 | /** @defgroup SYSCFG_Memory_Remap_Config |
| mbed_official | 157:90e3acc479a2 | 126 | * @{ |
| mbed_official | 157:90e3acc479a2 | 127 | */ |
| mbed_official | 157:90e3acc479a2 | 128 | #define SYSCFG_MemoryRemap_Flash ((uint8_t)0x00) |
| mbed_official | 157:90e3acc479a2 | 129 | #define SYSCFG_MemoryRemap_SystemMemory ((uint8_t)0x01) |
| mbed_official | 157:90e3acc479a2 | 130 | #define SYSCFG_MemoryRemap_SRAM ((uint8_t)0x03) |
| mbed_official | 157:90e3acc479a2 | 131 | |
| mbed_official | 157:90e3acc479a2 | 132 | |
| mbed_official | 157:90e3acc479a2 | 133 | #define IS_SYSCFG_MEMORY_REMAP(REMAP) (((REMAP) == SYSCFG_MemoryRemap_Flash) || \ |
| mbed_official | 157:90e3acc479a2 | 134 | ((REMAP) == SYSCFG_MemoryRemap_SystemMemory) || \ |
| mbed_official | 157:90e3acc479a2 | 135 | ((REMAP) == SYSCFG_MemoryRemap_SRAM)) |
| mbed_official | 157:90e3acc479a2 | 136 | |
| mbed_official | 157:90e3acc479a2 | 137 | /** |
| mbed_official | 157:90e3acc479a2 | 138 | * @} |
| mbed_official | 157:90e3acc479a2 | 139 | */ |
| mbed_official | 157:90e3acc479a2 | 140 | |
| mbed_official | 157:90e3acc479a2 | 141 | /** @defgroup SYSCFG_DMA_Remap_Config |
| mbed_official | 157:90e3acc479a2 | 142 | * @{ |
| mbed_official | 157:90e3acc479a2 | 143 | */ |
| mbed_official | 157:90e3acc479a2 | 144 | #define SYSCFG_DMARemap_TIM17 SYSCFG_CFGR1_TIM17_DMA_RMP /*!< Remap TIM17 DMA requests from channel1 to channel2 */ |
| mbed_official | 157:90e3acc479a2 | 145 | #define SYSCFG_DMARemap_TIM16 SYSCFG_CFGR1_TIM16_DMA_RMP /*!< Remap TIM16 DMA requests from channel3 to channel4 */ |
| mbed_official | 157:90e3acc479a2 | 146 | #define SYSCFG_DMARemap_ADC2ADC4 SYSCFG_CFGR1_ADC24_DMA_RMP /*!< Remap ADC2 and ADC4 DMA requests */ |
| mbed_official | 157:90e3acc479a2 | 147 | |
| mbed_official | 157:90e3acc479a2 | 148 | #define SYSCFG_DMARemap_TIM6DAC1Ch1 SYSCFG_CFGR1_TIM6DAC1Ch1_DMA_RMP /* Remap TIM6/DAC1 Ch1 DMA requests */ |
| mbed_official | 157:90e3acc479a2 | 149 | #define SYSCFG_DMARemap_TIM7DAC1Ch2 SYSCFG_CFGR1_TIM7DAC1Ch2_DMA_RMP /* Remap TIM7/DAC1 Ch2 DMA requests */ |
| mbed_official | 157:90e3acc479a2 | 150 | #define SYSCFG_DMARemap_DAC2Ch1 SYSCFG_CFGR1_DAC2Ch1_DMA_RMP /* Remap DAC2 Ch1 DMA requests */ |
| mbed_official | 157:90e3acc479a2 | 151 | |
| mbed_official | 157:90e3acc479a2 | 152 | #define SYSCFG_DMARemapCh2_SPI1_RX ((uint32_t)0x80000003) /* Remap SPI1 RX DMA CH2 requests */ |
| mbed_official | 157:90e3acc479a2 | 153 | #define SYSCFG_DMARemapCh4_SPI1_RX ((uint32_t)0x80000001) /* Remap SPI1 RX DMA CH4 requests */ |
| mbed_official | 157:90e3acc479a2 | 154 | #define SYSCFG_DMARemapCh6_SPI1_RX ((uint32_t)0x80000002) /* Remap SPI1 RX DMA CH6 requests */ |
| mbed_official | 157:90e3acc479a2 | 155 | |
| mbed_official | 157:90e3acc479a2 | 156 | #define SYSCFG_DMARemapCh3_SPI1_TX ((uint32_t)0x8000000C) /* Remap SPI1 TX DMA CH2 requests */ |
| mbed_official | 157:90e3acc479a2 | 157 | #define SYSCFG_DMARemapCh5_SPI1_TX ((uint32_t)0x80000004) /* Remap SPI1 TX DMA CH5 requests */ |
| mbed_official | 157:90e3acc479a2 | 158 | #define SYSCFG_DMARemapCh7_SPI1_TX ((uint32_t)0x80000008) /* Remap SPI1 TX DMA CH7 requests */ |
| mbed_official | 157:90e3acc479a2 | 159 | |
| mbed_official | 157:90e3acc479a2 | 160 | #define SYSCFG_DMARemapCh7_I2C1_RX ((uint32_t)0x80000030) /* Remap I2C1 RX DMA CH7 requests */ |
| mbed_official | 157:90e3acc479a2 | 161 | #define SYSCFG_DMARemapCh3_I2C1_RX ((uint32_t)0x80000010) /* Remap I2C1 RX DMA CH3 requests */ |
| mbed_official | 157:90e3acc479a2 | 162 | #define SYSCFG_DMARemapCh5_I2C1_RX ((uint32_t)0x80000020) /* Remap I2C1 RX DMA CH5 requests */ |
| mbed_official | 157:90e3acc479a2 | 163 | |
| mbed_official | 157:90e3acc479a2 | 164 | #define SYSCFG_DMARemapCh6_I2C1_TX ((uint32_t)0x800000C0) /* Remap I2C1 TX DMA CH6 requests */ |
| mbed_official | 157:90e3acc479a2 | 165 | #define SYSCFG_DMARemapCh2_I2C1_TX ((uint32_t)0x80000040) /* Remap I2C1 TX DMA CH2 requests */ |
| mbed_official | 157:90e3acc479a2 | 166 | #define SYSCFG_DMARemapCh4_I2C1_TX ((uint32_t)0x80000080) /* Remap I2C1 TX DMA CH4 requests */ |
| mbed_official | 157:90e3acc479a2 | 167 | |
| mbed_official | 157:90e3acc479a2 | 168 | #define SYSCFG_DMARemapCh4_ADC2 ((uint32_t)0x80000300) /* Remap ADC2 DMA1 Ch4 requests */ |
| mbed_official | 157:90e3acc479a2 | 169 | #define SYSCFG_DMARemapCh2_ADC2 ((uint32_t)0x80000200) /* Remap ADC2 DMA1 Ch2 requests */ |
| mbed_official | 157:90e3acc479a2 | 170 | |
| mbed_official | 157:90e3acc479a2 | 171 | /* SYSCFG_DMA_Remap_Legacy */ |
| mbed_official | 157:90e3acc479a2 | 172 | #define SYSCFG_DMARemap_TIM6DAC1 SYSCFG_DMARemap_TIM6DAC1Ch1 /*!< Remap TIM6/DAC1 DMA requests */ |
| mbed_official | 157:90e3acc479a2 | 173 | #define SYSCFG_DMARemap_TIM7DAC2 SYSCFG_DMARemap_TIM7DAC1Ch2 /*!< Remap TIM7/DAC2 DMA requests */ |
| mbed_official | 157:90e3acc479a2 | 174 | |
| mbed_official | 157:90e3acc479a2 | 175 | #define IS_SYSCFG_DMA_REMAP(REMAP) (((REMAP) == SYSCFG_DMARemap_TIM17) || \ |
| mbed_official | 157:90e3acc479a2 | 176 | ((REMAP) == SYSCFG_DMARemap_TIM16) || \ |
| mbed_official | 157:90e3acc479a2 | 177 | ((REMAP) == SYSCFG_DMARemap_ADC2ADC4) || \ |
| mbed_official | 157:90e3acc479a2 | 178 | ((REMAP) == SYSCFG_DMARemap_TIM6DAC1Ch1) || \ |
| mbed_official | 157:90e3acc479a2 | 179 | ((REMAP) == SYSCFG_DMARemap_TIM7DAC1Ch2) || \ |
| mbed_official | 157:90e3acc479a2 | 180 | ((REMAP) == SYSCFG_DMARemap_DAC2Ch1) || \ |
| mbed_official | 157:90e3acc479a2 | 181 | ((REMAP) == SYSCFG_DMARemapCh2_SPI1_RX) || \ |
| mbed_official | 157:90e3acc479a2 | 182 | ((REMAP) == SYSCFG_DMARemapCh4_SPI1_RX) || \ |
| mbed_official | 157:90e3acc479a2 | 183 | ((REMAP) == SYSCFG_DMARemapCh6_SPI1_RX) || \ |
| mbed_official | 157:90e3acc479a2 | 184 | ((REMAP) == SYSCFG_DMARemapCh5_SPI1_TX) || \ |
| mbed_official | 157:90e3acc479a2 | 185 | ((REMAP) == SYSCFG_DMARemapCh5_SPI1_TX) || \ |
| mbed_official | 157:90e3acc479a2 | 186 | ((REMAP) == SYSCFG_DMARemapCh7_SPI1_TX) || \ |
| mbed_official | 157:90e3acc479a2 | 187 | ((REMAP) == SYSCFG_DMARemapCh7_I2C1_RX) || \ |
| mbed_official | 157:90e3acc479a2 | 188 | ((REMAP) == SYSCFG_DMARemapCh3_I2C1_RX) || \ |
| mbed_official | 157:90e3acc479a2 | 189 | ((REMAP) == SYSCFG_DMARemapCh5_I2C1_RX) || \ |
| mbed_official | 157:90e3acc479a2 | 190 | ((REMAP) == SYSCFG_DMARemapCh6_I2C1_TX) || \ |
| mbed_official | 157:90e3acc479a2 | 191 | ((REMAP) == SYSCFG_DMARemapCh2_I2C1_TX) || \ |
| mbed_official | 157:90e3acc479a2 | 192 | ((REMAP) == SYSCFG_DMARemapCh4_I2C1_TX) || \ |
| mbed_official | 157:90e3acc479a2 | 193 | ((REMAP) == SYSCFG_DMARemapCh4_ADC2) || \ |
| mbed_official | 157:90e3acc479a2 | 194 | ((REMAP) == SYSCFG_DMARemapCh2_ADC2)) |
| mbed_official | 157:90e3acc479a2 | 195 | |
| mbed_official | 157:90e3acc479a2 | 196 | /** |
| mbed_official | 157:90e3acc479a2 | 197 | * @} |
| mbed_official | 157:90e3acc479a2 | 198 | */ |
| mbed_official | 157:90e3acc479a2 | 199 | |
| mbed_official | 157:90e3acc479a2 | 200 | /** @defgroup SYSCFG_Trigger_Remap_Config |
| mbed_official | 157:90e3acc479a2 | 201 | * @{ |
| mbed_official | 157:90e3acc479a2 | 202 | */ |
| mbed_official | 157:90e3acc479a2 | 203 | #define SYSCFG_TriggerRemap_DACTIM3 SYSCFG_CFGR1_DAC1_TRIG1_RMP /*!< Remap DAC trigger to TIM3 */ |
| mbed_official | 157:90e3acc479a2 | 204 | #define SYSCFG_TriggerRemap_TIM1TIM17 SYSCFG_CFGR1_TIM1_ITR3_RMP /*!< Remap TIM1 ITR3 to TIM17 OC */ |
| mbed_official | 157:90e3acc479a2 | 205 | #define SYSCFG_TriggerRemap_DACHRTIM1_TRIG1 ((uint32_t)0x80010000) /*!< Remap DAC trigger to HRTIM1 TRIG1 */ |
| mbed_official | 157:90e3acc479a2 | 206 | #define SYSCFG_TriggerRemap_DACHRTIM1_TRIG2 ((uint32_t)0x80020000) /*!< Remap DAC trigger to HRTIM1 TRIG2 */ |
| mbed_official | 157:90e3acc479a2 | 207 | |
| mbed_official | 157:90e3acc479a2 | 208 | #define IS_SYSCFG_TRIGGER_REMAP(REMAP) (((REMAP) == SYSCFG_TriggerRemap_DACTIM3) || \ |
| mbed_official | 157:90e3acc479a2 | 209 | ((REMAP) == SYSCFG_TriggerRemap_DACHRTIM1_TRIG1) || \ |
| mbed_official | 157:90e3acc479a2 | 210 | ((REMAP) == SYSCFG_TriggerRemap_DACHRTIM1_TRIG2) || \ |
| mbed_official | 157:90e3acc479a2 | 211 | ((REMAP) == SYSCFG_TriggerRemap_TIM1TIM17)) |
| mbed_official | 157:90e3acc479a2 | 212 | |
| mbed_official | 157:90e3acc479a2 | 213 | /** |
| mbed_official | 157:90e3acc479a2 | 214 | * @} |
| mbed_official | 157:90e3acc479a2 | 215 | */ |
| mbed_official | 157:90e3acc479a2 | 216 | |
| mbed_official | 157:90e3acc479a2 | 217 | /** @defgroup SYSCFG_EncoderRemap_Config |
| mbed_official | 157:90e3acc479a2 | 218 | * @{ |
| mbed_official | 157:90e3acc479a2 | 219 | */ |
| mbed_official | 157:90e3acc479a2 | 220 | #define SYSCFG_EncoderRemap_No ((uint32_t)0x00000000) /*!< No redirection */ |
| mbed_official | 157:90e3acc479a2 | 221 | #define SYSCFG_EncoderRemap_TIM2 SYSCFG_CFGR1_ENCODER_MODE_0 /*!< Timer 2 IC1 and IC2 connected to TIM15 IC1 and IC2 */ |
| mbed_official | 157:90e3acc479a2 | 222 | #define SYSCFG_EncoderRemap_TIM3 SYSCFG_CFGR1_ENCODER_MODE_1 /*!< Timer 3 IC1 and IC2 connected to TIM15 IC1 and IC2 */ |
| mbed_official | 157:90e3acc479a2 | 223 | #define SYSCFG_EncoderRemap_TIM4 SYSCFG_CFGR1_ENCODER_MODE /*!< Timer 4 IC1 and IC2 connected to TIM15 IC1 and IC2 */ |
| mbed_official | 157:90e3acc479a2 | 224 | |
| mbed_official | 157:90e3acc479a2 | 225 | #define IS_SYSCFG_ENCODER_REMAP(REMAP) (((REMAP) == SYSCFG_EncoderRemap_No) || \ |
| mbed_official | 157:90e3acc479a2 | 226 | ((REMAP) == SYSCFG_EncoderRemap_TIM2) || \ |
| mbed_official | 157:90e3acc479a2 | 227 | ((REMAP) == SYSCFG_EncoderRemap_TIM3) || \ |
| mbed_official | 157:90e3acc479a2 | 228 | ((REMAP) == SYSCFG_EncoderRemap_TIM4)) |
| mbed_official | 157:90e3acc479a2 | 229 | |
| mbed_official | 157:90e3acc479a2 | 230 | /** |
| mbed_official | 157:90e3acc479a2 | 231 | * @} |
| mbed_official | 157:90e3acc479a2 | 232 | */ |
| mbed_official | 157:90e3acc479a2 | 233 | |
| mbed_official | 157:90e3acc479a2 | 234 | /** @defgroup SYSCFG_I2C_FastModePlus_Config |
| mbed_official | 157:90e3acc479a2 | 235 | * @{ |
| mbed_official | 157:90e3acc479a2 | 236 | */ |
| mbed_official | 157:90e3acc479a2 | 237 | #define SYSCFG_I2CFastModePlus_PB6 SYSCFG_CFGR1_I2C_PB6_FMP /*!< Enable Fast Mode Plus on PB6 */ |
| mbed_official | 157:90e3acc479a2 | 238 | #define SYSCFG_I2CFastModePlus_PB7 SYSCFG_CFGR1_I2C_PB7_FMP /*!< Enable Fast Mode Plus on PB7 */ |
| mbed_official | 157:90e3acc479a2 | 239 | #define SYSCFG_I2CFastModePlus_PB8 SYSCFG_CFGR1_I2C_PB8_FMP /*!< Enable Fast Mode Plus on PB8 */ |
| mbed_official | 157:90e3acc479a2 | 240 | #define SYSCFG_I2CFastModePlus_PB9 SYSCFG_CFGR1_I2C_PB9_FMP /*!< Enable Fast Mode Plus on PB9 */ |
| mbed_official | 157:90e3acc479a2 | 241 | #define SYSCFG_I2CFastModePlus_I2C1 SYSCFG_CFGR1_I2C1_FMP /*!< Enable Fast Mode Plus on I2C1 pins */ |
| mbed_official | 157:90e3acc479a2 | 242 | #define SYSCFG_I2CFastModePlus_I2C2 SYSCFG_CFGR1_I2C2_FMP /*!< Enable Fast Mode Plus on I2C2 pins */ |
| mbed_official | 157:90e3acc479a2 | 243 | |
| mbed_official | 157:90e3acc479a2 | 244 | #define IS_SYSCFG_I2C_FMP(PIN) (((PIN) == SYSCFG_I2CFastModePlus_PB6) || \ |
| mbed_official | 157:90e3acc479a2 | 245 | ((PIN) == SYSCFG_I2CFastModePlus_PB7) || \ |
| mbed_official | 157:90e3acc479a2 | 246 | ((PIN) == SYSCFG_I2CFastModePlus_PB8) || \ |
| mbed_official | 157:90e3acc479a2 | 247 | ((PIN) == SYSCFG_I2CFastModePlus_PB9) || \ |
| mbed_official | 157:90e3acc479a2 | 248 | ((PIN) == SYSCFG_I2CFastModePlus_I2C1) || \ |
| mbed_official | 157:90e3acc479a2 | 249 | ((PIN) == SYSCFG_I2CFastModePlus_I2C2)) |
| mbed_official | 157:90e3acc479a2 | 250 | |
| mbed_official | 157:90e3acc479a2 | 251 | /** |
| mbed_official | 157:90e3acc479a2 | 252 | * @} |
| mbed_official | 157:90e3acc479a2 | 253 | */ |
| mbed_official | 157:90e3acc479a2 | 254 | |
| mbed_official | 157:90e3acc479a2 | 255 | /** @defgroup SYSCFG_FPU_Interrupt_Config |
| mbed_official | 157:90e3acc479a2 | 256 | * @{ |
| mbed_official | 157:90e3acc479a2 | 257 | */ |
| mbed_official | 157:90e3acc479a2 | 258 | #define SYSCFG_IT_IXC SYSCFG_CFGR1_FPU_IE_5 /*!< Inexact Interrupt enable (interrupt disabled by default) */ |
| mbed_official | 157:90e3acc479a2 | 259 | #define SYSCFG_IT_IDC SYSCFG_CFGR1_FPU_IE_4 /*!< Input denormal Interrupt enable */ |
| mbed_official | 157:90e3acc479a2 | 260 | #define SYSCFG_IT_OFC SYSCFG_CFGR1_FPU_IE_3 /*!< Overflow Interrupt enable */ |
| mbed_official | 157:90e3acc479a2 | 261 | #define SYSCFG_IT_UFC SYSCFG_CFGR1_FPU_IE_2 /*!< Underflow Interrupt enable */ |
| mbed_official | 157:90e3acc479a2 | 262 | #define SYSCFG_IT_DZC SYSCFG_CFGR1_FPU_IE_1 /*!< Divide-by-zero Interrupt enable */ |
| mbed_official | 157:90e3acc479a2 | 263 | #define SYSCFG_IT_IOC SYSCFG_CFGR1_FPU_IE_0 /*!< Invalid operation Interrupt enable */ |
| mbed_official | 157:90e3acc479a2 | 264 | |
| mbed_official | 157:90e3acc479a2 | 265 | #define IS_SYSCFG_IT(IT) ((((IT) & (uint32_t)0x03FFFFFF) == 0) && ((IT) != 0)) |
| mbed_official | 157:90e3acc479a2 | 266 | |
| mbed_official | 157:90e3acc479a2 | 267 | /** |
| mbed_official | 157:90e3acc479a2 | 268 | * @} |
| mbed_official | 157:90e3acc479a2 | 269 | */ |
| mbed_official | 157:90e3acc479a2 | 270 | |
| mbed_official | 157:90e3acc479a2 | 271 | /** @defgroup SYSCFG_Lock_Config |
| mbed_official | 157:90e3acc479a2 | 272 | * @{ |
| mbed_official | 157:90e3acc479a2 | 273 | */ |
| mbed_official | 157:90e3acc479a2 | 274 | #define SYSCFG_Break_PVD SYSCFG_CFGR2_PVD_LOCK /*!< Enables and locks the PVD connection with TIM1/8/15/16/17 Break Input and also the PVD_EN and PVDSEL[2:0] bits of the Power Control Interface */ |
| mbed_official | 157:90e3acc479a2 | 275 | #define SYSCFG_Break_SRAMParity SYSCFG_CFGR2_SRAM_PARITY_LOCK /*!< Enables and locks the SRAM_PARITY error signal with Break Input of TIM1/8/15/16/17 */ |
| mbed_official | 157:90e3acc479a2 | 276 | #define SYSCFG_Break_Lockup SYSCFG_CFGR2_LOCKUP_LOCK /*!< Enables and locks the LOCKUP output of CortexM4 with Break Input of TIM1/8/15/16/17 */ |
| mbed_official | 157:90e3acc479a2 | 277 | |
| mbed_official | 157:90e3acc479a2 | 278 | #define IS_SYSCFG_LOCK_CONFIG(CONFIG) (((CONFIG) == SYSCFG_Break_PVD) || \ |
| mbed_official | 157:90e3acc479a2 | 279 | ((CONFIG) == SYSCFG_Break_SRAMParity) || \ |
| mbed_official | 157:90e3acc479a2 | 280 | ((CONFIG) == SYSCFG_Break_Lockup)) |
| mbed_official | 157:90e3acc479a2 | 281 | |
| mbed_official | 157:90e3acc479a2 | 282 | /** |
| mbed_official | 157:90e3acc479a2 | 283 | * @} |
| mbed_official | 157:90e3acc479a2 | 284 | */ |
| mbed_official | 157:90e3acc479a2 | 285 | |
| mbed_official | 157:90e3acc479a2 | 286 | /** @defgroup SYSCFG_SRAMWRP_Config |
| mbed_official | 157:90e3acc479a2 | 287 | * @{ |
| mbed_official | 157:90e3acc479a2 | 288 | */ |
| mbed_official | 157:90e3acc479a2 | 289 | #define SYSCFG_SRAMWRP_Page0 SYSCFG_RCR_PAGE0 /*!< ICODE SRAM Write protection page 0 */ |
| mbed_official | 157:90e3acc479a2 | 290 | #define SYSCFG_SRAMWRP_Page1 SYSCFG_RCR_PAGE1 /*!< ICODE SRAM Write protection page 1 */ |
| mbed_official | 157:90e3acc479a2 | 291 | #define SYSCFG_SRAMWRP_Page2 SYSCFG_RCR_PAGE2 /*!< ICODE SRAM Write protection page 2 */ |
| mbed_official | 157:90e3acc479a2 | 292 | #define SYSCFG_SRAMWRP_Page3 SYSCFG_RCR_PAGE3 /*!< ICODE SRAM Write protection page 3 */ |
| mbed_official | 157:90e3acc479a2 | 293 | #define SYSCFG_SRAMWRP_Page4 SYSCFG_RCR_PAGE4 /*!< ICODE SRAM Write protection page 4 */ |
| mbed_official | 157:90e3acc479a2 | 294 | #define SYSCFG_SRAMWRP_Page5 SYSCFG_RCR_PAGE5 /*!< ICODE SRAM Write protection page 5 */ |
| mbed_official | 157:90e3acc479a2 | 295 | #define SYSCFG_SRAMWRP_Page6 SYSCFG_RCR_PAGE6 /*!< ICODE SRAM Write protection page 6 */ |
| mbed_official | 157:90e3acc479a2 | 296 | #define SYSCFG_SRAMWRP_Page7 SYSCFG_RCR_PAGE7 /*!< ICODE SRAM Write protection page 7 */ |
| mbed_official | 157:90e3acc479a2 | 297 | |
| mbed_official | 157:90e3acc479a2 | 298 | #define IS_SYSCFG_PAGE(PAGE)((((PAGE) & (uint32_t)0xFFFFFF00) == 0x00000000) && ((PAGE) != 0x00000000)) |
| mbed_official | 157:90e3acc479a2 | 299 | |
| mbed_official | 157:90e3acc479a2 | 300 | /** |
| mbed_official | 157:90e3acc479a2 | 301 | * @} |
| mbed_official | 157:90e3acc479a2 | 302 | */ |
| mbed_official | 157:90e3acc479a2 | 303 | |
| mbed_official | 157:90e3acc479a2 | 304 | /** @defgroup SYSCFG_flags_definition |
| mbed_official | 157:90e3acc479a2 | 305 | * @{ |
| mbed_official | 157:90e3acc479a2 | 306 | */ |
| mbed_official | 157:90e3acc479a2 | 307 | |
| mbed_official | 157:90e3acc479a2 | 308 | #define SYSCFG_FLAG_PE SYSCFG_CFGR2_SRAM_PE |
| mbed_official | 157:90e3acc479a2 | 309 | |
| mbed_official | 157:90e3acc479a2 | 310 | #define IS_SYSCFG_FLAG(FLAG) (((FLAG) == SYSCFG_FLAG_PE)) |
| mbed_official | 157:90e3acc479a2 | 311 | |
| mbed_official | 157:90e3acc479a2 | 312 | /** |
| mbed_official | 157:90e3acc479a2 | 313 | * @} |
| mbed_official | 157:90e3acc479a2 | 314 | */ |
| mbed_official | 157:90e3acc479a2 | 315 | |
| mbed_official | 157:90e3acc479a2 | 316 | /** |
| mbed_official | 157:90e3acc479a2 | 317 | * @} |
| mbed_official | 157:90e3acc479a2 | 318 | */ |
| mbed_official | 157:90e3acc479a2 | 319 | |
| mbed_official | 157:90e3acc479a2 | 320 | /* Exported macro ------------------------------------------------------------*/ |
| mbed_official | 157:90e3acc479a2 | 321 | /* Exported functions ------------------------------------------------------- */ |
| mbed_official | 157:90e3acc479a2 | 322 | |
| mbed_official | 157:90e3acc479a2 | 323 | /* Function used to set the SYSCFG configuration to the default reset state **/ |
| mbed_official | 157:90e3acc479a2 | 324 | void SYSCFG_DeInit(void); |
| mbed_official | 157:90e3acc479a2 | 325 | |
| mbed_official | 157:90e3acc479a2 | 326 | /* SYSCFG configuration functions *********************************************/ |
| mbed_official | 157:90e3acc479a2 | 327 | void SYSCFG_MemoryRemapConfig(uint32_t SYSCFG_MemoryRemap); |
| mbed_official | 157:90e3acc479a2 | 328 | void SYSCFG_DMAChannelRemapConfig(uint32_t SYSCFG_DMARemap, FunctionalState NewState); |
| mbed_official | 157:90e3acc479a2 | 329 | void SYSCFG_TriggerRemapConfig(uint32_t SYSCFG_TriggerRemap, FunctionalState NewState); |
| mbed_official | 157:90e3acc479a2 | 330 | void SYSCFG_EncoderRemapConfig(uint32_t SYSCFG_EncoderRemap); |
| mbed_official | 157:90e3acc479a2 | 331 | void SYSCFG_USBInterruptLineRemapCmd(FunctionalState NewState); |
| mbed_official | 157:90e3acc479a2 | 332 | void SYSCFG_I2CFastModePlusConfig(uint32_t SYSCFG_I2CFastModePlus, FunctionalState NewState); |
| mbed_official | 157:90e3acc479a2 | 333 | void SYSCFG_ITConfig(uint32_t SYSCFG_IT, FunctionalState NewState); |
| mbed_official | 157:90e3acc479a2 | 334 | void SYSCFG_EXTILineConfig(uint8_t EXTI_PortSourceGPIOx, uint8_t EXTI_PinSourcex); |
| mbed_official | 157:90e3acc479a2 | 335 | void SYSCFG_BreakConfig(uint32_t SYSCFG_Break); |
| mbed_official | 157:90e3acc479a2 | 336 | void SYSCFG_BypassParityCheckDisable(void); |
| mbed_official | 157:90e3acc479a2 | 337 | void SYSCFG_SRAMWRPEnable(uint32_t SYSCFG_SRAMWRP); |
| mbed_official | 157:90e3acc479a2 | 338 | FlagStatus SYSCFG_GetFlagStatus(uint32_t SYSCFG_Flag); |
| mbed_official | 157:90e3acc479a2 | 339 | void SYSCFG_ClearFlag(uint32_t SYSCFG_Flag); |
| mbed_official | 157:90e3acc479a2 | 340 | |
| mbed_official | 157:90e3acc479a2 | 341 | #ifdef __cplusplus |
| mbed_official | 157:90e3acc479a2 | 342 | } |
| mbed_official | 157:90e3acc479a2 | 343 | #endif |
| mbed_official | 157:90e3acc479a2 | 344 | |
| mbed_official | 157:90e3acc479a2 | 345 | #endif /*__STM32F30x_SYSCFG_H */ |
| mbed_official | 157:90e3acc479a2 | 346 | |
| mbed_official | 157:90e3acc479a2 | 347 | /** |
| mbed_official | 157:90e3acc479a2 | 348 | * @} |
| mbed_official | 157:90e3acc479a2 | 349 | */ |
| mbed_official | 157:90e3acc479a2 | 350 | |
| mbed_official | 157:90e3acc479a2 | 351 | /** |
| mbed_official | 157:90e3acc479a2 | 352 | * @} |
| mbed_official | 157:90e3acc479a2 | 353 | */ |
| mbed_official | 157:90e3acc479a2 | 354 | |
| mbed_official | 157:90e3acc479a2 | 355 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |