shao ziyang / mbed-src-kl05

mbed library sources

Dependents:   frdm_kl05z_gpio_test

Fork of mbed-src by mbed official

targets/cmsis/TARGET_STM/TARGET_DISCO_F303VC/stm32f30x_spi.c@323:9e901b0a5aa1, 2014-09-13 (annotated)

Committer:
shaoziyang
Date:
Sat Sep 13 14:25:46 2014 +0000
Revision:
323:9e901b0a5aa1
Parent:
157:90e3acc479a2 
test with CLOCK_SETUP = 0

Who changed what in which revision?

UserRevisionLine numberNew contents of line
mbed_official 157:90e3acc479a2 1 /**
mbed_official 157:90e3acc479a2 2 ******************************************************************************
mbed_official 157:90e3acc479a2 3 * @file stm32f30x_spi.c
mbed_official 157:90e3acc479a2 4 * @author MCD Application Team
mbed_official 157:90e3acc479a2 5 * @version V1.1.0
mbed_official 157:90e3acc479a2 6 * @date 27-February-2014
mbed_official 157:90e3acc479a2 7 * @brief This file provides firmware functions to manage the following
mbed_official 157:90e3acc479a2 8 * functionalities of the Serial peripheral interface (SPI):
mbed_official 157:90e3acc479a2 9 * + Initialization and Configuration
mbed_official 157:90e3acc479a2 10 * + Data transfers functions
mbed_official 157:90e3acc479a2 11 * + Hardware CRC Calculation
mbed_official 157:90e3acc479a2 12 * + DMA transfers management
mbed_official 157:90e3acc479a2 13 * + Interrupts and flags management
mbed_official 157:90e3acc479a2 14 *
mbed_official 157:90e3acc479a2 15 * @verbatim
mbed_official 157:90e3acc479a2 16
mbed_official 157:90e3acc479a2 17
mbed_official 157:90e3acc479a2 18 ===============================================================================
mbed_official 157:90e3acc479a2 19 ##### How to use this driver #####
mbed_official 157:90e3acc479a2 20 ===============================================================================
mbed_official 157:90e3acc479a2 21 [..]
mbed_official 157:90e3acc479a2 22 (#) Enable peripheral clock using RCC_APBPeriphClockCmd(RCC_APB2Periph_SPI1, ENABLE)
mbed_official 157:90e3acc479a2 23 function for SPI1 or using RCC_APBPeriphClockCmd(RCC_APB1Periph_SPI2, ENABLE)
mbed_official 157:90e3acc479a2 24 function for SPI2.
mbed_official 157:90e3acc479a2 25 (#) Enable SCK, MOSI, MISO and NSS GPIO clocks using RCC_AHBPeriphClockCmd()
mbed_official 157:90e3acc479a2 26 function.
mbed_official 157:90e3acc479a2 27 (#) Peripherals alternate function:
mbed_official 157:90e3acc479a2 28 (++) Connect the pin to the desired peripherals' Alternate
mbed_official 157:90e3acc479a2 29 Function (AF) using GPIO_PinAFConfig() function.
mbed_official 157:90e3acc479a2 30 (++) Configure the desired pin in alternate function by:
mbed_official 157:90e3acc479a2 31 GPIO_InitStruct->GPIO_Mode = GPIO_Mode_AF.
mbed_official 157:90e3acc479a2 32 (++) Select the type, pull-up/pull-down and output speed via
mbed_official 157:90e3acc479a2 33 GPIO_PuPd, GPIO_OType and GPIO_Speed members.
mbed_official 157:90e3acc479a2 34 (++) Call GPIO_Init() function.
mbed_official 157:90e3acc479a2 35 (#) Program the Polarity, Phase, First Data, Baud Rate Prescaler, Slave
mbed_official 157:90e3acc479a2 36 Management, Peripheral Mode and CRC Polynomial values using the SPI_Init()
mbed_official 157:90e3acc479a2 37 function in SPI mode. In I2S mode, program the Mode, Standard, Data Format,
mbed_official 157:90e3acc479a2 38 MCLK Output, Audio frequency and Polarity using I2S_Init() function.
mbed_official 157:90e3acc479a2 39 (#) Configure the FIFO threshold using SPI_RxFIFOThresholdConfig() to select
mbed_official 157:90e3acc479a2 40 at which threshold the RXNE event is generated.
mbed_official 157:90e3acc479a2 41 (#) Enable the NVIC and the corresponding interrupt using the function
mbed_official 157:90e3acc479a2 42 SPI_I2S_ITConfig() if you need to use interrupt mode.
mbed_official 157:90e3acc479a2 43 (#) When using the DMA mode
mbed_official 157:90e3acc479a2 44 (++) Configure the DMA using DMA_Init() function.
mbed_official 157:90e3acc479a2 45 (++) Active the needed channel Request using SPI_I2S_DMACmd() function.
mbed_official 157:90e3acc479a2 46 (#) Enable the SPI using the SPI_Cmd() function or enable the I2S using
mbed_official 157:90e3acc479a2 47 I2S_Cmd().
mbed_official 157:90e3acc479a2 48 (#) Enable the DMA using the DMA_Cmd() function when using DMA mode.
mbed_official 157:90e3acc479a2 49 (#) Optionally you can enable/configure the following parameters without
mbed_official 157:90e3acc479a2 50 re-initialization (i.e there is no need to call again SPI_Init() function):
mbed_official 157:90e3acc479a2 51 (++) When bidirectional mode (SPI_Direction_1Line_Rx or SPI_Direction_1Line_Tx)
mbed_official 157:90e3acc479a2 52 is programmed as Data direction parameter using the SPI_Init() function
mbed_official 157:90e3acc479a2 53 it can be possible to switch between SPI_Direction_Tx or SPI_Direction_Rx
mbed_official 157:90e3acc479a2 54 using the SPI_BiDirectionalLineConfig() function.
mbed_official 157:90e3acc479a2 55 (++) When SPI_NSS_Soft is selected as Slave Select Management parameter
mbed_official 157:90e3acc479a2 56 using the SPI_Init() function it can be possible to manage the
mbed_official 157:90e3acc479a2 57 NSS internal signal using the SPI_NSSInternalSoftwareConfig() function.
mbed_official 157:90e3acc479a2 58 (++) Reconfigure the data size using the SPI_DataSizeConfig() function.
mbed_official 157:90e3acc479a2 59 (++) Enable or disable the SS output using the SPI_SSOutputCmd() function.
mbed_official 157:90e3acc479a2 60 (#) To use the CRC Hardware calculation feature refer to the Peripheral
mbed_official 157:90e3acc479a2 61 CRC hardware Calculation subsection.
mbed_official 157:90e3acc479a2 62 [..] It is possible to use SPI in I2S full duplex mode, in this case, each SPI
mbed_official 157:90e3acc479a2 63 peripheral is able to manage sending and receiving data simultaneously
mbed_official 157:90e3acc479a2 64 using two data lines. Each SPI peripheral has an extended block called I2Sxext
mbed_official 157:90e3acc479a2 65 (ie. I2S2ext for SPI2 and I2S3ext for SPI3).
mbed_official 157:90e3acc479a2 66 The extension block is not a full SPI IP, it is used only as I2S slave to
mbed_official 157:90e3acc479a2 67 implement full duplex mode. The extension block uses the same clock sources
mbed_official 157:90e3acc479a2 68 as its master.
mbed_official 157:90e3acc479a2 69 To configure I2S full duplex you have to:
mbed_official 157:90e3acc479a2 70 (#) Configure SPIx in I2S mode (I2S_Init() function) as described above.
mbed_official 157:90e3acc479a2 71 (#) Call the I2S_FullDuplexConfig() function using the same strucutre passed to
mbed_official 157:90e3acc479a2 72 I2S_Init() function.
mbed_official 157:90e3acc479a2 73 (#) Call I2S_Cmd() for SPIx then for its extended block.
mbed_official 157:90e3acc479a2 74 (#) Configure interrupts or DMA requests and to get/clear flag status,
mbed_official 157:90e3acc479a2 75 use I2Sxext instance for the extension block.
mbed_official 157:90e3acc479a2 76 [..] Functions that can be called with I2Sxext instances are:
mbed_official 157:90e3acc479a2 77 I2S_Cmd(), I2S_FullDuplexConfig(), SPI_I2S_ReceiveData16(), SPI_I2S_SendData16(),
mbed_official 157:90e3acc479a2 78 SPI_I2S_DMACmd(), SPI_I2S_ITConfig(), SPI_I2S_GetFlagStatus(), SPI_I2S_ClearFlag(),
mbed_official 157:90e3acc479a2 79 SPI_I2S_GetITStatus() and SPI_I2S_ClearITPendingBit().
mbed_official 157:90e3acc479a2 80 [..] Example: To use SPI3 in Full duplex mode (SPI3 is Master Tx, I2S3ext is Slave Rx):
mbed_official 157:90e3acc479a2 81 [..] RCC_APB1PeriphClockCmd(RCC_APB1Periph_SPI3, ENABLE);
mbed_official 157:90e3acc479a2 82 I2S_StructInit(&I2SInitStruct);
mbed_official 157:90e3acc479a2 83 I2SInitStruct.Mode = I2S_Mode_MasterTx;
mbed_official 157:90e3acc479a2 84 I2S_Init(SPI3, &I2SInitStruct);
mbed_official 157:90e3acc479a2 85 I2S_FullDuplexConfig(SPI3ext, &I2SInitStruct)
mbed_official 157:90e3acc479a2 86 I2S_Cmd(SPI3, ENABLE);
mbed_official 157:90e3acc479a2 87 I2S_Cmd(SPI3ext, ENABLE);
mbed_official 157:90e3acc479a2 88 ...
mbed_official 157:90e3acc479a2 89 while (SPI_I2S_GetFlagStatus(SPI2, SPI_FLAG_TXE) == RESET)
mbed_official 157:90e3acc479a2 90 {}
mbed_official 157:90e3acc479a2 91 SPI_I2S_SendData16(SPI3, txdata[i]);
mbed_official 157:90e3acc479a2 92 ...
mbed_official 157:90e3acc479a2 93 while (SPI_I2S_GetFlagStatus(I2S3ext, SPI_FLAG_RXNE) == RESET)
mbed_official 157:90e3acc479a2 94 {}
mbed_official 157:90e3acc479a2 95 rxdata[i] = SPI_I2S_ReceiveData16(I2S3ext);
mbed_official 157:90e3acc479a2 96 ...
mbed_official 157:90e3acc479a2 97 [..]
mbed_official 157:90e3acc479a2 98 (@) In SPI mode: To use the SPI TI mode, call the function SPI_TIModeCmd()
mbed_official 157:90e3acc479a2 99 just after calling the function SPI_Init().
mbed_official 157:90e3acc479a2 100
mbed_official 157:90e3acc479a2 101 @endverbatim
mbed_official 157:90e3acc479a2 102 ******************************************************************************
mbed_official 157:90e3acc479a2 103 * @attention
mbed_official 157:90e3acc479a2 104 *
mbed_official 157:90e3acc479a2 105 * <h2><center>&copy; COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
mbed_official 157:90e3acc479a2 106 *
mbed_official 157:90e3acc479a2 107 * Redistribution and use in source and binary forms, with or without modification,
mbed_official 157:90e3acc479a2 108 * are permitted provided that the following conditions are met:
mbed_official 157:90e3acc479a2 109 * 1. Redistributions of source code must retain the above copyright notice,
mbed_official 157:90e3acc479a2 110 * this list of conditions and the following disclaimer.
mbed_official 157:90e3acc479a2 111 * 2. Redistributions in binary form must reproduce the above copyright notice,
mbed_official 157:90e3acc479a2 112 * this list of conditions and the following disclaimer in the documentation
mbed_official 157:90e3acc479a2 113 * and/or other materials provided with the distribution.
mbed_official 157:90e3acc479a2 114 * 3. Neither the name of STMicroelectronics nor the names of its contributors
mbed_official 157:90e3acc479a2 115 * may be used to endorse or promote products derived from this software
mbed_official 157:90e3acc479a2 116 * without specific prior written permission.
mbed_official 157:90e3acc479a2 117 *
mbed_official 157:90e3acc479a2 118 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
mbed_official 157:90e3acc479a2 119 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
mbed_official 157:90e3acc479a2 120 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
mbed_official 157:90e3acc479a2 121 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
mbed_official 157:90e3acc479a2 122 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
mbed_official 157:90e3acc479a2 123 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
mbed_official 157:90e3acc479a2 124 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
mbed_official 157:90e3acc479a2 125 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
mbed_official 157:90e3acc479a2 126 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
mbed_official 157:90e3acc479a2 127 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
mbed_official 157:90e3acc479a2 128 *
mbed_official 157:90e3acc479a2 129 ******************************************************************************
mbed_official 157:90e3acc479a2 130 */
mbed_official 157:90e3acc479a2 131
mbed_official 157:90e3acc479a2 132 /* Includes ------------------------------------------------------------------*/
mbed_official 157:90e3acc479a2 133 #include "stm32f30x_spi.h"
mbed_official 157:90e3acc479a2 134 #include "stm32f30x_rcc.h"
mbed_official 157:90e3acc479a2 135
mbed_official 157:90e3acc479a2 136 /** @addtogroup STM32F30x_StdPeriph_Driver
mbed_official 157:90e3acc479a2 137 * @{
mbed_official 157:90e3acc479a2 138 */
mbed_official 157:90e3acc479a2 139
mbed_official 157:90e3acc479a2 140 /** @defgroup SPI
mbed_official 157:90e3acc479a2 141 * @brief SPI driver modules
mbed_official 157:90e3acc479a2 142 * @{
mbed_official 157:90e3acc479a2 143 */
mbed_official 157:90e3acc479a2 144
mbed_official 157:90e3acc479a2 145 /* Private typedef -----------------------------------------------------------*/
mbed_official 157:90e3acc479a2 146 /* Private define ------------------------------------------------------------*/
mbed_official 157:90e3acc479a2 147 /* SPI registers Masks */
mbed_official 157:90e3acc479a2 148 #define CR1_CLEAR_MASK ((uint16_t)0x3040)
mbed_official 157:90e3acc479a2 149 #define CR2_LDMA_MASK ((uint16_t)0x9FFF)
mbed_official 157:90e3acc479a2 150
mbed_official 157:90e3acc479a2 151 #define I2SCFGR_CLEAR_MASK ((uint16_t)0xF040)
mbed_official 157:90e3acc479a2 152
mbed_official 157:90e3acc479a2 153 /* Private macro -------------------------------------------------------------*/
mbed_official 157:90e3acc479a2 154 /* Private variables ---------------------------------------------------------*/
mbed_official 157:90e3acc479a2 155 /* Private function prototypes -----------------------------------------------*/
mbed_official 157:90e3acc479a2 156 /* Private functions ---------------------------------------------------------*/
mbed_official 157:90e3acc479a2 157
mbed_official 157:90e3acc479a2 158 /** @defgroup SPI_Private_Functions
mbed_official 157:90e3acc479a2 159 * @{
mbed_official 157:90e3acc479a2 160 */
mbed_official 157:90e3acc479a2 161
mbed_official 157:90e3acc479a2 162 /** @defgroup SPI_Group1 Initialization and Configuration functions
mbed_official 157:90e3acc479a2 163 * @brief Initialization and Configuration functions
mbed_official 157:90e3acc479a2 164 *
mbed_official 157:90e3acc479a2 165 @verbatim
mbed_official 157:90e3acc479a2 166 ===============================================================================
mbed_official 157:90e3acc479a2 167 ##### Initialization and Configuration functions #####
mbed_official 157:90e3acc479a2 168 ===============================================================================
mbed_official 157:90e3acc479a2 169 [..] This section provides a set of functions allowing to initialize the SPI Direction,
mbed_official 157:90e3acc479a2 170 SPI Mode, SPI Data Size, SPI Polarity, SPI Phase, SPI NSS Management, SPI Baud
mbed_official 157:90e3acc479a2 171 Rate Prescaler, SPI First Bit and SPI CRC Polynomial.
mbed_official 157:90e3acc479a2 172 [..] The SPI_Init() function follows the SPI configuration procedures for Master mode
mbed_official 157:90e3acc479a2 173 and Slave mode (details for these procedures are available in reference manual).
mbed_official 157:90e3acc479a2 174 [..] When the Software NSS management (SPI_InitStruct->SPI_NSS = SPI_NSS_Soft) is selected,
mbed_official 157:90e3acc479a2 175 use the following function to manage the NSS bit:
mbed_official 157:90e3acc479a2 176 void SPI_NSSInternalSoftwareConfig(SPI_TypeDef* SPIx, uint16_t SPI_NSSInternalSoft);
mbed_official 157:90e3acc479a2 177 [..] In Master mode, when the Hardware NSS management (SPI_InitStruct->SPI_NSS = SPI_NSS_Hard)
mbed_official 157:90e3acc479a2 178 is selected, use the follwoing function to enable the NSS output feature.
mbed_official 157:90e3acc479a2 179 void SPI_SSOutputCmd(SPI_TypeDef* SPIx, FunctionalState NewState);
mbed_official 157:90e3acc479a2 180 [..] The NSS pulse mode can be managed by the SPI TI mode when enabling it using the
mbed_official 157:90e3acc479a2 181 following function: void SPI_TIModeCmd(SPI_TypeDef* SPIx, FunctionalState NewState);
mbed_official 157:90e3acc479a2 182 And it can be managed by software in the SPI Motorola mode using this function:
mbed_official 157:90e3acc479a2 183 void SPI_NSSPulseModeCmd(SPI_TypeDef* SPIx, FunctionalState NewState);
mbed_official 157:90e3acc479a2 184 [..] This section provides also functions to initialize the I2S Mode, Standard,
mbed_official 157:90e3acc479a2 185 Data Format, MCLK Output, Audio frequency and Polarity.
mbed_official 157:90e3acc479a2 186 [..] The I2S_Init() function follows the I2S configuration procedures for Master mode
mbed_official 157:90e3acc479a2 187 and Slave mode.
mbed_official 157:90e3acc479a2 188
mbed_official 157:90e3acc479a2 189 @endverbatim
mbed_official 157:90e3acc479a2 190 * @{
mbed_official 157:90e3acc479a2 191 */
mbed_official 157:90e3acc479a2 192
mbed_official 157:90e3acc479a2 193 /**
mbed_official 157:90e3acc479a2 194 * @brief Deinitializes the SPIx peripheral registers to their default
mbed_official 157:90e3acc479a2 195 * reset values.
mbed_official 157:90e3acc479a2 196 * @param SPIx: To select the SPIx peripheral, where x can be: 1, 2 or 3
mbed_official 157:90e3acc479a2 197 * in SPI mode.
mbed_official 157:90e3acc479a2 198 * @retval None
mbed_official 157:90e3acc479a2 199 */
mbed_official 157:90e3acc479a2 200 void SPI_I2S_DeInit(SPI_TypeDef* SPIx)
mbed_official 157:90e3acc479a2 201 {
mbed_official 157:90e3acc479a2 202 /* Check the parameters */
mbed_official 157:90e3acc479a2 203 assert_param(IS_SPI_ALL_PERIPH(SPIx));
mbed_official 157:90e3acc479a2 204
mbed_official 157:90e3acc479a2 205 if (SPIx == SPI1)
mbed_official 157:90e3acc479a2 206 {
mbed_official 157:90e3acc479a2 207 /* Enable SPI1 reset state */
mbed_official 157:90e3acc479a2 208 RCC_APB2PeriphResetCmd(RCC_APB2Periph_SPI1, ENABLE);
mbed_official 157:90e3acc479a2 209 /* Release SPI1 from reset state */
mbed_official 157:90e3acc479a2 210 RCC_APB2PeriphResetCmd(RCC_APB2Periph_SPI1, DISABLE);
mbed_official 157:90e3acc479a2 211 }
mbed_official 157:90e3acc479a2 212 else if (SPIx == SPI2)
mbed_official 157:90e3acc479a2 213 {
mbed_official 157:90e3acc479a2 214 /* Enable SPI2 reset state */
mbed_official 157:90e3acc479a2 215 RCC_APB1PeriphResetCmd(RCC_APB1Periph_SPI2, ENABLE);
mbed_official 157:90e3acc479a2 216 /* Release SPI2 from reset state */
mbed_official 157:90e3acc479a2 217 RCC_APB1PeriphResetCmd(RCC_APB1Periph_SPI2, DISABLE);
mbed_official 157:90e3acc479a2 218 }
mbed_official 157:90e3acc479a2 219 else
mbed_official 157:90e3acc479a2 220 {
mbed_official 157:90e3acc479a2 221 if (SPIx == SPI3)
mbed_official 157:90e3acc479a2 222 {
mbed_official 157:90e3acc479a2 223 /* Enable SPI3 reset state */
mbed_official 157:90e3acc479a2 224 RCC_APB1PeriphResetCmd(RCC_APB1Periph_SPI3, ENABLE);
mbed_official 157:90e3acc479a2 225 /* Release SPI3 from reset state */
mbed_official 157:90e3acc479a2 226 RCC_APB1PeriphResetCmd(RCC_APB1Periph_SPI3, DISABLE);
mbed_official 157:90e3acc479a2 227 }
mbed_official 157:90e3acc479a2 228 }
mbed_official 157:90e3acc479a2 229 }
mbed_official 157:90e3acc479a2 230
mbed_official 157:90e3acc479a2 231 /**
mbed_official 157:90e3acc479a2 232 * @brief Fills each SPI_InitStruct member with its default value.
mbed_official 157:90e3acc479a2 233 * @param SPI_InitStruct: pointer to a SPI_InitTypeDef structure which will be initialized.
mbed_official 157:90e3acc479a2 234 * @retval None
mbed_official 157:90e3acc479a2 235 */
mbed_official 157:90e3acc479a2 236 void SPI_StructInit(SPI_InitTypeDef* SPI_InitStruct)
mbed_official 157:90e3acc479a2 237 {
mbed_official 157:90e3acc479a2 238 /*--------------- Reset SPI init structure parameters values -----------------*/
mbed_official 157:90e3acc479a2 239 /* Initialize the SPI_Direction member */
mbed_official 157:90e3acc479a2 240 SPI_InitStruct->SPI_Direction = SPI_Direction_2Lines_FullDuplex;
mbed_official 157:90e3acc479a2 241 /* Initialize the SPI_Mode member */
mbed_official 157:90e3acc479a2 242 SPI_InitStruct->SPI_Mode = SPI_Mode_Slave;
mbed_official 157:90e3acc479a2 243 /* Initialize the SPI_DataSize member */
mbed_official 157:90e3acc479a2 244 SPI_InitStruct->SPI_DataSize = SPI_DataSize_8b;
mbed_official 157:90e3acc479a2 245 /* Initialize the SPI_CPOL member */
mbed_official 157:90e3acc479a2 246 SPI_InitStruct->SPI_CPOL = SPI_CPOL_Low;
mbed_official 157:90e3acc479a2 247 /* Initialize the SPI_CPHA member */
mbed_official 157:90e3acc479a2 248 SPI_InitStruct->SPI_CPHA = SPI_CPHA_1Edge;
mbed_official 157:90e3acc479a2 249 /* Initialize the SPI_NSS member */
mbed_official 157:90e3acc479a2 250 SPI_InitStruct->SPI_NSS = SPI_NSS_Hard;
mbed_official 157:90e3acc479a2 251 /* Initialize the SPI_BaudRatePrescaler member */
mbed_official 157:90e3acc479a2 252 SPI_InitStruct->SPI_BaudRatePrescaler = SPI_BaudRatePrescaler_2;
mbed_official 157:90e3acc479a2 253 /* Initialize the SPI_FirstBit member */
mbed_official 157:90e3acc479a2 254 SPI_InitStruct->SPI_FirstBit = SPI_FirstBit_MSB;
mbed_official 157:90e3acc479a2 255 /* Initialize the SPI_CRCPolynomial member */
mbed_official 157:90e3acc479a2 256 SPI_InitStruct->SPI_CRCPolynomial = 7;
mbed_official 157:90e3acc479a2 257 }
mbed_official 157:90e3acc479a2 258
mbed_official 157:90e3acc479a2 259 /**
mbed_official 157:90e3acc479a2 260 * @brief Initializes the SPIx peripheral according to the specified
mbed_official 157:90e3acc479a2 261 * parameters in the SPI_InitStruct.
mbed_official 157:90e3acc479a2 262 * @param SPIx: where x can be 1, 2 or 3 to select the SPI peripheral.
mbed_official 157:90e3acc479a2 263 * @param SPI_InitStruct: pointer to a SPI_InitTypeDef structure that
mbed_official 157:90e3acc479a2 264 * contains the configuration information for the specified SPI peripheral.
mbed_official 157:90e3acc479a2 265 * @retval None
mbed_official 157:90e3acc479a2 266 */
mbed_official 157:90e3acc479a2 267 void SPI_Init(SPI_TypeDef* SPIx, SPI_InitTypeDef* SPI_InitStruct)
mbed_official 157:90e3acc479a2 268 {
mbed_official 157:90e3acc479a2 269 uint16_t tmpreg = 0;
mbed_official 157:90e3acc479a2 270
mbed_official 157:90e3acc479a2 271 /* check the parameters */
mbed_official 157:90e3acc479a2 272 assert_param(IS_SPI_ALL_PERIPH(SPIx));
mbed_official 157:90e3acc479a2 273
mbed_official 157:90e3acc479a2 274 /* Check the SPI parameters */
mbed_official 157:90e3acc479a2 275 assert_param(IS_SPI_DIRECTION_MODE(SPI_InitStruct->SPI_Direction));
mbed_official 157:90e3acc479a2 276 assert_param(IS_SPI_MODE(SPI_InitStruct->SPI_Mode));
mbed_official 157:90e3acc479a2 277 assert_param(IS_SPI_DATA_SIZE(SPI_InitStruct->SPI_DataSize));
mbed_official 157:90e3acc479a2 278 assert_param(IS_SPI_CPOL(SPI_InitStruct->SPI_CPOL));
mbed_official 157:90e3acc479a2 279 assert_param(IS_SPI_CPHA(SPI_InitStruct->SPI_CPHA));
mbed_official 157:90e3acc479a2 280 assert_param(IS_SPI_NSS(SPI_InitStruct->SPI_NSS));
mbed_official 157:90e3acc479a2 281 assert_param(IS_SPI_BAUDRATE_PRESCALER(SPI_InitStruct->SPI_BaudRatePrescaler));
mbed_official 157:90e3acc479a2 282 assert_param(IS_SPI_FIRST_BIT(SPI_InitStruct->SPI_FirstBit));
mbed_official 157:90e3acc479a2 283 assert_param(IS_SPI_CRC_POLYNOMIAL(SPI_InitStruct->SPI_CRCPolynomial));
mbed_official 157:90e3acc479a2 284
mbed_official 157:90e3acc479a2 285 /* Configuring the SPI in master mode */
mbed_official 157:90e3acc479a2 286 if(SPI_InitStruct->SPI_Mode == SPI_Mode_Master)
mbed_official 157:90e3acc479a2 287 {
mbed_official 157:90e3acc479a2 288 /*---------------------------- SPIx CR1 Configuration ------------------------*/
mbed_official 157:90e3acc479a2 289 /* Get the SPIx CR1 value */
mbed_official 157:90e3acc479a2 290 tmpreg = SPIx->CR1;
mbed_official 157:90e3acc479a2 291 /* Clear BIDIMode, BIDIOE, RxONLY, SSM, SSI, LSBFirst, BR, MSTR, CPOL and CPHA bits */
mbed_official 157:90e3acc479a2 292 tmpreg &= CR1_CLEAR_MASK;
mbed_official 157:90e3acc479a2 293 /* Configure SPIx: direction, NSS management, first transmitted bit, BaudRate prescaler
mbed_official 157:90e3acc479a2 294 master/slave mode, CPOL and CPHA */
mbed_official 157:90e3acc479a2 295 /* Set BIDImode, BIDIOE and RxONLY bits according to SPI_Direction value */
mbed_official 157:90e3acc479a2 296 /* Set SSM, SSI and MSTR bits according to SPI_Mode and SPI_NSS values */
mbed_official 157:90e3acc479a2 297 /* Set LSBFirst bit according to SPI_FirstBit value */
mbed_official 157:90e3acc479a2 298 /* Set BR bits according to SPI_BaudRatePrescaler value */
mbed_official 157:90e3acc479a2 299 /* Set CPOL bit according to SPI_CPOL value */
mbed_official 157:90e3acc479a2 300 /* Set CPHA bit according to SPI_CPHA value */
mbed_official 157:90e3acc479a2 301 tmpreg |= (uint16_t)((uint16_t)(SPI_InitStruct->SPI_Direction | SPI_InitStruct->SPI_Mode) |
mbed_official 157:90e3acc479a2 302 (uint16_t)((uint16_t)(SPI_InitStruct->SPI_CPOL | SPI_InitStruct->SPI_CPHA) |
mbed_official 157:90e3acc479a2 303 (uint16_t)((uint16_t)(SPI_InitStruct->SPI_NSS | SPI_InitStruct->SPI_BaudRatePrescaler) |
mbed_official 157:90e3acc479a2 304 SPI_InitStruct->SPI_FirstBit)));
mbed_official 157:90e3acc479a2 305 /* Write to SPIx CR1 */
mbed_official 157:90e3acc479a2 306 SPIx->CR1 = tmpreg;
mbed_official 157:90e3acc479a2 307 /*-------------------------Data Size Configuration -----------------------*/
mbed_official 157:90e3acc479a2 308 /* Get the SPIx CR2 value */
mbed_official 157:90e3acc479a2 309 tmpreg = SPIx->CR2;
mbed_official 157:90e3acc479a2 310 /* Clear DS[3:0] bits */
mbed_official 157:90e3acc479a2 311 tmpreg &= (uint16_t)~SPI_CR2_DS;
mbed_official 157:90e3acc479a2 312 /* Configure SPIx: Data Size */
mbed_official 157:90e3acc479a2 313 tmpreg |= (uint16_t)(SPI_InitStruct->SPI_DataSize);
mbed_official 157:90e3acc479a2 314 /* Write to SPIx CR2 */
mbed_official 157:90e3acc479a2 315 SPIx->CR2 = tmpreg;
mbed_official 157:90e3acc479a2 316 }
mbed_official 157:90e3acc479a2 317 /* Configuring the SPI in slave mode */
mbed_official 157:90e3acc479a2 318 else
mbed_official 157:90e3acc479a2 319 {
mbed_official 157:90e3acc479a2 320 /*---------------------------- Data size Configuration -----------------------*/
mbed_official 157:90e3acc479a2 321 /* Get the SPIx CR2 value */
mbed_official 157:90e3acc479a2 322 tmpreg = SPIx->CR2;
mbed_official 157:90e3acc479a2 323 /* Clear DS[3:0] bits */
mbed_official 157:90e3acc479a2 324 tmpreg &= (uint16_t)~SPI_CR2_DS;
mbed_official 157:90e3acc479a2 325 /* Configure SPIx: Data Size */
mbed_official 157:90e3acc479a2 326 tmpreg |= (uint16_t)(SPI_InitStruct->SPI_DataSize);
mbed_official 157:90e3acc479a2 327 /* Write to SPIx CR2 */
mbed_official 157:90e3acc479a2 328 SPIx->CR2 = tmpreg;
mbed_official 157:90e3acc479a2 329 /*---------------------------- SPIx CR1 Configuration ------------------------*/
mbed_official 157:90e3acc479a2 330 /* Get the SPIx CR1 value */
mbed_official 157:90e3acc479a2 331 tmpreg = SPIx->CR1;
mbed_official 157:90e3acc479a2 332 /* Clear BIDIMode, BIDIOE, RxONLY, SSM, SSI, LSBFirst, BR, MSTR, CPOL and CPHA bits */
mbed_official 157:90e3acc479a2 333 tmpreg &= CR1_CLEAR_MASK;
mbed_official 157:90e3acc479a2 334 /* Configure SPIx: direction, NSS management, first transmitted bit, BaudRate prescaler
mbed_official 157:90e3acc479a2 335 master/salve mode, CPOL and CPHA */
mbed_official 157:90e3acc479a2 336 /* Set BIDImode, BIDIOE and RxONLY bits according to SPI_Direction value */
mbed_official 157:90e3acc479a2 337 /* Set SSM, SSI and MSTR bits according to SPI_Mode and SPI_NSS values */
mbed_official 157:90e3acc479a2 338 /* Set LSBFirst bit according to SPI_FirstBit value */
mbed_official 157:90e3acc479a2 339 /* Set BR bits according to SPI_BaudRatePrescaler value */
mbed_official 157:90e3acc479a2 340 /* Set CPOL bit according to SPI_CPOL value */
mbed_official 157:90e3acc479a2 341 /* Set CPHA bit according to SPI_CPHA value */
mbed_official 157:90e3acc479a2 342 tmpreg |= (uint16_t)((uint16_t)(SPI_InitStruct->SPI_Direction | SPI_InitStruct->SPI_Mode) |
mbed_official 157:90e3acc479a2 343 (uint16_t)((uint16_t)(SPI_InitStruct->SPI_CPOL | SPI_InitStruct->SPI_CPHA) |
mbed_official 157:90e3acc479a2 344 (uint16_t)((uint16_t)(SPI_InitStruct->SPI_NSS | SPI_InitStruct->SPI_BaudRatePrescaler) |
mbed_official 157:90e3acc479a2 345 SPI_InitStruct->SPI_FirstBit)));
mbed_official 157:90e3acc479a2 346
mbed_official 157:90e3acc479a2 347 /* Write to SPIx CR1 */
mbed_official 157:90e3acc479a2 348 SPIx->CR1 = tmpreg;
mbed_official 157:90e3acc479a2 349 }
mbed_official 157:90e3acc479a2 350
mbed_official 157:90e3acc479a2 351 /* Activate the SPI mode (Reset I2SMOD bit in I2SCFGR register) */
mbed_official 157:90e3acc479a2 352 SPIx->I2SCFGR &= (uint16_t)~((uint16_t)SPI_I2SCFGR_I2SMOD);
mbed_official 157:90e3acc479a2 353
mbed_official 157:90e3acc479a2 354 /*---------------------------- SPIx CRCPOLY Configuration --------------------*/
mbed_official 157:90e3acc479a2 355 /* Write to SPIx CRCPOLY */
mbed_official 157:90e3acc479a2 356 SPIx->CRCPR = SPI_InitStruct->SPI_CRCPolynomial;
mbed_official 157:90e3acc479a2 357 }
mbed_official 157:90e3acc479a2 358
mbed_official 157:90e3acc479a2 359 /**
mbed_official 157:90e3acc479a2 360 * @brief Fills each I2S_InitStruct member with its default value.
mbed_official 157:90e3acc479a2 361 * @param I2S_InitStruct : pointer to a I2S_InitTypeDef structure which will be initialized.
mbed_official 157:90e3acc479a2 362 * @retval None
mbed_official 157:90e3acc479a2 363 */
mbed_official 157:90e3acc479a2 364 void I2S_StructInit(I2S_InitTypeDef* I2S_InitStruct)
mbed_official 157:90e3acc479a2 365 {
mbed_official 157:90e3acc479a2 366 /*--------------- Reset I2S init structure parameters values -----------------*/
mbed_official 157:90e3acc479a2 367 /* Initialize the I2S_Mode member */
mbed_official 157:90e3acc479a2 368 I2S_InitStruct->I2S_Mode = I2S_Mode_SlaveTx;
mbed_official 157:90e3acc479a2 369
mbed_official 157:90e3acc479a2 370 /* Initialize the I2S_Standard member */
mbed_official 157:90e3acc479a2 371 I2S_InitStruct->I2S_Standard = I2S_Standard_Phillips;
mbed_official 157:90e3acc479a2 372
mbed_official 157:90e3acc479a2 373 /* Initialize the I2S_DataFormat member */
mbed_official 157:90e3acc479a2 374 I2S_InitStruct->I2S_DataFormat = I2S_DataFormat_16b;
mbed_official 157:90e3acc479a2 375
mbed_official 157:90e3acc479a2 376 /* Initialize the I2S_MCLKOutput member */
mbed_official 157:90e3acc479a2 377 I2S_InitStruct->I2S_MCLKOutput = I2S_MCLKOutput_Disable;
mbed_official 157:90e3acc479a2 378
mbed_official 157:90e3acc479a2 379 /* Initialize the I2S_AudioFreq member */
mbed_official 157:90e3acc479a2 380 I2S_InitStruct->I2S_AudioFreq = I2S_AudioFreq_Default;
mbed_official 157:90e3acc479a2 381
mbed_official 157:90e3acc479a2 382 /* Initialize the I2S_CPOL member */
mbed_official 157:90e3acc479a2 383 I2S_InitStruct->I2S_CPOL = I2S_CPOL_Low;
mbed_official 157:90e3acc479a2 384 }
mbed_official 157:90e3acc479a2 385
mbed_official 157:90e3acc479a2 386 /**
mbed_official 157:90e3acc479a2 387 * @brief Initializes the SPIx peripheral according to the specified
mbed_official 157:90e3acc479a2 388 * parameters in the I2S_InitStruct.
mbed_official 157:90e3acc479a2 389 * @param SPIx:To select the SPIx peripheral, where x can be: 2 or 3
mbed_official 157:90e3acc479a2 390 * in I2S mode.
mbed_official 157:90e3acc479a2 391 * @param I2S_InitStruct: pointer to an I2S_InitTypeDef structure that
mbed_official 157:90e3acc479a2 392 * contains the configuration information for the specified SPI peripheral
mbed_official 157:90e3acc479a2 393 * configured in I2S mode.
mbed_official 157:90e3acc479a2 394 * @note
mbed_official 157:90e3acc479a2 395 * The function calculates the optimal prescaler needed to obtain the most
mbed_official 157:90e3acc479a2 396 * accurate audio frequency (depending on the I2S clock source, the PLL values
mbed_official 157:90e3acc479a2 397 * and the product configuration). But in case the prescaler value is greater
mbed_official 157:90e3acc479a2 398 * than 511, the default value (0x02) will be configured instead.
mbed_official 157:90e3acc479a2 399 * @retval None
mbed_official 157:90e3acc479a2 400 */
mbed_official 157:90e3acc479a2 401 void I2S_Init(SPI_TypeDef* SPIx, I2S_InitTypeDef* I2S_InitStruct)
mbed_official 157:90e3acc479a2 402 {
mbed_official 157:90e3acc479a2 403 uint16_t tmpreg = 0, i2sdiv = 2, i2sodd = 0, packetlength = 1;
mbed_official 157:90e3acc479a2 404 uint32_t tmp = 0;
mbed_official 157:90e3acc479a2 405 RCC_ClocksTypeDef RCC_Clocks;
mbed_official 157:90e3acc479a2 406 uint32_t sourceclock = 0;
mbed_official 157:90e3acc479a2 407
mbed_official 157:90e3acc479a2 408 /* Check the I2S parameters */
mbed_official 157:90e3acc479a2 409 assert_param(IS_SPI_23_PERIPH(SPIx));
mbed_official 157:90e3acc479a2 410 assert_param(IS_I2S_MODE(I2S_InitStruct->I2S_Mode));
mbed_official 157:90e3acc479a2 411 assert_param(IS_I2S_STANDARD(I2S_InitStruct->I2S_Standard));
mbed_official 157:90e3acc479a2 412 assert_param(IS_I2S_DATA_FORMAT(I2S_InitStruct->I2S_DataFormat));
mbed_official 157:90e3acc479a2 413 assert_param(IS_I2S_MCLK_OUTPUT(I2S_InitStruct->I2S_MCLKOutput));
mbed_official 157:90e3acc479a2 414 assert_param(IS_I2S_AUDIO_FREQ(I2S_InitStruct->I2S_AudioFreq));
mbed_official 157:90e3acc479a2 415 assert_param(IS_I2S_CPOL(I2S_InitStruct->I2S_CPOL));
mbed_official 157:90e3acc479a2 416
mbed_official 157:90e3acc479a2 417 /*----------------------- SPIx I2SCFGR & I2SPR Configuration -----------------*/
mbed_official 157:90e3acc479a2 418 /* Clear I2SMOD, I2SE, I2SCFG, PCMSYNC, I2SSTD, CKPOL, DATLEN and CHLEN bits */
mbed_official 157:90e3acc479a2 419 SPIx->I2SCFGR &= I2SCFGR_CLEAR_MASK;
mbed_official 157:90e3acc479a2 420 SPIx->I2SPR = 0x0002;
mbed_official 157:90e3acc479a2 421
mbed_official 157:90e3acc479a2 422 /* Get the I2SCFGR register value */
mbed_official 157:90e3acc479a2 423 tmpreg = SPIx->I2SCFGR;
mbed_official 157:90e3acc479a2 424
mbed_official 157:90e3acc479a2 425 /* If the default value has to be written, reinitialize i2sdiv and i2sodd*/
mbed_official 157:90e3acc479a2 426 if(I2S_InitStruct->I2S_AudioFreq == I2S_AudioFreq_Default)
mbed_official 157:90e3acc479a2 427 {
mbed_official 157:90e3acc479a2 428 i2sodd = (uint16_t)0;
mbed_official 157:90e3acc479a2 429 i2sdiv = (uint16_t)2;
mbed_official 157:90e3acc479a2 430 }
mbed_official 157:90e3acc479a2 431 /* If the requested audio frequency is not the default, compute the prescaler */
mbed_official 157:90e3acc479a2 432 else
mbed_official 157:90e3acc479a2 433 {
mbed_official 157:90e3acc479a2 434 /* Check the frame length (For the Prescaler computing) */
mbed_official 157:90e3acc479a2 435 if(I2S_InitStruct->I2S_DataFormat == I2S_DataFormat_16b)
mbed_official 157:90e3acc479a2 436 {
mbed_official 157:90e3acc479a2 437 /* Packet length is 16 bits */
mbed_official 157:90e3acc479a2 438 packetlength = 1;
mbed_official 157:90e3acc479a2 439 }
mbed_official 157:90e3acc479a2 440 else
mbed_official 157:90e3acc479a2 441 {
mbed_official 157:90e3acc479a2 442 /* Packet length is 32 bits */
mbed_official 157:90e3acc479a2 443 packetlength = 2;
mbed_official 157:90e3acc479a2 444 }
mbed_official 157:90e3acc479a2 445
mbed_official 157:90e3acc479a2 446 /* I2S Clock source is System clock: Get System Clock frequency */
mbed_official 157:90e3acc479a2 447 RCC_GetClocksFreq(&RCC_Clocks);
mbed_official 157:90e3acc479a2 448
mbed_official 157:90e3acc479a2 449 /* Get the source clock value: based on System Clock value */
mbed_official 157:90e3acc479a2 450 sourceclock = RCC_Clocks.SYSCLK_Frequency;
mbed_official 157:90e3acc479a2 451
mbed_official 157:90e3acc479a2 452 /* Compute the Real divider depending on the MCLK output state with a floating point */
mbed_official 157:90e3acc479a2 453 if(I2S_InitStruct->I2S_MCLKOutput == I2S_MCLKOutput_Enable)
mbed_official 157:90e3acc479a2 454 {
mbed_official 157:90e3acc479a2 455 /* MCLK output is enabled */
mbed_official 157:90e3acc479a2 456 tmp = (uint16_t)(((((sourceclock / 256) * 10) / I2S_InitStruct->I2S_AudioFreq)) + 5);
mbed_official 157:90e3acc479a2 457 }
mbed_official 157:90e3acc479a2 458 else
mbed_official 157:90e3acc479a2 459 {
mbed_official 157:90e3acc479a2 460 /* MCLK output is disabled */
mbed_official 157:90e3acc479a2 461 tmp = (uint16_t)(((((sourceclock / (32 * packetlength)) *10 ) / I2S_InitStruct->I2S_AudioFreq)) + 5);
mbed_official 157:90e3acc479a2 462 }
mbed_official 157:90e3acc479a2 463
mbed_official 157:90e3acc479a2 464 /* Remove the floating point */
mbed_official 157:90e3acc479a2 465 tmp = tmp / 10;
mbed_official 157:90e3acc479a2 466
mbed_official 157:90e3acc479a2 467 /* Check the parity of the divider */
mbed_official 157:90e3acc479a2 468 i2sodd = (uint16_t)(tmp & (uint16_t)0x0001);
mbed_official 157:90e3acc479a2 469
mbed_official 157:90e3acc479a2 470 /* Compute the i2sdiv prescaler */
mbed_official 157:90e3acc479a2 471 i2sdiv = (uint16_t)((tmp - i2sodd) / 2);
mbed_official 157:90e3acc479a2 472
mbed_official 157:90e3acc479a2 473 /* Get the Mask for the Odd bit (SPI_I2SPR[8]) register */
mbed_official 157:90e3acc479a2 474 i2sodd = (uint16_t) (i2sodd << 8);
mbed_official 157:90e3acc479a2 475 }
mbed_official 157:90e3acc479a2 476
mbed_official 157:90e3acc479a2 477 /* Test if the divider is 1 or 0 or greater than 0xFF */
mbed_official 157:90e3acc479a2 478 if ((i2sdiv < 2) || (i2sdiv > 0xFF))
mbed_official 157:90e3acc479a2 479 {
mbed_official 157:90e3acc479a2 480 /* Set the default values */
mbed_official 157:90e3acc479a2 481 i2sdiv = 2;
mbed_official 157:90e3acc479a2 482 i2sodd = 0;
mbed_official 157:90e3acc479a2 483 }
mbed_official 157:90e3acc479a2 484
mbed_official 157:90e3acc479a2 485 /* Write to SPIx I2SPR register the computed value */
mbed_official 157:90e3acc479a2 486 SPIx->I2SPR = (uint16_t)(i2sdiv | (uint16_t)(i2sodd | (uint16_t)I2S_InitStruct->I2S_MCLKOutput));
mbed_official 157:90e3acc479a2 487
mbed_official 157:90e3acc479a2 488 /* Configure the I2S with the SPI_InitStruct values */
mbed_official 157:90e3acc479a2 489 tmpreg |= (uint16_t)((uint16_t)(SPI_I2SCFGR_I2SMOD | I2S_InitStruct->I2S_Mode) | \
mbed_official 157:90e3acc479a2 490 (uint16_t)((uint16_t)((uint16_t)(I2S_InitStruct->I2S_Standard |I2S_InitStruct->I2S_DataFormat) |\
mbed_official 157:90e3acc479a2 491 I2S_InitStruct->I2S_CPOL)));
mbed_official 157:90e3acc479a2 492
mbed_official 157:90e3acc479a2 493 /* Write to SPIx I2SCFGR */
mbed_official 157:90e3acc479a2 494 SPIx->I2SCFGR = tmpreg;
mbed_official 157:90e3acc479a2 495 }
mbed_official 157:90e3acc479a2 496
mbed_official 157:90e3acc479a2 497 /**
mbed_official 157:90e3acc479a2 498 * @brief Enables or disables the specified SPI peripheral.
mbed_official 157:90e3acc479a2 499 * @param SPIx: where x can be 1, 2 or 3 to select the SPI peripheral.
mbed_official 157:90e3acc479a2 500 * @param NewState: new state of the SPIx peripheral.
mbed_official 157:90e3acc479a2 501 * This parameter can be: ENABLE or DISABLE.
mbed_official 157:90e3acc479a2 502 * @retval None
mbed_official 157:90e3acc479a2 503 */
mbed_official 157:90e3acc479a2 504 void SPI_Cmd(SPI_TypeDef* SPIx, FunctionalState NewState)
mbed_official 157:90e3acc479a2 505 {
mbed_official 157:90e3acc479a2 506 /* Check the parameters */
mbed_official 157:90e3acc479a2 507 assert_param(IS_SPI_ALL_PERIPH(SPIx));
mbed_official 157:90e3acc479a2 508 assert_param(IS_FUNCTIONAL_STATE(NewState));
mbed_official 157:90e3acc479a2 509
mbed_official 157:90e3acc479a2 510 if (NewState != DISABLE)
mbed_official 157:90e3acc479a2 511 {
mbed_official 157:90e3acc479a2 512 /* Enable the selected SPI peripheral */
mbed_official 157:90e3acc479a2 513 SPIx->CR1 |= SPI_CR1_SPE;
mbed_official 157:90e3acc479a2 514 }
mbed_official 157:90e3acc479a2 515 else
mbed_official 157:90e3acc479a2 516 {
mbed_official 157:90e3acc479a2 517 /* Disable the selected SPI peripheral */
mbed_official 157:90e3acc479a2 518 SPIx->CR1 &= (uint16_t)~((uint16_t)SPI_CR1_SPE);
mbed_official 157:90e3acc479a2 519 }
mbed_official 157:90e3acc479a2 520 }
mbed_official 157:90e3acc479a2 521
mbed_official 157:90e3acc479a2 522 /**
mbed_official 157:90e3acc479a2 523 * @brief Enables or disables the TI Mode.
mbed_official 157:90e3acc479a2 524 * @note This function can be called only after the SPI_Init() function has
mbed_official 157:90e3acc479a2 525 * been called.
mbed_official 157:90e3acc479a2 526 * @note When TI mode is selected, the control bits SSM, SSI, CPOL and CPHA
mbed_official 157:90e3acc479a2 527 * are not taken into consideration and are configured by hardware
mbed_official 157:90e3acc479a2 528 * respectively to the TI mode requirements.
mbed_official 157:90e3acc479a2 529 * @param SPIx: where x can be 1, 2 or 3 to select the SPI peripheral.
mbed_official 157:90e3acc479a2 530 * @param NewState: new state of the selected SPI TI communication mode.
mbed_official 157:90e3acc479a2 531 * This parameter can be: ENABLE or DISABLE.
mbed_official 157:90e3acc479a2 532 * @retval None
mbed_official 157:90e3acc479a2 533 */
mbed_official 157:90e3acc479a2 534 void SPI_TIModeCmd(SPI_TypeDef* SPIx, FunctionalState NewState)
mbed_official 157:90e3acc479a2 535 {
mbed_official 157:90e3acc479a2 536 /* Check the parameters */
mbed_official 157:90e3acc479a2 537 assert_param(IS_SPI_ALL_PERIPH(SPIx));
mbed_official 157:90e3acc479a2 538 assert_param(IS_FUNCTIONAL_STATE(NewState));
mbed_official 157:90e3acc479a2 539
mbed_official 157:90e3acc479a2 540 if (NewState != DISABLE)
mbed_official 157:90e3acc479a2 541 {
mbed_official 157:90e3acc479a2 542 /* Enable the TI mode for the selected SPI peripheral */
mbed_official 157:90e3acc479a2 543 SPIx->CR2 |= SPI_CR2_FRF;
mbed_official 157:90e3acc479a2 544 }
mbed_official 157:90e3acc479a2 545 else
mbed_official 157:90e3acc479a2 546 {
mbed_official 157:90e3acc479a2 547 /* Disable the TI mode for the selected SPI peripheral */
mbed_official 157:90e3acc479a2 548 SPIx->CR2 &= (uint16_t)~((uint16_t)SPI_CR2_FRF);
mbed_official 157:90e3acc479a2 549 }
mbed_official 157:90e3acc479a2 550 }
mbed_official 157:90e3acc479a2 551
mbed_official 157:90e3acc479a2 552 /**
mbed_official 157:90e3acc479a2 553 * @brief Enables or disables the specified SPI peripheral (in I2S mode).
mbed_official 157:90e3acc479a2 554 * @param SPIx:To select the SPIx peripheral, where x can be: 2 or 3 in
mbed_official 157:90e3acc479a2 555 * I2S mode or I2Sxext for I2S full duplex mode.
mbed_official 157:90e3acc479a2 556 * @param NewState: new state of the SPIx peripheral.
mbed_official 157:90e3acc479a2 557 * This parameter can be: ENABLE or DISABLE.
mbed_official 157:90e3acc479a2 558 * @retval None
mbed_official 157:90e3acc479a2 559 */
mbed_official 157:90e3acc479a2 560 void I2S_Cmd(SPI_TypeDef* SPIx, FunctionalState NewState)
mbed_official 157:90e3acc479a2 561 {
mbed_official 157:90e3acc479a2 562 /* Check the parameters */
mbed_official 157:90e3acc479a2 563 assert_param(IS_SPI_23_PERIPH_EXT(SPIx));
mbed_official 157:90e3acc479a2 564 assert_param(IS_FUNCTIONAL_STATE(NewState));
mbed_official 157:90e3acc479a2 565 if (NewState != DISABLE)
mbed_official 157:90e3acc479a2 566 {
mbed_official 157:90e3acc479a2 567 /* Enable the selected SPI peripheral in I2S mode */
mbed_official 157:90e3acc479a2 568 SPIx->I2SCFGR |= SPI_I2SCFGR_I2SE;
mbed_official 157:90e3acc479a2 569 }
mbed_official 157:90e3acc479a2 570 else
mbed_official 157:90e3acc479a2 571 {
mbed_official 157:90e3acc479a2 572 /* Disable the selected SPI peripheral in I2S mode */
mbed_official 157:90e3acc479a2 573 SPIx->I2SCFGR &= (uint16_t)~((uint16_t)SPI_I2SCFGR_I2SE);
mbed_official 157:90e3acc479a2 574 }
mbed_official 157:90e3acc479a2 575 }
mbed_official 157:90e3acc479a2 576
mbed_official 157:90e3acc479a2 577 /**
mbed_official 157:90e3acc479a2 578 * @brief Configures the data size for the selected SPI.
mbed_official 157:90e3acc479a2 579 * @param SPIx: where x can be 1, 2 or 3 to select the SPI peripheral.
mbed_official 157:90e3acc479a2 580 * @param SPI_DataSize: specifies the SPI data size.
mbed_official 157:90e3acc479a2 581 * For the SPIx peripheral this parameter can be one of the following values:
mbed_official 157:90e3acc479a2 582 * @arg SPI_DataSize_4b: Set data size to 4 bits
mbed_official 157:90e3acc479a2 583 * @arg SPI_DataSize_5b: Set data size to 5 bits
mbed_official 157:90e3acc479a2 584 * @arg SPI_DataSize_6b: Set data size to 6 bits
mbed_official 157:90e3acc479a2 585 * @arg SPI_DataSize_7b: Set data size to 7 bits
mbed_official 157:90e3acc479a2 586 * @arg SPI_DataSize_8b: Set data size to 8 bits
mbed_official 157:90e3acc479a2 587 * @arg SPI_DataSize_9b: Set data size to 9 bits
mbed_official 157:90e3acc479a2 588 * @arg SPI_DataSize_10b: Set data size to 10 bits
mbed_official 157:90e3acc479a2 589 * @arg SPI_DataSize_11b: Set data size to 11 bits
mbed_official 157:90e3acc479a2 590 * @arg SPI_DataSize_12b: Set data size to 12 bits
mbed_official 157:90e3acc479a2 591 * @arg SPI_DataSize_13b: Set data size to 13 bits
mbed_official 157:90e3acc479a2 592 * @arg SPI_DataSize_14b: Set data size to 14 bits
mbed_official 157:90e3acc479a2 593 * @arg SPI_DataSize_15b: Set data size to 15 bits
mbed_official 157:90e3acc479a2 594 * @arg SPI_DataSize_16b: Set data size to 16 bits
mbed_official 157:90e3acc479a2 595 * @retval None
mbed_official 157:90e3acc479a2 596 */
mbed_official 157:90e3acc479a2 597 void SPI_DataSizeConfig(SPI_TypeDef* SPIx, uint16_t SPI_DataSize)
mbed_official 157:90e3acc479a2 598 {
mbed_official 157:90e3acc479a2 599 uint16_t tmpreg = 0;
mbed_official 157:90e3acc479a2 600
mbed_official 157:90e3acc479a2 601 /* Check the parameters */
mbed_official 157:90e3acc479a2 602 assert_param(IS_SPI_ALL_PERIPH(SPIx));
mbed_official 157:90e3acc479a2 603 assert_param(IS_SPI_DATA_SIZE(SPI_DataSize));
mbed_official 157:90e3acc479a2 604 /* Read the CR2 register */
mbed_official 157:90e3acc479a2 605 tmpreg = SPIx->CR2;
mbed_official 157:90e3acc479a2 606 /* Clear DS[3:0] bits */
mbed_official 157:90e3acc479a2 607 tmpreg &= (uint16_t)~SPI_CR2_DS;
mbed_official 157:90e3acc479a2 608 /* Set new DS[3:0] bits value */
mbed_official 157:90e3acc479a2 609 tmpreg |= SPI_DataSize;
mbed_official 157:90e3acc479a2 610 SPIx->CR2 = tmpreg;
mbed_official 157:90e3acc479a2 611 }
mbed_official 157:90e3acc479a2 612
mbed_official 157:90e3acc479a2 613 /**
mbed_official 157:90e3acc479a2 614 * @brief Configures the FIFO reception threshold for the selected SPI.
mbed_official 157:90e3acc479a2 615 * @param SPIx: where x can be 1, 2 or 3 to select the SPI peripheral.
mbed_official 157:90e3acc479a2 616 * @param SPI_RxFIFOThreshold: specifies the FIFO reception threshold.
mbed_official 157:90e3acc479a2 617 * This parameter can be one of the following values:
mbed_official 157:90e3acc479a2 618 * @arg SPI_RxFIFOThreshold_HF: RXNE event is generated if the FIFO
mbed_official 157:90e3acc479a2 619 * level is greater or equal to 1/2.
mbed_official 157:90e3acc479a2 620 * @arg SPI_RxFIFOThreshold_QF: RXNE event is generated if the FIFO
mbed_official 157:90e3acc479a2 621 * level is greater or equal to 1/4.
mbed_official 157:90e3acc479a2 622 * @retval None
mbed_official 157:90e3acc479a2 623 */
mbed_official 157:90e3acc479a2 624 void SPI_RxFIFOThresholdConfig(SPI_TypeDef* SPIx, uint16_t SPI_RxFIFOThreshold)
mbed_official 157:90e3acc479a2 625 {
mbed_official 157:90e3acc479a2 626 /* Check the parameters */
mbed_official 157:90e3acc479a2 627 assert_param(IS_SPI_ALL_PERIPH(SPIx));
mbed_official 157:90e3acc479a2 628 assert_param(IS_SPI_RX_FIFO_THRESHOLD(SPI_RxFIFOThreshold));
mbed_official 157:90e3acc479a2 629
mbed_official 157:90e3acc479a2 630 /* Clear FRXTH bit */
mbed_official 157:90e3acc479a2 631 SPIx->CR2 &= (uint16_t)~((uint16_t)SPI_CR2_FRXTH);
mbed_official 157:90e3acc479a2 632
mbed_official 157:90e3acc479a2 633 /* Set new FRXTH bit value */
mbed_official 157:90e3acc479a2 634 SPIx->CR2 |= SPI_RxFIFOThreshold;
mbed_official 157:90e3acc479a2 635 }
mbed_official 157:90e3acc479a2 636
mbed_official 157:90e3acc479a2 637 /**
mbed_official 157:90e3acc479a2 638 * @brief Selects the data transfer direction in bidirectional mode for the specified SPI.
mbed_official 157:90e3acc479a2 639 * @param SPIx: where x can be 1, 2 or 3 to select the SPI peripheral.
mbed_official 157:90e3acc479a2 640 * @param SPI_Direction: specifies the data transfer direction in bidirectional mode.
mbed_official 157:90e3acc479a2 641 * This parameter can be one of the following values:
mbed_official 157:90e3acc479a2 642 * @arg SPI_Direction_Tx: Selects Tx transmission direction
mbed_official 157:90e3acc479a2 643 * @arg SPI_Direction_Rx: Selects Rx receive direction
mbed_official 157:90e3acc479a2 644 * @retval None
mbed_official 157:90e3acc479a2 645 */
mbed_official 157:90e3acc479a2 646 void SPI_BiDirectionalLineConfig(SPI_TypeDef* SPIx, uint16_t SPI_Direction)
mbed_official 157:90e3acc479a2 647 {
mbed_official 157:90e3acc479a2 648 /* Check the parameters */
mbed_official 157:90e3acc479a2 649 assert_param(IS_SPI_ALL_PERIPH(SPIx));
mbed_official 157:90e3acc479a2 650 assert_param(IS_SPI_DIRECTION(SPI_Direction));
mbed_official 157:90e3acc479a2 651 if (SPI_Direction == SPI_Direction_Tx)
mbed_official 157:90e3acc479a2 652 {
mbed_official 157:90e3acc479a2 653 /* Set the Tx only mode */
mbed_official 157:90e3acc479a2 654 SPIx->CR1 |= SPI_Direction_Tx;
mbed_official 157:90e3acc479a2 655 }
mbed_official 157:90e3acc479a2 656 else
mbed_official 157:90e3acc479a2 657 {
mbed_official 157:90e3acc479a2 658 /* Set the Rx only mode */
mbed_official 157:90e3acc479a2 659 SPIx->CR1 &= SPI_Direction_Rx;
mbed_official 157:90e3acc479a2 660 }
mbed_official 157:90e3acc479a2 661 }
mbed_official 157:90e3acc479a2 662
mbed_official 157:90e3acc479a2 663 /**
mbed_official 157:90e3acc479a2 664 * @brief Configures internally by software the NSS pin for the selected SPI.
mbed_official 157:90e3acc479a2 665 * @note This function can be called only after the SPI_Init() function has
mbed_official 157:90e3acc479a2 666 * been called.
mbed_official 157:90e3acc479a2 667 * @param SPIx: where x can be 1, 2 or 3 to select the SPI peripheral.
mbed_official 157:90e3acc479a2 668 * @param SPI_NSSInternalSoft: specifies the SPI NSS internal state.
mbed_official 157:90e3acc479a2 669 * This parameter can be one of the following values:
mbed_official 157:90e3acc479a2 670 * @arg SPI_NSSInternalSoft_Set: Set NSS pin internally
mbed_official 157:90e3acc479a2 671 * @arg SPI_NSSInternalSoft_Reset: Reset NSS pin internally
mbed_official 157:90e3acc479a2 672 * @retval None
mbed_official 157:90e3acc479a2 673 */
mbed_official 157:90e3acc479a2 674 void SPI_NSSInternalSoftwareConfig(SPI_TypeDef* SPIx, uint16_t SPI_NSSInternalSoft)
mbed_official 157:90e3acc479a2 675 {
mbed_official 157:90e3acc479a2 676 /* Check the parameters */
mbed_official 157:90e3acc479a2 677 assert_param(IS_SPI_ALL_PERIPH(SPIx));
mbed_official 157:90e3acc479a2 678 assert_param(IS_SPI_NSS_INTERNAL(SPI_NSSInternalSoft));
mbed_official 157:90e3acc479a2 679
mbed_official 157:90e3acc479a2 680 if (SPI_NSSInternalSoft != SPI_NSSInternalSoft_Reset)
mbed_official 157:90e3acc479a2 681 {
mbed_official 157:90e3acc479a2 682 /* Set NSS pin internally by software */
mbed_official 157:90e3acc479a2 683 SPIx->CR1 |= SPI_NSSInternalSoft_Set;
mbed_official 157:90e3acc479a2 684 }
mbed_official 157:90e3acc479a2 685 else
mbed_official 157:90e3acc479a2 686 {
mbed_official 157:90e3acc479a2 687 /* Reset NSS pin internally by software */
mbed_official 157:90e3acc479a2 688 SPIx->CR1 &= SPI_NSSInternalSoft_Reset;
mbed_official 157:90e3acc479a2 689 }
mbed_official 157:90e3acc479a2 690 }
mbed_official 157:90e3acc479a2 691
mbed_official 157:90e3acc479a2 692 /**
mbed_official 157:90e3acc479a2 693 * @brief Configures the full duplex mode for the I2Sx peripheral using its
mbed_official 157:90e3acc479a2 694 * extension I2Sxext according to the specified parameters in the
mbed_official 157:90e3acc479a2 695 * I2S_InitStruct.
mbed_official 157:90e3acc479a2 696 * @param I2Sxext: where x can be 2 or 3 to select the I2S peripheral extension block.
mbed_official 157:90e3acc479a2 697 * @param I2S_InitStruct: pointer to an I2S_InitTypeDef structure that
mbed_official 157:90e3acc479a2 698 * contains the configuration information for the specified I2S peripheral
mbed_official 157:90e3acc479a2 699 * extension.
mbed_official 157:90e3acc479a2 700 *
mbed_official 157:90e3acc479a2 701 * @note The structure pointed by I2S_InitStruct parameter should be the same
mbed_official 157:90e3acc479a2 702 * used for the master I2S peripheral. In this case, if the master is
mbed_official 157:90e3acc479a2 703 * configured as transmitter, the slave will be receiver and vice versa.
mbed_official 157:90e3acc479a2 704 * Or you can force a different mode by modifying the field I2S_Mode to the
mbed_official 157:90e3acc479a2 705 * value I2S_SlaveRx or I2S_SlaveTx indepedently of the master configuration.
mbed_official 157:90e3acc479a2 706 *
mbed_official 157:90e3acc479a2 707 * @note The I2S full duplex extension can be configured in slave mode only.
mbed_official 157:90e3acc479a2 708 *
mbed_official 157:90e3acc479a2 709 * @retval None
mbed_official 157:90e3acc479a2 710 */
mbed_official 157:90e3acc479a2 711 void I2S_FullDuplexConfig(SPI_TypeDef* I2Sxext, I2S_InitTypeDef* I2S_InitStruct)
mbed_official 157:90e3acc479a2 712 {
mbed_official 157:90e3acc479a2 713 uint16_t tmpreg = 0, tmp = 0;
mbed_official 157:90e3acc479a2 714
mbed_official 157:90e3acc479a2 715 /* Check the I2S parameters */
mbed_official 157:90e3acc479a2 716 assert_param(IS_I2S_EXT_PERIPH(I2Sxext));
mbed_official 157:90e3acc479a2 717 assert_param(IS_I2S_MODE(I2S_InitStruct->I2S_Mode));
mbed_official 157:90e3acc479a2 718 assert_param(IS_I2S_STANDARD(I2S_InitStruct->I2S_Standard));
mbed_official 157:90e3acc479a2 719 assert_param(IS_I2S_DATA_FORMAT(I2S_InitStruct->I2S_DataFormat));
mbed_official 157:90e3acc479a2 720 assert_param(IS_I2S_CPOL(I2S_InitStruct->I2S_CPOL));
mbed_official 157:90e3acc479a2 721
mbed_official 157:90e3acc479a2 722 /*----------------------- SPIx I2SCFGR & I2SPR Configuration -----------------*/
mbed_official 157:90e3acc479a2 723 /* Clear I2SMOD, I2SE, I2SCFG, PCMSYNC, I2SSTD, CKPOL, DATLEN and CHLEN bits */
mbed_official 157:90e3acc479a2 724 I2Sxext->I2SCFGR &= I2SCFGR_CLEAR_MASK;
mbed_official 157:90e3acc479a2 725 I2Sxext->I2SPR = 0x0002;
mbed_official 157:90e3acc479a2 726
mbed_official 157:90e3acc479a2 727 /* Get the I2SCFGR register value */
mbed_official 157:90e3acc479a2 728 tmpreg = I2Sxext->I2SCFGR;
mbed_official 157:90e3acc479a2 729
mbed_official 157:90e3acc479a2 730 /* Get the mode to be configured for the extended I2S */
mbed_official 157:90e3acc479a2 731 if ((I2S_InitStruct->I2S_Mode == I2S_Mode_MasterTx) || (I2S_InitStruct->I2S_Mode == I2S_Mode_SlaveTx))
mbed_official 157:90e3acc479a2 732 {
mbed_official 157:90e3acc479a2 733 tmp = I2S_Mode_SlaveRx;
mbed_official 157:90e3acc479a2 734 }
mbed_official 157:90e3acc479a2 735 else
mbed_official 157:90e3acc479a2 736 {
mbed_official 157:90e3acc479a2 737 if ((I2S_InitStruct->I2S_Mode == I2S_Mode_MasterRx) || (I2S_InitStruct->I2S_Mode == I2S_Mode_SlaveRx))
mbed_official 157:90e3acc479a2 738 {
mbed_official 157:90e3acc479a2 739 tmp = I2S_Mode_SlaveTx;
mbed_official 157:90e3acc479a2 740 }
mbed_official 157:90e3acc479a2 741 }
mbed_official 157:90e3acc479a2 742
mbed_official 157:90e3acc479a2 743
mbed_official 157:90e3acc479a2 744 /* Configure the I2S with the SPI_InitStruct values */
mbed_official 157:90e3acc479a2 745 tmpreg |= (uint16_t)((uint16_t)SPI_I2SCFGR_I2SMOD | (uint16_t)(tmp | \
mbed_official 157:90e3acc479a2 746 (uint16_t)(I2S_InitStruct->I2S_Standard | (uint16_t)(I2S_InitStruct->I2S_DataFormat | \
mbed_official 157:90e3acc479a2 747 (uint16_t)I2S_InitStruct->I2S_CPOL))));
mbed_official 157:90e3acc479a2 748
mbed_official 157:90e3acc479a2 749 /* Write to SPIx I2SCFGR */
mbed_official 157:90e3acc479a2 750 I2Sxext->I2SCFGR = tmpreg;
mbed_official 157:90e3acc479a2 751 }
mbed_official 157:90e3acc479a2 752
mbed_official 157:90e3acc479a2 753 /**
mbed_official 157:90e3acc479a2 754 * @brief Enables or disables the SS output for the selected SPI.
mbed_official 157:90e3acc479a2 755 * @note This function can be called only after the SPI_Init() function has
mbed_official 157:90e3acc479a2 756 * been called and the NSS hardware management mode is selected.
mbed_official 157:90e3acc479a2 757 * @param SPIx: where x can be 1, 2 or 3 to select the SPI peripheral.
mbed_official 157:90e3acc479a2 758 * @param NewState: new state of the SPIx SS output.
mbed_official 157:90e3acc479a2 759 * This parameter can be: ENABLE or DISABLE.
mbed_official 157:90e3acc479a2 760 * @retval None
mbed_official 157:90e3acc479a2 761 */
mbed_official 157:90e3acc479a2 762 void SPI_SSOutputCmd(SPI_TypeDef* SPIx, FunctionalState NewState)
mbed_official 157:90e3acc479a2 763 {
mbed_official 157:90e3acc479a2 764 /* Check the parameters */
mbed_official 157:90e3acc479a2 765 assert_param(IS_SPI_ALL_PERIPH(SPIx));
mbed_official 157:90e3acc479a2 766 assert_param(IS_FUNCTIONAL_STATE(NewState));
mbed_official 157:90e3acc479a2 767 if (NewState != DISABLE)
mbed_official 157:90e3acc479a2 768 {
mbed_official 157:90e3acc479a2 769 /* Enable the selected SPI SS output */
mbed_official 157:90e3acc479a2 770 SPIx->CR2 |= (uint16_t)SPI_CR2_SSOE;
mbed_official 157:90e3acc479a2 771 }
mbed_official 157:90e3acc479a2 772 else
mbed_official 157:90e3acc479a2 773 {
mbed_official 157:90e3acc479a2 774 /* Disable the selected SPI SS output */
mbed_official 157:90e3acc479a2 775 SPIx->CR2 &= (uint16_t)~((uint16_t)SPI_CR2_SSOE);
mbed_official 157:90e3acc479a2 776 }
mbed_official 157:90e3acc479a2 777 }
mbed_official 157:90e3acc479a2 778
mbed_official 157:90e3acc479a2 779 /**
mbed_official 157:90e3acc479a2 780 * @brief Enables or disables the NSS pulse management mode.
mbed_official 157:90e3acc479a2 781 * @note This function can be called only after the SPI_Init() function has
mbed_official 157:90e3acc479a2 782 * been called.
mbed_official 157:90e3acc479a2 783 * @note When TI mode is selected, the control bits NSSP is not taken into
mbed_official 157:90e3acc479a2 784 * consideration and are configured by hardware respectively to the
mbed_official 157:90e3acc479a2 785 * TI mode requirements.
mbed_official 157:90e3acc479a2 786 * @param SPIx: where x can be 1, 2 or 3 to select the SPI peripheral.
mbed_official 157:90e3acc479a2 787 * @param NewState: new state of the NSS pulse management mode.
mbed_official 157:90e3acc479a2 788 * This parameter can be: ENABLE or DISABLE.
mbed_official 157:90e3acc479a2 789 * @retval None
mbed_official 157:90e3acc479a2 790 */
mbed_official 157:90e3acc479a2 791 void SPI_NSSPulseModeCmd(SPI_TypeDef* SPIx, FunctionalState NewState)
mbed_official 157:90e3acc479a2 792 {
mbed_official 157:90e3acc479a2 793 /* Check the parameters */
mbed_official 157:90e3acc479a2 794 assert_param(IS_SPI_ALL_PERIPH(SPIx));
mbed_official 157:90e3acc479a2 795 assert_param(IS_FUNCTIONAL_STATE(NewState));
mbed_official 157:90e3acc479a2 796
mbed_official 157:90e3acc479a2 797 if (NewState != DISABLE)
mbed_official 157:90e3acc479a2 798 {
mbed_official 157:90e3acc479a2 799 /* Enable the NSS pulse management mode */
mbed_official 157:90e3acc479a2 800 SPIx->CR2 |= SPI_CR2_NSSP;
mbed_official 157:90e3acc479a2 801 }
mbed_official 157:90e3acc479a2 802 else
mbed_official 157:90e3acc479a2 803 {
mbed_official 157:90e3acc479a2 804 /* Disable the NSS pulse management mode */
mbed_official 157:90e3acc479a2 805 SPIx->CR2 &= (uint16_t)~((uint16_t)SPI_CR2_NSSP);
mbed_official 157:90e3acc479a2 806 }
mbed_official 157:90e3acc479a2 807 }
mbed_official 157:90e3acc479a2 808
mbed_official 157:90e3acc479a2 809 /**
mbed_official 157:90e3acc479a2 810 * @}
mbed_official 157:90e3acc479a2 811 */
mbed_official 157:90e3acc479a2 812
mbed_official 157:90e3acc479a2 813 /** @defgroup SPI_Group2 Data transfers functions
mbed_official 157:90e3acc479a2 814 * @brief Data transfers functions
mbed_official 157:90e3acc479a2 815 *
mbed_official 157:90e3acc479a2 816 @verbatim
mbed_official 157:90e3acc479a2 817 ===============================================================================
mbed_official 157:90e3acc479a2 818 ##### Data transfers functions #####
mbed_official 157:90e3acc479a2 819 ===============================================================================
mbed_official 157:90e3acc479a2 820 [..] This section provides a set of functions allowing to manage the SPI or I2S
mbed_official 157:90e3acc479a2 821 data transfers.
mbed_official 157:90e3acc479a2 822 [..] In reception, data are received and then stored into an internal Rx buffer while
mbed_official 157:90e3acc479a2 823 In transmission, data are first stored into an internal Tx buffer before being
mbed_official 157:90e3acc479a2 824 transmitted.
mbed_official 157:90e3acc479a2 825 [..] The read access of the SPI_DR register can be done using the SPI_I2S_ReceiveData()
mbed_official 157:90e3acc479a2 826 function and returns the Rx buffered value. Whereas a write access to the SPI_DR
mbed_official 157:90e3acc479a2 827 can be done using SPI_I2S_SendData() function and stores the written data into
mbed_official 157:90e3acc479a2 828 Tx buffer.
mbed_official 157:90e3acc479a2 829
mbed_official 157:90e3acc479a2 830 @endverbatim
mbed_official 157:90e3acc479a2 831 * @{
mbed_official 157:90e3acc479a2 832 */
mbed_official 157:90e3acc479a2 833
mbed_official 157:90e3acc479a2 834 /**
mbed_official 157:90e3acc479a2 835 * @brief Transmits a Data through the SPIx peripheral.
mbed_official 157:90e3acc479a2 836 * @param SPIx: where x can be 1, 2 or 3 to select the SPI peripheral.
mbed_official 157:90e3acc479a2 837 * @param Data: Data to be transmitted.
mbed_official 157:90e3acc479a2 838 * @retval None
mbed_official 157:90e3acc479a2 839 */
mbed_official 157:90e3acc479a2 840 void SPI_SendData8(SPI_TypeDef* SPIx, uint8_t Data)
mbed_official 157:90e3acc479a2 841 {
mbed_official 157:90e3acc479a2 842 uint32_t spixbase = 0x00;
mbed_official 157:90e3acc479a2 843
mbed_official 157:90e3acc479a2 844 /* Check the parameters */
mbed_official 157:90e3acc479a2 845 assert_param(IS_SPI_ALL_PERIPH(SPIx));
mbed_official 157:90e3acc479a2 846
mbed_official 157:90e3acc479a2 847 spixbase = (uint32_t)SPIx;
mbed_official 157:90e3acc479a2 848 spixbase += 0x0C;
mbed_official 157:90e3acc479a2 849
mbed_official 157:90e3acc479a2 850 *(__IO uint8_t *) spixbase = Data;
mbed_official 157:90e3acc479a2 851 }
mbed_official 157:90e3acc479a2 852
mbed_official 157:90e3acc479a2 853 /**
mbed_official 157:90e3acc479a2 854 * @brief Transmits a Data through the SPIx/I2Sx peripheral.
mbed_official 157:90e3acc479a2 855 * @param SPIx: To select the SPIx/I2Sx peripheral, where x can be: 1, 2 or 3
mbed_official 157:90e3acc479a2 856 * in SPI mode or 2 or 3 in I2S mode or I2Sxext for I2S full duplex mode.
mbed_official 157:90e3acc479a2 857 * @param Data: Data to be transmitted.
mbed_official 157:90e3acc479a2 858 * @retval None
mbed_official 157:90e3acc479a2 859 */
mbed_official 157:90e3acc479a2 860 void SPI_I2S_SendData16(SPI_TypeDef* SPIx, uint16_t Data)
mbed_official 157:90e3acc479a2 861 {
mbed_official 157:90e3acc479a2 862 /* Check the parameters */
mbed_official 157:90e3acc479a2 863 assert_param(IS_SPI_ALL_PERIPH_EXT(SPIx));
mbed_official 157:90e3acc479a2 864
mbed_official 157:90e3acc479a2 865 SPIx->DR = (uint16_t)Data;
mbed_official 157:90e3acc479a2 866 }
mbed_official 157:90e3acc479a2 867
mbed_official 157:90e3acc479a2 868 /**
mbed_official 157:90e3acc479a2 869 * @brief Returns the most recent received data by the SPIx peripheral.
mbed_official 157:90e3acc479a2 870 * @param SPIx: where x can be 1, 2 or 3 to select the SPI peripheral.
mbed_official 157:90e3acc479a2 871 * @retval The value of the received data.
mbed_official 157:90e3acc479a2 872 */
mbed_official 157:90e3acc479a2 873 uint8_t SPI_ReceiveData8(SPI_TypeDef* SPIx)
mbed_official 157:90e3acc479a2 874 {
mbed_official 157:90e3acc479a2 875 uint32_t spixbase = 0x00;
mbed_official 157:90e3acc479a2 876
mbed_official 157:90e3acc479a2 877 /* Check the parameters */
mbed_official 157:90e3acc479a2 878 assert_param(IS_SPI_ALL_PERIPH_EXT(SPIx));
mbed_official 157:90e3acc479a2 879
mbed_official 157:90e3acc479a2 880 spixbase = (uint32_t)SPIx;
mbed_official 157:90e3acc479a2 881 spixbase += 0x0C;
mbed_official 157:90e3acc479a2 882
mbed_official 157:90e3acc479a2 883 return *(__IO uint8_t *) spixbase;
mbed_official 157:90e3acc479a2 884 }
mbed_official 157:90e3acc479a2 885
mbed_official 157:90e3acc479a2 886 /**
mbed_official 157:90e3acc479a2 887 * @brief Returns the most recent received data by the SPIx peripheral.
mbed_official 157:90e3acc479a2 888 * @param SPIx: To select the SPIx/I2Sx peripheral, where x can be: 1, 2 or 3
mbed_official 157:90e3acc479a2 889 * in SPI mode or 2 or 3 in I2S mode or I2Sxext for I2S full duplex mode.
mbed_official 157:90e3acc479a2 890 * @retval The value of the received data.
mbed_official 157:90e3acc479a2 891 */
mbed_official 157:90e3acc479a2 892 uint16_t SPI_I2S_ReceiveData16(SPI_TypeDef* SPIx)
mbed_official 157:90e3acc479a2 893 {
mbed_official 157:90e3acc479a2 894 /* Check the parameters */
mbed_official 157:90e3acc479a2 895 assert_param(IS_SPI_ALL_PERIPH_EXT(SPIx));
mbed_official 157:90e3acc479a2 896
mbed_official 157:90e3acc479a2 897 return SPIx->DR;
mbed_official 157:90e3acc479a2 898 }
mbed_official 157:90e3acc479a2 899 /**
mbed_official 157:90e3acc479a2 900 * @}
mbed_official 157:90e3acc479a2 901 */
mbed_official 157:90e3acc479a2 902
mbed_official 157:90e3acc479a2 903 /** @defgroup SPI_Group3 Hardware CRC Calculation functions
mbed_official 157:90e3acc479a2 904 * @brief Hardware CRC Calculation functions
mbed_official 157:90e3acc479a2 905 *
mbed_official 157:90e3acc479a2 906 @verbatim
mbed_official 157:90e3acc479a2 907 ===============================================================================
mbed_official 157:90e3acc479a2 908 ##### Hardware CRC Calculation functions #####
mbed_official 157:90e3acc479a2 909 ===============================================================================
mbed_official 157:90e3acc479a2 910 [..] This section provides a set of functions allowing to manage the SPI CRC hardware
mbed_official 157:90e3acc479a2 911 calculation.
mbed_official 157:90e3acc479a2 912 [..] SPI communication using CRC is possible through the following procedure:
mbed_official 157:90e3acc479a2 913 (#) Program the Data direction, Polarity, Phase, First Data, Baud Rate Prescaler,
mbed_official 157:90e3acc479a2 914 Slave Management, Peripheral Mode and CRC Polynomial values using the SPI_Init()
mbed_official 157:90e3acc479a2 915 function.
mbed_official 157:90e3acc479a2 916 (#) Enable the CRC calculation using the SPI_CalculateCRC() function.
mbed_official 157:90e3acc479a2 917 (#) Enable the SPI using the SPI_Cmd() function
mbed_official 157:90e3acc479a2 918 (#) Before writing the last data to the TX buffer, set the CRCNext bit using the
mbed_official 157:90e3acc479a2 919 SPI_TransmitCRC() function to indicate that after transmission of the last
mbed_official 157:90e3acc479a2 920 data, the CRC should be transmitted.
mbed_official 157:90e3acc479a2 921 (#) After transmitting the last data, the SPI transmits the CRC. The SPI_CR1_CRCNEXT
mbed_official 157:90e3acc479a2 922 bit is reset. The CRC is also received and compared against the SPI_RXCRCR
mbed_official 157:90e3acc479a2 923 value.
mbed_official 157:90e3acc479a2 924 If the value does not match, the SPI_FLAG_CRCERR flag is set and an interrupt
mbed_official 157:90e3acc479a2 925 can be generated when the SPI_I2S_IT_ERR interrupt is enabled.
mbed_official 157:90e3acc479a2 926 [..]
mbed_official 157:90e3acc479a2 927 (@)
mbed_official 157:90e3acc479a2 928 (+@) It is advised to don't read the calculate CRC values during the communication.
mbed_official 157:90e3acc479a2 929 (+@) When the SPI is in slave mode, be careful to enable CRC calculation only
mbed_official 157:90e3acc479a2 930 when the clock is stable, that is, when the clock is in the steady state.
mbed_official 157:90e3acc479a2 931 If not, a wrong CRC calculation may be done. In fact, the CRC is sensitive
mbed_official 157:90e3acc479a2 932 to the SCK slave input clock as soon as CRCEN is set, and this, whatever
mbed_official 157:90e3acc479a2 933 the value of the SPE bit.
mbed_official 157:90e3acc479a2 934 (+@) With high bitrate frequencies, be careful when transmitting the CRC.
mbed_official 157:90e3acc479a2 935 As the number of used CPU cycles has to be as low as possible in the CRC
mbed_official 157:90e3acc479a2 936 transfer phase, it is forbidden to call software functions in the CRC
mbed_official 157:90e3acc479a2 937 transmission sequence to avoid errors in the last data and CRC reception.
mbed_official 157:90e3acc479a2 938 In fact, CRCNEXT bit has to be written before the end of the transmission/reception
mbed_official 157:90e3acc479a2 939 of the last data.
mbed_official 157:90e3acc479a2 940 (+@) For high bit rate frequencies, it is advised to use the DMA mode to avoid the
mbed_official 157:90e3acc479a2 941 degradation of the SPI speed performance due to CPU accesses impacting the
mbed_official 157:90e3acc479a2 942 SPI bandwidth.
mbed_official 157:90e3acc479a2 943 (+@) When the STM32F30x are configured as slaves and the NSS hardware mode is
mbed_official 157:90e3acc479a2 944 used, the NSS pin needs to be kept low between the data phase and the CRC
mbed_official 157:90e3acc479a2 945 phase.
mbed_official 157:90e3acc479a2 946 (+@) When the SPI is configured in slave mode with the CRC feature enabled, CRC
mbed_official 157:90e3acc479a2 947 calculation takes place even if a high level is applied on the NSS pin.
mbed_official 157:90e3acc479a2 948 This may happen for example in case of a multislave environment where the
mbed_official 157:90e3acc479a2 949 communication master addresses slaves alternately.
mbed_official 157:90e3acc479a2 950 (+@) Between a slave deselection (high level on NSS) and a new slave selection
mbed_official 157:90e3acc479a2 951 (low level on NSS), the CRC value should be cleared on both master and slave
mbed_official 157:90e3acc479a2 952 sides in order to resynchronize the master and slave for their respective
mbed_official 157:90e3acc479a2 953 CRC calculation.
mbed_official 157:90e3acc479a2 954 [..]
mbed_official 157:90e3acc479a2 955 (@) To clear the CRC, follow the procedure below:
mbed_official 157:90e3acc479a2 956 (#@) Disable SPI using the SPI_Cmd() function.
mbed_official 157:90e3acc479a2 957 (#@) Disable the CRC calculation using the SPI_CalculateCRC() function.
mbed_official 157:90e3acc479a2 958 (#@) Enable the CRC calculation using the SPI_CalculateCRC() function.
mbed_official 157:90e3acc479a2 959 (#@) Enable SPI using the SPI_Cmd() function.
mbed_official 157:90e3acc479a2 960
mbed_official 157:90e3acc479a2 961 @endverbatim
mbed_official 157:90e3acc479a2 962 * @{
mbed_official 157:90e3acc479a2 963 */
mbed_official 157:90e3acc479a2 964
mbed_official 157:90e3acc479a2 965 /**
mbed_official 157:90e3acc479a2 966 * @brief Configures the CRC calculation length for the selected SPI.
mbed_official 157:90e3acc479a2 967 * @param SPIx: where x can be 1, 2 or 3 to select the SPI peripheral.
mbed_official 157:90e3acc479a2 968 * @param SPI_CRCLength: specifies the SPI CRC calculation length.
mbed_official 157:90e3acc479a2 969 * This parameter can be one of the following values:
mbed_official 157:90e3acc479a2 970 * @arg SPI_CRCLength_8b: Set CRC Calculation to 8 bits
mbed_official 157:90e3acc479a2 971 * @arg SPI_CRCLength_16b: Set CRC Calculation to 16 bits
mbed_official 157:90e3acc479a2 972 * @retval None
mbed_official 157:90e3acc479a2 973 */
mbed_official 157:90e3acc479a2 974 void SPI_CRCLengthConfig(SPI_TypeDef* SPIx, uint16_t SPI_CRCLength)
mbed_official 157:90e3acc479a2 975 {
mbed_official 157:90e3acc479a2 976 /* Check the parameters */
mbed_official 157:90e3acc479a2 977 assert_param(IS_SPI_ALL_PERIPH(SPIx));
mbed_official 157:90e3acc479a2 978 assert_param(IS_SPI_CRC_LENGTH(SPI_CRCLength));
mbed_official 157:90e3acc479a2 979
mbed_official 157:90e3acc479a2 980 /* Clear CRCL bit */
mbed_official 157:90e3acc479a2 981 SPIx->CR1 &= (uint16_t)~((uint16_t)SPI_CR1_CRCL);
mbed_official 157:90e3acc479a2 982
mbed_official 157:90e3acc479a2 983 /* Set new CRCL bit value */
mbed_official 157:90e3acc479a2 984 SPIx->CR1 |= SPI_CRCLength;
mbed_official 157:90e3acc479a2 985 }
mbed_official 157:90e3acc479a2 986
mbed_official 157:90e3acc479a2 987 /**
mbed_official 157:90e3acc479a2 988 * @brief Enables or disables the CRC value calculation of the transferred bytes.
mbed_official 157:90e3acc479a2 989 * @param SPIx: where x can be 1, 2 or 3 to select the SPI peripheral.
mbed_official 157:90e3acc479a2 990 * @param NewState: new state of the SPIx CRC value calculation.
mbed_official 157:90e3acc479a2 991 * This parameter can be: ENABLE or DISABLE.
mbed_official 157:90e3acc479a2 992 * @retval None
mbed_official 157:90e3acc479a2 993 */
mbed_official 157:90e3acc479a2 994 void SPI_CalculateCRC(SPI_TypeDef* SPIx, FunctionalState NewState)
mbed_official 157:90e3acc479a2 995 {
mbed_official 157:90e3acc479a2 996 /* Check the parameters */
mbed_official 157:90e3acc479a2 997 assert_param(IS_SPI_ALL_PERIPH(SPIx));
mbed_official 157:90e3acc479a2 998 assert_param(IS_FUNCTIONAL_STATE(NewState));
mbed_official 157:90e3acc479a2 999
mbed_official 157:90e3acc479a2 1000 if (NewState != DISABLE)
mbed_official 157:90e3acc479a2 1001 {
mbed_official 157:90e3acc479a2 1002 /* Enable the selected SPI CRC calculation */
mbed_official 157:90e3acc479a2 1003 SPIx->CR1 |= SPI_CR1_CRCEN;
mbed_official 157:90e3acc479a2 1004 }
mbed_official 157:90e3acc479a2 1005 else
mbed_official 157:90e3acc479a2 1006 {
mbed_official 157:90e3acc479a2 1007 /* Disable the selected SPI CRC calculation */
mbed_official 157:90e3acc479a2 1008 SPIx->CR1 &= (uint16_t)~((uint16_t)SPI_CR1_CRCEN);
mbed_official 157:90e3acc479a2 1009 }
mbed_official 157:90e3acc479a2 1010 }
mbed_official 157:90e3acc479a2 1011
mbed_official 157:90e3acc479a2 1012 /**
mbed_official 157:90e3acc479a2 1013 * @brief Transmits the SPIx CRC value.
mbed_official 157:90e3acc479a2 1014 * @param SPIx: where x can be 1, 2 or 3 to select the SPI peripheral.
mbed_official 157:90e3acc479a2 1015 * @retval None
mbed_official 157:90e3acc479a2 1016 */
mbed_official 157:90e3acc479a2 1017 void SPI_TransmitCRC(SPI_TypeDef* SPIx)
mbed_official 157:90e3acc479a2 1018 {
mbed_official 157:90e3acc479a2 1019 /* Check the parameters */
mbed_official 157:90e3acc479a2 1020 assert_param(IS_SPI_ALL_PERIPH(SPIx));
mbed_official 157:90e3acc479a2 1021
mbed_official 157:90e3acc479a2 1022 /* Enable the selected SPI CRC transmission */
mbed_official 157:90e3acc479a2 1023 SPIx->CR1 |= SPI_CR1_CRCNEXT;
mbed_official 157:90e3acc479a2 1024 }
mbed_official 157:90e3acc479a2 1025
mbed_official 157:90e3acc479a2 1026 /**
mbed_official 157:90e3acc479a2 1027 * @brief Returns the transmit or the receive CRC register value for the specified SPI.
mbed_official 157:90e3acc479a2 1028 * @param SPIx: where x can be 1, 2 or 3 to select the SPI peripheral.
mbed_official 157:90e3acc479a2 1029 * @param SPI_CRC: specifies the CRC register to be read.
mbed_official 157:90e3acc479a2 1030 * This parameter can be one of the following values:
mbed_official 157:90e3acc479a2 1031 * @arg SPI_CRC_Tx: Selects Tx CRC register
mbed_official 157:90e3acc479a2 1032 * @arg SPI_CRC_Rx: Selects Rx CRC register
mbed_official 157:90e3acc479a2 1033 * @retval The selected CRC register value..
mbed_official 157:90e3acc479a2 1034 */
mbed_official 157:90e3acc479a2 1035 uint16_t SPI_GetCRC(SPI_TypeDef* SPIx, uint8_t SPI_CRC)
mbed_official 157:90e3acc479a2 1036 {
mbed_official 157:90e3acc479a2 1037 uint16_t crcreg = 0;
mbed_official 157:90e3acc479a2 1038 /* Check the parameters */
mbed_official 157:90e3acc479a2 1039 assert_param(IS_SPI_ALL_PERIPH(SPIx));
mbed_official 157:90e3acc479a2 1040 assert_param(IS_SPI_CRC(SPI_CRC));
mbed_official 157:90e3acc479a2 1041
mbed_official 157:90e3acc479a2 1042 if (SPI_CRC != SPI_CRC_Rx)
mbed_official 157:90e3acc479a2 1043 {
mbed_official 157:90e3acc479a2 1044 /* Get the Tx CRC register */
mbed_official 157:90e3acc479a2 1045 crcreg = SPIx->TXCRCR;
mbed_official 157:90e3acc479a2 1046 }
mbed_official 157:90e3acc479a2 1047 else
mbed_official 157:90e3acc479a2 1048 {
mbed_official 157:90e3acc479a2 1049 /* Get the Rx CRC register */
mbed_official 157:90e3acc479a2 1050 crcreg = SPIx->RXCRCR;
mbed_official 157:90e3acc479a2 1051 }
mbed_official 157:90e3acc479a2 1052 /* Return the selected CRC register */
mbed_official 157:90e3acc479a2 1053 return crcreg;
mbed_official 157:90e3acc479a2 1054 }
mbed_official 157:90e3acc479a2 1055
mbed_official 157:90e3acc479a2 1056 /**
mbed_official 157:90e3acc479a2 1057 * @brief Returns the CRC Polynomial register value for the specified SPI.
mbed_official 157:90e3acc479a2 1058 * @param SPIx: where x can be 1, 2 or 3 to select the SPI peripheral.
mbed_official 157:90e3acc479a2 1059 * @retval The CRC Polynomial register value.
mbed_official 157:90e3acc479a2 1060 */
mbed_official 157:90e3acc479a2 1061 uint16_t SPI_GetCRCPolynomial(SPI_TypeDef* SPIx)
mbed_official 157:90e3acc479a2 1062 {
mbed_official 157:90e3acc479a2 1063 /* Check the parameters */
mbed_official 157:90e3acc479a2 1064 assert_param(IS_SPI_ALL_PERIPH(SPIx));
mbed_official 157:90e3acc479a2 1065
mbed_official 157:90e3acc479a2 1066 /* Return the CRC polynomial register */
mbed_official 157:90e3acc479a2 1067 return SPIx->CRCPR;
mbed_official 157:90e3acc479a2 1068 }
mbed_official 157:90e3acc479a2 1069
mbed_official 157:90e3acc479a2 1070 /**
mbed_official 157:90e3acc479a2 1071 * @}
mbed_official 157:90e3acc479a2 1072 */
mbed_official 157:90e3acc479a2 1073
mbed_official 157:90e3acc479a2 1074 /** @defgroup SPI_Group4 DMA transfers management functions
mbed_official 157:90e3acc479a2 1075 * @brief DMA transfers management functions
mbed_official 157:90e3acc479a2 1076 *
mbed_official 157:90e3acc479a2 1077 @verbatim
mbed_official 157:90e3acc479a2 1078 ===============================================================================
mbed_official 157:90e3acc479a2 1079 ##### DMA transfers management functions #####
mbed_official 157:90e3acc479a2 1080 ===============================================================================
mbed_official 157:90e3acc479a2 1081
mbed_official 157:90e3acc479a2 1082 @endverbatim
mbed_official 157:90e3acc479a2 1083 * @{
mbed_official 157:90e3acc479a2 1084 */
mbed_official 157:90e3acc479a2 1085
mbed_official 157:90e3acc479a2 1086 /**
mbed_official 157:90e3acc479a2 1087 * @brief Enables or disables the SPIx/I2Sx DMA interface.
mbed_official 157:90e3acc479a2 1088 * @param SPIx:To select the SPIx/I2Sx peripheral, where x can be: 1, 2 or 3
mbed_official 157:90e3acc479a2 1089 * in SPI mode or 2 or 3 in I2S mode or I2Sxext for I2S full duplex mode.
mbed_official 157:90e3acc479a2 1090 * @param SPI_I2S_DMAReq: specifies the SPI DMA transfer request to be enabled or disabled.
mbed_official 157:90e3acc479a2 1091 * This parameter can be any combination of the following values:
mbed_official 157:90e3acc479a2 1092 * @arg SPI_I2S_DMAReq_Tx: Tx buffer DMA transfer request
mbed_official 157:90e3acc479a2 1093 * @arg SPI_I2S_DMAReq_Rx: Rx buffer DMA transfer request
mbed_official 157:90e3acc479a2 1094 * @param NewState: new state of the selected SPI DMA transfer request.
mbed_official 157:90e3acc479a2 1095 * This parameter can be: ENABLE or DISABLE.
mbed_official 157:90e3acc479a2 1096 * @retval None
mbed_official 157:90e3acc479a2 1097 */
mbed_official 157:90e3acc479a2 1098 void SPI_I2S_DMACmd(SPI_TypeDef* SPIx, uint16_t SPI_I2S_DMAReq, FunctionalState NewState)
mbed_official 157:90e3acc479a2 1099 {
mbed_official 157:90e3acc479a2 1100 /* Check the parameters */
mbed_official 157:90e3acc479a2 1101 assert_param(IS_SPI_ALL_PERIPH_EXT(SPIx));
mbed_official 157:90e3acc479a2 1102 assert_param(IS_FUNCTIONAL_STATE(NewState));
mbed_official 157:90e3acc479a2 1103 assert_param(IS_SPI_I2S_DMA_REQ(SPI_I2S_DMAReq));
mbed_official 157:90e3acc479a2 1104
mbed_official 157:90e3acc479a2 1105 if (NewState != DISABLE)
mbed_official 157:90e3acc479a2 1106 {
mbed_official 157:90e3acc479a2 1107 /* Enable the selected SPI DMA requests */
mbed_official 157:90e3acc479a2 1108 SPIx->CR2 |= SPI_I2S_DMAReq;
mbed_official 157:90e3acc479a2 1109 }
mbed_official 157:90e3acc479a2 1110 else
mbed_official 157:90e3acc479a2 1111 {
mbed_official 157:90e3acc479a2 1112 /* Disable the selected SPI DMA requests */
mbed_official 157:90e3acc479a2 1113 SPIx->CR2 &= (uint16_t)~SPI_I2S_DMAReq;
mbed_official 157:90e3acc479a2 1114 }
mbed_official 157:90e3acc479a2 1115 }
mbed_official 157:90e3acc479a2 1116
mbed_official 157:90e3acc479a2 1117 /**
mbed_official 157:90e3acc479a2 1118 * @brief Configures the number of data to transfer type(Even/Odd) for the DMA
mbed_official 157:90e3acc479a2 1119 * last transfers and for the selected SPI.
mbed_official 157:90e3acc479a2 1120 * @note This function have a meaning only if DMA mode is selected and if
mbed_official 157:90e3acc479a2 1121 * the packing mode is used (data length <= 8 and DMA transfer size halfword)
mbed_official 157:90e3acc479a2 1122 * @param SPIx: where x can be 1, 2 or 3 to select the SPI peripheral.
mbed_official 157:90e3acc479a2 1123 * @param SPI_LastDMATransfer: specifies the SPI last DMA transfers state.
mbed_official 157:90e3acc479a2 1124 * This parameter can be one of the following values:
mbed_official 157:90e3acc479a2 1125 * @arg SPI_LastDMATransfer_TxEvenRxEven: Number of data for transmission Even
mbed_official 157:90e3acc479a2 1126 * and number of data for reception Even.
mbed_official 157:90e3acc479a2 1127 * @arg SPI_LastDMATransfer_TxOddRxEven: Number of data for transmission Odd
mbed_official 157:90e3acc479a2 1128 * and number of data for reception Even.
mbed_official 157:90e3acc479a2 1129 * @arg SPI_LastDMATransfer_TxEvenRxOdd: Number of data for transmission Even
mbed_official 157:90e3acc479a2 1130 * and number of data for reception Odd.
mbed_official 157:90e3acc479a2 1131 * @arg SPI_LastDMATransfer_TxOddRxOdd: RNumber of data for transmission Odd
mbed_official 157:90e3acc479a2 1132 * and number of data for reception Odd.
mbed_official 157:90e3acc479a2 1133 * @retval None
mbed_official 157:90e3acc479a2 1134 */
mbed_official 157:90e3acc479a2 1135 void SPI_LastDMATransferCmd(SPI_TypeDef* SPIx, uint16_t SPI_LastDMATransfer)
mbed_official 157:90e3acc479a2 1136 {
mbed_official 157:90e3acc479a2 1137 /* Check the parameters */
mbed_official 157:90e3acc479a2 1138 assert_param(IS_SPI_ALL_PERIPH(SPIx));
mbed_official 157:90e3acc479a2 1139 assert_param(IS_SPI_LAST_DMA_TRANSFER(SPI_LastDMATransfer));
mbed_official 157:90e3acc479a2 1140
mbed_official 157:90e3acc479a2 1141 /* Clear LDMA_TX and LDMA_RX bits */
mbed_official 157:90e3acc479a2 1142 SPIx->CR2 &= CR2_LDMA_MASK;
mbed_official 157:90e3acc479a2 1143
mbed_official 157:90e3acc479a2 1144 /* Set new LDMA_TX and LDMA_RX bits value */
mbed_official 157:90e3acc479a2 1145 SPIx->CR2 |= SPI_LastDMATransfer;
mbed_official 157:90e3acc479a2 1146 }
mbed_official 157:90e3acc479a2 1147
mbed_official 157:90e3acc479a2 1148 /**
mbed_official 157:90e3acc479a2 1149 * @}
mbed_official 157:90e3acc479a2 1150 */
mbed_official 157:90e3acc479a2 1151
mbed_official 157:90e3acc479a2 1152 /** @defgroup SPI_Group5 Interrupts and flags management functions
mbed_official 157:90e3acc479a2 1153 * @brief Interrupts and flags management functions
mbed_official 157:90e3acc479a2 1154 *
mbed_official 157:90e3acc479a2 1155 @verbatim
mbed_official 157:90e3acc479a2 1156 ===============================================================================
mbed_official 157:90e3acc479a2 1157 ##### Interrupts and flags management functions #####
mbed_official 157:90e3acc479a2 1158 ===============================================================================
mbed_official 157:90e3acc479a2 1159 [..] This section provides a set of functions allowing to configure the SPI/I2S
mbed_official 157:90e3acc479a2 1160 Interrupts sources and check or clear the flags or pending bits status.
mbed_official 157:90e3acc479a2 1161 The user should identify which mode will be used in his application to manage
mbed_official 157:90e3acc479a2 1162 the communication: Polling mode, Interrupt mode or DMA mode.
mbed_official 157:90e3acc479a2 1163
mbed_official 157:90e3acc479a2 1164 *** Polling Mode ***
mbed_official 157:90e3acc479a2 1165 ====================
mbed_official 157:90e3acc479a2 1166 [..] In Polling Mode, the SPI/I2S communication can be managed by 9 flags:
mbed_official 157:90e3acc479a2 1167 (#) SPI_I2S_FLAG_TXE : to indicate the status of the transmit buffer register.
mbed_official 157:90e3acc479a2 1168 (#) SPI_I2S_FLAG_RXNE : to indicate the status of the receive buffer register.
mbed_official 157:90e3acc479a2 1169 (#) SPI_I2S_FLAG_BSY : to indicate the state of the communication layer of the SPI.
mbed_official 157:90e3acc479a2 1170 (#) SPI_FLAG_CRCERR : to indicate if a CRC Calculation error occur.
mbed_official 157:90e3acc479a2 1171 (#) SPI_FLAG_MODF : to indicate if a Mode Fault error occur.
mbed_official 157:90e3acc479a2 1172 (#) SPI_I2S_FLAG_OVR : to indicate if an Overrun error occur.
mbed_official 157:90e3acc479a2 1173 (#) SPI_I2S_FLAG_FRE: to indicate a Frame Format error occurs.
mbed_official 157:90e3acc479a2 1174 (#) I2S_FLAG_UDR: to indicate an Underrun error occurs.
mbed_official 157:90e3acc479a2 1175 (#) I2S_FLAG_CHSIDE: to indicate Channel Side.
mbed_official 157:90e3acc479a2 1176 [..]
mbed_official 157:90e3acc479a2 1177 (@) Do not use the BSY flag to handle each data transmission or reception.
mbed_official 157:90e3acc479a2 1178 It is better to use the TXE and RXNE flags instead.
mbed_official 157:90e3acc479a2 1179 [..] In this Mode it is advised to use the following functions:
mbed_official 157:90e3acc479a2 1180 (+) FlagStatus SPI_I2S_GetFlagStatus(SPI_TypeDef* SPIx, uint16_t SPI_I2S_FLAG);
mbed_official 157:90e3acc479a2 1181 (+) void SPI_I2S_ClearFlag(SPI_TypeDef* SPIx, uint16_t SPI_I2S_FLAG);
mbed_official 157:90e3acc479a2 1182
mbed_official 157:90e3acc479a2 1183 *** Interrupt Mode ***
mbed_official 157:90e3acc479a2 1184 ======================
mbed_official 157:90e3acc479a2 1185 [..] In Interrupt Mode, the SPI/I2S communication can be managed by 3 interrupt sources
mbed_official 157:90e3acc479a2 1186 and 5 pending bits:
mbed_official 157:90e3acc479a2 1187 [..] Pending Bits:
mbed_official 157:90e3acc479a2 1188 (#) SPI_I2S_IT_TXE : to indicate the status of the transmit buffer register.
mbed_official 157:90e3acc479a2 1189 (#) SPI_I2S_IT_RXNE : to indicate the status of the receive buffer register.
mbed_official 157:90e3acc479a2 1190 (#) SPI_I2S_IT_OVR : to indicate if an Overrun error occur.
mbed_official 157:90e3acc479a2 1191 (#) I2S_IT_UDR : to indicate an Underrun Error occurs.
mbed_official 157:90e3acc479a2 1192 (#) SPI_I2S_FLAG_FRE : to indicate a Frame Format error occurs.
mbed_official 157:90e3acc479a2 1193 [..] Interrupt Source:
mbed_official 157:90e3acc479a2 1194 (#) SPI_I2S_IT_TXE: specifies the interrupt source for the Tx buffer empty
mbed_official 157:90e3acc479a2 1195 interrupt.
mbed_official 157:90e3acc479a2 1196 (#) SPI_I2S_IT_RXNE : specifies the interrupt source for the Rx buffer not
mbed_official 157:90e3acc479a2 1197 empty interrupt.
mbed_official 157:90e3acc479a2 1198 (#) SPI_I2S_IT_ERR : specifies the interrupt source for the errors interrupt.
mbed_official 157:90e3acc479a2 1199 [..] In this Mode it is advised to use the following functions:
mbed_official 157:90e3acc479a2 1200 (+) void SPI_I2S_ITConfig(SPI_TypeDef* SPIx, uint8_t SPI_I2S_IT, FunctionalState NewState);
mbed_official 157:90e3acc479a2 1201 (+) ITStatus SPI_I2S_GetITStatus(SPI_TypeDef* SPIx, uint8_t SPI_I2S_IT);
mbed_official 157:90e3acc479a2 1202
mbed_official 157:90e3acc479a2 1203 *** FIFO Status ***
mbed_official 157:90e3acc479a2 1204 ===================
mbed_official 157:90e3acc479a2 1205 [..] It is possible to monitor the FIFO status when a transfer is ongoing using the
mbed_official 157:90e3acc479a2 1206 following function:
mbed_official 157:90e3acc479a2 1207 (+) uint32_t SPI_GetFIFOStatus(uint8_t SPI_FIFO_Direction);
mbed_official 157:90e3acc479a2 1208
mbed_official 157:90e3acc479a2 1209 *** DMA Mode ***
mbed_official 157:90e3acc479a2 1210 ================
mbed_official 157:90e3acc479a2 1211 [..] In DMA Mode, the SPI communication can be managed by 2 DMA Channel requests:
mbed_official 157:90e3acc479a2 1212 (#) SPI_I2S_DMAReq_Tx: specifies the Tx buffer DMA transfer request.
mbed_official 157:90e3acc479a2 1213 (#) SPI_I2S_DMAReq_Rx: specifies the Rx buffer DMA transfer request.
mbed_official 157:90e3acc479a2 1214 [..] In this Mode it is advised to use the following function:
mbed_official 157:90e3acc479a2 1215 (+) void SPI_I2S_DMACmd(SPI_TypeDef* SPIx, uint16_t SPI_I2S_DMAReq, FunctionalState NewState);
mbed_official 157:90e3acc479a2 1216
mbed_official 157:90e3acc479a2 1217 @endverbatim
mbed_official 157:90e3acc479a2 1218 * @{
mbed_official 157:90e3acc479a2 1219 */
mbed_official 157:90e3acc479a2 1220
mbed_official 157:90e3acc479a2 1221 /**
mbed_official 157:90e3acc479a2 1222 * @brief Enables or disables the specified SPI/I2S interrupts.
mbed_official 157:90e3acc479a2 1223 * @param SPIx: To select the SPIx/I2Sx peripheral, where x can be: 1, 2 or 3
mbed_official 157:90e3acc479a2 1224 * in SPI mode or 2 or 3 in I2S mode or I2Sxext for I2S full duplex mode.
mbed_official 157:90e3acc479a2 1225 * @param SPI_I2S_IT: specifies the SPI interrupt source to be enabled or disabled.
mbed_official 157:90e3acc479a2 1226 * This parameter can be one of the following values:
mbed_official 157:90e3acc479a2 1227 * @arg SPI_I2S_IT_TXE: Tx buffer empty interrupt mask
mbed_official 157:90e3acc479a2 1228 * @arg SPI_I2S_IT_RXNE: Rx buffer not empty interrupt mask
mbed_official 157:90e3acc479a2 1229 * @arg SPI_I2S_IT_ERR: Error interrupt mask
mbed_official 157:90e3acc479a2 1230 * @param NewState: new state of the specified SPI interrupt.
mbed_official 157:90e3acc479a2 1231 * This parameter can be: ENABLE or DISABLE.
mbed_official 157:90e3acc479a2 1232 * @retval None
mbed_official 157:90e3acc479a2 1233 */
mbed_official 157:90e3acc479a2 1234 void SPI_I2S_ITConfig(SPI_TypeDef* SPIx, uint8_t SPI_I2S_IT, FunctionalState NewState)
mbed_official 157:90e3acc479a2 1235 {
mbed_official 157:90e3acc479a2 1236 uint16_t itpos = 0, itmask = 0 ;
mbed_official 157:90e3acc479a2 1237
mbed_official 157:90e3acc479a2 1238 /* Check the parameters */
mbed_official 157:90e3acc479a2 1239 assert_param(IS_SPI_ALL_PERIPH_EXT(SPIx));
mbed_official 157:90e3acc479a2 1240 assert_param(IS_FUNCTIONAL_STATE(NewState));
mbed_official 157:90e3acc479a2 1241 assert_param(IS_SPI_I2S_CONFIG_IT(SPI_I2S_IT));
mbed_official 157:90e3acc479a2 1242
mbed_official 157:90e3acc479a2 1243 /* Get the SPI IT index */
mbed_official 157:90e3acc479a2 1244 itpos = SPI_I2S_IT >> 4;
mbed_official 157:90e3acc479a2 1245
mbed_official 157:90e3acc479a2 1246 /* Set the IT mask */
mbed_official 157:90e3acc479a2 1247 itmask = (uint16_t)1 << (uint16_t)itpos;
mbed_official 157:90e3acc479a2 1248
mbed_official 157:90e3acc479a2 1249 if (NewState != DISABLE)
mbed_official 157:90e3acc479a2 1250 {
mbed_official 157:90e3acc479a2 1251 /* Enable the selected SPI interrupt */
mbed_official 157:90e3acc479a2 1252 SPIx->CR2 |= itmask;
mbed_official 157:90e3acc479a2 1253 }
mbed_official 157:90e3acc479a2 1254 else
mbed_official 157:90e3acc479a2 1255 {
mbed_official 157:90e3acc479a2 1256 /* Disable the selected SPI interrupt */
mbed_official 157:90e3acc479a2 1257 SPIx->CR2 &= (uint16_t)~itmask;
mbed_official 157:90e3acc479a2 1258 }
mbed_official 157:90e3acc479a2 1259 }
mbed_official 157:90e3acc479a2 1260
mbed_official 157:90e3acc479a2 1261 /**
mbed_official 157:90e3acc479a2 1262 * @brief Returns the current SPIx Transmission FIFO filled level.
mbed_official 157:90e3acc479a2 1263 * @param SPIx: where x can be 1, 2 or 3 to select the SPI peripheral.
mbed_official 157:90e3acc479a2 1264 * @retval The Transmission FIFO filling state.
mbed_official 157:90e3acc479a2 1265 * - SPI_TransmissionFIFOStatus_Empty: when FIFO is empty
mbed_official 157:90e3acc479a2 1266 * - SPI_TransmissionFIFOStatus_1QuarterFull: if more than 1 quarter-full.
mbed_official 157:90e3acc479a2 1267 * - SPI_TransmissionFIFOStatus_HalfFull: if more than 1 half-full.
mbed_official 157:90e3acc479a2 1268 * - SPI_TransmissionFIFOStatus_Full: when FIFO is full.
mbed_official 157:90e3acc479a2 1269 */
mbed_official 157:90e3acc479a2 1270 uint16_t SPI_GetTransmissionFIFOStatus(SPI_TypeDef* SPIx)
mbed_official 157:90e3acc479a2 1271 {
mbed_official 157:90e3acc479a2 1272 /* Get the SPIx Transmission FIFO level bits */
mbed_official 157:90e3acc479a2 1273 return (uint16_t)((SPIx->SR & SPI_SR_FTLVL));
mbed_official 157:90e3acc479a2 1274 }
mbed_official 157:90e3acc479a2 1275
mbed_official 157:90e3acc479a2 1276 /**
mbed_official 157:90e3acc479a2 1277 * @brief Returns the current SPIx Reception FIFO filled level.
mbed_official 157:90e3acc479a2 1278 * @param SPIx: where x can be 1, 2 or 3 to select the SPI peripheral.
mbed_official 157:90e3acc479a2 1279 * @retval The Reception FIFO filling state.
mbed_official 157:90e3acc479a2 1280 * - SPI_ReceptionFIFOStatus_Empty: when FIFO is empty
mbed_official 157:90e3acc479a2 1281 * - SPI_ReceptionFIFOStatus_1QuarterFull: if more than 1 quarter-full.
mbed_official 157:90e3acc479a2 1282 * - SPI_ReceptionFIFOStatus_HalfFull: if more than 1 half-full.
mbed_official 157:90e3acc479a2 1283 * - SPI_ReceptionFIFOStatus_Full: when FIFO is full.
mbed_official 157:90e3acc479a2 1284 */
mbed_official 157:90e3acc479a2 1285 uint16_t SPI_GetReceptionFIFOStatus(SPI_TypeDef* SPIx)
mbed_official 157:90e3acc479a2 1286 {
mbed_official 157:90e3acc479a2 1287 /* Get the SPIx Reception FIFO level bits */
mbed_official 157:90e3acc479a2 1288 return (uint16_t)((SPIx->SR & SPI_SR_FRLVL));
mbed_official 157:90e3acc479a2 1289 }
mbed_official 157:90e3acc479a2 1290
mbed_official 157:90e3acc479a2 1291 /**
mbed_official 157:90e3acc479a2 1292 * @brief Checks whether the specified SPI flag is set or not.
mbed_official 157:90e3acc479a2 1293 * @param SPIx: To select the SPIx/I2Sx peripheral, where x can be: 1, 2 or 3
mbed_official 157:90e3acc479a2 1294 * in SPI mode or 2 or 3 in I2S mode or I2Sxext for I2S full duplex mode.
mbed_official 157:90e3acc479a2 1295 * @param SPI_I2S_FLAG: specifies the SPI flag to check.
mbed_official 157:90e3acc479a2 1296 * This parameter can be one of the following values:
mbed_official 157:90e3acc479a2 1297 * @arg SPI_I2S_FLAG_TXE: Transmit buffer empty flag.
mbed_official 157:90e3acc479a2 1298 * @arg SPI_I2S_FLAG_RXNE: Receive buffer not empty flag.
mbed_official 157:90e3acc479a2 1299 * @arg SPI_I2S_FLAG_BSY: Busy flag.
mbed_official 157:90e3acc479a2 1300 * @arg SPI_I2S_FLAG_OVR: Overrun flag.
mbed_official 157:90e3acc479a2 1301 * @arg SPI_I2S_FLAG_MODF: Mode Fault flag.
mbed_official 157:90e3acc479a2 1302 * @arg SPI_I2S_FLAG_CRCERR: CRC Error flag.
mbed_official 157:90e3acc479a2 1303 * @arg SPI_I2S_FLAG_FRE: TI frame format error flag.
mbed_official 157:90e3acc479a2 1304 * @arg I2S_FLAG_UDR: Underrun Error flag.
mbed_official 157:90e3acc479a2 1305 * @arg I2S_FLAG_CHSIDE: Channel Side flag.
mbed_official 157:90e3acc479a2 1306 * @retval The new state of SPI_I2S_FLAG (SET or RESET).
mbed_official 157:90e3acc479a2 1307 */
mbed_official 157:90e3acc479a2 1308 FlagStatus SPI_I2S_GetFlagStatus(SPI_TypeDef* SPIx, uint16_t SPI_I2S_FLAG)
mbed_official 157:90e3acc479a2 1309 {
mbed_official 157:90e3acc479a2 1310 FlagStatus bitstatus = RESET;
mbed_official 157:90e3acc479a2 1311 /* Check the parameters */
mbed_official 157:90e3acc479a2 1312 assert_param(IS_SPI_ALL_PERIPH_EXT(SPIx));
mbed_official 157:90e3acc479a2 1313 assert_param(IS_SPI_I2S_GET_FLAG(SPI_I2S_FLAG));
mbed_official 157:90e3acc479a2 1314
mbed_official 157:90e3acc479a2 1315 /* Check the status of the specified SPI flag */
mbed_official 157:90e3acc479a2 1316 if ((SPIx->SR & SPI_I2S_FLAG) != (uint16_t)RESET)
mbed_official 157:90e3acc479a2 1317 {
mbed_official 157:90e3acc479a2 1318 /* SPI_I2S_FLAG is set */
mbed_official 157:90e3acc479a2 1319 bitstatus = SET;
mbed_official 157:90e3acc479a2 1320 }
mbed_official 157:90e3acc479a2 1321 else
mbed_official 157:90e3acc479a2 1322 {
mbed_official 157:90e3acc479a2 1323 /* SPI_I2S_FLAG is reset */
mbed_official 157:90e3acc479a2 1324 bitstatus = RESET;
mbed_official 157:90e3acc479a2 1325 }
mbed_official 157:90e3acc479a2 1326 /* Return the SPI_I2S_FLAG status */
mbed_official 157:90e3acc479a2 1327 return bitstatus;
mbed_official 157:90e3acc479a2 1328 }
mbed_official 157:90e3acc479a2 1329
mbed_official 157:90e3acc479a2 1330 /**
mbed_official 157:90e3acc479a2 1331 * @brief Clears the SPIx CRC Error (CRCERR) flag.
mbed_official 157:90e3acc479a2 1332 * @param SPIx: To select the SPIx/I2Sx peripheral, where x can be: 1, 2 or 3
mbed_official 157:90e3acc479a2 1333 * in SPI mode or 2 or 3 in I2S mode or I2Sxext for I2S full duplex mode.
mbed_official 157:90e3acc479a2 1334 * @param SPI_I2S_FLAG: specifies the SPI flag to clear.
mbed_official 157:90e3acc479a2 1335 * This function clears only CRCERR flag.
mbed_official 157:90e3acc479a2 1336 * @note OVR (OverRun error) flag is cleared by software sequence: a read
mbed_official 157:90e3acc479a2 1337 * operation to SPI_DR register (SPI_I2S_ReceiveData()) followed by a read
mbed_official 157:90e3acc479a2 1338 * operation to SPI_SR register (SPI_I2S_GetFlagStatus()).
mbed_official 157:90e3acc479a2 1339 * @note MODF (Mode Fault) flag is cleared by software sequence: a read/write
mbed_official 157:90e3acc479a2 1340 * operation to SPI_SR register (SPI_I2S_GetFlagStatus()) followed by a
mbed_official 157:90e3acc479a2 1341 * write operation to SPI_CR1 register (SPI_Cmd() to enable the SPI).
mbed_official 157:90e3acc479a2 1342 * @retval None
mbed_official 157:90e3acc479a2 1343 */
mbed_official 157:90e3acc479a2 1344 void SPI_I2S_ClearFlag(SPI_TypeDef* SPIx, uint16_t SPI_I2S_FLAG)
mbed_official 157:90e3acc479a2 1345 {
mbed_official 157:90e3acc479a2 1346 /* Check the parameters */
mbed_official 157:90e3acc479a2 1347 assert_param(IS_SPI_ALL_PERIPH_EXT(SPIx));
mbed_official 157:90e3acc479a2 1348 assert_param(IS_SPI_CLEAR_FLAG(SPI_I2S_FLAG));
mbed_official 157:90e3acc479a2 1349
mbed_official 157:90e3acc479a2 1350 /* Clear the selected SPI CRC Error (CRCERR) flag */
mbed_official 157:90e3acc479a2 1351 SPIx->SR = (uint16_t)~SPI_I2S_FLAG;
mbed_official 157:90e3acc479a2 1352 }
mbed_official 157:90e3acc479a2 1353
mbed_official 157:90e3acc479a2 1354 /**
mbed_official 157:90e3acc479a2 1355 * @brief Checks whether the specified SPI/I2S interrupt has occurred or not.
mbed_official 157:90e3acc479a2 1356 * @param SPIx: To select the SPIx/I2Sx peripheral, where x can be: 1, 2 or 3
mbed_official 157:90e3acc479a2 1357 * in SPI mode or 2 or 3 in I2S mode or I2Sxext for I2S full duplex mode.
mbed_official 157:90e3acc479a2 1358 * @param SPI_I2S_IT: specifies the SPI interrupt source to check.
mbed_official 157:90e3acc479a2 1359 * This parameter can be one of the following values:
mbed_official 157:90e3acc479a2 1360 * @arg SPI_I2S_IT_TXE: Transmit buffer empty interrupt.
mbed_official 157:90e3acc479a2 1361 * @arg SPI_I2S_IT_RXNE: Receive buffer not empty interrupt.
mbed_official 157:90e3acc479a2 1362 * @arg SPI_IT_MODF: Mode Fault interrupt.
mbed_official 157:90e3acc479a2 1363 * @arg SPI_I2S_IT_OVR: Overrun interrupt.
mbed_official 157:90e3acc479a2 1364 * @arg I2S_IT_UDR: Underrun interrupt.
mbed_official 157:90e3acc479a2 1365 * @arg SPI_I2S_IT_FRE: Format Error interrupt.
mbed_official 157:90e3acc479a2 1366 * @retval The new state of SPI_I2S_IT (SET or RESET).
mbed_official 157:90e3acc479a2 1367 */
mbed_official 157:90e3acc479a2 1368 ITStatus SPI_I2S_GetITStatus(SPI_TypeDef* SPIx, uint8_t SPI_I2S_IT)
mbed_official 157:90e3acc479a2 1369 {
mbed_official 157:90e3acc479a2 1370 ITStatus bitstatus = RESET;
mbed_official 157:90e3acc479a2 1371 uint16_t itpos = 0, itmask = 0, enablestatus = 0;
mbed_official 157:90e3acc479a2 1372
mbed_official 157:90e3acc479a2 1373 /* Check the parameters */
mbed_official 157:90e3acc479a2 1374 assert_param(IS_SPI_ALL_PERIPH_EXT(SPIx));
mbed_official 157:90e3acc479a2 1375 assert_param(IS_SPI_I2S_GET_IT(SPI_I2S_IT));
mbed_official 157:90e3acc479a2 1376
mbed_official 157:90e3acc479a2 1377 /* Get the SPI_I2S_IT index */
mbed_official 157:90e3acc479a2 1378 itpos = 0x01 << (SPI_I2S_IT & 0x0F);
mbed_official 157:90e3acc479a2 1379
mbed_official 157:90e3acc479a2 1380 /* Get the SPI_I2S_IT IT mask */
mbed_official 157:90e3acc479a2 1381 itmask = SPI_I2S_IT >> 4;
mbed_official 157:90e3acc479a2 1382
mbed_official 157:90e3acc479a2 1383 /* Set the IT mask */
mbed_official 157:90e3acc479a2 1384 itmask = 0x01 << itmask;
mbed_official 157:90e3acc479a2 1385
mbed_official 157:90e3acc479a2 1386 /* Get the SPI_I2S_IT enable bit status */
mbed_official 157:90e3acc479a2 1387 enablestatus = (SPIx->CR2 & itmask) ;
mbed_official 157:90e3acc479a2 1388
mbed_official 157:90e3acc479a2 1389 /* Check the status of the specified SPI interrupt */
mbed_official 157:90e3acc479a2 1390 if (((SPIx->SR & itpos) != (uint16_t)RESET) && enablestatus)
mbed_official 157:90e3acc479a2 1391 {
mbed_official 157:90e3acc479a2 1392 /* SPI_I2S_IT is set */
mbed_official 157:90e3acc479a2 1393 bitstatus = SET;
mbed_official 157:90e3acc479a2 1394 }
mbed_official 157:90e3acc479a2 1395 else
mbed_official 157:90e3acc479a2 1396 {
mbed_official 157:90e3acc479a2 1397 /* SPI_I2S_IT is reset */
mbed_official 157:90e3acc479a2 1398 bitstatus = RESET;
mbed_official 157:90e3acc479a2 1399 }
mbed_official 157:90e3acc479a2 1400 /* Return the SPI_I2S_IT status */
mbed_official 157:90e3acc479a2 1401 return bitstatus;
mbed_official 157:90e3acc479a2 1402 }
mbed_official 157:90e3acc479a2 1403
mbed_official 157:90e3acc479a2 1404 /**
mbed_official 157:90e3acc479a2 1405 * @}
mbed_official 157:90e3acc479a2 1406 */
mbed_official 157:90e3acc479a2 1407
mbed_official 157:90e3acc479a2 1408 /**
mbed_official 157:90e3acc479a2 1409 * @}
mbed_official 157:90e3acc479a2 1410 */
mbed_official 157:90e3acc479a2 1411
mbed_official 157:90e3acc479a2 1412 /**
mbed_official 157:90e3acc479a2 1413 * @}
mbed_official 157:90e3acc479a2 1414 */
mbed_official 157:90e3acc479a2 1415
mbed_official 157:90e3acc479a2 1416 /**
mbed_official 157:90e3acc479a2 1417 * @}
mbed_official 157:90e3acc479a2 1418 */
mbed_official 157:90e3acc479a2 1419
mbed_official 157:90e3acc479a2 1420 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/