shao ziyang / mbed-src-kl05

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targets/cmsis/TARGET_STM/TARGET_DISCO_F303VC/stm32f30x_hrtim.c@323:9e901b0a5aa1, 2014-09-13 (annotated)

Committer:
shaoziyang
Date:
Sat Sep 13 14:25:46 2014 +0000
Revision:
323:9e901b0a5aa1
Parent:
157:90e3acc479a2 
test with CLOCK_SETUP = 0

Who changed what in which revision?

UserRevisionLine numberNew contents of line
mbed_official 157:90e3acc479a2 1 /**
mbed_official 157:90e3acc479a2 2 ******************************************************************************
mbed_official 157:90e3acc479a2 3 * @file stm32f30x_hrtim.c
mbed_official 157:90e3acc479a2 4 * @author MCD Application Team
mbed_official 157:90e3acc479a2 5 * @version V1.1.0
mbed_official 157:90e3acc479a2 6 * @date 27-February-2014
mbed_official 157:90e3acc479a2 7 * @brief HRTIMx module driver.
mbed_official 157:90e3acc479a2 8 *
mbed_official 157:90e3acc479a2 9 * This file provides firmware functions to manage the following
mbed_official 157:90e3acc479a2 10 * functionalities of the HRTIMx peripheral:
mbed_official 157:90e3acc479a2 11 * + Initialization/de-initialization methods
mbed_official 157:90e3acc479a2 12 * + I/O operation methods
mbed_official 157:90e3acc479a2 13 * + Peripheral Control methods
mbed_official 157:90e3acc479a2 14 *
mbed_official 157:90e3acc479a2 15 @verbatim
mbed_official 157:90e3acc479a2 16 ================================================================================
mbed_official 157:90e3acc479a2 17 ##### <HRTIM specific features> #####
mbed_official 157:90e3acc479a2 18 ================================================================================
mbed_official 157:90e3acc479a2 19
mbed_official 157:90e3acc479a2 20 [..] < HRTIM introduction:
mbed_official 157:90e3acc479a2 21 (#) The high-resolution timer can generate up to 10 digital signals with
mbed_official 157:90e3acc479a2 22 highly accurate timings.
mbed_official 157:90e3acc479a2 23 It is primarily intended to drive power conversion systems such as
mbed_official 157:90e3acc479a2 24 switch mode power supplies or lighting systems,
mbed_official 157:90e3acc479a2 25 but can be of general purpose usage, whenever a very fine timing
mbed_official 157:90e3acc479a2 26 resolution is expected.
mbed_official 157:90e3acc479a2 27
mbed_official 157:90e3acc479a2 28 (#) Its modular architecture allows to generate either independent or
mbed_official 157:90e3acc479a2 29 coupled waveforms.
mbed_official 157:90e3acc479a2 30 The wave-shape is defined by self-contained timings
mbed_official 157:90e3acc479a2 31 (using counters and compare units) and a broad range of external events,
mbed_official 157:90e3acc479a2 32 such as analog or digital feedbacks and synchronisation signals.
mbed_official 157:90e3acc479a2 33 This allows to produce a large variety of control signal (PWM, phase-shifted,
mbed_official 157:90e3acc479a2 34 constant Ton,...) and address most of conversion topologies.
mbed_official 157:90e3acc479a2 35
mbed_official 157:90e3acc479a2 36 (#) For control and monitoring purposes, the timer has also timing measure
mbed_official 157:90e3acc479a2 37 capabilities and links to built-in ADC and DAC converters.
mbed_official 157:90e3acc479a2 38 Last, it features light-load management mode and is able to handle
mbed_official 157:90e3acc479a2 39 various fault schemes for safe shut-down purposes.
mbed_official 157:90e3acc479a2 40
mbed_official 157:90e3acc479a2 41
mbed_official 157:90e3acc479a2 42 ##### How to use this driver #####
mbed_official 157:90e3acc479a2 43 ================================================================================
mbed_official 157:90e3acc479a2 44 [..] This driver provides functions to configure and program the HRTIM
mbed_official 157:90e3acc479a2 45 of all stm32f33x devices.
mbed_official 157:90e3acc479a2 46 These functions are split in 9 groups:
mbed_official 157:90e3acc479a2 47
mbed_official 157:90e3acc479a2 48 (#) HRTIM Simple TimeBase management: this group includes all needed functions
mbed_official 157:90e3acc479a2 49 to configure the HRTIM Timebase unit:
mbed_official 157:90e3acc479a2 50 (++) Initializes the HRTIMx timer in simple time base mode
mbed_official 157:90e3acc479a2 51 (++) Start/Stop the time base generation
mbed_official 157:90e3acc479a2 52 (++) Deinitialize the HRTIM peripheral
mbed_official 157:90e3acc479a2 53
mbed_official 157:90e3acc479a2 54
mbed_official 157:90e3acc479a2 55 (#) HRTIM simple Output Compare management: this group includes all needed
mbed_official 157:90e3acc479a2 56 functions to configure the Compare unit used in Output compare mode:
mbed_official 157:90e3acc479a2 57 (++) Initializes the HRTIMx timer time base unit
mbed_official 157:90e3acc479a2 58 (++) Configure the compare unit in in simple Output Compare mode
mbed_official 157:90e3acc479a2 59 (++) Start/Stop the Output compare generation
mbed_official 157:90e3acc479a2 60
mbed_official 157:90e3acc479a2 61 (#) HRTIM simple PWM management: this group includes all needed
mbed_official 157:90e3acc479a2 62 functions to configure the Compare unit used in PWM mode:
mbed_official 157:90e3acc479a2 63 (++) Initializes the HRTIMx timer time base unit
mbed_official 157:90e3acc479a2 64 (++) Configure the compare unit in in simple PWM mode
mbed_official 157:90e3acc479a2 65 (++) Start/Stop the PWM generation
mbed_official 157:90e3acc479a2 66
mbed_official 157:90e3acc479a2 67 (#) HRTIM simple Capture management: this group includes all needed
mbed_official 157:90e3acc479a2 68 functions to configure the Capture unit used in Capture mode:
mbed_official 157:90e3acc479a2 69 (++) Initializes the HRTIMx timer time base unit
mbed_official 157:90e3acc479a2 70 (++) Configure the compare unit in in simple Capture mode
mbed_official 157:90e3acc479a2 71 (++) Start/Stop the Capture mode
mbed_official 157:90e3acc479a2 72
mbed_official 157:90e3acc479a2 73 (#) HRTIM simple One Pulse management: this group includes all needed
mbed_official 157:90e3acc479a2 74 functions to configure the Capture unit and Compare unit used in One Pulse mode:
mbed_official 157:90e3acc479a2 75 (++) Initializes the HRTIMx timer time base unit
mbed_official 157:90e3acc479a2 76 (++) Configure the compare unit and the capture unit in in simple One Pulse mode
mbed_official 157:90e3acc479a2 77 (++) Start/Stop the One Pulse mode generation
mbed_official 157:90e3acc479a2 78
mbed_official 157:90e3acc479a2 79 (#) HRTIM Waveform management: this group includes all needed
mbed_official 157:90e3acc479a2 80 functions to configure the HRTIM possible waveform mode:
mbed_official 157:90e3acc479a2 81 (++) Initializes the HRTIMx timer Master time base unit
mbed_official 157:90e3acc479a2 82 (++) Initializes the HRTIMx timer Slaves time base unit
mbed_official 157:90e3acc479a2 83 (++) Configures the HRTIMx timer Compare unit
mbed_official 157:90e3acc479a2 84 (++) Configures the HRTIMx Slave timer Capture unit
mbed_official 157:90e3acc479a2 85 (++) Configures the HRTIMx timer Output unit
mbed_official 157:90e3acc479a2 86 (++) Configures the HRTIMx timer DeadTime / Chopper / Burst features
mbed_official 157:90e3acc479a2 87 (++) Configures the HRTIMx timer Fault / External event features
mbed_official 157:90e3acc479a2 88 (++) Configures the HRTIMx timer Synchronization features: Internal/External connection, DACs,...
mbed_official 157:90e3acc479a2 89 (++) Configures the HRTIMx timer Synchronization features: ADCs Triggers
mbed_official 157:90e3acc479a2 90 (++) HRTIMx timer Outputs Start/Stop
mbed_official 157:90e3acc479a2 91 (++) Start/Stop the HRTIMx Timer counters
mbed_official 157:90e3acc479a2 92
mbed_official 157:90e3acc479a2 93 (#) HRTIM interrupts, DMA and flags management
mbed_official 157:90e3acc479a2 94 (++) Enable/Disable interrupt sources
mbed_official 157:90e3acc479a2 95 (++) Get flags status
mbed_official 157:90e3acc479a2 96 (++) Clear flags/ Pending bits
mbed_official 157:90e3acc479a2 97 (++) Enable/Disable DMA requests
mbed_official 157:90e3acc479a2 98 (++) Configure DMA burst mode
mbed_official 157:90e3acc479a2 99
mbed_official 157:90e3acc479a2 100 (#) TIM specific interface management, this group includes all
mbed_official 157:90e3acc479a2 101 needed functions to use the specific TIM interface:
mbed_official 157:90e3acc479a2 102 (++) HRTIMx timer DLL calibration
mbed_official 157:90e3acc479a2 103
mbed_official 157:90e3acc479a2 104 @endverbatim
mbed_official 157:90e3acc479a2 105 ******************************************************************************
mbed_official 157:90e3acc479a2 106 * @attention
mbed_official 157:90e3acc479a2 107 *
mbed_official 157:90e3acc479a2 108 * <h2><center>&copy; COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
mbed_official 157:90e3acc479a2 109 *
mbed_official 157:90e3acc479a2 110 * Redistribution and use in source and binary forms, with or without modification,
mbed_official 157:90e3acc479a2 111 * are permitted provided that the following conditions are met:
mbed_official 157:90e3acc479a2 112 * 1. Redistributions of source code must retain the above copyright notice,
mbed_official 157:90e3acc479a2 113 * this list of conditions and the following disclaimer.
mbed_official 157:90e3acc479a2 114 * 2. Redistributions in binary form must reproduce the above copyright notice,
mbed_official 157:90e3acc479a2 115 * this list of conditions and the following disclaimer in the documentation
mbed_official 157:90e3acc479a2 116 * and/or other materials provided with the distribution.
mbed_official 157:90e3acc479a2 117 * 3. Neither the name of STMicroelectronics nor the names of its contributors
mbed_official 157:90e3acc479a2 118 * may be used to endorse or promote products derived from this software
mbed_official 157:90e3acc479a2 119 * without specific prior written permission.
mbed_official 157:90e3acc479a2 120 *
mbed_official 157:90e3acc479a2 121 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
mbed_official 157:90e3acc479a2 122 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
mbed_official 157:90e3acc479a2 123 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
mbed_official 157:90e3acc479a2 124 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
mbed_official 157:90e3acc479a2 125 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
mbed_official 157:90e3acc479a2 126 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
mbed_official 157:90e3acc479a2 127 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
mbed_official 157:90e3acc479a2 128 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
mbed_official 157:90e3acc479a2 129 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
mbed_official 157:90e3acc479a2 130 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
mbed_official 157:90e3acc479a2 131 *
mbed_official 157:90e3acc479a2 132 ******************************************************************************
mbed_official 157:90e3acc479a2 133 */
mbed_official 157:90e3acc479a2 134 /* Includes ------------------------------------------------------------------*/
mbed_official 157:90e3acc479a2 135 #include "stm32f30x_hrtim.h"
mbed_official 157:90e3acc479a2 136
mbed_official 157:90e3acc479a2 137 /** @addtogroup STM32F30x_StdPeriph_Driver
mbed_official 157:90e3acc479a2 138 * @{
mbed_official 157:90e3acc479a2 139 */
mbed_official 157:90e3acc479a2 140
mbed_official 157:90e3acc479a2 141 /** @defgroup HRTIM
mbed_official 157:90e3acc479a2 142 * @brief HRTIM driver module
mbed_official 157:90e3acc479a2 143 * @{
mbed_official 157:90e3acc479a2 144 */
mbed_official 157:90e3acc479a2 145
mbed_official 157:90e3acc479a2 146 /* Private typedef -----------------------------------------------------------*/
mbed_official 157:90e3acc479a2 147 /* Private define ------------------------------------------------------------*/
mbed_official 157:90e3acc479a2 148 #define HRTIM_FLTR_FLTxEN (HRTIM_FLTR_FLT1EN |\
mbed_official 157:90e3acc479a2 149 HRTIM_FLTR_FLT2EN |\
mbed_official 157:90e3acc479a2 150 HRTIM_FLTR_FLT3EN |\
mbed_official 157:90e3acc479a2 151 HRTIM_FLTR_FLT4EN | \
mbed_official 157:90e3acc479a2 152 HRTIM_FLTR_FLT5EN)
mbed_official 157:90e3acc479a2 153
mbed_official 157:90e3acc479a2 154 #define HRTIM_TIMCR_TIMUPDATETRIGGER (HRTIM_TIMUPDATETRIGGER_MASTER |\
mbed_official 157:90e3acc479a2 155 HRTIM_TIMUPDATETRIGGER_TIMER_A |\
mbed_official 157:90e3acc479a2 156 HRTIM_TIMUPDATETRIGGER_TIMER_B |\
mbed_official 157:90e3acc479a2 157 HRTIM_TIMUPDATETRIGGER_TIMER_C |\
mbed_official 157:90e3acc479a2 158 HRTIM_TIMUPDATETRIGGER_TIMER_D |\
mbed_official 157:90e3acc479a2 159 HRTIM_TIMUPDATETRIGGER_TIMER_E)
mbed_official 157:90e3acc479a2 160
mbed_official 157:90e3acc479a2 161 #define HRTIM_TIM_OFFSET (uint32_t)0x00000080
mbed_official 157:90e3acc479a2 162 /* Private macro -------------------------------------------------------------*/
mbed_official 157:90e3acc479a2 163 /* Private variables ---------------------------------------------------------*/
mbed_official 157:90e3acc479a2 164 static uint32_t TimerIdxToTimerId[] =
mbed_official 157:90e3acc479a2 165 {
mbed_official 157:90e3acc479a2 166 HRTIM_TIMERID_TIMER_A,
mbed_official 157:90e3acc479a2 167 HRTIM_TIMERID_TIMER_B,
mbed_official 157:90e3acc479a2 168 HRTIM_TIMERID_TIMER_C,
mbed_official 157:90e3acc479a2 169 HRTIM_TIMERID_TIMER_D,
mbed_official 157:90e3acc479a2 170 HRTIM_TIMERID_TIMER_E,
mbed_official 157:90e3acc479a2 171 HRTIM_TIMERID_MASTER,
mbed_official 157:90e3acc479a2 172 };
mbed_official 157:90e3acc479a2 173
mbed_official 157:90e3acc479a2 174 /* Private function prototypes -----------------------------------------------*/
mbed_official 157:90e3acc479a2 175 /* Private functions ---------------------------------------------------------*/
mbed_official 157:90e3acc479a2 176 static void HRTIM_MasterBase_Config(HRTIM_TypeDef* HRTIMx, HRTIM_BaseInitTypeDef* HRTIM_BaseInitStruc);
mbed_official 157:90e3acc479a2 177 static void HRTIM_TimingUnitBase_Config(HRTIM_TypeDef * HRTIMx, uint32_t TimerIdx, HRTIM_BaseInitTypeDef* HRTIM_BaseInitStruct);
mbed_official 157:90e3acc479a2 178 static void HRTIM_MasterWaveform_Config(HRTIM_TypeDef * HRTIMx, HRTIM_TimerInitTypeDef * TimerInit);
mbed_official 157:90e3acc479a2 179 static void HRTIM_TimingUnitWaveform_Config(HRTIM_TypeDef * HRTIMx,
mbed_official 157:90e3acc479a2 180 uint32_t TimerIdx,
mbed_official 157:90e3acc479a2 181 HRTIM_TimerInitTypeDef * TimerInit);
mbed_official 157:90e3acc479a2 182 static void HRTIM_CompareUnitConfig(HRTIM_TypeDef * HRTIMx,
mbed_official 157:90e3acc479a2 183 uint32_t TimerIdx,
mbed_official 157:90e3acc479a2 184 uint32_t CompareUnit,
mbed_official 157:90e3acc479a2 185 HRTIM_CompareCfgTypeDef * CompareCfg);
mbed_official 157:90e3acc479a2 186 static void HRTIM_CaptureUnitConfig(HRTIM_TypeDef * HRTIMx,
mbed_official 157:90e3acc479a2 187 uint32_t TimerIdx,
mbed_official 157:90e3acc479a2 188 uint32_t CaptureUnit,
mbed_official 157:90e3acc479a2 189 uint32_t Event);
mbed_official 157:90e3acc479a2 190 static void HRTIM_OutputConfig(HRTIM_TypeDef * HRTIMx,
mbed_official 157:90e3acc479a2 191 uint32_t TimerIdx,
mbed_official 157:90e3acc479a2 192 uint32_t Output,
mbed_official 157:90e3acc479a2 193 HRTIM_OutputCfgTypeDef * OutputCfg);
mbed_official 157:90e3acc479a2 194 static void HRTIM_ExternalEventConfig(HRTIM_TypeDef * HRTIMx,
mbed_official 157:90e3acc479a2 195 uint32_t Event,
mbed_official 157:90e3acc479a2 196 HRTIM_EventCfgTypeDef * EventCfg);
mbed_official 157:90e3acc479a2 197 static void HRTIM_TIM_ResetConfig(HRTIM_TypeDef * HRTIMx,
mbed_official 157:90e3acc479a2 198 uint32_t TimerIdx,
mbed_official 157:90e3acc479a2 199 uint32_t Event);
mbed_official 157:90e3acc479a2 200 /** @defgroup HRTIM_Private_Functions
mbed_official 157:90e3acc479a2 201 * @{
mbed_official 157:90e3acc479a2 202 */
mbed_official 157:90e3acc479a2 203
mbed_official 157:90e3acc479a2 204 /** @defgroup HRTIM_Group1 Initialization/de-initialization methods
mbed_official 157:90e3acc479a2 205 * @brief Initialization and Configuration functions
mbed_official 157:90e3acc479a2 206 *
mbed_official 157:90e3acc479a2 207 @verbatim
mbed_official 157:90e3acc479a2 208 ===============================================================================
mbed_official 157:90e3acc479a2 209 ##### Initialization/de-initialization methods #####
mbed_official 157:90e3acc479a2 210 ===============================================================================
mbed_official 157:90e3acc479a2 211 [..] This section provides functions allowing to:
mbed_official 157:90e3acc479a2 212 (+)Initializes timer in basic time base mode
mbed_official 157:90e3acc479a2 213 (+)Initializes timer in basic OC mode
mbed_official 157:90e3acc479a2 214 (+)Initializes timer in basic PWM mode
mbed_official 157:90e3acc479a2 215 (+)Initializes timer in basic Capture mode
mbed_official 157:90e3acc479a2 216 (+)Initializes timer in One Pulse mode
mbed_official 157:90e3acc479a2 217 (+)Initializes a timer operating in waveform mode
mbed_official 157:90e3acc479a2 218 (+)De-initializes the HRTIMx timer
mbed_official 157:90e3acc479a2 219
mbed_official 157:90e3acc479a2 220 @endverbatim
mbed_official 157:90e3acc479a2 221 * @{
mbed_official 157:90e3acc479a2 222 */
mbed_official 157:90e3acc479a2 223
mbed_official 157:90e3acc479a2 224 /**
mbed_official 157:90e3acc479a2 225 * @brief Initializes the HRTIMx timer in basic time base mode
mbed_official 157:90e3acc479a2 226 * @param HRTIMx: pointer to HRTIMx peripheral
mbed_official 157:90e3acc479a2 227 * @param TimerIdx: Timer index
mbed_official 157:90e3acc479a2 228 * This parameter can be one of the following values:
mbed_official 157:90e3acc479a2 229 * @arg 0x0 for master timer
mbed_official 157:90e3acc479a2 230 * @arg 0x1 to 0x5 for timers A to E
mbed_official 157:90e3acc479a2 231 * @note The time-base unit initialization parameters specify:
mbed_official 157:90e3acc479a2 232 * The timer counter operating mode (continuous, one shot)
mbed_official 157:90e3acc479a2 233 * The timer clock prescaler
mbed_official 157:90e3acc479a2 234 * The timer period
mbed_official 157:90e3acc479a2 235 * The timer repetition counter.
mbed_official 157:90e3acc479a2 236 * @retval None
mbed_official 157:90e3acc479a2 237 */
mbed_official 157:90e3acc479a2 238 void HRTIM_SimpleBase_Init(HRTIM_TypeDef* HRTIMx, uint32_t TimerIdx, HRTIM_BaseInitTypeDef* HRTIM_BaseInitStruct)
mbed_official 157:90e3acc479a2 239 {
mbed_official 157:90e3acc479a2 240 /* Check the parameters */
mbed_official 157:90e3acc479a2 241 assert_param(IS_HRTIM_TIMERINDEX(TimerIdx));
mbed_official 157:90e3acc479a2 242 assert_param(IS_HRTIM_MODE(HRTIM_BaseInitStruct->Mode));
mbed_official 157:90e3acc479a2 243
mbed_official 157:90e3acc479a2 244 if (TimerIdx == HRTIM_TIMERINDEX_MASTER)
mbed_official 157:90e3acc479a2 245 {
mbed_official 157:90e3acc479a2 246 /* Configure master timer */
mbed_official 157:90e3acc479a2 247 HRTIM_MasterBase_Config(HRTIMx, HRTIM_BaseInitStruct);
mbed_official 157:90e3acc479a2 248 }
mbed_official 157:90e3acc479a2 249 else
mbed_official 157:90e3acc479a2 250 {
mbed_official 157:90e3acc479a2 251 /* Configure timing unit */
mbed_official 157:90e3acc479a2 252 HRTIM_TimingUnitBase_Config(HRTIMx, TimerIdx, HRTIM_BaseInitStruct);
mbed_official 157:90e3acc479a2 253 }
mbed_official 157:90e3acc479a2 254 }
mbed_official 157:90e3acc479a2 255
mbed_official 157:90e3acc479a2 256 /**
mbed_official 157:90e3acc479a2 257 * @brief De-initializes a timer operating in all mode
mbed_official 157:90e3acc479a2 258 * @param HRTIMx: pointer to HRTIMx peripheral
mbed_official 157:90e3acc479a2 259 * @retval None
mbed_official 157:90e3acc479a2 260 */
mbed_official 157:90e3acc479a2 261 void HRTIM_DeInit(HRTIM_TypeDef* HRTIMx)
mbed_official 157:90e3acc479a2 262 {
mbed_official 157:90e3acc479a2 263 /* Check the parameters */
mbed_official 157:90e3acc479a2 264 RCC_APB2PeriphResetCmd(RCC_APB2Periph_HRTIM1, ENABLE);
mbed_official 157:90e3acc479a2 265 RCC_APB2PeriphResetCmd(RCC_APB2Periph_HRTIM1, DISABLE);
mbed_official 157:90e3acc479a2 266 }
mbed_official 157:90e3acc479a2 267
mbed_official 157:90e3acc479a2 268 /**
mbed_official 157:90e3acc479a2 269 * @brief Initializes the HRTIMx timer in basic output compare mode
mbed_official 157:90e3acc479a2 270 * @param HRTIMx: pointer to HRTIMx peripheral
mbed_official 157:90e3acc479a2 271 * @param TimerIdx: Timer index
mbed_official 157:90e3acc479a2 272 * This parameter can be one of the following values:
mbed_official 157:90e3acc479a2 273 * @arg 0x1 to 0x5 for timers A to E
mbed_official 157:90e3acc479a2 274 * @note Initializes the time-base unit of the timer and prepare it to
mbed_official 157:90e3acc479a2 275 * operate in output compare mode
mbed_official 157:90e3acc479a2 276 * @retval None
mbed_official 157:90e3acc479a2 277 */
mbed_official 157:90e3acc479a2 278 void HRTIM_SimpleOC_Init(HRTIM_TypeDef * HRTIMx, uint32_t TimerIdx, HRTIM_BaseInitTypeDef* HRTIM_BaseInitStruct)
mbed_official 157:90e3acc479a2 279 {
mbed_official 157:90e3acc479a2 280 /* Check the parameters */
mbed_official 157:90e3acc479a2 281 assert_param(IS_HRTIM_TIMERINDEX(TimerIdx));
mbed_official 157:90e3acc479a2 282 assert_param(IS_HRTIM_MODE(HRTIM_BaseInitStruct->Mode));
mbed_official 157:90e3acc479a2 283
mbed_official 157:90e3acc479a2 284 /* Configure timing unit */
mbed_official 157:90e3acc479a2 285 HRTIM_TimingUnitBase_Config(HRTIMx, TimerIdx, HRTIM_BaseInitStruct);
mbed_official 157:90e3acc479a2 286 }
mbed_official 157:90e3acc479a2 287
mbed_official 157:90e3acc479a2 288 /**
mbed_official 157:90e3acc479a2 289 * @brief Initializes the HRTIMx timer in basic PWM mode
mbed_official 157:90e3acc479a2 290 * @param HRTIMx: pointer to HRTIMx peripheral
mbed_official 157:90e3acc479a2 291 * @param TimerIdx: Timer index
mbed_official 157:90e3acc479a2 292 * This parameter can be one of the following values:
mbed_official 157:90e3acc479a2 293 * @arg 0x1 to 0x5 for timers A to E
mbed_official 157:90e3acc479a2 294 * @note Initializes the time-base unit of the timer and prepare it to
mbed_official 157:90e3acc479a2 295 * operate in capture mode
mbed_official 157:90e3acc479a2 296 * @retval None
mbed_official 157:90e3acc479a2 297 */
mbed_official 157:90e3acc479a2 298 void HRTIM_SimplePWM_Init(HRTIM_TypeDef * HRTIMx, uint32_t TimerIdx, HRTIM_BaseInitTypeDef* HRTIM_BaseInitStruct)
mbed_official 157:90e3acc479a2 299 {
mbed_official 157:90e3acc479a2 300 /* Check the parameters */
mbed_official 157:90e3acc479a2 301 assert_param(IS_HRTIM_TIMERINDEX(TimerIdx));
mbed_official 157:90e3acc479a2 302 assert_param(IS_HRTIM_MODE(HRTIM_BaseInitStruct->Mode));
mbed_official 157:90e3acc479a2 303
mbed_official 157:90e3acc479a2 304 /* Configure timing unit */
mbed_official 157:90e3acc479a2 305 HRTIM_TimingUnitBase_Config(HRTIMx, TimerIdx, HRTIM_BaseInitStruct);
mbed_official 157:90e3acc479a2 306 }
mbed_official 157:90e3acc479a2 307
mbed_official 157:90e3acc479a2 308 /**
mbed_official 157:90e3acc479a2 309 * @brief Initializes a timer operating in basic capture mode
mbed_official 157:90e3acc479a2 310 * @param HRTIMx: pointer to HRTIMx peripheral
mbed_official 157:90e3acc479a2 311 * @param TimerIdx: Timer index
mbed_official 157:90e3acc479a2 312 * This parameter can be one of the following values:
mbed_official 157:90e3acc479a2 313 * @arg 0x1 to 0x5 for timers A to E
mbed_official 157:90e3acc479a2 314 * @retval None
mbed_official 157:90e3acc479a2 315 */
mbed_official 157:90e3acc479a2 316 void HRTIM_SimpleCapture_Init(HRTIM_TypeDef * HRTIMx, uint32_t TimerIdx, HRTIM_BaseInitTypeDef* HRTIM_BaseInitStruct)
mbed_official 157:90e3acc479a2 317 {
mbed_official 157:90e3acc479a2 318 /* Check the parameters */
mbed_official 157:90e3acc479a2 319 assert_param(IS_HRTIM_TIMERINDEX(TimerIdx));
mbed_official 157:90e3acc479a2 320 assert_param(IS_HRTIM_MODE(HRTIM_BaseInitStruct->Mode));
mbed_official 157:90e3acc479a2 321
mbed_official 157:90e3acc479a2 322 /* Configure timing unit */
mbed_official 157:90e3acc479a2 323 HRTIM_TimingUnitBase_Config(HRTIMx, TimerIdx, HRTIM_BaseInitStruct);
mbed_official 157:90e3acc479a2 324 }
mbed_official 157:90e3acc479a2 325
mbed_official 157:90e3acc479a2 326 /**
mbed_official 157:90e3acc479a2 327 * @brief Initializes the HRTIMx timer in basic one pulse mode
mbed_official 157:90e3acc479a2 328 * @param HRTIMx: pointer to HRTIMx peripheral
mbed_official 157:90e3acc479a2 329 * @param TimerIdx: Timer index
mbed_official 157:90e3acc479a2 330 * This parameter can be one of the following values:
mbed_official 157:90e3acc479a2 331 * @arg 0x1 to 0x5 for timers A to E
mbed_official 157:90e3acc479a2 332 * @note Initializes the time-base unit of the timer and prepare it to
mbed_official 157:90e3acc479a2 333 * operate in one pulse mode. In this mode the counter operates
mbed_official 157:90e3acc479a2 334 * in single shot mode (retriggerable or not)
mbed_official 157:90e3acc479a2 335 * @retval None
mbed_official 157:90e3acc479a2 336 */
mbed_official 157:90e3acc479a2 337 void HRTIM_SimpleOnePulse_Init(HRTIM_TypeDef * HRTIMx, uint32_t TimerIdx, HRTIM_BaseInitTypeDef* HRTIM_BaseInitStruct)
mbed_official 157:90e3acc479a2 338 {
mbed_official 157:90e3acc479a2 339 /* Check the parameters */
mbed_official 157:90e3acc479a2 340 assert_param(IS_HRTIM_TIMERINDEX(TimerIdx));
mbed_official 157:90e3acc479a2 341 assert_param(IS_HRTIM_MODE(HRTIM_BaseInitStruct->Mode));
mbed_official 157:90e3acc479a2 342
mbed_official 157:90e3acc479a2 343 /* Configure timing unit */
mbed_official 157:90e3acc479a2 344 HRTIM_TimingUnitBase_Config(HRTIMx, TimerIdx, HRTIM_BaseInitStruct);
mbed_official 157:90e3acc479a2 345 }
mbed_official 157:90e3acc479a2 346
mbed_official 157:90e3acc479a2 347 /**
mbed_official 157:90e3acc479a2 348 * @brief Initializes a timer operating in waveform mode
mbed_official 157:90e3acc479a2 349 * @param HRTIMx: pointer to HRTIMx peripheral
mbed_official 157:90e3acc479a2 350 * @param TimerIdx: Timer index
mbed_official 157:90e3acc479a2 351 * This parameter can be one of the following values:
mbed_official 157:90e3acc479a2 352 * @arg 0x0 for master timer
mbed_official 157:90e3acc479a2 353 * @arg 0x1 to 0x5 for timers A to E
mbed_official 157:90e3acc479a2 354 * @param pTimerInit: pointer to the timer initialization data structure
mbed_official 157:90e3acc479a2 355 * @retval None
mbed_official 157:90e3acc479a2 356 */
mbed_official 157:90e3acc479a2 357 void HRTIM_Waveform_Init(HRTIM_TypeDef * HRTIMx,
mbed_official 157:90e3acc479a2 358 uint32_t TimerIdx,
mbed_official 157:90e3acc479a2 359 HRTIM_BaseInitTypeDef* HRTIM_BaseInitStruct,
mbed_official 157:90e3acc479a2 360 HRTIM_TimerInitTypeDef* HRTIM_TimerInitStruct)
mbed_official 157:90e3acc479a2 361 {
mbed_official 157:90e3acc479a2 362 /* Check the parameters */
mbed_official 157:90e3acc479a2 363 assert_param(IS_HRTIM_HALFMODE(HRTIM_TimerInitStruct->HalfModeEnable));
mbed_official 157:90e3acc479a2 364 assert_param(IS_HRTIM_SYNCSTART(HRTIM_TimerInitStruct->StartOnSync));
mbed_official 157:90e3acc479a2 365 assert_param(IS_HRTIM_SYNCRESET(HRTIM_TimerInitStruct->ResetOnSync));
mbed_official 157:90e3acc479a2 366 assert_param(IS_HRTIM_DACSYNC(HRTIM_TimerInitStruct->DACSynchro));
mbed_official 157:90e3acc479a2 367 assert_param(IS_HRTIM_PRELOAD(HRTIM_TimerInitStruct->PreloadEnable));
mbed_official 157:90e3acc479a2 368 assert_param(IS_HRTIM_TIMERBURSTMODE(HRTIM_TimerInitStruct->BurstMode));
mbed_official 157:90e3acc479a2 369 assert_param(IS_HRTIM_UPDATEONREPETITION(HRTIM_TimerInitStruct->RepetitionUpdate));
mbed_official 157:90e3acc479a2 370
mbed_official 157:90e3acc479a2 371 if (TimerIdx == HRTIM_TIMERINDEX_MASTER)
mbed_official 157:90e3acc479a2 372 {
mbed_official 157:90e3acc479a2 373 /* Check parameters */
mbed_official 157:90e3acc479a2 374 assert_param(IS_HRTIM_UPDATEGATING_MASTER(HRTIM_TimerInitStruct->UpdateGating));
mbed_official 157:90e3acc479a2 375
mbed_official 157:90e3acc479a2 376 /* Configure master timer */
mbed_official 157:90e3acc479a2 377 HRTIM_MasterBase_Config(HRTIMx, HRTIM_BaseInitStruct);
mbed_official 157:90e3acc479a2 378 HRTIM_MasterWaveform_Config(HRTIMx, HRTIM_TimerInitStruct);
mbed_official 157:90e3acc479a2 379 }
mbed_official 157:90e3acc479a2 380 else
mbed_official 157:90e3acc479a2 381 {
mbed_official 157:90e3acc479a2 382 /* Check parameters */
mbed_official 157:90e3acc479a2 383 assert_param(IS_HRTIM_UPDATEGATING_TIM(HRTIM_TimerInitStruct->UpdateGating));
mbed_official 157:90e3acc479a2 384
mbed_official 157:90e3acc479a2 385 /* Configure timing unit */
mbed_official 157:90e3acc479a2 386 HRTIM_TimingUnitBase_Config(HRTIMx, TimerIdx, HRTIM_BaseInitStruct);
mbed_official 157:90e3acc479a2 387 HRTIM_TimingUnitWaveform_Config(HRTIMx, TimerIdx, HRTIM_TimerInitStruct);
mbed_official 157:90e3acc479a2 388 }
mbed_official 157:90e3acc479a2 389 }
mbed_official 157:90e3acc479a2 390
mbed_official 157:90e3acc479a2 391 /**
mbed_official 157:90e3acc479a2 392 * @}
mbed_official 157:90e3acc479a2 393 */
mbed_official 157:90e3acc479a2 394
mbed_official 157:90e3acc479a2 395 /** @defgroup HRTIM_Group2 I/O operation methods
mbed_official 157:90e3acc479a2 396 * @brief Data transfers functions
mbed_official 157:90e3acc479a2 397 *
mbed_official 157:90e3acc479a2 398 @verbatim
mbed_official 157:90e3acc479a2 399 ===============================================================================
mbed_official 157:90e3acc479a2 400 ##### IO operation methods #####
mbed_official 157:90e3acc479a2 401 ===============================================================================
mbed_official 157:90e3acc479a2 402 [..]
mbed_official 157:90e3acc479a2 403 This subsection provides a set of functions allowing to manage the HRTIMx data
mbed_official 157:90e3acc479a2 404 transfers.
mbed_official 157:90e3acc479a2 405 (+) Starts the DLL calibration.
mbed_official 157:90e3acc479a2 406 (+) Starts / stops the counter of a timer operating in basic time base mode
mbed_official 157:90e3acc479a2 407 (+) Starts / stops the output compare signal generation on the designed timer output
mbed_official 157:90e3acc479a2 408 (+) Starts / stops the PWM output signal generation on the designed timer output
mbed_official 157:90e3acc479a2 409 (+) Enables / disables a basic capture on the designed capture unit
mbed_official 157:90e3acc479a2 410
mbed_official 157:90e3acc479a2 411 @endverbatim
mbed_official 157:90e3acc479a2 412 * @{
mbed_official 157:90e3acc479a2 413 */
mbed_official 157:90e3acc479a2 414
mbed_official 157:90e3acc479a2 415 /**
mbed_official 157:90e3acc479a2 416 * @brief Starts the DLL calibration
mbed_official 157:90e3acc479a2 417 * @param HRTIMx: pointer to HRTIMx peripheral
mbed_official 157:90e3acc479a2 418 * @param CalibrationRate: DLL calibration period
mbed_official 157:90e3acc479a2 419 * This parameter can be one of the following values:
mbed_official 157:90e3acc479a2 420 * @arg HRTIM_CALIBRATIONRATE_7300: 7.3 ms
mbed_official 157:90e3acc479a2 421 * @arg HRTIM_CALIBRATIONRATE_910: 910 us
mbed_official 157:90e3acc479a2 422 * @arg HRTIM_CALIBRATIONRATE_114: 114 us
mbed_official 157:90e3acc479a2 423 * @arg HRTIM_CALIBRATIONRATE_14: 14 us
mbed_official 157:90e3acc479a2 424 * @retval None
mbed_official 157:90e3acc479a2 425 */
mbed_official 157:90e3acc479a2 426 void HRTIM_DLLCalibrationStart(HRTIM_TypeDef * HRTIMx, uint32_t CalibrationRate)
mbed_official 157:90e3acc479a2 427 {
mbed_official 157:90e3acc479a2 428 uint32_t HRTIM_dllcr;
mbed_official 157:90e3acc479a2 429
mbed_official 157:90e3acc479a2 430 /* Check the parameters */
mbed_official 157:90e3acc479a2 431 assert_param(IS_HRTIM_CALIBRATIONRATE(CalibrationRate));
mbed_official 157:90e3acc479a2 432
mbed_official 157:90e3acc479a2 433 /* Configure DLL Calibration */
mbed_official 157:90e3acc479a2 434 HRTIM_dllcr = (HRTIMx->HRTIM_COMMON).DLLCR;
mbed_official 157:90e3acc479a2 435
mbed_official 157:90e3acc479a2 436 /* Set the Calibration rate */
mbed_official 157:90e3acc479a2 437 HRTIM_dllcr &= ~(HRTIM_DLLCR_CALRTE);
mbed_official 157:90e3acc479a2 438 HRTIM_dllcr |= CalibrationRate;
mbed_official 157:90e3acc479a2 439
mbed_official 157:90e3acc479a2 440 /* Start DLL calibration */
mbed_official 157:90e3acc479a2 441 HRTIM_dllcr |= HRTIM_DLLCR_CAL;
mbed_official 157:90e3acc479a2 442
mbed_official 157:90e3acc479a2 443 /* Update HRTIMx register */
mbed_official 157:90e3acc479a2 444 (HRTIMx->HRTIM_COMMON).DLLCR = HRTIM_dllcr;
mbed_official 157:90e3acc479a2 445
mbed_official 157:90e3acc479a2 446 }
mbed_official 157:90e3acc479a2 447 /**
mbed_official 157:90e3acc479a2 448 * @brief Starts the counter of a timer operating in basic time base mode
mbed_official 157:90e3acc479a2 449 * @param HRTIMx: pointer to HRTIM peripheral
mbed_official 157:90e3acc479a2 450 * @param TimerIdx: Timer index
mbed_official 157:90e3acc479a2 451 * This parameter can be one of the following values:
mbed_official 157:90e3acc479a2 452 * @arg 0x5 for master timer
mbed_official 157:90e3acc479a2 453 * @arg 0x0 to 0x4 for timers A to E
mbed_official 157:90e3acc479a2 454 * @retval None
mbed_official 157:90e3acc479a2 455 */
mbed_official 157:90e3acc479a2 456 void HRTIM_SimpleBaseStart(HRTIM_TypeDef * HRTIMx, uint32_t TimerIdx)
mbed_official 157:90e3acc479a2 457 {
mbed_official 157:90e3acc479a2 458 /* Check the parameters */
mbed_official 157:90e3acc479a2 459 assert_param(IS_HRTIM_TIMERINDEX(TimerIdx));
mbed_official 157:90e3acc479a2 460
mbed_official 157:90e3acc479a2 461 /* Enable the timer counter */
mbed_official 157:90e3acc479a2 462 __HRTIM_ENABLE(HRTIMx, TimerIdxToTimerId[TimerIdx]);
mbed_official 157:90e3acc479a2 463 }
mbed_official 157:90e3acc479a2 464
mbed_official 157:90e3acc479a2 465 /**
mbed_official 157:90e3acc479a2 466 * @brief Stops the counter of a timer operating in basic time base mode
mbed_official 157:90e3acc479a2 467 * @param HRTIMx: pointer to HRTIM peripheral
mbed_official 157:90e3acc479a2 468 * @param TimerIdx: Timer index
mbed_official 157:90e3acc479a2 469 * This parameter can be one of the following values:
mbed_official 157:90e3acc479a2 470 * @arg 0x5 for master timer
mbed_official 157:90e3acc479a2 471 * @arg 0x0 to 0x4 for timers A to E
mbed_official 157:90e3acc479a2 472 * @retval None
mbed_official 157:90e3acc479a2 473 */
mbed_official 157:90e3acc479a2 474 void HRTIM_SimpleBaseStop(HRTIM_TypeDef * HRTIMx, uint32_t TimerIdx)
mbed_official 157:90e3acc479a2 475 {
mbed_official 157:90e3acc479a2 476 /* Check the parameters */
mbed_official 157:90e3acc479a2 477 assert_param(IS_HRTIM_TIMERINDEX(TimerIdx));
mbed_official 157:90e3acc479a2 478
mbed_official 157:90e3acc479a2 479 /* Disable the timer counter */
mbed_official 157:90e3acc479a2 480 __HRTIM_DISABLE(HRTIMx, TimerIdxToTimerId[TimerIdx]);
mbed_official 157:90e3acc479a2 481 }
mbed_official 157:90e3acc479a2 482
mbed_official 157:90e3acc479a2 483 /**
mbed_official 157:90e3acc479a2 484 * @brief Starts the output compare signal generation on the designed timer output
mbed_official 157:90e3acc479a2 485 * @param HRTIMx: pointer to HRTIM peripheral
mbed_official 157:90e3acc479a2 486 * @param TimerIdx: Timer index
mbed_official 157:90e3acc479a2 487 * This parameter can be one of the following values:
mbed_official 157:90e3acc479a2 488 * @arg 0x0 to 0x4 for timers A to E
mbed_official 157:90e3acc479a2 489 * @param OCChannel: Timer output
mbed_official 157:90e3acc479a2 490 * This parameter can be one of the following values:
mbed_official 157:90e3acc479a2 491 * @arg HRTIM_OUTPUT_TA1: Timer A - Output 1
mbed_official 157:90e3acc479a2 492 * @arg HRTIM_OUTPUT_TA2: Timer A - Output 2
mbed_official 157:90e3acc479a2 493 * @arg HRTIM_OUTPUT_TB1: Timer B - Output 1
mbed_official 157:90e3acc479a2 494 * @arg HRTIM_OUTPUT_TB2: Timer B - Output 2
mbed_official 157:90e3acc479a2 495 * @arg HRTIM_OUTPUT_TC1: Timer C - Output 1
mbed_official 157:90e3acc479a2 496 * @arg HRTIM_OUTPUT_TC2: Timer C - Output 2
mbed_official 157:90e3acc479a2 497 * @arg HRTIM_OUTPUT_TD1: Timer D - Output 1
mbed_official 157:90e3acc479a2 498 * @arg HRTIM_OUTPUT_TD2: Timer D - Output 2
mbed_official 157:90e3acc479a2 499 * @arg HRTIM_OUTPUT_TE1: Timer E - Output 1
mbed_official 157:90e3acc479a2 500 * @arg HRTIM_OUTPUT_TE2: Timer E - Output 2
mbed_official 157:90e3acc479a2 501 * @retval None
mbed_official 157:90e3acc479a2 502 */
mbed_official 157:90e3acc479a2 503 void HRTIM_SimpleOCStart(HRTIM_TypeDef * HRTIMx,
mbed_official 157:90e3acc479a2 504 uint32_t TimerIdx,
mbed_official 157:90e3acc479a2 505 uint32_t OCChannel)
mbed_official 157:90e3acc479a2 506 {
mbed_official 157:90e3acc479a2 507 /* Check the parameters */
mbed_official 157:90e3acc479a2 508 assert_param(IS_HRTIM_TIMER_OUTPUT(TimerIdx, OCChannel));
mbed_official 157:90e3acc479a2 509
mbed_official 157:90e3acc479a2 510 /* Enable the timer output */
mbed_official 157:90e3acc479a2 511 (HRTIMx->HRTIM_COMMON).OENR |= OCChannel;
mbed_official 157:90e3acc479a2 512
mbed_official 157:90e3acc479a2 513 /* Enable the timer counter */
mbed_official 157:90e3acc479a2 514 __HRTIM_ENABLE(HRTIMx, TimerIdxToTimerId[TimerIdx]);
mbed_official 157:90e3acc479a2 515
mbed_official 157:90e3acc479a2 516 }
mbed_official 157:90e3acc479a2 517
mbed_official 157:90e3acc479a2 518 /**
mbed_official 157:90e3acc479a2 519 * @brief Stops the output compare signal generation on the designed timer output
mbed_official 157:90e3acc479a2 520 * @param HRTIMx: pointer to HRTIM peripheral
mbed_official 157:90e3acc479a2 521 * @param TimerIdx: Timer index
mbed_official 157:90e3acc479a2 522 * This parameter can be one of the following values:
mbed_official 157:90e3acc479a2 523 * @arg 0x0 to 0x4 for timers A to E
mbed_official 157:90e3acc479a2 524 * @param OCChannel: Timer output
mbed_official 157:90e3acc479a2 525 * This parameter can be one of the following values:
mbed_official 157:90e3acc479a2 526 * @arg HRTIM_OUTPUT_TA1: Timer A - Output 1
mbed_official 157:90e3acc479a2 527 * @arg HRTIM_OUTPUT_TA2: Timer A - Output 2
mbed_official 157:90e3acc479a2 528 * @arg HRTIM_OUTPUT_TB1: Timer B - Output 1
mbed_official 157:90e3acc479a2 529 * @arg HRTIM_OUTPUT_TB2: Timer B - Output 2
mbed_official 157:90e3acc479a2 530 * @arg HRTIM_OUTPUT_TC1: Timer C - Output 1
mbed_official 157:90e3acc479a2 531 * @arg HRTIM_OUTPUT_TC2: Timer C - Output 2
mbed_official 157:90e3acc479a2 532 * @arg HRTIM_OUTPUT_TD1: Timer D - Output 1
mbed_official 157:90e3acc479a2 533 * @arg HRTIM_OUTPUT_TD2: Timer D - Output 2
mbed_official 157:90e3acc479a2 534 * @arg HRTIM_OUTPUT_TE1: Timer E - Output 1
mbed_official 157:90e3acc479a2 535 * @arg HRTIM_OUTPUT_TE2: Timer E - Output 2
mbed_official 157:90e3acc479a2 536 * @retval None
mbed_official 157:90e3acc479a2 537 */
mbed_official 157:90e3acc479a2 538 void HRTIM_SimpleOCStop(HRTIM_TypeDef * HRTIMx,
mbed_official 157:90e3acc479a2 539 uint32_t TimerIdx,
mbed_official 157:90e3acc479a2 540 uint32_t OCChannel)
mbed_official 157:90e3acc479a2 541 {
mbed_official 157:90e3acc479a2 542 /* Check the parameters */
mbed_official 157:90e3acc479a2 543 assert_param(IS_HRTIM_TIMER_OUTPUT(TimerIdx, OCChannel));
mbed_official 157:90e3acc479a2 544
mbed_official 157:90e3acc479a2 545 /* Disable the timer output */
mbed_official 157:90e3acc479a2 546 HRTIMx->HRTIM_COMMON.DISR |= OCChannel;
mbed_official 157:90e3acc479a2 547
mbed_official 157:90e3acc479a2 548 /* Disable the timer counter */
mbed_official 157:90e3acc479a2 549 __HRTIM_DISABLE(HRTIMx, TimerIdxToTimerId[TimerIdx]);
mbed_official 157:90e3acc479a2 550 }
mbed_official 157:90e3acc479a2 551
mbed_official 157:90e3acc479a2 552 /**
mbed_official 157:90e3acc479a2 553 * @brief Starts the PWM output signal generation on the designed timer output
mbed_official 157:90e3acc479a2 554 * @param HRTIMx: pointer to HRTIM peripheral
mbed_official 157:90e3acc479a2 555 * @param TimerIdx: Timer index
mbed_official 157:90e3acc479a2 556 * This parameter can be one of the following values:
mbed_official 157:90e3acc479a2 557 * @arg 0x0 to 0x4 for timers A to E
mbed_official 157:90e3acc479a2 558 * @param PWMChannel: Timer output
mbed_official 157:90e3acc479a2 559 * This parameter can be one of the following values:
mbed_official 157:90e3acc479a2 560 * @arg HRTIM_OUTPUT_TA1: Timer A - Output 1
mbed_official 157:90e3acc479a2 561 * @arg HRTIM_OUTPUT_TA2: Timer A - Output 2
mbed_official 157:90e3acc479a2 562 * @arg HRTIM_OUTPUT_TB1: Timer B - Output 1
mbed_official 157:90e3acc479a2 563 * @arg HRTIM_OUTPUT_TB2: Timer B - Output 2
mbed_official 157:90e3acc479a2 564 * @arg HRTIM_OUTPUT_TC1: Timer C - Output 1
mbed_official 157:90e3acc479a2 565 * @arg HRTIM_OUTPUT_TC2: Timer C - Output 2
mbed_official 157:90e3acc479a2 566 * @arg HRTIM_OUTPUT_TD1: Timer D - Output 1
mbed_official 157:90e3acc479a2 567 * @arg HRTIM_OUTPUT_TD2: Timer D - Output 2
mbed_official 157:90e3acc479a2 568 * @arg HRTIM_OUTPUT_TE1: Timer E - Output 1
mbed_official 157:90e3acc479a2 569 * @arg HRTIM_OUTPUT_TE2: Timer E - Output 2
mbed_official 157:90e3acc479a2 570 * @retval None
mbed_official 157:90e3acc479a2 571 */
mbed_official 157:90e3acc479a2 572 void HRTIM_SimplePWMStart(HRTIM_TypeDef * HRTIMx,
mbed_official 157:90e3acc479a2 573 uint32_t TimerIdx,
mbed_official 157:90e3acc479a2 574 uint32_t PWMChannel)
mbed_official 157:90e3acc479a2 575 {
mbed_official 157:90e3acc479a2 576 /* Check the parameters */
mbed_official 157:90e3acc479a2 577 assert_param(IS_HRTIM_TIMER_OUTPUT(TimerIdx, PWMChannel));
mbed_official 157:90e3acc479a2 578
mbed_official 157:90e3acc479a2 579 /* Enable the timer output */
mbed_official 157:90e3acc479a2 580 HRTIMx->HRTIM_COMMON.OENR |= PWMChannel;
mbed_official 157:90e3acc479a2 581
mbed_official 157:90e3acc479a2 582 /* Enable the timer counter */
mbed_official 157:90e3acc479a2 583 __HRTIM_ENABLE(HRTIMx, TimerIdxToTimerId[TimerIdx]);
mbed_official 157:90e3acc479a2 584 }
mbed_official 157:90e3acc479a2 585
mbed_official 157:90e3acc479a2 586 /**
mbed_official 157:90e3acc479a2 587 * @brief Stops the PWM output signal generation on the designed timer output
mbed_official 157:90e3acc479a2 588 * @param HRTIMx: pointer to HRTIM peripheral
mbed_official 157:90e3acc479a2 589 * @param TimerIdx: Timer index
mbed_official 157:90e3acc479a2 590 * This parameter can be one of the following values:
mbed_official 157:90e3acc479a2 591 * @arg 0x0 to 0x4 for timers A to E
mbed_official 157:90e3acc479a2 592 * @param PWMChannel: Timer output
mbed_official 157:90e3acc479a2 593 * This parameter can be one of the following values:
mbed_official 157:90e3acc479a2 594 * @arg HRTIM_OUTPUT_TA1: Timer A - Output 1
mbed_official 157:90e3acc479a2 595 * @arg HRTIM_OUTPUT_TA2: Timer A - Output 2
mbed_official 157:90e3acc479a2 596 * @arg HRTIM_OUTPUT_TB1: Timer B - Output 1
mbed_official 157:90e3acc479a2 597 * @arg HRTIM_OUTPUT_TB2: Timer B - Output 2
mbed_official 157:90e3acc479a2 598 * @arg HRTIM_OUTPUT_TC1: Timer C - Output 1
mbed_official 157:90e3acc479a2 599 * @arg HRTIM_OUTPUT_TC2: Timer C - Output 2
mbed_official 157:90e3acc479a2 600 * @arg HRTIM_OUTPUT_TD1: Timer D - Output 1
mbed_official 157:90e3acc479a2 601 * @arg HRTIM_OUTPUT_TD2: Timer D - Output 2
mbed_official 157:90e3acc479a2 602 * @arg HRTIM_OUTPUT_TE1: Timer E - Output 1
mbed_official 157:90e3acc479a2 603 * @arg HRTIM_OUTPUT_TE2: Timer E - Output 2
mbed_official 157:90e3acc479a2 604 * @retval None
mbed_official 157:90e3acc479a2 605 */
mbed_official 157:90e3acc479a2 606 void HRTIM_SimplePWMStop(HRTIM_TypeDef * HRTIMx,
mbed_official 157:90e3acc479a2 607 uint32_t TimerIdx,
mbed_official 157:90e3acc479a2 608 uint32_t PWMChannel)
mbed_official 157:90e3acc479a2 609 {
mbed_official 157:90e3acc479a2 610 /* Check the parameters */
mbed_official 157:90e3acc479a2 611 assert_param(IS_HRTIM_TIMER_OUTPUT(TimerIdx, PWMChannel));
mbed_official 157:90e3acc479a2 612
mbed_official 157:90e3acc479a2 613 /* Disable the timer output */
mbed_official 157:90e3acc479a2 614 HRTIMx->HRTIM_COMMON.DISR |= PWMChannel;
mbed_official 157:90e3acc479a2 615
mbed_official 157:90e3acc479a2 616 /* Disable the timer counter */
mbed_official 157:90e3acc479a2 617 __HRTIM_DISABLE(HRTIMx, TimerIdxToTimerId[TimerIdx]);
mbed_official 157:90e3acc479a2 618 }
mbed_official 157:90e3acc479a2 619
mbed_official 157:90e3acc479a2 620 /**
mbed_official 157:90e3acc479a2 621 * @brief Enables a basic capture on the designed capture unit
mbed_official 157:90e3acc479a2 622 * @param HRTIMx: pointer to HRTIM peripheral
mbed_official 157:90e3acc479a2 623 * @param TimerIdx: Timer index
mbed_official 157:90e3acc479a2 624 * This parameter can be one of the following values:
mbed_official 157:90e3acc479a2 625 * @arg 0x0 to 0x4 for timers A to E
mbed_official 157:90e3acc479a2 626 * @param CaptureChannel: Timer output
mbed_official 157:90e3acc479a2 627 * This parameter can be one of the following values:
mbed_official 157:90e3acc479a2 628 * @arg HRTIM_CAPTUREUNIT_1: Capture unit 1
mbed_official 157:90e3acc479a2 629 * @arg HRTIM_CAPTUREUNIT_2: Capture unit 2
mbed_official 157:90e3acc479a2 630 * @retval None
mbed_official 157:90e3acc479a2 631 * @note The external event triggering the capture is available for all timing
mbed_official 157:90e3acc479a2 632 * units. It can be used directly and is active as soon as the timing
mbed_official 157:90e3acc479a2 633 * unit counter is enabled.
mbed_official 157:90e3acc479a2 634 */
mbed_official 157:90e3acc479a2 635 void HRTIM_SimpleCaptureStart(HRTIM_TypeDef * HRTIMx,
mbed_official 157:90e3acc479a2 636 uint32_t TimerIdx,
mbed_official 157:90e3acc479a2 637 uint32_t CaptureChannel)
mbed_official 157:90e3acc479a2 638 {
mbed_official 157:90e3acc479a2 639 /* Enable the timer counter */
mbed_official 157:90e3acc479a2 640 __HRTIM_ENABLE(HRTIMx, TimerIdxToTimerId[TimerIdx]);
mbed_official 157:90e3acc479a2 641
mbed_official 157:90e3acc479a2 642 }
mbed_official 157:90e3acc479a2 643
mbed_official 157:90e3acc479a2 644 /**
mbed_official 157:90e3acc479a2 645 * @brief Disables a basic capture on the designed capture unit
mbed_official 157:90e3acc479a2 646 * @param HRTIMx: pointer to HRTIMx peripheral
mbed_official 157:90e3acc479a2 647 * @param TimerIdx: Timer index
mbed_official 157:90e3acc479a2 648 * This parameter can be one of the following values:
mbed_official 157:90e3acc479a2 649 * @arg 0x0 to 0x4 for timers A to E
mbed_official 157:90e3acc479a2 650 * @param CaptureChannel: Timer output
mbed_official 157:90e3acc479a2 651 * This parameter can be one of the following values:
mbed_official 157:90e3acc479a2 652 * @arg HRTIM_CAPTUREUNIT_1: Capture unit 1
mbed_official 157:90e3acc479a2 653 * @arg HRTIM_CAPTUREUNIT_2: Capture unit 2
mbed_official 157:90e3acc479a2 654 * @retval None
mbed_official 157:90e3acc479a2 655 */
mbed_official 157:90e3acc479a2 656 void HRTIM_SimpleCaptureStop(HRTIM_TypeDef * HRTIMx,
mbed_official 157:90e3acc479a2 657 uint32_t TimerIdx,
mbed_official 157:90e3acc479a2 658 uint32_t CaptureChannel)
mbed_official 157:90e3acc479a2 659 {
mbed_official 157:90e3acc479a2 660 /* Check the parameters */
mbed_official 157:90e3acc479a2 661 assert_param(IS_HRTIM_TIMING_UNIT(TimerIdx));
mbed_official 157:90e3acc479a2 662 assert_param(IS_HRTIM_CAPTUREUNIT(CaptureChannel));
mbed_official 157:90e3acc479a2 663
mbed_official 157:90e3acc479a2 664 /* Set the capture unit trigger */
mbed_official 157:90e3acc479a2 665 switch (CaptureChannel)
mbed_official 157:90e3acc479a2 666 {
mbed_official 157:90e3acc479a2 667 case HRTIM_CAPTUREUNIT_1:
mbed_official 157:90e3acc479a2 668 {
mbed_official 157:90e3acc479a2 669 HRTIMx->HRTIM_TIMERx[TimerIdx].CPT1xCR = HRTIM_CAPTURETRIGGER_NONE;
mbed_official 157:90e3acc479a2 670 }
mbed_official 157:90e3acc479a2 671 break;
mbed_official 157:90e3acc479a2 672 case HRTIM_CAPTUREUNIT_2:
mbed_official 157:90e3acc479a2 673 {
mbed_official 157:90e3acc479a2 674 HRTIMx->HRTIM_TIMERx[TimerIdx].CPT2xCR = HRTIM_CAPTURETRIGGER_NONE;
mbed_official 157:90e3acc479a2 675 }
mbed_official 157:90e3acc479a2 676 break;
mbed_official 157:90e3acc479a2 677 default:
mbed_official 157:90e3acc479a2 678 break;
mbed_official 157:90e3acc479a2 679 }
mbed_official 157:90e3acc479a2 680
mbed_official 157:90e3acc479a2 681 /* Disable the timer counter */
mbed_official 157:90e3acc479a2 682 if ((HRTIMx->HRTIM_TIMERx[TimerIdx].CPT1xCR == HRTIM_CAPTURETRIGGER_NONE) &&
mbed_official 157:90e3acc479a2 683 (HRTIMx->HRTIM_TIMERx[TimerIdx].CPT2xCR == HRTIM_CAPTURETRIGGER_NONE))
mbed_official 157:90e3acc479a2 684 {
mbed_official 157:90e3acc479a2 685 __HRTIM_DISABLE(HRTIMx, TimerIdxToTimerId[TimerIdx]);
mbed_official 157:90e3acc479a2 686 }
mbed_official 157:90e3acc479a2 687
mbed_official 157:90e3acc479a2 688 }
mbed_official 157:90e3acc479a2 689
mbed_official 157:90e3acc479a2 690 /**
mbed_official 157:90e3acc479a2 691 * @brief Enables the basic one pulse signal generation on the designed output
mbed_official 157:90e3acc479a2 692 * @param HRTIMx: pointer to HRTIMx peripheral
mbed_official 157:90e3acc479a2 693 * @param TimerIdx: Timer index
mbed_official 157:90e3acc479a2 694 * This parameter can be one of the following values:
mbed_official 157:90e3acc479a2 695 * @arg 0x0 to 0x4 for timers A to E
mbed_official 157:90e3acc479a2 696 * @param OnePulseChannel: Timer output
mbed_official 157:90e3acc479a2 697 * This parameter can be one of the following values:
mbed_official 157:90e3acc479a2 698 * @arg HRTIM_OUTPUT_TA1: Timer A - Output 1
mbed_official 157:90e3acc479a2 699 * @arg HRTIM_OUTPUT_TA2: Timer A - Output 2
mbed_official 157:90e3acc479a2 700 * @arg HRTIM_OUTPUT_TB1: Timer B - Output 1
mbed_official 157:90e3acc479a2 701 * @arg HRTIM_OUTPUT_TB2: Timer B - Output 2
mbed_official 157:90e3acc479a2 702 * @arg HRTIM_OUTPUT_TC1: Timer C - Output 1
mbed_official 157:90e3acc479a2 703 * @arg HRTIM_OUTPUT_TC2: Timer C - Output 2
mbed_official 157:90e3acc479a2 704 * @arg HRTIM_OUTPUT_TD1: Timer D - Output 1
mbed_official 157:90e3acc479a2 705 * @arg HRTIM_OUTPUT_TD2: Timer D - Output 2
mbed_official 157:90e3acc479a2 706 * @arg HRTIM_OUTPUT_TE1: Timer E - Output 1
mbed_official 157:90e3acc479a2 707 * @arg HRTIM_OUTPUT_TE2: Timer E - Output 2
mbed_official 157:90e3acc479a2 708 * @retval None
mbed_official 157:90e3acc479a2 709 */
mbed_official 157:90e3acc479a2 710 void HRTIM_SimpleOnePulseStart(HRTIM_TypeDef * HRTIMx,
mbed_official 157:90e3acc479a2 711 uint32_t TimerIdx,
mbed_official 157:90e3acc479a2 712 uint32_t OnePulseChannel)
mbed_official 157:90e3acc479a2 713 {
mbed_official 157:90e3acc479a2 714 /* Check the parameters */
mbed_official 157:90e3acc479a2 715 assert_param(IS_HRTIM_TIMER_OUTPUT(TimerIdx, OnePulseChannel));
mbed_official 157:90e3acc479a2 716
mbed_official 157:90e3acc479a2 717 /* Enable the timer output */
mbed_official 157:90e3acc479a2 718 HRTIMx->HRTIM_COMMON.OENR |= OnePulseChannel;
mbed_official 157:90e3acc479a2 719
mbed_official 157:90e3acc479a2 720 /* Enable the timer counter */
mbed_official 157:90e3acc479a2 721 __HRTIM_ENABLE(HRTIMx, TimerIdxToTimerId[TimerIdx]);
mbed_official 157:90e3acc479a2 722 }
mbed_official 157:90e3acc479a2 723
mbed_official 157:90e3acc479a2 724 /**
mbed_official 157:90e3acc479a2 725 * @brief Disables the basic one pulse signal generation on the designed output
mbed_official 157:90e3acc479a2 726 * @param HRTIMx: pointer to HRTIMx peripheral
mbed_official 157:90e3acc479a2 727 * @param TimerIdx: Timer index
mbed_official 157:90e3acc479a2 728 * This parameter can be one of the following values:
mbed_official 157:90e3acc479a2 729 * @arg 0x0 to 0x4 for timers A to E
mbed_official 157:90e3acc479a2 730 * @param OnePulseChannel: Timer output
mbed_official 157:90e3acc479a2 731 * This parameter can be one of the following values:
mbed_official 157:90e3acc479a2 732 * @arg HRTIM_OUTPUT_TA1: Timer A - Output 1
mbed_official 157:90e3acc479a2 733 * @arg HRTIM_OUTPUT_TA2: Timer A - Output 2
mbed_official 157:90e3acc479a2 734 * @arg HRTIM_OUTPUT_TB1: Timer B - Output 1
mbed_official 157:90e3acc479a2 735 * @arg HRTIM_OUTPUT_TB2: Timer B - Output 2
mbed_official 157:90e3acc479a2 736 * @arg HRTIM_OUTPUT_TC1: Timer C - Output 1
mbed_official 157:90e3acc479a2 737 * @arg HRTIM_OUTPUT_TC2: Timer C - Output 2
mbed_official 157:90e3acc479a2 738 * @arg HRTIM_OUTPUT_TD1: Timer D - Output 1
mbed_official 157:90e3acc479a2 739 * @arg HRTIM_OUTPUT_TD2: Timer D - Output 2
mbed_official 157:90e3acc479a2 740 * @arg HRTIM_OUTPUT_TE1: Timer E - Output 1
mbed_official 157:90e3acc479a2 741 * @arg HRTIM_OUTPUT_TE2: Timer E - Output 2
mbed_official 157:90e3acc479a2 742 * @retval None
mbed_official 157:90e3acc479a2 743 */
mbed_official 157:90e3acc479a2 744 void HRTIM_SimpleOnePulseStop(HRTIM_TypeDef * HRTIMx,
mbed_official 157:90e3acc479a2 745 uint32_t TimerIdx,
mbed_official 157:90e3acc479a2 746 uint32_t OnePulseChannel)
mbed_official 157:90e3acc479a2 747 {
mbed_official 157:90e3acc479a2 748 /* Check the parameters */
mbed_official 157:90e3acc479a2 749 assert_param(IS_HRTIM_TIMER_OUTPUT(TimerIdx, OnePulseChannel));
mbed_official 157:90e3acc479a2 750
mbed_official 157:90e3acc479a2 751 /* Disable the timer output */
mbed_official 157:90e3acc479a2 752 HRTIMx->HRTIM_COMMON.DISR |= OnePulseChannel;
mbed_official 157:90e3acc479a2 753
mbed_official 157:90e3acc479a2 754 /* Disable the timer counter */
mbed_official 157:90e3acc479a2 755 __HRTIM_DISABLE(HRTIMx, TimerIdxToTimerId[TimerIdx]);
mbed_official 157:90e3acc479a2 756 }
mbed_official 157:90e3acc479a2 757
mbed_official 157:90e3acc479a2 758 /**
mbed_official 157:90e3acc479a2 759 * @brief Starts the counter of the designated timer(s) operating in waveform mode
mbed_official 157:90e3acc479a2 760 * Timers can be combined (ORed) to allow for simultaneous counter start
mbed_official 157:90e3acc479a2 761 * @param HRTIMx: pointer to HRTIMx peripheral
mbed_official 157:90e3acc479a2 762 * @param TimersToStart: Timer counter(s) to start
mbed_official 157:90e3acc479a2 763 * This parameter can be any combination of the following values:
mbed_official 157:90e3acc479a2 764 * @arg HRTIM_TIMERID_MASTER
mbed_official 157:90e3acc479a2 765 * @arg HRTIM_TIMERID_TIMER_A
mbed_official 157:90e3acc479a2 766 * @arg HRTIM_TIMERID_TIMER_B
mbed_official 157:90e3acc479a2 767 * @arg HRTIM_TIMERID_TIMER_C
mbed_official 157:90e3acc479a2 768 * @arg HRTIM_TIMERID_TIMER_D
mbed_official 157:90e3acc479a2 769 * @arg HRTIM_TIMERID_TIMER_E
mbed_official 157:90e3acc479a2 770 * @retval None
mbed_official 157:90e3acc479a2 771 */
mbed_official 157:90e3acc479a2 772 void HRTIM_WaveformCounterStart(HRTIM_TypeDef * HRTIMx,
mbed_official 157:90e3acc479a2 773 uint32_t TimersToStart)
mbed_official 157:90e3acc479a2 774 {
mbed_official 157:90e3acc479a2 775 /* Enable timer(s) counter */
mbed_official 157:90e3acc479a2 776 HRTIMx->HRTIM_MASTER.MCR |= TimersToStart;
mbed_official 157:90e3acc479a2 777 }
mbed_official 157:90e3acc479a2 778
mbed_official 157:90e3acc479a2 779 /**
mbed_official 157:90e3acc479a2 780 * @brief Stops the counter of the designated timer(s) operating in waveform mode
mbed_official 157:90e3acc479a2 781 * Timers can be combined (ORed) to allow for simultaneous counter stop
mbed_official 157:90e3acc479a2 782 * @param HRTIMx: pointer to HRTIMx peripheral
mbed_official 157:90e3acc479a2 783 * @param TimersToStop: Timer counter(s) to stop
mbed_official 157:90e3acc479a2 784 * This parameter can be any combination of the following values:
mbed_official 157:90e3acc479a2 785 * @arg HRTIM_TIMER_MASTER
mbed_official 157:90e3acc479a2 786 * @arg HRTIM_TIMER_A
mbed_official 157:90e3acc479a2 787 * @arg HRTIM_TIMER_B
mbed_official 157:90e3acc479a2 788 * @arg HRTIM_TIMER_C
mbed_official 157:90e3acc479a2 789 * @arg HRTIM_TIMER_D
mbed_official 157:90e3acc479a2 790 * @arg HRTIM_TIMER_E
mbed_official 157:90e3acc479a2 791 * @retval None
mbed_official 157:90e3acc479a2 792 */
mbed_official 157:90e3acc479a2 793 void HRTIM_WaveformCounterStop(HRTIM_TypeDef * HRTIMx,
mbed_official 157:90e3acc479a2 794 uint32_t TimersToStop)
mbed_official 157:90e3acc479a2 795 {
mbed_official 157:90e3acc479a2 796 /* Disable timer(s) counter */
mbed_official 157:90e3acc479a2 797 HRTIMx->HRTIM_MASTER.MCR &= ~TimersToStop;
mbed_official 157:90e3acc479a2 798 }
mbed_official 157:90e3acc479a2 799
mbed_official 157:90e3acc479a2 800 /**
mbed_official 157:90e3acc479a2 801 * @brief Enables the generation of the waveform signal on the designated output(s)
mbed_official 157:90e3acc479a2 802 * Outputs can be combined (ORed) to allow for simultaneous output enabling
mbed_official 157:90e3acc479a2 803 * @param HRTIMx: pointer to HRTIMx peripheral
mbed_official 157:90e3acc479a2 804 * @param OutputsToStart: Timer output(s) to enable
mbed_official 157:90e3acc479a2 805 * This parameter can be any combination of the following values:
mbed_official 157:90e3acc479a2 806 * @arg HRTIM_OUTPUT_TA1: Timer A - Output 1
mbed_official 157:90e3acc479a2 807 * @arg HRTIM_OUTPUT_TA2: Timer A - Output 2
mbed_official 157:90e3acc479a2 808 * @arg HRTIM_OUTPUT_TB1: Timer B - Output 1
mbed_official 157:90e3acc479a2 809 * @arg HRTIM_OUTPUT_TB2: Timer B - Output 2
mbed_official 157:90e3acc479a2 810 * @arg HRTIM_OUTPUT_TC1: Timer C - Output 1
mbed_official 157:90e3acc479a2 811 * @arg HRTIM_OUTPUT_TC2: Timer C - Output 2
mbed_official 157:90e3acc479a2 812 * @arg HRTIM_OUTPUT_TD1: Timer D - Output 1
mbed_official 157:90e3acc479a2 813 * @arg HRTIM_OUTPUT_TD2: Timer D - Output 2
mbed_official 157:90e3acc479a2 814 * @arg HRTIM_OUTPUT_TE1: Timer E - Output 1
mbed_official 157:90e3acc479a2 815 * @arg HRTIM_OUTPUT_TE2: Timer E - Output 2
mbed_official 157:90e3acc479a2 816 * @retval None
mbed_official 157:90e3acc479a2 817 */
mbed_official 157:90e3acc479a2 818 void HRTIM_WaveformOutputStart(HRTIM_TypeDef * HRTIMx,
mbed_official 157:90e3acc479a2 819 uint32_t OutputsToStart)
mbed_official 157:90e3acc479a2 820 {
mbed_official 157:90e3acc479a2 821 /* Enable the HRTIM outputs */
mbed_official 157:90e3acc479a2 822 HRTIMx->HRTIM_COMMON.OENR = OutputsToStart;
mbed_official 157:90e3acc479a2 823 }
mbed_official 157:90e3acc479a2 824
mbed_official 157:90e3acc479a2 825 /**
mbed_official 157:90e3acc479a2 826 * @brief Disables the generation of the waveform signal on the designated output(s)
mbed_official 157:90e3acc479a2 827 * Outputs can be combined (ORed) to allow for simultaneous output disabling
mbed_official 157:90e3acc479a2 828 * @param HRTIMx: pointer to HRTIMx peripheral
mbed_official 157:90e3acc479a2 829 * @param OutputsToStop: Timer output(s) to disable
mbed_official 157:90e3acc479a2 830 * This parameter can be any combination of the following values:
mbed_official 157:90e3acc479a2 831 * @arg HRTIM_OUTPUT_TA1: Timer A - Output 1
mbed_official 157:90e3acc479a2 832 * @arg HRTIM_OUTPUT_TA2: Timer A - Output 2
mbed_official 157:90e3acc479a2 833 * @arg HRTIM_OUTPUT_TB1: Timer B - Output 1
mbed_official 157:90e3acc479a2 834 * @arg HRTIM_OUTPUT_TB2: Timer B - Output 2
mbed_official 157:90e3acc479a2 835 * @arg HRTIM_OUTPUT_TC1: Timer C - Output 1
mbed_official 157:90e3acc479a2 836 * @arg HRTIM_OUTPUT_TC2: Timer C - Output 2
mbed_official 157:90e3acc479a2 837 * @arg HRTIM_OUTPUT_TD1: Timer D - Output 1
mbed_official 157:90e3acc479a2 838 * @arg HRTIM_OUTPUT_TD2: Timer D - Output 2
mbed_official 157:90e3acc479a2 839 * @arg HRTIM_OUTPUT_TE1: Timer E - Output 1
mbed_official 157:90e3acc479a2 840 * @arg HRTIM_OUTPUT_TE2: Timer E - Output 2
mbed_official 157:90e3acc479a2 841 * @retval None
mbed_official 157:90e3acc479a2 842 */
mbed_official 157:90e3acc479a2 843 void HRTIM_WaveformOutputStop(HRTIM_TypeDef * HRTIMx,
mbed_official 157:90e3acc479a2 844 uint32_t OutputsToStop)
mbed_official 157:90e3acc479a2 845 {
mbed_official 157:90e3acc479a2 846 /* Disable the HRTIM outputs */
mbed_official 157:90e3acc479a2 847 HRTIMx->HRTIM_COMMON.DISR = OutputsToStop;
mbed_official 157:90e3acc479a2 848 }
mbed_official 157:90e3acc479a2 849
mbed_official 157:90e3acc479a2 850 /**
mbed_official 157:90e3acc479a2 851 * @brief Enables or disables the Master and slaves interrupt request
mbed_official 157:90e3acc479a2 852 * @param HRTIMx: pointer to HRTIMx peripheral
mbed_official 157:90e3acc479a2 853 * @param TimerIdx: Timer index
mbed_official 157:90e3acc479a2 854 * This parameter can be one of the following values:
mbed_official 157:90e3acc479a2 855 * @arg 0x0 to 0x4 for timers A to E
mbed_official 157:90e3acc479a2 856 * @param HRTIM_IT: specifies the HRTIM interrupts sources to be enabled or disabled.
mbed_official 157:90e3acc479a2 857 * This parameter can be any combination of the following values:
mbed_official 157:90e3acc479a2 858 * @arg HRTIM_MASTER_IT_MCMP1: Master compare 1 interrupt source
mbed_official 157:90e3acc479a2 859 * @arg HRTIM_MASTER_IT_MCMP2: Master compare 2 interrupt source
mbed_official 157:90e3acc479a2 860 * @arg HRTIM_MASTER_IT_MCMP3: Master compare 3 interrupt Interrupt source
mbed_official 157:90e3acc479a2 861 * @arg HRTIM_MASTER_IT_MCMP4: Master compare 4 Interrupt source
mbed_official 157:90e3acc479a2 862 * @arg HRTIM_MASTER_IT_MREP: Master Repetition Interrupt source
mbed_official 157:90e3acc479a2 863 * @arg HRTIM_MASTER_IT_SYNC: Synchronization input Interrupt source
mbed_official 157:90e3acc479a2 864 * @arg HRTIM_MASTER_IT_MUPD: Master update Interrupt source
mbed_official 157:90e3acc479a2 865 * @arg HRTIM_TIM_IT_CMP1: Timer compare 1 Interrupt source
mbed_official 157:90e3acc479a2 866 * @arg HRTIM_TIM_IT_CMP2: Timer compare 2 Interrupt source
mbed_official 157:90e3acc479a2 867 * @arg HRTIM_TIM_IT_CMP3: Timer compare 3 Interrupt source
mbed_official 157:90e3acc479a2 868 * @arg HRTIM_TIM_IT_CMP4: Timer compare 4 Interrupt source
mbed_official 157:90e3acc479a2 869 * @arg HRTIM_TIM_IT_REP: Timer repetition Interrupt source
mbed_official 157:90e3acc479a2 870 * @arg HRTIM_TIM_IT_UPD: Timer update Interrupt source
mbed_official 157:90e3acc479a2 871 * @arg HRTIM_TIM_IT_CPT1: Timer capture 1 Interrupt source
mbed_official 157:90e3acc479a2 872 * @arg HRTIM_TIM_IT_CPT2: Timer capture 2 Interrupt source
mbed_official 157:90e3acc479a2 873 * @arg HRTIM_TIM_IT_SET1: Timer output 1 set Interrupt source
mbed_official 157:90e3acc479a2 874 * @arg HRTIM_TIM_IT_RST1: Timer output 1 reset Interrupt source
mbed_official 157:90e3acc479a2 875 * @arg HRTIM_TIM_IT_SET2: Timer output 2 set Interrupt source
mbed_official 157:90e3acc479a2 876 * @arg HRTIM_TIM_IT_RST2: Timer output 2 reset Interrupt source
mbed_official 157:90e3acc479a2 877 * @arg HRTIM_TIM_IT_RST: Timer reset Interrupt source
mbed_official 157:90e3acc479a2 878 * @arg HRTIM_TIM_IT_DLYPRT1: Timer delay protection Interrupt source
mbed_official 157:90e3acc479a2 879 * @param NewState: new state of the TIM interrupts.
mbed_official 157:90e3acc479a2 880 * This parameter can be: ENABLE or DISABLE.
mbed_official 157:90e3acc479a2 881 * @retval None
mbed_official 157:90e3acc479a2 882 */
mbed_official 157:90e3acc479a2 883 void HRTIM_ITConfig(HRTIM_TypeDef * HRTIMx, uint32_t TimerIdx, uint32_t HRTIM_IT, FunctionalState NewState)
mbed_official 157:90e3acc479a2 884 {
mbed_official 157:90e3acc479a2 885 if(TimerIdx != HRTIM_TIMERINDEX_MASTER)
mbed_official 157:90e3acc479a2 886 {
mbed_official 157:90e3acc479a2 887 if(NewState != DISABLE)
mbed_official 157:90e3acc479a2 888 {
mbed_official 157:90e3acc479a2 889 HRTIMx->HRTIM_TIMERx[TimerIdx].TIMxDIER |= HRTIM_IT;
mbed_official 157:90e3acc479a2 890 }
mbed_official 157:90e3acc479a2 891 else
mbed_official 157:90e3acc479a2 892 {
mbed_official 157:90e3acc479a2 893 HRTIMx->HRTIM_TIMERx[TimerIdx].TIMxDIER &= ~HRTIM_IT;
mbed_official 157:90e3acc479a2 894 }
mbed_official 157:90e3acc479a2 895 }
mbed_official 157:90e3acc479a2 896 else
mbed_official 157:90e3acc479a2 897 {
mbed_official 157:90e3acc479a2 898 if(NewState != DISABLE)
mbed_official 157:90e3acc479a2 899 {
mbed_official 157:90e3acc479a2 900 HRTIMx->HRTIM_MASTER.MDIER |= HRTIM_IT;
mbed_official 157:90e3acc479a2 901 }
mbed_official 157:90e3acc479a2 902 else
mbed_official 157:90e3acc479a2 903 {
mbed_official 157:90e3acc479a2 904 HRTIMx->HRTIM_MASTER.MDIER &= ~HRTIM_IT;
mbed_official 157:90e3acc479a2 905 }
mbed_official 157:90e3acc479a2 906 }
mbed_official 157:90e3acc479a2 907 }
mbed_official 157:90e3acc479a2 908
mbed_official 157:90e3acc479a2 909 /**
mbed_official 157:90e3acc479a2 910 * @brief Enables or disables the common interrupt request
mbed_official 157:90e3acc479a2 911 * @param HRTIMx: pointer to HRTIMx peripheral
mbed_official 157:90e3acc479a2 912 * @param HRTIM_IT: specifies the HRTIM interrupts sources to be enabled or disabled.
mbed_official 157:90e3acc479a2 913 * This parameter can be any combination of the following values:
mbed_official 157:90e3acc479a2 914 * @arg HRTIM_IT_FLT1: Fault 1 interrupt source
mbed_official 157:90e3acc479a2 915 * @arg HRTIM_IT_FLT2: Fault 2 interrupt source
mbed_official 157:90e3acc479a2 916 * @arg HRTIM_IT_FLT3: Fault 3 interrupt Interrupt source
mbed_official 157:90e3acc479a2 917 * @arg HRTIM_IT_FLT4: Fault 4 Interrupt source
mbed_official 157:90e3acc479a2 918 * @arg HRTIM_IT_FLT5: Fault 5 Interrupt source
mbed_official 157:90e3acc479a2 919 * @arg HRTIM_IT_SYSFLT: System Fault Interrupt source
mbed_official 157:90e3acc479a2 920 * @arg HRTIM_IT_DLLRDY: DLL ready Interrupt source
mbed_official 157:90e3acc479a2 921 * @arg HRTIM_IT_BMPER: Burst mode period Interrupt source
mbed_official 157:90e3acc479a2 922 * @param NewState: new state of the TIM interrupts.
mbed_official 157:90e3acc479a2 923 * This parameter can be: ENABLE or DISABLE.
mbed_official 157:90e3acc479a2 924 * @retval None
mbed_official 157:90e3acc479a2 925 */
mbed_official 157:90e3acc479a2 926 void HRTIM_ITCommonConfig(HRTIM_TypeDef * HRTIMx, uint32_t HRTIM_CommonIT, FunctionalState NewState)
mbed_official 157:90e3acc479a2 927 {
mbed_official 157:90e3acc479a2 928 if(NewState != DISABLE)
mbed_official 157:90e3acc479a2 929 {
mbed_official 157:90e3acc479a2 930 HRTIMx->HRTIM_COMMON.IER |= HRTIM_CommonIT;
mbed_official 157:90e3acc479a2 931 }
mbed_official 157:90e3acc479a2 932 else
mbed_official 157:90e3acc479a2 933 {
mbed_official 157:90e3acc479a2 934 HRTIMx->HRTIM_COMMON.IER &= ~HRTIM_CommonIT;
mbed_official 157:90e3acc479a2 935 }
mbed_official 157:90e3acc479a2 936 }
mbed_official 157:90e3acc479a2 937
mbed_official 157:90e3acc479a2 938 /**
mbed_official 157:90e3acc479a2 939 * @brief Clears the Master and slaves interrupt flags
mbed_official 157:90e3acc479a2 940 * @param HRTIMx: pointer to HRTIMx peripheral
mbed_official 157:90e3acc479a2 941 * @param TimerIdx: Timer index
mbed_official 157:90e3acc479a2 942 * This parameter can be one of the following values:
mbed_official 157:90e3acc479a2 943 * @arg 0x0 to 0x4 for timers A to E
mbed_official 157:90e3acc479a2 944 * @param HRTIM_FLAG: specifies the HRTIM flags sources to be cleared.
mbed_official 157:90e3acc479a2 945 * This parameter can be any combination of the following values:
mbed_official 157:90e3acc479a2 946 * @arg HRTIM_MASTER_FLAG_MCMP1: Master compare 1 interrupt flag
mbed_official 157:90e3acc479a2 947 * @arg HRTIM_MASTER_FLAG_MCMP2: Master compare 2 interrupt flag
mbed_official 157:90e3acc479a2 948 * @arg HRTIM_MASTER_FLAG_MCMP3: Master compare 3 interrupt Interrupt flag
mbed_official 157:90e3acc479a2 949 * @arg HRTIM_MASTER_FLAG_MCMP4: Master compare 4 Interrupt flag
mbed_official 157:90e3acc479a2 950 * @arg HRTIM_MASTER_FLAG_MREP: Master Repetition Interrupt flag
mbed_official 157:90e3acc479a2 951 * @arg HRTIM_MASTER_FLAG_SYNC: Synchronization input Interrupt flag
mbed_official 157:90e3acc479a2 952 * @arg HRTIM_MASTER_FLAG_MUPD: Master update Interrupt flag
mbed_official 157:90e3acc479a2 953 * @arg HRTIM_TIM_FLAG_CMP1: Timer compare 1 Interrupt flag
mbed_official 157:90e3acc479a2 954 * @arg HRTIM_TIM_FLAG_CMP2: Timer compare 2 Interrupt flag
mbed_official 157:90e3acc479a2 955 * @arg HRTIM_TIM_FLAG_CMP3: Timer compare 3 Interrupt flag
mbed_official 157:90e3acc479a2 956 * @arg HRTIM_TIM_FLAG_CMP4: Timer compare 4 Interrupt flag
mbed_official 157:90e3acc479a2 957 * @arg HRTIM_TIM_FLAG_REP: Timer repetition Interrupt flag
mbed_official 157:90e3acc479a2 958 * @arg HRTIM_TIM_FLAG_UPD: Timer update Interrupt flag
mbed_official 157:90e3acc479a2 959 * @arg HRTIM_TIM_FLAG_CPT1: Timer capture 1 Interrupt flag
mbed_official 157:90e3acc479a2 960 * @arg HRTIM_TIM_FLAG_CPT2: Timer capture 2 Interrupt flag
mbed_official 157:90e3acc479a2 961 * @arg HRTIM_TIM_FLAG_SET1: Timer output 1 set Interrupt flag
mbed_official 157:90e3acc479a2 962 * @arg HRTIM_TIM_FLAG_RST1: Timer output 1 reset Interrupt flag
mbed_official 157:90e3acc479a2 963 * @arg HRTIM_TIM_FLAG_SET2: Timer output 2 set Interrupt flag
mbed_official 157:90e3acc479a2 964 * @arg HRTIM_TIM_FLAG_RST2: Timer output 2 reset Interrupt flag
mbed_official 157:90e3acc479a2 965 * @arg HRTIM_TIM_FLAG_RST: Timer reset Interrupt flag
mbed_official 157:90e3acc479a2 966 * @arg HRTIM_TIM_FLAG_DLYPRT1: Timer delay protection Interrupt flag
mbed_official 157:90e3acc479a2 967 * @retval None
mbed_official 157:90e3acc479a2 968 */
mbed_official 157:90e3acc479a2 969 void HRTIM_ClearFlag(HRTIM_TypeDef * HRTIMx, uint32_t TimerIdx, uint32_t HRTIM_FLAG)
mbed_official 157:90e3acc479a2 970 {
mbed_official 157:90e3acc479a2 971 if(TimerIdx != HRTIM_TIMERINDEX_MASTER)
mbed_official 157:90e3acc479a2 972 {
mbed_official 157:90e3acc479a2 973 HRTIMx->HRTIM_MASTER.MICR |= HRTIM_FLAG;
mbed_official 157:90e3acc479a2 974 }
mbed_official 157:90e3acc479a2 975 else
mbed_official 157:90e3acc479a2 976 {
mbed_official 157:90e3acc479a2 977 HRTIMx->HRTIM_TIMERx[TimerIdx].TIMxICR |= HRTIM_FLAG;
mbed_official 157:90e3acc479a2 978 }
mbed_official 157:90e3acc479a2 979 }
mbed_official 157:90e3acc479a2 980
mbed_official 157:90e3acc479a2 981 /**
mbed_official 157:90e3acc479a2 982 * @brief Clears the common interrupt flags
mbed_official 157:90e3acc479a2 983 * @param HRTIMx: pointer to HRTIMx peripheral
mbed_official 157:90e3acc479a2 984 * @param HRTIM_FLAG: specifies the HRTIM flags to be cleared.
mbed_official 157:90e3acc479a2 985 * This parameter can be any combination of the following values:
mbed_official 157:90e3acc479a2 986 * @arg HRTIM_FLAG_FLT1: Fault 1 interrupt flag
mbed_official 157:90e3acc479a2 987 * @arg HRTIM_FLAG_FLT2: Fault 2 interrupt flag
mbed_official 157:90e3acc479a2 988 * @arg HRTIM_FLAG_FLT3: Fault 3 interrupt Interrupt flag
mbed_official 157:90e3acc479a2 989 * @arg HRTIM_FLAG_FLT4: Fault 4 Interrupt flag
mbed_official 157:90e3acc479a2 990 * @arg HRTIM_FLAG_FLT5: Fault 5 Interrupt flag
mbed_official 157:90e3acc479a2 991 * @arg HRTIM_FLAG_SYSFLT: System Fault Interrupt flag
mbed_official 157:90e3acc479a2 992 * @arg HRTIM_FLAG_DLLRDY: DLL ready Interrupt flag
mbed_official 157:90e3acc479a2 993 * @arg HRTIM_FLAG_BMPER: Burst mode period Interrupt flag
mbed_official 157:90e3acc479a2 994 * @retval None
mbed_official 157:90e3acc479a2 995 */
mbed_official 157:90e3acc479a2 996 void HRTIM_ClearCommonFlag(HRTIM_TypeDef * HRTIMx, uint32_t HRTIM_CommonFLAG)
mbed_official 157:90e3acc479a2 997 {
mbed_official 157:90e3acc479a2 998 HRTIMx->HRTIM_COMMON.ICR |= HRTIM_CommonFLAG;
mbed_official 157:90e3acc479a2 999 }
mbed_official 157:90e3acc479a2 1000
mbed_official 157:90e3acc479a2 1001 /**
mbed_official 157:90e3acc479a2 1002 * @brief Clears the Master and slaves interrupt request pending bits
mbed_official 157:90e3acc479a2 1003 * @param HRTIMx: pointer to HRTIMx peripheral
mbed_official 157:90e3acc479a2 1004 * @param TimerIdx: Timer index
mbed_official 157:90e3acc479a2 1005 * This parameter can be one of the following values:
mbed_official 157:90e3acc479a2 1006 * @arg 0x0 to 0x4 for timers A to E
mbed_official 157:90e3acc479a2 1007 * @param HRTIM_IT: specifies the HRTIM interrupts sources to be enabled or disabled.
mbed_official 157:90e3acc479a2 1008 * This parameter can be any combination of the following values:
mbed_official 157:90e3acc479a2 1009 * @arg HRTIM_MASTER_IT_MCMP1: Master compare 1 interrupt source
mbed_official 157:90e3acc479a2 1010 * @arg HRTIM_MASTER_IT_MCMP2: Master compare 2 interrupt source
mbed_official 157:90e3acc479a2 1011 * @arg HRTIM_MASTER_IT_MCMP3: Master compare 3 interrupt Interrupt source
mbed_official 157:90e3acc479a2 1012 * @arg HRTIM_MASTER_IT_MCMP4: Master compare 4 Interrupt source
mbed_official 157:90e3acc479a2 1013 * @arg HRTIM_MASTER_IT_MREP: Master Repetition Interrupt source
mbed_official 157:90e3acc479a2 1014 * @arg HRTIM_MASTER_IT_SYNC: Synchronization input Interrupt source
mbed_official 157:90e3acc479a2 1015 * @arg HRTIM_MASTER_IT_MUPD: Master update Interrupt source
mbed_official 157:90e3acc479a2 1016 * @arg HRTIM_TIM_IT_CMP1: Timer compare 1 Interrupt source
mbed_official 157:90e3acc479a2 1017 * @arg HRTIM_TIM_IT_CMP2: Timer compare 2 Interrupt source
mbed_official 157:90e3acc479a2 1018 * @arg HRTIM_TIM_IT_CMP3: Timer compare 3 Interrupt source
mbed_official 157:90e3acc479a2 1019 * @arg HRTIM_TIM_IT_CMP4: Timer compare 4 Interrupt source
mbed_official 157:90e3acc479a2 1020 * @arg HRTIM_TIM_IT_REP: Timer repetition Interrupt source
mbed_official 157:90e3acc479a2 1021 * @arg HRTIM_TIM_IT_UPD: Timer update Interrupt source
mbed_official 157:90e3acc479a2 1022 * @arg HRTIM_TIM_IT_CPT1: Timer capture 1 Interrupt source
mbed_official 157:90e3acc479a2 1023 * @arg HRTIM_TIM_IT_CPT2: Timer capture 2 Interrupt source
mbed_official 157:90e3acc479a2 1024 * @arg HRTIM_TIM_IT_SET1: Timer output 1 set Interrupt source
mbed_official 157:90e3acc479a2 1025 * @arg HRTIM_TIM_IT_RST1: Timer output 1 reset Interrupt source
mbed_official 157:90e3acc479a2 1026 * @arg HRTIM_TIM_IT_SET2: Timer output 2 set Interrupt source
mbed_official 157:90e3acc479a2 1027 * @arg HRTIM_TIM_IT_RST2: Timer output 2 reset Interrupt source
mbed_official 157:90e3acc479a2 1028 * @arg HRTIM_TIM_IT_RST: Timer reset Interrupt source
mbed_official 157:90e3acc479a2 1029 * @arg HRTIM_TIM_IT_DLYPRT: Timer delay protection Interrupt source
mbed_official 157:90e3acc479a2 1030 * @retval None
mbed_official 157:90e3acc479a2 1031 */
mbed_official 157:90e3acc479a2 1032 void HRTIM_ClearITPendingBit(HRTIM_TypeDef * HRTIMx, uint32_t TimerIdx, uint32_t HRTIM_IT)
mbed_official 157:90e3acc479a2 1033 {
mbed_official 157:90e3acc479a2 1034 if(TimerIdx != HRTIM_TIMERINDEX_MASTER)
mbed_official 157:90e3acc479a2 1035 {
mbed_official 157:90e3acc479a2 1036 HRTIMx->HRTIM_TIMERx[TimerIdx].TIMxICR |= HRTIM_IT;
mbed_official 157:90e3acc479a2 1037 }
mbed_official 157:90e3acc479a2 1038 else
mbed_official 157:90e3acc479a2 1039 {
mbed_official 157:90e3acc479a2 1040 HRTIMx->HRTIM_MASTER.MICR |= HRTIM_IT;
mbed_official 157:90e3acc479a2 1041 }
mbed_official 157:90e3acc479a2 1042 }
mbed_official 157:90e3acc479a2 1043
mbed_official 157:90e3acc479a2 1044 /**
mbed_official 157:90e3acc479a2 1045 * @brief Clears the common interrupt pending bits
mbed_official 157:90e3acc479a2 1046 * @param HRTIMx: pointer to HRTIMx peripheral
mbed_official 157:90e3acc479a2 1047 * @param HRTIM_IT: specifies the HRTIM interrupts sources to be cleared.
mbed_official 157:90e3acc479a2 1048 * This parameter can be any combination of the following values:
mbed_official 157:90e3acc479a2 1049 * @arg HRTIM_IT_FLT1: Fault 1 interrupt source
mbed_official 157:90e3acc479a2 1050 * @arg HRTIM_IT_FLT2: Fault 2 interrupt source
mbed_official 157:90e3acc479a2 1051 * @arg HRTIM_IT_FLT3: Fault 3 interrupt Interrupt source
mbed_official 157:90e3acc479a2 1052 * @arg HRTIM_IT_FLT4: Fault 4 Interrupt source
mbed_official 157:90e3acc479a2 1053 * @arg HRTIM_IT_FLT5: Fault 5 Interrupt source
mbed_official 157:90e3acc479a2 1054 * @arg HRTIM_IT_SYSFLT: System Fault Interrupt source
mbed_official 157:90e3acc479a2 1055 * @arg HRTIM_IT_DLLRDY: DLL ready Interrupt source
mbed_official 157:90e3acc479a2 1056 * @arg HRTIM_IT_BMPER: Burst mode period Interrupt source
mbed_official 157:90e3acc479a2 1057 * @retval None
mbed_official 157:90e3acc479a2 1058 */
mbed_official 157:90e3acc479a2 1059 void HRTIM_ClearCommonITPendingBit(HRTIM_TypeDef * HRTIMx, uint32_t HRTIM_CommonIT)
mbed_official 157:90e3acc479a2 1060 {
mbed_official 157:90e3acc479a2 1061 HRTIMx->HRTIM_COMMON.ICR |= HRTIM_CommonIT;
mbed_official 157:90e3acc479a2 1062 }
mbed_official 157:90e3acc479a2 1063
mbed_official 157:90e3acc479a2 1064
mbed_official 157:90e3acc479a2 1065 /**
mbed_official 157:90e3acc479a2 1066 * @brief Checks whether the specified HRTIM flag is set or not.
mbed_official 157:90e3acc479a2 1067 * @param HRTIMx: pointer to HRTIMx peripheral
mbed_official 157:90e3acc479a2 1068 * @param TimerIdx: Timer index
mbed_official 157:90e3acc479a2 1069 * This parameter can be one of the following values:
mbed_official 157:90e3acc479a2 1070 * @arg 0x0 to 0x4 for timers A to E
mbed_official 157:90e3acc479a2 1071 * @param HRTIM_FLAG: specifies the HRTIM flags to check.
mbed_official 157:90e3acc479a2 1072 * This parameter can be any combination of the following values:
mbed_official 157:90e3acc479a2 1073 * @arg HRTIM_MASTER_FLAG_MCMP1: Master compare 1 interrupt flag
mbed_official 157:90e3acc479a2 1074 * @arg HRTIM_MASTER_FLAG_MCMP2: Master compare 2 interrupt flag
mbed_official 157:90e3acc479a2 1075 * @arg HRTIM_MASTER_FLAG_MCMP3: Master compare 3 interrupt Interrupt flag
mbed_official 157:90e3acc479a2 1076 * @arg HRTIM_MASTER_FLAG_MCMP4: Master compare 4 Interrupt flag
mbed_official 157:90e3acc479a2 1077 * @arg HRTIM_MASTER_FLAG_MREP: Master Repetition Interrupt flag
mbed_official 157:90e3acc479a2 1078 * @arg HRTIM_MASTER_FLAG_SYNC: Synchronization input Interrupt flag
mbed_official 157:90e3acc479a2 1079 * @arg HRTIM_MASTER_FLAG_MUPD: Master update Interrupt flag
mbed_official 157:90e3acc479a2 1080 * @arg HRTIM_TIM_FLAG_CMP1: Timer compare 1 Interrupt flag
mbed_official 157:90e3acc479a2 1081 * @arg HRTIM_TIM_FLAG_CMP2: Timer compare 2 Interrupt flag
mbed_official 157:90e3acc479a2 1082 * @arg HRTIM_TIM_FLAG_CMP3: Timer compare 3 Interrupt flag
mbed_official 157:90e3acc479a2 1083 * @arg HRTIM_TIM_FLAG_CMP4: Timer compare 4 Interrupt flag
mbed_official 157:90e3acc479a2 1084 * @arg HRTIM_TIM_FLAG_REP: Timer repetition Interrupt flag
mbed_official 157:90e3acc479a2 1085 * @arg HRTIM_TIM_FLAG_UPD: Timer update Interrupt flag
mbed_official 157:90e3acc479a2 1086 * @arg HRTIM_TIM_FLAG_CPT1: Timer capture 1 Interrupt flag
mbed_official 157:90e3acc479a2 1087 * @arg HRTIM_TIM_FLAG_CPT2: Timer capture 2 Interrupt flag
mbed_official 157:90e3acc479a2 1088 * @arg HRTIM_TIM_FLAG_SET1: Timer output 1 set Interrupt flag
mbed_official 157:90e3acc479a2 1089 * @arg HRTIM_TIM_FLAG_RST1: Timer output 1 reset Interrupt flag
mbed_official 157:90e3acc479a2 1090 * @arg HRTIM_TIM_FLAG_SET2: Timer output 2 set Interrupt flag
mbed_official 157:90e3acc479a2 1091 * @arg HRTIM_TIM_FLAG_RST2: Timer output 2 reset Interrupt flag
mbed_official 157:90e3acc479a2 1092 * @arg HRTIM_TIM_FLAG_RST: Timer reset Interrupt flag
mbed_official 157:90e3acc479a2 1093 * @arg HRTIM_TIM_FLAG_DLYPRT: Timer delay protection Interrupt flag
mbed_official 157:90e3acc479a2 1094 * @retval The new state of HRTIM_FLAG (SET or RESET).
mbed_official 157:90e3acc479a2 1095 */
mbed_official 157:90e3acc479a2 1096 FlagStatus HRTIM_GetFlagStatus(HRTIM_TypeDef * HRTIMx, uint32_t TimerIdx, uint32_t HRTIM_FLAG)
mbed_official 157:90e3acc479a2 1097 {
mbed_official 157:90e3acc479a2 1098 FlagStatus bitstatus = RESET;
mbed_official 157:90e3acc479a2 1099
mbed_official 157:90e3acc479a2 1100 if(TimerIdx != HRTIM_TIMERINDEX_MASTER)
mbed_official 157:90e3acc479a2 1101 {
mbed_official 157:90e3acc479a2 1102 if ((HRTIMx->HRTIM_TIMERx[TimerIdx].TIMxISR & HRTIM_FLAG) != RESET)
mbed_official 157:90e3acc479a2 1103 {
mbed_official 157:90e3acc479a2 1104 bitstatus = SET;
mbed_official 157:90e3acc479a2 1105 }
mbed_official 157:90e3acc479a2 1106 else
mbed_official 157:90e3acc479a2 1107 {
mbed_official 157:90e3acc479a2 1108 bitstatus = RESET;
mbed_official 157:90e3acc479a2 1109 }
mbed_official 157:90e3acc479a2 1110 }
mbed_official 157:90e3acc479a2 1111 else
mbed_official 157:90e3acc479a2 1112 {
mbed_official 157:90e3acc479a2 1113 if ((HRTIMx->HRTIM_MASTER.MISR & HRTIM_FLAG) != RESET)
mbed_official 157:90e3acc479a2 1114 {
mbed_official 157:90e3acc479a2 1115 bitstatus = SET;
mbed_official 157:90e3acc479a2 1116 }
mbed_official 157:90e3acc479a2 1117 else
mbed_official 157:90e3acc479a2 1118 {
mbed_official 157:90e3acc479a2 1119 bitstatus = RESET;
mbed_official 157:90e3acc479a2 1120 }
mbed_official 157:90e3acc479a2 1121 }
mbed_official 157:90e3acc479a2 1122 return bitstatus;
mbed_official 157:90e3acc479a2 1123 }
mbed_official 157:90e3acc479a2 1124
mbed_official 157:90e3acc479a2 1125 /**
mbed_official 157:90e3acc479a2 1126 * @brief Checks whether the specified HRTIM common flag is set or not.
mbed_official 157:90e3acc479a2 1127 * @param HRTIMx: pointer to HRTIMx peripheral
mbed_official 157:90e3acc479a2 1128 * @param HRTIM_FLAG: specifies the HRTIM flags to check.
mbed_official 157:90e3acc479a2 1129 * This parameter can be any combination of the following values:
mbed_official 157:90e3acc479a2 1130 * @arg HRTIM_FLAG_FLT1: Fault 1 interrupt flag
mbed_official 157:90e3acc479a2 1131 * @arg HRTIM_FLAG_FLT2: Fault 2 interrupt flag
mbed_official 157:90e3acc479a2 1132 * @arg HRTIM_FLAG_FLT3: Fault 3 interrupt Interrupt flag
mbed_official 157:90e3acc479a2 1133 * @arg HRTIM_FLAG_FLT4: Fault 4 Interrupt flag
mbed_official 157:90e3acc479a2 1134 * @arg HRTIM_FLAG_FLT5: Fault 5 Interrupt flag
mbed_official 157:90e3acc479a2 1135 * @arg HRTIM_FLAG_SYSFLT: System Fault Interrupt flag
mbed_official 157:90e3acc479a2 1136 * @arg HRTIM_FLAG_DLLRDY: DLL ready Interrupt flag
mbed_official 157:90e3acc479a2 1137 * @arg HRTIM_FLAG_BMPER: Burst mode period Interrupt flag
mbed_official 157:90e3acc479a2 1138 * @retval The new state of HRTIM_FLAG (SET or RESET).
mbed_official 157:90e3acc479a2 1139 */
mbed_official 157:90e3acc479a2 1140 FlagStatus HRTIM_GetCommonFlagStatus(HRTIM_TypeDef * HRTIMx, uint32_t HRTIM_CommonFLAG)
mbed_official 157:90e3acc479a2 1141 {
mbed_official 157:90e3acc479a2 1142 FlagStatus bitstatus = RESET;
mbed_official 157:90e3acc479a2 1143
mbed_official 157:90e3acc479a2 1144 if((HRTIMx->HRTIM_COMMON.ISR & HRTIM_CommonFLAG) != RESET)
mbed_official 157:90e3acc479a2 1145 {
mbed_official 157:90e3acc479a2 1146 bitstatus = SET;
mbed_official 157:90e3acc479a2 1147 }
mbed_official 157:90e3acc479a2 1148 else
mbed_official 157:90e3acc479a2 1149 {
mbed_official 157:90e3acc479a2 1150 bitstatus = RESET;
mbed_official 157:90e3acc479a2 1151 }
mbed_official 157:90e3acc479a2 1152 return bitstatus;
mbed_official 157:90e3acc479a2 1153 }
mbed_official 157:90e3acc479a2 1154
mbed_official 157:90e3acc479a2 1155 /**
mbed_official 157:90e3acc479a2 1156 * @brief Checks whether the specified HRTIM interrupt has occurred or not.
mbed_official 157:90e3acc479a2 1157 * @param HRTIMx: pointer to HRTIMx peripheral
mbed_official 157:90e3acc479a2 1158 * @param TimerIdx: Timer index
mbed_official 157:90e3acc479a2 1159 * This parameter can be one of the following values:
mbed_official 157:90e3acc479a2 1160 * @arg 0x0 to 0x4 for timers A to E
mbed_official 157:90e3acc479a2 1161 * @param HRTIM_IT: specifies the HRTIM flags sources to be cleared.
mbed_official 157:90e3acc479a2 1162 * This parameter can be any combination of the following values:
mbed_official 157:90e3acc479a2 1163 * @arg HRTIM_MASTER_IT_MCMP1: Master compare 1 interrupt
mbed_official 157:90e3acc479a2 1164 * @arg HRTIM_MASTER_IT_MCMP2: Master compare 2 interrupt
mbed_official 157:90e3acc479a2 1165 * @arg HRTIM_MASTER_IT_MCMP3: Master compare 3 interrupt Interrupt
mbed_official 157:90e3acc479a2 1166 * @arg HRTIM_MASTER_IT_MCMP4: Master compare 4 Interrupt
mbed_official 157:90e3acc479a2 1167 * @arg HRTIM_MASTER_IT_MREP: Master Repetition Interrupt
mbed_official 157:90e3acc479a2 1168 * @arg HRTIM_MASTER_IT_SYNC: Synchronization input Interrupt
mbed_official 157:90e3acc479a2 1169 * @arg HRTIM_MASTER_IT_MUPD: Master update Interrupt
mbed_official 157:90e3acc479a2 1170 * @arg HRTIM_TIM_IT_CMP1: Timer compare 1 Interrupt
mbed_official 157:90e3acc479a2 1171 * @arg HRTIM_TIM_IT_CMP2: Timer compare 2 Interrupt
mbed_official 157:90e3acc479a2 1172 * @arg HRTIM_TIM_IT_CMP3: Timer compare 3 Interrupt
mbed_official 157:90e3acc479a2 1173 * @arg HRTIM_TIM_IT_CMP4: Timer compare 4 Interrupt
mbed_official 157:90e3acc479a2 1174 * @arg HRTIM_TIM_IT_REP: Timer repetition Interrupt
mbed_official 157:90e3acc479a2 1175 * @arg HRTIM_TIM_IT_UPD: Timer update Interrupt
mbed_official 157:90e3acc479a2 1176 * @arg HRTIM_TIM_IT_CPT1: Timer capture 1 Interrupt
mbed_official 157:90e3acc479a2 1177 * @arg HRTIM_TIM_IT_CPT2: Timer capture 2 Interrupt
mbed_official 157:90e3acc479a2 1178 * @arg HRTIM_TIM_IT_SET1: Timer output 1 set Interrupt
mbed_official 157:90e3acc479a2 1179 * @arg HRTIM_TIM_IT_RST1: Timer output 1 reset Interrupt
mbed_official 157:90e3acc479a2 1180 * @arg HRTIM_TIM_IT_SET2: Timer output 2 set Interrupt
mbed_official 157:90e3acc479a2 1181 * @arg HRTIM_TIM_IT_RST2: Timer output 2 reset Interrupt
mbed_official 157:90e3acc479a2 1182 * @arg HRTIM_TIM_IT_RST: Timer reset Interrupt
mbed_official 157:90e3acc479a2 1183 * @arg HRTIM_TIM_IT_DLYPRT: Timer delay protection Interrupt
mbed_official 157:90e3acc479a2 1184 * @retval The new state of the HRTIM_IT(SET or RESET).
mbed_official 157:90e3acc479a2 1185 */
mbed_official 157:90e3acc479a2 1186 ITStatus HRTIM_GetITStatus(HRTIM_TypeDef * HRTIMx, uint32_t TimerIdx, uint32_t HRTIM_IT)
mbed_official 157:90e3acc479a2 1187 {
mbed_official 157:90e3acc479a2 1188 ITStatus bitstatus = RESET;
mbed_official 157:90e3acc479a2 1189 uint16_t itstatus = 0x0, itenable = 0x0;
mbed_official 157:90e3acc479a2 1190
mbed_official 157:90e3acc479a2 1191 if(TimerIdx != HRTIM_TIMERINDEX_MASTER)
mbed_official 157:90e3acc479a2 1192 {
mbed_official 157:90e3acc479a2 1193 itstatus = HRTIMx->HRTIM_TIMERx[TimerIdx].TIMxISR & HRTIM_IT;
mbed_official 157:90e3acc479a2 1194
mbed_official 157:90e3acc479a2 1195 itenable = HRTIMx->HRTIM_TIMERx[TimerIdx].TIMxDIER & HRTIM_IT;
mbed_official 157:90e3acc479a2 1196 if ((itstatus != (uint16_t)RESET) && (itenable != (uint16_t)RESET))
mbed_official 157:90e3acc479a2 1197 {
mbed_official 157:90e3acc479a2 1198 bitstatus = SET;
mbed_official 157:90e3acc479a2 1199 }
mbed_official 157:90e3acc479a2 1200 else
mbed_official 157:90e3acc479a2 1201 {
mbed_official 157:90e3acc479a2 1202 bitstatus = RESET;
mbed_official 157:90e3acc479a2 1203 }
mbed_official 157:90e3acc479a2 1204 }
mbed_official 157:90e3acc479a2 1205 else
mbed_official 157:90e3acc479a2 1206 {
mbed_official 157:90e3acc479a2 1207 itstatus = HRTIMx->HRTIM_MASTER.MISR & HRTIM_IT;
mbed_official 157:90e3acc479a2 1208
mbed_official 157:90e3acc479a2 1209 itenable = HRTIMx->HRTIM_MASTER.MDIER & HRTIM_IT;
mbed_official 157:90e3acc479a2 1210 if ((itstatus != (uint16_t)RESET) && (itenable != (uint16_t)RESET))
mbed_official 157:90e3acc479a2 1211 {
mbed_official 157:90e3acc479a2 1212 bitstatus = SET;
mbed_official 157:90e3acc479a2 1213 }
mbed_official 157:90e3acc479a2 1214 else
mbed_official 157:90e3acc479a2 1215 {
mbed_official 157:90e3acc479a2 1216 bitstatus = RESET;
mbed_official 157:90e3acc479a2 1217 }
mbed_official 157:90e3acc479a2 1218 }
mbed_official 157:90e3acc479a2 1219 return bitstatus;
mbed_official 157:90e3acc479a2 1220 }
mbed_official 157:90e3acc479a2 1221
mbed_official 157:90e3acc479a2 1222 /**
mbed_official 157:90e3acc479a2 1223 * @brief Checks whether the specified HRTIM common interrupt has occurred or not.
mbed_official 157:90e3acc479a2 1224 * @param HRTIMx: pointer to HRTIMx peripheral
mbed_official 157:90e3acc479a2 1225 * @param HRTIM_IT: specifies the HRTIM interrupt source to check.
mbed_official 157:90e3acc479a2 1226 * This parameter can be any combination of the following values:
mbed_official 157:90e3acc479a2 1227 * @arg HRTIM_IT_FLT1: Fault 1 interrupt
mbed_official 157:90e3acc479a2 1228 * @arg HRTIM_IT_FLT2: Fault 2 interrupt
mbed_official 157:90e3acc479a2 1229 * @arg HRTIM_IT_FLT3: Fault 3 interrupt Interrupt
mbed_official 157:90e3acc479a2 1230 * @arg HRTIM_IT_FLT4: Fault 4 Interrupt
mbed_official 157:90e3acc479a2 1231 * @arg HRTIM_IT_FLT5: Fault 5 Interrupt
mbed_official 157:90e3acc479a2 1232 * @arg HRTIM_IT_SYSFLT: System Fault Interrupt
mbed_official 157:90e3acc479a2 1233 * @arg HRTIM_IT_DLLRDY: DLL ready Interrupt flag
mbed_official 157:90e3acc479a2 1234 * @arg HRTIM_IT_BMPER: Burst mode period Interrupt
mbed_official 157:90e3acc479a2 1235 * @retval The new state of HRTIM_FLAG (SET or RESET).
mbed_official 157:90e3acc479a2 1236 */
mbed_official 157:90e3acc479a2 1237 ITStatus HRTIM_GetCommonITStatus(HRTIM_TypeDef * HRTIMx, uint32_t HRTIM_CommonIT)
mbed_official 157:90e3acc479a2 1238 {
mbed_official 157:90e3acc479a2 1239 ITStatus bitstatus = RESET;
mbed_official 157:90e3acc479a2 1240 uint16_t itstatus = 0x0, itenable = 0x0;
mbed_official 157:90e3acc479a2 1241
mbed_official 157:90e3acc479a2 1242 itstatus = HRTIMx->HRTIM_COMMON.ISR & HRTIM_CommonIT;
mbed_official 157:90e3acc479a2 1243 itenable = HRTIMx->HRTIM_COMMON.IER & HRTIM_CommonIT;
mbed_official 157:90e3acc479a2 1244
mbed_official 157:90e3acc479a2 1245 if ((itstatus != (uint16_t)RESET) && (itenable != (uint16_t)RESET))
mbed_official 157:90e3acc479a2 1246 {
mbed_official 157:90e3acc479a2 1247 bitstatus = SET;
mbed_official 157:90e3acc479a2 1248 }
mbed_official 157:90e3acc479a2 1249 else
mbed_official 157:90e3acc479a2 1250 {
mbed_official 157:90e3acc479a2 1251 bitstatus = RESET;
mbed_official 157:90e3acc479a2 1252 }
mbed_official 157:90e3acc479a2 1253
mbed_official 157:90e3acc479a2 1254 return bitstatus;
mbed_official 157:90e3acc479a2 1255 }
mbed_official 157:90e3acc479a2 1256
mbed_official 157:90e3acc479a2 1257 /**
mbed_official 157:90e3acc479a2 1258 * @brief Enables or disables the HRTIMx's DMA Requests.
mbed_official 157:90e3acc479a2 1259 * @param HRTIMx: pointer to HRTIMx peripheral
mbed_official 157:90e3acc479a2 1260 * @param TimerIdx: Timer index
mbed_official 157:90e3acc479a2 1261 * This parameter can be one of the following values:
mbed_official 157:90e3acc479a2 1262 * @arg 0x0 to 0x4 for timers A to E
mbed_official 157:90e3acc479a2 1263 * @param HRTIM_DMA: specifies the DMA Request sources.
mbed_official 157:90e3acc479a2 1264 * This parameter can be any combination of the following values:
mbed_official 157:90e3acc479a2 1265 * @arg HRTIM_MASTER_DMA_MCMP1: Master compare 1 DMA request source
mbed_official 157:90e3acc479a2 1266 * @arg HRTIM_MASTER_DMA_MCMP2: Master compare 2 DMA request source
mbed_official 157:90e3acc479a2 1267 * @arg HRTIM_MASTER_DMA_MCMP3: Master compare 3 DMA request source
mbed_official 157:90e3acc479a2 1268 * @arg HRTIM_MASTER_DMA_MCMP4: Master compare 4 DMA request source
mbed_official 157:90e3acc479a2 1269 * @arg HRTIM_MASTER_DMA_MREP: Master Repetition DMA request source
mbed_official 157:90e3acc479a2 1270 * @arg HRTIM_MASTER_DMA_SYNC: Synchronization input DMA request source
mbed_official 157:90e3acc479a2 1271 * @arg HRTIM_MASTER_DMA_MUPD:Master update DMA request source
mbed_official 157:90e3acc479a2 1272 * @arg HRTIM_TIM_DMA_CMP1: Timer compare 1 DMA request source
mbed_official 157:90e3acc479a2 1273 * @arg HRTIM_TIM_DMA_CMP2: Timer compare 2 DMA request source
mbed_official 157:90e3acc479a2 1274 * @arg HRTIM_TIM_DMA_CMP3: Timer compare 3 DMA request source
mbed_official 157:90e3acc479a2 1275 * @arg HRTIM_TIM_DMA_CMP4: Timer compare 4 DMA request source
mbed_official 157:90e3acc479a2 1276 * @arg HRTIM_TIM_DMA_REP: Timer repetition DMA request source
mbed_official 157:90e3acc479a2 1277 * @arg HRTIM_TIM_DMA_UPD: Timer update DMA request source
mbed_official 157:90e3acc479a2 1278 * @arg HRTIM_TIM_DMA_CPT1: Timer capture 1 DMA request source
mbed_official 157:90e3acc479a2 1279 * @arg HRTIM_TIM_DMA_CPT2: Timer capture 2 DMA request source
mbed_official 157:90e3acc479a2 1280 * @arg HRTIM_TIM_DMA_SET1: Timer output 1 set DMA request source
mbed_official 157:90e3acc479a2 1281 * @arg HRTIM_TIM_DMA_RST1: Timer output 1 reset DMA request source
mbed_official 157:90e3acc479a2 1282 * @arg HRTIM_TIM_DMA_SET2: Timer output 2 set DMA request source
mbed_official 157:90e3acc479a2 1283 * @arg HRTIM_TIM_DMA_RST2: Timer output 2 reset DMA request source
mbed_official 157:90e3acc479a2 1284 * @arg HRTIM_TIM_DMA_RST: Timer reset DMA request source
mbed_official 157:90e3acc479a2 1285 * @arg HRTIM_TIM_DMA_DLYPRT: Timer delay protection DMA request source
mbed_official 157:90e3acc479a2 1286 * @param NewState: new state of the DMA Request sources.
mbed_official 157:90e3acc479a2 1287 * This parameter can be: ENABLE or DISABLE.
mbed_official 157:90e3acc479a2 1288 * @retval None
mbed_official 157:90e3acc479a2 1289 */
mbed_official 157:90e3acc479a2 1290 void HRTIM_DMACmd(HRTIM_TypeDef* HRTIMx, uint32_t TimerIdx, uint32_t HRTIM_DMA, FunctionalState NewState)
mbed_official 157:90e3acc479a2 1291 {
mbed_official 157:90e3acc479a2 1292 if(TimerIdx != HRTIM_TIMERINDEX_MASTER)
mbed_official 157:90e3acc479a2 1293 {
mbed_official 157:90e3acc479a2 1294 if(NewState != DISABLE)
mbed_official 157:90e3acc479a2 1295 {
mbed_official 157:90e3acc479a2 1296 HRTIMx->HRTIM_TIMERx[TimerIdx].TIMxDIER |= HRTIM_DMA;
mbed_official 157:90e3acc479a2 1297 }
mbed_official 157:90e3acc479a2 1298 else
mbed_official 157:90e3acc479a2 1299 {
mbed_official 157:90e3acc479a2 1300 HRTIMx->HRTIM_TIMERx[TimerIdx].TIMxDIER &= ~HRTIM_DMA;
mbed_official 157:90e3acc479a2 1301 }
mbed_official 157:90e3acc479a2 1302 }
mbed_official 157:90e3acc479a2 1303 else
mbed_official 157:90e3acc479a2 1304 {
mbed_official 157:90e3acc479a2 1305 if(NewState != DISABLE)
mbed_official 157:90e3acc479a2 1306 {
mbed_official 157:90e3acc479a2 1307 HRTIMx->HRTIM_MASTER.MDIER |= HRTIM_DMA;
mbed_official 157:90e3acc479a2 1308 }
mbed_official 157:90e3acc479a2 1309 else
mbed_official 157:90e3acc479a2 1310 {
mbed_official 157:90e3acc479a2 1311 HRTIMx->HRTIM_MASTER.MDIER &= ~HRTIM_DMA;
mbed_official 157:90e3acc479a2 1312 }
mbed_official 157:90e3acc479a2 1313 }
mbed_official 157:90e3acc479a2 1314 }
mbed_official 157:90e3acc479a2 1315
mbed_official 157:90e3acc479a2 1316 /**
mbed_official 157:90e3acc479a2 1317 * @}
mbed_official 157:90e3acc479a2 1318 */
mbed_official 157:90e3acc479a2 1319
mbed_official 157:90e3acc479a2 1320 /** @defgroup HRTIM_Group3 Peripheral Control methods
mbed_official 157:90e3acc479a2 1321 * @brief management functions
mbed_official 157:90e3acc479a2 1322 *
mbed_official 157:90e3acc479a2 1323 @verbatim
mbed_official 157:90e3acc479a2 1324 ===============================================================================
mbed_official 157:90e3acc479a2 1325 ##### Peripheral Control methods #####
mbed_official 157:90e3acc479a2 1326 ===============================================================================
mbed_official 157:90e3acc479a2 1327 [..]
mbed_official 157:90e3acc479a2 1328 This subsection provides a set of functions allowing to control the HRTIMx data
mbed_official 157:90e3acc479a2 1329 transfers.
mbed_official 157:90e3acc479a2 1330
mbed_official 157:90e3acc479a2 1331 @endverbatim
mbed_official 157:90e3acc479a2 1332 * @{
mbed_official 157:90e3acc479a2 1333 */
mbed_official 157:90e3acc479a2 1334
mbed_official 157:90e3acc479a2 1335 /**
mbed_official 157:90e3acc479a2 1336 * @brief Configures an output in basic output compare mode
mbed_official 157:90e3acc479a2 1337 * @param HRTIMx: pointer to HRTIMx peripheral
mbed_official 157:90e3acc479a2 1338 * @param TimerIdx: Timer index
mbed_official 157:90e3acc479a2 1339 * This parameter can be one of the following values:
mbed_official 157:90e3acc479a2 1340 * @arg 0x0 to 0x4 for timers A to E
mbed_official 157:90e3acc479a2 1341 * @param OCChannel: Timer output
mbed_official 157:90e3acc479a2 1342 * This parameter can be one of the following values:
mbed_official 157:90e3acc479a2 1343 * @arg HRTIM_OUTPUT_TA1: Timer A - Output 1
mbed_official 157:90e3acc479a2 1344 * @arg HRTIM_OUTPUT_TA2: Timer A - Output 2
mbed_official 157:90e3acc479a2 1345 * @arg HRTIM_OUTPUT_TB1: Timer B - Output 1
mbed_official 157:90e3acc479a2 1346 * @arg HRTIM_OUTPUT_TB2: Timer B - Output 2
mbed_official 157:90e3acc479a2 1347 * @arg HRTIM_OUTPUT_TC1: Timer C - Output 1
mbed_official 157:90e3acc479a2 1348 * @arg HRTIM_OUTPUT_TC2: Timer C - Output 2
mbed_official 157:90e3acc479a2 1349 * @arg HRTIM_OUTPUT_TD1: Timer D - Output 1
mbed_official 157:90e3acc479a2 1350 * @arg HRTIM_OUTPUT_TD2: Timer D - Output 2
mbed_official 157:90e3acc479a2 1351 * @arg HRTIM_OUTPUT_TE1: Timer E - Output 1
mbed_official 157:90e3acc479a2 1352 * @arg HRTIM_OUTPUT_TE2: Timer E - Output 2
mbed_official 157:90e3acc479a2 1353 * @param pBasicOCChannelCfg: pointer to the basic output compare output configuration structure
mbed_official 157:90e3acc479a2 1354 * @note When the timer operates in basic output compare mode:
mbed_official 157:90e3acc479a2 1355 * Output 1 is implicitely controled by the compare unit 1
mbed_official 157:90e3acc479a2 1356 * Output 2 is implicitely controled by the compare unit 2
mbed_official 157:90e3acc479a2 1357 * Output Set/Reset crossbar is set according to the selected output compare mode:
mbed_official 157:90e3acc479a2 1358 * Toggle: SETxyR = RSTxyR = CMPy
mbed_official 157:90e3acc479a2 1359 * Active: SETxyR = CMPy, RSTxyR = 0
mbed_official 157:90e3acc479a2 1360 * Inactive: SETxy =0, RSTxy = CMPy
mbed_official 157:90e3acc479a2 1361 * @retval None
mbed_official 157:90e3acc479a2 1362 */
mbed_official 157:90e3acc479a2 1363 void HRTIM_SimpleOCChannelConfig(HRTIM_TypeDef * HRTIM_,
mbed_official 157:90e3acc479a2 1364 uint32_t TimerIdx,
mbed_official 157:90e3acc479a2 1365 uint32_t OCChannel,
mbed_official 157:90e3acc479a2 1366 HRTIM_BasicOCChannelCfgTypeDef* pBasicOCChannelCfg)
mbed_official 157:90e3acc479a2 1367 {
mbed_official 157:90e3acc479a2 1368 uint32_t CompareUnit = HRTIM_COMPAREUNIT_1;
mbed_official 157:90e3acc479a2 1369 HRTIM_CompareCfgTypeDef CompareCfg;
mbed_official 157:90e3acc479a2 1370 HRTIM_OutputCfgTypeDef OutputCfg;
mbed_official 157:90e3acc479a2 1371
mbed_official 157:90e3acc479a2 1372 /* Check parameters */
mbed_official 157:90e3acc479a2 1373 assert_param(IS_HRTIM_TIMER_OUTPUT(TimerIdx, OCChannel));
mbed_official 157:90e3acc479a2 1374 assert_param(IS_HRTIM_BASICOCMODE(pBasicOCChannelCfg->Mode));
mbed_official 157:90e3acc479a2 1375 assert_param(IS_HRTIM_OUTPUTPOLARITY(pBasicOCChannelCfg->Polarity));
mbed_official 157:90e3acc479a2 1376 assert_param(IS_HRTIM_OUTPUTIDLESTATE(pBasicOCChannelCfg->IdleState));
mbed_official 157:90e3acc479a2 1377
mbed_official 157:90e3acc479a2 1378 /* Configure timer compare unit */
mbed_official 157:90e3acc479a2 1379 switch (OCChannel)
mbed_official 157:90e3acc479a2 1380 {
mbed_official 157:90e3acc479a2 1381 case HRTIM_OUTPUT_TA1:
mbed_official 157:90e3acc479a2 1382 case HRTIM_OUTPUT_TB1:
mbed_official 157:90e3acc479a2 1383 case HRTIM_OUTPUT_TC1:
mbed_official 157:90e3acc479a2 1384 case HRTIM_OUTPUT_TD1:
mbed_official 157:90e3acc479a2 1385 case HRTIM_OUTPUT_TE1:
mbed_official 157:90e3acc479a2 1386 {
mbed_official 157:90e3acc479a2 1387 CompareUnit = HRTIM_COMPAREUNIT_1;
mbed_official 157:90e3acc479a2 1388 }
mbed_official 157:90e3acc479a2 1389 break;
mbed_official 157:90e3acc479a2 1390 case HRTIM_OUTPUT_TA2:
mbed_official 157:90e3acc479a2 1391 case HRTIM_OUTPUT_TB2:
mbed_official 157:90e3acc479a2 1392 case HRTIM_OUTPUT_TC2:
mbed_official 157:90e3acc479a2 1393 case HRTIM_OUTPUT_TD2:
mbed_official 157:90e3acc479a2 1394 case HRTIM_OUTPUT_TE2:
mbed_official 157:90e3acc479a2 1395 {
mbed_official 157:90e3acc479a2 1396 CompareUnit = HRTIM_COMPAREUNIT_2;
mbed_official 157:90e3acc479a2 1397 }
mbed_official 157:90e3acc479a2 1398 break;
mbed_official 157:90e3acc479a2 1399 default:
mbed_official 157:90e3acc479a2 1400 break;
mbed_official 157:90e3acc479a2 1401 }
mbed_official 157:90e3acc479a2 1402
mbed_official 157:90e3acc479a2 1403 CompareCfg.CompareValue = pBasicOCChannelCfg->Pulse;
mbed_official 157:90e3acc479a2 1404 CompareCfg.AutoDelayedMode = HRTIM_AUTODELAYEDMODE_REGULAR;
mbed_official 157:90e3acc479a2 1405 CompareCfg.AutoDelayedTimeout = 0;
mbed_official 157:90e3acc479a2 1406
mbed_official 157:90e3acc479a2 1407 HRTIM_CompareUnitConfig(HRTIM_,
mbed_official 157:90e3acc479a2 1408 TimerIdx,
mbed_official 157:90e3acc479a2 1409 CompareUnit,
mbed_official 157:90e3acc479a2 1410 &CompareCfg);
mbed_official 157:90e3acc479a2 1411
mbed_official 157:90e3acc479a2 1412 /* Configure timer output */
mbed_official 157:90e3acc479a2 1413 OutputCfg.Polarity = pBasicOCChannelCfg->Polarity;
mbed_official 157:90e3acc479a2 1414 OutputCfg.IdleState = pBasicOCChannelCfg->IdleState;
mbed_official 157:90e3acc479a2 1415 OutputCfg.FaultState = HRTIM_OUTPUTFAULTSTATE_NONE;
mbed_official 157:90e3acc479a2 1416 OutputCfg.IdleMode = HRTIM_OUTPUTIDLEMODE_NONE;
mbed_official 157:90e3acc479a2 1417 OutputCfg.ChopperModeEnable = HRTIM_OUTPUTCHOPPERMODE_DISABLED;
mbed_official 157:90e3acc479a2 1418 OutputCfg.BurstModeEntryDelayed = HRTIM_OUTPUTBURSTMODEENTRY_REGULAR;
mbed_official 157:90e3acc479a2 1419
mbed_official 157:90e3acc479a2 1420 switch (pBasicOCChannelCfg->Mode)
mbed_official 157:90e3acc479a2 1421 {
mbed_official 157:90e3acc479a2 1422 case HRTIM_BASICOCMODE_TOGGLE:
mbed_official 157:90e3acc479a2 1423 {
mbed_official 157:90e3acc479a2 1424 if (CompareUnit == HRTIM_COMPAREUNIT_1)
mbed_official 157:90e3acc479a2 1425 {
mbed_official 157:90e3acc479a2 1426 OutputCfg.SetSource = HRTIM_OUTPUTSET_TIMCMP1;
mbed_official 157:90e3acc479a2 1427 }
mbed_official 157:90e3acc479a2 1428 else
mbed_official 157:90e3acc479a2 1429 {
mbed_official 157:90e3acc479a2 1430 OutputCfg.SetSource = HRTIM_OUTPUTSET_TIMCMP2;
mbed_official 157:90e3acc479a2 1431 }
mbed_official 157:90e3acc479a2 1432 OutputCfg.ResetSource = OutputCfg.SetSource;
mbed_official 157:90e3acc479a2 1433 }
mbed_official 157:90e3acc479a2 1434 break;
mbed_official 157:90e3acc479a2 1435 case HRTIM_BASICOCMODE_ACTIVE:
mbed_official 157:90e3acc479a2 1436 {
mbed_official 157:90e3acc479a2 1437 if (CompareUnit == HRTIM_COMPAREUNIT_1)
mbed_official 157:90e3acc479a2 1438 {
mbed_official 157:90e3acc479a2 1439 OutputCfg.SetSource = HRTIM_OUTPUTSET_TIMCMP1;
mbed_official 157:90e3acc479a2 1440 }
mbed_official 157:90e3acc479a2 1441 else
mbed_official 157:90e3acc479a2 1442 {
mbed_official 157:90e3acc479a2 1443 OutputCfg.SetSource = HRTIM_OUTPUTSET_TIMCMP2;
mbed_official 157:90e3acc479a2 1444 }
mbed_official 157:90e3acc479a2 1445 OutputCfg.ResetSource = HRTIM_OUTPUTRESET_NONE;
mbed_official 157:90e3acc479a2 1446 }
mbed_official 157:90e3acc479a2 1447 break;
mbed_official 157:90e3acc479a2 1448 case HRTIM_BASICOCMODE_INACTIVE:
mbed_official 157:90e3acc479a2 1449 {
mbed_official 157:90e3acc479a2 1450 if (CompareUnit == HRTIM_COMPAREUNIT_1)
mbed_official 157:90e3acc479a2 1451 {
mbed_official 157:90e3acc479a2 1452 OutputCfg.ResetSource = HRTIM_OUTPUTRESET_TIMCMP1;
mbed_official 157:90e3acc479a2 1453 }
mbed_official 157:90e3acc479a2 1454 else
mbed_official 157:90e3acc479a2 1455 {
mbed_official 157:90e3acc479a2 1456 OutputCfg.ResetSource = HRTIM_OUTPUTRESET_TIMCMP2;
mbed_official 157:90e3acc479a2 1457 }
mbed_official 157:90e3acc479a2 1458 OutputCfg.SetSource = HRTIM_OUTPUTSET_NONE;
mbed_official 157:90e3acc479a2 1459 }
mbed_official 157:90e3acc479a2 1460 break;
mbed_official 157:90e3acc479a2 1461 default:
mbed_official 157:90e3acc479a2 1462 break;
mbed_official 157:90e3acc479a2 1463 }
mbed_official 157:90e3acc479a2 1464
mbed_official 157:90e3acc479a2 1465 HRTIM_OutputConfig(HRTIM_, TimerIdx, OCChannel, &OutputCfg);
mbed_official 157:90e3acc479a2 1466 }
mbed_official 157:90e3acc479a2 1467
mbed_official 157:90e3acc479a2 1468 /**
mbed_official 157:90e3acc479a2 1469 * @brief Configures an output in basic PWM mode
mbed_official 157:90e3acc479a2 1470 * @param HRTIMx: pointer to HRTIMx peripheral
mbed_official 157:90e3acc479a2 1471 * @param TimerIdx: Timer index
mbed_official 157:90e3acc479a2 1472 * This parameter can be one of the following values:
mbed_official 157:90e3acc479a2 1473 * @arg 0x0 to 0x4 for timers A to E
mbed_official 157:90e3acc479a2 1474 * @param PWMChannel: Timer output
mbed_official 157:90e3acc479a2 1475 * This parameter can be one of the following values:
mbed_official 157:90e3acc479a2 1476 * @arg HRTIM_OUTPUT_TA1: Timer A - Output 1
mbed_official 157:90e3acc479a2 1477 * @arg HRTIM_OUTPUT_TA2: Timer A - Output 2
mbed_official 157:90e3acc479a2 1478 * @arg HRTIM_OUTPUT_TB1: Timer B - Output 1
mbed_official 157:90e3acc479a2 1479 * @arg HRTIM_OUTPUT_TB2: Timer B - Output 2
mbed_official 157:90e3acc479a2 1480 * @arg HRTIM_OUTPUT_TC1: Timer C - Output 1
mbed_official 157:90e3acc479a2 1481 * @arg HRTIM_OUTPUT_TC2: Timer C - Output 2
mbed_official 157:90e3acc479a2 1482 * @arg HRTIM_OUTPUT_TD1: Timer D - Output 1
mbed_official 157:90e3acc479a2 1483 * @arg HRTIM_OUTPUT_TD2: Timer D - Output 2
mbed_official 157:90e3acc479a2 1484 * @arg HRTIM_OUTPUT_TE1: Timer E - Output 1
mbed_official 157:90e3acc479a2 1485 * @arg HRTIM_OUTPUT_TE2: Timer E - Output 2
mbed_official 157:90e3acc479a2 1486 * @param pBasicPWMChannelCfg: pointer to the basic PWM output configuration structure
mbed_official 157:90e3acc479a2 1487 * @note When the timer operates in basic PWM output mode:
mbed_official 157:90e3acc479a2 1488 * Output 1 is implicitly controled by the compare unit 1
mbed_official 157:90e3acc479a2 1489 * Output 2 is implicitly controled by the compare unit 2
mbed_official 157:90e3acc479a2 1490 * Output Set/Reset crossbar is set as follows:
mbed_official 157:90e3acc479a2 1491 * Output 1: SETx1R = CMP1, RSTx1R = PER
mbed_official 157:90e3acc479a2 1492 * Output 2: SETx2R = CMP2, RST2R = PER
mbed_official 157:90e3acc479a2 1493 * @retval None
mbed_official 157:90e3acc479a2 1494 */
mbed_official 157:90e3acc479a2 1495 void HRTIM_SimplePWMChannelConfig(HRTIM_TypeDef * HRTIM_,
mbed_official 157:90e3acc479a2 1496 uint32_t TimerIdx,
mbed_official 157:90e3acc479a2 1497 uint32_t PWMChannel,
mbed_official 157:90e3acc479a2 1498 HRTIM_BasicPWMChannelCfgTypeDef* pBasicPWMChannelCfg)
mbed_official 157:90e3acc479a2 1499 {
mbed_official 157:90e3acc479a2 1500 uint32_t CompareUnit = HRTIM_COMPAREUNIT_1;
mbed_official 157:90e3acc479a2 1501 HRTIM_CompareCfgTypeDef CompareCfg;
mbed_official 157:90e3acc479a2 1502 HRTIM_OutputCfgTypeDef OutputCfg;
mbed_official 157:90e3acc479a2 1503
mbed_official 157:90e3acc479a2 1504 /* Check parameters */
mbed_official 157:90e3acc479a2 1505 assert_param(IS_HRTIM_TIMER_OUTPUT(TimerIdx, PWMChannel));
mbed_official 157:90e3acc479a2 1506 assert_param(IS_HRTIM_OUTPUTPOLARITY(pBasicPWMChannelCfg->Polarity));
mbed_official 157:90e3acc479a2 1507 assert_param(IS_HRTIM_OUTPUTIDLESTATE(pBasicPWMChannelCfg->IdleState));
mbed_official 157:90e3acc479a2 1508
mbed_official 157:90e3acc479a2 1509 /* Configure timer compare unit */
mbed_official 157:90e3acc479a2 1510 switch (PWMChannel)
mbed_official 157:90e3acc479a2 1511 {
mbed_official 157:90e3acc479a2 1512 case HRTIM_OUTPUT_TA1:
mbed_official 157:90e3acc479a2 1513 case HRTIM_OUTPUT_TB1:
mbed_official 157:90e3acc479a2 1514 case HRTIM_OUTPUT_TC1:
mbed_official 157:90e3acc479a2 1515 case HRTIM_OUTPUT_TD1:
mbed_official 157:90e3acc479a2 1516 case HRTIM_OUTPUT_TE1:
mbed_official 157:90e3acc479a2 1517 {
mbed_official 157:90e3acc479a2 1518 CompareUnit = HRTIM_COMPAREUNIT_1;
mbed_official 157:90e3acc479a2 1519 }
mbed_official 157:90e3acc479a2 1520 break;
mbed_official 157:90e3acc479a2 1521 case HRTIM_OUTPUT_TA2:
mbed_official 157:90e3acc479a2 1522 case HRTIM_OUTPUT_TB2:
mbed_official 157:90e3acc479a2 1523 case HRTIM_OUTPUT_TC2:
mbed_official 157:90e3acc479a2 1524 case HRTIM_OUTPUT_TD2:
mbed_official 157:90e3acc479a2 1525 case HRTIM_OUTPUT_TE2:
mbed_official 157:90e3acc479a2 1526 {
mbed_official 157:90e3acc479a2 1527 CompareUnit = HRTIM_COMPAREUNIT_2;
mbed_official 157:90e3acc479a2 1528 }
mbed_official 157:90e3acc479a2 1529 break;
mbed_official 157:90e3acc479a2 1530 default:
mbed_official 157:90e3acc479a2 1531 break;
mbed_official 157:90e3acc479a2 1532 }
mbed_official 157:90e3acc479a2 1533
mbed_official 157:90e3acc479a2 1534 CompareCfg.CompareValue = pBasicPWMChannelCfg->Pulse;
mbed_official 157:90e3acc479a2 1535 CompareCfg.AutoDelayedMode = HRTIM_AUTODELAYEDMODE_REGULAR;
mbed_official 157:90e3acc479a2 1536 CompareCfg.AutoDelayedTimeout = 0;
mbed_official 157:90e3acc479a2 1537
mbed_official 157:90e3acc479a2 1538 HRTIM_CompareUnitConfig(HRTIM_,
mbed_official 157:90e3acc479a2 1539 TimerIdx,
mbed_official 157:90e3acc479a2 1540 CompareUnit,
mbed_official 157:90e3acc479a2 1541 &CompareCfg);
mbed_official 157:90e3acc479a2 1542
mbed_official 157:90e3acc479a2 1543 /* Configure timer output */
mbed_official 157:90e3acc479a2 1544 OutputCfg.Polarity = pBasicPWMChannelCfg->Polarity;
mbed_official 157:90e3acc479a2 1545 OutputCfg.IdleState = pBasicPWMChannelCfg->IdleState;
mbed_official 157:90e3acc479a2 1546 OutputCfg.FaultState = HRTIM_OUTPUTFAULTSTATE_NONE;
mbed_official 157:90e3acc479a2 1547 OutputCfg.IdleMode = HRTIM_OUTPUTIDLEMODE_NONE;
mbed_official 157:90e3acc479a2 1548 OutputCfg.ChopperModeEnable = HRTIM_OUTPUTCHOPPERMODE_DISABLED;
mbed_official 157:90e3acc479a2 1549 OutputCfg.BurstModeEntryDelayed = HRTIM_OUTPUTBURSTMODEENTRY_REGULAR;
mbed_official 157:90e3acc479a2 1550
mbed_official 157:90e3acc479a2 1551 if (CompareUnit == HRTIM_COMPAREUNIT_1)
mbed_official 157:90e3acc479a2 1552 {
mbed_official 157:90e3acc479a2 1553 OutputCfg.SetSource = HRTIM_OUTPUTSET_TIMCMP1;
mbed_official 157:90e3acc479a2 1554 }
mbed_official 157:90e3acc479a2 1555 else
mbed_official 157:90e3acc479a2 1556 {
mbed_official 157:90e3acc479a2 1557 OutputCfg.SetSource = HRTIM_OUTPUTSET_TIMCMP2;
mbed_official 157:90e3acc479a2 1558 }
mbed_official 157:90e3acc479a2 1559 OutputCfg.ResetSource = HRTIM_OUTPUTSET_TIMPER;
mbed_official 157:90e3acc479a2 1560
mbed_official 157:90e3acc479a2 1561 HRTIM_OutputConfig(HRTIM_, TimerIdx, PWMChannel, &OutputCfg);
mbed_official 157:90e3acc479a2 1562 }
mbed_official 157:90e3acc479a2 1563
mbed_official 157:90e3acc479a2 1564 /**
mbed_official 157:90e3acc479a2 1565 * @brief Configures a basic capture
mbed_official 157:90e3acc479a2 1566 * @param HRTIMx: pointer to HRTIMx peripheral
mbed_official 157:90e3acc479a2 1567 * @param TimerIdx: Timer index
mbed_official 157:90e3acc479a2 1568 * This parameter can be one of the following values:
mbed_official 157:90e3acc479a2 1569 * @arg 0x0 to 0x4 for timers A to E
mbed_official 157:90e3acc479a2 1570 * @param CaptureChannel: Capture unit
mbed_official 157:90e3acc479a2 1571 * This parameter can be one of the following values:
mbed_official 157:90e3acc479a2 1572 * @arg HRTIM_CAPTUREUNIT_1: Capture unit 1
mbed_official 157:90e3acc479a2 1573 * @arg HRTIM_CAPTUREUNIT_2: Capture unit 2
mbed_official 157:90e3acc479a2 1574 * @param pBasicCaptureChannelCfg: pointer to the basic capture configuration structure
mbed_official 157:90e3acc479a2 1575 * @note When the timer operates in basic capture mode the capture is triggered
mbed_official 157:90e3acc479a2 1576 * by the designated external event and GPIO input is implicitly used as event source.
mbed_official 157:90e3acc479a2 1577 * The cature can be triggered by a rising edge, a falling edge or both
mbed_official 157:90e3acc479a2 1578 * edges on event channel.
mbed_official 157:90e3acc479a2 1579 * @retval None
mbed_official 157:90e3acc479a2 1580 */
mbed_official 157:90e3acc479a2 1581 void HRTIM_SimpleCaptureChannelConfig(HRTIM_TypeDef * HRTIMx,
mbed_official 157:90e3acc479a2 1582 uint32_t TimerIdx,
mbed_official 157:90e3acc479a2 1583 uint32_t CaptureChannel,
mbed_official 157:90e3acc479a2 1584 HRTIM_BasicCaptureChannelCfgTypeDef* pBasicCaptureChannelCfg)
mbed_official 157:90e3acc479a2 1585 {
mbed_official 157:90e3acc479a2 1586 HRTIM_EventCfgTypeDef EventCfg;
mbed_official 157:90e3acc479a2 1587
mbed_official 157:90e3acc479a2 1588 /* Check parameters */
mbed_official 157:90e3acc479a2 1589 assert_param(IS_HRTIM_TIMING_UNIT(TimerIdx));
mbed_official 157:90e3acc479a2 1590 assert_param(IS_HRTIM_CAPTUREUNIT(CaptureChannel));
mbed_official 157:90e3acc479a2 1591 assert_param(IS_HRTIM_EVENT(pBasicCaptureChannelCfg->Event));
mbed_official 157:90e3acc479a2 1592 assert_param(IS_HRTIM_EVENTPOLARITY(pBasicCaptureChannelCfg->EventPolarity));
mbed_official 157:90e3acc479a2 1593 assert_param(IS_HRTIM_EVENTSENSITIVITY(pBasicCaptureChannelCfg->EventSensitivity));
mbed_official 157:90e3acc479a2 1594 assert_param(IS_HRTIM_EVENTFILTER(pBasicCaptureChannelCfg->EventFilter));
mbed_official 157:90e3acc479a2 1595
mbed_official 157:90e3acc479a2 1596 /* Configure external event channel */
mbed_official 157:90e3acc479a2 1597 EventCfg.FastMode = HRTIM_EVENTFASTMODE_DISABLE;
mbed_official 157:90e3acc479a2 1598 EventCfg.Filter = pBasicCaptureChannelCfg->EventFilter;
mbed_official 157:90e3acc479a2 1599 EventCfg.Polarity = pBasicCaptureChannelCfg->EventPolarity;
mbed_official 157:90e3acc479a2 1600 EventCfg.Sensitivity = pBasicCaptureChannelCfg->EventSensitivity;
mbed_official 157:90e3acc479a2 1601 EventCfg.Source = HRTIM_EVENTSRC_1;
mbed_official 157:90e3acc479a2 1602
mbed_official 157:90e3acc479a2 1603 HRTIM_ExternalEventConfig(HRTIMx,
mbed_official 157:90e3acc479a2 1604 pBasicCaptureChannelCfg->Event,
mbed_official 157:90e3acc479a2 1605 &EventCfg);
mbed_official 157:90e3acc479a2 1606
mbed_official 157:90e3acc479a2 1607 /* Memorize capture trigger (will be configured when the capture is started */
mbed_official 157:90e3acc479a2 1608 HRTIM_CaptureUnitConfig(HRTIMx,
mbed_official 157:90e3acc479a2 1609 TimerIdx,
mbed_official 157:90e3acc479a2 1610 CaptureChannel,
mbed_official 157:90e3acc479a2 1611 pBasicCaptureChannelCfg->Event);
mbed_official 157:90e3acc479a2 1612 }
mbed_official 157:90e3acc479a2 1613
mbed_official 157:90e3acc479a2 1614 /**
mbed_official 157:90e3acc479a2 1615 * @brief Configures an output basic one pulse mode
mbed_official 157:90e3acc479a2 1616 * @param HRTIMx: pointer to HRTIMx peripheral
mbed_official 157:90e3acc479a2 1617 * @param TimerIdx: Timer index
mbed_official 157:90e3acc479a2 1618 * This parameter can be one of the following values:
mbed_official 157:90e3acc479a2 1619 * @arg 0x0 to 0x4 for timers A to E
mbed_official 157:90e3acc479a2 1620 * @param OnePulseChannel: Timer output
mbed_official 157:90e3acc479a2 1621 * This parameter can be one of the following values:
mbed_official 157:90e3acc479a2 1622 * @arg HRTIM_OUTPUT_TA1: Timer A - Output 1
mbed_official 157:90e3acc479a2 1623 * @arg HRTIM_OUTPUT_TA2: Timer A - Output 2
mbed_official 157:90e3acc479a2 1624 * @arg HRTIM_OUTPUT_TB1: Timer B - Output 1
mbed_official 157:90e3acc479a2 1625 * @arg HRTIM_OUTPUT_TB2: Timer B - Output 2
mbed_official 157:90e3acc479a2 1626 * @arg HRTIM_OUTPUT_TC1: Timer C - Output 1
mbed_official 157:90e3acc479a2 1627 * @arg HRTIM_OUTPUT_TC2: Timer C - Output 2
mbed_official 157:90e3acc479a2 1628 * @arg HRTIM_OUTPUT_TD1: Timer D - Output 1
mbed_official 157:90e3acc479a2 1629 * @arg HRTIM_OUTPUT_TD2: Timer D - Output 2
mbed_official 157:90e3acc479a2 1630 * @arg HRTIM_OUTPUT_TE1: Timer E - Output 1
mbed_official 157:90e3acc479a2 1631 * @arg HRTIM_OUTPUT_TE2: Timer E - Output 2
mbed_official 157:90e3acc479a2 1632 * @param pBasicOnePulseChannelCfg: pointer to the basic one pulse output configuration structure
mbed_official 157:90e3acc479a2 1633 * @note When the timer operates in basic one pulse mode:
mbed_official 157:90e3acc479a2 1634 * the timer counter is implicitly started by the reset event,
mbed_official 157:90e3acc479a2 1635 * the reset of the timer counter is triggered by the designated external event
mbed_official 157:90e3acc479a2 1636 * GPIO input is implicitly used as event source,
mbed_official 157:90e3acc479a2 1637 * Output 1 is implicitly controled by the compare unit 1,
mbed_official 157:90e3acc479a2 1638 * Output 2 is implicitly controled by the compare unit 2.
mbed_official 157:90e3acc479a2 1639 * Output Set/Reset crossbar is set as follows:
mbed_official 157:90e3acc479a2 1640 * Output 1: SETx1R = CMP1, RSTx1R = PER
mbed_official 157:90e3acc479a2 1641 * Output 2: SETx2R = CMP2, RST2R = PER
mbed_official 157:90e3acc479a2 1642 * The counter mode should be HRTIM_MODE_SINGLESHOT_RETRIGGERABLE
mbed_official 157:90e3acc479a2 1643 * @retval None
mbed_official 157:90e3acc479a2 1644 */
mbed_official 157:90e3acc479a2 1645 void HRTIM_SimpleOnePulseChannelConfig(HRTIM_TypeDef * HRTIM_,
mbed_official 157:90e3acc479a2 1646 uint32_t TimerIdx,
mbed_official 157:90e3acc479a2 1647 uint32_t OnePulseChannel,
mbed_official 157:90e3acc479a2 1648 HRTIM_BasicOnePulseChannelCfgTypeDef* pBasicOnePulseChannelCfg)
mbed_official 157:90e3acc479a2 1649 {
mbed_official 157:90e3acc479a2 1650 uint32_t CompareUnit = HRTIM_COMPAREUNIT_1;
mbed_official 157:90e3acc479a2 1651 HRTIM_CompareCfgTypeDef CompareCfg;
mbed_official 157:90e3acc479a2 1652 HRTIM_OutputCfgTypeDef OutputCfg;
mbed_official 157:90e3acc479a2 1653 HRTIM_EventCfgTypeDef EventCfg;
mbed_official 157:90e3acc479a2 1654
mbed_official 157:90e3acc479a2 1655 /* Check parameters */
mbed_official 157:90e3acc479a2 1656 assert_param(IS_HRTIM_TIMER_OUTPUT(TimerIdx, OnePulseChannel));
mbed_official 157:90e3acc479a2 1657 assert_param(IS_HRTIM_OUTPUTPOLARITY(pBasicOnePulseChannelCfg->OutputPolarity));
mbed_official 157:90e3acc479a2 1658 assert_param(IS_HRTIM_OUTPUTIDLESTATE(pBasicOnePulseChannelCfg->OutputIdleState));
mbed_official 157:90e3acc479a2 1659 assert_param(IS_HRTIM_EVENT(pBasicOnePulseChannelCfg->Event));
mbed_official 157:90e3acc479a2 1660 assert_param(IS_HRTIM_EVENTPOLARITY(pBasicOnePulseChannelCfg->EventPolarity));
mbed_official 157:90e3acc479a2 1661 assert_param(IS_HRTIM_EVENTSENSITIVITY(pBasicOnePulseChannelCfg->EventSensitivity));
mbed_official 157:90e3acc479a2 1662 assert_param(IS_HRTIM_EVENTFILTER(pBasicOnePulseChannelCfg->EventFilter));
mbed_official 157:90e3acc479a2 1663
mbed_official 157:90e3acc479a2 1664 /* Configure timer compare unit */
mbed_official 157:90e3acc479a2 1665 switch (OnePulseChannel)
mbed_official 157:90e3acc479a2 1666 {
mbed_official 157:90e3acc479a2 1667 case HRTIM_OUTPUT_TA1:
mbed_official 157:90e3acc479a2 1668 case HRTIM_OUTPUT_TB1:
mbed_official 157:90e3acc479a2 1669 case HRTIM_OUTPUT_TC1:
mbed_official 157:90e3acc479a2 1670 case HRTIM_OUTPUT_TD1:
mbed_official 157:90e3acc479a2 1671 case HRTIM_OUTPUT_TE1:
mbed_official 157:90e3acc479a2 1672 {
mbed_official 157:90e3acc479a2 1673 CompareUnit = HRTIM_COMPAREUNIT_1;
mbed_official 157:90e3acc479a2 1674 }
mbed_official 157:90e3acc479a2 1675 break;
mbed_official 157:90e3acc479a2 1676 case HRTIM_OUTPUT_TA2:
mbed_official 157:90e3acc479a2 1677 case HRTIM_OUTPUT_TB2:
mbed_official 157:90e3acc479a2 1678 case HRTIM_OUTPUT_TC2:
mbed_official 157:90e3acc479a2 1679 case HRTIM_OUTPUT_TD2:
mbed_official 157:90e3acc479a2 1680 case HRTIM_OUTPUT_TE2:
mbed_official 157:90e3acc479a2 1681 {
mbed_official 157:90e3acc479a2 1682 CompareUnit = HRTIM_COMPAREUNIT_2;
mbed_official 157:90e3acc479a2 1683 }
mbed_official 157:90e3acc479a2 1684 break;
mbed_official 157:90e3acc479a2 1685 default:
mbed_official 157:90e3acc479a2 1686 break;
mbed_official 157:90e3acc479a2 1687 }
mbed_official 157:90e3acc479a2 1688
mbed_official 157:90e3acc479a2 1689 CompareCfg.CompareValue = pBasicOnePulseChannelCfg->Pulse;
mbed_official 157:90e3acc479a2 1690 CompareCfg.AutoDelayedMode = HRTIM_AUTODELAYEDMODE_REGULAR;
mbed_official 157:90e3acc479a2 1691 CompareCfg.AutoDelayedTimeout = 0;
mbed_official 157:90e3acc479a2 1692
mbed_official 157:90e3acc479a2 1693 HRTIM_CompareUnitConfig(HRTIM_,
mbed_official 157:90e3acc479a2 1694 TimerIdx,
mbed_official 157:90e3acc479a2 1695 CompareUnit,
mbed_official 157:90e3acc479a2 1696 &CompareCfg);
mbed_official 157:90e3acc479a2 1697
mbed_official 157:90e3acc479a2 1698 /* Configure timer output */
mbed_official 157:90e3acc479a2 1699 OutputCfg.Polarity = pBasicOnePulseChannelCfg->OutputPolarity;
mbed_official 157:90e3acc479a2 1700 OutputCfg.IdleState = pBasicOnePulseChannelCfg->OutputIdleState;
mbed_official 157:90e3acc479a2 1701 OutputCfg.FaultState = HRTIM_OUTPUTFAULTSTATE_NONE;
mbed_official 157:90e3acc479a2 1702 OutputCfg.IdleMode = HRTIM_OUTPUTIDLEMODE_NONE;
mbed_official 157:90e3acc479a2 1703 OutputCfg.ChopperModeEnable = HRTIM_OUTPUTCHOPPERMODE_DISABLED;
mbed_official 157:90e3acc479a2 1704 OutputCfg.BurstModeEntryDelayed = HRTIM_OUTPUTBURSTMODEENTRY_REGULAR;
mbed_official 157:90e3acc479a2 1705
mbed_official 157:90e3acc479a2 1706 if (CompareUnit == HRTIM_COMPAREUNIT_1)
mbed_official 157:90e3acc479a2 1707 {
mbed_official 157:90e3acc479a2 1708 OutputCfg.SetSource = HRTIM_OUTPUTSET_TIMCMP1;
mbed_official 157:90e3acc479a2 1709 }
mbed_official 157:90e3acc479a2 1710 else
mbed_official 157:90e3acc479a2 1711 {
mbed_official 157:90e3acc479a2 1712 OutputCfg.SetSource = HRTIM_OUTPUTSET_TIMCMP2;
mbed_official 157:90e3acc479a2 1713 }
mbed_official 157:90e3acc479a2 1714 OutputCfg.ResetSource = HRTIM_OUTPUTSET_TIMPER;
mbed_official 157:90e3acc479a2 1715
mbed_official 157:90e3acc479a2 1716 HRTIM_OutputConfig(HRTIM_,
mbed_official 157:90e3acc479a2 1717 TimerIdx,
mbed_official 157:90e3acc479a2 1718 OnePulseChannel,
mbed_official 157:90e3acc479a2 1719 &OutputCfg);
mbed_official 157:90e3acc479a2 1720
mbed_official 157:90e3acc479a2 1721 /* Configure external event channel */
mbed_official 157:90e3acc479a2 1722 EventCfg.FastMode = HRTIM_EVENTFASTMODE_DISABLE;
mbed_official 157:90e3acc479a2 1723 EventCfg.Filter = pBasicOnePulseChannelCfg->EventFilter;
mbed_official 157:90e3acc479a2 1724 EventCfg.Polarity = pBasicOnePulseChannelCfg->EventPolarity;
mbed_official 157:90e3acc479a2 1725 EventCfg.Sensitivity = pBasicOnePulseChannelCfg->EventSensitivity;
mbed_official 157:90e3acc479a2 1726 EventCfg.Source = HRTIM_EVENTSRC_1;
mbed_official 157:90e3acc479a2 1727
mbed_official 157:90e3acc479a2 1728 HRTIM_ExternalEventConfig(HRTIM_,
mbed_official 157:90e3acc479a2 1729 pBasicOnePulseChannelCfg->Event,
mbed_official 157:90e3acc479a2 1730 &EventCfg);
mbed_official 157:90e3acc479a2 1731
mbed_official 157:90e3acc479a2 1732 /* Configure the timer reset register */
mbed_official 157:90e3acc479a2 1733 HRTIM_TIM_ResetConfig(HRTIM_,
mbed_official 157:90e3acc479a2 1734 TimerIdx,
mbed_official 157:90e3acc479a2 1735 pBasicOnePulseChannelCfg->Event);
mbed_official 157:90e3acc479a2 1736 }
mbed_official 157:90e3acc479a2 1737
mbed_official 157:90e3acc479a2 1738 /**
mbed_official 157:90e3acc479a2 1739 * @brief Configures the general behavior of a timer operating in waveform mode
mbed_official 157:90e3acc479a2 1740 * @param HRTIMx: pointer to HRTIMx peripheral
mbed_official 157:90e3acc479a2 1741 * @param TimerIdx: Timer index
mbed_official 157:90e3acc479a2 1742 * This parameter can be one of the following values:
mbed_official 157:90e3acc479a2 1743 * @arg 0x0 to 0x4 for timers A to E
mbed_official 157:90e3acc479a2 1744 * @param pTimerCfg: pointer to the timer configuration structure
mbed_official 157:90e3acc479a2 1745 * @note When the timer operates in waveform mode, all the features supported by
mbed_official 157:90e3acc479a2 1746 * the HRTIMx are available without any limitation.
mbed_official 157:90e3acc479a2 1747 * @retval None
mbed_official 157:90e3acc479a2 1748 */
mbed_official 157:90e3acc479a2 1749 void HRTIM_WaveformTimerConfig(HRTIM_TypeDef * HRTIMx,
mbed_official 157:90e3acc479a2 1750 uint32_t TimerIdx,
mbed_official 157:90e3acc479a2 1751 HRTIM_TimerCfgTypeDef * pTimerCfg)
mbed_official 157:90e3acc479a2 1752 {
mbed_official 157:90e3acc479a2 1753 uint32_t HRTIM_timcr;
mbed_official 157:90e3acc479a2 1754 uint32_t HRTIM_timfltr;
mbed_official 157:90e3acc479a2 1755 uint32_t HRTIM_timoutr;
mbed_official 157:90e3acc479a2 1756 uint32_t HRTIM_timrstr;
mbed_official 157:90e3acc479a2 1757
mbed_official 157:90e3acc479a2 1758 /* Check parameters */
mbed_official 157:90e3acc479a2 1759 assert_param(IS_HRTIM_TIMING_UNIT(TimerIdx));
mbed_official 157:90e3acc479a2 1760 assert_param(IS_HRTIM_TIMPUSHPULLMODE(pTimerCfg->PushPull));
mbed_official 157:90e3acc479a2 1761 assert_param(IS_HRTIM_TIMFAULTENABLE(pTimerCfg->FaultEnable));
mbed_official 157:90e3acc479a2 1762 assert_param(IS_HRTIM_TIMFAULTLOCK(pTimerCfg->FaultLock));
mbed_official 157:90e3acc479a2 1763 assert_param(IS_HRTIM_TIMDEADTIMEINSERTION(pTimerCfg->DeadTimeInsertion));
mbed_official 157:90e3acc479a2 1764 assert_param(IS_HRTIM_TIMDELAYEDPROTECTION(pTimerCfg->DelayedProtectionMode));
mbed_official 157:90e3acc479a2 1765 assert_param(IS_HRTIM_TIMUPDATETRIGGER(pTimerCfg->UpdateTrigger));
mbed_official 157:90e3acc479a2 1766 assert_param(IS_HRTIM_TIMRESETTRIGGER(pTimerCfg->ResetTrigger));
mbed_official 157:90e3acc479a2 1767 assert_param(IS_HRTIM_TIMUPDATEONRESET(pTimerCfg->ResetUpdate));
mbed_official 157:90e3acc479a2 1768
mbed_official 157:90e3acc479a2 1769 /* Configure timing unit (Timer A to Timer E) */
mbed_official 157:90e3acc479a2 1770 HRTIM_timcr = HRTIMx->HRTIM_TIMERx[TimerIdx].TIMxCR;
mbed_official 157:90e3acc479a2 1771 HRTIM_timfltr = HRTIMx->HRTIM_TIMERx[TimerIdx].FLTxR;
mbed_official 157:90e3acc479a2 1772 HRTIM_timoutr = HRTIMx->HRTIM_TIMERx[TimerIdx].OUTxR;
mbed_official 157:90e3acc479a2 1773 HRTIM_timrstr = HRTIMx->HRTIM_TIMERx[TimerIdx].RSTxR;
mbed_official 157:90e3acc479a2 1774
mbed_official 157:90e3acc479a2 1775 /* Set the push-pull mode */
mbed_official 157:90e3acc479a2 1776 HRTIM_timcr &= ~(HRTIM_TIMCR_PSHPLL);
mbed_official 157:90e3acc479a2 1777 HRTIM_timcr |= pTimerCfg->PushPull;
mbed_official 157:90e3acc479a2 1778
mbed_official 157:90e3acc479a2 1779 /* Enable/Disable registers update on timer counter reset */
mbed_official 157:90e3acc479a2 1780 HRTIM_timcr &= ~(HRTIM_TIMCR_TRSTU);
mbed_official 157:90e3acc479a2 1781 HRTIM_timcr |= pTimerCfg->ResetUpdate;
mbed_official 157:90e3acc479a2 1782
mbed_official 157:90e3acc479a2 1783 /* Set the timer update trigger */
mbed_official 157:90e3acc479a2 1784 HRTIM_timcr &= ~(HRTIM_TIMCR_TIMUPDATETRIGGER);
mbed_official 157:90e3acc479a2 1785 HRTIM_timcr |= pTimerCfg->UpdateTrigger;
mbed_official 157:90e3acc479a2 1786
mbed_official 157:90e3acc479a2 1787 /* Enable/Disable the fault channel at timer level */
mbed_official 157:90e3acc479a2 1788 HRTIM_timfltr &= ~(HRTIM_FLTR_FLTxEN);
mbed_official 157:90e3acc479a2 1789 HRTIM_timfltr |= (pTimerCfg->FaultEnable & HRTIM_FLTR_FLTxEN);
mbed_official 157:90e3acc479a2 1790
mbed_official 157:90e3acc479a2 1791 /* Lock/Unlock fault sources at timer level */
mbed_official 157:90e3acc479a2 1792 HRTIM_timfltr &= ~(HRTIM_FLTR_FLTCLK);
mbed_official 157:90e3acc479a2 1793 HRTIM_timfltr |= pTimerCfg->FaultLock;
mbed_official 157:90e3acc479a2 1794
mbed_official 157:90e3acc479a2 1795 /* Enable/Disable dead time insertion at timer level */
mbed_official 157:90e3acc479a2 1796 HRTIM_timoutr &= ~(HRTIM_OUTR_DTEN);
mbed_official 157:90e3acc479a2 1797 HRTIM_timoutr |= pTimerCfg->DeadTimeInsertion;
mbed_official 157:90e3acc479a2 1798
mbed_official 157:90e3acc479a2 1799 /* Enable/Disable delayed protection at timer level */
mbed_official 157:90e3acc479a2 1800 HRTIM_timoutr &= ~(HRTIM_OUTR_DLYPRT| HRTIM_OUTR_DLYPRTEN);
mbed_official 157:90e3acc479a2 1801 HRTIM_timoutr |= pTimerCfg->DelayedProtectionMode;
mbed_official 157:90e3acc479a2 1802
mbed_official 157:90e3acc479a2 1803 /* Set the timer counter reset trigger */
mbed_official 157:90e3acc479a2 1804 HRTIM_timrstr = pTimerCfg->ResetTrigger;
mbed_official 157:90e3acc479a2 1805
mbed_official 157:90e3acc479a2 1806 /* Update the HRTIMx registers */
mbed_official 157:90e3acc479a2 1807 HRTIMx->HRTIM_TIMERx[TimerIdx].TIMxCR = HRTIM_timcr;
mbed_official 157:90e3acc479a2 1808 HRTIMx->HRTIM_TIMERx[TimerIdx].FLTxR = HRTIM_timfltr;
mbed_official 157:90e3acc479a2 1809 HRTIMx->HRTIM_TIMERx[TimerIdx].OUTxR = HRTIM_timoutr;
mbed_official 157:90e3acc479a2 1810 HRTIMx->HRTIM_TIMERx[TimerIdx].RSTxR = HRTIM_timrstr;
mbed_official 157:90e3acc479a2 1811 }
mbed_official 157:90e3acc479a2 1812
mbed_official 157:90e3acc479a2 1813 /**
mbed_official 157:90e3acc479a2 1814 * @brief Configures the compare unit of a timer operating in waveform mode
mbed_official 157:90e3acc479a2 1815 * @param HRTIMx: pointer to HRTIMx peripheral
mbed_official 157:90e3acc479a2 1816 * @param TimerIdx: Timer index
mbed_official 157:90e3acc479a2 1817 * 0xFF for master timer
mbed_official 157:90e3acc479a2 1818 * This parameter can be one of the following values:
mbed_official 157:90e3acc479a2 1819 * @arg 0x0 to 0x4 for timers A to E
mbed_official 157:90e3acc479a2 1820 * @param CompareUnit: Compare unit to configure
mbed_official 157:90e3acc479a2 1821 * This parameter can be one of the following values:
mbed_official 157:90e3acc479a2 1822 * @arg HRTIM_COMPAREUNIT_1: Compare unit 1
mbed_official 157:90e3acc479a2 1823 * @arg HRTIM_COMPAREUNIT_2: Compare unit 2
mbed_official 157:90e3acc479a2 1824 * @arg HRTIM_COMPAREUNIT_3: Compare unit 3
mbed_official 157:90e3acc479a2 1825 * @arg HRTIM_COMPAREUNIT_4: Compare unit 4
mbed_official 157:90e3acc479a2 1826 * @param pCompareCfg: pointer to the compare unit configuration structure
mbed_official 157:90e3acc479a2 1827 * @note When auto delayed mode is required for compare unit 2 or compare unit 4,
mbed_official 157:90e3acc479a2 1828 * application has to configure separately the capture unit. Capture unit
mbed_official 157:90e3acc479a2 1829 * to configure in that case depends on the compare unit auto delayed mode
mbed_official 157:90e3acc479a2 1830 * is applied to (see below):
mbed_official 157:90e3acc479a2 1831 * Auto delayed on output compare 2: capture unit 1 must be configured
mbed_official 157:90e3acc479a2 1832 * Auto delayed on output compare 4: capture unit 2 must be configured
mbed_official 157:90e3acc479a2 1833 * @retval None
mbed_official 157:90e3acc479a2 1834 */
mbed_official 157:90e3acc479a2 1835 void HRTIM_WaveformCompareConfig(HRTIM_TypeDef * HRTIMx,
mbed_official 157:90e3acc479a2 1836 uint32_t TimerIdx,
mbed_official 157:90e3acc479a2 1837 uint32_t CompareUnit,
mbed_official 157:90e3acc479a2 1838 HRTIM_CompareCfgTypeDef* pCompareCfg)
mbed_official 157:90e3acc479a2 1839 {
mbed_official 157:90e3acc479a2 1840 uint32_t HRTIM_timcr;
mbed_official 157:90e3acc479a2 1841
mbed_official 157:90e3acc479a2 1842 /* Check parameters */
mbed_official 157:90e3acc479a2 1843 assert_param(IS_HRTIM_TIMING_UNIT(TimerIdx));
mbed_official 157:90e3acc479a2 1844 assert_param(IS_HRTIM_COMPAREUNIT_AUTODELAYEDMODE(CompareUnit, pCompareCfg->AutoDelayedMode));
mbed_official 157:90e3acc479a2 1845
mbed_official 157:90e3acc479a2 1846 /* Configure the compare unit */
mbed_official 157:90e3acc479a2 1847 switch (CompareUnit)
mbed_official 157:90e3acc479a2 1848 {
mbed_official 157:90e3acc479a2 1849 case HRTIM_COMPAREUNIT_1:
mbed_official 157:90e3acc479a2 1850 {
mbed_official 157:90e3acc479a2 1851 /* Set the compare value */
mbed_official 157:90e3acc479a2 1852 HRTIMx->HRTIM_TIMERx[TimerIdx].CMP1xR = pCompareCfg->CompareValue;
mbed_official 157:90e3acc479a2 1853 }
mbed_official 157:90e3acc479a2 1854 break;
mbed_official 157:90e3acc479a2 1855 case HRTIM_COMPAREUNIT_2:
mbed_official 157:90e3acc479a2 1856 {
mbed_official 157:90e3acc479a2 1857 /* Set the compare value */
mbed_official 157:90e3acc479a2 1858 HRTIMx->HRTIM_TIMERx[TimerIdx].CMP2xR = pCompareCfg->CompareValue;
mbed_official 157:90e3acc479a2 1859
mbed_official 157:90e3acc479a2 1860 if (pCompareCfg->AutoDelayedMode != HRTIM_AUTODELAYEDMODE_REGULAR)
mbed_official 157:90e3acc479a2 1861 {
mbed_official 157:90e3acc479a2 1862 /* Configure auto-delayed mode */
mbed_official 157:90e3acc479a2 1863 HRTIM_timcr = HRTIMx->HRTIM_TIMERx[TimerIdx].TIMxCR;
mbed_official 157:90e3acc479a2 1864 HRTIM_timcr &= ~HRTIM_TIMCR_DELCMP2;
mbed_official 157:90e3acc479a2 1865 HRTIM_timcr |= pCompareCfg->AutoDelayedMode;
mbed_official 157:90e3acc479a2 1866 HRTIMx->HRTIM_TIMERx[TimerIdx].TIMxCR = HRTIM_timcr;
mbed_official 157:90e3acc479a2 1867
mbed_official 157:90e3acc479a2 1868 /* Set the compare value for timeout compare unit (if any) */
mbed_official 157:90e3acc479a2 1869 if (pCompareCfg->AutoDelayedMode == HRTIM_AUTODELAYEDMODE_AUTODELAYED_TIMEOUTCMP1)
mbed_official 157:90e3acc479a2 1870 {
mbed_official 157:90e3acc479a2 1871 HRTIMx->HRTIM_TIMERx[TimerIdx].CMP1xR = pCompareCfg->AutoDelayedTimeout;
mbed_official 157:90e3acc479a2 1872 }
mbed_official 157:90e3acc479a2 1873 else if (pCompareCfg->AutoDelayedMode == HRTIM_AUTODELAYEDMODE_AUTODELAYED_TIMEOUTCMP3)
mbed_official 157:90e3acc479a2 1874 {
mbed_official 157:90e3acc479a2 1875 HRTIMx->HRTIM_TIMERx[TimerIdx].CMP3xR = pCompareCfg->AutoDelayedTimeout;
mbed_official 157:90e3acc479a2 1876 }
mbed_official 157:90e3acc479a2 1877 }
mbed_official 157:90e3acc479a2 1878 }
mbed_official 157:90e3acc479a2 1879 break;
mbed_official 157:90e3acc479a2 1880 case HRTIM_COMPAREUNIT_3:
mbed_official 157:90e3acc479a2 1881 {
mbed_official 157:90e3acc479a2 1882 /* Set the compare value */
mbed_official 157:90e3acc479a2 1883 HRTIMx->HRTIM_TIMERx[TimerIdx].CMP3xR = pCompareCfg->CompareValue;
mbed_official 157:90e3acc479a2 1884 }
mbed_official 157:90e3acc479a2 1885 break;
mbed_official 157:90e3acc479a2 1886 case HRTIM_COMPAREUNIT_4:
mbed_official 157:90e3acc479a2 1887 {
mbed_official 157:90e3acc479a2 1888 /* Set the compare value */
mbed_official 157:90e3acc479a2 1889 HRTIMx->HRTIM_TIMERx[TimerIdx].CMP4xR = pCompareCfg->CompareValue;
mbed_official 157:90e3acc479a2 1890
mbed_official 157:90e3acc479a2 1891 if (pCompareCfg->AutoDelayedMode != HRTIM_AUTODELAYEDMODE_REGULAR)
mbed_official 157:90e3acc479a2 1892 {
mbed_official 157:90e3acc479a2 1893 /* Configure auto-delayed mode */
mbed_official 157:90e3acc479a2 1894 HRTIM_timcr = HRTIMx->HRTIM_TIMERx[TimerIdx].TIMxCR;
mbed_official 157:90e3acc479a2 1895 HRTIM_timcr &= ~HRTIM_TIMCR_DELCMP4;
mbed_official 157:90e3acc479a2 1896 HRTIM_timcr |= (pCompareCfg->AutoDelayedMode << 2);
mbed_official 157:90e3acc479a2 1897 HRTIMx->HRTIM_TIMERx[TimerIdx].TIMxCR = HRTIM_timcr;
mbed_official 157:90e3acc479a2 1898
mbed_official 157:90e3acc479a2 1899 /* Set the compare value for timeout compare unit (if any) */
mbed_official 157:90e3acc479a2 1900 if (pCompareCfg->AutoDelayedMode == HRTIM_AUTODELAYEDMODE_AUTODELAYED_TIMEOUTCMP1)
mbed_official 157:90e3acc479a2 1901 {
mbed_official 157:90e3acc479a2 1902 HRTIMx->HRTIM_TIMERx[TimerIdx].CMP1xR = pCompareCfg->AutoDelayedTimeout;
mbed_official 157:90e3acc479a2 1903 }
mbed_official 157:90e3acc479a2 1904 else if (pCompareCfg->AutoDelayedMode == HRTIM_AUTODELAYEDMODE_AUTODELAYED_TIMEOUTCMP3)
mbed_official 157:90e3acc479a2 1905 {
mbed_official 157:90e3acc479a2 1906 HRTIMx->HRTIM_TIMERx[TimerIdx].CMP3xR = pCompareCfg->AutoDelayedTimeout;
mbed_official 157:90e3acc479a2 1907 }
mbed_official 157:90e3acc479a2 1908 }
mbed_official 157:90e3acc479a2 1909 }
mbed_official 157:90e3acc479a2 1910 break;
mbed_official 157:90e3acc479a2 1911 default:
mbed_official 157:90e3acc479a2 1912 break;
mbed_official 157:90e3acc479a2 1913 }
mbed_official 157:90e3acc479a2 1914 }
mbed_official 157:90e3acc479a2 1915
mbed_official 157:90e3acc479a2 1916 /**
mbed_official 157:90e3acc479a2 1917 * @brief Sets the HRTIMx Master Comparex Register value
mbed_official 157:90e3acc479a2 1918 * @param HRTIMx: pointer to HRTIMx peripheral
mbed_official 157:90e3acc479a2 1919 * @param CompareUnit: Compare unit to configure
mbed_official 157:90e3acc479a2 1920 * This parameter can be one of the following values:
mbed_official 157:90e3acc479a2 1921 * @arg HRTIM_COMPAREUNIT_1: Compare unit 1
mbed_official 157:90e3acc479a2 1922 * @arg HRTIM_COMPAREUNIT_2: Compare unit 2
mbed_official 157:90e3acc479a2 1923 * @arg HRTIM_COMPAREUNIT_3: Compare unit 3
mbed_official 157:90e3acc479a2 1924 * @arg HRTIM_COMPAREUNIT_4: Compare unit 4
mbed_official 157:90e3acc479a2 1925 * @param Compare: specifies the Comparex register new value
mbed_official 157:90e3acc479a2 1926 * @retval None
mbed_official 157:90e3acc479a2 1927 */
mbed_official 157:90e3acc479a2 1928 void HRTIM_MasterSetCompare(HRTIM_TypeDef * HRTIMx,
mbed_official 157:90e3acc479a2 1929 uint32_t CompareUnit,
mbed_official 157:90e3acc479a2 1930 uint32_t Compare)
mbed_official 157:90e3acc479a2 1931 {
mbed_official 157:90e3acc479a2 1932 /* Check parameters */
mbed_official 157:90e3acc479a2 1933 assert_param(IS_HRTIM_COMPAREUNIT(CompareUnit));
mbed_official 157:90e3acc479a2 1934
mbed_official 157:90e3acc479a2 1935 /* Configure the compare unit */
mbed_official 157:90e3acc479a2 1936 switch (CompareUnit)
mbed_official 157:90e3acc479a2 1937 {
mbed_official 157:90e3acc479a2 1938 case HRTIM_COMPAREUNIT_1:
mbed_official 157:90e3acc479a2 1939 {
mbed_official 157:90e3acc479a2 1940 /* Set the compare value */
mbed_official 157:90e3acc479a2 1941 HRTIMx->HRTIM_MASTER.MCMP1R = Compare;
mbed_official 157:90e3acc479a2 1942 }
mbed_official 157:90e3acc479a2 1943 break;
mbed_official 157:90e3acc479a2 1944 case HRTIM_COMPAREUNIT_2:
mbed_official 157:90e3acc479a2 1945 {
mbed_official 157:90e3acc479a2 1946 /* Set the compare value */
mbed_official 157:90e3acc479a2 1947 HRTIMx->HRTIM_MASTER.MCMP2R = Compare;
mbed_official 157:90e3acc479a2 1948 }
mbed_official 157:90e3acc479a2 1949 break;
mbed_official 157:90e3acc479a2 1950 case HRTIM_COMPAREUNIT_3:
mbed_official 157:90e3acc479a2 1951 {
mbed_official 157:90e3acc479a2 1952 /* Set the compare value */
mbed_official 157:90e3acc479a2 1953 HRTIMx->HRTIM_MASTER.MCMP3R = Compare;
mbed_official 157:90e3acc479a2 1954 }
mbed_official 157:90e3acc479a2 1955 break;
mbed_official 157:90e3acc479a2 1956 case HRTIM_COMPAREUNIT_4:
mbed_official 157:90e3acc479a2 1957 {
mbed_official 157:90e3acc479a2 1958 /* Set the compare value */
mbed_official 157:90e3acc479a2 1959 HRTIMx->HRTIM_MASTER.MCMP4R = Compare;
mbed_official 157:90e3acc479a2 1960 }
mbed_official 157:90e3acc479a2 1961 break;
mbed_official 157:90e3acc479a2 1962 default:
mbed_official 157:90e3acc479a2 1963 break;
mbed_official 157:90e3acc479a2 1964 }
mbed_official 157:90e3acc479a2 1965 }
mbed_official 157:90e3acc479a2 1966 /**
mbed_official 157:90e3acc479a2 1967 * @brief Configures the capture unit of a timer operating in waveform mode
mbed_official 157:90e3acc479a2 1968 * @param HRTIMx: pointer to HRTIMx peripheral
mbed_official 157:90e3acc479a2 1969 * @param TimerIdx: Timer index
mbed_official 157:90e3acc479a2 1970 * This parameter can be one of the following values:
mbed_official 157:90e3acc479a2 1971 * @arg 0x0 to 0x4 for timers A to E
mbed_official 157:90e3acc479a2 1972 * @param CaptureChannel: Capture unit to configure
mbed_official 157:90e3acc479a2 1973 * This parameter can be one of the following values:
mbed_official 157:90e3acc479a2 1974 * @arg HRTIM_CAPTUREUNIT_1: Capture unit 1
mbed_official 157:90e3acc479a2 1975 * @arg HRTIM_CAPTUREUNIT_2: Capture unit 2
mbed_official 157:90e3acc479a2 1976 * @param pCaptureCfg: pointer to the compare unit configuration structure
mbed_official 157:90e3acc479a2 1977 * @retval None
mbed_official 157:90e3acc479a2 1978 */
mbed_official 157:90e3acc479a2 1979 void HRTIM_WaveformCaptureConfig(HRTIM_TypeDef * HRTIMx,
mbed_official 157:90e3acc479a2 1980 uint32_t TimerIdx,
mbed_official 157:90e3acc479a2 1981 uint32_t CaptureUnit,
mbed_official 157:90e3acc479a2 1982 HRTIM_CaptureCfgTypeDef* pCaptureCfg)
mbed_official 157:90e3acc479a2 1983 {
mbed_official 157:90e3acc479a2 1984 /* Configure the capture unit */
mbed_official 157:90e3acc479a2 1985 switch (CaptureUnit)
mbed_official 157:90e3acc479a2 1986 {
mbed_official 157:90e3acc479a2 1987 case HRTIM_CAPTUREUNIT_1:
mbed_official 157:90e3acc479a2 1988 {
mbed_official 157:90e3acc479a2 1989 HRTIMx->HRTIM_TIMERx[TimerIdx].CPT1xCR = pCaptureCfg->Trigger;
mbed_official 157:90e3acc479a2 1990 }
mbed_official 157:90e3acc479a2 1991 break;
mbed_official 157:90e3acc479a2 1992 case HRTIM_CAPTUREUNIT_2:
mbed_official 157:90e3acc479a2 1993 {
mbed_official 157:90e3acc479a2 1994 HRTIMx->HRTIM_TIMERx[TimerIdx].CPT2xCR = pCaptureCfg->Trigger;
mbed_official 157:90e3acc479a2 1995 }
mbed_official 157:90e3acc479a2 1996 break;
mbed_official 157:90e3acc479a2 1997 default:
mbed_official 157:90e3acc479a2 1998 break;
mbed_official 157:90e3acc479a2 1999 }
mbed_official 157:90e3acc479a2 2000 }
mbed_official 157:90e3acc479a2 2001
mbed_official 157:90e3acc479a2 2002 /**
mbed_official 157:90e3acc479a2 2003 * @brief Configures the output of a timer operating in waveform mode
mbed_official 157:90e3acc479a2 2004 * @param HRTIMx: pointer to HRTIMx peripheral
mbed_official 157:90e3acc479a2 2005 * @param TimerIdx: Timer index
mbed_official 157:90e3acc479a2 2006 * This parameter can be one of the following values:
mbed_official 157:90e3acc479a2 2007 * @arg 0x0 to 0x4 for timers A to E
mbed_official 157:90e3acc479a2 2008 * @param Output: Timer output
mbed_official 157:90e3acc479a2 2009 * This parameter can be one of the following values:
mbed_official 157:90e3acc479a2 2010 * @arg HRTIM_OUTPUT_TA1: Timer A - Output 1
mbed_official 157:90e3acc479a2 2011 * @arg HRTIM_OUTPUT_TA2: Timer A - Output 2
mbed_official 157:90e3acc479a2 2012 * @arg HRTIM_OUTPUT_TB1: Timer B - Output 1
mbed_official 157:90e3acc479a2 2013 * @arg HRTIM_OUTPUT_TB2: Timer B - Output 2
mbed_official 157:90e3acc479a2 2014 * @arg HRTIM_OUTPUT_TC1: Timer C - Output 1
mbed_official 157:90e3acc479a2 2015 * @arg HRTIM_OUTPUT_TC2: Timer C - Output 2
mbed_official 157:90e3acc479a2 2016 * @arg HRTIM_OUTPUT_TD1: Timer D - Output 1
mbed_official 157:90e3acc479a2 2017 * @arg HRTIM_OUTPUT_TD2: Timer D - Output 2
mbed_official 157:90e3acc479a2 2018 * @arg HRTIM_OUTPUT_TE1: Timer E - Output 1
mbed_official 157:90e3acc479a2 2019 * @arg HRTIM_OUTPUT_TE2: Timer E - Output 2
mbed_official 157:90e3acc479a2 2020 * @param pOutputCfg: pointer to the timer output configuration structure
mbed_official 157:90e3acc479a2 2021 * @retval None
mbed_official 157:90e3acc479a2 2022 */
mbed_official 157:90e3acc479a2 2023 void HRTIM_WaveformOutputConfig(HRTIM_TypeDef * HRTIM_,
mbed_official 157:90e3acc479a2 2024 uint32_t TimerIdx,
mbed_official 157:90e3acc479a2 2025 uint32_t Output,
mbed_official 157:90e3acc479a2 2026 HRTIM_OutputCfgTypeDef * pOutputCfg)
mbed_official 157:90e3acc479a2 2027 {
mbed_official 157:90e3acc479a2 2028 /* Check parameters */
mbed_official 157:90e3acc479a2 2029 assert_param(IS_HRTIM_TIMER_OUTPUT(TimerIdx, Output));
mbed_official 157:90e3acc479a2 2030 assert_param(IS_HRTIM_OUTPUTPOLARITY(pOutputCfg->Polarity));
mbed_official 157:90e3acc479a2 2031 assert_param(IS_HRTIM_OUTPUTIDLESTATE(pOutputCfg->IdleState));
mbed_official 157:90e3acc479a2 2032 assert_param(IS_HRTIM_OUTPUTIDLEMODE(pOutputCfg->IdleMode));
mbed_official 157:90e3acc479a2 2033 assert_param(IS_HRTIM_OUTPUTFAULTSTATE(pOutputCfg->FaultState));
mbed_official 157:90e3acc479a2 2034 assert_param(IS_HRTIM_OUTPUTCHOPPERMODE(pOutputCfg->ChopperModeEnable));
mbed_official 157:90e3acc479a2 2035 assert_param(IS_HRTIM_OUTPUTBURSTMODEENTRY(pOutputCfg->BurstModeEntryDelayed));
mbed_official 157:90e3acc479a2 2036
mbed_official 157:90e3acc479a2 2037 /* Configure the timer output */
mbed_official 157:90e3acc479a2 2038 HRTIM_OutputConfig(HRTIM_, TimerIdx, Output, pOutputCfg);
mbed_official 157:90e3acc479a2 2039 }
mbed_official 157:90e3acc479a2 2040
mbed_official 157:90e3acc479a2 2041 /**
mbed_official 157:90e3acc479a2 2042 * @brief Configures the event filtering capabilities of a timer (blanking, windowing)
mbed_official 157:90e3acc479a2 2043 * @param HRTIMx: pointer to HRTIMx peripheral
mbed_official 157:90e3acc479a2 2044 * @param TimerIdx: Timer index
mbed_official 157:90e3acc479a2 2045 * This parameter can be one of the following values:
mbed_official 157:90e3acc479a2 2046 * @arg 0x0 to 0x4 for timers A to E
mbed_official 157:90e3acc479a2 2047 * @param Event: external event for which timer event filtering must be configured
mbed_official 157:90e3acc479a2 2048 * This parameter can be one of the following values:
mbed_official 157:90e3acc479a2 2049 * @arg HRTIM_EVENT_1: External event 1
mbed_official 157:90e3acc479a2 2050 * @arg HRTIM_EVENT_2: External event 2
mbed_official 157:90e3acc479a2 2051 * @arg HRTIM_EVENT_3: External event 3
mbed_official 157:90e3acc479a2 2052 * @arg HRTIM_EVENT_4: External event 4
mbed_official 157:90e3acc479a2 2053 * @arg HRTIM_EVENT_5: External event 5
mbed_official 157:90e3acc479a2 2054 * @arg HRTIM_EVENT_6: External event 6
mbed_official 157:90e3acc479a2 2055 * @arg HRTIM_EVENT_7: External event 7
mbed_official 157:90e3acc479a2 2056 * @arg HRTIM_EVENT_8: External event 8
mbed_official 157:90e3acc479a2 2057 * @arg HRTIM_EVENT_9: External event 9
mbed_official 157:90e3acc479a2 2058 * @arg HRTIM_EVENT_10: External event 10
mbed_official 157:90e3acc479a2 2059 * @param pTimerEventFilteringCfg: pointer to the timer event filtering configuration structure
mbed_official 157:90e3acc479a2 2060 * @retval None
mbed_official 157:90e3acc479a2 2061 */
mbed_official 157:90e3acc479a2 2062 void HRTIM_TimerEventFilteringConfig(HRTIM_TypeDef * HRTIMx,
mbed_official 157:90e3acc479a2 2063 uint32_t TimerIdx,
mbed_official 157:90e3acc479a2 2064 uint32_t Event,
mbed_official 157:90e3acc479a2 2065 HRTIM_TimerEventFilteringCfgTypeDef* pTimerEventFilteringCfg)
mbed_official 157:90e3acc479a2 2066 {
mbed_official 157:90e3acc479a2 2067 uint32_t HRTIM_eefr;
mbed_official 157:90e3acc479a2 2068
mbed_official 157:90e3acc479a2 2069 /* Check parameters */
mbed_official 157:90e3acc479a2 2070 assert_param(IS_HRTIM_TIMING_UNIT(TimerIdx));
mbed_official 157:90e3acc479a2 2071 assert_param(IS_HRTIM_EVENT(Event));
mbed_official 157:90e3acc479a2 2072 assert_param(IS_HRTIM_TIMEVENTFILTER(pTimerEventFilteringCfg->Filter));
mbed_official 157:90e3acc479a2 2073 assert_param(IS_HRTIM_TIMEVENTLATCH(pTimerEventFilteringCfg->Latch));
mbed_official 157:90e3acc479a2 2074
mbed_official 157:90e3acc479a2 2075 /* Configure timer event filtering capabilities */
mbed_official 157:90e3acc479a2 2076 switch (Event)
mbed_official 157:90e3acc479a2 2077 {
mbed_official 157:90e3acc479a2 2078 case HRTIM_TIMEVENTFILTER_NONE:
mbed_official 157:90e3acc479a2 2079 {
mbed_official 157:90e3acc479a2 2080 HRTIMx->HRTIM_TIMERx[TimerIdx].EEFxR1 = 0;
mbed_official 157:90e3acc479a2 2081 HRTIMx->HRTIM_TIMERx[TimerIdx].EEFxR2 = 0;
mbed_official 157:90e3acc479a2 2082 }
mbed_official 157:90e3acc479a2 2083 break;
mbed_official 157:90e3acc479a2 2084 case HRTIM_EVENT_1:
mbed_official 157:90e3acc479a2 2085 {
mbed_official 157:90e3acc479a2 2086 HRTIM_eefr = HRTIMx->HRTIM_TIMERx[TimerIdx].EEFxR1;
mbed_official 157:90e3acc479a2 2087 HRTIM_eefr &= ~(HRTIM_EEFR1_EE1FLTR | HRTIM_EEFR1_EE1LTCH);
mbed_official 157:90e3acc479a2 2088 HRTIM_eefr |= (pTimerEventFilteringCfg->Filter | pTimerEventFilteringCfg->Latch);
mbed_official 157:90e3acc479a2 2089 HRTIMx->HRTIM_TIMERx[TimerIdx].EEFxR1 = HRTIM_eefr;
mbed_official 157:90e3acc479a2 2090 }
mbed_official 157:90e3acc479a2 2091 break;
mbed_official 157:90e3acc479a2 2092 case HRTIM_EVENT_2:
mbed_official 157:90e3acc479a2 2093 {
mbed_official 157:90e3acc479a2 2094 HRTIM_eefr = HRTIMx->HRTIM_TIMERx[TimerIdx].EEFxR1;
mbed_official 157:90e3acc479a2 2095 HRTIM_eefr &= ~(HRTIM_EEFR1_EE2FLTR | HRTIM_EEFR1_EE2LTCH);
mbed_official 157:90e3acc479a2 2096 HRTIM_eefr |= ((pTimerEventFilteringCfg->Filter | pTimerEventFilteringCfg->Latch) << 6);
mbed_official 157:90e3acc479a2 2097 HRTIMx->HRTIM_TIMERx[TimerIdx].EEFxR1 = HRTIM_eefr;
mbed_official 157:90e3acc479a2 2098 }
mbed_official 157:90e3acc479a2 2099 break;
mbed_official 157:90e3acc479a2 2100 case HRTIM_EVENT_3:
mbed_official 157:90e3acc479a2 2101 {
mbed_official 157:90e3acc479a2 2102 HRTIM_eefr = HRTIMx->HRTIM_TIMERx[TimerIdx].EEFxR1;
mbed_official 157:90e3acc479a2 2103 HRTIM_eefr &= ~(HRTIM_EEFR1_EE3FLTR | HRTIM_EEFR1_EE3LTCH);
mbed_official 157:90e3acc479a2 2104 HRTIM_eefr |= ((pTimerEventFilteringCfg->Filter | pTimerEventFilteringCfg->Latch) << 12);
mbed_official 157:90e3acc479a2 2105 HRTIMx->HRTIM_TIMERx[TimerIdx].EEFxR1 = HRTIM_eefr;
mbed_official 157:90e3acc479a2 2106 }
mbed_official 157:90e3acc479a2 2107 break;
mbed_official 157:90e3acc479a2 2108 case HRTIM_EVENT_4:
mbed_official 157:90e3acc479a2 2109 {
mbed_official 157:90e3acc479a2 2110 HRTIM_eefr = HRTIMx->HRTIM_TIMERx[TimerIdx].EEFxR1;
mbed_official 157:90e3acc479a2 2111 HRTIM_eefr &= ~(HRTIM_EEFR1_EE4FLTR | HRTIM_EEFR1_EE4LTCH);
mbed_official 157:90e3acc479a2 2112 HRTIM_eefr |= ((pTimerEventFilteringCfg->Filter | pTimerEventFilteringCfg->Latch) << 18);
mbed_official 157:90e3acc479a2 2113 HRTIMx->HRTIM_TIMERx[TimerIdx].EEFxR1 = HRTIM_eefr;
mbed_official 157:90e3acc479a2 2114 }
mbed_official 157:90e3acc479a2 2115 break;
mbed_official 157:90e3acc479a2 2116 case HRTIM_EVENT_5:
mbed_official 157:90e3acc479a2 2117 {
mbed_official 157:90e3acc479a2 2118 HRTIM_eefr = HRTIMx->HRTIM_TIMERx[TimerIdx].EEFxR1;
mbed_official 157:90e3acc479a2 2119 HRTIM_eefr &= ~(HRTIM_EEFR1_EE5FLTR | HRTIM_EEFR1_EE5LTCH);
mbed_official 157:90e3acc479a2 2120 HRTIM_eefr |= ((pTimerEventFilteringCfg->Filter | pTimerEventFilteringCfg->Latch) << 24);
mbed_official 157:90e3acc479a2 2121 HRTIMx->HRTIM_TIMERx[TimerIdx].EEFxR1 = HRTIM_eefr;
mbed_official 157:90e3acc479a2 2122 }
mbed_official 157:90e3acc479a2 2123 break;
mbed_official 157:90e3acc479a2 2124 case HRTIM_EVENT_6:
mbed_official 157:90e3acc479a2 2125 {
mbed_official 157:90e3acc479a2 2126 HRTIM_eefr = HRTIMx->HRTIM_TIMERx[TimerIdx].EEFxR2;
mbed_official 157:90e3acc479a2 2127 HRTIM_eefr &= ~(HRTIM_EEFR2_EE6FLTR | HRTIM_EEFR2_EE6LTCH);
mbed_official 157:90e3acc479a2 2128 HRTIM_eefr |= (pTimerEventFilteringCfg->Filter | pTimerEventFilteringCfg->Latch);
mbed_official 157:90e3acc479a2 2129 HRTIMx->HRTIM_TIMERx[TimerIdx].EEFxR2 = HRTIM_eefr;
mbed_official 157:90e3acc479a2 2130 }
mbed_official 157:90e3acc479a2 2131 break;
mbed_official 157:90e3acc479a2 2132 case HRTIM_EVENT_7:
mbed_official 157:90e3acc479a2 2133 {
mbed_official 157:90e3acc479a2 2134 HRTIM_eefr = HRTIMx->HRTIM_TIMERx[TimerIdx].EEFxR2;
mbed_official 157:90e3acc479a2 2135 HRTIM_eefr &= ~(HRTIM_EEFR2_EE7FLTR | HRTIM_EEFR2_EE7LTCH);
mbed_official 157:90e3acc479a2 2136 HRTIM_eefr |= ((pTimerEventFilteringCfg->Filter | pTimerEventFilteringCfg->Latch) << 6);
mbed_official 157:90e3acc479a2 2137 HRTIMx->HRTIM_TIMERx[TimerIdx].EEFxR2 = HRTIM_eefr;
mbed_official 157:90e3acc479a2 2138 }
mbed_official 157:90e3acc479a2 2139 break;
mbed_official 157:90e3acc479a2 2140 case HRTIM_EVENT_8:
mbed_official 157:90e3acc479a2 2141 {
mbed_official 157:90e3acc479a2 2142 HRTIM_eefr = HRTIMx->HRTIM_TIMERx[TimerIdx].EEFxR2;
mbed_official 157:90e3acc479a2 2143 HRTIM_eefr &= ~(HRTIM_EEFR2_EE8FLTR | HRTIM_EEFR2_EE8LTCH);
mbed_official 157:90e3acc479a2 2144 HRTIM_eefr |= ((pTimerEventFilteringCfg->Filter | pTimerEventFilteringCfg->Latch) << 12);
mbed_official 157:90e3acc479a2 2145 HRTIMx->HRTIM_TIMERx[TimerIdx].EEFxR2 = HRTIM_eefr;
mbed_official 157:90e3acc479a2 2146 }
mbed_official 157:90e3acc479a2 2147 break;
mbed_official 157:90e3acc479a2 2148 case HRTIM_EVENT_9:
mbed_official 157:90e3acc479a2 2149 {
mbed_official 157:90e3acc479a2 2150 HRTIM_eefr = HRTIMx->HRTIM_TIMERx[TimerIdx].EEFxR2;
mbed_official 157:90e3acc479a2 2151 HRTIM_eefr &= ~(HRTIM_EEFR2_EE9FLTR | HRTIM_EEFR2_EE9LTCH);
mbed_official 157:90e3acc479a2 2152 HRTIM_eefr |= ((pTimerEventFilteringCfg->Filter | pTimerEventFilteringCfg->Latch) << 18);
mbed_official 157:90e3acc479a2 2153 HRTIMx->HRTIM_TIMERx[TimerIdx].EEFxR2 = HRTIM_eefr;
mbed_official 157:90e3acc479a2 2154 }
mbed_official 157:90e3acc479a2 2155 break;
mbed_official 157:90e3acc479a2 2156 case HRTIM_EVENT_10:
mbed_official 157:90e3acc479a2 2157 {
mbed_official 157:90e3acc479a2 2158 HRTIM_eefr = HRTIMx->HRTIM_TIMERx[TimerIdx].EEFxR2;
mbed_official 157:90e3acc479a2 2159 HRTIM_eefr &= ~(HRTIM_EEFR2_EE10FLTR | HRTIM_EEFR2_EE10LTCH);
mbed_official 157:90e3acc479a2 2160 HRTIM_eefr |= ((pTimerEventFilteringCfg->Filter | pTimerEventFilteringCfg->Latch) << 24);
mbed_official 157:90e3acc479a2 2161 HRTIMx->HRTIM_TIMERx[TimerIdx].EEFxR2 = HRTIM_eefr;
mbed_official 157:90e3acc479a2 2162 }
mbed_official 157:90e3acc479a2 2163 break;
mbed_official 157:90e3acc479a2 2164 default:
mbed_official 157:90e3acc479a2 2165 break;
mbed_official 157:90e3acc479a2 2166 }
mbed_official 157:90e3acc479a2 2167 }
mbed_official 157:90e3acc479a2 2168
mbed_official 157:90e3acc479a2 2169 /**
mbed_official 157:90e3acc479a2 2170 * @brief Configures the dead time insertion feature for a timer
mbed_official 157:90e3acc479a2 2171 * @param HRTIMx: pointer to HRTIMx peripheral
mbed_official 157:90e3acc479a2 2172 * @param TimerIdx: Timer index
mbed_official 157:90e3acc479a2 2173 * This parameter can be one of the following values:
mbed_official 157:90e3acc479a2 2174 * @arg 0x0 to 0x4 for timers A to E
mbed_official 157:90e3acc479a2 2175 * @param pDeadTimeCfg: pointer to the dead time insertion configuration structure
mbed_official 157:90e3acc479a2 2176 * @retval None
mbed_official 157:90e3acc479a2 2177 */
mbed_official 157:90e3acc479a2 2178 void HRTIM_DeadTimeConfig(HRTIM_TypeDef * HRTIMx,
mbed_official 157:90e3acc479a2 2179 uint32_t TimerIdx,
mbed_official 157:90e3acc479a2 2180 HRTIM_DeadTimeCfgTypeDef* pDeadTimeCfg)
mbed_official 157:90e3acc479a2 2181 {
mbed_official 157:90e3acc479a2 2182 uint32_t HRTIM_dtr;
mbed_official 157:90e3acc479a2 2183
mbed_official 157:90e3acc479a2 2184 /* Check parameters */
mbed_official 157:90e3acc479a2 2185 assert_param(IS_HRTIM_TIMING_UNIT(TimerIdx));
mbed_official 157:90e3acc479a2 2186 assert_param(IS_HRTIM_TIMDEADTIME_RISINGSIGN(pDeadTimeCfg->RisingSign));
mbed_official 157:90e3acc479a2 2187 assert_param(IS_HRTIM_TIMDEADTIME_RISINGLOCK(pDeadTimeCfg->RisingLock));
mbed_official 157:90e3acc479a2 2188 assert_param(IS_HRTIM_TIMDEADTIME_RISINGSIGNLOCK(pDeadTimeCfg->RisingSignLock));
mbed_official 157:90e3acc479a2 2189 assert_param(IS_HRTIM_TIMDEADTIME_FALLINGSIGN(pDeadTimeCfg->FallingSign));
mbed_official 157:90e3acc479a2 2190 assert_param(IS_HRTIM_TIMDEADTIME_FALLINGLOCK(pDeadTimeCfg->FallingLock));
mbed_official 157:90e3acc479a2 2191 assert_param(IS_HRTIM_TIMDEADTIME_FALLINGSIGNLOCK(pDeadTimeCfg->FallingSignLock));
mbed_official 157:90e3acc479a2 2192
mbed_official 157:90e3acc479a2 2193 HRTIM_dtr = HRTIMx->HRTIM_TIMERx[TimerIdx].DTxR;
mbed_official 157:90e3acc479a2 2194
mbed_official 157:90e3acc479a2 2195 /* Clear timer dead times configuration */
mbed_official 157:90e3acc479a2 2196 HRTIM_dtr &= ~(HRTIM_DTR_DTR | HRTIM_DTR_SDTR | HRTIM_DTR_DTPRSC |
mbed_official 157:90e3acc479a2 2197 HRTIM_DTR_DTRSLK | HRTIM_DTR_DTRLK | HRTIM_DTR_SDTF |
mbed_official 157:90e3acc479a2 2198 HRTIM_DTR_SDTR | HRTIM_DTR_DTFSLK | HRTIM_DTR_DTFLK);
mbed_official 157:90e3acc479a2 2199
mbed_official 157:90e3acc479a2 2200 /* Set timer dead times configuration */
mbed_official 157:90e3acc479a2 2201 HRTIM_dtr |= (pDeadTimeCfg->Prescaler << 10);
mbed_official 157:90e3acc479a2 2202 HRTIM_dtr |= pDeadTimeCfg->RisingValue;
mbed_official 157:90e3acc479a2 2203 HRTIM_dtr |= pDeadTimeCfg->RisingSign;
mbed_official 157:90e3acc479a2 2204 HRTIM_dtr |= pDeadTimeCfg->RisingSignLock;
mbed_official 157:90e3acc479a2 2205 HRTIM_dtr |= pDeadTimeCfg->RisingLock;
mbed_official 157:90e3acc479a2 2206 HRTIM_dtr |= (pDeadTimeCfg->FallingValue << 16);
mbed_official 157:90e3acc479a2 2207 HRTIM_dtr |= pDeadTimeCfg->FallingSign;
mbed_official 157:90e3acc479a2 2208 HRTIM_dtr |= pDeadTimeCfg->FallingSignLock;
mbed_official 157:90e3acc479a2 2209 HRTIM_dtr |= pDeadTimeCfg->FallingLock;
mbed_official 157:90e3acc479a2 2210
mbed_official 157:90e3acc479a2 2211 /* Update the HRTIMx registers */
mbed_official 157:90e3acc479a2 2212 HRTIMx->HRTIM_TIMERx[TimerIdx].DTxR = HRTIM_dtr;
mbed_official 157:90e3acc479a2 2213 }
mbed_official 157:90e3acc479a2 2214
mbed_official 157:90e3acc479a2 2215 /**
mbed_official 157:90e3acc479a2 2216 * @brief Configures the chopper mode feature for a timer
mbed_official 157:90e3acc479a2 2217 * @param HRTIMx: pointer to HRTIMx peripheral
mbed_official 157:90e3acc479a2 2218 * @param TimerIdx: Timer index
mbed_official 157:90e3acc479a2 2219 * This parameter can be one of the following values:
mbed_official 157:90e3acc479a2 2220 * @arg 0x0 to 0x4 for timers A to E
mbed_official 157:90e3acc479a2 2221 * @param pChopperModeCfg: pointer to the chopper mode configuration structure
mbed_official 157:90e3acc479a2 2222 * @retval None
mbed_official 157:90e3acc479a2 2223 */
mbed_official 157:90e3acc479a2 2224 void HRTIM_ChopperModeConfig(HRTIM_TypeDef * HRTIMx,
mbed_official 157:90e3acc479a2 2225 uint32_t TimerIdx,
mbed_official 157:90e3acc479a2 2226 HRTIM_ChopperModeCfgTypeDef* pChopperModeCfg)
mbed_official 157:90e3acc479a2 2227 {
mbed_official 157:90e3acc479a2 2228 uint32_t HRTIM_chpr;
mbed_official 157:90e3acc479a2 2229
mbed_official 157:90e3acc479a2 2230 /* Check parameters */
mbed_official 157:90e3acc479a2 2231 assert_param(IS_HRTIM_TIMING_UNIT(TimerIdx));
mbed_official 157:90e3acc479a2 2232
mbed_official 157:90e3acc479a2 2233 HRTIM_chpr = HRTIMx->HRTIM_TIMERx[TimerIdx].CHPxR;
mbed_official 157:90e3acc479a2 2234
mbed_official 157:90e3acc479a2 2235 /* Clear timer chopper mode configuration */
mbed_official 157:90e3acc479a2 2236 HRTIM_chpr &= ~(HRTIM_CHPR_CARFRQ | HRTIM_CHPR_CARDTY | HRTIM_CHPR_STRPW);
mbed_official 157:90e3acc479a2 2237
mbed_official 157:90e3acc479a2 2238 /* Set timer chopper mode configuration */
mbed_official 157:90e3acc479a2 2239 HRTIM_chpr |= pChopperModeCfg->CarrierFreq;
mbed_official 157:90e3acc479a2 2240 HRTIM_chpr |= (pChopperModeCfg->DutyCycle << 4);
mbed_official 157:90e3acc479a2 2241 HRTIM_chpr |= (pChopperModeCfg->StartPulse << 7);
mbed_official 157:90e3acc479a2 2242
mbed_official 157:90e3acc479a2 2243 /* Update the HRTIMx registers */
mbed_official 157:90e3acc479a2 2244 HRTIMx->HRTIM_TIMERx[TimerIdx].CHPxR = HRTIM_chpr;
mbed_official 157:90e3acc479a2 2245 }
mbed_official 157:90e3acc479a2 2246
mbed_official 157:90e3acc479a2 2247 /**
mbed_official 157:90e3acc479a2 2248 * @brief Configures the burst DMA controller for a timer
mbed_official 157:90e3acc479a2 2249 * @param HRTIMx: pointer to HRTIMx peripheral
mbed_official 157:90e3acc479a2 2250 * @param TimerIdx: Timer index
mbed_official 157:90e3acc479a2 2251 * This parameter can be one of the following values:
mbed_official 157:90e3acc479a2 2252 * @arg 0x5 for master timer
mbed_official 157:90e3acc479a2 2253 * @arg 0x0 to 0x4 for timers A to E
mbed_official 157:90e3acc479a2 2254 * @param RegistersToUpdate: registers to be written by DMA
mbed_official 157:90e3acc479a2 2255 * This parameter can be any combination of the following values:
mbed_official 157:90e3acc479a2 2256 * @arg HRTIM_BURSTDMA_CR: HRTIM_MCR or HRTIM_TIMxCR
mbed_official 157:90e3acc479a2 2257 * @arg HRTIM_BURSTDMA_ICR: HRTIM_MICR or HRTIM_TIMxICR
mbed_official 157:90e3acc479a2 2258 * @arg HRTIM_BURSTDMA_DIER: HRTIM_MDIER or HRTIM_TIMxDIER
mbed_official 157:90e3acc479a2 2259 * @arg HRTIM_BURSTDMA_CNT: HRTIM_MCNT or HRTIM_TIMxCNT
mbed_official 157:90e3acc479a2 2260 * @arg HRTIM_BURSTDMA_PER: HRTIM_MPER or HRTIM_TIMxPER
mbed_official 157:90e3acc479a2 2261 * @arg HRTIM_BURSTDMA_REP: HRTIM_MREP or HRTIM_TIMxREP
mbed_official 157:90e3acc479a2 2262 * @arg HRTIM_BURSTDMA_CMP1: HRTIM_MCMP1 or HRTIM_TIMxCMP1
mbed_official 157:90e3acc479a2 2263 * @arg HRTIM_BURSTDMA_CMP2: HRTIM_MCMP2 or HRTIM_TIMxCMP2
mbed_official 157:90e3acc479a2 2264 * @arg HRTIM_BURSTDMA_CMP3: HRTIM_MCMP3 or HRTIM_TIMxCMP3
mbed_official 157:90e3acc479a2 2265 * @arg HRTIM_BURSTDMA_CMP4: HRTIM_MCMP4 or HRTIM_TIMxCMP4
mbed_official 157:90e3acc479a2 2266 * @arg HRTIM_BURSTDMA_DTR: HRTIM_TIMxDTR
mbed_official 157:90e3acc479a2 2267 * @arg HRTIM_BURSTDMA_SET1R: HRTIM_TIMxSET1R
mbed_official 157:90e3acc479a2 2268 * @arg HRTIM_BURSTDMA_RST1R: HRTIM_TIMxRST1R
mbed_official 157:90e3acc479a2 2269 * @arg HRTIM_BURSTDMA_SET2R: HRTIM_TIMxSET2R
mbed_official 157:90e3acc479a2 2270 * @arg HRTIM_BURSTDMA_RST2R: HRTIM_TIMxRST2R
mbed_official 157:90e3acc479a2 2271 * @arg HRTIM_BURSTDMA_EEFR1: HRTIM_TIMxEEFR1
mbed_official 157:90e3acc479a2 2272 * @arg HRTIM_BURSTDMA_EEFR2: HRTIM_TIMxEEFR2
mbed_official 157:90e3acc479a2 2273 * @arg HRTIM_BURSTDMA_RSTR: HRTIM_TIMxRSTR
mbed_official 157:90e3acc479a2 2274 * @arg HRTIM_BURSTDMA_CHPR: HRTIM_TIMxCHPR
mbed_official 157:90e3acc479a2 2275 * @arg HRTIM_BURSTDMA_OUTR: HRTIM_TIMxOUTR
mbed_official 157:90e3acc479a2 2276 * @arg HRTIM_BURSTDMA_FLTR: HRTIM_TIMxFLTR
mbed_official 157:90e3acc479a2 2277 * @retval None
mbed_official 157:90e3acc479a2 2278 */
mbed_official 157:90e3acc479a2 2279 void HRTIM_BurstDMAConfig(HRTIM_TypeDef * HRTIMx,
mbed_official 157:90e3acc479a2 2280 uint32_t TimerIdx,
mbed_official 157:90e3acc479a2 2281 uint32_t RegistersToUpdate)
mbed_official 157:90e3acc479a2 2282 {
mbed_official 157:90e3acc479a2 2283 /* Check parameters */
mbed_official 157:90e3acc479a2 2284 assert_param(IS_HRTIM_TIMER_BURSTDMA(TimerIdx, RegistersToUpdate));
mbed_official 157:90e3acc479a2 2285
mbed_official 157:90e3acc479a2 2286 /* Set the burst DMA timer update register */
mbed_official 157:90e3acc479a2 2287 switch (TimerIdx)
mbed_official 157:90e3acc479a2 2288 {
mbed_official 157:90e3acc479a2 2289 case HRTIM_TIMERINDEX_TIMER_A:
mbed_official 157:90e3acc479a2 2290 {
mbed_official 157:90e3acc479a2 2291 HRTIMx->HRTIM_COMMON.BDTAUPR = RegistersToUpdate;
mbed_official 157:90e3acc479a2 2292 }
mbed_official 157:90e3acc479a2 2293 break;
mbed_official 157:90e3acc479a2 2294 case HRTIM_TIMERINDEX_TIMER_B:
mbed_official 157:90e3acc479a2 2295 {
mbed_official 157:90e3acc479a2 2296 HRTIMx->HRTIM_COMMON.BDTBUPR = RegistersToUpdate;
mbed_official 157:90e3acc479a2 2297 }
mbed_official 157:90e3acc479a2 2298 break;
mbed_official 157:90e3acc479a2 2299 case HRTIM_TIMERINDEX_TIMER_C:
mbed_official 157:90e3acc479a2 2300 {
mbed_official 157:90e3acc479a2 2301 HRTIMx->HRTIM_COMMON.BDTCUPR = RegistersToUpdate;
mbed_official 157:90e3acc479a2 2302 }
mbed_official 157:90e3acc479a2 2303 break;
mbed_official 157:90e3acc479a2 2304 case HRTIM_TIMERINDEX_TIMER_D:
mbed_official 157:90e3acc479a2 2305 {
mbed_official 157:90e3acc479a2 2306 HRTIMx->HRTIM_COMMON.BDTDUPR = RegistersToUpdate;
mbed_official 157:90e3acc479a2 2307 }
mbed_official 157:90e3acc479a2 2308 break;
mbed_official 157:90e3acc479a2 2309 case HRTIM_TIMERINDEX_TIMER_E:
mbed_official 157:90e3acc479a2 2310 {
mbed_official 157:90e3acc479a2 2311 HRTIMx->HRTIM_COMMON.BDTEUPR = RegistersToUpdate;
mbed_official 157:90e3acc479a2 2312 }
mbed_official 157:90e3acc479a2 2313 break;
mbed_official 157:90e3acc479a2 2314 case HRTIM_TIMERINDEX_MASTER:
mbed_official 157:90e3acc479a2 2315 {
mbed_official 157:90e3acc479a2 2316 HRTIMx->HRTIM_COMMON.BDMUPDR = RegistersToUpdate;
mbed_official 157:90e3acc479a2 2317 }
mbed_official 157:90e3acc479a2 2318 break;
mbed_official 157:90e3acc479a2 2319 default:
mbed_official 157:90e3acc479a2 2320 break;
mbed_official 157:90e3acc479a2 2321 }
mbed_official 157:90e3acc479a2 2322 }
mbed_official 157:90e3acc479a2 2323
mbed_official 157:90e3acc479a2 2324 /**
mbed_official 157:90e3acc479a2 2325 * @brief Configures the external input/output synchronization of the HRTIMx
mbed_official 157:90e3acc479a2 2326 * @param HRTIMx: pointer to HRTIMx peripheral
mbed_official 157:90e3acc479a2 2327 * @param pSynchroCfg: pointer to the input/output synchronization configuration structure
mbed_official 157:90e3acc479a2 2328 * @retval None
mbed_official 157:90e3acc479a2 2329 */
mbed_official 157:90e3acc479a2 2330 void HRTIM_SynchronizationConfig(HRTIM_TypeDef *HRTIMx, HRTIM_SynchroCfgTypeDef * pSynchroCfg)
mbed_official 157:90e3acc479a2 2331 {
mbed_official 157:90e3acc479a2 2332 uint32_t HRTIM_mcr;
mbed_official 157:90e3acc479a2 2333
mbed_official 157:90e3acc479a2 2334 /* Check parameters */
mbed_official 157:90e3acc479a2 2335 assert_param(IS_HRTIM_SYNCINPUTSOURCE(pSynchroCfg->SyncInputSource));
mbed_official 157:90e3acc479a2 2336 assert_param(IS_HRTIM_SYNCOUTPUTSOURCE(pSynchroCfg->SyncOutputSource));
mbed_official 157:90e3acc479a2 2337 assert_param(IS_HRTIM_SYNCOUTPUTPOLARITY(pSynchroCfg->SyncOutputPolarity));
mbed_official 157:90e3acc479a2 2338
mbed_official 157:90e3acc479a2 2339 HRTIM_mcr = HRTIMx->HRTIM_MASTER.MCR;
mbed_official 157:90e3acc479a2 2340
mbed_official 157:90e3acc479a2 2341 /* Set the synchronization input source */
mbed_official 157:90e3acc479a2 2342 HRTIM_mcr &= ~(HRTIM_MCR_SYNC_IN);
mbed_official 157:90e3acc479a2 2343 HRTIM_mcr |= pSynchroCfg->SyncInputSource;
mbed_official 157:90e3acc479a2 2344
mbed_official 157:90e3acc479a2 2345 /* Set the event to be sent on the synchronization output */
mbed_official 157:90e3acc479a2 2346 HRTIM_mcr &= ~(HRTIM_MCR_SYNC_SRC);
mbed_official 157:90e3acc479a2 2347 HRTIM_mcr |= pSynchroCfg->SyncOutputSource;
mbed_official 157:90e3acc479a2 2348
mbed_official 157:90e3acc479a2 2349 /* Set the polarity of the synchronization output */
mbed_official 157:90e3acc479a2 2350 HRTIM_mcr &= ~(HRTIM_MCR_SYNC_OUT);
mbed_official 157:90e3acc479a2 2351 HRTIM_mcr |= pSynchroCfg->SyncOutputPolarity;
mbed_official 157:90e3acc479a2 2352
mbed_official 157:90e3acc479a2 2353 /* Update the HRTIMx registers */
mbed_official 157:90e3acc479a2 2354 HRTIMx->HRTIM_MASTER.MCR = HRTIM_mcr;
mbed_official 157:90e3acc479a2 2355 }
mbed_official 157:90e3acc479a2 2356
mbed_official 157:90e3acc479a2 2357 /**
mbed_official 157:90e3acc479a2 2358 * @brief Configures the burst mode feature of the HRTIMx
mbed_official 157:90e3acc479a2 2359 * @param HRTIMx: pointer to HRTIMx peripheral
mbed_official 157:90e3acc479a2 2360 * @param pBurstModeCfg: pointer to the burst mode configuration structure
mbed_official 157:90e3acc479a2 2361 * @retval None
mbed_official 157:90e3acc479a2 2362 */
mbed_official 157:90e3acc479a2 2363 void HRTIM_BurstModeConfig(HRTIM_TypeDef * HRTIMx,
mbed_official 157:90e3acc479a2 2364 HRTIM_BurstModeCfgTypeDef* pBurstModeCfg)
mbed_official 157:90e3acc479a2 2365 {
mbed_official 157:90e3acc479a2 2366 uint32_t HRTIM_bmcr;
mbed_official 157:90e3acc479a2 2367
mbed_official 157:90e3acc479a2 2368 /* Check parameters */
mbed_official 157:90e3acc479a2 2369 assert_param(IS_HRTIM_BURSTMODE(pBurstModeCfg->Mode));
mbed_official 157:90e3acc479a2 2370 assert_param(IS_HRTIM_BURSTMODECLOCKSOURCE(pBurstModeCfg->ClockSource));
mbed_official 157:90e3acc479a2 2371 assert_param(IS_HRTIM_HRTIM_BURSTMODEPRESCALER(pBurstModeCfg->Prescaler));
mbed_official 157:90e3acc479a2 2372 assert_param(IS_HRTIM_BURSTMODEPRELOAD(pBurstModeCfg->PreloadEnable));
mbed_official 157:90e3acc479a2 2373
mbed_official 157:90e3acc479a2 2374 HRTIM_bmcr = HRTIMx->HRTIM_COMMON.BMCR;
mbed_official 157:90e3acc479a2 2375
mbed_official 157:90e3acc479a2 2376 /* Set the burst mode operating mode */
mbed_official 157:90e3acc479a2 2377 HRTIM_bmcr &= ~(HRTIM_BMCR_BMOM);
mbed_official 157:90e3acc479a2 2378 HRTIM_bmcr |= pBurstModeCfg->Mode;
mbed_official 157:90e3acc479a2 2379
mbed_official 157:90e3acc479a2 2380 /* Set the burst mode clock source */
mbed_official 157:90e3acc479a2 2381 HRTIM_bmcr &= ~(HRTIM_BMCR_BMCLK);
mbed_official 157:90e3acc479a2 2382 HRTIM_bmcr |= pBurstModeCfg->ClockSource;
mbed_official 157:90e3acc479a2 2383
mbed_official 157:90e3acc479a2 2384 /* Set the burst mode prescaler */
mbed_official 157:90e3acc479a2 2385 HRTIM_bmcr &= ~(HRTIM_BMCR_BMPSC);
mbed_official 157:90e3acc479a2 2386 HRTIM_bmcr |= pBurstModeCfg->Prescaler;
mbed_official 157:90e3acc479a2 2387
mbed_official 157:90e3acc479a2 2388 /* Enable/disable burst mode registers preload */
mbed_official 157:90e3acc479a2 2389 HRTIM_bmcr &= ~(HRTIM_BMCR_BMPREN);
mbed_official 157:90e3acc479a2 2390 HRTIM_bmcr |= pBurstModeCfg->PreloadEnable;
mbed_official 157:90e3acc479a2 2391
mbed_official 157:90e3acc479a2 2392 /* Set the burst mode trigger */
mbed_official 157:90e3acc479a2 2393 HRTIMx->HRTIM_COMMON.BMTRGR = pBurstModeCfg->Trigger;
mbed_official 157:90e3acc479a2 2394
mbed_official 157:90e3acc479a2 2395 /* Set the burst mode compare value */
mbed_official 157:90e3acc479a2 2396 HRTIMx->HRTIM_COMMON.BMCMPR = pBurstModeCfg->IdleDuration;
mbed_official 157:90e3acc479a2 2397
mbed_official 157:90e3acc479a2 2398 /* Set the burst mode period */
mbed_official 157:90e3acc479a2 2399 HRTIMx->HRTIM_COMMON.BMPER = pBurstModeCfg->Period;
mbed_official 157:90e3acc479a2 2400
mbed_official 157:90e3acc479a2 2401 /* Update the HRTIMx registers */
mbed_official 157:90e3acc479a2 2402 HRTIMx->HRTIM_COMMON.BMCR = HRTIM_bmcr;
mbed_official 157:90e3acc479a2 2403 }
mbed_official 157:90e3acc479a2 2404
mbed_official 157:90e3acc479a2 2405 /**
mbed_official 157:90e3acc479a2 2406 * @brief Configures the conditioning of an external event
mbed_official 157:90e3acc479a2 2407 * @param HRTIMx: pointer to HRTIMx peripheral
mbed_official 157:90e3acc479a2 2408 * @param Event: external event to configure
mbed_official 157:90e3acc479a2 2409 * This parameter can be one of the following values:
mbed_official 157:90e3acc479a2 2410 * @arg HRTIM_EVENT_1: External event 1
mbed_official 157:90e3acc479a2 2411 * @arg HRTIM_EVENT_2: External event 2
mbed_official 157:90e3acc479a2 2412 * @arg HRTIM_EVENT_3: External event 3
mbed_official 157:90e3acc479a2 2413 * @arg HRTIM_EVENT_4: External event 4
mbed_official 157:90e3acc479a2 2414 * @arg HRTIM_EVENT_5: External event 5
mbed_official 157:90e3acc479a2 2415 * @arg HRTIM_EVENT_6: External event 6
mbed_official 157:90e3acc479a2 2416 * @arg HRTIM_EVENT_7: External event 7
mbed_official 157:90e3acc479a2 2417 * @arg HRTIM_EVENT_8: External event 8
mbed_official 157:90e3acc479a2 2418 * @arg HRTIM_EVENT_9: External event 9
mbed_official 157:90e3acc479a2 2419 * @arg HRTIM_EVENT_10: External event 10
mbed_official 157:90e3acc479a2 2420 * @param pEventCfg: pointer to the event conditioning configuration structure
mbed_official 157:90e3acc479a2 2421 * @retval None
mbed_official 157:90e3acc479a2 2422 */
mbed_official 157:90e3acc479a2 2423 void HRTIM_EventConfig(HRTIM_TypeDef * HRTIMx,
mbed_official 157:90e3acc479a2 2424 uint32_t Event,
mbed_official 157:90e3acc479a2 2425 HRTIM_EventCfgTypeDef* pEventCfg)
mbed_official 157:90e3acc479a2 2426 {
mbed_official 157:90e3acc479a2 2427 /* Check parameters */
mbed_official 157:90e3acc479a2 2428 assert_param(IS_HRTIM_EVENTSRC(pEventCfg->Source));
mbed_official 157:90e3acc479a2 2429 assert_param(IS_HRTIM_EVENTPOLARITY(pEventCfg->Polarity));
mbed_official 157:90e3acc479a2 2430 assert_param(IS_HRTIM_EVENTSENSITIVITY(pEventCfg->Sensitivity));
mbed_official 157:90e3acc479a2 2431 assert_param(IS_HRTIM_EVENTFASTMODE(pEventCfg->FastMode));
mbed_official 157:90e3acc479a2 2432 assert_param(IS_HRTIM_EVENTFILTER(pEventCfg->Filter));
mbed_official 157:90e3acc479a2 2433
mbed_official 157:90e3acc479a2 2434 /* Configure the event channel */
mbed_official 157:90e3acc479a2 2435 HRTIM_ExternalEventConfig(HRTIMx, Event, pEventCfg);
mbed_official 157:90e3acc479a2 2436
mbed_official 157:90e3acc479a2 2437 }
mbed_official 157:90e3acc479a2 2438
mbed_official 157:90e3acc479a2 2439 /**
mbed_official 157:90e3acc479a2 2440 * @brief Configures the external event conditioning block prescaler
mbed_official 157:90e3acc479a2 2441 * @param HRTIMx: pointer to HRTIMx peripheral
mbed_official 157:90e3acc479a2 2442 * @param Prescaler: Prescaler value
mbed_official 157:90e3acc479a2 2443 * This parameter can be one of the following values:
mbed_official 157:90e3acc479a2 2444 * @arg HRTIM_EVENTPRESCALER_DIV1: fEEVS=fHRTIMx
mbed_official 157:90e3acc479a2 2445 * @arg HRTIM_EVENTPRESCALER_DIV2: fEEVS=fHRTIMx / 2
mbed_official 157:90e3acc479a2 2446 * @arg HRTIM_EVENTPRESCALER_DIV4: fEEVS=fHRTIMx / 4
mbed_official 157:90e3acc479a2 2447 * @arg HRTIM_EVENTPRESCALER_DIV8: fEEVS=fHRTIMx / 8
mbed_official 157:90e3acc479a2 2448 * @retval None
mbed_official 157:90e3acc479a2 2449 */
mbed_official 157:90e3acc479a2 2450 void HRTIM_EventPrescalerConfig(HRTIM_TypeDef * HRTIMx,
mbed_official 157:90e3acc479a2 2451 uint32_t Prescaler)
mbed_official 157:90e3acc479a2 2452 {
mbed_official 157:90e3acc479a2 2453 uint32_t HRTIM_eecr3;
mbed_official 157:90e3acc479a2 2454
mbed_official 157:90e3acc479a2 2455 /* Check parameters */
mbed_official 157:90e3acc479a2 2456 assert_param(IS_HRTIM_EVENTPRESCALER(Prescaler));
mbed_official 157:90e3acc479a2 2457
mbed_official 157:90e3acc479a2 2458 /* Set the external event prescaler */
mbed_official 157:90e3acc479a2 2459 HRTIM_eecr3 = HRTIMx->HRTIM_COMMON.EECR3;
mbed_official 157:90e3acc479a2 2460 HRTIM_eecr3 &= ~(HRTIM_EECR3_EEVSD);
mbed_official 157:90e3acc479a2 2461 HRTIM_eecr3 |= Prescaler;
mbed_official 157:90e3acc479a2 2462
mbed_official 157:90e3acc479a2 2463 /* Update the HRTIMx registers */
mbed_official 157:90e3acc479a2 2464 HRTIMx->HRTIM_COMMON.EECR3 = HRTIM_eecr3;
mbed_official 157:90e3acc479a2 2465 }
mbed_official 157:90e3acc479a2 2466
mbed_official 157:90e3acc479a2 2467 /**
mbed_official 157:90e3acc479a2 2468 * @brief Configures the conditioning of fault input
mbed_official 157:90e3acc479a2 2469 * @param HRTIMx: pointer to HRTIMx peripheral
mbed_official 157:90e3acc479a2 2470 * @param Fault: fault input to configure
mbed_official 157:90e3acc479a2 2471 * This parameter can be one of the following values:
mbed_official 157:90e3acc479a2 2472 * @arg HRTIM_FAULT_1: Fault input 1
mbed_official 157:90e3acc479a2 2473 * @arg HRTIM_FAULT_2: Fault input 2
mbed_official 157:90e3acc479a2 2474 * @arg HRTIM_FAULT_3: Fault input 3
mbed_official 157:90e3acc479a2 2475 * @arg HRTIM_FAULT_4: Fault input 4
mbed_official 157:90e3acc479a2 2476 * @arg HRTIM_FAULT_5: Fault input 5
mbed_official 157:90e3acc479a2 2477 * @param pFaultCfg: pointer to the fault conditioning configuration structure
mbed_official 157:90e3acc479a2 2478 * @retval None
mbed_official 157:90e3acc479a2 2479 */
mbed_official 157:90e3acc479a2 2480 void HRTIM_FaultConfig(HRTIM_TypeDef * HRTIMx,
mbed_official 157:90e3acc479a2 2481 HRTIM_FaultCfgTypeDef* pFaultCfg,
mbed_official 157:90e3acc479a2 2482 uint32_t Fault)
mbed_official 157:90e3acc479a2 2483 {
mbed_official 157:90e3acc479a2 2484 uint32_t HRTIM_fltinr1;
mbed_official 157:90e3acc479a2 2485 uint32_t HRTIM_fltinr2;
mbed_official 157:90e3acc479a2 2486
mbed_official 157:90e3acc479a2 2487 /* Check parameters */
mbed_official 157:90e3acc479a2 2488 assert_param(IS_HRTIM_FAULT(Fault));
mbed_official 157:90e3acc479a2 2489 assert_param(IS_HRTIM_FAULTSOURCE(pFaultCfg->Source));
mbed_official 157:90e3acc479a2 2490 assert_param(IS_HRTIM_FAULTPOLARITY(pFaultCfg->Polarity));
mbed_official 157:90e3acc479a2 2491 assert_param(IS_HRTIM_FAULTFILTER(pFaultCfg->Filter));
mbed_official 157:90e3acc479a2 2492 assert_param(IS_HRTIM_FAULTLOCK(pFaultCfg->Lock));
mbed_official 157:90e3acc479a2 2493
mbed_official 157:90e3acc479a2 2494 /* Configure fault channel */
mbed_official 157:90e3acc479a2 2495 HRTIM_fltinr1 = HRTIMx->HRTIM_COMMON.FLTINxR1;
mbed_official 157:90e3acc479a2 2496 HRTIM_fltinr2 = HRTIMx->HRTIM_COMMON.FLTINxR2;
mbed_official 157:90e3acc479a2 2497
mbed_official 157:90e3acc479a2 2498 switch (Fault)
mbed_official 157:90e3acc479a2 2499 {
mbed_official 157:90e3acc479a2 2500 case HRTIM_FAULT_1:
mbed_official 157:90e3acc479a2 2501 {
mbed_official 157:90e3acc479a2 2502 HRTIM_fltinr1 &= ~(HRTIM_FLTINR1_FLT1P | HRTIM_FLTINR1_FLT1SRC | HRTIM_FLTINR1_FLT1F | HRTIM_FLTINR1_FLT1LCK);
mbed_official 157:90e3acc479a2 2503 HRTIM_fltinr1 |= pFaultCfg->Polarity;
mbed_official 157:90e3acc479a2 2504 HRTIM_fltinr1 |= pFaultCfg->Source;
mbed_official 157:90e3acc479a2 2505 HRTIM_fltinr1 |= pFaultCfg->Filter;
mbed_official 157:90e3acc479a2 2506 HRTIM_fltinr1 |= pFaultCfg->Lock;
mbed_official 157:90e3acc479a2 2507 }
mbed_official 157:90e3acc479a2 2508 break;
mbed_official 157:90e3acc479a2 2509 case HRTIM_FAULT_2:
mbed_official 157:90e3acc479a2 2510 {
mbed_official 157:90e3acc479a2 2511 HRTIM_fltinr1 &= ~(HRTIM_FLTINR1_FLT2P | HRTIM_FLTINR1_FLT2SRC | HRTIM_FLTINR1_FLT2F | HRTIM_FLTINR1_FLT2LCK);
mbed_official 157:90e3acc479a2 2512 HRTIM_fltinr1 |= (pFaultCfg->Polarity << 8);
mbed_official 157:90e3acc479a2 2513 HRTIM_fltinr1 |= (pFaultCfg->Source << 8);
mbed_official 157:90e3acc479a2 2514 HRTIM_fltinr1 |= (pFaultCfg->Filter << 8);
mbed_official 157:90e3acc479a2 2515 HRTIM_fltinr1 |= (pFaultCfg->Lock << 8);
mbed_official 157:90e3acc479a2 2516 }
mbed_official 157:90e3acc479a2 2517 break;
mbed_official 157:90e3acc479a2 2518 case HRTIM_FAULT_3:
mbed_official 157:90e3acc479a2 2519 {
mbed_official 157:90e3acc479a2 2520 HRTIM_fltinr1 &= ~(HRTIM_FLTINR1_FLT3P | HRTIM_FLTINR1_FLT3SRC | HRTIM_FLTINR1_FLT3F | HRTIM_FLTINR1_FLT3LCK);
mbed_official 157:90e3acc479a2 2521 HRTIM_fltinr1 |= (pFaultCfg->Polarity << 16);
mbed_official 157:90e3acc479a2 2522 HRTIM_fltinr1 |= (pFaultCfg->Source << 16);
mbed_official 157:90e3acc479a2 2523 HRTIM_fltinr1 |= (pFaultCfg->Filter << 16);
mbed_official 157:90e3acc479a2 2524 HRTIM_fltinr1 |= (pFaultCfg->Lock << 16);
mbed_official 157:90e3acc479a2 2525 }
mbed_official 157:90e3acc479a2 2526 break;
mbed_official 157:90e3acc479a2 2527 case HRTIM_FAULT_4:
mbed_official 157:90e3acc479a2 2528 {
mbed_official 157:90e3acc479a2 2529 HRTIM_fltinr1 &= ~(HRTIM_FLTINR1_FLT4P | HRTIM_FLTINR1_FLT4SRC | HRTIM_FLTINR1_FLT4F | HRTIM_FLTINR1_FLT4LCK);
mbed_official 157:90e3acc479a2 2530 HRTIM_fltinr1 |= (pFaultCfg->Polarity << 24);
mbed_official 157:90e3acc479a2 2531 HRTIM_fltinr1 |= (pFaultCfg->Source << 24);
mbed_official 157:90e3acc479a2 2532 HRTIM_fltinr1 |= (pFaultCfg->Filter << 24);
mbed_official 157:90e3acc479a2 2533 HRTIM_fltinr1 |= (pFaultCfg->Lock << 24);
mbed_official 157:90e3acc479a2 2534 }
mbed_official 157:90e3acc479a2 2535 break;
mbed_official 157:90e3acc479a2 2536 case HRTIM_FAULT_5:
mbed_official 157:90e3acc479a2 2537 {
mbed_official 157:90e3acc479a2 2538 HRTIM_fltinr2 &= ~(HRTIM_FLTINR2_FLT5P | HRTIM_FLTINR2_FLT5SRC | HRTIM_FLTINR2_FLT5F | HRTIM_FLTINR2_FLT5LCK);
mbed_official 157:90e3acc479a2 2539 HRTIM_fltinr2 |= pFaultCfg->Polarity;
mbed_official 157:90e3acc479a2 2540 HRTIM_fltinr2 |= pFaultCfg->Source;
mbed_official 157:90e3acc479a2 2541 HRTIM_fltinr2 |= pFaultCfg->Filter;
mbed_official 157:90e3acc479a2 2542 HRTIM_fltinr2 |= pFaultCfg->Lock;
mbed_official 157:90e3acc479a2 2543 }
mbed_official 157:90e3acc479a2 2544 break;
mbed_official 157:90e3acc479a2 2545 default:
mbed_official 157:90e3acc479a2 2546 break;
mbed_official 157:90e3acc479a2 2547 }
mbed_official 157:90e3acc479a2 2548
mbed_official 157:90e3acc479a2 2549 /* Update the HRTIMx registers */
mbed_official 157:90e3acc479a2 2550 HRTIMx->HRTIM_COMMON.FLTINxR1 = HRTIM_fltinr1;
mbed_official 157:90e3acc479a2 2551 HRTIMx->HRTIM_COMMON.FLTINxR2 = HRTIM_fltinr2;
mbed_official 157:90e3acc479a2 2552 }
mbed_official 157:90e3acc479a2 2553
mbed_official 157:90e3acc479a2 2554 /**
mbed_official 157:90e3acc479a2 2555 * @brief Configures the fault conditioning block prescaler
mbed_official 157:90e3acc479a2 2556 * @param HRTIMx: pointer to HRTIMx peripheral
mbed_official 157:90e3acc479a2 2557 * @param Prescaler: Prescaler value
mbed_official 157:90e3acc479a2 2558 * This parameter can be one of the following values:
mbed_official 157:90e3acc479a2 2559 * @arg HRTIM_FAULTPRESCALER_DIV1: fFLTS=fHRTIMx
mbed_official 157:90e3acc479a2 2560 * @arg HRTIM_FAULTPRESCALER_DIV2: fFLTS=fHRTIMx / 2
mbed_official 157:90e3acc479a2 2561 * @arg HRTIM_FAULTPRESCALER_DIV4: fFLTS=fHRTIMx / 4
mbed_official 157:90e3acc479a2 2562 * @arg HRTIM_FAULTPRESCALER_DIV8: fFLTS=fHRTIMx / 8
mbed_official 157:90e3acc479a2 2563 * @retval None
mbed_official 157:90e3acc479a2 2564 */
mbed_official 157:90e3acc479a2 2565 void HRTIM_FaultPrescalerConfig(HRTIM_TypeDef * HRTIMx,
mbed_official 157:90e3acc479a2 2566 uint32_t Prescaler)
mbed_official 157:90e3acc479a2 2567 {
mbed_official 157:90e3acc479a2 2568 uint32_t HRTIM_fltinr2;
mbed_official 157:90e3acc479a2 2569
mbed_official 157:90e3acc479a2 2570 /* Check parameters */
mbed_official 157:90e3acc479a2 2571 assert_param(IS_HRTIM_FAULTPRESCALER(Prescaler));
mbed_official 157:90e3acc479a2 2572
mbed_official 157:90e3acc479a2 2573 /* Set the external event prescaler */
mbed_official 157:90e3acc479a2 2574 HRTIM_fltinr2 = HRTIMx->HRTIM_COMMON.FLTINxR2;
mbed_official 157:90e3acc479a2 2575 HRTIM_fltinr2 &= ~(HRTIM_FLTINR2_FLTSD);
mbed_official 157:90e3acc479a2 2576 HRTIM_fltinr2 |= Prescaler;
mbed_official 157:90e3acc479a2 2577
mbed_official 157:90e3acc479a2 2578 /* Update the HRTIMx registers */
mbed_official 157:90e3acc479a2 2579 HRTIMx->HRTIM_COMMON.FLTINxR2 = HRTIM_fltinr2;
mbed_official 157:90e3acc479a2 2580 }
mbed_official 157:90e3acc479a2 2581
mbed_official 157:90e3acc479a2 2582 /**
mbed_official 157:90e3acc479a2 2583 * @brief Enables or disables the HRTIMx Fault mode.
mbed_official 157:90e3acc479a2 2584 * @param HRTIMx: pointer to HRTIMx peripheral
mbed_official 157:90e3acc479a2 2585 * @param Fault: fault input to configure
mbed_official 157:90e3acc479a2 2586 * This parameter can be one of the following values:
mbed_official 157:90e3acc479a2 2587 * @arg HRTIM_FAULT_1: Fault input 1
mbed_official 157:90e3acc479a2 2588 * @arg HRTIM_FAULT_2: Fault input 2
mbed_official 157:90e3acc479a2 2589 * @arg HRTIM_FAULT_3: Fault input 3
mbed_official 157:90e3acc479a2 2590 * @arg HRTIM_FAULT_4: Fault input 4
mbed_official 157:90e3acc479a2 2591 * @arg HRTIM_FAULT_5: Fault input 5
mbed_official 157:90e3acc479a2 2592 * @param Enable: Fault mode controller enabling
mbed_official 157:90e3acc479a2 2593 * This parameter can be one of the following values:
mbed_official 157:90e3acc479a2 2594 * @arg HRTIM_FAULT_ENABLED: Fault mode enabled
mbed_official 157:90e3acc479a2 2595 * @arg HRTIM_FAULT_DISABLED: Fault mode disabled
mbed_official 157:90e3acc479a2 2596 * @retval None
mbed_official 157:90e3acc479a2 2597 */
mbed_official 157:90e3acc479a2 2598 void HRTIM_FaultModeCtl(HRTIM_TypeDef * HRTIMx, uint32_t Fault, uint32_t Enable)
mbed_official 157:90e3acc479a2 2599 {
mbed_official 157:90e3acc479a2 2600 uint32_t HRTIM_fltinr1;
mbed_official 157:90e3acc479a2 2601 uint32_t HRTIM_fltinr2;
mbed_official 157:90e3acc479a2 2602
mbed_official 157:90e3acc479a2 2603 /* Check parameters */
mbed_official 157:90e3acc479a2 2604 assert_param(IS_HRTIM_FAULT(Fault));
mbed_official 157:90e3acc479a2 2605 assert_param(IS_HRTIM_FAULTCTL(Enable));
mbed_official 157:90e3acc479a2 2606
mbed_official 157:90e3acc479a2 2607 /* Configure fault channel */
mbed_official 157:90e3acc479a2 2608 HRTIM_fltinr1 = HRTIMx->HRTIM_COMMON.FLTINxR1;
mbed_official 157:90e3acc479a2 2609 HRTIM_fltinr2 = HRTIMx->HRTIM_COMMON.FLTINxR2;
mbed_official 157:90e3acc479a2 2610
mbed_official 157:90e3acc479a2 2611 switch (Fault)
mbed_official 157:90e3acc479a2 2612 {
mbed_official 157:90e3acc479a2 2613 case HRTIM_FAULT_1:
mbed_official 157:90e3acc479a2 2614 {
mbed_official 157:90e3acc479a2 2615 HRTIM_fltinr1 &= ~HRTIM_FLTINR1_FLT1E;
mbed_official 157:90e3acc479a2 2616 HRTIM_fltinr1 |= Enable;
mbed_official 157:90e3acc479a2 2617 }
mbed_official 157:90e3acc479a2 2618 break;
mbed_official 157:90e3acc479a2 2619 case HRTIM_FAULT_2:
mbed_official 157:90e3acc479a2 2620 {
mbed_official 157:90e3acc479a2 2621 HRTIM_fltinr1 &= ~HRTIM_FLTINR1_FLT2E;
mbed_official 157:90e3acc479a2 2622 HRTIM_fltinr1 |= (Enable<< 8);
mbed_official 157:90e3acc479a2 2623 }
mbed_official 157:90e3acc479a2 2624 break;
mbed_official 157:90e3acc479a2 2625 case HRTIM_FAULT_3:
mbed_official 157:90e3acc479a2 2626 {
mbed_official 157:90e3acc479a2 2627 HRTIM_fltinr1 &= ~HRTIM_FLTINR1_FLT3E;
mbed_official 157:90e3acc479a2 2628 HRTIM_fltinr1 |= (Enable << 16);
mbed_official 157:90e3acc479a2 2629 }
mbed_official 157:90e3acc479a2 2630 break;
mbed_official 157:90e3acc479a2 2631 case HRTIM_FAULT_4:
mbed_official 157:90e3acc479a2 2632 {
mbed_official 157:90e3acc479a2 2633 HRTIM_fltinr1 &= ~HRTIM_FLTINR1_FLT4E;
mbed_official 157:90e3acc479a2 2634 HRTIM_fltinr1 |= (Enable << 24);
mbed_official 157:90e3acc479a2 2635 }
mbed_official 157:90e3acc479a2 2636 break;
mbed_official 157:90e3acc479a2 2637 case HRTIM_FAULT_5:
mbed_official 157:90e3acc479a2 2638 {
mbed_official 157:90e3acc479a2 2639 HRTIM_fltinr2 &= ~HRTIM_FLTINR2_FLT5E;
mbed_official 157:90e3acc479a2 2640 HRTIM_fltinr2 |= Enable;
mbed_official 157:90e3acc479a2 2641 }
mbed_official 157:90e3acc479a2 2642 break;
mbed_official 157:90e3acc479a2 2643 default:
mbed_official 157:90e3acc479a2 2644 break;
mbed_official 157:90e3acc479a2 2645 }
mbed_official 157:90e3acc479a2 2646
mbed_official 157:90e3acc479a2 2647 /* Update the HRTIMx registers */
mbed_official 157:90e3acc479a2 2648 HRTIMx->HRTIM_COMMON.FLTINxR1 = HRTIM_fltinr1;
mbed_official 157:90e3acc479a2 2649 HRTIMx->HRTIM_COMMON.FLTINxR2 = HRTIM_fltinr2;
mbed_official 157:90e3acc479a2 2650 }
mbed_official 157:90e3acc479a2 2651
mbed_official 157:90e3acc479a2 2652 /**
mbed_official 157:90e3acc479a2 2653 * @brief Configures both the ADC trigger register update source and the ADC
mbed_official 157:90e3acc479a2 2654 * trigger source.
mbed_official 157:90e3acc479a2 2655 * @param HRTIMx: pointer to HRTIMx peripheral
mbed_official 157:90e3acc479a2 2656 * @param ADC trigger: ADC trigger to configure
mbed_official 157:90e3acc479a2 2657 * This parameter can be one of the following values:
mbed_official 157:90e3acc479a2 2658 * @arg HRTIM_ADCTRIGGER_1: ADC trigger 1
mbed_official 157:90e3acc479a2 2659 * @arg HRTIM_ADCTRIGGER_2: ADC trigger 2
mbed_official 157:90e3acc479a2 2660 * @arg HRTIM_ADCTRIGGER_3: ADC trigger 3
mbed_official 157:90e3acc479a2 2661 * @arg HRTIM_ADCTRIGGER_4: ADC trigger 4
mbed_official 157:90e3acc479a2 2662 * @param pADCTriggerCfg: pointer to the ADC trigger configuration structure
mbed_official 157:90e3acc479a2 2663 * @retval None
mbed_official 157:90e3acc479a2 2664 */
mbed_official 157:90e3acc479a2 2665 void HRTIM_ADCTriggerConfig(HRTIM_TypeDef * HRTIMx,
mbed_official 157:90e3acc479a2 2666 uint32_t ADCTrigger,
mbed_official 157:90e3acc479a2 2667 HRTIM_ADCTriggerCfgTypeDef* pADCTriggerCfg)
mbed_official 157:90e3acc479a2 2668 {
mbed_official 157:90e3acc479a2 2669 uint32_t HRTIM_cr1;
mbed_official 157:90e3acc479a2 2670
mbed_official 157:90e3acc479a2 2671 /* Check parameters */
mbed_official 157:90e3acc479a2 2672 assert_param(IS_HRTIM_ADCTRIGGER(ADCTrigger));
mbed_official 157:90e3acc479a2 2673 assert_param(IS_HRTIM_ADCTRIGGERUPDATE(pADCTriggerCfg->UpdateSource));
mbed_official 157:90e3acc479a2 2674
mbed_official 157:90e3acc479a2 2675 /* Set the ADC trigger update source */
mbed_official 157:90e3acc479a2 2676 HRTIM_cr1 = HRTIMx->HRTIM_COMMON.CR1;
mbed_official 157:90e3acc479a2 2677
mbed_official 157:90e3acc479a2 2678 switch (ADCTrigger)
mbed_official 157:90e3acc479a2 2679 {
mbed_official 157:90e3acc479a2 2680 case HRTIM_ADCTRIGGER_1:
mbed_official 157:90e3acc479a2 2681 {
mbed_official 157:90e3acc479a2 2682 HRTIM_cr1 &= ~(HRTIM_CR1_ADC1USRC);
mbed_official 157:90e3acc479a2 2683 HRTIM_cr1 |= pADCTriggerCfg->UpdateSource;
mbed_official 157:90e3acc479a2 2684
mbed_official 157:90e3acc479a2 2685 /* Set the ADC trigger 1 source */
mbed_official 157:90e3acc479a2 2686 HRTIMx->HRTIM_COMMON.ADC1R = pADCTriggerCfg->Trigger;
mbed_official 157:90e3acc479a2 2687 }
mbed_official 157:90e3acc479a2 2688 break;
mbed_official 157:90e3acc479a2 2689 case HRTIM_ADCTRIGGER_2:
mbed_official 157:90e3acc479a2 2690 {
mbed_official 157:90e3acc479a2 2691 HRTIM_cr1 &= ~(HRTIM_CR1_ADC2USRC);
mbed_official 157:90e3acc479a2 2692 HRTIM_cr1 |= (pADCTriggerCfg->UpdateSource << 3);
mbed_official 157:90e3acc479a2 2693
mbed_official 157:90e3acc479a2 2694 /* Set the ADC trigger 2 source */
mbed_official 157:90e3acc479a2 2695 HRTIMx->HRTIM_COMMON.ADC2R = pADCTriggerCfg->Trigger;
mbed_official 157:90e3acc479a2 2696 }
mbed_official 157:90e3acc479a2 2697 break;
mbed_official 157:90e3acc479a2 2698 case HRTIM_ADCTRIGGER_3:
mbed_official 157:90e3acc479a2 2699 {
mbed_official 157:90e3acc479a2 2700 HRTIM_cr1 &= ~(HRTIM_CR1_ADC3USRC);
mbed_official 157:90e3acc479a2 2701 HRTIM_cr1 |= (pADCTriggerCfg->UpdateSource << 6);
mbed_official 157:90e3acc479a2 2702
mbed_official 157:90e3acc479a2 2703 /* Set the ADC trigger 3 source */
mbed_official 157:90e3acc479a2 2704 HRTIMx->HRTIM_COMMON.ADC3R = pADCTriggerCfg->Trigger;
mbed_official 157:90e3acc479a2 2705 }
mbed_official 157:90e3acc479a2 2706 case HRTIM_ADCTRIGGER_4:
mbed_official 157:90e3acc479a2 2707 {
mbed_official 157:90e3acc479a2 2708 HRTIM_cr1 &= ~(HRTIM_CR1_ADC4USRC);
mbed_official 157:90e3acc479a2 2709 HRTIM_cr1 |= (pADCTriggerCfg->UpdateSource << 9);
mbed_official 157:90e3acc479a2 2710
mbed_official 157:90e3acc479a2 2711 /* Set the ADC trigger 4 source */
mbed_official 157:90e3acc479a2 2712 HRTIMx->HRTIM_COMMON.ADC4R = pADCTriggerCfg->Trigger;
mbed_official 157:90e3acc479a2 2713 }
mbed_official 157:90e3acc479a2 2714 break;
mbed_official 157:90e3acc479a2 2715 default:
mbed_official 157:90e3acc479a2 2716 break;
mbed_official 157:90e3acc479a2 2717 }
mbed_official 157:90e3acc479a2 2718
mbed_official 157:90e3acc479a2 2719 /* Update the HRTIMx registers */
mbed_official 157:90e3acc479a2 2720 HRTIMx->HRTIM_COMMON.CR1 = HRTIM_cr1;
mbed_official 157:90e3acc479a2 2721 }
mbed_official 157:90e3acc479a2 2722
mbed_official 157:90e3acc479a2 2723
mbed_official 157:90e3acc479a2 2724 /**
mbed_official 157:90e3acc479a2 2725 * @brief Enables or disables the HRTIMx burst mode controller.
mbed_official 157:90e3acc479a2 2726 * @param HRTIMx: pointer to HRTIMx peripheral
mbed_official 157:90e3acc479a2 2727 * @param Enable: Burst mode controller enabling
mbed_official 157:90e3acc479a2 2728 * This parameter can be one of the following values:
mbed_official 157:90e3acc479a2 2729 * @arg HRTIM_BURSTMODECTL_ENABLED: Burst mode enabled
mbed_official 157:90e3acc479a2 2730 * @arg HRTIM_BURSTMODECTL_DISABLED: Burst mode disabled
mbed_official 157:90e3acc479a2 2731 * @retval None
mbed_official 157:90e3acc479a2 2732 */
mbed_official 157:90e3acc479a2 2733 void HRTIM_BurstModeCtl(HRTIM_TypeDef * HRTIMx, uint32_t Enable)
mbed_official 157:90e3acc479a2 2734 {
mbed_official 157:90e3acc479a2 2735 uint32_t HRTIM_bmcr;
mbed_official 157:90e3acc479a2 2736
mbed_official 157:90e3acc479a2 2737 /* Check parameters */
mbed_official 157:90e3acc479a2 2738 assert_param(IS_HRTIM_BURSTMODECTL(Enable));
mbed_official 157:90e3acc479a2 2739
mbed_official 157:90e3acc479a2 2740 /* Enable/Disable the burst mode controller */
mbed_official 157:90e3acc479a2 2741 HRTIM_bmcr = HRTIMx->HRTIM_COMMON.BMCR;
mbed_official 157:90e3acc479a2 2742 HRTIM_bmcr &= ~(HRTIM_BMCR_BME);
mbed_official 157:90e3acc479a2 2743 HRTIM_bmcr |= Enable;
mbed_official 157:90e3acc479a2 2744
mbed_official 157:90e3acc479a2 2745 /* Update the HRTIMx registers */
mbed_official 157:90e3acc479a2 2746 HRTIMx->HRTIM_COMMON.BMCR = HRTIM_bmcr;
mbed_official 157:90e3acc479a2 2747 }
mbed_official 157:90e3acc479a2 2748
mbed_official 157:90e3acc479a2 2749 /**
mbed_official 157:90e3acc479a2 2750 * @brief Triggers a software capture on the designed capture unit
mbed_official 157:90e3acc479a2 2751 * @param HRTIMx: pointer to HRTIMx peripheral
mbed_official 157:90e3acc479a2 2752 * @param TimerIdx: Timer index
mbed_official 157:90e3acc479a2 2753 * This parameter can be one of the following values:
mbed_official 157:90e3acc479a2 2754 * @arg 0x0 to 0x4 for timers A to E
mbed_official 157:90e3acc479a2 2755 * @param CaptureUnit: Capture unit to trig
mbed_official 157:90e3acc479a2 2756 * This parameter can be one of the following values:
mbed_official 157:90e3acc479a2 2757 * @arg HRTIM_CAPTUREUNIT_1: Capture unit 1
mbed_official 157:90e3acc479a2 2758 * @arg HRTIM_CAPTUREUNIT_2: Capture unit 2
mbed_official 157:90e3acc479a2 2759 * @retval None
mbed_official 157:90e3acc479a2 2760 * @note The 'software capture' bit in the capure configuration register is
mbed_official 157:90e3acc479a2 2761 * automatically reset by hardware
mbed_official 157:90e3acc479a2 2762 */
mbed_official 157:90e3acc479a2 2763 void HRTIM_SoftwareCapture(HRTIM_TypeDef * HRTIMx,
mbed_official 157:90e3acc479a2 2764 uint32_t TimerIdx,
mbed_official 157:90e3acc479a2 2765 uint32_t CaptureUnit)
mbed_official 157:90e3acc479a2 2766 {
mbed_official 157:90e3acc479a2 2767 /* Check parameters */
mbed_official 157:90e3acc479a2 2768 assert_param(IS_HRTIM_TIMING_UNIT(TimerIdx));
mbed_official 157:90e3acc479a2 2769 assert_param(IS_HRTIM_CAPTUREUNIT(CaptureUnit));
mbed_official 157:90e3acc479a2 2770
mbed_official 157:90e3acc479a2 2771 /* Force a software capture on concerned capture unit */
mbed_official 157:90e3acc479a2 2772 switch (CaptureUnit)
mbed_official 157:90e3acc479a2 2773 {
mbed_official 157:90e3acc479a2 2774 case HRTIM_CAPTUREUNIT_1:
mbed_official 157:90e3acc479a2 2775 {
mbed_official 157:90e3acc479a2 2776 HRTIMx->HRTIM_TIMERx[TimerIdx].CPT1xCR |= HRTIM_CPT1CR_SWCPT;
mbed_official 157:90e3acc479a2 2777 }
mbed_official 157:90e3acc479a2 2778 break;
mbed_official 157:90e3acc479a2 2779 case HRTIM_CAPTUREUNIT_2:
mbed_official 157:90e3acc479a2 2780 {
mbed_official 157:90e3acc479a2 2781 HRTIMx->HRTIM_TIMERx[TimerIdx].CPT2xCR |= HRTIM_CPT2CR_SWCPT;
mbed_official 157:90e3acc479a2 2782 }
mbed_official 157:90e3acc479a2 2783 break;
mbed_official 157:90e3acc479a2 2784 default:
mbed_official 157:90e3acc479a2 2785 break;
mbed_official 157:90e3acc479a2 2786 }
mbed_official 157:90e3acc479a2 2787 }
mbed_official 157:90e3acc479a2 2788
mbed_official 157:90e3acc479a2 2789 /**
mbed_official 157:90e3acc479a2 2790 * @brief Triggers the update of the registers of one or several timers
mbed_official 157:90e3acc479a2 2791 * @param HRTIMx: pointer to HRTIMx peripheral
mbed_official 157:90e3acc479a2 2792 * @param TimersToUpdate: timers concerned with the software register update
mbed_official 157:90e3acc479a2 2793 * This parameter can be any combination of the following values:
mbed_official 157:90e3acc479a2 2794 * @arg HRTIM_TIMERUPDATE_MASTER
mbed_official 157:90e3acc479a2 2795 * @arg HRTIM_TIMERUPDATE_A
mbed_official 157:90e3acc479a2 2796 * @arg HRTIM_TIMERUPDATE_B
mbed_official 157:90e3acc479a2 2797 * @arg HRTIM_TIMERUPDATE_C
mbed_official 157:90e3acc479a2 2798 * @arg HRTIM_TIMERUPDATE_D
mbed_official 157:90e3acc479a2 2799 * @arg HRTIM_TIMERUPDATE_E
mbed_official 157:90e3acc479a2 2800 * @retval None
mbed_official 157:90e3acc479a2 2801 * @note The 'software update' bits in the HRTIMx control register 2 register are
mbed_official 157:90e3acc479a2 2802 * automatically reset by hardware
mbed_official 157:90e3acc479a2 2803 */
mbed_official 157:90e3acc479a2 2804 void HRTIM_SoftwareUpdate(HRTIM_TypeDef * HRTIMx,
mbed_official 157:90e3acc479a2 2805 uint32_t TimersToUpdate)
mbed_official 157:90e3acc479a2 2806 {
mbed_official 157:90e3acc479a2 2807 /* Check parameters */
mbed_official 157:90e3acc479a2 2808 assert_param(IS_HRTIM_TIMERUPDATE(TimersToUpdate));
mbed_official 157:90e3acc479a2 2809
mbed_official 157:90e3acc479a2 2810 /* Force timer(s) registers update */
mbed_official 157:90e3acc479a2 2811 HRTIMx->HRTIM_COMMON.CR2 |= TimersToUpdate;
mbed_official 157:90e3acc479a2 2812
mbed_official 157:90e3acc479a2 2813 }
mbed_official 157:90e3acc479a2 2814
mbed_official 157:90e3acc479a2 2815 /**
mbed_official 157:90e3acc479a2 2816 * @brief Triggers the reset of one or several timers
mbed_official 157:90e3acc479a2 2817 * @param HRTIMx: pointer to HRTIMx peripheral
mbed_official 157:90e3acc479a2 2818 * @param TimersToUpdate: timers concerned with the software counter reset
mbed_official 157:90e3acc479a2 2819 * This parameter can be any combination of the following values:
mbed_official 157:90e3acc479a2 2820 * @arg HRTIM_TIMER_MASTER
mbed_official 157:90e3acc479a2 2821 * @arg HRTIM_TIMER_A
mbed_official 157:90e3acc479a2 2822 * @arg HRTIM_TIMER_B
mbed_official 157:90e3acc479a2 2823 * @arg HRTIM_TIMER_C
mbed_official 157:90e3acc479a2 2824 * @arg HRTIM_TIMER_D
mbed_official 157:90e3acc479a2 2825 * @arg HRTIM_TIMER_E
mbed_official 157:90e3acc479a2 2826 * @retval None
mbed_official 157:90e3acc479a2 2827 * @note The 'software reset' bits in the HRTIMx control register 2 are
mbed_official 157:90e3acc479a2 2828 * automatically reset by hardware
mbed_official 157:90e3acc479a2 2829 */
mbed_official 157:90e3acc479a2 2830 void HRTIM_SoftwareReset(HRTIM_TypeDef * HRTIMx,
mbed_official 157:90e3acc479a2 2831 uint32_t TimersToReset)
mbed_official 157:90e3acc479a2 2832 {
mbed_official 157:90e3acc479a2 2833 /* Check parameters */
mbed_official 157:90e3acc479a2 2834 assert_param(IS_HRTIM_TIMERRESET(TimersToReset));
mbed_official 157:90e3acc479a2 2835
mbed_official 157:90e3acc479a2 2836 /* Force timer(s) registers update */
mbed_official 157:90e3acc479a2 2837 HRTIMx->HRTIM_COMMON.CR2 |= TimersToReset;
mbed_official 157:90e3acc479a2 2838
mbed_official 157:90e3acc479a2 2839 }
mbed_official 157:90e3acc479a2 2840
mbed_official 157:90e3acc479a2 2841 /**
mbed_official 157:90e3acc479a2 2842 * @brief Forces the timer output to its active or inactive state
mbed_official 157:90e3acc479a2 2843 * @param HRTIMx: pointer to HRTIMx peripheral
mbed_official 157:90e3acc479a2 2844 * @param TimerIdx: Timer index
mbed_official 157:90e3acc479a2 2845 * This parameter can be one of the following values:
mbed_official 157:90e3acc479a2 2846 * @arg 0x0 to 0x4 for timers A to E
mbed_official 157:90e3acc479a2 2847 * @param Output: Timer output
mbed_official 157:90e3acc479a2 2848 * This parameter can be one of the following values:
mbed_official 157:90e3acc479a2 2849 * @arg HRTIM_OUTPUT_TA1: Timer A - Output 1
mbed_official 157:90e3acc479a2 2850 * @arg HRTIM_OUTPUT_TA2: Timer A - Output 2
mbed_official 157:90e3acc479a2 2851 * @arg HRTIM_OUTPUT_TB1: Timer B - Output 1
mbed_official 157:90e3acc479a2 2852 * @arg HRTIM_OUTPUT_TB2: Timer B - Output 2
mbed_official 157:90e3acc479a2 2853 * @arg HRTIM_OUTPUT_TC1: Timer C - Output 1
mbed_official 157:90e3acc479a2 2854 * @arg HRTIM_OUTPUT_TC2: Timer C - Output 2
mbed_official 157:90e3acc479a2 2855 * @arg HRTIM_OUTPUT_TD1: Timer D - Output 1
mbed_official 157:90e3acc479a2 2856 * @arg HRTIM_OUTPUT_TD2: Timer D - Output 2
mbed_official 157:90e3acc479a2 2857 * @arg HRTIM_OUTPUT_TE1: Timer E - Output 1
mbed_official 157:90e3acc479a2 2858 * @arg HRTIM_OUTPUT_TE2: Timer E - Output 2
mbed_official 157:90e3acc479a2 2859 * @param OutputLevel: indicates whether the output is forced to its active or inactive state
mbed_official 157:90e3acc479a2 2860 * This parameter can be one of the following values:
mbed_official 157:90e3acc479a2 2861 * @arg HRTIM_OUTPUTLEVEL_ACTIVE: output is forced to its active state
mbed_official 157:90e3acc479a2 2862 * @arg HRTIM_OUTPUTLEVEL_INACTIVE: output is forced to its inactive state
mbed_official 157:90e3acc479a2 2863 * @retval None
mbed_official 157:90e3acc479a2 2864 * @note The 'software set/reset trigger' bit in the output set/reset registers
mbed_official 157:90e3acc479a2 2865 * is automatically reset by hardware
mbed_official 157:90e3acc479a2 2866 */
mbed_official 157:90e3acc479a2 2867 void HRTIM_WaveformSetOutputLevel(HRTIM_TypeDef * HRTIMx,
mbed_official 157:90e3acc479a2 2868 uint32_t TimerIdx,
mbed_official 157:90e3acc479a2 2869 uint32_t Output,
mbed_official 157:90e3acc479a2 2870 uint32_t OutputLevel)
mbed_official 157:90e3acc479a2 2871 {
mbed_official 157:90e3acc479a2 2872 /* Check parameters */
mbed_official 157:90e3acc479a2 2873 assert_param(IS_HRTIM_TIMER_OUTPUT(TimerIdx, Output));
mbed_official 157:90e3acc479a2 2874 assert_param(IS_HRTIM_OUTPUTLEVEL(OutputLevel));
mbed_official 157:90e3acc479a2 2875
mbed_official 157:90e3acc479a2 2876 /* Force timer output level */
mbed_official 157:90e3acc479a2 2877 switch (Output)
mbed_official 157:90e3acc479a2 2878 {
mbed_official 157:90e3acc479a2 2879 case HRTIM_OUTPUT_TA1:
mbed_official 157:90e3acc479a2 2880 case HRTIM_OUTPUT_TB1:
mbed_official 157:90e3acc479a2 2881 case HRTIM_OUTPUT_TC1:
mbed_official 157:90e3acc479a2 2882 case HRTIM_OUTPUT_TD1:
mbed_official 157:90e3acc479a2 2883 case HRTIM_OUTPUT_TE1:
mbed_official 157:90e3acc479a2 2884 {
mbed_official 157:90e3acc479a2 2885 if (OutputLevel == HRTIM_OUTPUTLEVEL_ACTIVE)
mbed_official 157:90e3acc479a2 2886 {
mbed_official 157:90e3acc479a2 2887 /* Force output to its active state */
mbed_official 157:90e3acc479a2 2888 HRTIMx->HRTIM_TIMERx[TimerIdx].SETx1R |= HRTIM_SET1R_SST;
mbed_official 157:90e3acc479a2 2889 }
mbed_official 157:90e3acc479a2 2890 else
mbed_official 157:90e3acc479a2 2891 {
mbed_official 157:90e3acc479a2 2892 /* Force output to its inactive state */
mbed_official 157:90e3acc479a2 2893 HRTIMx->HRTIM_TIMERx[TimerIdx].RSTx1R |= HRTIM_RST1R_SRT;
mbed_official 157:90e3acc479a2 2894 }
mbed_official 157:90e3acc479a2 2895 }
mbed_official 157:90e3acc479a2 2896 break;
mbed_official 157:90e3acc479a2 2897 case HRTIM_OUTPUT_TA2:
mbed_official 157:90e3acc479a2 2898 case HRTIM_OUTPUT_TB2:
mbed_official 157:90e3acc479a2 2899 case HRTIM_OUTPUT_TC2:
mbed_official 157:90e3acc479a2 2900 case HRTIM_OUTPUT_TD2:
mbed_official 157:90e3acc479a2 2901 case HRTIM_OUTPUT_TE2:
mbed_official 157:90e3acc479a2 2902 {
mbed_official 157:90e3acc479a2 2903 if (OutputLevel == HRTIM_OUTPUTLEVEL_ACTIVE)
mbed_official 157:90e3acc479a2 2904 {
mbed_official 157:90e3acc479a2 2905 /* Force output to its active state */
mbed_official 157:90e3acc479a2 2906 HRTIMx->HRTIM_TIMERx[TimerIdx].SETx2R |= HRTIM_SET2R_SST;
mbed_official 157:90e3acc479a2 2907 }
mbed_official 157:90e3acc479a2 2908 else
mbed_official 157:90e3acc479a2 2909 {
mbed_official 157:90e3acc479a2 2910 /* Force output to its inactive state */
mbed_official 157:90e3acc479a2 2911 HRTIMx->HRTIM_TIMERx[TimerIdx].RSTx2R |= HRTIM_RST2R_SRT;
mbed_official 157:90e3acc479a2 2912 }
mbed_official 157:90e3acc479a2 2913 }
mbed_official 157:90e3acc479a2 2914 break;
mbed_official 157:90e3acc479a2 2915 default:
mbed_official 157:90e3acc479a2 2916 break;
mbed_official 157:90e3acc479a2 2917 }
mbed_official 157:90e3acc479a2 2918 }
mbed_official 157:90e3acc479a2 2919
mbed_official 157:90e3acc479a2 2920
mbed_official 157:90e3acc479a2 2921 /**
mbed_official 157:90e3acc479a2 2922 * @}
mbed_official 157:90e3acc479a2 2923 */
mbed_official 157:90e3acc479a2 2924
mbed_official 157:90e3acc479a2 2925 /** @defgroup HRTIM_Group4 Peripheral State methods
mbed_official 157:90e3acc479a2 2926 * @brief Peripheral State functions
mbed_official 157:90e3acc479a2 2927 *
mbed_official 157:90e3acc479a2 2928 @verbatim
mbed_official 157:90e3acc479a2 2929 ===============================================================================
mbed_official 157:90e3acc479a2 2930 ##### Peripheral State methods #####
mbed_official 157:90e3acc479a2 2931 ===============================================================================
mbed_official 157:90e3acc479a2 2932 [..]
mbed_official 157:90e3acc479a2 2933 This subsection permit to get in run-time the status of the peripheral
mbed_official 157:90e3acc479a2 2934 and the data flow.
mbed_official 157:90e3acc479a2 2935
mbed_official 157:90e3acc479a2 2936 @endverbatim
mbed_official 157:90e3acc479a2 2937 * @{
mbed_official 157:90e3acc479a2 2938 */
mbed_official 157:90e3acc479a2 2939
mbed_official 157:90e3acc479a2 2940 /**
mbed_official 157:90e3acc479a2 2941 * @brief Returns actual value of the capture register of the designated capture unit
mbed_official 157:90e3acc479a2 2942 * @param HRTIMx: pointer to HRTIMx peripheral
mbed_official 157:90e3acc479a2 2943 * @param TimerIdx: Timer index
mbed_official 157:90e3acc479a2 2944 * This parameter can be one of the following values:
mbed_official 157:90e3acc479a2 2945 * @arg 0x0 to 0x4 for timers A to E
mbed_official 157:90e3acc479a2 2946 * @param CaptureUnit: Capture unit to trig
mbed_official 157:90e3acc479a2 2947 * This parameter can be one of the following values:
mbed_official 157:90e3acc479a2 2948 * @arg HRTIM_CAPTUREUNIT_1: Capture unit 1
mbed_official 157:90e3acc479a2 2949 * @arg HRTIM_CAPTUREUNIT_2: Capture unit 2
mbed_official 157:90e3acc479a2 2950 * @retval Captured value
mbed_official 157:90e3acc479a2 2951 */
mbed_official 157:90e3acc479a2 2952 uint32_t HRTIM_GetCapturedValue(HRTIM_TypeDef * HRTIMx,
mbed_official 157:90e3acc479a2 2953 uint32_t TimerIdx,
mbed_official 157:90e3acc479a2 2954 uint32_t CaptureUnit)
mbed_official 157:90e3acc479a2 2955 {
mbed_official 157:90e3acc479a2 2956 uint32_t captured_value = 0;
mbed_official 157:90e3acc479a2 2957
mbed_official 157:90e3acc479a2 2958 /* Check parameters */
mbed_official 157:90e3acc479a2 2959 assert_param(IS_HRTIM_TIMING_UNIT(TimerIdx));
mbed_official 157:90e3acc479a2 2960 assert_param(IS_HRTIM_CAPTUREUNIT(CaptureUnit));
mbed_official 157:90e3acc479a2 2961
mbed_official 157:90e3acc479a2 2962 /* Read captured value */
mbed_official 157:90e3acc479a2 2963 switch (CaptureUnit)
mbed_official 157:90e3acc479a2 2964 {
mbed_official 157:90e3acc479a2 2965 case HRTIM_CAPTUREUNIT_1:
mbed_official 157:90e3acc479a2 2966 {
mbed_official 157:90e3acc479a2 2967 captured_value = HRTIMx->HRTIM_TIMERx[TimerIdx].CPT1xR;
mbed_official 157:90e3acc479a2 2968 }
mbed_official 157:90e3acc479a2 2969 break;
mbed_official 157:90e3acc479a2 2970 case HRTIM_CAPTUREUNIT_2:
mbed_official 157:90e3acc479a2 2971 {
mbed_official 157:90e3acc479a2 2972 captured_value = HRTIMx->HRTIM_TIMERx[TimerIdx].CPT2xR;
mbed_official 157:90e3acc479a2 2973 }
mbed_official 157:90e3acc479a2 2974 break;
mbed_official 157:90e3acc479a2 2975 default:
mbed_official 157:90e3acc479a2 2976 break;
mbed_official 157:90e3acc479a2 2977 }
mbed_official 157:90e3acc479a2 2978
mbed_official 157:90e3acc479a2 2979 return captured_value;
mbed_official 157:90e3acc479a2 2980 }
mbed_official 157:90e3acc479a2 2981
mbed_official 157:90e3acc479a2 2982 /**
mbed_official 157:90e3acc479a2 2983 * @brief Returns actual level (active or inactive) of the designated output
mbed_official 157:90e3acc479a2 2984 * @param HRTIMx: pointer to HRTIMx peripheral
mbed_official 157:90e3acc479a2 2985 * @param TimerIdx: Timer index
mbed_official 157:90e3acc479a2 2986 * This parameter can be one of the following values:
mbed_official 157:90e3acc479a2 2987 * @arg 0x0 to 0x4 for timers A to E
mbed_official 157:90e3acc479a2 2988 * @param Output: Timer output
mbed_official 157:90e3acc479a2 2989 * This parameter can be one of the following values:
mbed_official 157:90e3acc479a2 2990 * @arg HRTIM_OUTPUT_TA1: Timer A - Output 1
mbed_official 157:90e3acc479a2 2991 * @arg HRTIM_OUTPUT_TA2: Timer A - Output 2
mbed_official 157:90e3acc479a2 2992 * @arg HRTIM_OUTPUT_TB1: Timer B - Output 1
mbed_official 157:90e3acc479a2 2993 * @arg HRTIM_OUTPUT_TB2: Timer B - Output 2
mbed_official 157:90e3acc479a2 2994 * @arg HRTIM_OUTPUT_TC1: Timer C - Output 1
mbed_official 157:90e3acc479a2 2995 * @arg HRTIM_OUTPUT_TC2: Timer C - Output 2
mbed_official 157:90e3acc479a2 2996 * @arg HRTIM_OUTPUT_TD1: Timer D - Output 1
mbed_official 157:90e3acc479a2 2997 * @arg HRTIM_OUTPUT_TD2: Timer D - Output 2
mbed_official 157:90e3acc479a2 2998 * @arg HRTIM_OUTPUT_TE1: Timer E - Output 1
mbed_official 157:90e3acc479a2 2999 * @arg HRTIM_OUTPUT_TE2: Timer E - Output 2
mbed_official 157:90e3acc479a2 3000 * @retval Output level
mbed_official 157:90e3acc479a2 3001 * @note Returned output level is taken before the output stage (chopper,
mbed_official 157:90e3acc479a2 3002 * polarity).
mbed_official 157:90e3acc479a2 3003 */
mbed_official 157:90e3acc479a2 3004 uint32_t HRTIM_WaveformGetOutputLevel(HRTIM_TypeDef * HRTIMx,
mbed_official 157:90e3acc479a2 3005 uint32_t TimerIdx,
mbed_official 157:90e3acc479a2 3006 uint32_t Output)
mbed_official 157:90e3acc479a2 3007 {
mbed_official 157:90e3acc479a2 3008 uint32_t output_level = HRTIM_OUTPUTLEVEL_INACTIVE;
mbed_official 157:90e3acc479a2 3009
mbed_official 157:90e3acc479a2 3010 /* Check parameters */
mbed_official 157:90e3acc479a2 3011 assert_param(IS_HRTIM_TIMER_OUTPUT(TimerIdx, Output));
mbed_official 157:90e3acc479a2 3012
mbed_official 157:90e3acc479a2 3013 /* Read the output level */
mbed_official 157:90e3acc479a2 3014 switch (Output)
mbed_official 157:90e3acc479a2 3015 {
mbed_official 157:90e3acc479a2 3016 case HRTIM_OUTPUT_TA1:
mbed_official 157:90e3acc479a2 3017 case HRTIM_OUTPUT_TB1:
mbed_official 157:90e3acc479a2 3018 case HRTIM_OUTPUT_TC1:
mbed_official 157:90e3acc479a2 3019 case HRTIM_OUTPUT_TD1:
mbed_official 157:90e3acc479a2 3020 case HRTIM_OUTPUT_TE1:
mbed_official 157:90e3acc479a2 3021 {
mbed_official 157:90e3acc479a2 3022 if ((HRTIMx->HRTIM_TIMERx[TimerIdx].TIMxISR & HRTIM_TIMISR_O1CPY) != RESET)
mbed_official 157:90e3acc479a2 3023 {
mbed_official 157:90e3acc479a2 3024 output_level = HRTIM_OUTPUTLEVEL_ACTIVE;
mbed_official 157:90e3acc479a2 3025 }
mbed_official 157:90e3acc479a2 3026 else
mbed_official 157:90e3acc479a2 3027 {
mbed_official 157:90e3acc479a2 3028 output_level = HRTIM_OUTPUTLEVEL_INACTIVE;
mbed_official 157:90e3acc479a2 3029 }
mbed_official 157:90e3acc479a2 3030 }
mbed_official 157:90e3acc479a2 3031 break;
mbed_official 157:90e3acc479a2 3032 case HRTIM_OUTPUT_TA2:
mbed_official 157:90e3acc479a2 3033 case HRTIM_OUTPUT_TB2:
mbed_official 157:90e3acc479a2 3034 case HRTIM_OUTPUT_TC2:
mbed_official 157:90e3acc479a2 3035 case HRTIM_OUTPUT_TD2:
mbed_official 157:90e3acc479a2 3036 case HRTIM_OUTPUT_TE2:
mbed_official 157:90e3acc479a2 3037 {
mbed_official 157:90e3acc479a2 3038 if ((HRTIMx->HRTIM_TIMERx[TimerIdx].TIMxISR & HRTIM_TIMISR_O2CPY) != RESET)
mbed_official 157:90e3acc479a2 3039 {
mbed_official 157:90e3acc479a2 3040 output_level = HRTIM_OUTPUTLEVEL_ACTIVE;
mbed_official 157:90e3acc479a2 3041 }
mbed_official 157:90e3acc479a2 3042 else
mbed_official 157:90e3acc479a2 3043 {
mbed_official 157:90e3acc479a2 3044 output_level = HRTIM_OUTPUTLEVEL_INACTIVE;
mbed_official 157:90e3acc479a2 3045 }
mbed_official 157:90e3acc479a2 3046 }
mbed_official 157:90e3acc479a2 3047 break;
mbed_official 157:90e3acc479a2 3048 default:
mbed_official 157:90e3acc479a2 3049 break;
mbed_official 157:90e3acc479a2 3050 }
mbed_official 157:90e3acc479a2 3051
mbed_official 157:90e3acc479a2 3052 return output_level;
mbed_official 157:90e3acc479a2 3053 }
mbed_official 157:90e3acc479a2 3054
mbed_official 157:90e3acc479a2 3055 /**
mbed_official 157:90e3acc479a2 3056 * @brief Returns actual state (RUN, IDLE, FAULT) of the designated output
mbed_official 157:90e3acc479a2 3057 * @param HRTIMx: pointer to HRTIMx peripheral
mbed_official 157:90e3acc479a2 3058 * @param TimerIdx: Timer index
mbed_official 157:90e3acc479a2 3059 * This parameter can be one of the following values:
mbed_official 157:90e3acc479a2 3060 * @arg 0x0 to 0x4 for timers A to E
mbed_official 157:90e3acc479a2 3061 * @param Output: Timer output
mbed_official 157:90e3acc479a2 3062 * This parameter can be one of the following values:
mbed_official 157:90e3acc479a2 3063 * @arg HRTIM_OUTPUT_TA1: Timer A - Output 1
mbed_official 157:90e3acc479a2 3064 * @arg HRTIM_OUTPUT_TA2: Timer A - Output 2
mbed_official 157:90e3acc479a2 3065 * @arg HRTIM_OUTPUT_TB1: Timer B - Output 1
mbed_official 157:90e3acc479a2 3066 * @arg HRTIM_OUTPUT_TB2: Timer B - Output 2
mbed_official 157:90e3acc479a2 3067 * @arg HRTIM_OUTPUT_TC1: Timer C - Output 1
mbed_official 157:90e3acc479a2 3068 * @arg HRTIM_OUTPUT_TC2: Timer C - Output 2
mbed_official 157:90e3acc479a2 3069 * @arg HRTIM_OUTPUT_TD1: Timer D - Output 1
mbed_official 157:90e3acc479a2 3070 * @arg HRTIM_OUTPUT_TD2: Timer D - Output 2
mbed_official 157:90e3acc479a2 3071 * @arg HRTIM_OUTPUT_TE1: Timer E - Output 1
mbed_official 157:90e3acc479a2 3072 * @arg HRTIM_OUTPUT_TE2: Timer E - Output 2
mbed_official 157:90e3acc479a2 3073 * @retval Output state
mbed_official 157:90e3acc479a2 3074 */
mbed_official 157:90e3acc479a2 3075 uint32_t HRTIM_WaveformGetOutputState(HRTIM_TypeDef * HRTIMx,
mbed_official 157:90e3acc479a2 3076 uint32_t TimerIdx,
mbed_official 157:90e3acc479a2 3077 uint32_t Output)
mbed_official 157:90e3acc479a2 3078 {
mbed_official 157:90e3acc479a2 3079 uint32_t output_bit = 0;
mbed_official 157:90e3acc479a2 3080 uint32_t output_state = HRTIM_OUTPUTSTATE_IDLE;
mbed_official 157:90e3acc479a2 3081
mbed_official 157:90e3acc479a2 3082 /* Check parameters */
mbed_official 157:90e3acc479a2 3083 assert_param(IS_HRTIM_TIMER_OUTPUT(TimerIdx, Output));
mbed_official 157:90e3acc479a2 3084
mbed_official 157:90e3acc479a2 3085 /* Set output state according to output control status and output disable status */
mbed_official 157:90e3acc479a2 3086 switch (Output)
mbed_official 157:90e3acc479a2 3087 {
mbed_official 157:90e3acc479a2 3088 case HRTIM_OUTPUT_TA1:
mbed_official 157:90e3acc479a2 3089 {
mbed_official 157:90e3acc479a2 3090 output_bit = HRTIM_OENR_TA1OEN;
mbed_official 157:90e3acc479a2 3091 }
mbed_official 157:90e3acc479a2 3092 break;
mbed_official 157:90e3acc479a2 3093 case HRTIM_OUTPUT_TA2:
mbed_official 157:90e3acc479a2 3094 {
mbed_official 157:90e3acc479a2 3095 output_bit = HRTIM_OENR_TA2OEN;
mbed_official 157:90e3acc479a2 3096 }
mbed_official 157:90e3acc479a2 3097 break;
mbed_official 157:90e3acc479a2 3098 case HRTIM_OUTPUT_TB1:
mbed_official 157:90e3acc479a2 3099 {
mbed_official 157:90e3acc479a2 3100 output_bit = HRTIM_OENR_TB1OEN;
mbed_official 157:90e3acc479a2 3101 }
mbed_official 157:90e3acc479a2 3102 break;
mbed_official 157:90e3acc479a2 3103 case HRTIM_OUTPUT_TB2:
mbed_official 157:90e3acc479a2 3104 {
mbed_official 157:90e3acc479a2 3105 output_bit = HRTIM_OENR_TB2OEN;
mbed_official 157:90e3acc479a2 3106 }
mbed_official 157:90e3acc479a2 3107 break;
mbed_official 157:90e3acc479a2 3108 case HRTIM_OUTPUT_TC1:
mbed_official 157:90e3acc479a2 3109 {
mbed_official 157:90e3acc479a2 3110 output_bit = HRTIM_OENR_TC1OEN;
mbed_official 157:90e3acc479a2 3111 }
mbed_official 157:90e3acc479a2 3112 break;
mbed_official 157:90e3acc479a2 3113 case HRTIM_OUTPUT_TC2:
mbed_official 157:90e3acc479a2 3114 {
mbed_official 157:90e3acc479a2 3115 output_bit = HRTIM_OENR_TC2OEN;
mbed_official 157:90e3acc479a2 3116 }
mbed_official 157:90e3acc479a2 3117 break;
mbed_official 157:90e3acc479a2 3118 case HRTIM_OUTPUT_TD1:
mbed_official 157:90e3acc479a2 3119 {
mbed_official 157:90e3acc479a2 3120 output_bit = HRTIM_OENR_TD1OEN;
mbed_official 157:90e3acc479a2 3121 }
mbed_official 157:90e3acc479a2 3122 break;
mbed_official 157:90e3acc479a2 3123 case HRTIM_OUTPUT_TD2:
mbed_official 157:90e3acc479a2 3124 {
mbed_official 157:90e3acc479a2 3125 output_bit = HRTIM_OENR_TD2OEN;
mbed_official 157:90e3acc479a2 3126 }
mbed_official 157:90e3acc479a2 3127 break;
mbed_official 157:90e3acc479a2 3128 case HRTIM_OUTPUT_TE1:
mbed_official 157:90e3acc479a2 3129 {
mbed_official 157:90e3acc479a2 3130 output_bit = HRTIM_OENR_TE1OEN;
mbed_official 157:90e3acc479a2 3131 }
mbed_official 157:90e3acc479a2 3132 break;
mbed_official 157:90e3acc479a2 3133 case HRTIM_OUTPUT_TE2:
mbed_official 157:90e3acc479a2 3134 {
mbed_official 157:90e3acc479a2 3135 output_bit = HRTIM_OENR_TE2OEN;
mbed_official 157:90e3acc479a2 3136 }
mbed_official 157:90e3acc479a2 3137 break;
mbed_official 157:90e3acc479a2 3138 default:
mbed_official 157:90e3acc479a2 3139 break;
mbed_official 157:90e3acc479a2 3140 }
mbed_official 157:90e3acc479a2 3141
mbed_official 157:90e3acc479a2 3142 if ((HRTIMx->HRTIM_COMMON.OENR & output_bit) != RESET)
mbed_official 157:90e3acc479a2 3143 {
mbed_official 157:90e3acc479a2 3144 /* Output is enabled: output in RUN state (whatever ouput disable status is)*/
mbed_official 157:90e3acc479a2 3145 output_state = HRTIM_OUTPUTSTATE_RUN;
mbed_official 157:90e3acc479a2 3146 }
mbed_official 157:90e3acc479a2 3147 else
mbed_official 157:90e3acc479a2 3148 {
mbed_official 157:90e3acc479a2 3149 if ((HRTIMx->HRTIM_COMMON.ODSR & output_bit) != RESET)
mbed_official 157:90e3acc479a2 3150 {
mbed_official 157:90e3acc479a2 3151 /* Output is disabled: output in FAULT state */
mbed_official 157:90e3acc479a2 3152 output_state = HRTIM_OUTPUTSTATE_FAULT;
mbed_official 157:90e3acc479a2 3153 }
mbed_official 157:90e3acc479a2 3154 else
mbed_official 157:90e3acc479a2 3155 {
mbed_official 157:90e3acc479a2 3156 /* Output is disabled: output in IDLE state */
mbed_official 157:90e3acc479a2 3157 output_state = HRTIM_OUTPUTSTATE_IDLE;
mbed_official 157:90e3acc479a2 3158 }
mbed_official 157:90e3acc479a2 3159 }
mbed_official 157:90e3acc479a2 3160
mbed_official 157:90e3acc479a2 3161 return(output_state);
mbed_official 157:90e3acc479a2 3162 }
mbed_official 157:90e3acc479a2 3163
mbed_official 157:90e3acc479a2 3164 /**
mbed_official 157:90e3acc479a2 3165 * @brief Returns the level (active or inactive) of the designated output
mbed_official 157:90e3acc479a2 3166 * when the delayed protection was triggered
mbed_official 157:90e3acc479a2 3167 * @param HRTIMx: pointer to HRTIMx peripheral
mbed_official 157:90e3acc479a2 3168 * @param TimerIdx: Timer index
mbed_official 157:90e3acc479a2 3169 * This parameter can be one of the following values:
mbed_official 157:90e3acc479a2 3170 * @arg 0x0 to 0x4 for timers A to E
mbed_official 157:90e3acc479a2 3171 * @param Output: Timer output
mbed_official 157:90e3acc479a2 3172 * This parameter can be one of the following values:
mbed_official 157:90e3acc479a2 3173 * @arg HRTIM_OUTPUT_TA1: Timer A - Output 1
mbed_official 157:90e3acc479a2 3174 * @arg HRTIM_OUTPUT_TA2: Timer A - Output 2
mbed_official 157:90e3acc479a2 3175 * @arg HRTIM_OUTPUT_TB1: Timer B - Output 1
mbed_official 157:90e3acc479a2 3176 * @arg HRTIM_OUTPUT_TB2: Timer B - Output 2
mbed_official 157:90e3acc479a2 3177 * @arg HRTIM_OUTPUT_TC1: Timer C - Output 1
mbed_official 157:90e3acc479a2 3178 * @arg HRTIM_OUTPUT_TC2: Timer C - Output 2
mbed_official 157:90e3acc479a2 3179 * @arg HRTIM_OUTPUT_TD1: Timer D - Output 1
mbed_official 157:90e3acc479a2 3180 * @arg HRTIM_OUTPUT_TD2: Timer D - Output 2
mbed_official 157:90e3acc479a2 3181 * @arg HRTIM_OUTPUT_TD1: Timer E - Output 1
mbed_official 157:90e3acc479a2 3182 * @arg HRTIM_OUTPUT_TD2: Timer E - Output 2
mbed_official 157:90e3acc479a2 3183 * @retval Delayed protection status
mbed_official 157:90e3acc479a2 3184 */
mbed_official 157:90e3acc479a2 3185 uint32_t HRTIM_GetDelayedProtectionStatus(HRTIM_TypeDef * HRTIMx,
mbed_official 157:90e3acc479a2 3186 uint32_t TimerIdx,
mbed_official 157:90e3acc479a2 3187 uint32_t Output)
mbed_official 157:90e3acc479a2 3188 {
mbed_official 157:90e3acc479a2 3189 uint32_t delayed_protection_status = HRTIM_OUTPUTLEVEL_INACTIVE;
mbed_official 157:90e3acc479a2 3190
mbed_official 157:90e3acc479a2 3191 /* Check parameters */
mbed_official 157:90e3acc479a2 3192 assert_param(IS_HRTIM_TIMER_OUTPUT(TimerIdx, Output));
mbed_official 157:90e3acc479a2 3193
mbed_official 157:90e3acc479a2 3194 /* Read the delayed protection status */
mbed_official 157:90e3acc479a2 3195 switch (Output)
mbed_official 157:90e3acc479a2 3196 {
mbed_official 157:90e3acc479a2 3197 case HRTIM_OUTPUT_TA1:
mbed_official 157:90e3acc479a2 3198 case HRTIM_OUTPUT_TB1:
mbed_official 157:90e3acc479a2 3199 case HRTIM_OUTPUT_TC1:
mbed_official 157:90e3acc479a2 3200 case HRTIM_OUTPUT_TD1:
mbed_official 157:90e3acc479a2 3201 case HRTIM_OUTPUT_TE1:
mbed_official 157:90e3acc479a2 3202 {
mbed_official 157:90e3acc479a2 3203 if ((HRTIMx->HRTIM_TIMERx[TimerIdx].TIMxISR & HRTIM_TIMISR_O1STAT) != RESET)
mbed_official 157:90e3acc479a2 3204 {
mbed_official 157:90e3acc479a2 3205 /* Output 1 was active when the delayed idle protection was triggered */
mbed_official 157:90e3acc479a2 3206 delayed_protection_status = HRTIM_OUTPUTLEVEL_ACTIVE;
mbed_official 157:90e3acc479a2 3207 }
mbed_official 157:90e3acc479a2 3208 else
mbed_official 157:90e3acc479a2 3209 {
mbed_official 157:90e3acc479a2 3210 /* Output 1 was inactive when the delayed idle protection was triggered */
mbed_official 157:90e3acc479a2 3211 delayed_protection_status = HRTIM_OUTPUTLEVEL_INACTIVE;
mbed_official 157:90e3acc479a2 3212 }
mbed_official 157:90e3acc479a2 3213 }
mbed_official 157:90e3acc479a2 3214 break;
mbed_official 157:90e3acc479a2 3215 case HRTIM_OUTPUT_TA2:
mbed_official 157:90e3acc479a2 3216 case HRTIM_OUTPUT_TB2:
mbed_official 157:90e3acc479a2 3217 case HRTIM_OUTPUT_TC2:
mbed_official 157:90e3acc479a2 3218 case HRTIM_OUTPUT_TD2:
mbed_official 157:90e3acc479a2 3219 case HRTIM_OUTPUT_TE2:
mbed_official 157:90e3acc479a2 3220 {
mbed_official 157:90e3acc479a2 3221 if ((HRTIMx->HRTIM_TIMERx[TimerIdx].TIMxISR & HRTIM_TIMISR_O2STAT) != RESET)
mbed_official 157:90e3acc479a2 3222 {
mbed_official 157:90e3acc479a2 3223 /* Output 2 was active when the delayed idle protection was triggered */
mbed_official 157:90e3acc479a2 3224 delayed_protection_status = HRTIM_OUTPUTLEVEL_ACTIVE;
mbed_official 157:90e3acc479a2 3225 }
mbed_official 157:90e3acc479a2 3226 else
mbed_official 157:90e3acc479a2 3227 {
mbed_official 157:90e3acc479a2 3228 /* Output 2 was inactive when the delayed idle protection was triggered */
mbed_official 157:90e3acc479a2 3229 delayed_protection_status = HRTIM_OUTPUTLEVEL_INACTIVE;
mbed_official 157:90e3acc479a2 3230 }
mbed_official 157:90e3acc479a2 3231 }
mbed_official 157:90e3acc479a2 3232 break;
mbed_official 157:90e3acc479a2 3233 default:
mbed_official 157:90e3acc479a2 3234 break;
mbed_official 157:90e3acc479a2 3235 }
mbed_official 157:90e3acc479a2 3236
mbed_official 157:90e3acc479a2 3237 return delayed_protection_status;
mbed_official 157:90e3acc479a2 3238 }
mbed_official 157:90e3acc479a2 3239
mbed_official 157:90e3acc479a2 3240 /**
mbed_official 157:90e3acc479a2 3241 * @brief Returns the actual status (active or inactive) of the burst mode controller
mbed_official 157:90e3acc479a2 3242 * @param HRTIMx: pointer to HRTIMx peripheral
mbed_official 157:90e3acc479a2 3243 * @retval Burst mode controller status
mbed_official 157:90e3acc479a2 3244 */
mbed_official 157:90e3acc479a2 3245 uint32_t HRTIM_GetBurstStatus(HRTIM_TypeDef * HRTIMx)
mbed_official 157:90e3acc479a2 3246 {
mbed_official 157:90e3acc479a2 3247 uint32_t burst_mode_status;
mbed_official 157:90e3acc479a2 3248
mbed_official 157:90e3acc479a2 3249 /* Read burst mode status */
mbed_official 157:90e3acc479a2 3250 burst_mode_status = (HRTIMx->HRTIM_COMMON.BMCR & HRTIM_BMCR_BMSTAT);
mbed_official 157:90e3acc479a2 3251
mbed_official 157:90e3acc479a2 3252 return burst_mode_status;
mbed_official 157:90e3acc479a2 3253 }
mbed_official 157:90e3acc479a2 3254
mbed_official 157:90e3acc479a2 3255 /**
mbed_official 157:90e3acc479a2 3256 * @brief Indicates on which output the signal is currently active (when the
mbed_official 157:90e3acc479a2 3257 * push pull mode is enabled)
mbed_official 157:90e3acc479a2 3258 * @param HRTIMx: pointer to HRTIMx peripheral
mbed_official 157:90e3acc479a2 3259 * @param TimerIdx: Timer index
mbed_official 157:90e3acc479a2 3260 * This parameter can be one of the following values:
mbed_official 157:90e3acc479a2 3261 * @arg 0x0 to 0x4 for timers A to E
mbed_official 157:90e3acc479a2 3262 * @retval Burst mode controller status
mbed_official 157:90e3acc479a2 3263 */
mbed_official 157:90e3acc479a2 3264 uint32_t HRTIM_GetCurrentPushPullStatus(HRTIM_TypeDef * HRTIMx,
mbed_official 157:90e3acc479a2 3265 uint32_t TimerIdx)
mbed_official 157:90e3acc479a2 3266 {
mbed_official 157:90e3acc479a2 3267 uint32_t current_pushpull_status;
mbed_official 157:90e3acc479a2 3268
mbed_official 157:90e3acc479a2 3269 /* Check the parameters */
mbed_official 157:90e3acc479a2 3270 assert_param(IS_HRTIM_TIMING_UNIT(TimerIdx));
mbed_official 157:90e3acc479a2 3271
mbed_official 157:90e3acc479a2 3272 /* Read current push pull status */
mbed_official 157:90e3acc479a2 3273 current_pushpull_status = (HRTIMx->HRTIM_TIMERx[TimerIdx].TIMxISR & HRTIM_TIMISR_CPPSTAT);
mbed_official 157:90e3acc479a2 3274
mbed_official 157:90e3acc479a2 3275 return current_pushpull_status;
mbed_official 157:90e3acc479a2 3276 }
mbed_official 157:90e3acc479a2 3277
mbed_official 157:90e3acc479a2 3278
mbed_official 157:90e3acc479a2 3279 /**
mbed_official 157:90e3acc479a2 3280 * @brief Indicates on which output the signal was applied, in push-pull mode
mbed_official 157:90e3acc479a2 3281 balanced fault mode or delayed idle mode, when the protection was triggered
mbed_official 157:90e3acc479a2 3282 * @param HRTIMx: pointer to HRTIMx peripheral
mbed_official 157:90e3acc479a2 3283 * @param TimerIdx: Timer index
mbed_official 157:90e3acc479a2 3284 * This parameter can be one of the following values:
mbed_official 157:90e3acc479a2 3285 * @arg 0x0 to 0x4 for timers A to E
mbed_official 157:90e3acc479a2 3286 * @retval Idle Push Pull Status
mbed_official 157:90e3acc479a2 3287 */
mbed_official 157:90e3acc479a2 3288 uint32_t HRTIM_GetIdlePushPullStatus(HRTIM_TypeDef * HRTIMx,
mbed_official 157:90e3acc479a2 3289 uint32_t TimerIdx)
mbed_official 157:90e3acc479a2 3290 {
mbed_official 157:90e3acc479a2 3291 uint32_t idle_pushpull_status;
mbed_official 157:90e3acc479a2 3292
mbed_official 157:90e3acc479a2 3293 /* Check the parameters */
mbed_official 157:90e3acc479a2 3294 assert_param(IS_HRTIM_TIMING_UNIT(TimerIdx));
mbed_official 157:90e3acc479a2 3295
mbed_official 157:90e3acc479a2 3296 /* Read current push pull status */
mbed_official 157:90e3acc479a2 3297 idle_pushpull_status = (HRTIMx->HRTIM_TIMERx[TimerIdx].TIMxISR & HRTIM_TIMISR_IPPSTAT);
mbed_official 157:90e3acc479a2 3298
mbed_official 157:90e3acc479a2 3299 return idle_pushpull_status;
mbed_official 157:90e3acc479a2 3300 }
mbed_official 157:90e3acc479a2 3301
mbed_official 157:90e3acc479a2 3302 /**
mbed_official 157:90e3acc479a2 3303 * @brief Configures the master timer time base
mbed_official 157:90e3acc479a2 3304 * @param HRTIMx: pointer to HRTIMx peripheral
mbed_official 157:90e3acc479a2 3305 * @retval None
mbed_official 157:90e3acc479a2 3306 */
mbed_official 157:90e3acc479a2 3307 void HRTIM_MasterBase_Config(HRTIM_TypeDef * HRTIMx, HRTIM_BaseInitTypeDef* HRTIM_BaseInitStruct)
mbed_official 157:90e3acc479a2 3308 {
mbed_official 157:90e3acc479a2 3309 /* Set the prescaler ratio */
mbed_official 157:90e3acc479a2 3310 HRTIMx->HRTIM_MASTER.MCR &= (uint32_t) ~(HRTIM_MCR_CK_PSC);
mbed_official 157:90e3acc479a2 3311 HRTIMx->HRTIM_MASTER.MCR |= (uint32_t)HRTIM_BaseInitStruct->PrescalerRatio;
mbed_official 157:90e3acc479a2 3312
mbed_official 157:90e3acc479a2 3313 /* Set the operating mode */
mbed_official 157:90e3acc479a2 3314 HRTIMx->HRTIM_MASTER.MCR &= (uint32_t) ~(HRTIM_MCR_CONT | HRTIM_MCR_RETRIG);
mbed_official 157:90e3acc479a2 3315 HRTIMx->HRTIM_MASTER.MCR |= (uint32_t)HRTIM_BaseInitStruct->Mode;
mbed_official 157:90e3acc479a2 3316
mbed_official 157:90e3acc479a2 3317 /* Update the HRTIMx registers */
mbed_official 157:90e3acc479a2 3318 HRTIMx->HRTIM_MASTER.MPER = HRTIM_BaseInitStruct->Period;
mbed_official 157:90e3acc479a2 3319 HRTIMx->HRTIM_MASTER.MREP = HRTIM_BaseInitStruct->RepetitionCounter;
mbed_official 157:90e3acc479a2 3320 }
mbed_official 157:90e3acc479a2 3321
mbed_official 157:90e3acc479a2 3322 /**
mbed_official 157:90e3acc479a2 3323 * @brief Configures timing unit (timer A to timer E) time base
mbed_official 157:90e3acc479a2 3324 * @param HRTIMx: pointer to HRTIMx peripheral
mbed_official 157:90e3acc479a2 3325 * @param TimerIdx: Timer index
mbed_official 157:90e3acc479a2 3326 * @retval None
mbed_official 157:90e3acc479a2 3327 */
mbed_official 157:90e3acc479a2 3328 void HRTIM_TimingUnitBase_Config(HRTIM_TypeDef * HRTIMx, uint32_t TimerIdx, HRTIM_BaseInitTypeDef* HRTIM_BaseInitStruct)
mbed_official 157:90e3acc479a2 3329 {
mbed_official 157:90e3acc479a2 3330 /* Set the prescaler ratio */
mbed_official 157:90e3acc479a2 3331 HRTIMx->HRTIM_TIMERx[TimerIdx].TIMxCR &= (uint32_t) ~(HRTIM_TIMCR_CK_PSC);
mbed_official 157:90e3acc479a2 3332 HRTIMx->HRTIM_TIMERx[TimerIdx].TIMxCR |= (uint32_t)HRTIM_BaseInitStruct->PrescalerRatio;
mbed_official 157:90e3acc479a2 3333
mbed_official 157:90e3acc479a2 3334 /* Set the operating mode */
mbed_official 157:90e3acc479a2 3335 HRTIMx->HRTIM_TIMERx[TimerIdx].TIMxCR &= (uint32_t) ~(HRTIM_TIMCR_CONT | HRTIM_TIMCR_RETRIG);
mbed_official 157:90e3acc479a2 3336 HRTIMx->HRTIM_TIMERx[TimerIdx].TIMxCR |= (uint32_t)HRTIM_BaseInitStruct->Mode;
mbed_official 157:90e3acc479a2 3337
mbed_official 157:90e3acc479a2 3338 /* Update the HRTIMx registers */
mbed_official 157:90e3acc479a2 3339 HRTIMx->HRTIM_TIMERx[TimerIdx].PERxR = HRTIM_BaseInitStruct->Period;
mbed_official 157:90e3acc479a2 3340 HRTIMx->HRTIM_TIMERx[TimerIdx].REPxR = HRTIM_BaseInitStruct->RepetitionCounter;
mbed_official 157:90e3acc479a2 3341 }
mbed_official 157:90e3acc479a2 3342
mbed_official 157:90e3acc479a2 3343 /**
mbed_official 157:90e3acc479a2 3344 * @brief Configures the master timer in waveform mode
mbed_official 157:90e3acc479a2 3345 * @param HRTIMx: pointer to HRTIMx peripheral
mbed_official 157:90e3acc479a2 3346 * @param TimerIdx: Timer index
mbed_official 157:90e3acc479a2 3347 * @param pTimerInit: pointer to the timer initialization data structure
mbed_official 157:90e3acc479a2 3348 * @retval None
mbed_official 157:90e3acc479a2 3349 */
mbed_official 157:90e3acc479a2 3350 void HRTIM_MasterWaveform_Config(HRTIM_TypeDef * HRTIMx,
mbed_official 157:90e3acc479a2 3351 HRTIM_TimerInitTypeDef * pTimerInit)
mbed_official 157:90e3acc479a2 3352 {
mbed_official 157:90e3acc479a2 3353 uint32_t HRTIM_mcr;
mbed_official 157:90e3acc479a2 3354 uint32_t HRTIM_bmcr;
mbed_official 157:90e3acc479a2 3355
mbed_official 157:90e3acc479a2 3356 /* Configure master timer */
mbed_official 157:90e3acc479a2 3357 HRTIM_mcr = HRTIMx->HRTIM_MASTER.MCR;
mbed_official 157:90e3acc479a2 3358 HRTIM_bmcr = HRTIMx->HRTIM_COMMON.BMCR;
mbed_official 157:90e3acc479a2 3359
mbed_official 157:90e3acc479a2 3360 /* Enable/Disable the half mode */
mbed_official 157:90e3acc479a2 3361 HRTIM_mcr &= ~(HRTIM_MCR_HALF);
mbed_official 157:90e3acc479a2 3362 HRTIM_mcr |= pTimerInit->HalfModeEnable;
mbed_official 157:90e3acc479a2 3363
mbed_official 157:90e3acc479a2 3364 /* Enable/Disable the timer start upon synchronization event reception */
mbed_official 157:90e3acc479a2 3365 HRTIM_mcr &= ~(HRTIM_MCR_SYNCSTRTM);
mbed_official 157:90e3acc479a2 3366 HRTIM_mcr |= pTimerInit->StartOnSync;
mbed_official 157:90e3acc479a2 3367
mbed_official 157:90e3acc479a2 3368 /* Enable/Disable the timer reset upon synchronization event reception */
mbed_official 157:90e3acc479a2 3369 HRTIM_mcr &= ~(HRTIM_MCR_SYNCRSTM);
mbed_official 157:90e3acc479a2 3370 HRTIM_mcr |= pTimerInit->ResetOnSync;
mbed_official 157:90e3acc479a2 3371
mbed_official 157:90e3acc479a2 3372 /* Enable/Disable the DAC synchronization event generation */
mbed_official 157:90e3acc479a2 3373 HRTIM_mcr &= ~(HRTIM_MCR_DACSYNC);
mbed_official 157:90e3acc479a2 3374 HRTIM_mcr |= pTimerInit->DACSynchro;
mbed_official 157:90e3acc479a2 3375
mbed_official 157:90e3acc479a2 3376 /* Enable/Disable preload mechanism for timer registers */
mbed_official 157:90e3acc479a2 3377 HRTIM_mcr &= ~(HRTIM_MCR_PREEN);
mbed_official 157:90e3acc479a2 3378 HRTIM_mcr |= pTimerInit->PreloadEnable;
mbed_official 157:90e3acc479a2 3379
mbed_official 157:90e3acc479a2 3380 /* Master timer registers update handling */
mbed_official 157:90e3acc479a2 3381 HRTIM_mcr &= ~(HRTIM_MCR_BRSTDMA);
mbed_official 157:90e3acc479a2 3382 HRTIM_mcr |= (pTimerInit->UpdateGating << 2);
mbed_official 157:90e3acc479a2 3383
mbed_official 157:90e3acc479a2 3384 /* Enable/Disable registers update on repetition */
mbed_official 157:90e3acc479a2 3385 HRTIM_mcr &= ~(HRTIM_MCR_MREPU);
mbed_official 157:90e3acc479a2 3386 HRTIM_mcr |= pTimerInit->RepetitionUpdate;
mbed_official 157:90e3acc479a2 3387
mbed_official 157:90e3acc479a2 3388 /* Set the timer burst mode */
mbed_official 157:90e3acc479a2 3389 HRTIM_bmcr &= ~(HRTIM_BMCR_MTBM);
mbed_official 157:90e3acc479a2 3390 HRTIM_bmcr |= pTimerInit->BurstMode;
mbed_official 157:90e3acc479a2 3391
mbed_official 157:90e3acc479a2 3392 /* Update the HRTIMx registers */
mbed_official 157:90e3acc479a2 3393 HRTIMx->HRTIM_MASTER.MCR = HRTIM_mcr;
mbed_official 157:90e3acc479a2 3394 HRTIMx->HRTIM_COMMON.BMCR = HRTIM_bmcr;
mbed_official 157:90e3acc479a2 3395
mbed_official 157:90e3acc479a2 3396 }
mbed_official 157:90e3acc479a2 3397
mbed_official 157:90e3acc479a2 3398 /**
mbed_official 157:90e3acc479a2 3399 * @brief Configures timing unit (timer A to timer E) in waveform mode
mbed_official 157:90e3acc479a2 3400 * @param HRTIMx: pointer to HRTIMx peripheral
mbed_official 157:90e3acc479a2 3401 * @param TimerIdx: Timer index
mbed_official 157:90e3acc479a2 3402 * @param pTimerInit: pointer to the timer initialization data structure
mbed_official 157:90e3acc479a2 3403 * @retval None
mbed_official 157:90e3acc479a2 3404 */
mbed_official 157:90e3acc479a2 3405 void HRTIM_TimingUnitWaveform_Config(HRTIM_TypeDef * HRTIMx,
mbed_official 157:90e3acc479a2 3406 uint32_t TimerIdx,
mbed_official 157:90e3acc479a2 3407 HRTIM_TimerInitTypeDef * pTimerInit)
mbed_official 157:90e3acc479a2 3408 {
mbed_official 157:90e3acc479a2 3409 uint32_t HRTIM_timcr;
mbed_official 157:90e3acc479a2 3410 uint32_t HRTIM_bmcr;
mbed_official 157:90e3acc479a2 3411
mbed_official 157:90e3acc479a2 3412 /* Configure timing unit */
mbed_official 157:90e3acc479a2 3413 HRTIM_timcr = HRTIMx->HRTIM_TIMERx[TimerIdx].TIMxCR;
mbed_official 157:90e3acc479a2 3414 HRTIM_bmcr = HRTIMx->HRTIM_COMMON.BMCR;
mbed_official 157:90e3acc479a2 3415
mbed_official 157:90e3acc479a2 3416 /* Enable/Disable the half mode */
mbed_official 157:90e3acc479a2 3417 HRTIM_timcr &= ~(HRTIM_TIMCR_HALF);
mbed_official 157:90e3acc479a2 3418 HRTIM_timcr |= pTimerInit->HalfModeEnable;
mbed_official 157:90e3acc479a2 3419
mbed_official 157:90e3acc479a2 3420 /* Enable/Disable the timer start upon synchronization event reception */
mbed_official 157:90e3acc479a2 3421 HRTIM_timcr &= ~(HRTIM_TIMCR_SYNCSTRT);
mbed_official 157:90e3acc479a2 3422 HRTIM_timcr |= pTimerInit->StartOnSync;
mbed_official 157:90e3acc479a2 3423
mbed_official 157:90e3acc479a2 3424 /* Enable/Disable the timer reset upon synchronization event reception */
mbed_official 157:90e3acc479a2 3425 HRTIM_timcr &= ~(HRTIM_TIMCR_SYNCRST);
mbed_official 157:90e3acc479a2 3426 HRTIM_timcr |= pTimerInit->ResetOnSync;
mbed_official 157:90e3acc479a2 3427
mbed_official 157:90e3acc479a2 3428 /* Enable/Disable the DAC synchronization event generation */
mbed_official 157:90e3acc479a2 3429 HRTIM_timcr &= ~(HRTIM_TIMCR_DACSYNC);
mbed_official 157:90e3acc479a2 3430 HRTIM_timcr |= pTimerInit->DACSynchro;
mbed_official 157:90e3acc479a2 3431
mbed_official 157:90e3acc479a2 3432 /* Enable/Disable preload mechanism for timer registers */
mbed_official 157:90e3acc479a2 3433 HRTIM_timcr &= ~(HRTIM_TIMCR_PREEN);
mbed_official 157:90e3acc479a2 3434 HRTIM_timcr |= pTimerInit->PreloadEnable;
mbed_official 157:90e3acc479a2 3435
mbed_official 157:90e3acc479a2 3436 /* Timing unit registers update handling */
mbed_official 157:90e3acc479a2 3437 HRTIM_timcr &= ~(HRTIM_TIMCR_UPDGAT);
mbed_official 157:90e3acc479a2 3438 HRTIM_timcr |= pTimerInit->UpdateGating;
mbed_official 157:90e3acc479a2 3439
mbed_official 157:90e3acc479a2 3440 /* Enable/Disable registers update on repetition */
mbed_official 157:90e3acc479a2 3441 HRTIM_timcr &= ~(HRTIM_TIMCR_TREPU);
mbed_official 157:90e3acc479a2 3442 if (pTimerInit->RepetitionUpdate == HRTIM_UPDATEONREPETITION_ENABLED)
mbed_official 157:90e3acc479a2 3443 {
mbed_official 157:90e3acc479a2 3444 HRTIM_timcr |= HRTIM_TIMCR_TREPU;
mbed_official 157:90e3acc479a2 3445 }
mbed_official 157:90e3acc479a2 3446
mbed_official 157:90e3acc479a2 3447 /* Set the timer burst mode */
mbed_official 157:90e3acc479a2 3448 switch (TimerIdx)
mbed_official 157:90e3acc479a2 3449 {
mbed_official 157:90e3acc479a2 3450 case HRTIM_TIMERINDEX_TIMER_A:
mbed_official 157:90e3acc479a2 3451 {
mbed_official 157:90e3acc479a2 3452 HRTIM_bmcr &= ~(HRTIM_BMCR_TABM);
mbed_official 157:90e3acc479a2 3453 HRTIM_bmcr |= ( pTimerInit->BurstMode << 1);
mbed_official 157:90e3acc479a2 3454 }
mbed_official 157:90e3acc479a2 3455 break;
mbed_official 157:90e3acc479a2 3456 case HRTIM_TIMERINDEX_TIMER_B:
mbed_official 157:90e3acc479a2 3457 {
mbed_official 157:90e3acc479a2 3458 HRTIM_bmcr &= ~(HRTIM_BMCR_TBBM);
mbed_official 157:90e3acc479a2 3459 HRTIM_bmcr |= ( pTimerInit->BurstMode << 2);
mbed_official 157:90e3acc479a2 3460 }
mbed_official 157:90e3acc479a2 3461 break;
mbed_official 157:90e3acc479a2 3462 case HRTIM_TIMERINDEX_TIMER_C:
mbed_official 157:90e3acc479a2 3463 {
mbed_official 157:90e3acc479a2 3464 HRTIM_bmcr &= ~(HRTIM_BMCR_TCBM);
mbed_official 157:90e3acc479a2 3465 HRTIM_bmcr |= ( pTimerInit->BurstMode << 3);
mbed_official 157:90e3acc479a2 3466 }
mbed_official 157:90e3acc479a2 3467 break;
mbed_official 157:90e3acc479a2 3468 case HRTIM_TIMERINDEX_TIMER_D:
mbed_official 157:90e3acc479a2 3469 {
mbed_official 157:90e3acc479a2 3470 HRTIM_bmcr &= ~(HRTIM_BMCR_TDBM);
mbed_official 157:90e3acc479a2 3471 HRTIM_bmcr |= ( pTimerInit->BurstMode << 4);
mbed_official 157:90e3acc479a2 3472 }
mbed_official 157:90e3acc479a2 3473 break;
mbed_official 157:90e3acc479a2 3474 case HRTIM_TIMERINDEX_TIMER_E:
mbed_official 157:90e3acc479a2 3475 {
mbed_official 157:90e3acc479a2 3476 HRTIM_bmcr &= ~(HRTIM_BMCR_TEBM);
mbed_official 157:90e3acc479a2 3477 HRTIM_bmcr |= ( pTimerInit->BurstMode << 5);
mbed_official 157:90e3acc479a2 3478 }
mbed_official 157:90e3acc479a2 3479 break;
mbed_official 157:90e3acc479a2 3480 default:
mbed_official 157:90e3acc479a2 3481 break;
mbed_official 157:90e3acc479a2 3482 }
mbed_official 157:90e3acc479a2 3483
mbed_official 157:90e3acc479a2 3484 /* Update the HRTIMx registers */
mbed_official 157:90e3acc479a2 3485 HRTIMx->HRTIM_TIMERx[TimerIdx].TIMxCR = HRTIM_timcr;
mbed_official 157:90e3acc479a2 3486 HRTIMx->HRTIM_COMMON.BMCR = HRTIM_bmcr;
mbed_official 157:90e3acc479a2 3487 }
mbed_official 157:90e3acc479a2 3488
mbed_official 157:90e3acc479a2 3489 /**
mbed_official 157:90e3acc479a2 3490 * @brief Configures a compare unit
mbed_official 157:90e3acc479a2 3491 * @param HRTIMx: pointer to HRTIMx peripheral
mbed_official 157:90e3acc479a2 3492 * @param TimerIdx: Timer index
mbed_official 157:90e3acc479a2 3493 * @param CompareUnit: Compare unit identifier
mbed_official 157:90e3acc479a2 3494 * @param pCompareCfg: pointer to the compare unit configuration data structure
mbed_official 157:90e3acc479a2 3495 * @retval None
mbed_official 157:90e3acc479a2 3496 */
mbed_official 157:90e3acc479a2 3497 void HRTIM_CompareUnitConfig(HRTIM_TypeDef * HRTIMx,
mbed_official 157:90e3acc479a2 3498 uint32_t TimerIdx,
mbed_official 157:90e3acc479a2 3499 uint32_t CompareUnit,
mbed_official 157:90e3acc479a2 3500 HRTIM_CompareCfgTypeDef * pCompareCfg)
mbed_official 157:90e3acc479a2 3501 {
mbed_official 157:90e3acc479a2 3502 if (TimerIdx == HRTIM_TIMERINDEX_MASTER)
mbed_official 157:90e3acc479a2 3503 {
mbed_official 157:90e3acc479a2 3504 /* Configure the compare unit of the master timer */
mbed_official 157:90e3acc479a2 3505 switch (CompareUnit)
mbed_official 157:90e3acc479a2 3506 {
mbed_official 157:90e3acc479a2 3507 case HRTIM_COMPAREUNIT_1:
mbed_official 157:90e3acc479a2 3508 {
mbed_official 157:90e3acc479a2 3509 HRTIMx->HRTIM_MASTER.MCMP1R = pCompareCfg->CompareValue;
mbed_official 157:90e3acc479a2 3510 }
mbed_official 157:90e3acc479a2 3511 break;
mbed_official 157:90e3acc479a2 3512 case HRTIM_COMPAREUNIT_2:
mbed_official 157:90e3acc479a2 3513 {
mbed_official 157:90e3acc479a2 3514 HRTIMx->HRTIM_MASTER.MCMP2R = pCompareCfg->CompareValue;
mbed_official 157:90e3acc479a2 3515 }
mbed_official 157:90e3acc479a2 3516 break;
mbed_official 157:90e3acc479a2 3517 case HRTIM_COMPAREUNIT_3:
mbed_official 157:90e3acc479a2 3518 {
mbed_official 157:90e3acc479a2 3519 HRTIMx->HRTIM_MASTER.MCMP3R = pCompareCfg->CompareValue;
mbed_official 157:90e3acc479a2 3520 }
mbed_official 157:90e3acc479a2 3521 break;
mbed_official 157:90e3acc479a2 3522 case HRTIM_COMPAREUNIT_4:
mbed_official 157:90e3acc479a2 3523 {
mbed_official 157:90e3acc479a2 3524 HRTIMx->HRTIM_MASTER.MCMP4R = pCompareCfg->CompareValue;
mbed_official 157:90e3acc479a2 3525 }
mbed_official 157:90e3acc479a2 3526 break;
mbed_official 157:90e3acc479a2 3527 default:
mbed_official 157:90e3acc479a2 3528 break;
mbed_official 157:90e3acc479a2 3529 }
mbed_official 157:90e3acc479a2 3530 }
mbed_official 157:90e3acc479a2 3531 else
mbed_official 157:90e3acc479a2 3532 {
mbed_official 157:90e3acc479a2 3533 /* Configure the compare unit of the timing unit */
mbed_official 157:90e3acc479a2 3534 switch (CompareUnit)
mbed_official 157:90e3acc479a2 3535 {
mbed_official 157:90e3acc479a2 3536 case HRTIM_COMPAREUNIT_1:
mbed_official 157:90e3acc479a2 3537 {
mbed_official 157:90e3acc479a2 3538 HRTIMx->HRTIM_TIMERx[TimerIdx].CMP1xR = pCompareCfg->CompareValue;
mbed_official 157:90e3acc479a2 3539 }
mbed_official 157:90e3acc479a2 3540 break;
mbed_official 157:90e3acc479a2 3541 case HRTIM_COMPAREUNIT_2:
mbed_official 157:90e3acc479a2 3542 {
mbed_official 157:90e3acc479a2 3543 HRTIMx->HRTIM_TIMERx[TimerIdx].CMP2xR = pCompareCfg->CompareValue;
mbed_official 157:90e3acc479a2 3544 }
mbed_official 157:90e3acc479a2 3545 break;
mbed_official 157:90e3acc479a2 3546 case HRTIM_COMPAREUNIT_3:
mbed_official 157:90e3acc479a2 3547 {
mbed_official 157:90e3acc479a2 3548 HRTIMx->HRTIM_TIMERx[TimerIdx].CMP3xR = pCompareCfg->CompareValue;
mbed_official 157:90e3acc479a2 3549 }
mbed_official 157:90e3acc479a2 3550 break;
mbed_official 157:90e3acc479a2 3551 case HRTIM_COMPAREUNIT_4:
mbed_official 157:90e3acc479a2 3552 {
mbed_official 157:90e3acc479a2 3553 HRTIMx->HRTIM_TIMERx[TimerIdx].CMP4xR = pCompareCfg->CompareValue;
mbed_official 157:90e3acc479a2 3554 }
mbed_official 157:90e3acc479a2 3555 break;
mbed_official 157:90e3acc479a2 3556 default:
mbed_official 157:90e3acc479a2 3557 break;
mbed_official 157:90e3acc479a2 3558 }
mbed_official 157:90e3acc479a2 3559 }
mbed_official 157:90e3acc479a2 3560 }
mbed_official 157:90e3acc479a2 3561
mbed_official 157:90e3acc479a2 3562 /**
mbed_official 157:90e3acc479a2 3563 * @brief Configures a capture unit
mbed_official 157:90e3acc479a2 3564 * @param HRTIMx: pointer to HRTIMx peripheral
mbed_official 157:90e3acc479a2 3565 * @param TimerIdx: Timer index
mbed_official 157:90e3acc479a2 3566 * @param CaptureUnit: Capture unit identifier
mbed_official 157:90e3acc479a2 3567 * @param pCaptureCfg: pointer to the compare unit configuration data structure
mbed_official 157:90e3acc479a2 3568 * @retval None
mbed_official 157:90e3acc479a2 3569 */
mbed_official 157:90e3acc479a2 3570 void HRTIM_CaptureUnitConfig(HRTIM_TypeDef * HRTIMx,
mbed_official 157:90e3acc479a2 3571 uint32_t TimerIdx,
mbed_official 157:90e3acc479a2 3572 uint32_t CaptureUnit,
mbed_official 157:90e3acc479a2 3573 uint32_t Event)
mbed_official 157:90e3acc479a2 3574 {
mbed_official 157:90e3acc479a2 3575 uint32_t CaptureTrigger = HRTIM_CAPTURETRIGGER_EEV_1;
mbed_official 157:90e3acc479a2 3576
mbed_official 157:90e3acc479a2 3577 switch (Event)
mbed_official 157:90e3acc479a2 3578 {
mbed_official 157:90e3acc479a2 3579 case HRTIM_EVENT_1:
mbed_official 157:90e3acc479a2 3580 {
mbed_official 157:90e3acc479a2 3581 CaptureTrigger = HRTIM_CAPTURETRIGGER_EEV_1;
mbed_official 157:90e3acc479a2 3582 }
mbed_official 157:90e3acc479a2 3583 break;
mbed_official 157:90e3acc479a2 3584 case HRTIM_EVENT_2:
mbed_official 157:90e3acc479a2 3585 {
mbed_official 157:90e3acc479a2 3586 CaptureTrigger = HRTIM_CAPTURETRIGGER_EEV_2;
mbed_official 157:90e3acc479a2 3587 }
mbed_official 157:90e3acc479a2 3588 break;
mbed_official 157:90e3acc479a2 3589 case HRTIM_EVENT_3:
mbed_official 157:90e3acc479a2 3590 {
mbed_official 157:90e3acc479a2 3591 CaptureTrigger = HRTIM_CAPTURETRIGGER_EEV_3;
mbed_official 157:90e3acc479a2 3592 }
mbed_official 157:90e3acc479a2 3593 break;
mbed_official 157:90e3acc479a2 3594 case HRTIM_EVENT_4:
mbed_official 157:90e3acc479a2 3595 {
mbed_official 157:90e3acc479a2 3596 CaptureTrigger = HRTIM_CAPTURETRIGGER_EEV_4;
mbed_official 157:90e3acc479a2 3597 }
mbed_official 157:90e3acc479a2 3598 break;
mbed_official 157:90e3acc479a2 3599 case HRTIM_EVENT_5:
mbed_official 157:90e3acc479a2 3600 {
mbed_official 157:90e3acc479a2 3601 CaptureTrigger = HRTIM_CAPTURETRIGGER_EEV_5;
mbed_official 157:90e3acc479a2 3602 }
mbed_official 157:90e3acc479a2 3603 break;
mbed_official 157:90e3acc479a2 3604 case HRTIM_EVENT_6:
mbed_official 157:90e3acc479a2 3605 {
mbed_official 157:90e3acc479a2 3606 CaptureTrigger = HRTIM_CAPTURETRIGGER_EEV_6;
mbed_official 157:90e3acc479a2 3607 }
mbed_official 157:90e3acc479a2 3608 break;
mbed_official 157:90e3acc479a2 3609 case HRTIM_EVENT_7:
mbed_official 157:90e3acc479a2 3610 {
mbed_official 157:90e3acc479a2 3611 CaptureTrigger = HRTIM_CAPTURETRIGGER_EEV_7;
mbed_official 157:90e3acc479a2 3612 }
mbed_official 157:90e3acc479a2 3613 break;
mbed_official 157:90e3acc479a2 3614 case HRTIM_EVENT_8:
mbed_official 157:90e3acc479a2 3615 {
mbed_official 157:90e3acc479a2 3616 CaptureTrigger = HRTIM_CAPTURETRIGGER_EEV_8;
mbed_official 157:90e3acc479a2 3617 }
mbed_official 157:90e3acc479a2 3618 break;
mbed_official 157:90e3acc479a2 3619 case HRTIM_EVENT_9:
mbed_official 157:90e3acc479a2 3620 {
mbed_official 157:90e3acc479a2 3621 CaptureTrigger = HRTIM_CAPTURETRIGGER_EEV_9;
mbed_official 157:90e3acc479a2 3622 }
mbed_official 157:90e3acc479a2 3623 break;
mbed_official 157:90e3acc479a2 3624 case HRTIM_EVENT_10:
mbed_official 157:90e3acc479a2 3625 {
mbed_official 157:90e3acc479a2 3626 CaptureTrigger = HRTIM_CAPTURETRIGGER_EEV_10;
mbed_official 157:90e3acc479a2 3627 }
mbed_official 157:90e3acc479a2 3628 break;
mbed_official 157:90e3acc479a2 3629 default:
mbed_official 157:90e3acc479a2 3630 break;
mbed_official 157:90e3acc479a2 3631
mbed_official 157:90e3acc479a2 3632 }
mbed_official 157:90e3acc479a2 3633 switch (CaptureUnit)
mbed_official 157:90e3acc479a2 3634 {
mbed_official 157:90e3acc479a2 3635 case HRTIM_CAPTUREUNIT_1:
mbed_official 157:90e3acc479a2 3636 {
mbed_official 157:90e3acc479a2 3637 HRTIMx->HRTIM_TIMERx[TimerIdx].CPT1xCR = CaptureTrigger;
mbed_official 157:90e3acc479a2 3638 }
mbed_official 157:90e3acc479a2 3639 break;
mbed_official 157:90e3acc479a2 3640 case HRTIM_CAPTUREUNIT_2:
mbed_official 157:90e3acc479a2 3641 {
mbed_official 157:90e3acc479a2 3642 HRTIMx->HRTIM_TIMERx[TimerIdx].CPT2xCR = CaptureTrigger;
mbed_official 157:90e3acc479a2 3643 }
mbed_official 157:90e3acc479a2 3644 break;
mbed_official 157:90e3acc479a2 3645 default:
mbed_official 157:90e3acc479a2 3646 break;
mbed_official 157:90e3acc479a2 3647 }
mbed_official 157:90e3acc479a2 3648 }
mbed_official 157:90e3acc479a2 3649
mbed_official 157:90e3acc479a2 3650 /**
mbed_official 157:90e3acc479a2 3651 * @brief Configures the output of a timing unit
mbed_official 157:90e3acc479a2 3652 * @param HRTIMx: pointer to HRTIMx peripheral
mbed_official 157:90e3acc479a2 3653 * @param TimerIdx: Timer index
mbed_official 157:90e3acc479a2 3654 * @param Output: timing unit output identifier
mbed_official 157:90e3acc479a2 3655 * @param pOutputCfg: pointer to the output configuration data structure
mbed_official 157:90e3acc479a2 3656 * @retval None
mbed_official 157:90e3acc479a2 3657 */
mbed_official 157:90e3acc479a2 3658 void HRTIM_OutputConfig(HRTIM_TypeDef * HRTIMx,
mbed_official 157:90e3acc479a2 3659 uint32_t TimerIdx,
mbed_official 157:90e3acc479a2 3660 uint32_t Output,
mbed_official 157:90e3acc479a2 3661 HRTIM_OutputCfgTypeDef * pOutputCfg)
mbed_official 157:90e3acc479a2 3662 {
mbed_official 157:90e3acc479a2 3663 uint32_t HRTIM_outr;
mbed_official 157:90e3acc479a2 3664 uint32_t shift = 0;
mbed_official 157:90e3acc479a2 3665
mbed_official 157:90e3acc479a2 3666 HRTIM_outr = HRTIMx->HRTIM_TIMERx[TimerIdx].OUTxR;
mbed_official 157:90e3acc479a2 3667
mbed_official 157:90e3acc479a2 3668 switch (Output)
mbed_official 157:90e3acc479a2 3669 {
mbed_official 157:90e3acc479a2 3670 case HRTIM_OUTPUT_TA1:
mbed_official 157:90e3acc479a2 3671 case HRTIM_OUTPUT_TB1:
mbed_official 157:90e3acc479a2 3672 case HRTIM_OUTPUT_TC1:
mbed_official 157:90e3acc479a2 3673 case HRTIM_OUTPUT_TD1:
mbed_official 157:90e3acc479a2 3674 case HRTIM_OUTPUT_TE1:
mbed_official 157:90e3acc479a2 3675 {
mbed_official 157:90e3acc479a2 3676 /* Set the output set/reset crossbar */
mbed_official 157:90e3acc479a2 3677 HRTIMx->HRTIM_TIMERx[TimerIdx].SETx1R = pOutputCfg->SetSource;
mbed_official 157:90e3acc479a2 3678 HRTIMx->HRTIM_TIMERx[TimerIdx].RSTx1R = pOutputCfg->ResetSource;
mbed_official 157:90e3acc479a2 3679
mbed_official 157:90e3acc479a2 3680 shift = 0;
mbed_official 157:90e3acc479a2 3681 }
mbed_official 157:90e3acc479a2 3682 break;
mbed_official 157:90e3acc479a2 3683 case HRTIM_OUTPUT_TA2:
mbed_official 157:90e3acc479a2 3684 case HRTIM_OUTPUT_TB2:
mbed_official 157:90e3acc479a2 3685 case HRTIM_OUTPUT_TC2:
mbed_official 157:90e3acc479a2 3686 case HRTIM_OUTPUT_TD2:
mbed_official 157:90e3acc479a2 3687 case HRTIM_OUTPUT_TE2:
mbed_official 157:90e3acc479a2 3688 {
mbed_official 157:90e3acc479a2 3689 /* Set the output set/reset crossbar */
mbed_official 157:90e3acc479a2 3690 HRTIMx->HRTIM_TIMERx[TimerIdx].SETx2R = pOutputCfg->SetSource;
mbed_official 157:90e3acc479a2 3691 HRTIMx->HRTIM_TIMERx[TimerIdx].RSTx2R = pOutputCfg->ResetSource;
mbed_official 157:90e3acc479a2 3692
mbed_official 157:90e3acc479a2 3693 shift = 16;
mbed_official 157:90e3acc479a2 3694 }
mbed_official 157:90e3acc479a2 3695 break;
mbed_official 157:90e3acc479a2 3696 default:
mbed_official 157:90e3acc479a2 3697 break;
mbed_official 157:90e3acc479a2 3698 }
mbed_official 157:90e3acc479a2 3699
mbed_official 157:90e3acc479a2 3700 /* Clear output config */
mbed_official 157:90e3acc479a2 3701 HRTIM_outr &= ~((HRTIM_OUTR_POL1 |
mbed_official 157:90e3acc479a2 3702 HRTIM_OUTR_IDLM1 |
mbed_official 157:90e3acc479a2 3703 HRTIM_OUTR_IDLES1|
mbed_official 157:90e3acc479a2 3704 HRTIM_OUTR_FAULT1|
mbed_official 157:90e3acc479a2 3705 HRTIM_OUTR_CHP1 |
mbed_official 157:90e3acc479a2 3706 HRTIM_OUTR_DIDL1) << shift);
mbed_official 157:90e3acc479a2 3707
mbed_official 157:90e3acc479a2 3708 /* Set the polarity */
mbed_official 157:90e3acc479a2 3709 HRTIM_outr |= (pOutputCfg->Polarity << shift);
mbed_official 157:90e3acc479a2 3710
mbed_official 157:90e3acc479a2 3711 /* Set the IDLE mode */
mbed_official 157:90e3acc479a2 3712 HRTIM_outr |= (pOutputCfg->IdleMode << shift);
mbed_official 157:90e3acc479a2 3713
mbed_official 157:90e3acc479a2 3714 /* Set the IDLE state */
mbed_official 157:90e3acc479a2 3715 HRTIM_outr |= (pOutputCfg->IdleState << shift);
mbed_official 157:90e3acc479a2 3716
mbed_official 157:90e3acc479a2 3717 /* Set the FAULT state */
mbed_official 157:90e3acc479a2 3718 HRTIM_outr |= (pOutputCfg->FaultState << shift);
mbed_official 157:90e3acc479a2 3719
mbed_official 157:90e3acc479a2 3720 /* Set the chopper mode */
mbed_official 157:90e3acc479a2 3721 HRTIM_outr |= (pOutputCfg->ChopperModeEnable << shift);
mbed_official 157:90e3acc479a2 3722
mbed_official 157:90e3acc479a2 3723 /* Set the burst mode entry mode */
mbed_official 157:90e3acc479a2 3724 HRTIM_outr |= (pOutputCfg->BurstModeEntryDelayed << shift);
mbed_official 157:90e3acc479a2 3725
mbed_official 157:90e3acc479a2 3726 /* Update HRTIMx register */
mbed_official 157:90e3acc479a2 3727 HRTIMx->HRTIM_TIMERx[TimerIdx].OUTxR = HRTIM_outr;
mbed_official 157:90e3acc479a2 3728 }
mbed_official 157:90e3acc479a2 3729
mbed_official 157:90e3acc479a2 3730 /**
mbed_official 157:90e3acc479a2 3731 * @brief Configures an external event channel
mbed_official 157:90e3acc479a2 3732 * @param HRTIMx: pointer to HRTIMx peripheral
mbed_official 157:90e3acc479a2 3733 * @param Event: Event channel identifier
mbed_official 157:90e3acc479a2 3734 * @param pEventCfg: pointer to the event channel configuration data structure
mbed_official 157:90e3acc479a2 3735 * @retval None
mbed_official 157:90e3acc479a2 3736 */
mbed_official 157:90e3acc479a2 3737 static void HRTIM_ExternalEventConfig(HRTIM_TypeDef * HRTIMx,
mbed_official 157:90e3acc479a2 3738 uint32_t Event,
mbed_official 157:90e3acc479a2 3739 HRTIM_EventCfgTypeDef *pEventCfg)
mbed_official 157:90e3acc479a2 3740 {
mbed_official 157:90e3acc479a2 3741 uint32_t hrtim_eecr1;
mbed_official 157:90e3acc479a2 3742 uint32_t hrtim_eecr2;
mbed_official 157:90e3acc479a2 3743 uint32_t hrtim_eecr3;
mbed_official 157:90e3acc479a2 3744
mbed_official 157:90e3acc479a2 3745 /* Configure external event channel */
mbed_official 157:90e3acc479a2 3746 hrtim_eecr1 = HRTIMx->HRTIM_COMMON.EECR1;
mbed_official 157:90e3acc479a2 3747 hrtim_eecr2 = HRTIMx->HRTIM_COMMON.EECR2;
mbed_official 157:90e3acc479a2 3748 hrtim_eecr3 = HRTIMx->HRTIM_COMMON.EECR3;
mbed_official 157:90e3acc479a2 3749
mbed_official 157:90e3acc479a2 3750 switch (Event)
mbed_official 157:90e3acc479a2 3751 {
mbed_official 157:90e3acc479a2 3752 case HRTIM_EVENT_1:
mbed_official 157:90e3acc479a2 3753 {
mbed_official 157:90e3acc479a2 3754 hrtim_eecr1 &= ~(HRTIM_EECR1_EE1SRC | HRTIM_EECR1_EE1POL | HRTIM_EECR1_EE1SNS | HRTIM_EECR1_EE1FAST);
mbed_official 157:90e3acc479a2 3755 hrtim_eecr1 |= pEventCfg->Source;
mbed_official 157:90e3acc479a2 3756 hrtim_eecr1 |= pEventCfg->Polarity;
mbed_official 157:90e3acc479a2 3757 hrtim_eecr1 |= pEventCfg->Sensitivity;
mbed_official 157:90e3acc479a2 3758 /* Update the HRTIM registers (all bit fields but EE1FAST bit) */
mbed_official 157:90e3acc479a2 3759 HRTIMx->HRTIM_COMMON.EECR1 = hrtim_eecr1;
mbed_official 157:90e3acc479a2 3760 /* Update the HRTIM registers (EE1FAST bit) */
mbed_official 157:90e3acc479a2 3761 hrtim_eecr1 |= pEventCfg->FastMode;
mbed_official 157:90e3acc479a2 3762 HRTIMx->HRTIM_COMMON.EECR1 = hrtim_eecr1;
mbed_official 157:90e3acc479a2 3763 }
mbed_official 157:90e3acc479a2 3764 break;
mbed_official 157:90e3acc479a2 3765 case HRTIM_EVENT_2:
mbed_official 157:90e3acc479a2 3766 {
mbed_official 157:90e3acc479a2 3767 hrtim_eecr1 &= ~(HRTIM_EECR1_EE2SRC | HRTIM_EECR1_EE2POL | HRTIM_EECR1_EE2SNS | HRTIM_EECR1_EE2FAST);
mbed_official 157:90e3acc479a2 3768 hrtim_eecr1 |= (pEventCfg->Source << 6);
mbed_official 157:90e3acc479a2 3769 hrtim_eecr1 |= (pEventCfg->Polarity << 6);
mbed_official 157:90e3acc479a2 3770 hrtim_eecr1 |= (pEventCfg->Sensitivity << 6);
mbed_official 157:90e3acc479a2 3771 /* Update the HRTIM registers (all bit fields but EE2FAST bit) */
mbed_official 157:90e3acc479a2 3772 HRTIMx->HRTIM_COMMON.EECR1 = hrtim_eecr1;
mbed_official 157:90e3acc479a2 3773 /* Update the HRTIM registers (EE2FAST bit) */
mbed_official 157:90e3acc479a2 3774 hrtim_eecr1 |= (pEventCfg->FastMode << 6);
mbed_official 157:90e3acc479a2 3775 HRTIMx->HRTIM_COMMON.EECR1 = hrtim_eecr1;
mbed_official 157:90e3acc479a2 3776 }
mbed_official 157:90e3acc479a2 3777 break;
mbed_official 157:90e3acc479a2 3778 case HRTIM_EVENT_3:
mbed_official 157:90e3acc479a2 3779 {
mbed_official 157:90e3acc479a2 3780 hrtim_eecr1 &= ~(HRTIM_EECR1_EE3SRC | HRTIM_EECR1_EE3POL | HRTIM_EECR1_EE3SNS | HRTIM_EECR1_EE3FAST);
mbed_official 157:90e3acc479a2 3781 hrtim_eecr1 |= (pEventCfg->Source << 12);
mbed_official 157:90e3acc479a2 3782 hrtim_eecr1 |= (pEventCfg->Polarity << 12);
mbed_official 157:90e3acc479a2 3783 hrtim_eecr1 |= (pEventCfg->Sensitivity << 12);
mbed_official 157:90e3acc479a2 3784 /* Update the HRTIM registers (all bit fields but EE3FAST bit) */
mbed_official 157:90e3acc479a2 3785 HRTIMx->HRTIM_COMMON.EECR1 = hrtim_eecr1;
mbed_official 157:90e3acc479a2 3786 /* Update the HRTIM registers (EE3FAST bit) */
mbed_official 157:90e3acc479a2 3787 hrtim_eecr1 |= (pEventCfg->FastMode << 12);
mbed_official 157:90e3acc479a2 3788 HRTIMx->HRTIM_COMMON.EECR1 = hrtim_eecr1;
mbed_official 157:90e3acc479a2 3789 }
mbed_official 157:90e3acc479a2 3790 break;
mbed_official 157:90e3acc479a2 3791 case HRTIM_EVENT_4:
mbed_official 157:90e3acc479a2 3792 {
mbed_official 157:90e3acc479a2 3793 hrtim_eecr1 &= ~(HRTIM_EECR1_EE4SRC | HRTIM_EECR1_EE4POL | HRTIM_EECR1_EE4SNS | HRTIM_EECR1_EE4FAST);
mbed_official 157:90e3acc479a2 3794 hrtim_eecr1 |= (pEventCfg->Source << 18);
mbed_official 157:90e3acc479a2 3795 hrtim_eecr1 |= (pEventCfg->Polarity << 18);
mbed_official 157:90e3acc479a2 3796 hrtim_eecr1 |= (pEventCfg->Sensitivity << 18);
mbed_official 157:90e3acc479a2 3797 /* Update the HRTIM registers (all bit fields but EE4FAST bit) */
mbed_official 157:90e3acc479a2 3798 HRTIMx->HRTIM_COMMON.EECR1 = hrtim_eecr1;
mbed_official 157:90e3acc479a2 3799 /* Update the HRTIM registers (EE4FAST bit) */
mbed_official 157:90e3acc479a2 3800 hrtim_eecr1 |= (pEventCfg->FastMode << 18);
mbed_official 157:90e3acc479a2 3801 HRTIMx->HRTIM_COMMON.EECR1 = hrtim_eecr1;
mbed_official 157:90e3acc479a2 3802 }
mbed_official 157:90e3acc479a2 3803 break;
mbed_official 157:90e3acc479a2 3804 case HRTIM_EVENT_5:
mbed_official 157:90e3acc479a2 3805 {
mbed_official 157:90e3acc479a2 3806 hrtim_eecr1 &= ~(HRTIM_EECR1_EE5SRC | HRTIM_EECR1_EE5POL | HRTIM_EECR1_EE5SNS | HRTIM_EECR1_EE5FAST);
mbed_official 157:90e3acc479a2 3807 hrtim_eecr1 |= (pEventCfg->Source << 24);
mbed_official 157:90e3acc479a2 3808 hrtim_eecr1 |= (pEventCfg->Polarity << 24);
mbed_official 157:90e3acc479a2 3809 hrtim_eecr1 |= (pEventCfg->Sensitivity << 24);
mbed_official 157:90e3acc479a2 3810 /* Update the HRTIM registers (all bit fields but EE5FAST bit) */
mbed_official 157:90e3acc479a2 3811 HRTIMx->HRTIM_COMMON.EECR1 = hrtim_eecr1;
mbed_official 157:90e3acc479a2 3812 /* Update the HRTIM registers (EE5FAST bit) */
mbed_official 157:90e3acc479a2 3813 hrtim_eecr1 |= (pEventCfg->FastMode << 24);
mbed_official 157:90e3acc479a2 3814 HRTIMx->HRTIM_COMMON.EECR1 = hrtim_eecr1;
mbed_official 157:90e3acc479a2 3815 }
mbed_official 157:90e3acc479a2 3816 break;
mbed_official 157:90e3acc479a2 3817 case HRTIM_EVENT_6:
mbed_official 157:90e3acc479a2 3818 {
mbed_official 157:90e3acc479a2 3819 hrtim_eecr2 &= ~(HRTIM_EECR2_EE6SRC | HRTIM_EECR2_EE6POL | HRTIM_EECR2_EE6SNS);
mbed_official 157:90e3acc479a2 3820 hrtim_eecr2 |= pEventCfg->Source;
mbed_official 157:90e3acc479a2 3821 hrtim_eecr2 |= pEventCfg->Polarity;
mbed_official 157:90e3acc479a2 3822 hrtim_eecr2 |= pEventCfg->Sensitivity;
mbed_official 157:90e3acc479a2 3823 hrtim_eecr3 &= ~(HRTIM_EECR3_EE6F);
mbed_official 157:90e3acc479a2 3824 hrtim_eecr3 |= pEventCfg->Filter;
mbed_official 157:90e3acc479a2 3825 /* Update the HRTIM registers */
mbed_official 157:90e3acc479a2 3826 HRTIMx->HRTIM_COMMON.EECR2 = hrtim_eecr2;
mbed_official 157:90e3acc479a2 3827 HRTIMx->HRTIM_COMMON.EECR3 = hrtim_eecr3;
mbed_official 157:90e3acc479a2 3828 }
mbed_official 157:90e3acc479a2 3829 break;
mbed_official 157:90e3acc479a2 3830 case HRTIM_EVENT_7:
mbed_official 157:90e3acc479a2 3831 {
mbed_official 157:90e3acc479a2 3832 hrtim_eecr2 &= ~(HRTIM_EECR2_EE7SRC | HRTIM_EECR2_EE7POL | HRTIM_EECR2_EE7SNS);
mbed_official 157:90e3acc479a2 3833 hrtim_eecr2 |= (pEventCfg->Source << 6);
mbed_official 157:90e3acc479a2 3834 hrtim_eecr2 |= (pEventCfg->Polarity << 6);
mbed_official 157:90e3acc479a2 3835 hrtim_eecr2 |= (pEventCfg->Sensitivity << 6);
mbed_official 157:90e3acc479a2 3836 hrtim_eecr3 &= ~(HRTIM_EECR3_EE7F);
mbed_official 157:90e3acc479a2 3837 hrtim_eecr3 |= (pEventCfg->Filter << 6);
mbed_official 157:90e3acc479a2 3838 /* Update the HRTIM registers */
mbed_official 157:90e3acc479a2 3839 HRTIMx->HRTIM_COMMON.EECR2 = hrtim_eecr2;
mbed_official 157:90e3acc479a2 3840 HRTIMx->HRTIM_COMMON.EECR3 = hrtim_eecr3;
mbed_official 157:90e3acc479a2 3841 }
mbed_official 157:90e3acc479a2 3842 break;
mbed_official 157:90e3acc479a2 3843 case HRTIM_EVENT_8:
mbed_official 157:90e3acc479a2 3844 {
mbed_official 157:90e3acc479a2 3845 hrtim_eecr2 &= ~(HRTIM_EECR2_EE8SRC | HRTIM_EECR2_EE8POL | HRTIM_EECR2_EE8SNS);
mbed_official 157:90e3acc479a2 3846 hrtim_eecr2 |= (pEventCfg->Source << 12);
mbed_official 157:90e3acc479a2 3847 hrtim_eecr2 |= (pEventCfg->Polarity << 12);
mbed_official 157:90e3acc479a2 3848 hrtim_eecr2 |= (pEventCfg->Sensitivity << 12);
mbed_official 157:90e3acc479a2 3849 hrtim_eecr3 &= ~(HRTIM_EECR3_EE8F);
mbed_official 157:90e3acc479a2 3850 hrtim_eecr3 |= (pEventCfg->Filter << 12);
mbed_official 157:90e3acc479a2 3851 /* Update the HRTIM registers */
mbed_official 157:90e3acc479a2 3852 HRTIMx->HRTIM_COMMON.EECR2 = hrtim_eecr2;
mbed_official 157:90e3acc479a2 3853 HRTIMx->HRTIM_COMMON.EECR3 = hrtim_eecr3;
mbed_official 157:90e3acc479a2 3854 }
mbed_official 157:90e3acc479a2 3855 break;
mbed_official 157:90e3acc479a2 3856 case HRTIM_EVENT_9:
mbed_official 157:90e3acc479a2 3857 {
mbed_official 157:90e3acc479a2 3858 hrtim_eecr2 &= ~(HRTIM_EECR2_EE9SRC | HRTIM_EECR2_EE9POL | HRTIM_EECR2_EE9SNS);
mbed_official 157:90e3acc479a2 3859 hrtim_eecr2 |= (pEventCfg->Source << 18);
mbed_official 157:90e3acc479a2 3860 hrtim_eecr2 |= (pEventCfg->Polarity << 18);
mbed_official 157:90e3acc479a2 3861 hrtim_eecr2 |= (pEventCfg->Sensitivity << 18);
mbed_official 157:90e3acc479a2 3862 hrtim_eecr3 &= ~(HRTIM_EECR3_EE9F);
mbed_official 157:90e3acc479a2 3863 hrtim_eecr3 |= (pEventCfg->Filter << 18);
mbed_official 157:90e3acc479a2 3864 /* Update the HRTIM registers */
mbed_official 157:90e3acc479a2 3865 HRTIMx->HRTIM_COMMON.EECR2 = hrtim_eecr2;
mbed_official 157:90e3acc479a2 3866 HRTIMx->HRTIM_COMMON.EECR3 = hrtim_eecr3;
mbed_official 157:90e3acc479a2 3867 }
mbed_official 157:90e3acc479a2 3868 break;
mbed_official 157:90e3acc479a2 3869 case HRTIM_EVENT_10:
mbed_official 157:90e3acc479a2 3870 {
mbed_official 157:90e3acc479a2 3871 hrtim_eecr2 &= ~(HRTIM_EECR2_EE10SRC | HRTIM_EECR2_EE10POL | HRTIM_EECR2_EE10SNS);
mbed_official 157:90e3acc479a2 3872 hrtim_eecr2 |= (pEventCfg->Source << 24);
mbed_official 157:90e3acc479a2 3873 hrtim_eecr2 |= (pEventCfg->Polarity << 24);
mbed_official 157:90e3acc479a2 3874 hrtim_eecr2 |= (pEventCfg->Sensitivity << 24);
mbed_official 157:90e3acc479a2 3875 hrtim_eecr3 &= ~(HRTIM_EECR3_EE10F);
mbed_official 157:90e3acc479a2 3876 hrtim_eecr3 |= (pEventCfg->Filter << 24);
mbed_official 157:90e3acc479a2 3877 /* Update the HRTIM registers */
mbed_official 157:90e3acc479a2 3878 HRTIMx->HRTIM_COMMON.EECR2 = hrtim_eecr2;
mbed_official 157:90e3acc479a2 3879 HRTIMx->HRTIM_COMMON.EECR3 = hrtim_eecr3;
mbed_official 157:90e3acc479a2 3880 }
mbed_official 157:90e3acc479a2 3881 break;
mbed_official 157:90e3acc479a2 3882 default:
mbed_official 157:90e3acc479a2 3883 break;
mbed_official 157:90e3acc479a2 3884 }
mbed_official 157:90e3acc479a2 3885 }
mbed_official 157:90e3acc479a2 3886
mbed_official 157:90e3acc479a2 3887 /**
mbed_official 157:90e3acc479a2 3888 * @brief Configures the timer counter reset
mbed_official 157:90e3acc479a2 3889 * @param HRTIMx: pointer to HRTIMx peripheral
mbed_official 157:90e3acc479a2 3890 * @param TimerIdx: Timer index
mbed_official 157:90e3acc479a2 3891 * @param Event: Event channel identifier
mbed_official 157:90e3acc479a2 3892 * @retval None
mbed_official 157:90e3acc479a2 3893 */
mbed_official 157:90e3acc479a2 3894 void HRTIM_TIM_ResetConfig(HRTIM_TypeDef * HRTIMx,
mbed_official 157:90e3acc479a2 3895 uint32_t TimerIdx,
mbed_official 157:90e3acc479a2 3896 uint32_t Event)
mbed_official 157:90e3acc479a2 3897 {
mbed_official 157:90e3acc479a2 3898 switch (Event)
mbed_official 157:90e3acc479a2 3899 {
mbed_official 157:90e3acc479a2 3900 case HRTIM_EVENT_1:
mbed_official 157:90e3acc479a2 3901 {
mbed_official 157:90e3acc479a2 3902 HRTIMx->HRTIM_TIMERx[TimerIdx].RSTxR = HRTIM_TIMRESETTRIGGER_EEV_1;
mbed_official 157:90e3acc479a2 3903 }
mbed_official 157:90e3acc479a2 3904 break;
mbed_official 157:90e3acc479a2 3905 case HRTIM_EVENT_2:
mbed_official 157:90e3acc479a2 3906 {
mbed_official 157:90e3acc479a2 3907 HRTIMx->HRTIM_TIMERx[TimerIdx].RSTxR = HRTIM_TIMRESETTRIGGER_EEV_2;
mbed_official 157:90e3acc479a2 3908 }
mbed_official 157:90e3acc479a2 3909 break;
mbed_official 157:90e3acc479a2 3910 case HRTIM_EVENT_3:
mbed_official 157:90e3acc479a2 3911 {
mbed_official 157:90e3acc479a2 3912 HRTIMx->HRTIM_TIMERx[TimerIdx].RSTxR = HRTIM_TIMRESETTRIGGER_EEV_3;
mbed_official 157:90e3acc479a2 3913 }
mbed_official 157:90e3acc479a2 3914 break;
mbed_official 157:90e3acc479a2 3915 case HRTIM_EVENT_4:
mbed_official 157:90e3acc479a2 3916 {
mbed_official 157:90e3acc479a2 3917 HRTIMx->HRTIM_TIMERx[TimerIdx].RSTxR = HRTIM_TIMRESETTRIGGER_EEV_4;
mbed_official 157:90e3acc479a2 3918 }
mbed_official 157:90e3acc479a2 3919 break;
mbed_official 157:90e3acc479a2 3920 case HRTIM_EVENT_5:
mbed_official 157:90e3acc479a2 3921 {
mbed_official 157:90e3acc479a2 3922 HRTIMx->HRTIM_TIMERx[TimerIdx].RSTxR = HRTIM_TIMRESETTRIGGER_EEV_5;
mbed_official 157:90e3acc479a2 3923 }
mbed_official 157:90e3acc479a2 3924 break;
mbed_official 157:90e3acc479a2 3925 case HRTIM_EVENT_6:
mbed_official 157:90e3acc479a2 3926 {
mbed_official 157:90e3acc479a2 3927 HRTIMx->HRTIM_TIMERx[TimerIdx].RSTxR = HRTIM_TIMRESETTRIGGER_EEV_6;
mbed_official 157:90e3acc479a2 3928 }
mbed_official 157:90e3acc479a2 3929 break;
mbed_official 157:90e3acc479a2 3930 case HRTIM_EVENT_7:
mbed_official 157:90e3acc479a2 3931 {
mbed_official 157:90e3acc479a2 3932 HRTIMx->HRTIM_TIMERx[TimerIdx].RSTxR = HRTIM_TIMRESETTRIGGER_EEV_7;
mbed_official 157:90e3acc479a2 3933 }
mbed_official 157:90e3acc479a2 3934 break;
mbed_official 157:90e3acc479a2 3935 case HRTIM_EVENT_8:
mbed_official 157:90e3acc479a2 3936 {
mbed_official 157:90e3acc479a2 3937 HRTIMx->HRTIM_TIMERx[TimerIdx].RSTxR = HRTIM_TIMRESETTRIGGER_EEV_8;
mbed_official 157:90e3acc479a2 3938 }
mbed_official 157:90e3acc479a2 3939 break;
mbed_official 157:90e3acc479a2 3940 case HRTIM_EVENT_9:
mbed_official 157:90e3acc479a2 3941 {
mbed_official 157:90e3acc479a2 3942 HRTIMx->HRTIM_TIMERx[TimerIdx].RSTxR = HRTIM_TIMRESETTRIGGER_EEV_9;
mbed_official 157:90e3acc479a2 3943 }
mbed_official 157:90e3acc479a2 3944 break;
mbed_official 157:90e3acc479a2 3945 case HRTIM_EVENT_10:
mbed_official 157:90e3acc479a2 3946 {
mbed_official 157:90e3acc479a2 3947 HRTIMx->HRTIM_TIMERx[TimerIdx].RSTxR = HRTIM_TIMRESETTRIGGER_EEV_10;
mbed_official 157:90e3acc479a2 3948 }
mbed_official 157:90e3acc479a2 3949 break;
mbed_official 157:90e3acc479a2 3950 default:
mbed_official 157:90e3acc479a2 3951 break;
mbed_official 157:90e3acc479a2 3952 }
mbed_official 157:90e3acc479a2 3953 }
mbed_official 157:90e3acc479a2 3954 /**
mbed_official 157:90e3acc479a2 3955 * @}
mbed_official 157:90e3acc479a2 3956 */
mbed_official 157:90e3acc479a2 3957 /**
mbed_official 157:90e3acc479a2 3958 * @}
mbed_official 157:90e3acc479a2 3959 */
mbed_official 157:90e3acc479a2 3960
mbed_official 157:90e3acc479a2 3961 /**
mbed_official 157:90e3acc479a2 3962 * @}
mbed_official 157:90e3acc479a2 3963 */
mbed_official 157:90e3acc479a2 3964
mbed_official 157:90e3acc479a2 3965 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
mbed_official 157:90e3acc479a2 3966
mbed_official 157:90e3acc479a2 3967
mbed_official 157:90e3acc479a2 3968