shao ziyang / mbed-src-kl05

mbed library sources

Dependents:   frdm_kl05z_gpio_test

Fork of mbed-src by mbed official

targets/cmsis/TARGET_STM/TARGET_DISCO_F100RB/stm32f10x_tim.h@323:9e901b0a5aa1, 2014-09-13 (annotated)

Committer:
shaoziyang
Date:
Sat Sep 13 14:25:46 2014 +0000
Revision:
323:9e901b0a5aa1
Parent:
126:549ba18ddd81 
test with CLOCK_SETUP = 0

Who changed what in which revision?

UserRevisionLine numberNew contents of line
mbed_official 126:549ba18ddd81 1 /**
mbed_official 126:549ba18ddd81 2 ******************************************************************************
mbed_official 126:549ba18ddd81 3 * @file stm32f10x_tim.h
mbed_official 126:549ba18ddd81 4 * @author MCD Application Team
mbed_official 126:549ba18ddd81 5 * @version V3.6.1
mbed_official 126:549ba18ddd81 6 * @date 05-March-2012
mbed_official 126:549ba18ddd81 7 * @brief This file contains all the functions prototypes for the TIM firmware
mbed_official 126:549ba18ddd81 8 * library.
mbed_official 126:549ba18ddd81 9 *******************************************************************************
mbed_official 126:549ba18ddd81 10 * Copyright (c) 2014, STMicroelectronics
mbed_official 126:549ba18ddd81 11 * All rights reserved.
mbed_official 126:549ba18ddd81 12 *
mbed_official 126:549ba18ddd81 13 * Redistribution and use in source and binary forms, with or without
mbed_official 126:549ba18ddd81 14 * modification, are permitted provided that the following conditions are met:
mbed_official 126:549ba18ddd81 15 *
mbed_official 126:549ba18ddd81 16 * 1. Redistributions of source code must retain the above copyright notice,
mbed_official 126:549ba18ddd81 17 * this list of conditions and the following disclaimer.
mbed_official 126:549ba18ddd81 18 * 2. Redistributions in binary form must reproduce the above copyright notice,
mbed_official 126:549ba18ddd81 19 * this list of conditions and the following disclaimer in the documentation
mbed_official 126:549ba18ddd81 20 * and/or other materials provided with the distribution.
mbed_official 126:549ba18ddd81 21 * 3. Neither the name of STMicroelectronics nor the names of its contributors
mbed_official 126:549ba18ddd81 22 * may be used to endorse or promote products derived from this software
mbed_official 126:549ba18ddd81 23 * without specific prior written permission.
mbed_official 126:549ba18ddd81 24 *
mbed_official 126:549ba18ddd81 25 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
mbed_official 126:549ba18ddd81 26 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
mbed_official 126:549ba18ddd81 27 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
mbed_official 126:549ba18ddd81 28 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
mbed_official 126:549ba18ddd81 29 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
mbed_official 126:549ba18ddd81 30 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
mbed_official 126:549ba18ddd81 31 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
mbed_official 126:549ba18ddd81 32 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
mbed_official 126:549ba18ddd81 33 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
mbed_official 126:549ba18ddd81 34 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
mbed_official 126:549ba18ddd81 35 *******************************************************************************
mbed_official 126:549ba18ddd81 36 */
mbed_official 126:549ba18ddd81 37
mbed_official 126:549ba18ddd81 38 /* Define to prevent recursive inclusion -------------------------------------*/
mbed_official 126:549ba18ddd81 39 #ifndef __STM32F10x_TIM_H
mbed_official 126:549ba18ddd81 40 #define __STM32F10x_TIM_H
mbed_official 126:549ba18ddd81 41
mbed_official 126:549ba18ddd81 42 #ifdef __cplusplus
mbed_official 126:549ba18ddd81 43 extern "C" {
mbed_official 126:549ba18ddd81 44 #endif
mbed_official 126:549ba18ddd81 45
mbed_official 126:549ba18ddd81 46 /* Includes ------------------------------------------------------------------*/
mbed_official 126:549ba18ddd81 47 #include "stm32f10x.h"
mbed_official 126:549ba18ddd81 48
mbed_official 126:549ba18ddd81 49 /** @addtogroup STM32F10x_StdPeriph_Driver
mbed_official 126:549ba18ddd81 50 * @{
mbed_official 126:549ba18ddd81 51 */
mbed_official 126:549ba18ddd81 52
mbed_official 126:549ba18ddd81 53 /** @addtogroup TIM
mbed_official 126:549ba18ddd81 54 * @{
mbed_official 126:549ba18ddd81 55 */
mbed_official 126:549ba18ddd81 56
mbed_official 126:549ba18ddd81 57 /** @defgroup TIM_Exported_Types
mbed_official 126:549ba18ddd81 58 * @{
mbed_official 126:549ba18ddd81 59 */
mbed_official 126:549ba18ddd81 60
mbed_official 126:549ba18ddd81 61 /**
mbed_official 126:549ba18ddd81 62 * @brief TIM Time Base Init structure definition
mbed_official 126:549ba18ddd81 63 * @note This structure is used with all TIMx except for TIM6 and TIM7.
mbed_official 126:549ba18ddd81 64 */
mbed_official 126:549ba18ddd81 65
mbed_official 126:549ba18ddd81 66 typedef struct
mbed_official 126:549ba18ddd81 67 {
mbed_official 126:549ba18ddd81 68 uint16_t TIM_Prescaler; /*!< Specifies the prescaler value used to divide the TIM clock.
mbed_official 126:549ba18ddd81 69 This parameter can be a number between 0x0000 and 0xFFFF */
mbed_official 126:549ba18ddd81 70
mbed_official 126:549ba18ddd81 71 uint16_t TIM_CounterMode; /*!< Specifies the counter mode.
mbed_official 126:549ba18ddd81 72 This parameter can be a value of @ref TIM_Counter_Mode */
mbed_official 126:549ba18ddd81 73
mbed_official 126:549ba18ddd81 74 uint16_t TIM_Period; /*!< Specifies the period value to be loaded into the active
mbed_official 126:549ba18ddd81 75 Auto-Reload Register at the next update event.
mbed_official 126:549ba18ddd81 76 This parameter must be a number between 0x0000 and 0xFFFF. */
mbed_official 126:549ba18ddd81 77
mbed_official 126:549ba18ddd81 78 uint16_t TIM_ClockDivision; /*!< Specifies the clock division.
mbed_official 126:549ba18ddd81 79 This parameter can be a value of @ref TIM_Clock_Division_CKD */
mbed_official 126:549ba18ddd81 80
mbed_official 126:549ba18ddd81 81 uint8_t TIM_RepetitionCounter; /*!< Specifies the repetition counter value. Each time the RCR downcounter
mbed_official 126:549ba18ddd81 82 reaches zero, an update event is generated and counting restarts
mbed_official 126:549ba18ddd81 83 from the RCR value (N).
mbed_official 126:549ba18ddd81 84 This means in PWM mode that (N+1) corresponds to:
mbed_official 126:549ba18ddd81 85 - the number of PWM periods in edge-aligned mode
mbed_official 126:549ba18ddd81 86 - the number of half PWM period in center-aligned mode
mbed_official 126:549ba18ddd81 87 This parameter must be a number between 0x00 and 0xFF.
mbed_official 126:549ba18ddd81 88 @note This parameter is valid only for TIM1 and TIM8. */
mbed_official 126:549ba18ddd81 89 } TIM_TimeBaseInitTypeDef;
mbed_official 126:549ba18ddd81 90
mbed_official 126:549ba18ddd81 91 /**
mbed_official 126:549ba18ddd81 92 * @brief TIM Output Compare Init structure definition
mbed_official 126:549ba18ddd81 93 */
mbed_official 126:549ba18ddd81 94
mbed_official 126:549ba18ddd81 95 typedef struct
mbed_official 126:549ba18ddd81 96 {
mbed_official 126:549ba18ddd81 97 uint16_t TIM_OCMode; /*!< Specifies the TIM mode.
mbed_official 126:549ba18ddd81 98 This parameter can be a value of @ref TIM_Output_Compare_and_PWM_modes */
mbed_official 126:549ba18ddd81 99
mbed_official 126:549ba18ddd81 100 uint16_t TIM_OutputState; /*!< Specifies the TIM Output Compare state.
mbed_official 126:549ba18ddd81 101 This parameter can be a value of @ref TIM_Output_Compare_state */
mbed_official 126:549ba18ddd81 102
mbed_official 126:549ba18ddd81 103 uint16_t TIM_OutputNState; /*!< Specifies the TIM complementary Output Compare state.
mbed_official 126:549ba18ddd81 104 This parameter can be a value of @ref TIM_Output_Compare_N_state
mbed_official 126:549ba18ddd81 105 @note This parameter is valid only for TIM1 and TIM8. */
mbed_official 126:549ba18ddd81 106
mbed_official 126:549ba18ddd81 107 uint16_t TIM_Pulse; /*!< Specifies the pulse value to be loaded into the Capture Compare Register.
mbed_official 126:549ba18ddd81 108 This parameter can be a number between 0x0000 and 0xFFFF */
mbed_official 126:549ba18ddd81 109
mbed_official 126:549ba18ddd81 110 uint16_t TIM_OCPolarity; /*!< Specifies the output polarity.
mbed_official 126:549ba18ddd81 111 This parameter can be a value of @ref TIM_Output_Compare_Polarity */
mbed_official 126:549ba18ddd81 112
mbed_official 126:549ba18ddd81 113 uint16_t TIM_OCNPolarity; /*!< Specifies the complementary output polarity.
mbed_official 126:549ba18ddd81 114 This parameter can be a value of @ref TIM_Output_Compare_N_Polarity
mbed_official 126:549ba18ddd81 115 @note This parameter is valid only for TIM1 and TIM8. */
mbed_official 126:549ba18ddd81 116
mbed_official 126:549ba18ddd81 117 uint16_t TIM_OCIdleState; /*!< Specifies the TIM Output Compare pin state during Idle state.
mbed_official 126:549ba18ddd81 118 This parameter can be a value of @ref TIM_Output_Compare_Idle_State
mbed_official 126:549ba18ddd81 119 @note This parameter is valid only for TIM1 and TIM8. */
mbed_official 126:549ba18ddd81 120
mbed_official 126:549ba18ddd81 121 uint16_t TIM_OCNIdleState; /*!< Specifies the TIM Output Compare pin state during Idle state.
mbed_official 126:549ba18ddd81 122 This parameter can be a value of @ref TIM_Output_Compare_N_Idle_State
mbed_official 126:549ba18ddd81 123 @note This parameter is valid only for TIM1 and TIM8. */
mbed_official 126:549ba18ddd81 124 } TIM_OCInitTypeDef;
mbed_official 126:549ba18ddd81 125
mbed_official 126:549ba18ddd81 126 /**
mbed_official 126:549ba18ddd81 127 * @brief TIM Input Capture Init structure definition
mbed_official 126:549ba18ddd81 128 */
mbed_official 126:549ba18ddd81 129
mbed_official 126:549ba18ddd81 130 typedef struct
mbed_official 126:549ba18ddd81 131 {
mbed_official 126:549ba18ddd81 132
mbed_official 126:549ba18ddd81 133 uint16_t TIM_Channel; /*!< Specifies the TIM channel.
mbed_official 126:549ba18ddd81 134 This parameter can be a value of @ref TIM_Channel */
mbed_official 126:549ba18ddd81 135
mbed_official 126:549ba18ddd81 136 uint16_t TIM_ICPolarity; /*!< Specifies the active edge of the input signal.
mbed_official 126:549ba18ddd81 137 This parameter can be a value of @ref TIM_Input_Capture_Polarity */
mbed_official 126:549ba18ddd81 138
mbed_official 126:549ba18ddd81 139 uint16_t TIM_ICSelection; /*!< Specifies the input.
mbed_official 126:549ba18ddd81 140 This parameter can be a value of @ref TIM_Input_Capture_Selection */
mbed_official 126:549ba18ddd81 141
mbed_official 126:549ba18ddd81 142 uint16_t TIM_ICPrescaler; /*!< Specifies the Input Capture Prescaler.
mbed_official 126:549ba18ddd81 143 This parameter can be a value of @ref TIM_Input_Capture_Prescaler */
mbed_official 126:549ba18ddd81 144
mbed_official 126:549ba18ddd81 145 uint16_t TIM_ICFilter; /*!< Specifies the input capture filter.
mbed_official 126:549ba18ddd81 146 This parameter can be a number between 0x0 and 0xF */
mbed_official 126:549ba18ddd81 147 } TIM_ICInitTypeDef;
mbed_official 126:549ba18ddd81 148
mbed_official 126:549ba18ddd81 149 /**
mbed_official 126:549ba18ddd81 150 * @brief BDTR structure definition
mbed_official 126:549ba18ddd81 151 * @note This structure is used only with TIM1 and TIM8.
mbed_official 126:549ba18ddd81 152 */
mbed_official 126:549ba18ddd81 153
mbed_official 126:549ba18ddd81 154 typedef struct
mbed_official 126:549ba18ddd81 155 {
mbed_official 126:549ba18ddd81 156
mbed_official 126:549ba18ddd81 157 uint16_t TIM_OSSRState; /*!< Specifies the Off-State selection used in Run mode.
mbed_official 126:549ba18ddd81 158 This parameter can be a value of @ref OSSR_Off_State_Selection_for_Run_mode_state */
mbed_official 126:549ba18ddd81 159
mbed_official 126:549ba18ddd81 160 uint16_t TIM_OSSIState; /*!< Specifies the Off-State used in Idle state.
mbed_official 126:549ba18ddd81 161 This parameter can be a value of @ref OSSI_Off_State_Selection_for_Idle_mode_state */
mbed_official 126:549ba18ddd81 162
mbed_official 126:549ba18ddd81 163 uint16_t TIM_LOCKLevel; /*!< Specifies the LOCK level parameters.
mbed_official 126:549ba18ddd81 164 This parameter can be a value of @ref Lock_level */
mbed_official 126:549ba18ddd81 165
mbed_official 126:549ba18ddd81 166 uint16_t TIM_DeadTime; /*!< Specifies the delay time between the switching-off and the
mbed_official 126:549ba18ddd81 167 switching-on of the outputs.
mbed_official 126:549ba18ddd81 168 This parameter can be a number between 0x00 and 0xFF */
mbed_official 126:549ba18ddd81 169
mbed_official 126:549ba18ddd81 170 uint16_t TIM_Break; /*!< Specifies whether the TIM Break input is enabled or not.
mbed_official 126:549ba18ddd81 171 This parameter can be a value of @ref Break_Input_enable_disable */
mbed_official 126:549ba18ddd81 172
mbed_official 126:549ba18ddd81 173 uint16_t TIM_BreakPolarity; /*!< Specifies the TIM Break Input pin polarity.
mbed_official 126:549ba18ddd81 174 This parameter can be a value of @ref Break_Polarity */
mbed_official 126:549ba18ddd81 175
mbed_official 126:549ba18ddd81 176 uint16_t TIM_AutomaticOutput; /*!< Specifies whether the TIM Automatic Output feature is enabled or not.
mbed_official 126:549ba18ddd81 177 This parameter can be a value of @ref TIM_AOE_Bit_Set_Reset */
mbed_official 126:549ba18ddd81 178 } TIM_BDTRInitTypeDef;
mbed_official 126:549ba18ddd81 179
mbed_official 126:549ba18ddd81 180 /** @defgroup TIM_Exported_constants
mbed_official 126:549ba18ddd81 181 * @{
mbed_official 126:549ba18ddd81 182 */
mbed_official 126:549ba18ddd81 183
mbed_official 126:549ba18ddd81 184 #define IS_TIM_ALL_PERIPH(PERIPH) (((PERIPH) == TIM1) || \
mbed_official 126:549ba18ddd81 185 ((PERIPH) == TIM2) || \
mbed_official 126:549ba18ddd81 186 ((PERIPH) == TIM3) || \
mbed_official 126:549ba18ddd81 187 ((PERIPH) == TIM4) || \
mbed_official 126:549ba18ddd81 188 ((PERIPH) == TIM5) || \
mbed_official 126:549ba18ddd81 189 ((PERIPH) == TIM6) || \
mbed_official 126:549ba18ddd81 190 ((PERIPH) == TIM7) || \
mbed_official 126:549ba18ddd81 191 ((PERIPH) == TIM8) || \
mbed_official 126:549ba18ddd81 192 ((PERIPH) == TIM9) || \
mbed_official 126:549ba18ddd81 193 ((PERIPH) == TIM10)|| \
mbed_official 126:549ba18ddd81 194 ((PERIPH) == TIM11)|| \
mbed_official 126:549ba18ddd81 195 ((PERIPH) == TIM12)|| \
mbed_official 126:549ba18ddd81 196 ((PERIPH) == TIM13)|| \
mbed_official 126:549ba18ddd81 197 ((PERIPH) == TIM14)|| \
mbed_official 126:549ba18ddd81 198 ((PERIPH) == TIM15)|| \
mbed_official 126:549ba18ddd81 199 ((PERIPH) == TIM16)|| \
mbed_official 126:549ba18ddd81 200 ((PERIPH) == TIM17))
mbed_official 126:549ba18ddd81 201
mbed_official 126:549ba18ddd81 202 /* LIST1: TIM 1 and 8 */
mbed_official 126:549ba18ddd81 203 #define IS_TIM_LIST1_PERIPH(PERIPH) (((PERIPH) == TIM1) || \
mbed_official 126:549ba18ddd81 204 ((PERIPH) == TIM8))
mbed_official 126:549ba18ddd81 205
mbed_official 126:549ba18ddd81 206 /* LIST2: TIM 1, 8, 15 16 and 17 */
mbed_official 126:549ba18ddd81 207 #define IS_TIM_LIST2_PERIPH(PERIPH) (((PERIPH) == TIM1) || \
mbed_official 126:549ba18ddd81 208 ((PERIPH) == TIM8) || \
mbed_official 126:549ba18ddd81 209 ((PERIPH) == TIM15)|| \
mbed_official 126:549ba18ddd81 210 ((PERIPH) == TIM16)|| \
mbed_official 126:549ba18ddd81 211 ((PERIPH) == TIM17))
mbed_official 126:549ba18ddd81 212
mbed_official 126:549ba18ddd81 213 /* LIST3: TIM 1, 2, 3, 4, 5 and 8 */
mbed_official 126:549ba18ddd81 214 #define IS_TIM_LIST3_PERIPH(PERIPH) (((PERIPH) == TIM1) || \
mbed_official 126:549ba18ddd81 215 ((PERIPH) == TIM2) || \
mbed_official 126:549ba18ddd81 216 ((PERIPH) == TIM3) || \
mbed_official 126:549ba18ddd81 217 ((PERIPH) == TIM4) || \
mbed_official 126:549ba18ddd81 218 ((PERIPH) == TIM5) || \
mbed_official 126:549ba18ddd81 219 ((PERIPH) == TIM8))
mbed_official 126:549ba18ddd81 220
mbed_official 126:549ba18ddd81 221 /* LIST4: TIM 1, 2, 3, 4, 5, 8, 15, 16 and 17 */
mbed_official 126:549ba18ddd81 222 #define IS_TIM_LIST4_PERIPH(PERIPH) (((PERIPH) == TIM1) || \
mbed_official 126:549ba18ddd81 223 ((PERIPH) == TIM2) || \
mbed_official 126:549ba18ddd81 224 ((PERIPH) == TIM3) || \
mbed_official 126:549ba18ddd81 225 ((PERIPH) == TIM4) || \
mbed_official 126:549ba18ddd81 226 ((PERIPH) == TIM5) || \
mbed_official 126:549ba18ddd81 227 ((PERIPH) == TIM8) || \
mbed_official 126:549ba18ddd81 228 ((PERIPH) == TIM15)|| \
mbed_official 126:549ba18ddd81 229 ((PERIPH) == TIM16)|| \
mbed_official 126:549ba18ddd81 230 ((PERIPH) == TIM17))
mbed_official 126:549ba18ddd81 231
mbed_official 126:549ba18ddd81 232 /* LIST5: TIM 1, 2, 3, 4, 5, 8 and 15 */
mbed_official 126:549ba18ddd81 233 #define IS_TIM_LIST5_PERIPH(PERIPH) (((PERIPH) == TIM1) || \
mbed_official 126:549ba18ddd81 234 ((PERIPH) == TIM2) || \
mbed_official 126:549ba18ddd81 235 ((PERIPH) == TIM3) || \
mbed_official 126:549ba18ddd81 236 ((PERIPH) == TIM4) || \
mbed_official 126:549ba18ddd81 237 ((PERIPH) == TIM5) || \
mbed_official 126:549ba18ddd81 238 ((PERIPH) == TIM8) || \
mbed_official 126:549ba18ddd81 239 ((PERIPH) == TIM15))
mbed_official 126:549ba18ddd81 240
mbed_official 126:549ba18ddd81 241 /* LIST6: TIM 1, 2, 3, 4, 5, 8, 9, 12 and 15 */
mbed_official 126:549ba18ddd81 242 #define IS_TIM_LIST6_PERIPH(PERIPH) (((PERIPH) == TIM1) || \
mbed_official 126:549ba18ddd81 243 ((PERIPH) == TIM2) || \
mbed_official 126:549ba18ddd81 244 ((PERIPH) == TIM3) || \
mbed_official 126:549ba18ddd81 245 ((PERIPH) == TIM4) || \
mbed_official 126:549ba18ddd81 246 ((PERIPH) == TIM5) || \
mbed_official 126:549ba18ddd81 247 ((PERIPH) == TIM8) || \
mbed_official 126:549ba18ddd81 248 ((PERIPH) == TIM9) || \
mbed_official 126:549ba18ddd81 249 ((PERIPH) == TIM12)|| \
mbed_official 126:549ba18ddd81 250 ((PERIPH) == TIM15))
mbed_official 126:549ba18ddd81 251
mbed_official 126:549ba18ddd81 252 /* LIST7: TIM 1, 2, 3, 4, 5, 6, 7, 8, 9, 12 and 15 */
mbed_official 126:549ba18ddd81 253 #define IS_TIM_LIST7_PERIPH(PERIPH) (((PERIPH) == TIM1) || \
mbed_official 126:549ba18ddd81 254 ((PERIPH) == TIM2) || \
mbed_official 126:549ba18ddd81 255 ((PERIPH) == TIM3) || \
mbed_official 126:549ba18ddd81 256 ((PERIPH) == TIM4) || \
mbed_official 126:549ba18ddd81 257 ((PERIPH) == TIM5) || \
mbed_official 126:549ba18ddd81 258 ((PERIPH) == TIM6) || \
mbed_official 126:549ba18ddd81 259 ((PERIPH) == TIM7) || \
mbed_official 126:549ba18ddd81 260 ((PERIPH) == TIM8) || \
mbed_official 126:549ba18ddd81 261 ((PERIPH) == TIM9) || \
mbed_official 126:549ba18ddd81 262 ((PERIPH) == TIM12)|| \
mbed_official 126:549ba18ddd81 263 ((PERIPH) == TIM15))
mbed_official 126:549ba18ddd81 264
mbed_official 126:549ba18ddd81 265 /* LIST8: TIM 1, 2, 3, 4, 5, 8, 9, 10, 11, 12, 13, 14, 15, 16 and 17 */
mbed_official 126:549ba18ddd81 266 #define IS_TIM_LIST8_PERIPH(PERIPH) (((PERIPH) == TIM1) || \
mbed_official 126:549ba18ddd81 267 ((PERIPH) == TIM2) || \
mbed_official 126:549ba18ddd81 268 ((PERIPH) == TIM3) || \
mbed_official 126:549ba18ddd81 269 ((PERIPH) == TIM4) || \
mbed_official 126:549ba18ddd81 270 ((PERIPH) == TIM5) || \
mbed_official 126:549ba18ddd81 271 ((PERIPH) == TIM8) || \
mbed_official 126:549ba18ddd81 272 ((PERIPH) == TIM9) || \
mbed_official 126:549ba18ddd81 273 ((PERIPH) == TIM10)|| \
mbed_official 126:549ba18ddd81 274 ((PERIPH) == TIM11)|| \
mbed_official 126:549ba18ddd81 275 ((PERIPH) == TIM12)|| \
mbed_official 126:549ba18ddd81 276 ((PERIPH) == TIM13)|| \
mbed_official 126:549ba18ddd81 277 ((PERIPH) == TIM14)|| \
mbed_official 126:549ba18ddd81 278 ((PERIPH) == TIM15)|| \
mbed_official 126:549ba18ddd81 279 ((PERIPH) == TIM16)|| \
mbed_official 126:549ba18ddd81 280 ((PERIPH) == TIM17))
mbed_official 126:549ba18ddd81 281
mbed_official 126:549ba18ddd81 282 /* LIST9: TIM 1, 2, 3, 4, 5, 6, 7, 8, 15, 16, and 17 */
mbed_official 126:549ba18ddd81 283 #define IS_TIM_LIST9_PERIPH(PERIPH) (((PERIPH) == TIM1) || \
mbed_official 126:549ba18ddd81 284 ((PERIPH) == TIM2) || \
mbed_official 126:549ba18ddd81 285 ((PERIPH) == TIM3) || \
mbed_official 126:549ba18ddd81 286 ((PERIPH) == TIM4) || \
mbed_official 126:549ba18ddd81 287 ((PERIPH) == TIM5) || \
mbed_official 126:549ba18ddd81 288 ((PERIPH) == TIM6) || \
mbed_official 126:549ba18ddd81 289 ((PERIPH) == TIM7) || \
mbed_official 126:549ba18ddd81 290 ((PERIPH) == TIM8) || \
mbed_official 126:549ba18ddd81 291 ((PERIPH) == TIM15)|| \
mbed_official 126:549ba18ddd81 292 ((PERIPH) == TIM16)|| \
mbed_official 126:549ba18ddd81 293 ((PERIPH) == TIM17))
mbed_official 126:549ba18ddd81 294
mbed_official 126:549ba18ddd81 295 /**
mbed_official 126:549ba18ddd81 296 * @}
mbed_official 126:549ba18ddd81 297 */
mbed_official 126:549ba18ddd81 298
mbed_official 126:549ba18ddd81 299 /** @defgroup TIM_Output_Compare_and_PWM_modes
mbed_official 126:549ba18ddd81 300 * @{
mbed_official 126:549ba18ddd81 301 */
mbed_official 126:549ba18ddd81 302
mbed_official 126:549ba18ddd81 303 #define TIM_OCMode_Timing ((uint16_t)0x0000)
mbed_official 126:549ba18ddd81 304 #define TIM_OCMode_Active ((uint16_t)0x0010)
mbed_official 126:549ba18ddd81 305 #define TIM_OCMode_Inactive ((uint16_t)0x0020)
mbed_official 126:549ba18ddd81 306 #define TIM_OCMode_Toggle ((uint16_t)0x0030)
mbed_official 126:549ba18ddd81 307 #define TIM_OCMode_PWM1 ((uint16_t)0x0060)
mbed_official 126:549ba18ddd81 308 #define TIM_OCMode_PWM2 ((uint16_t)0x0070)
mbed_official 126:549ba18ddd81 309 #define IS_TIM_OC_MODE(MODE) (((MODE) == TIM_OCMode_Timing) || \
mbed_official 126:549ba18ddd81 310 ((MODE) == TIM_OCMode_Active) || \
mbed_official 126:549ba18ddd81 311 ((MODE) == TIM_OCMode_Inactive) || \
mbed_official 126:549ba18ddd81 312 ((MODE) == TIM_OCMode_Toggle)|| \
mbed_official 126:549ba18ddd81 313 ((MODE) == TIM_OCMode_PWM1) || \
mbed_official 126:549ba18ddd81 314 ((MODE) == TIM_OCMode_PWM2))
mbed_official 126:549ba18ddd81 315 #define IS_TIM_OCM(MODE) (((MODE) == TIM_OCMode_Timing) || \
mbed_official 126:549ba18ddd81 316 ((MODE) == TIM_OCMode_Active) || \
mbed_official 126:549ba18ddd81 317 ((MODE) == TIM_OCMode_Inactive) || \
mbed_official 126:549ba18ddd81 318 ((MODE) == TIM_OCMode_Toggle)|| \
mbed_official 126:549ba18ddd81 319 ((MODE) == TIM_OCMode_PWM1) || \
mbed_official 126:549ba18ddd81 320 ((MODE) == TIM_OCMode_PWM2) || \
mbed_official 126:549ba18ddd81 321 ((MODE) == TIM_ForcedAction_Active) || \
mbed_official 126:549ba18ddd81 322 ((MODE) == TIM_ForcedAction_InActive))
mbed_official 126:549ba18ddd81 323 /**
mbed_official 126:549ba18ddd81 324 * @}
mbed_official 126:549ba18ddd81 325 */
mbed_official 126:549ba18ddd81 326
mbed_official 126:549ba18ddd81 327 /** @defgroup TIM_One_Pulse_Mode
mbed_official 126:549ba18ddd81 328 * @{
mbed_official 126:549ba18ddd81 329 */
mbed_official 126:549ba18ddd81 330
mbed_official 126:549ba18ddd81 331 #define TIM_OPMode_Single ((uint16_t)0x0008)
mbed_official 126:549ba18ddd81 332 #define TIM_OPMode_Repetitive ((uint16_t)0x0000)
mbed_official 126:549ba18ddd81 333 #define IS_TIM_OPM_MODE(MODE) (((MODE) == TIM_OPMode_Single) || \
mbed_official 126:549ba18ddd81 334 ((MODE) == TIM_OPMode_Repetitive))
mbed_official 126:549ba18ddd81 335 /**
mbed_official 126:549ba18ddd81 336 * @}
mbed_official 126:549ba18ddd81 337 */
mbed_official 126:549ba18ddd81 338
mbed_official 126:549ba18ddd81 339 /** @defgroup TIM_Channel
mbed_official 126:549ba18ddd81 340 * @{
mbed_official 126:549ba18ddd81 341 */
mbed_official 126:549ba18ddd81 342
mbed_official 126:549ba18ddd81 343 #define TIM_Channel_1 ((uint16_t)0x0000)
mbed_official 126:549ba18ddd81 344 #define TIM_Channel_2 ((uint16_t)0x0004)
mbed_official 126:549ba18ddd81 345 #define TIM_Channel_3 ((uint16_t)0x0008)
mbed_official 126:549ba18ddd81 346 #define TIM_Channel_4 ((uint16_t)0x000C)
mbed_official 126:549ba18ddd81 347 #define IS_TIM_CHANNEL(CHANNEL) (((CHANNEL) == TIM_Channel_1) || \
mbed_official 126:549ba18ddd81 348 ((CHANNEL) == TIM_Channel_2) || \
mbed_official 126:549ba18ddd81 349 ((CHANNEL) == TIM_Channel_3) || \
mbed_official 126:549ba18ddd81 350 ((CHANNEL) == TIM_Channel_4))
mbed_official 126:549ba18ddd81 351 #define IS_TIM_PWMI_CHANNEL(CHANNEL) (((CHANNEL) == TIM_Channel_1) || \
mbed_official 126:549ba18ddd81 352 ((CHANNEL) == TIM_Channel_2))
mbed_official 126:549ba18ddd81 353 #define IS_TIM_COMPLEMENTARY_CHANNEL(CHANNEL) (((CHANNEL) == TIM_Channel_1) || \
mbed_official 126:549ba18ddd81 354 ((CHANNEL) == TIM_Channel_2) || \
mbed_official 126:549ba18ddd81 355 ((CHANNEL) == TIM_Channel_3))
mbed_official 126:549ba18ddd81 356 /**
mbed_official 126:549ba18ddd81 357 * @}
mbed_official 126:549ba18ddd81 358 */
mbed_official 126:549ba18ddd81 359
mbed_official 126:549ba18ddd81 360 /** @defgroup TIM_Clock_Division_CKD
mbed_official 126:549ba18ddd81 361 * @{
mbed_official 126:549ba18ddd81 362 */
mbed_official 126:549ba18ddd81 363
mbed_official 126:549ba18ddd81 364 #define TIM_CKD_DIV1 ((uint16_t)0x0000)
mbed_official 126:549ba18ddd81 365 #define TIM_CKD_DIV2 ((uint16_t)0x0100)
mbed_official 126:549ba18ddd81 366 #define TIM_CKD_DIV4 ((uint16_t)0x0200)
mbed_official 126:549ba18ddd81 367 #define IS_TIM_CKD_DIV(DIV) (((DIV) == TIM_CKD_DIV1) || \
mbed_official 126:549ba18ddd81 368 ((DIV) == TIM_CKD_DIV2) || \
mbed_official 126:549ba18ddd81 369 ((DIV) == TIM_CKD_DIV4))
mbed_official 126:549ba18ddd81 370 /**
mbed_official 126:549ba18ddd81 371 * @}
mbed_official 126:549ba18ddd81 372 */
mbed_official 126:549ba18ddd81 373
mbed_official 126:549ba18ddd81 374 /** @defgroup TIM_Counter_Mode
mbed_official 126:549ba18ddd81 375 * @{
mbed_official 126:549ba18ddd81 376 */
mbed_official 126:549ba18ddd81 377
mbed_official 126:549ba18ddd81 378 #define TIM_CounterMode_Up ((uint16_t)0x0000)
mbed_official 126:549ba18ddd81 379 #define TIM_CounterMode_Down ((uint16_t)0x0010)
mbed_official 126:549ba18ddd81 380 #define TIM_CounterMode_CenterAligned1 ((uint16_t)0x0020)
mbed_official 126:549ba18ddd81 381 #define TIM_CounterMode_CenterAligned2 ((uint16_t)0x0040)
mbed_official 126:549ba18ddd81 382 #define TIM_CounterMode_CenterAligned3 ((uint16_t)0x0060)
mbed_official 126:549ba18ddd81 383 #define IS_TIM_COUNTER_MODE(MODE) (((MODE) == TIM_CounterMode_Up) || \
mbed_official 126:549ba18ddd81 384 ((MODE) == TIM_CounterMode_Down) || \
mbed_official 126:549ba18ddd81 385 ((MODE) == TIM_CounterMode_CenterAligned1) || \
mbed_official 126:549ba18ddd81 386 ((MODE) == TIM_CounterMode_CenterAligned2) || \
mbed_official 126:549ba18ddd81 387 ((MODE) == TIM_CounterMode_CenterAligned3))
mbed_official 126:549ba18ddd81 388 /**
mbed_official 126:549ba18ddd81 389 * @}
mbed_official 126:549ba18ddd81 390 */
mbed_official 126:549ba18ddd81 391
mbed_official 126:549ba18ddd81 392 /** @defgroup TIM_Output_Compare_Polarity
mbed_official 126:549ba18ddd81 393 * @{
mbed_official 126:549ba18ddd81 394 */
mbed_official 126:549ba18ddd81 395
mbed_official 126:549ba18ddd81 396 #define TIM_OCPolarity_High ((uint16_t)0x0000)
mbed_official 126:549ba18ddd81 397 #define TIM_OCPolarity_Low ((uint16_t)0x0002)
mbed_official 126:549ba18ddd81 398 #define IS_TIM_OC_POLARITY(POLARITY) (((POLARITY) == TIM_OCPolarity_High) || \
mbed_official 126:549ba18ddd81 399 ((POLARITY) == TIM_OCPolarity_Low))
mbed_official 126:549ba18ddd81 400 /**
mbed_official 126:549ba18ddd81 401 * @}
mbed_official 126:549ba18ddd81 402 */
mbed_official 126:549ba18ddd81 403
mbed_official 126:549ba18ddd81 404 /** @defgroup TIM_Output_Compare_N_Polarity
mbed_official 126:549ba18ddd81 405 * @{
mbed_official 126:549ba18ddd81 406 */
mbed_official 126:549ba18ddd81 407
mbed_official 126:549ba18ddd81 408 #define TIM_OCNPolarity_High ((uint16_t)0x0000)
mbed_official 126:549ba18ddd81 409 #define TIM_OCNPolarity_Low ((uint16_t)0x0008)
mbed_official 126:549ba18ddd81 410 #define IS_TIM_OCN_POLARITY(POLARITY) (((POLARITY) == TIM_OCNPolarity_High) || \
mbed_official 126:549ba18ddd81 411 ((POLARITY) == TIM_OCNPolarity_Low))
mbed_official 126:549ba18ddd81 412 /**
mbed_official 126:549ba18ddd81 413 * @}
mbed_official 126:549ba18ddd81 414 */
mbed_official 126:549ba18ddd81 415
mbed_official 126:549ba18ddd81 416 /** @defgroup TIM_Output_Compare_state
mbed_official 126:549ba18ddd81 417 * @{
mbed_official 126:549ba18ddd81 418 */
mbed_official 126:549ba18ddd81 419
mbed_official 126:549ba18ddd81 420 #define TIM_OutputState_Disable ((uint16_t)0x0000)
mbed_official 126:549ba18ddd81 421 #define TIM_OutputState_Enable ((uint16_t)0x0001)
mbed_official 126:549ba18ddd81 422 #define IS_TIM_OUTPUT_STATE(STATE) (((STATE) == TIM_OutputState_Disable) || \
mbed_official 126:549ba18ddd81 423 ((STATE) == TIM_OutputState_Enable))
mbed_official 126:549ba18ddd81 424 /**
mbed_official 126:549ba18ddd81 425 * @}
mbed_official 126:549ba18ddd81 426 */
mbed_official 126:549ba18ddd81 427
mbed_official 126:549ba18ddd81 428 /** @defgroup TIM_Output_Compare_N_state
mbed_official 126:549ba18ddd81 429 * @{
mbed_official 126:549ba18ddd81 430 */
mbed_official 126:549ba18ddd81 431
mbed_official 126:549ba18ddd81 432 #define TIM_OutputNState_Disable ((uint16_t)0x0000)
mbed_official 126:549ba18ddd81 433 #define TIM_OutputNState_Enable ((uint16_t)0x0004)
mbed_official 126:549ba18ddd81 434 #define IS_TIM_OUTPUTN_STATE(STATE) (((STATE) == TIM_OutputNState_Disable) || \
mbed_official 126:549ba18ddd81 435 ((STATE) == TIM_OutputNState_Enable))
mbed_official 126:549ba18ddd81 436 /**
mbed_official 126:549ba18ddd81 437 * @}
mbed_official 126:549ba18ddd81 438 */
mbed_official 126:549ba18ddd81 439
mbed_official 126:549ba18ddd81 440 /** @defgroup TIM_Capture_Compare_state
mbed_official 126:549ba18ddd81 441 * @{
mbed_official 126:549ba18ddd81 442 */
mbed_official 126:549ba18ddd81 443
mbed_official 126:549ba18ddd81 444 #define TIM_CCx_Enable ((uint16_t)0x0001)
mbed_official 126:549ba18ddd81 445 #define TIM_CCx_Disable ((uint16_t)0x0000)
mbed_official 126:549ba18ddd81 446 #define IS_TIM_CCX(CCX) (((CCX) == TIM_CCx_Enable) || \
mbed_official 126:549ba18ddd81 447 ((CCX) == TIM_CCx_Disable))
mbed_official 126:549ba18ddd81 448 /**
mbed_official 126:549ba18ddd81 449 * @}
mbed_official 126:549ba18ddd81 450 */
mbed_official 126:549ba18ddd81 451
mbed_official 126:549ba18ddd81 452 /** @defgroup TIM_Capture_Compare_N_state
mbed_official 126:549ba18ddd81 453 * @{
mbed_official 126:549ba18ddd81 454 */
mbed_official 126:549ba18ddd81 455
mbed_official 126:549ba18ddd81 456 #define TIM_CCxN_Enable ((uint16_t)0x0004)
mbed_official 126:549ba18ddd81 457 #define TIM_CCxN_Disable ((uint16_t)0x0000)
mbed_official 126:549ba18ddd81 458 #define IS_TIM_CCXN(CCXN) (((CCXN) == TIM_CCxN_Enable) || \
mbed_official 126:549ba18ddd81 459 ((CCXN) == TIM_CCxN_Disable))
mbed_official 126:549ba18ddd81 460 /**
mbed_official 126:549ba18ddd81 461 * @}
mbed_official 126:549ba18ddd81 462 */
mbed_official 126:549ba18ddd81 463
mbed_official 126:549ba18ddd81 464 /** @defgroup Break_Input_enable_disable
mbed_official 126:549ba18ddd81 465 * @{
mbed_official 126:549ba18ddd81 466 */
mbed_official 126:549ba18ddd81 467
mbed_official 126:549ba18ddd81 468 #define TIM_Break_Enable ((uint16_t)0x1000)
mbed_official 126:549ba18ddd81 469 #define TIM_Break_Disable ((uint16_t)0x0000)
mbed_official 126:549ba18ddd81 470 #define IS_TIM_BREAK_STATE(STATE) (((STATE) == TIM_Break_Enable) || \
mbed_official 126:549ba18ddd81 471 ((STATE) == TIM_Break_Disable))
mbed_official 126:549ba18ddd81 472 /**
mbed_official 126:549ba18ddd81 473 * @}
mbed_official 126:549ba18ddd81 474 */
mbed_official 126:549ba18ddd81 475
mbed_official 126:549ba18ddd81 476 /** @defgroup Break_Polarity
mbed_official 126:549ba18ddd81 477 * @{
mbed_official 126:549ba18ddd81 478 */
mbed_official 126:549ba18ddd81 479
mbed_official 126:549ba18ddd81 480 #define TIM_BreakPolarity_Low ((uint16_t)0x0000)
mbed_official 126:549ba18ddd81 481 #define TIM_BreakPolarity_High ((uint16_t)0x2000)
mbed_official 126:549ba18ddd81 482 #define IS_TIM_BREAK_POLARITY(POLARITY) (((POLARITY) == TIM_BreakPolarity_Low) || \
mbed_official 126:549ba18ddd81 483 ((POLARITY) == TIM_BreakPolarity_High))
mbed_official 126:549ba18ddd81 484 /**
mbed_official 126:549ba18ddd81 485 * @}
mbed_official 126:549ba18ddd81 486 */
mbed_official 126:549ba18ddd81 487
mbed_official 126:549ba18ddd81 488 /** @defgroup TIM_AOE_Bit_Set_Reset
mbed_official 126:549ba18ddd81 489 * @{
mbed_official 126:549ba18ddd81 490 */
mbed_official 126:549ba18ddd81 491
mbed_official 126:549ba18ddd81 492 #define TIM_AutomaticOutput_Enable ((uint16_t)0x4000)
mbed_official 126:549ba18ddd81 493 #define TIM_AutomaticOutput_Disable ((uint16_t)0x0000)
mbed_official 126:549ba18ddd81 494 #define IS_TIM_AUTOMATIC_OUTPUT_STATE(STATE) (((STATE) == TIM_AutomaticOutput_Enable) || \
mbed_official 126:549ba18ddd81 495 ((STATE) == TIM_AutomaticOutput_Disable))
mbed_official 126:549ba18ddd81 496 /**
mbed_official 126:549ba18ddd81 497 * @}
mbed_official 126:549ba18ddd81 498 */
mbed_official 126:549ba18ddd81 499
mbed_official 126:549ba18ddd81 500 /** @defgroup Lock_level
mbed_official 126:549ba18ddd81 501 * @{
mbed_official 126:549ba18ddd81 502 */
mbed_official 126:549ba18ddd81 503
mbed_official 126:549ba18ddd81 504 #define TIM_LOCKLevel_OFF ((uint16_t)0x0000)
mbed_official 126:549ba18ddd81 505 #define TIM_LOCKLevel_1 ((uint16_t)0x0100)
mbed_official 126:549ba18ddd81 506 #define TIM_LOCKLevel_2 ((uint16_t)0x0200)
mbed_official 126:549ba18ddd81 507 #define TIM_LOCKLevel_3 ((uint16_t)0x0300)
mbed_official 126:549ba18ddd81 508 #define IS_TIM_LOCK_LEVEL(LEVEL) (((LEVEL) == TIM_LOCKLevel_OFF) || \
mbed_official 126:549ba18ddd81 509 ((LEVEL) == TIM_LOCKLevel_1) || \
mbed_official 126:549ba18ddd81 510 ((LEVEL) == TIM_LOCKLevel_2) || \
mbed_official 126:549ba18ddd81 511 ((LEVEL) == TIM_LOCKLevel_3))
mbed_official 126:549ba18ddd81 512 /**
mbed_official 126:549ba18ddd81 513 * @}
mbed_official 126:549ba18ddd81 514 */
mbed_official 126:549ba18ddd81 515
mbed_official 126:549ba18ddd81 516 /** @defgroup OSSI_Off_State_Selection_for_Idle_mode_state
mbed_official 126:549ba18ddd81 517 * @{
mbed_official 126:549ba18ddd81 518 */
mbed_official 126:549ba18ddd81 519
mbed_official 126:549ba18ddd81 520 #define TIM_OSSIState_Enable ((uint16_t)0x0400)
mbed_official 126:549ba18ddd81 521 #define TIM_OSSIState_Disable ((uint16_t)0x0000)
mbed_official 126:549ba18ddd81 522 #define IS_TIM_OSSI_STATE(STATE) (((STATE) == TIM_OSSIState_Enable) || \
mbed_official 126:549ba18ddd81 523 ((STATE) == TIM_OSSIState_Disable))
mbed_official 126:549ba18ddd81 524 /**
mbed_official 126:549ba18ddd81 525 * @}
mbed_official 126:549ba18ddd81 526 */
mbed_official 126:549ba18ddd81 527
mbed_official 126:549ba18ddd81 528 /** @defgroup OSSR_Off_State_Selection_for_Run_mode_state
mbed_official 126:549ba18ddd81 529 * @{
mbed_official 126:549ba18ddd81 530 */
mbed_official 126:549ba18ddd81 531
mbed_official 126:549ba18ddd81 532 #define TIM_OSSRState_Enable ((uint16_t)0x0800)
mbed_official 126:549ba18ddd81 533 #define TIM_OSSRState_Disable ((uint16_t)0x0000)
mbed_official 126:549ba18ddd81 534 #define IS_TIM_OSSR_STATE(STATE) (((STATE) == TIM_OSSRState_Enable) || \
mbed_official 126:549ba18ddd81 535 ((STATE) == TIM_OSSRState_Disable))
mbed_official 126:549ba18ddd81 536 /**
mbed_official 126:549ba18ddd81 537 * @}
mbed_official 126:549ba18ddd81 538 */
mbed_official 126:549ba18ddd81 539
mbed_official 126:549ba18ddd81 540 /** @defgroup TIM_Output_Compare_Idle_State
mbed_official 126:549ba18ddd81 541 * @{
mbed_official 126:549ba18ddd81 542 */
mbed_official 126:549ba18ddd81 543
mbed_official 126:549ba18ddd81 544 #define TIM_OCIdleState_Set ((uint16_t)0x0100)
mbed_official 126:549ba18ddd81 545 #define TIM_OCIdleState_Reset ((uint16_t)0x0000)
mbed_official 126:549ba18ddd81 546 #define IS_TIM_OCIDLE_STATE(STATE) (((STATE) == TIM_OCIdleState_Set) || \
mbed_official 126:549ba18ddd81 547 ((STATE) == TIM_OCIdleState_Reset))
mbed_official 126:549ba18ddd81 548 /**
mbed_official 126:549ba18ddd81 549 * @}
mbed_official 126:549ba18ddd81 550 */
mbed_official 126:549ba18ddd81 551
mbed_official 126:549ba18ddd81 552 /** @defgroup TIM_Output_Compare_N_Idle_State
mbed_official 126:549ba18ddd81 553 * @{
mbed_official 126:549ba18ddd81 554 */
mbed_official 126:549ba18ddd81 555
mbed_official 126:549ba18ddd81 556 #define TIM_OCNIdleState_Set ((uint16_t)0x0200)
mbed_official 126:549ba18ddd81 557 #define TIM_OCNIdleState_Reset ((uint16_t)0x0000)
mbed_official 126:549ba18ddd81 558 #define IS_TIM_OCNIDLE_STATE(STATE) (((STATE) == TIM_OCNIdleState_Set) || \
mbed_official 126:549ba18ddd81 559 ((STATE) == TIM_OCNIdleState_Reset))
mbed_official 126:549ba18ddd81 560 /**
mbed_official 126:549ba18ddd81 561 * @}
mbed_official 126:549ba18ddd81 562 */
mbed_official 126:549ba18ddd81 563
mbed_official 126:549ba18ddd81 564 /** @defgroup TIM_Input_Capture_Polarity
mbed_official 126:549ba18ddd81 565 * @{
mbed_official 126:549ba18ddd81 566 */
mbed_official 126:549ba18ddd81 567
mbed_official 126:549ba18ddd81 568 #define TIM_ICPolarity_Rising ((uint16_t)0x0000)
mbed_official 126:549ba18ddd81 569 #define TIM_ICPolarity_Falling ((uint16_t)0x0002)
mbed_official 126:549ba18ddd81 570 #define TIM_ICPolarity_BothEdge ((uint16_t)0x000A)
mbed_official 126:549ba18ddd81 571 #define IS_TIM_IC_POLARITY(POLARITY) (((POLARITY) == TIM_ICPolarity_Rising) || \
mbed_official 126:549ba18ddd81 572 ((POLARITY) == TIM_ICPolarity_Falling))
mbed_official 126:549ba18ddd81 573 #define IS_TIM_IC_POLARITY_LITE(POLARITY) (((POLARITY) == TIM_ICPolarity_Rising) || \
mbed_official 126:549ba18ddd81 574 ((POLARITY) == TIM_ICPolarity_Falling)|| \
mbed_official 126:549ba18ddd81 575 ((POLARITY) == TIM_ICPolarity_BothEdge))
mbed_official 126:549ba18ddd81 576 /**
mbed_official 126:549ba18ddd81 577 * @}
mbed_official 126:549ba18ddd81 578 */
mbed_official 126:549ba18ddd81 579
mbed_official 126:549ba18ddd81 580 /** @defgroup TIM_Input_Capture_Selection
mbed_official 126:549ba18ddd81 581 * @{
mbed_official 126:549ba18ddd81 582 */
mbed_official 126:549ba18ddd81 583
mbed_official 126:549ba18ddd81 584 #define TIM_ICSelection_DirectTI ((uint16_t)0x0001) /*!< TIM Input 1, 2, 3 or 4 is selected to be
mbed_official 126:549ba18ddd81 585 connected to IC1, IC2, IC3 or IC4, respectively */
mbed_official 126:549ba18ddd81 586 #define TIM_ICSelection_IndirectTI ((uint16_t)0x0002) /*!< TIM Input 1, 2, 3 or 4 is selected to be
mbed_official 126:549ba18ddd81 587 connected to IC2, IC1, IC4 or IC3, respectively. */
mbed_official 126:549ba18ddd81 588 #define TIM_ICSelection_TRC ((uint16_t)0x0003) /*!< TIM Input 1, 2, 3 or 4 is selected to be connected to TRC. */
mbed_official 126:549ba18ddd81 589 #define IS_TIM_IC_SELECTION(SELECTION) (((SELECTION) == TIM_ICSelection_DirectTI) || \
mbed_official 126:549ba18ddd81 590 ((SELECTION) == TIM_ICSelection_IndirectTI) || \
mbed_official 126:549ba18ddd81 591 ((SELECTION) == TIM_ICSelection_TRC))
mbed_official 126:549ba18ddd81 592 /**
mbed_official 126:549ba18ddd81 593 * @}
mbed_official 126:549ba18ddd81 594 */
mbed_official 126:549ba18ddd81 595
mbed_official 126:549ba18ddd81 596 /** @defgroup TIM_Input_Capture_Prescaler
mbed_official 126:549ba18ddd81 597 * @{
mbed_official 126:549ba18ddd81 598 */
mbed_official 126:549ba18ddd81 599
mbed_official 126:549ba18ddd81 600 #define TIM_ICPSC_DIV1 ((uint16_t)0x0000) /*!< Capture performed each time an edge is detected on the capture input. */
mbed_official 126:549ba18ddd81 601 #define TIM_ICPSC_DIV2 ((uint16_t)0x0004) /*!< Capture performed once every 2 events. */
mbed_official 126:549ba18ddd81 602 #define TIM_ICPSC_DIV4 ((uint16_t)0x0008) /*!< Capture performed once every 4 events. */
mbed_official 126:549ba18ddd81 603 #define TIM_ICPSC_DIV8 ((uint16_t)0x000C) /*!< Capture performed once every 8 events. */
mbed_official 126:549ba18ddd81 604 #define IS_TIM_IC_PRESCALER(PRESCALER) (((PRESCALER) == TIM_ICPSC_DIV1) || \
mbed_official 126:549ba18ddd81 605 ((PRESCALER) == TIM_ICPSC_DIV2) || \
mbed_official 126:549ba18ddd81 606 ((PRESCALER) == TIM_ICPSC_DIV4) || \
mbed_official 126:549ba18ddd81 607 ((PRESCALER) == TIM_ICPSC_DIV8))
mbed_official 126:549ba18ddd81 608 /**
mbed_official 126:549ba18ddd81 609 * @}
mbed_official 126:549ba18ddd81 610 */
mbed_official 126:549ba18ddd81 611
mbed_official 126:549ba18ddd81 612 /** @defgroup TIM_interrupt_sources
mbed_official 126:549ba18ddd81 613 * @{
mbed_official 126:549ba18ddd81 614 */
mbed_official 126:549ba18ddd81 615
mbed_official 126:549ba18ddd81 616 #define TIM_IT_Update ((uint16_t)0x0001)
mbed_official 126:549ba18ddd81 617 #define TIM_IT_CC1 ((uint16_t)0x0002)
mbed_official 126:549ba18ddd81 618 #define TIM_IT_CC2 ((uint16_t)0x0004)
mbed_official 126:549ba18ddd81 619 #define TIM_IT_CC3 ((uint16_t)0x0008)
mbed_official 126:549ba18ddd81 620 #define TIM_IT_CC4 ((uint16_t)0x0010)
mbed_official 126:549ba18ddd81 621 #define TIM_IT_COM ((uint16_t)0x0020)
mbed_official 126:549ba18ddd81 622 #define TIM_IT_Trigger ((uint16_t)0x0040)
mbed_official 126:549ba18ddd81 623 #define TIM_IT_Break ((uint16_t)0x0080)
mbed_official 126:549ba18ddd81 624 #define IS_TIM_IT(IT) ((((IT) & (uint16_t)0xFF00) == 0x0000) && ((IT) != 0x0000))
mbed_official 126:549ba18ddd81 625
mbed_official 126:549ba18ddd81 626 #define IS_TIM_GET_IT(IT) (((IT) == TIM_IT_Update) || \
mbed_official 126:549ba18ddd81 627 ((IT) == TIM_IT_CC1) || \
mbed_official 126:549ba18ddd81 628 ((IT) == TIM_IT_CC2) || \
mbed_official 126:549ba18ddd81 629 ((IT) == TIM_IT_CC3) || \
mbed_official 126:549ba18ddd81 630 ((IT) == TIM_IT_CC4) || \
mbed_official 126:549ba18ddd81 631 ((IT) == TIM_IT_COM) || \
mbed_official 126:549ba18ddd81 632 ((IT) == TIM_IT_Trigger) || \
mbed_official 126:549ba18ddd81 633 ((IT) == TIM_IT_Break))
mbed_official 126:549ba18ddd81 634 /**
mbed_official 126:549ba18ddd81 635 * @}
mbed_official 126:549ba18ddd81 636 */
mbed_official 126:549ba18ddd81 637
mbed_official 126:549ba18ddd81 638 /** @defgroup TIM_DMA_Base_address
mbed_official 126:549ba18ddd81 639 * @{
mbed_official 126:549ba18ddd81 640 */
mbed_official 126:549ba18ddd81 641
mbed_official 126:549ba18ddd81 642 #define TIM_DMABase_CR1 ((uint16_t)0x0000)
mbed_official 126:549ba18ddd81 643 #define TIM_DMABase_CR2 ((uint16_t)0x0001)
mbed_official 126:549ba18ddd81 644 #define TIM_DMABase_SMCR ((uint16_t)0x0002)
mbed_official 126:549ba18ddd81 645 #define TIM_DMABase_DIER ((uint16_t)0x0003)
mbed_official 126:549ba18ddd81 646 #define TIM_DMABase_SR ((uint16_t)0x0004)
mbed_official 126:549ba18ddd81 647 #define TIM_DMABase_EGR ((uint16_t)0x0005)
mbed_official 126:549ba18ddd81 648 #define TIM_DMABase_CCMR1 ((uint16_t)0x0006)
mbed_official 126:549ba18ddd81 649 #define TIM_DMABase_CCMR2 ((uint16_t)0x0007)
mbed_official 126:549ba18ddd81 650 #define TIM_DMABase_CCER ((uint16_t)0x0008)
mbed_official 126:549ba18ddd81 651 #define TIM_DMABase_CNT ((uint16_t)0x0009)
mbed_official 126:549ba18ddd81 652 #define TIM_DMABase_PSC ((uint16_t)0x000A)
mbed_official 126:549ba18ddd81 653 #define TIM_DMABase_ARR ((uint16_t)0x000B)
mbed_official 126:549ba18ddd81 654 #define TIM_DMABase_RCR ((uint16_t)0x000C)
mbed_official 126:549ba18ddd81 655 #define TIM_DMABase_CCR1 ((uint16_t)0x000D)
mbed_official 126:549ba18ddd81 656 #define TIM_DMABase_CCR2 ((uint16_t)0x000E)
mbed_official 126:549ba18ddd81 657 #define TIM_DMABase_CCR3 ((uint16_t)0x000F)
mbed_official 126:549ba18ddd81 658 #define TIM_DMABase_CCR4 ((uint16_t)0x0010)
mbed_official 126:549ba18ddd81 659 #define TIM_DMABase_BDTR ((uint16_t)0x0011)
mbed_official 126:549ba18ddd81 660 #define TIM_DMABase_DCR ((uint16_t)0x0012)
mbed_official 126:549ba18ddd81 661 #define IS_TIM_DMA_BASE(BASE) (((BASE) == TIM_DMABase_CR1) || \
mbed_official 126:549ba18ddd81 662 ((BASE) == TIM_DMABase_CR2) || \
mbed_official 126:549ba18ddd81 663 ((BASE) == TIM_DMABase_SMCR) || \
mbed_official 126:549ba18ddd81 664 ((BASE) == TIM_DMABase_DIER) || \
mbed_official 126:549ba18ddd81 665 ((BASE) == TIM_DMABase_SR) || \
mbed_official 126:549ba18ddd81 666 ((BASE) == TIM_DMABase_EGR) || \
mbed_official 126:549ba18ddd81 667 ((BASE) == TIM_DMABase_CCMR1) || \
mbed_official 126:549ba18ddd81 668 ((BASE) == TIM_DMABase_CCMR2) || \
mbed_official 126:549ba18ddd81 669 ((BASE) == TIM_DMABase_CCER) || \
mbed_official 126:549ba18ddd81 670 ((BASE) == TIM_DMABase_CNT) || \
mbed_official 126:549ba18ddd81 671 ((BASE) == TIM_DMABase_PSC) || \
mbed_official 126:549ba18ddd81 672 ((BASE) == TIM_DMABase_ARR) || \
mbed_official 126:549ba18ddd81 673 ((BASE) == TIM_DMABase_RCR) || \
mbed_official 126:549ba18ddd81 674 ((BASE) == TIM_DMABase_CCR1) || \
mbed_official 126:549ba18ddd81 675 ((BASE) == TIM_DMABase_CCR2) || \
mbed_official 126:549ba18ddd81 676 ((BASE) == TIM_DMABase_CCR3) || \
mbed_official 126:549ba18ddd81 677 ((BASE) == TIM_DMABase_CCR4) || \
mbed_official 126:549ba18ddd81 678 ((BASE) == TIM_DMABase_BDTR) || \
mbed_official 126:549ba18ddd81 679 ((BASE) == TIM_DMABase_DCR))
mbed_official 126:549ba18ddd81 680 /**
mbed_official 126:549ba18ddd81 681 * @}
mbed_official 126:549ba18ddd81 682 */
mbed_official 126:549ba18ddd81 683
mbed_official 126:549ba18ddd81 684 /** @defgroup TIM_DMA_Burst_Length
mbed_official 126:549ba18ddd81 685 * @{
mbed_official 126:549ba18ddd81 686 */
mbed_official 126:549ba18ddd81 687
mbed_official 126:549ba18ddd81 688 #define TIM_DMABurstLength_1Transfer ((uint16_t)0x0000)
mbed_official 126:549ba18ddd81 689 #define TIM_DMABurstLength_2Transfers ((uint16_t)0x0100)
mbed_official 126:549ba18ddd81 690 #define TIM_DMABurstLength_3Transfers ((uint16_t)0x0200)
mbed_official 126:549ba18ddd81 691 #define TIM_DMABurstLength_4Transfers ((uint16_t)0x0300)
mbed_official 126:549ba18ddd81 692 #define TIM_DMABurstLength_5Transfers ((uint16_t)0x0400)
mbed_official 126:549ba18ddd81 693 #define TIM_DMABurstLength_6Transfers ((uint16_t)0x0500)
mbed_official 126:549ba18ddd81 694 #define TIM_DMABurstLength_7Transfers ((uint16_t)0x0600)
mbed_official 126:549ba18ddd81 695 #define TIM_DMABurstLength_8Transfers ((uint16_t)0x0700)
mbed_official 126:549ba18ddd81 696 #define TIM_DMABurstLength_9Transfers ((uint16_t)0x0800)
mbed_official 126:549ba18ddd81 697 #define TIM_DMABurstLength_10Transfers ((uint16_t)0x0900)
mbed_official 126:549ba18ddd81 698 #define TIM_DMABurstLength_11Transfers ((uint16_t)0x0A00)
mbed_official 126:549ba18ddd81 699 #define TIM_DMABurstLength_12Transfers ((uint16_t)0x0B00)
mbed_official 126:549ba18ddd81 700 #define TIM_DMABurstLength_13Transfers ((uint16_t)0x0C00)
mbed_official 126:549ba18ddd81 701 #define TIM_DMABurstLength_14Transfers ((uint16_t)0x0D00)
mbed_official 126:549ba18ddd81 702 #define TIM_DMABurstLength_15Transfers ((uint16_t)0x0E00)
mbed_official 126:549ba18ddd81 703 #define TIM_DMABurstLength_16Transfers ((uint16_t)0x0F00)
mbed_official 126:549ba18ddd81 704 #define TIM_DMABurstLength_17Transfers ((uint16_t)0x1000)
mbed_official 126:549ba18ddd81 705 #define TIM_DMABurstLength_18Transfers ((uint16_t)0x1100)
mbed_official 126:549ba18ddd81 706 #define IS_TIM_DMA_LENGTH(LENGTH) (((LENGTH) == TIM_DMABurstLength_1Transfer) || \
mbed_official 126:549ba18ddd81 707 ((LENGTH) == TIM_DMABurstLength_2Transfers) || \
mbed_official 126:549ba18ddd81 708 ((LENGTH) == TIM_DMABurstLength_3Transfers) || \
mbed_official 126:549ba18ddd81 709 ((LENGTH) == TIM_DMABurstLength_4Transfers) || \
mbed_official 126:549ba18ddd81 710 ((LENGTH) == TIM_DMABurstLength_5Transfers) || \
mbed_official 126:549ba18ddd81 711 ((LENGTH) == TIM_DMABurstLength_6Transfers) || \
mbed_official 126:549ba18ddd81 712 ((LENGTH) == TIM_DMABurstLength_7Transfers) || \
mbed_official 126:549ba18ddd81 713 ((LENGTH) == TIM_DMABurstLength_8Transfers) || \
mbed_official 126:549ba18ddd81 714 ((LENGTH) == TIM_DMABurstLength_9Transfers) || \
mbed_official 126:549ba18ddd81 715 ((LENGTH) == TIM_DMABurstLength_10Transfers) || \
mbed_official 126:549ba18ddd81 716 ((LENGTH) == TIM_DMABurstLength_11Transfers) || \
mbed_official 126:549ba18ddd81 717 ((LENGTH) == TIM_DMABurstLength_12Transfers) || \
mbed_official 126:549ba18ddd81 718 ((LENGTH) == TIM_DMABurstLength_13Transfers) || \
mbed_official 126:549ba18ddd81 719 ((LENGTH) == TIM_DMABurstLength_14Transfers) || \
mbed_official 126:549ba18ddd81 720 ((LENGTH) == TIM_DMABurstLength_15Transfers) || \
mbed_official 126:549ba18ddd81 721 ((LENGTH) == TIM_DMABurstLength_16Transfers) || \
mbed_official 126:549ba18ddd81 722 ((LENGTH) == TIM_DMABurstLength_17Transfers) || \
mbed_official 126:549ba18ddd81 723 ((LENGTH) == TIM_DMABurstLength_18Transfers))
mbed_official 126:549ba18ddd81 724 /**
mbed_official 126:549ba18ddd81 725 * @}
mbed_official 126:549ba18ddd81 726 */
mbed_official 126:549ba18ddd81 727
mbed_official 126:549ba18ddd81 728 /** @defgroup TIM_DMA_sources
mbed_official 126:549ba18ddd81 729 * @{
mbed_official 126:549ba18ddd81 730 */
mbed_official 126:549ba18ddd81 731
mbed_official 126:549ba18ddd81 732 #define TIM_DMA_Update ((uint16_t)0x0100)
mbed_official 126:549ba18ddd81 733 #define TIM_DMA_CC1 ((uint16_t)0x0200)
mbed_official 126:549ba18ddd81 734 #define TIM_DMA_CC2 ((uint16_t)0x0400)
mbed_official 126:549ba18ddd81 735 #define TIM_DMA_CC3 ((uint16_t)0x0800)
mbed_official 126:549ba18ddd81 736 #define TIM_DMA_CC4 ((uint16_t)0x1000)
mbed_official 126:549ba18ddd81 737 #define TIM_DMA_COM ((uint16_t)0x2000)
mbed_official 126:549ba18ddd81 738 #define TIM_DMA_Trigger ((uint16_t)0x4000)
mbed_official 126:549ba18ddd81 739 #define IS_TIM_DMA_SOURCE(SOURCE) ((((SOURCE) & (uint16_t)0x80FF) == 0x0000) && ((SOURCE) != 0x0000))
mbed_official 126:549ba18ddd81 740
mbed_official 126:549ba18ddd81 741 /**
mbed_official 126:549ba18ddd81 742 * @}
mbed_official 126:549ba18ddd81 743 */
mbed_official 126:549ba18ddd81 744
mbed_official 126:549ba18ddd81 745 /** @defgroup TIM_External_Trigger_Prescaler
mbed_official 126:549ba18ddd81 746 * @{
mbed_official 126:549ba18ddd81 747 */
mbed_official 126:549ba18ddd81 748
mbed_official 126:549ba18ddd81 749 #define TIM_ExtTRGPSC_OFF ((uint16_t)0x0000)
mbed_official 126:549ba18ddd81 750 #define TIM_ExtTRGPSC_DIV2 ((uint16_t)0x1000)
mbed_official 126:549ba18ddd81 751 #define TIM_ExtTRGPSC_DIV4 ((uint16_t)0x2000)
mbed_official 126:549ba18ddd81 752 #define TIM_ExtTRGPSC_DIV8 ((uint16_t)0x3000)
mbed_official 126:549ba18ddd81 753 #define IS_TIM_EXT_PRESCALER(PRESCALER) (((PRESCALER) == TIM_ExtTRGPSC_OFF) || \
mbed_official 126:549ba18ddd81 754 ((PRESCALER) == TIM_ExtTRGPSC_DIV2) || \
mbed_official 126:549ba18ddd81 755 ((PRESCALER) == TIM_ExtTRGPSC_DIV4) || \
mbed_official 126:549ba18ddd81 756 ((PRESCALER) == TIM_ExtTRGPSC_DIV8))
mbed_official 126:549ba18ddd81 757 /**
mbed_official 126:549ba18ddd81 758 * @}
mbed_official 126:549ba18ddd81 759 */
mbed_official 126:549ba18ddd81 760
mbed_official 126:549ba18ddd81 761 /** @defgroup TIM_Internal_Trigger_Selection
mbed_official 126:549ba18ddd81 762 * @{
mbed_official 126:549ba18ddd81 763 */
mbed_official 126:549ba18ddd81 764
mbed_official 126:549ba18ddd81 765 #define TIM_TS_ITR0 ((uint16_t)0x0000)
mbed_official 126:549ba18ddd81 766 #define TIM_TS_ITR1 ((uint16_t)0x0010)
mbed_official 126:549ba18ddd81 767 #define TIM_TS_ITR2 ((uint16_t)0x0020)
mbed_official 126:549ba18ddd81 768 #define TIM_TS_ITR3 ((uint16_t)0x0030)
mbed_official 126:549ba18ddd81 769 #define TIM_TS_TI1F_ED ((uint16_t)0x0040)
mbed_official 126:549ba18ddd81 770 #define TIM_TS_TI1FP1 ((uint16_t)0x0050)
mbed_official 126:549ba18ddd81 771 #define TIM_TS_TI2FP2 ((uint16_t)0x0060)
mbed_official 126:549ba18ddd81 772 #define TIM_TS_ETRF ((uint16_t)0x0070)
mbed_official 126:549ba18ddd81 773 #define IS_TIM_TRIGGER_SELECTION(SELECTION) (((SELECTION) == TIM_TS_ITR0) || \
mbed_official 126:549ba18ddd81 774 ((SELECTION) == TIM_TS_ITR1) || \
mbed_official 126:549ba18ddd81 775 ((SELECTION) == TIM_TS_ITR2) || \
mbed_official 126:549ba18ddd81 776 ((SELECTION) == TIM_TS_ITR3) || \
mbed_official 126:549ba18ddd81 777 ((SELECTION) == TIM_TS_TI1F_ED) || \
mbed_official 126:549ba18ddd81 778 ((SELECTION) == TIM_TS_TI1FP1) || \
mbed_official 126:549ba18ddd81 779 ((SELECTION) == TIM_TS_TI2FP2) || \
mbed_official 126:549ba18ddd81 780 ((SELECTION) == TIM_TS_ETRF))
mbed_official 126:549ba18ddd81 781 #define IS_TIM_INTERNAL_TRIGGER_SELECTION(SELECTION) (((SELECTION) == TIM_TS_ITR0) || \
mbed_official 126:549ba18ddd81 782 ((SELECTION) == TIM_TS_ITR1) || \
mbed_official 126:549ba18ddd81 783 ((SELECTION) == TIM_TS_ITR2) || \
mbed_official 126:549ba18ddd81 784 ((SELECTION) == TIM_TS_ITR3))
mbed_official 126:549ba18ddd81 785 /**
mbed_official 126:549ba18ddd81 786 * @}
mbed_official 126:549ba18ddd81 787 */
mbed_official 126:549ba18ddd81 788
mbed_official 126:549ba18ddd81 789 /** @defgroup TIM_TIx_External_Clock_Source
mbed_official 126:549ba18ddd81 790 * @{
mbed_official 126:549ba18ddd81 791 */
mbed_official 126:549ba18ddd81 792
mbed_official 126:549ba18ddd81 793 #define TIM_TIxExternalCLK1Source_TI1 ((uint16_t)0x0050)
mbed_official 126:549ba18ddd81 794 #define TIM_TIxExternalCLK1Source_TI2 ((uint16_t)0x0060)
mbed_official 126:549ba18ddd81 795 #define TIM_TIxExternalCLK1Source_TI1ED ((uint16_t)0x0040)
mbed_official 126:549ba18ddd81 796 #define IS_TIM_TIXCLK_SOURCE(SOURCE) (((SOURCE) == TIM_TIxExternalCLK1Source_TI1) || \
mbed_official 126:549ba18ddd81 797 ((SOURCE) == TIM_TIxExternalCLK1Source_TI2) || \
mbed_official 126:549ba18ddd81 798 ((SOURCE) == TIM_TIxExternalCLK1Source_TI1ED))
mbed_official 126:549ba18ddd81 799 /**
mbed_official 126:549ba18ddd81 800 * @}
mbed_official 126:549ba18ddd81 801 */
mbed_official 126:549ba18ddd81 802
mbed_official 126:549ba18ddd81 803 /** @defgroup TIM_External_Trigger_Polarity
mbed_official 126:549ba18ddd81 804 * @{
mbed_official 126:549ba18ddd81 805 */
mbed_official 126:549ba18ddd81 806 #define TIM_ExtTRGPolarity_Inverted ((uint16_t)0x8000)
mbed_official 126:549ba18ddd81 807 #define TIM_ExtTRGPolarity_NonInverted ((uint16_t)0x0000)
mbed_official 126:549ba18ddd81 808 #define IS_TIM_EXT_POLARITY(POLARITY) (((POLARITY) == TIM_ExtTRGPolarity_Inverted) || \
mbed_official 126:549ba18ddd81 809 ((POLARITY) == TIM_ExtTRGPolarity_NonInverted))
mbed_official 126:549ba18ddd81 810 /**
mbed_official 126:549ba18ddd81 811 * @}
mbed_official 126:549ba18ddd81 812 */
mbed_official 126:549ba18ddd81 813
mbed_official 126:549ba18ddd81 814 /** @defgroup TIM_Prescaler_Reload_Mode
mbed_official 126:549ba18ddd81 815 * @{
mbed_official 126:549ba18ddd81 816 */
mbed_official 126:549ba18ddd81 817
mbed_official 126:549ba18ddd81 818 #define TIM_PSCReloadMode_Update ((uint16_t)0x0000)
mbed_official 126:549ba18ddd81 819 #define TIM_PSCReloadMode_Immediate ((uint16_t)0x0001)
mbed_official 126:549ba18ddd81 820 #define IS_TIM_PRESCALER_RELOAD(RELOAD) (((RELOAD) == TIM_PSCReloadMode_Update) || \
mbed_official 126:549ba18ddd81 821 ((RELOAD) == TIM_PSCReloadMode_Immediate))
mbed_official 126:549ba18ddd81 822 /**
mbed_official 126:549ba18ddd81 823 * @}
mbed_official 126:549ba18ddd81 824 */
mbed_official 126:549ba18ddd81 825
mbed_official 126:549ba18ddd81 826 /** @defgroup TIM_Forced_Action
mbed_official 126:549ba18ddd81 827 * @{
mbed_official 126:549ba18ddd81 828 */
mbed_official 126:549ba18ddd81 829
mbed_official 126:549ba18ddd81 830 #define TIM_ForcedAction_Active ((uint16_t)0x0050)
mbed_official 126:549ba18ddd81 831 #define TIM_ForcedAction_InActive ((uint16_t)0x0040)
mbed_official 126:549ba18ddd81 832 #define IS_TIM_FORCED_ACTION(ACTION) (((ACTION) == TIM_ForcedAction_Active) || \
mbed_official 126:549ba18ddd81 833 ((ACTION) == TIM_ForcedAction_InActive))
mbed_official 126:549ba18ddd81 834 /**
mbed_official 126:549ba18ddd81 835 * @}
mbed_official 126:549ba18ddd81 836 */
mbed_official 126:549ba18ddd81 837
mbed_official 126:549ba18ddd81 838 /** @defgroup TIM_Encoder_Mode
mbed_official 126:549ba18ddd81 839 * @{
mbed_official 126:549ba18ddd81 840 */
mbed_official 126:549ba18ddd81 841
mbed_official 126:549ba18ddd81 842 #define TIM_EncoderMode_TI1 ((uint16_t)0x0001)
mbed_official 126:549ba18ddd81 843 #define TIM_EncoderMode_TI2 ((uint16_t)0x0002)
mbed_official 126:549ba18ddd81 844 #define TIM_EncoderMode_TI12 ((uint16_t)0x0003)
mbed_official 126:549ba18ddd81 845 #define IS_TIM_ENCODER_MODE(MODE) (((MODE) == TIM_EncoderMode_TI1) || \
mbed_official 126:549ba18ddd81 846 ((MODE) == TIM_EncoderMode_TI2) || \
mbed_official 126:549ba18ddd81 847 ((MODE) == TIM_EncoderMode_TI12))
mbed_official 126:549ba18ddd81 848 /**
mbed_official 126:549ba18ddd81 849 * @}
mbed_official 126:549ba18ddd81 850 */
mbed_official 126:549ba18ddd81 851
mbed_official 126:549ba18ddd81 852
mbed_official 126:549ba18ddd81 853 /** @defgroup TIM_Event_Source
mbed_official 126:549ba18ddd81 854 * @{
mbed_official 126:549ba18ddd81 855 */
mbed_official 126:549ba18ddd81 856
mbed_official 126:549ba18ddd81 857 #define TIM_EventSource_Update ((uint16_t)0x0001)
mbed_official 126:549ba18ddd81 858 #define TIM_EventSource_CC1 ((uint16_t)0x0002)
mbed_official 126:549ba18ddd81 859 #define TIM_EventSource_CC2 ((uint16_t)0x0004)
mbed_official 126:549ba18ddd81 860 #define TIM_EventSource_CC3 ((uint16_t)0x0008)
mbed_official 126:549ba18ddd81 861 #define TIM_EventSource_CC4 ((uint16_t)0x0010)
mbed_official 126:549ba18ddd81 862 #define TIM_EventSource_COM ((uint16_t)0x0020)
mbed_official 126:549ba18ddd81 863 #define TIM_EventSource_Trigger ((uint16_t)0x0040)
mbed_official 126:549ba18ddd81 864 #define TIM_EventSource_Break ((uint16_t)0x0080)
mbed_official 126:549ba18ddd81 865 #define IS_TIM_EVENT_SOURCE(SOURCE) ((((SOURCE) & (uint16_t)0xFF00) == 0x0000) && ((SOURCE) != 0x0000))
mbed_official 126:549ba18ddd81 866
mbed_official 126:549ba18ddd81 867 /**
mbed_official 126:549ba18ddd81 868 * @}
mbed_official 126:549ba18ddd81 869 */
mbed_official 126:549ba18ddd81 870
mbed_official 126:549ba18ddd81 871 /** @defgroup TIM_Update_Source
mbed_official 126:549ba18ddd81 872 * @{
mbed_official 126:549ba18ddd81 873 */
mbed_official 126:549ba18ddd81 874
mbed_official 126:549ba18ddd81 875 #define TIM_UpdateSource_Global ((uint16_t)0x0000) /*!< Source of update is the counter overflow/underflow
mbed_official 126:549ba18ddd81 876 or the setting of UG bit, or an update generation
mbed_official 126:549ba18ddd81 877 through the slave mode controller. */
mbed_official 126:549ba18ddd81 878 #define TIM_UpdateSource_Regular ((uint16_t)0x0001) /*!< Source of update is counter overflow/underflow. */
mbed_official 126:549ba18ddd81 879 #define IS_TIM_UPDATE_SOURCE(SOURCE) (((SOURCE) == TIM_UpdateSource_Global) || \
mbed_official 126:549ba18ddd81 880 ((SOURCE) == TIM_UpdateSource_Regular))
mbed_official 126:549ba18ddd81 881 /**
mbed_official 126:549ba18ddd81 882 * @}
mbed_official 126:549ba18ddd81 883 */
mbed_official 126:549ba18ddd81 884
mbed_official 126:549ba18ddd81 885 /** @defgroup TIM_Output_Compare_Preload_State
mbed_official 126:549ba18ddd81 886 * @{
mbed_official 126:549ba18ddd81 887 */
mbed_official 126:549ba18ddd81 888
mbed_official 126:549ba18ddd81 889 #define TIM_OCPreload_Enable ((uint16_t)0x0008)
mbed_official 126:549ba18ddd81 890 #define TIM_OCPreload_Disable ((uint16_t)0x0000)
mbed_official 126:549ba18ddd81 891 #define IS_TIM_OCPRELOAD_STATE(STATE) (((STATE) == TIM_OCPreload_Enable) || \
mbed_official 126:549ba18ddd81 892 ((STATE) == TIM_OCPreload_Disable))
mbed_official 126:549ba18ddd81 893 /**
mbed_official 126:549ba18ddd81 894 * @}
mbed_official 126:549ba18ddd81 895 */
mbed_official 126:549ba18ddd81 896
mbed_official 126:549ba18ddd81 897 /** @defgroup TIM_Output_Compare_Fast_State
mbed_official 126:549ba18ddd81 898 * @{
mbed_official 126:549ba18ddd81 899 */
mbed_official 126:549ba18ddd81 900
mbed_official 126:549ba18ddd81 901 #define TIM_OCFast_Enable ((uint16_t)0x0004)
mbed_official 126:549ba18ddd81 902 #define TIM_OCFast_Disable ((uint16_t)0x0000)
mbed_official 126:549ba18ddd81 903 #define IS_TIM_OCFAST_STATE(STATE) (((STATE) == TIM_OCFast_Enable) || \
mbed_official 126:549ba18ddd81 904 ((STATE) == TIM_OCFast_Disable))
mbed_official 126:549ba18ddd81 905
mbed_official 126:549ba18ddd81 906 /**
mbed_official 126:549ba18ddd81 907 * @}
mbed_official 126:549ba18ddd81 908 */
mbed_official 126:549ba18ddd81 909
mbed_official 126:549ba18ddd81 910 /** @defgroup TIM_Output_Compare_Clear_State
mbed_official 126:549ba18ddd81 911 * @{
mbed_official 126:549ba18ddd81 912 */
mbed_official 126:549ba18ddd81 913
mbed_official 126:549ba18ddd81 914 #define TIM_OCClear_Enable ((uint16_t)0x0080)
mbed_official 126:549ba18ddd81 915 #define TIM_OCClear_Disable ((uint16_t)0x0000)
mbed_official 126:549ba18ddd81 916 #define IS_TIM_OCCLEAR_STATE(STATE) (((STATE) == TIM_OCClear_Enable) || \
mbed_official 126:549ba18ddd81 917 ((STATE) == TIM_OCClear_Disable))
mbed_official 126:549ba18ddd81 918 /**
mbed_official 126:549ba18ddd81 919 * @}
mbed_official 126:549ba18ddd81 920 */
mbed_official 126:549ba18ddd81 921
mbed_official 126:549ba18ddd81 922 /** @defgroup TIM_Trigger_Output_Source
mbed_official 126:549ba18ddd81 923 * @{
mbed_official 126:549ba18ddd81 924 */
mbed_official 126:549ba18ddd81 925
mbed_official 126:549ba18ddd81 926 #define TIM_TRGOSource_Reset ((uint16_t)0x0000)
mbed_official 126:549ba18ddd81 927 #define TIM_TRGOSource_Enable ((uint16_t)0x0010)
mbed_official 126:549ba18ddd81 928 #define TIM_TRGOSource_Update ((uint16_t)0x0020)
mbed_official 126:549ba18ddd81 929 #define TIM_TRGOSource_OC1 ((uint16_t)0x0030)
mbed_official 126:549ba18ddd81 930 #define TIM_TRGOSource_OC1Ref ((uint16_t)0x0040)
mbed_official 126:549ba18ddd81 931 #define TIM_TRGOSource_OC2Ref ((uint16_t)0x0050)
mbed_official 126:549ba18ddd81 932 #define TIM_TRGOSource_OC3Ref ((uint16_t)0x0060)
mbed_official 126:549ba18ddd81 933 #define TIM_TRGOSource_OC4Ref ((uint16_t)0x0070)
mbed_official 126:549ba18ddd81 934 #define IS_TIM_TRGO_SOURCE(SOURCE) (((SOURCE) == TIM_TRGOSource_Reset) || \
mbed_official 126:549ba18ddd81 935 ((SOURCE) == TIM_TRGOSource_Enable) || \
mbed_official 126:549ba18ddd81 936 ((SOURCE) == TIM_TRGOSource_Update) || \
mbed_official 126:549ba18ddd81 937 ((SOURCE) == TIM_TRGOSource_OC1) || \
mbed_official 126:549ba18ddd81 938 ((SOURCE) == TIM_TRGOSource_OC1Ref) || \
mbed_official 126:549ba18ddd81 939 ((SOURCE) == TIM_TRGOSource_OC2Ref) || \
mbed_official 126:549ba18ddd81 940 ((SOURCE) == TIM_TRGOSource_OC3Ref) || \
mbed_official 126:549ba18ddd81 941 ((SOURCE) == TIM_TRGOSource_OC4Ref))
mbed_official 126:549ba18ddd81 942 /**
mbed_official 126:549ba18ddd81 943 * @}
mbed_official 126:549ba18ddd81 944 */
mbed_official 126:549ba18ddd81 945
mbed_official 126:549ba18ddd81 946 /** @defgroup TIM_Slave_Mode
mbed_official 126:549ba18ddd81 947 * @{
mbed_official 126:549ba18ddd81 948 */
mbed_official 126:549ba18ddd81 949
mbed_official 126:549ba18ddd81 950 #define TIM_SlaveMode_Reset ((uint16_t)0x0004)
mbed_official 126:549ba18ddd81 951 #define TIM_SlaveMode_Gated ((uint16_t)0x0005)
mbed_official 126:549ba18ddd81 952 #define TIM_SlaveMode_Trigger ((uint16_t)0x0006)
mbed_official 126:549ba18ddd81 953 #define TIM_SlaveMode_External1 ((uint16_t)0x0007)
mbed_official 126:549ba18ddd81 954 #define IS_TIM_SLAVE_MODE(MODE) (((MODE) == TIM_SlaveMode_Reset) || \
mbed_official 126:549ba18ddd81 955 ((MODE) == TIM_SlaveMode_Gated) || \
mbed_official 126:549ba18ddd81 956 ((MODE) == TIM_SlaveMode_Trigger) || \
mbed_official 126:549ba18ddd81 957 ((MODE) == TIM_SlaveMode_External1))
mbed_official 126:549ba18ddd81 958 /**
mbed_official 126:549ba18ddd81 959 * @}
mbed_official 126:549ba18ddd81 960 */
mbed_official 126:549ba18ddd81 961
mbed_official 126:549ba18ddd81 962 /** @defgroup TIM_Master_Slave_Mode
mbed_official 126:549ba18ddd81 963 * @{
mbed_official 126:549ba18ddd81 964 */
mbed_official 126:549ba18ddd81 965
mbed_official 126:549ba18ddd81 966 #define TIM_MasterSlaveMode_Enable ((uint16_t)0x0080)
mbed_official 126:549ba18ddd81 967 #define TIM_MasterSlaveMode_Disable ((uint16_t)0x0000)
mbed_official 126:549ba18ddd81 968 #define IS_TIM_MSM_STATE(STATE) (((STATE) == TIM_MasterSlaveMode_Enable) || \
mbed_official 126:549ba18ddd81 969 ((STATE) == TIM_MasterSlaveMode_Disable))
mbed_official 126:549ba18ddd81 970 /**
mbed_official 126:549ba18ddd81 971 * @}
mbed_official 126:549ba18ddd81 972 */
mbed_official 126:549ba18ddd81 973
mbed_official 126:549ba18ddd81 974 /** @defgroup TIM_Flags
mbed_official 126:549ba18ddd81 975 * @{
mbed_official 126:549ba18ddd81 976 */
mbed_official 126:549ba18ddd81 977
mbed_official 126:549ba18ddd81 978 #define TIM_FLAG_Update ((uint16_t)0x0001)
mbed_official 126:549ba18ddd81 979 #define TIM_FLAG_CC1 ((uint16_t)0x0002)
mbed_official 126:549ba18ddd81 980 #define TIM_FLAG_CC2 ((uint16_t)0x0004)
mbed_official 126:549ba18ddd81 981 #define TIM_FLAG_CC3 ((uint16_t)0x0008)
mbed_official 126:549ba18ddd81 982 #define TIM_FLAG_CC4 ((uint16_t)0x0010)
mbed_official 126:549ba18ddd81 983 #define TIM_FLAG_COM ((uint16_t)0x0020)
mbed_official 126:549ba18ddd81 984 #define TIM_FLAG_Trigger ((uint16_t)0x0040)
mbed_official 126:549ba18ddd81 985 #define TIM_FLAG_Break ((uint16_t)0x0080)
mbed_official 126:549ba18ddd81 986 #define TIM_FLAG_CC1OF ((uint16_t)0x0200)
mbed_official 126:549ba18ddd81 987 #define TIM_FLAG_CC2OF ((uint16_t)0x0400)
mbed_official 126:549ba18ddd81 988 #define TIM_FLAG_CC3OF ((uint16_t)0x0800)
mbed_official 126:549ba18ddd81 989 #define TIM_FLAG_CC4OF ((uint16_t)0x1000)
mbed_official 126:549ba18ddd81 990 #define IS_TIM_GET_FLAG(FLAG) (((FLAG) == TIM_FLAG_Update) || \
mbed_official 126:549ba18ddd81 991 ((FLAG) == TIM_FLAG_CC1) || \
mbed_official 126:549ba18ddd81 992 ((FLAG) == TIM_FLAG_CC2) || \
mbed_official 126:549ba18ddd81 993 ((FLAG) == TIM_FLAG_CC3) || \
mbed_official 126:549ba18ddd81 994 ((FLAG) == TIM_FLAG_CC4) || \
mbed_official 126:549ba18ddd81 995 ((FLAG) == TIM_FLAG_COM) || \
mbed_official 126:549ba18ddd81 996 ((FLAG) == TIM_FLAG_Trigger) || \
mbed_official 126:549ba18ddd81 997 ((FLAG) == TIM_FLAG_Break) || \
mbed_official 126:549ba18ddd81 998 ((FLAG) == TIM_FLAG_CC1OF) || \
mbed_official 126:549ba18ddd81 999 ((FLAG) == TIM_FLAG_CC2OF) || \
mbed_official 126:549ba18ddd81 1000 ((FLAG) == TIM_FLAG_CC3OF) || \
mbed_official 126:549ba18ddd81 1001 ((FLAG) == TIM_FLAG_CC4OF))
mbed_official 126:549ba18ddd81 1002
mbed_official 126:549ba18ddd81 1003
mbed_official 126:549ba18ddd81 1004 #define IS_TIM_CLEAR_FLAG(TIM_FLAG) ((((TIM_FLAG) & (uint16_t)0xE100) == 0x0000) && ((TIM_FLAG) != 0x0000))
mbed_official 126:549ba18ddd81 1005 /**
mbed_official 126:549ba18ddd81 1006 * @}
mbed_official 126:549ba18ddd81 1007 */
mbed_official 126:549ba18ddd81 1008
mbed_official 126:549ba18ddd81 1009 /** @defgroup TIM_Input_Capture_Filer_Value
mbed_official 126:549ba18ddd81 1010 * @{
mbed_official 126:549ba18ddd81 1011 */
mbed_official 126:549ba18ddd81 1012
mbed_official 126:549ba18ddd81 1013 #define IS_TIM_IC_FILTER(ICFILTER) ((ICFILTER) <= 0xF)
mbed_official 126:549ba18ddd81 1014 /**
mbed_official 126:549ba18ddd81 1015 * @}
mbed_official 126:549ba18ddd81 1016 */
mbed_official 126:549ba18ddd81 1017
mbed_official 126:549ba18ddd81 1018 /** @defgroup TIM_External_Trigger_Filter
mbed_official 126:549ba18ddd81 1019 * @{
mbed_official 126:549ba18ddd81 1020 */
mbed_official 126:549ba18ddd81 1021
mbed_official 126:549ba18ddd81 1022 #define IS_TIM_EXT_FILTER(EXTFILTER) ((EXTFILTER) <= 0xF)
mbed_official 126:549ba18ddd81 1023 /**
mbed_official 126:549ba18ddd81 1024 * @}
mbed_official 126:549ba18ddd81 1025 */
mbed_official 126:549ba18ddd81 1026
mbed_official 126:549ba18ddd81 1027 /** @defgroup TIM_Legacy
mbed_official 126:549ba18ddd81 1028 * @{
mbed_official 126:549ba18ddd81 1029 */
mbed_official 126:549ba18ddd81 1030
mbed_official 126:549ba18ddd81 1031 #define TIM_DMABurstLength_1Byte TIM_DMABurstLength_1Transfer
mbed_official 126:549ba18ddd81 1032 #define TIM_DMABurstLength_2Bytes TIM_DMABurstLength_2Transfers
mbed_official 126:549ba18ddd81 1033 #define TIM_DMABurstLength_3Bytes TIM_DMABurstLength_3Transfers
mbed_official 126:549ba18ddd81 1034 #define TIM_DMABurstLength_4Bytes TIM_DMABurstLength_4Transfers
mbed_official 126:549ba18ddd81 1035 #define TIM_DMABurstLength_5Bytes TIM_DMABurstLength_5Transfers
mbed_official 126:549ba18ddd81 1036 #define TIM_DMABurstLength_6Bytes TIM_DMABurstLength_6Transfers
mbed_official 126:549ba18ddd81 1037 #define TIM_DMABurstLength_7Bytes TIM_DMABurstLength_7Transfers
mbed_official 126:549ba18ddd81 1038 #define TIM_DMABurstLength_8Bytes TIM_DMABurstLength_8Transfers
mbed_official 126:549ba18ddd81 1039 #define TIM_DMABurstLength_9Bytes TIM_DMABurstLength_9Transfers
mbed_official 126:549ba18ddd81 1040 #define TIM_DMABurstLength_10Bytes TIM_DMABurstLength_10Transfers
mbed_official 126:549ba18ddd81 1041 #define TIM_DMABurstLength_11Bytes TIM_DMABurstLength_11Transfers
mbed_official 126:549ba18ddd81 1042 #define TIM_DMABurstLength_12Bytes TIM_DMABurstLength_12Transfers
mbed_official 126:549ba18ddd81 1043 #define TIM_DMABurstLength_13Bytes TIM_DMABurstLength_13Transfers
mbed_official 126:549ba18ddd81 1044 #define TIM_DMABurstLength_14Bytes TIM_DMABurstLength_14Transfers
mbed_official 126:549ba18ddd81 1045 #define TIM_DMABurstLength_15Bytes TIM_DMABurstLength_15Transfers
mbed_official 126:549ba18ddd81 1046 #define TIM_DMABurstLength_16Bytes TIM_DMABurstLength_16Transfers
mbed_official 126:549ba18ddd81 1047 #define TIM_DMABurstLength_17Bytes TIM_DMABurstLength_17Transfers
mbed_official 126:549ba18ddd81 1048 #define TIM_DMABurstLength_18Bytes TIM_DMABurstLength_18Transfers
mbed_official 126:549ba18ddd81 1049 /**
mbed_official 126:549ba18ddd81 1050 * @}
mbed_official 126:549ba18ddd81 1051 */
mbed_official 126:549ba18ddd81 1052
mbed_official 126:549ba18ddd81 1053 /**
mbed_official 126:549ba18ddd81 1054 * @}
mbed_official 126:549ba18ddd81 1055 */
mbed_official 126:549ba18ddd81 1056
mbed_official 126:549ba18ddd81 1057 /** @defgroup TIM_Exported_Macros
mbed_official 126:549ba18ddd81 1058 * @{
mbed_official 126:549ba18ddd81 1059 */
mbed_official 126:549ba18ddd81 1060
mbed_official 126:549ba18ddd81 1061 /**
mbed_official 126:549ba18ddd81 1062 * @}
mbed_official 126:549ba18ddd81 1063 */
mbed_official 126:549ba18ddd81 1064
mbed_official 126:549ba18ddd81 1065 /** @defgroup TIM_Exported_Functions
mbed_official 126:549ba18ddd81 1066 * @{
mbed_official 126:549ba18ddd81 1067 */
mbed_official 126:549ba18ddd81 1068
mbed_official 126:549ba18ddd81 1069 void TIM_DeInit(TIM_TypeDef* TIMx);
mbed_official 126:549ba18ddd81 1070 void TIM_TimeBaseInit(TIM_TypeDef* TIMx, TIM_TimeBaseInitTypeDef* TIM_TimeBaseInitStruct);
mbed_official 126:549ba18ddd81 1071 void TIM_OC1Init(TIM_TypeDef* TIMx, TIM_OCInitTypeDef* TIM_OCInitStruct);
mbed_official 126:549ba18ddd81 1072 void TIM_OC2Init(TIM_TypeDef* TIMx, TIM_OCInitTypeDef* TIM_OCInitStruct);
mbed_official 126:549ba18ddd81 1073 void TIM_OC3Init(TIM_TypeDef* TIMx, TIM_OCInitTypeDef* TIM_OCInitStruct);
mbed_official 126:549ba18ddd81 1074 void TIM_OC4Init(TIM_TypeDef* TIMx, TIM_OCInitTypeDef* TIM_OCInitStruct);
mbed_official 126:549ba18ddd81 1075 void TIM_ICInit(TIM_TypeDef* TIMx, TIM_ICInitTypeDef* TIM_ICInitStruct);
mbed_official 126:549ba18ddd81 1076 void TIM_PWMIConfig(TIM_TypeDef* TIMx, TIM_ICInitTypeDef* TIM_ICInitStruct);
mbed_official 126:549ba18ddd81 1077 void TIM_BDTRConfig(TIM_TypeDef* TIMx, TIM_BDTRInitTypeDef *TIM_BDTRInitStruct);
mbed_official 126:549ba18ddd81 1078 void TIM_TimeBaseStructInit(TIM_TimeBaseInitTypeDef* TIM_TimeBaseInitStruct);
mbed_official 126:549ba18ddd81 1079 void TIM_OCStructInit(TIM_OCInitTypeDef* TIM_OCInitStruct);
mbed_official 126:549ba18ddd81 1080 void TIM_ICStructInit(TIM_ICInitTypeDef* TIM_ICInitStruct);
mbed_official 126:549ba18ddd81 1081 void TIM_BDTRStructInit(TIM_BDTRInitTypeDef* TIM_BDTRInitStruct);
mbed_official 126:549ba18ddd81 1082 void TIM_Cmd(TIM_TypeDef* TIMx, FunctionalState NewState);
mbed_official 126:549ba18ddd81 1083 void TIM_CtrlPWMOutputs(TIM_TypeDef* TIMx, FunctionalState NewState);
mbed_official 126:549ba18ddd81 1084 void TIM_ITConfig(TIM_TypeDef* TIMx, uint16_t TIM_IT, FunctionalState NewState);
mbed_official 126:549ba18ddd81 1085 void TIM_GenerateEvent(TIM_TypeDef* TIMx, uint16_t TIM_EventSource);
mbed_official 126:549ba18ddd81 1086 void TIM_DMAConfig(TIM_TypeDef* TIMx, uint16_t TIM_DMABase, uint16_t TIM_DMABurstLength);
mbed_official 126:549ba18ddd81 1087 void TIM_DMACmd(TIM_TypeDef* TIMx, uint16_t TIM_DMASource, FunctionalState NewState);
mbed_official 126:549ba18ddd81 1088 void TIM_InternalClockConfig(TIM_TypeDef* TIMx);
mbed_official 126:549ba18ddd81 1089 void TIM_ITRxExternalClockConfig(TIM_TypeDef* TIMx, uint16_t TIM_InputTriggerSource);
mbed_official 126:549ba18ddd81 1090 void TIM_TIxExternalClockConfig(TIM_TypeDef* TIMx, uint16_t TIM_TIxExternalCLKSource,
mbed_official 126:549ba18ddd81 1091 uint16_t TIM_ICPolarity, uint16_t ICFilter);
mbed_official 126:549ba18ddd81 1092 void TIM_ETRClockMode1Config(TIM_TypeDef* TIMx, uint16_t TIM_ExtTRGPrescaler, uint16_t TIM_ExtTRGPolarity,
mbed_official 126:549ba18ddd81 1093 uint16_t ExtTRGFilter);
mbed_official 126:549ba18ddd81 1094 void TIM_ETRClockMode2Config(TIM_TypeDef* TIMx, uint16_t TIM_ExtTRGPrescaler,
mbed_official 126:549ba18ddd81 1095 uint16_t TIM_ExtTRGPolarity, uint16_t ExtTRGFilter);
mbed_official 126:549ba18ddd81 1096 void TIM_ETRConfig(TIM_TypeDef* TIMx, uint16_t TIM_ExtTRGPrescaler, uint16_t TIM_ExtTRGPolarity,
mbed_official 126:549ba18ddd81 1097 uint16_t ExtTRGFilter);
mbed_official 126:549ba18ddd81 1098 void TIM_PrescalerConfig(TIM_TypeDef* TIMx, uint16_t Prescaler, uint16_t TIM_PSCReloadMode);
mbed_official 126:549ba18ddd81 1099 void TIM_CounterModeConfig(TIM_TypeDef* TIMx, uint16_t TIM_CounterMode);
mbed_official 126:549ba18ddd81 1100 void TIM_SelectInputTrigger(TIM_TypeDef* TIMx, uint16_t TIM_InputTriggerSource);
mbed_official 126:549ba18ddd81 1101 void TIM_EncoderInterfaceConfig(TIM_TypeDef* TIMx, uint16_t TIM_EncoderMode,
mbed_official 126:549ba18ddd81 1102 uint16_t TIM_IC1Polarity, uint16_t TIM_IC2Polarity);
mbed_official 126:549ba18ddd81 1103 void TIM_ForcedOC1Config(TIM_TypeDef* TIMx, uint16_t TIM_ForcedAction);
mbed_official 126:549ba18ddd81 1104 void TIM_ForcedOC2Config(TIM_TypeDef* TIMx, uint16_t TIM_ForcedAction);
mbed_official 126:549ba18ddd81 1105 void TIM_ForcedOC3Config(TIM_TypeDef* TIMx, uint16_t TIM_ForcedAction);
mbed_official 126:549ba18ddd81 1106 void TIM_ForcedOC4Config(TIM_TypeDef* TIMx, uint16_t TIM_ForcedAction);
mbed_official 126:549ba18ddd81 1107 void TIM_ARRPreloadConfig(TIM_TypeDef* TIMx, FunctionalState NewState);
mbed_official 126:549ba18ddd81 1108 void TIM_SelectCOM(TIM_TypeDef* TIMx, FunctionalState NewState);
mbed_official 126:549ba18ddd81 1109 void TIM_SelectCCDMA(TIM_TypeDef* TIMx, FunctionalState NewState);
mbed_official 126:549ba18ddd81 1110 void TIM_CCPreloadControl(TIM_TypeDef* TIMx, FunctionalState NewState);
mbed_official 126:549ba18ddd81 1111 void TIM_OC1PreloadConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCPreload);
mbed_official 126:549ba18ddd81 1112 void TIM_OC2PreloadConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCPreload);
mbed_official 126:549ba18ddd81 1113 void TIM_OC3PreloadConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCPreload);
mbed_official 126:549ba18ddd81 1114 void TIM_OC4PreloadConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCPreload);
mbed_official 126:549ba18ddd81 1115 void TIM_OC1FastConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCFast);
mbed_official 126:549ba18ddd81 1116 void TIM_OC2FastConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCFast);
mbed_official 126:549ba18ddd81 1117 void TIM_OC3FastConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCFast);
mbed_official 126:549ba18ddd81 1118 void TIM_OC4FastConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCFast);
mbed_official 126:549ba18ddd81 1119 void TIM_ClearOC1Ref(TIM_TypeDef* TIMx, uint16_t TIM_OCClear);
mbed_official 126:549ba18ddd81 1120 void TIM_ClearOC2Ref(TIM_TypeDef* TIMx, uint16_t TIM_OCClear);
mbed_official 126:549ba18ddd81 1121 void TIM_ClearOC3Ref(TIM_TypeDef* TIMx, uint16_t TIM_OCClear);
mbed_official 126:549ba18ddd81 1122 void TIM_ClearOC4Ref(TIM_TypeDef* TIMx, uint16_t TIM_OCClear);
mbed_official 126:549ba18ddd81 1123 void TIM_OC1PolarityConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCPolarity);
mbed_official 126:549ba18ddd81 1124 void TIM_OC1NPolarityConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCNPolarity);
mbed_official 126:549ba18ddd81 1125 void TIM_OC2PolarityConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCPolarity);
mbed_official 126:549ba18ddd81 1126 void TIM_OC2NPolarityConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCNPolarity);
mbed_official 126:549ba18ddd81 1127 void TIM_OC3PolarityConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCPolarity);
mbed_official 126:549ba18ddd81 1128 void TIM_OC3NPolarityConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCNPolarity);
mbed_official 126:549ba18ddd81 1129 void TIM_OC4PolarityConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCPolarity);
mbed_official 126:549ba18ddd81 1130 void TIM_CCxCmd(TIM_TypeDef* TIMx, uint16_t TIM_Channel, uint16_t TIM_CCx);
mbed_official 126:549ba18ddd81 1131 void TIM_CCxNCmd(TIM_TypeDef* TIMx, uint16_t TIM_Channel, uint16_t TIM_CCxN);
mbed_official 126:549ba18ddd81 1132 void TIM_SelectOCxM(TIM_TypeDef* TIMx, uint16_t TIM_Channel, uint16_t TIM_OCMode);
mbed_official 126:549ba18ddd81 1133 void TIM_UpdateDisableConfig(TIM_TypeDef* TIMx, FunctionalState NewState);
mbed_official 126:549ba18ddd81 1134 void TIM_UpdateRequestConfig(TIM_TypeDef* TIMx, uint16_t TIM_UpdateSource);
mbed_official 126:549ba18ddd81 1135 void TIM_SelectHallSensor(TIM_TypeDef* TIMx, FunctionalState NewState);
mbed_official 126:549ba18ddd81 1136 void TIM_SelectOnePulseMode(TIM_TypeDef* TIMx, uint16_t TIM_OPMode);
mbed_official 126:549ba18ddd81 1137 void TIM_SelectOutputTrigger(TIM_TypeDef* TIMx, uint16_t TIM_TRGOSource);
mbed_official 126:549ba18ddd81 1138 void TIM_SelectSlaveMode(TIM_TypeDef* TIMx, uint16_t TIM_SlaveMode);
mbed_official 126:549ba18ddd81 1139 void TIM_SelectMasterSlaveMode(TIM_TypeDef* TIMx, uint16_t TIM_MasterSlaveMode);
mbed_official 126:549ba18ddd81 1140 void TIM_SetCounter(TIM_TypeDef* TIMx, uint16_t Counter);
mbed_official 126:549ba18ddd81 1141 void TIM_SetAutoreload(TIM_TypeDef* TIMx, uint16_t Autoreload);
mbed_official 126:549ba18ddd81 1142 void TIM_SetCompare1(TIM_TypeDef* TIMx, uint16_t Compare1);
mbed_official 126:549ba18ddd81 1143 void TIM_SetCompare2(TIM_TypeDef* TIMx, uint16_t Compare2);
mbed_official 126:549ba18ddd81 1144 void TIM_SetCompare3(TIM_TypeDef* TIMx, uint16_t Compare3);
mbed_official 126:549ba18ddd81 1145 void TIM_SetCompare4(TIM_TypeDef* TIMx, uint16_t Compare4);
mbed_official 126:549ba18ddd81 1146 void TIM_SetIC1Prescaler(TIM_TypeDef* TIMx, uint16_t TIM_ICPSC);
mbed_official 126:549ba18ddd81 1147 void TIM_SetIC2Prescaler(TIM_TypeDef* TIMx, uint16_t TIM_ICPSC);
mbed_official 126:549ba18ddd81 1148 void TIM_SetIC3Prescaler(TIM_TypeDef* TIMx, uint16_t TIM_ICPSC);
mbed_official 126:549ba18ddd81 1149 void TIM_SetIC4Prescaler(TIM_TypeDef* TIMx, uint16_t TIM_ICPSC);
mbed_official 126:549ba18ddd81 1150 void TIM_SetClockDivision(TIM_TypeDef* TIMx, uint16_t TIM_CKD);
mbed_official 126:549ba18ddd81 1151 uint16_t TIM_GetCapture1(TIM_TypeDef* TIMx);
mbed_official 126:549ba18ddd81 1152 uint16_t TIM_GetCapture2(TIM_TypeDef* TIMx);
mbed_official 126:549ba18ddd81 1153 uint16_t TIM_GetCapture3(TIM_TypeDef* TIMx);
mbed_official 126:549ba18ddd81 1154 uint16_t TIM_GetCapture4(TIM_TypeDef* TIMx);
mbed_official 126:549ba18ddd81 1155 uint16_t TIM_GetCounter(TIM_TypeDef* TIMx);
mbed_official 126:549ba18ddd81 1156 uint16_t TIM_GetPrescaler(TIM_TypeDef* TIMx);
mbed_official 126:549ba18ddd81 1157 FlagStatus TIM_GetFlagStatus(TIM_TypeDef* TIMx, uint16_t TIM_FLAG);
mbed_official 126:549ba18ddd81 1158 void TIM_ClearFlag(TIM_TypeDef* TIMx, uint16_t TIM_FLAG);
mbed_official 126:549ba18ddd81 1159 ITStatus TIM_GetITStatus(TIM_TypeDef* TIMx, uint16_t TIM_IT);
mbed_official 126:549ba18ddd81 1160 void TIM_ClearITPendingBit(TIM_TypeDef* TIMx, uint16_t TIM_IT);
mbed_official 126:549ba18ddd81 1161
mbed_official 126:549ba18ddd81 1162 #ifdef __cplusplus
mbed_official 126:549ba18ddd81 1163 }
mbed_official 126:549ba18ddd81 1164 #endif
mbed_official 126:549ba18ddd81 1165
mbed_official 126:549ba18ddd81 1166 #endif /*__STM32F10x_TIM_H */
mbed_official 126:549ba18ddd81 1167 /**
mbed_official 126:549ba18ddd81 1168 * @}
mbed_official 126:549ba18ddd81 1169 */
mbed_official 126:549ba18ddd81 1170
mbed_official 126:549ba18ddd81 1171 /**
mbed_official 126:549ba18ddd81 1172 * @}
mbed_official 126:549ba18ddd81 1173 */
mbed_official 126:549ba18ddd81 1174
mbed_official 126:549ba18ddd81 1175 /**
mbed_official 126:549ba18ddd81 1176 * @}
mbed_official 126:549ba18ddd81 1177 */
mbed_official 126:549ba18ddd81 1178
mbed_official 126:549ba18ddd81 1179 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/