shao ziyang / mbed-src-kl05

mbed library sources

Dependents:   frdm_kl05z_gpio_test

Fork of mbed-src by mbed official

targets/cmsis/TARGET_NXP/TARGET_LPC176X/TOOLCHAIN_ARM_MICRO/startup_LPC17xx.s@323:9e901b0a5aa1, 2014-09-13 (annotated)

Committer:
shaoziyang
Date:
Sat Sep 13 14:25:46 2014 +0000
Revision:
323:9e901b0a5aa1
Parent:
13:0645d8841f51 
test with CLOCK_SETUP = 0

Who changed what in which revision?

UserRevisionLine numberNew contents of line
emilmont 10:3bc89ef62ce7 1 ;/*****************************************************************************
emilmont 10:3bc89ef62ce7 2 ; * @file: startup_LPC17xx.s
emilmont 10:3bc89ef62ce7 3 ; * @purpose: CMSIS Cortex-M3 Core Device Startup File
emilmont 10:3bc89ef62ce7 4 ; * for the NXP LPC17xx Device Series
emilmont 10:3bc89ef62ce7 5 ; * @version: V1.02, modified for mbed
emilmont 10:3bc89ef62ce7 6 ; * @date: 27. July 2009, modified 3rd Aug 2009
emilmont 10:3bc89ef62ce7 7 ; *------- <<< Use Configuration Wizard in Context Menu >>> ------------------
emilmont 10:3bc89ef62ce7 8 ; *
emilmont 10:3bc89ef62ce7 9 ; * Copyright (C) 2009 ARM Limited. All rights reserved.
emilmont 10:3bc89ef62ce7 10 ; * ARM Limited (ARM) is supplying this software for use with Cortex-M3
emilmont 10:3bc89ef62ce7 11 ; * processor based microcontrollers. This file can be freely distributed
emilmont 10:3bc89ef62ce7 12 ; * within development tools that are supporting such ARM based processors.
emilmont 10:3bc89ef62ce7 13 ; *
emilmont 10:3bc89ef62ce7 14 ; * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
emilmont 10:3bc89ef62ce7 15 ; * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
emilmont 10:3bc89ef62ce7 16 ; * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
emilmont 10:3bc89ef62ce7 17 ; * ARM SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR
emilmont 10:3bc89ef62ce7 18 ; * CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
emilmont 10:3bc89ef62ce7 19 ; *
emilmont 10:3bc89ef62ce7 20 ; *****************************************************************************/
emilmont 10:3bc89ef62ce7 21
emilmont 10:3bc89ef62ce7 22 Stack_Size EQU 0x00000400
emilmont 10:3bc89ef62ce7 23
emilmont 10:3bc89ef62ce7 24 AREA STACK, NOINIT, READWRITE, ALIGN=3
emilmont 10:3bc89ef62ce7 25 EXPORT __initial_sp
emilmont 10:3bc89ef62ce7 26
emilmont 10:3bc89ef62ce7 27 Stack_Mem SPACE Stack_Size
emilmont 10:3bc89ef62ce7 28 __initial_sp EQU 0x10008000 ; Top of RAM from LPC1768
emilmont 10:3bc89ef62ce7 29
emilmont 10:3bc89ef62ce7 30
emilmont 10:3bc89ef62ce7 31 Heap_Size EQU 0x00000000
emilmont 10:3bc89ef62ce7 32
emilmont 10:3bc89ef62ce7 33 AREA HEAP, NOINIT, READWRITE, ALIGN=3
emilmont 10:3bc89ef62ce7 34 EXPORT __heap_base
emilmont 10:3bc89ef62ce7 35 EXPORT __heap_limit
emilmont 10:3bc89ef62ce7 36
emilmont 10:3bc89ef62ce7 37 __heap_base
emilmont 10:3bc89ef62ce7 38 Heap_Mem SPACE Heap_Size
emilmont 10:3bc89ef62ce7 39 __heap_limit
emilmont 10:3bc89ef62ce7 40
emilmont 10:3bc89ef62ce7 41 PRESERVE8
emilmont 10:3bc89ef62ce7 42 THUMB
emilmont 10:3bc89ef62ce7 43
emilmont 10:3bc89ef62ce7 44 ; Vector Table Mapped to Address 0 at Reset
emilmont 10:3bc89ef62ce7 45
emilmont 10:3bc89ef62ce7 46 AREA RESET, DATA, READONLY
emilmont 10:3bc89ef62ce7 47 EXPORT __Vectors
emilmont 10:3bc89ef62ce7 48
emilmont 10:3bc89ef62ce7 49 __Vectors DCD __initial_sp ; Top of Stack
emilmont 10:3bc89ef62ce7 50 DCD Reset_Handler ; Reset Handler
emilmont 10:3bc89ef62ce7 51 DCD NMI_Handler ; NMI Handler
emilmont 10:3bc89ef62ce7 52 DCD HardFault_Handler ; Hard Fault Handler
emilmont 10:3bc89ef62ce7 53 DCD MemManage_Handler ; MPU Fault Handler
emilmont 10:3bc89ef62ce7 54 DCD BusFault_Handler ; Bus Fault Handler
emilmont 10:3bc89ef62ce7 55 DCD UsageFault_Handler ; Usage Fault Handler
emilmont 10:3bc89ef62ce7 56 DCD 0 ; Reserved
emilmont 10:3bc89ef62ce7 57 DCD 0 ; Reserved
emilmont 10:3bc89ef62ce7 58 DCD 0 ; Reserved
emilmont 10:3bc89ef62ce7 59 DCD 0 ; Reserved
emilmont 10:3bc89ef62ce7 60 DCD SVC_Handler ; SVCall Handler
emilmont 10:3bc89ef62ce7 61 DCD DebugMon_Handler ; Debug Monitor Handler
emilmont 10:3bc89ef62ce7 62 DCD 0 ; Reserved
emilmont 10:3bc89ef62ce7 63 DCD PendSV_Handler ; PendSV Handler
emilmont 10:3bc89ef62ce7 64 DCD SysTick_Handler ; SysTick Handler
emilmont 10:3bc89ef62ce7 65
emilmont 10:3bc89ef62ce7 66 ; External Interrupts
emilmont 10:3bc89ef62ce7 67 DCD WDT_IRQHandler ; 16: Watchdog Timer
emilmont 10:3bc89ef62ce7 68 DCD TIMER0_IRQHandler ; 17: Timer0
emilmont 10:3bc89ef62ce7 69 DCD TIMER1_IRQHandler ; 18: Timer1
emilmont 10:3bc89ef62ce7 70 DCD TIMER2_IRQHandler ; 19: Timer2
emilmont 10:3bc89ef62ce7 71 DCD TIMER3_IRQHandler ; 20: Timer3
emilmont 10:3bc89ef62ce7 72 DCD UART0_IRQHandler ; 21: UART0
emilmont 10:3bc89ef62ce7 73 DCD UART1_IRQHandler ; 22: UART1
emilmont 10:3bc89ef62ce7 74 DCD UART2_IRQHandler ; 23: UART2
emilmont 10:3bc89ef62ce7 75 DCD UART3_IRQHandler ; 24: UART3
emilmont 10:3bc89ef62ce7 76 DCD PWM1_IRQHandler ; 25: PWM1
emilmont 10:3bc89ef62ce7 77 DCD I2C0_IRQHandler ; 26: I2C0
emilmont 10:3bc89ef62ce7 78 DCD I2C1_IRQHandler ; 27: I2C1
emilmont 10:3bc89ef62ce7 79 DCD I2C2_IRQHandler ; 28: I2C2
emilmont 10:3bc89ef62ce7 80 DCD SPI_IRQHandler ; 29: SPI
emilmont 10:3bc89ef62ce7 81 DCD SSP0_IRQHandler ; 30: SSP0
emilmont 10:3bc89ef62ce7 82 DCD SSP1_IRQHandler ; 31: SSP1
emilmont 10:3bc89ef62ce7 83 DCD PLL0_IRQHandler ; 32: PLL0 Lock (Main PLL)
emilmont 10:3bc89ef62ce7 84 DCD RTC_IRQHandler ; 33: Real Time Clock
emilmont 10:3bc89ef62ce7 85 DCD EINT0_IRQHandler ; 34: External Interrupt 0
emilmont 10:3bc89ef62ce7 86 DCD EINT1_IRQHandler ; 35: External Interrupt 1
emilmont 10:3bc89ef62ce7 87 DCD EINT2_IRQHandler ; 36: External Interrupt 2
emilmont 10:3bc89ef62ce7 88 DCD EINT3_IRQHandler ; 37: External Interrupt 3
emilmont 10:3bc89ef62ce7 89 DCD ADC_IRQHandler ; 38: A/D Converter
emilmont 10:3bc89ef62ce7 90 DCD BOD_IRQHandler ; 39: Brown-Out Detect
emilmont 10:3bc89ef62ce7 91 DCD USB_IRQHandler ; 40: USB
emilmont 10:3bc89ef62ce7 92 DCD CAN_IRQHandler ; 41: CAN
emilmont 10:3bc89ef62ce7 93 DCD DMA_IRQHandler ; 42: General Purpose DMA
emilmont 10:3bc89ef62ce7 94 DCD I2S_IRQHandler ; 43: I2S
emilmont 10:3bc89ef62ce7 95 DCD ENET_IRQHandler ; 44: Ethernet
emilmont 10:3bc89ef62ce7 96 DCD RIT_IRQHandler ; 45: Repetitive Interrupt Timer
emilmont 10:3bc89ef62ce7 97 DCD MCPWM_IRQHandler ; 46: Motor Control PWM
emilmont 10:3bc89ef62ce7 98 DCD QEI_IRQHandler ; 47: Quadrature Encoder Interface
emilmont 10:3bc89ef62ce7 99 DCD PLL1_IRQHandler ; 48: PLL1 Lock (USB PLL)
emilmont 10:3bc89ef62ce7 100
emilmont 10:3bc89ef62ce7 101
emilmont 10:3bc89ef62ce7 102 IF :LNOT::DEF:NO_CRP
emilmont 10:3bc89ef62ce7 103 AREA |.ARM.__at_0x02FC|, CODE, READONLY
emilmont 10:3bc89ef62ce7 104 CRP_Key DCD 0xFFFFFFFF
emilmont 10:3bc89ef62ce7 105 ENDIF
emilmont 10:3bc89ef62ce7 106
emilmont 10:3bc89ef62ce7 107
emilmont 10:3bc89ef62ce7 108 AREA |.text|, CODE, READONLY
emilmont 10:3bc89ef62ce7 109
emilmont 10:3bc89ef62ce7 110
emilmont 10:3bc89ef62ce7 111 ; Reset Handler
emilmont 10:3bc89ef62ce7 112
emilmont 10:3bc89ef62ce7 113 Reset_Handler PROC
emilmont 10:3bc89ef62ce7 114 EXPORT Reset_Handler [WEAK]
emilmont 10:3bc89ef62ce7 115 IMPORT SystemInit
emilmont 10:3bc89ef62ce7 116 IMPORT __main
emilmont 10:3bc89ef62ce7 117 LDR R0, =SystemInit
emilmont 10:3bc89ef62ce7 118 BLX R0
emilmont 10:3bc89ef62ce7 119 LDR R0, =__main
emilmont 10:3bc89ef62ce7 120 BX R0
emilmont 10:3bc89ef62ce7 121 ENDP
emilmont 10:3bc89ef62ce7 122
emilmont 10:3bc89ef62ce7 123
emilmont 10:3bc89ef62ce7 124 ; Dummy Exception Handlers (infinite loops which can be modified)
emilmont 10:3bc89ef62ce7 125
emilmont 10:3bc89ef62ce7 126 NMI_Handler PROC
emilmont 10:3bc89ef62ce7 127 EXPORT NMI_Handler [WEAK]
emilmont 10:3bc89ef62ce7 128 B .
emilmont 10:3bc89ef62ce7 129 ENDP
emilmont 10:3bc89ef62ce7 130 HardFault_Handler\
emilmont 10:3bc89ef62ce7 131 PROC
emilmont 10:3bc89ef62ce7 132 EXPORT HardFault_Handler [WEAK]
emilmont 10:3bc89ef62ce7 133 B .
emilmont 10:3bc89ef62ce7 134 ENDP
emilmont 10:3bc89ef62ce7 135 MemManage_Handler\
emilmont 10:3bc89ef62ce7 136 PROC
emilmont 10:3bc89ef62ce7 137 EXPORT MemManage_Handler [WEAK]
emilmont 10:3bc89ef62ce7 138 B .
emilmont 10:3bc89ef62ce7 139 ENDP
emilmont 10:3bc89ef62ce7 140 BusFault_Handler\
emilmont 10:3bc89ef62ce7 141 PROC
emilmont 10:3bc89ef62ce7 142 EXPORT BusFault_Handler [WEAK]
emilmont 10:3bc89ef62ce7 143 B .
emilmont 10:3bc89ef62ce7 144 ENDP
emilmont 10:3bc89ef62ce7 145 UsageFault_Handler\
emilmont 10:3bc89ef62ce7 146 PROC
emilmont 10:3bc89ef62ce7 147 EXPORT UsageFault_Handler [WEAK]
emilmont 10:3bc89ef62ce7 148 B .
emilmont 10:3bc89ef62ce7 149 ENDP
emilmont 10:3bc89ef62ce7 150 SVC_Handler PROC
emilmont 10:3bc89ef62ce7 151 EXPORT SVC_Handler [WEAK]
emilmont 10:3bc89ef62ce7 152 B .
emilmont 10:3bc89ef62ce7 153 ENDP
emilmont 10:3bc89ef62ce7 154 DebugMon_Handler\
emilmont 10:3bc89ef62ce7 155 PROC
emilmont 10:3bc89ef62ce7 156 EXPORT DebugMon_Handler [WEAK]
emilmont 10:3bc89ef62ce7 157 B .
emilmont 10:3bc89ef62ce7 158 ENDP
emilmont 10:3bc89ef62ce7 159 PendSV_Handler PROC
emilmont 10:3bc89ef62ce7 160 EXPORT PendSV_Handler [WEAK]
emilmont 10:3bc89ef62ce7 161 B .
emilmont 10:3bc89ef62ce7 162 ENDP
emilmont 10:3bc89ef62ce7 163 SysTick_Handler PROC
emilmont 10:3bc89ef62ce7 164 EXPORT SysTick_Handler [WEAK]
emilmont 10:3bc89ef62ce7 165 B .
emilmont 10:3bc89ef62ce7 166 ENDP
emilmont 10:3bc89ef62ce7 167
emilmont 10:3bc89ef62ce7 168 Default_Handler PROC
emilmont 10:3bc89ef62ce7 169
emilmont 10:3bc89ef62ce7 170 EXPORT WDT_IRQHandler [WEAK]
emilmont 10:3bc89ef62ce7 171 EXPORT TIMER0_IRQHandler [WEAK]
emilmont 10:3bc89ef62ce7 172 EXPORT TIMER1_IRQHandler [WEAK]
emilmont 10:3bc89ef62ce7 173 EXPORT TIMER2_IRQHandler [WEAK]
emilmont 10:3bc89ef62ce7 174 EXPORT TIMER3_IRQHandler [WEAK]
emilmont 10:3bc89ef62ce7 175 EXPORT UART0_IRQHandler [WEAK]
emilmont 10:3bc89ef62ce7 176 EXPORT UART1_IRQHandler [WEAK]
emilmont 10:3bc89ef62ce7 177 EXPORT UART2_IRQHandler [WEAK]
emilmont 10:3bc89ef62ce7 178 EXPORT UART3_IRQHandler [WEAK]
emilmont 10:3bc89ef62ce7 179 EXPORT PWM1_IRQHandler [WEAK]
emilmont 10:3bc89ef62ce7 180 EXPORT I2C0_IRQHandler [WEAK]
emilmont 10:3bc89ef62ce7 181 EXPORT I2C1_IRQHandler [WEAK]
emilmont 10:3bc89ef62ce7 182 EXPORT I2C2_IRQHandler [WEAK]
emilmont 10:3bc89ef62ce7 183 EXPORT SPI_IRQHandler [WEAK]
emilmont 10:3bc89ef62ce7 184 EXPORT SSP0_IRQHandler [WEAK]
emilmont 10:3bc89ef62ce7 185 EXPORT SSP1_IRQHandler [WEAK]
emilmont 10:3bc89ef62ce7 186 EXPORT PLL0_IRQHandler [WEAK]
emilmont 10:3bc89ef62ce7 187 EXPORT RTC_IRQHandler [WEAK]
emilmont 10:3bc89ef62ce7 188 EXPORT EINT0_IRQHandler [WEAK]
emilmont 10:3bc89ef62ce7 189 EXPORT EINT1_IRQHandler [WEAK]
emilmont 10:3bc89ef62ce7 190 EXPORT EINT2_IRQHandler [WEAK]
emilmont 10:3bc89ef62ce7 191 EXPORT EINT3_IRQHandler [WEAK]
emilmont 10:3bc89ef62ce7 192 EXPORT ADC_IRQHandler [WEAK]
emilmont 10:3bc89ef62ce7 193 EXPORT BOD_IRQHandler [WEAK]
emilmont 10:3bc89ef62ce7 194 EXPORT USB_IRQHandler [WEAK]
emilmont 10:3bc89ef62ce7 195 EXPORT CAN_IRQHandler [WEAK]
emilmont 10:3bc89ef62ce7 196 EXPORT DMA_IRQHandler [WEAK]
emilmont 10:3bc89ef62ce7 197 EXPORT I2S_IRQHandler [WEAK]
emilmont 10:3bc89ef62ce7 198 EXPORT ENET_IRQHandler [WEAK]
emilmont 10:3bc89ef62ce7 199 EXPORT RIT_IRQHandler [WEAK]
emilmont 10:3bc89ef62ce7 200 EXPORT MCPWM_IRQHandler [WEAK]
emilmont 10:3bc89ef62ce7 201 EXPORT QEI_IRQHandler [WEAK]
emilmont 10:3bc89ef62ce7 202 EXPORT PLL1_IRQHandler [WEAK]
emilmont 10:3bc89ef62ce7 203
emilmont 10:3bc89ef62ce7 204 WDT_IRQHandler
emilmont 10:3bc89ef62ce7 205 TIMER0_IRQHandler
emilmont 10:3bc89ef62ce7 206 TIMER1_IRQHandler
emilmont 10:3bc89ef62ce7 207 TIMER2_IRQHandler
emilmont 10:3bc89ef62ce7 208 TIMER3_IRQHandler
emilmont 10:3bc89ef62ce7 209 UART0_IRQHandler
emilmont 10:3bc89ef62ce7 210 UART1_IRQHandler
emilmont 10:3bc89ef62ce7 211 UART2_IRQHandler
emilmont 10:3bc89ef62ce7 212 UART3_IRQHandler
emilmont 10:3bc89ef62ce7 213 PWM1_IRQHandler
emilmont 10:3bc89ef62ce7 214 I2C0_IRQHandler
emilmont 10:3bc89ef62ce7 215 I2C1_IRQHandler
emilmont 10:3bc89ef62ce7 216 I2C2_IRQHandler
emilmont 10:3bc89ef62ce7 217 SPI_IRQHandler
emilmont 10:3bc89ef62ce7 218 SSP0_IRQHandler
emilmont 10:3bc89ef62ce7 219 SSP1_IRQHandler
emilmont 10:3bc89ef62ce7 220 PLL0_IRQHandler
emilmont 10:3bc89ef62ce7 221 RTC_IRQHandler
emilmont 10:3bc89ef62ce7 222 EINT0_IRQHandler
emilmont 10:3bc89ef62ce7 223 EINT1_IRQHandler
emilmont 10:3bc89ef62ce7 224 EINT2_IRQHandler
emilmont 10:3bc89ef62ce7 225 EINT3_IRQHandler
emilmont 10:3bc89ef62ce7 226 ADC_IRQHandler
emilmont 10:3bc89ef62ce7 227 BOD_IRQHandler
emilmont 10:3bc89ef62ce7 228 USB_IRQHandler
emilmont 10:3bc89ef62ce7 229 CAN_IRQHandler
emilmont 10:3bc89ef62ce7 230 DMA_IRQHandler
emilmont 10:3bc89ef62ce7 231 I2S_IRQHandler
emilmont 10:3bc89ef62ce7 232 ENET_IRQHandler
emilmont 10:3bc89ef62ce7 233 RIT_IRQHandler
emilmont 10:3bc89ef62ce7 234 MCPWM_IRQHandler
emilmont 10:3bc89ef62ce7 235 QEI_IRQHandler
emilmont 10:3bc89ef62ce7 236 PLL1_IRQHandler
emilmont 10:3bc89ef62ce7 237
emilmont 10:3bc89ef62ce7 238 B .
emilmont 10:3bc89ef62ce7 239
emilmont 10:3bc89ef62ce7 240 ENDP
emilmont 10:3bc89ef62ce7 241
emilmont 10:3bc89ef62ce7 242 ALIGN
emilmont 10:3bc89ef62ce7 243 END