shao ziyang / mbed-src-kl05

mbed library sources

Dependents:   frdm_kl05z_gpio_test

Fork of mbed-src by mbed official

targets/hal/TARGET_NXP/TARGET_LPC15XX/serial_api.c@103:9b881da47c92, 2014-02-20 (annotated)

Committer:
mbed_official
Date:
Thu Feb 20 23:00:08 2014 +0000
Revision:
103:9b881da47c92
Child:
182:242346c42295
Synchronized with git revision 1f2da5f6047218c8c45334c11bdaaaeab3c18841



Full URL: https://github.com/mbedmicro/mbed/commit/1f2da5f6047218c8c45334c11bdaaaeab3c18841/



NXP master merge

Who changed what in which revision?

UserRevisionLine numberNew contents of line
mbed_official 103:9b881da47c92 1 /* mbed Microcontroller Library
mbed_official 103:9b881da47c92 2 * Copyright (c) 2006-2013 ARM Limited
mbed_official 103:9b881da47c92 3 *
mbed_official 103:9b881da47c92 4 * Licensed under the Apache License, Version 2.0 (the "License");
mbed_official 103:9b881da47c92 5 * you may not use this file except in compliance with the License.
mbed_official 103:9b881da47c92 6 * You may obtain a copy of the License at
mbed_official 103:9b881da47c92 7 *
mbed_official 103:9b881da47c92 8 * http://www.apache.org/licenses/LICENSE-2.0
mbed_official 103:9b881da47c92 9 *
mbed_official 103:9b881da47c92 10 * Unless required by applicable law or agreed to in writing, software
mbed_official 103:9b881da47c92 11 * distributed under the License is distributed on an "AS IS" BASIS,
mbed_official 103:9b881da47c92 12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
mbed_official 103:9b881da47c92 13 * See the License for the specific language governing permissions and
mbed_official 103:9b881da47c92 14 * limitations under the License.
mbed_official 103:9b881da47c92 15 */
mbed_official 103:9b881da47c92 16 // math.h required for floating point operations for baud rate calculation
mbed_official 103:9b881da47c92 17 #include <math.h>
mbed_official 103:9b881da47c92 18 #include <string.h>
mbed_official 103:9b881da47c92 19
mbed_official 103:9b881da47c92 20 #include "serial_api.h"
mbed_official 103:9b881da47c92 21 #include "cmsis.h"
mbed_official 103:9b881da47c92 22 #include "pinmap.h"
mbed_official 103:9b881da47c92 23 #include "error.h"
mbed_official 103:9b881da47c92 24
mbed_official 103:9b881da47c92 25 /******************************************************************************
mbed_official 103:9b881da47c92 26 * INITIALIZATION
mbed_official 103:9b881da47c92 27 ******************************************************************************/
mbed_official 103:9b881da47c92 28 #define UART_NUM 3
mbed_official 103:9b881da47c92 29
mbed_official 103:9b881da47c92 30 static const SWM_Map SWM_UART_TX[] = {
mbed_official 103:9b881da47c92 31 {0, 0}, // Pin assign register0, 7:0bit
mbed_official 103:9b881da47c92 32 {1, 8}, // Pin assign register1, 15:8bit
mbed_official 103:9b881da47c92 33 {2, 16}, // Pin assign register2, 23:16bit
mbed_official 103:9b881da47c92 34 };
mbed_official 103:9b881da47c92 35
mbed_official 103:9b881da47c92 36 static const SWM_Map SWM_UART_RX[] = {
mbed_official 103:9b881da47c92 37 {0, 8},
mbed_official 103:9b881da47c92 38 {1, 16},
mbed_official 103:9b881da47c92 39 {2, 24},
mbed_official 103:9b881da47c92 40 };
mbed_official 103:9b881da47c92 41
mbed_official 103:9b881da47c92 42 static const SWM_Map SWM_UART_RTS[] = {
mbed_official 103:9b881da47c92 43 {0, 16},
mbed_official 103:9b881da47c92 44 {1, 24},
mbed_official 103:9b881da47c92 45 {3, 0},
mbed_official 103:9b881da47c92 46 };
mbed_official 103:9b881da47c92 47
mbed_official 103:9b881da47c92 48 static const SWM_Map SWM_UART_CTS[] = {
mbed_official 103:9b881da47c92 49 {0, 24},
mbed_official 103:9b881da47c92 50 {2, 0},
mbed_official 103:9b881da47c92 51 {3, 8}
mbed_official 103:9b881da47c92 52 };
mbed_official 103:9b881da47c92 53
mbed_official 103:9b881da47c92 54 // bit flags for used UARTs
mbed_official 103:9b881da47c92 55 static unsigned char uart_used = 0;
mbed_official 103:9b881da47c92 56 static int get_available_uart(void) {
mbed_official 103:9b881da47c92 57 int i;
mbed_official 103:9b881da47c92 58 for (i=0; i<3; i++) {
mbed_official 103:9b881da47c92 59 if ((uart_used & (1 << i)) == 0)
mbed_official 103:9b881da47c92 60 return i;
mbed_official 103:9b881da47c92 61 }
mbed_official 103:9b881da47c92 62 return -1;
mbed_official 103:9b881da47c92 63 }
mbed_official 103:9b881da47c92 64
mbed_official 103:9b881da47c92 65 #define UART_EN (0x01<<0)
mbed_official 103:9b881da47c92 66
mbed_official 103:9b881da47c92 67 #define CTS_DELTA (0x01<<5)
mbed_official 103:9b881da47c92 68 #define RXBRK (0x01<<10)
mbed_official 103:9b881da47c92 69 #define DELTA_RXBRK (0x01<<11)
mbed_official 103:9b881da47c92 70
mbed_official 103:9b881da47c92 71 #define RXRDY (0x01<<0)
mbed_official 103:9b881da47c92 72 #define TXRDY (0x01<<2)
mbed_official 103:9b881da47c92 73
mbed_official 103:9b881da47c92 74 #define TXBRKEN (0x01<<1)
mbed_official 103:9b881da47c92 75 #define CTSEN (0x01<<9)
mbed_official 103:9b881da47c92 76
mbed_official 103:9b881da47c92 77 static uint32_t UARTSysClk;
mbed_official 103:9b881da47c92 78
mbed_official 103:9b881da47c92 79 static uint32_t serial_irq_ids[UART_NUM] = {0};
mbed_official 103:9b881da47c92 80 static uart_irq_handler irq_handler;
mbed_official 103:9b881da47c92 81
mbed_official 103:9b881da47c92 82 int stdio_uart_inited = 0;
mbed_official 103:9b881da47c92 83 serial_t stdio_uart;
mbed_official 103:9b881da47c92 84
mbed_official 103:9b881da47c92 85 void serial_init(serial_t *obj, PinName tx, PinName rx) {
mbed_official 103:9b881da47c92 86 int is_stdio_uart = 0;
mbed_official 103:9b881da47c92 87
mbed_official 103:9b881da47c92 88 int uart_n = get_available_uart();
mbed_official 103:9b881da47c92 89 if (uart_n == -1) {
mbed_official 103:9b881da47c92 90 error("No available UART");
mbed_official 103:9b881da47c92 91 }
mbed_official 103:9b881da47c92 92 obj->index = uart_n;
mbed_official 103:9b881da47c92 93 obj->uart = (LPC_USART0_Type *)(LPC_USART0_BASE + (0x4000 * uart_n));
mbed_official 103:9b881da47c92 94 uart_used |= (1 << uart_n);
mbed_official 103:9b881da47c92 95
mbed_official 103:9b881da47c92 96 const SWM_Map *swm;
mbed_official 103:9b881da47c92 97 uint32_t regVal;
mbed_official 103:9b881da47c92 98
mbed_official 103:9b881da47c92 99 swm = &SWM_UART_TX[uart_n];
mbed_official 103:9b881da47c92 100 regVal = LPC_SWM->PINASSIGN[swm->n] & ~(0xFF << swm->offset);
mbed_official 103:9b881da47c92 101 LPC_SWM->PINASSIGN[swm->n] = regVal | (tx << swm->offset);
mbed_official 103:9b881da47c92 102
mbed_official 103:9b881da47c92 103 swm = &SWM_UART_RX[uart_n];
mbed_official 103:9b881da47c92 104 regVal = LPC_SWM->PINASSIGN[swm->n] & ~(0xFF << swm->offset);
mbed_official 103:9b881da47c92 105 LPC_SWM->PINASSIGN[swm->n] = regVal | (rx << swm->offset);
mbed_official 103:9b881da47c92 106
mbed_official 103:9b881da47c92 107 /* uart clock divided by 6 */
mbed_official 103:9b881da47c92 108 LPC_SYSCON->UARTCLKDIV =6;
mbed_official 103:9b881da47c92 109
mbed_official 103:9b881da47c92 110 /* disable uart interrupts */
mbed_official 103:9b881da47c92 111 NVIC_DisableIRQ((IRQn_Type)(UART0_IRQn + uart_n));
mbed_official 103:9b881da47c92 112
mbed_official 103:9b881da47c92 113 /* Enable UART clock */
mbed_official 103:9b881da47c92 114 LPC_SYSCON->SYSAHBCLKCTRL1 |= (1 << (17 + uart_n));
mbed_official 103:9b881da47c92 115
mbed_official 103:9b881da47c92 116 /* Peripheral reset control to UART, a "1" bring it out of reset. */
mbed_official 103:9b881da47c92 117 // LPC_SYSCON->PRESETCTRL1 &= ~(0x1 << (17 + uart_n));
mbed_official 103:9b881da47c92 118 LPC_SYSCON->PRESETCTRL1 |= (0x1 << (17 + uart_n));
mbed_official 103:9b881da47c92 119 LPC_SYSCON->PRESETCTRL1 ^= (0x1 << (17 + uart_n));
mbed_official 103:9b881da47c92 120
mbed_official 103:9b881da47c92 121 UARTSysClk = SystemCoreClock / LPC_SYSCON->UARTCLKDIV;
mbed_official 103:9b881da47c92 122
mbed_official 103:9b881da47c92 123 // set default baud rate and format
mbed_official 103:9b881da47c92 124 serial_baud (obj, 9600);
mbed_official 103:9b881da47c92 125 serial_format(obj, 8, ParityNone, 1);
mbed_official 103:9b881da47c92 126
mbed_official 103:9b881da47c92 127 /* Clear all status bits. */
mbed_official 103:9b881da47c92 128 obj->uart->STAT = CTS_DELTA | DELTA_RXBRK;
mbed_official 103:9b881da47c92 129
mbed_official 103:9b881da47c92 130 /* enable uart interrupts */
mbed_official 103:9b881da47c92 131 NVIC_EnableIRQ((IRQn_Type)(UART0_IRQn + uart_n));
mbed_official 103:9b881da47c92 132
mbed_official 103:9b881da47c92 133 /* Enable UART interrupt */
mbed_official 103:9b881da47c92 134 // obj->uart->INTENSET = RXRDY | TXRDY | DELTA_RXBRK;
mbed_official 103:9b881da47c92 135
mbed_official 103:9b881da47c92 136 /* Enable UART */
mbed_official 103:9b881da47c92 137 obj->uart->CFG |= UART_EN;
mbed_official 103:9b881da47c92 138
mbed_official 103:9b881da47c92 139 is_stdio_uart = ((tx == USBTX) && (rx == USBRX));
mbed_official 103:9b881da47c92 140
mbed_official 103:9b881da47c92 141 if (is_stdio_uart) {
mbed_official 103:9b881da47c92 142 stdio_uart_inited = 1;
mbed_official 103:9b881da47c92 143 memcpy(&stdio_uart, obj, sizeof(serial_t));
mbed_official 103:9b881da47c92 144 }
mbed_official 103:9b881da47c92 145 }
mbed_official 103:9b881da47c92 146
mbed_official 103:9b881da47c92 147 void serial_free(serial_t *obj) {
mbed_official 103:9b881da47c92 148 uart_used &= ~(1 << obj->index);
mbed_official 103:9b881da47c92 149 serial_irq_ids[obj->index] = 0;
mbed_official 103:9b881da47c92 150 }
mbed_official 103:9b881da47c92 151
mbed_official 103:9b881da47c92 152 // serial_baud
mbed_official 103:9b881da47c92 153 // set the baud rate, taking in to account the current SystemFrequency
mbed_official 103:9b881da47c92 154 void serial_baud(serial_t *obj, int baudrate) {
mbed_official 103:9b881da47c92 155 /* Integer divider:
mbed_official 103:9b881da47c92 156 BRG = UARTSysClk/(Baudrate * 16) - 1
mbed_official 103:9b881da47c92 157
mbed_official 103:9b881da47c92 158 Frational divider:
mbed_official 103:9b881da47c92 159 FRG = ((UARTSysClk / (Baudrate * 16 * (BRG + 1))) - 1)
mbed_official 103:9b881da47c92 160
mbed_official 103:9b881da47c92 161 where
mbed_official 103:9b881da47c92 162 FRG = (LPC_SYSCON->UARTFRDADD + 1) / (LPC_SYSCON->UARTFRDSUB + 1)
mbed_official 103:9b881da47c92 163
mbed_official 103:9b881da47c92 164 (1) The easiest way is set SUB value to 256, -1 encoded, thus SUB
mbed_official 103:9b881da47c92 165 register is 0xFF.
mbed_official 103:9b881da47c92 166 (2) In ADD register value, depending on the value of UartSysClk,
mbed_official 103:9b881da47c92 167 baudrate, BRG register value, and SUB register value, be careful
mbed_official 103:9b881da47c92 168 about the order of multiplier and divider and make sure any
mbed_official 103:9b881da47c92 169 multiplier doesn't exceed 32-bit boundary and any divider doesn't get
mbed_official 103:9b881da47c92 170 down below one(integer 0).
mbed_official 103:9b881da47c92 171 (3) ADD should be always less than SUB.
mbed_official 103:9b881da47c92 172 */
mbed_official 103:9b881da47c92 173 obj->uart->BRG = UARTSysClk / 16 / baudrate - 1;
mbed_official 103:9b881da47c92 174
mbed_official 103:9b881da47c92 175 // To use of the fractional baud rate generator, you must write 0xFF to the DIV
mbed_official 103:9b881da47c92 176 // value to yield a denominator value of 256. All other values are not supported.
mbed_official 103:9b881da47c92 177 LPC_SYSCON->FRGCTRL = 0xFF;
mbed_official 103:9b881da47c92 178
mbed_official 103:9b881da47c92 179 LPC_SYSCON->FRGCTRL |= ( ( ((UARTSysClk / 16) * (0xFF + 1)) /
mbed_official 103:9b881da47c92 180 (baudrate * (obj->uart->BRG + 1))
mbed_official 103:9b881da47c92 181 ) - (0xFF + 1) ) << 8;
mbed_official 103:9b881da47c92 182
mbed_official 103:9b881da47c92 183 }
mbed_official 103:9b881da47c92 184
mbed_official 103:9b881da47c92 185 void serial_format(serial_t *obj, int data_bits, SerialParity parity, int stop_bits) {
mbed_official 103:9b881da47c92 186 // 0: 1 stop bits, 1: 2 stop bits
mbed_official 103:9b881da47c92 187 if (stop_bits != 1 && stop_bits != 2) {
mbed_official 103:9b881da47c92 188 error("Invalid stop bits specified");
mbed_official 103:9b881da47c92 189 }
mbed_official 103:9b881da47c92 190 stop_bits -= 1;
mbed_official 103:9b881da47c92 191
mbed_official 103:9b881da47c92 192 // 0: 7 data bits ... 2: 9 data bits
mbed_official 103:9b881da47c92 193 if (data_bits < 7 || data_bits > 9) {
mbed_official 103:9b881da47c92 194 error("Invalid number of bits (%d) in serial format, should be 7..9", data_bits);
mbed_official 103:9b881da47c92 195 }
mbed_official 103:9b881da47c92 196 data_bits -= 7;
mbed_official 103:9b881da47c92 197
mbed_official 103:9b881da47c92 198 int paritysel;
mbed_official 103:9b881da47c92 199 switch (parity) {
mbed_official 103:9b881da47c92 200 case ParityNone: paritysel = 0; break;
mbed_official 103:9b881da47c92 201 case ParityEven: paritysel = 2; break;
mbed_official 103:9b881da47c92 202 case ParityOdd : paritysel = 3; break;
mbed_official 103:9b881da47c92 203 default:
mbed_official 103:9b881da47c92 204 error("Invalid serial parity setting");
mbed_official 103:9b881da47c92 205 return;
mbed_official 103:9b881da47c92 206 }
mbed_official 103:9b881da47c92 207
mbed_official 103:9b881da47c92 208 obj->uart->CFG = (data_bits << 2)
mbed_official 103:9b881da47c92 209 | (paritysel << 4)
mbed_official 103:9b881da47c92 210 | (stop_bits << 6);
mbed_official 103:9b881da47c92 211 }
mbed_official 103:9b881da47c92 212
mbed_official 103:9b881da47c92 213 /******************************************************************************
mbed_official 103:9b881da47c92 214 * INTERRUPTS HANDLING
mbed_official 103:9b881da47c92 215 ******************************************************************************/
mbed_official 103:9b881da47c92 216 static inline void uart_irq(uint32_t iir, uint32_t index) {
mbed_official 103:9b881da47c92 217 // [Chapter 14] LPC17xx UART0/2/3: UARTn Interrupt Handling
mbed_official 103:9b881da47c92 218 SerialIrq irq_type;
mbed_official 103:9b881da47c92 219 switch (iir) {
mbed_official 103:9b881da47c92 220 case 1: irq_type = TxIrq; break;
mbed_official 103:9b881da47c92 221 case 2: irq_type = RxIrq; break;
mbed_official 103:9b881da47c92 222 default: return;
mbed_official 103:9b881da47c92 223 }
mbed_official 103:9b881da47c92 224
mbed_official 103:9b881da47c92 225 if (serial_irq_ids[index] != 0)
mbed_official 103:9b881da47c92 226 irq_handler(serial_irq_ids[index], irq_type);
mbed_official 103:9b881da47c92 227 }
mbed_official 103:9b881da47c92 228
mbed_official 103:9b881da47c92 229 void uart0_irq() {uart_irq((LPC_USART0->STAT & (1 << 2)) ? 2 : 1, 0);}
mbed_official 103:9b881da47c92 230 void uart1_irq() {uart_irq((LPC_USART1->STAT & (1 << 2)) ? 2 : 1, 1);}
mbed_official 103:9b881da47c92 231 void uart2_irq() {uart_irq((LPC_USART2->STAT & (1 << 2)) ? 2 : 1, 2);}
mbed_official 103:9b881da47c92 232
mbed_official 103:9b881da47c92 233 void serial_irq_handler(serial_t *obj, uart_irq_handler handler, uint32_t id) {
mbed_official 103:9b881da47c92 234 irq_handler = handler;
mbed_official 103:9b881da47c92 235 serial_irq_ids[obj->index] = id;
mbed_official 103:9b881da47c92 236 }
mbed_official 103:9b881da47c92 237
mbed_official 103:9b881da47c92 238 void serial_irq_set(serial_t *obj, SerialIrq irq, uint32_t enable) {
mbed_official 103:9b881da47c92 239 IRQn_Type irq_n = (IRQn_Type)0;
mbed_official 103:9b881da47c92 240 uint32_t vector = 0;
mbed_official 103:9b881da47c92 241 switch ((int)obj->uart) {
mbed_official 103:9b881da47c92 242 case LPC_USART0_BASE: irq_n=UART0_IRQn; vector = (uint32_t)&uart0_irq; break;
mbed_official 103:9b881da47c92 243 case LPC_USART1_BASE: irq_n=UART1_IRQn; vector = (uint32_t)&uart1_irq; break;
mbed_official 103:9b881da47c92 244 case LPC_USART2_BASE: irq_n=UART2_IRQn; vector = (uint32_t)&uart2_irq; break;
mbed_official 103:9b881da47c92 245 }
mbed_official 103:9b881da47c92 246
mbed_official 103:9b881da47c92 247 if (enable) {
mbed_official 103:9b881da47c92 248 obj->uart->INTENSET = (1 << ((irq == RxIrq) ? 0 : 2));
mbed_official 103:9b881da47c92 249 NVIC_SetVector(irq_n, vector);
mbed_official 103:9b881da47c92 250 NVIC_EnableIRQ(irq_n);
mbed_official 103:9b881da47c92 251 } else { // disable
mbed_official 103:9b881da47c92 252 int all_disabled = 0;
mbed_official 103:9b881da47c92 253 SerialIrq other_irq = (irq == RxIrq) ? (TxIrq) : (RxIrq);
mbed_official 103:9b881da47c92 254 obj->uart->INTENSET &= ~(1 << ((irq == RxIrq) ? 0 : 2));
mbed_official 103:9b881da47c92 255 all_disabled = (obj->uart->INTENSET & (1 << ((other_irq == RxIrq) ? 0 : 2))) == 0;
mbed_official 103:9b881da47c92 256 if (all_disabled)
mbed_official 103:9b881da47c92 257 NVIC_DisableIRQ(irq_n);
mbed_official 103:9b881da47c92 258 }
mbed_official 103:9b881da47c92 259 }
mbed_official 103:9b881da47c92 260
mbed_official 103:9b881da47c92 261 /******************************************************************************
mbed_official 103:9b881da47c92 262 * READ/WRITE
mbed_official 103:9b881da47c92 263 ******************************************************************************/
mbed_official 103:9b881da47c92 264 int serial_getc(serial_t *obj) {
mbed_official 103:9b881da47c92 265 while (!serial_readable(obj));
mbed_official 103:9b881da47c92 266 return obj->uart->RXDATA;
mbed_official 103:9b881da47c92 267 }
mbed_official 103:9b881da47c92 268
mbed_official 103:9b881da47c92 269 void serial_putc(serial_t *obj, int c) {
mbed_official 103:9b881da47c92 270 while (!serial_writable(obj));
mbed_official 103:9b881da47c92 271 obj->uart->TXDATA = c;
mbed_official 103:9b881da47c92 272 }
mbed_official 103:9b881da47c92 273
mbed_official 103:9b881da47c92 274 int serial_readable(serial_t *obj) {
mbed_official 103:9b881da47c92 275 return obj->uart->STAT & RXRDY;
mbed_official 103:9b881da47c92 276 }
mbed_official 103:9b881da47c92 277
mbed_official 103:9b881da47c92 278 int serial_writable(serial_t *obj) {
mbed_official 103:9b881da47c92 279 return obj->uart->STAT & TXRDY;
mbed_official 103:9b881da47c92 280 }
mbed_official 103:9b881da47c92 281
mbed_official 103:9b881da47c92 282 void serial_clear(serial_t *obj) {
mbed_official 103:9b881da47c92 283 // [TODO]
mbed_official 103:9b881da47c92 284 }
mbed_official 103:9b881da47c92 285
mbed_official 103:9b881da47c92 286 void serial_pinout_tx(PinName tx) {
mbed_official 103:9b881da47c92 287
mbed_official 103:9b881da47c92 288 }
mbed_official 103:9b881da47c92 289
mbed_official 103:9b881da47c92 290 void serial_break_set(serial_t *obj) {
mbed_official 103:9b881da47c92 291 obj->uart->CTRL |= TXBRKEN;
mbed_official 103:9b881da47c92 292 }
mbed_official 103:9b881da47c92 293
mbed_official 103:9b881da47c92 294 void serial_break_clear(serial_t *obj) {
mbed_official 103:9b881da47c92 295 obj->uart->CTRL &= ~TXBRKEN;
mbed_official 103:9b881da47c92 296 }
mbed_official 103:9b881da47c92 297
mbed_official 103:9b881da47c92 298 void serial_set_flow_control(serial_t *obj, FlowControl type, PinName rxflow, PinName txflow) {
mbed_official 103:9b881da47c92 299 const SWM_Map *swm_rts, *swm_cts;
mbed_official 103:9b881da47c92 300 uint32_t regVal_rts, regVal_cts;
mbed_official 103:9b881da47c92 301
mbed_official 103:9b881da47c92 302 swm_rts = &SWM_UART_RTS[obj->index];
mbed_official 103:9b881da47c92 303 swm_cts = &SWM_UART_CTS[obj->index];
mbed_official 103:9b881da47c92 304 regVal_rts = LPC_SWM->PINASSIGN[swm_rts->n] & ~(0xFF << swm_rts->offset);
mbed_official 103:9b881da47c92 305 regVal_cts = LPC_SWM->PINASSIGN[swm_cts->n] & ~(0xFF << swm_cts->offset);
mbed_official 103:9b881da47c92 306
mbed_official 103:9b881da47c92 307 if (FlowControlNone == type) {
mbed_official 103:9b881da47c92 308 LPC_SWM->PINASSIGN[swm_rts->n] = regVal_rts | (0xFF << swm_rts->offset);
mbed_official 103:9b881da47c92 309 LPC_SWM->PINASSIGN[swm_cts->n] = regVal_cts | (0xFF << swm_cts->offset);
mbed_official 103:9b881da47c92 310 obj->uart->CFG &= ~CTSEN;
mbed_official 103:9b881da47c92 311 return;
mbed_official 103:9b881da47c92 312 }
mbed_official 103:9b881da47c92 313 if ((FlowControlRTS == type || FlowControlRTSCTS == type) && (rxflow != NC)) {
mbed_official 103:9b881da47c92 314 LPC_SWM->PINASSIGN[swm_rts->n] = regVal_rts | (rxflow << swm_rts->offset);
mbed_official 103:9b881da47c92 315 if (FlowControlRTS == type) {
mbed_official 103:9b881da47c92 316 LPC_SWM->PINASSIGN[swm_cts->n] = regVal_cts | (0xFF << swm_cts->offset);
mbed_official 103:9b881da47c92 317 obj->uart->CFG &= ~CTSEN;
mbed_official 103:9b881da47c92 318 }
mbed_official 103:9b881da47c92 319 }
mbed_official 103:9b881da47c92 320 if ((FlowControlCTS == type || FlowControlRTSCTS == type) && (txflow != NC)) {
mbed_official 103:9b881da47c92 321 LPC_SWM->PINASSIGN[swm_cts->n] = regVal_cts | (txflow << swm_cts->offset);
mbed_official 103:9b881da47c92 322 obj->uart->CFG |= CTSEN;
mbed_official 103:9b881da47c92 323 if (FlowControlCTS == type) {
mbed_official 103:9b881da47c92 324 LPC_SWM->PINASSIGN[swm_rts->n] = regVal_rts | (0xFF << swm_rts->offset);
mbed_official 103:9b881da47c92 325 }
mbed_official 103:9b881da47c92 326 }
mbed_official 103:9b881da47c92 327 }
mbed_official 103:9b881da47c92 328