shao ziyang / mbed-src-kl05

mbed library sources

Dependents:   frdm_kl05z_gpio_test

Fork of mbed-src by mbed official

targets/hal/TARGET_NXP/TARGET_LPC43XX/serial_api.c@51:7838415c99e7, 2013-12-02 (annotated)

Committer:
mbed_official
Date:
Mon Dec 02 10:00:04 2013 +0000
Revision:
51:7838415c99e7
Parent:
20:4263a77256ae
Child:
140:ca60b7a31055
Synchronized with git revision 6aaa1345164ad42bf681b857dc768b1b65a07595



Full URL: https://github.com/mbedmicro/mbed/commit/6aaa1345164ad42bf681b857dc768b1b65a07595/



Added (deep)sleep to KL25Z

Who changed what in which revision?

UserRevisionLine numberNew contents of line
bogdanm 20:4263a77256ae 1 /* mbed Microcontroller Library
bogdanm 20:4263a77256ae 2 * Copyright (c) 2006-2013 ARM Limited
bogdanm 20:4263a77256ae 3 *
bogdanm 20:4263a77256ae 4 * Licensed under the Apache License, Version 2.0 (the "License");
bogdanm 20:4263a77256ae 5 * you may not use this file except in compliance with the License.
bogdanm 20:4263a77256ae 6 * You may obtain a copy of the License at
bogdanm 20:4263a77256ae 7 *
bogdanm 20:4263a77256ae 8 * http://www.apache.org/licenses/LICENSE-2.0
bogdanm 20:4263a77256ae 9 *
bogdanm 20:4263a77256ae 10 * Unless required by applicable law or agreed to in writing, software
bogdanm 20:4263a77256ae 11 * distributed under the License is distributed on an "AS IS" BASIS,
bogdanm 20:4263a77256ae 12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
bogdanm 20:4263a77256ae 13 * See the License for the specific language governing permissions and
bogdanm 20:4263a77256ae 14 * limitations under the License.
bogdanm 20:4263a77256ae 15 *
bogdanm 20:4263a77256ae 16 * Ported to NXP LPC43XX by Micromint USA <support@micromint.com>
bogdanm 20:4263a77256ae 17 */
bogdanm 20:4263a77256ae 18 // math.h required for floating point operations for baud rate calculation
bogdanm 20:4263a77256ae 19 #include <math.h>
bogdanm 20:4263a77256ae 20 #include <string.h>
bogdanm 20:4263a77256ae 21
bogdanm 20:4263a77256ae 22 #include "serial_api.h"
bogdanm 20:4263a77256ae 23 #include "cmsis.h"
bogdanm 20:4263a77256ae 24 #include "pinmap.h"
bogdanm 20:4263a77256ae 25 #include "error.h"
bogdanm 20:4263a77256ae 26
bogdanm 20:4263a77256ae 27 /******************************************************************************
bogdanm 20:4263a77256ae 28 * INITIALIZATION
bogdanm 20:4263a77256ae 29 ******************************************************************************/
bogdanm 20:4263a77256ae 30 static const PinMap PinMap_UART_TX[] = {
bogdanm 20:4263a77256ae 31 {UART0_TX, UART_0, (SCU_PINIO_PULLDOWN | 2)},
bogdanm 20:4263a77256ae 32 {UART1_TX, UART_1, (SCU_PINIO_PULLDOWN | 4)},
bogdanm 20:4263a77256ae 33 {UART2_TX, UART_2, (SCU_PINIO_PULLDOWN | 2)},
bogdanm 20:4263a77256ae 34 {UART3_TX, UART_3, (SCU_PINIO_PULLDOWN | 2)},
bogdanm 20:4263a77256ae 35 {NC , NC , 0}
bogdanm 20:4263a77256ae 36 };
bogdanm 20:4263a77256ae 37
bogdanm 20:4263a77256ae 38 static const PinMap PinMap_UART_RX[] = {
bogdanm 20:4263a77256ae 39 {UART0_RX, UART_0, (SCU_PINIO_PULLDOWN | 2)},
bogdanm 20:4263a77256ae 40 {UART1_RX, UART_1, (SCU_PINIO_PULLDOWN | 1)},
bogdanm 20:4263a77256ae 41 {UART2_RX, UART_2, (SCU_PINIO_PULLDOWN | 2)},
bogdanm 20:4263a77256ae 42 {UART3_RX, UART_3, (SCU_PINIO_PULLDOWN | 2)},
bogdanm 20:4263a77256ae 43 {NC , NC , 0}
bogdanm 20:4263a77256ae 44 };
bogdanm 20:4263a77256ae 45
bogdanm 20:4263a77256ae 46 #define UART_NUM 4
bogdanm 20:4263a77256ae 47
bogdanm 20:4263a77256ae 48 static uint32_t serial_irq_ids[UART_NUM] = {0};
bogdanm 20:4263a77256ae 49 static uart_irq_handler irq_handler;
bogdanm 20:4263a77256ae 50
bogdanm 20:4263a77256ae 51 int stdio_uart_inited = 0;
bogdanm 20:4263a77256ae 52 serial_t stdio_uart;
bogdanm 20:4263a77256ae 53
bogdanm 20:4263a77256ae 54 void serial_init(serial_t *obj, PinName tx, PinName rx) {
bogdanm 20:4263a77256ae 55 int is_stdio_uart = 0;
bogdanm 20:4263a77256ae 56
bogdanm 20:4263a77256ae 57 // determine the UART to use
bogdanm 20:4263a77256ae 58 UARTName uart_tx = (UARTName)pinmap_peripheral(tx, PinMap_UART_TX);
bogdanm 20:4263a77256ae 59 UARTName uart_rx = (UARTName)pinmap_peripheral(rx, PinMap_UART_RX);
bogdanm 20:4263a77256ae 60 UARTName uart = (UARTName)pinmap_merge(uart_tx, uart_rx);
bogdanm 20:4263a77256ae 61 if ((int)uart == NC) {
bogdanm 20:4263a77256ae 62 error("Serial pinout mapping failed");
bogdanm 20:4263a77256ae 63 }
bogdanm 20:4263a77256ae 64
bogdanm 20:4263a77256ae 65 obj->uart = (LPC_USART_T *)uart;
bogdanm 20:4263a77256ae 66
bogdanm 20:4263a77256ae 67 // enable fifos and default rx trigger level
bogdanm 20:4263a77256ae 68 obj->uart->FCR = 1 << 0 // FIFO Enable - 0 = Disables, 1 = Enabled
bogdanm 20:4263a77256ae 69 | 0 << 1 // Rx Fifo Reset
bogdanm 20:4263a77256ae 70 | 0 << 2 // Tx Fifo Reset
bogdanm 20:4263a77256ae 71 | 0 << 6; // Rx irq trigger level - 0 = 1 char, 1 = 4 chars, 2 = 8 chars, 3 = 14 chars
bogdanm 20:4263a77256ae 72
bogdanm 20:4263a77256ae 73 // disable irqs
bogdanm 20:4263a77256ae 74 obj->uart->IER = 0 << 0 // Rx Data available irq enable
bogdanm 20:4263a77256ae 75 | 0 << 1 // Tx Fifo empty irq enable
bogdanm 20:4263a77256ae 76 | 0 << 2; // Rx Line Status irq enable
bogdanm 20:4263a77256ae 77
bogdanm 20:4263a77256ae 78 // set default baud rate and format
bogdanm 20:4263a77256ae 79 serial_baud (obj, 9600);
bogdanm 20:4263a77256ae 80 serial_format(obj, 8, ParityNone, 1);
bogdanm 20:4263a77256ae 81
bogdanm 20:4263a77256ae 82 // pinout the chosen uart
bogdanm 20:4263a77256ae 83 pinmap_pinout(tx, PinMap_UART_TX);
bogdanm 20:4263a77256ae 84 pinmap_pinout(rx, PinMap_UART_RX);
bogdanm 20:4263a77256ae 85
bogdanm 20:4263a77256ae 86 // set rx/tx pins in PullUp mode
bogdanm 20:4263a77256ae 87 pin_mode(tx, PullUp);
bogdanm 20:4263a77256ae 88 pin_mode(rx, PullUp);
bogdanm 20:4263a77256ae 89
bogdanm 20:4263a77256ae 90 switch (uart) {
bogdanm 20:4263a77256ae 91 case UART_0: obj->index = 0; break;
bogdanm 20:4263a77256ae 92 case UART_1: obj->index = 1; break;
bogdanm 20:4263a77256ae 93 case UART_2: obj->index = 2; break;
bogdanm 20:4263a77256ae 94 #if (UART_NUM > 3)
bogdanm 20:4263a77256ae 95 case UART_3: obj->index = 3; break;
bogdanm 20:4263a77256ae 96 #endif
bogdanm 20:4263a77256ae 97 #if (UART_NUM > 4)
bogdanm 20:4263a77256ae 98 case UART_4: obj->index = 4; break;
bogdanm 20:4263a77256ae 99 #endif
bogdanm 20:4263a77256ae 100 }
bogdanm 20:4263a77256ae 101
bogdanm 20:4263a77256ae 102 is_stdio_uart = (uart == STDIO_UART) ? (1) : (0);
bogdanm 20:4263a77256ae 103
bogdanm 20:4263a77256ae 104 if (is_stdio_uart) {
bogdanm 20:4263a77256ae 105 stdio_uart_inited = 1;
bogdanm 20:4263a77256ae 106 memcpy(&stdio_uart, obj, sizeof(serial_t));
bogdanm 20:4263a77256ae 107 }
bogdanm 20:4263a77256ae 108 }
bogdanm 20:4263a77256ae 109
bogdanm 20:4263a77256ae 110 void serial_free(serial_t *obj) {
bogdanm 20:4263a77256ae 111 serial_irq_ids[obj->index] = 0;
bogdanm 20:4263a77256ae 112 }
bogdanm 20:4263a77256ae 113
bogdanm 20:4263a77256ae 114 // serial_baud
bogdanm 20:4263a77256ae 115 // set the baud rate, taking in to account the current SystemFrequency
bogdanm 20:4263a77256ae 116 void serial_baud(serial_t *obj, int baudrate) {
bogdanm 20:4263a77256ae 117 uint32_t PCLK = SystemCoreClock;
bogdanm 20:4263a77256ae 118
bogdanm 20:4263a77256ae 119 // First we check to see if the basic divide with no DivAddVal/MulVal
bogdanm 20:4263a77256ae 120 // ratio gives us an integer result. If it does, we set DivAddVal = 0,
bogdanm 20:4263a77256ae 121 // MulVal = 1. Otherwise, we search the valid ratio value range to find
bogdanm 20:4263a77256ae 122 // the closest match. This could be more elegant, using search methods
bogdanm 20:4263a77256ae 123 // and/or lookup tables, but the brute force method is not that much
bogdanm 20:4263a77256ae 124 // slower, and is more maintainable.
bogdanm 20:4263a77256ae 125 uint16_t DL = PCLK / (16 * baudrate);
bogdanm 20:4263a77256ae 126
bogdanm 20:4263a77256ae 127 uint8_t DivAddVal = 0;
bogdanm 20:4263a77256ae 128 uint8_t MulVal = 1;
bogdanm 20:4263a77256ae 129 int hit = 0;
bogdanm 20:4263a77256ae 130 uint16_t dlv;
bogdanm 20:4263a77256ae 131 uint8_t mv, dav;
bogdanm 20:4263a77256ae 132 if ((PCLK % (16 * baudrate)) != 0) { // Checking for zero remainder
mbed_official 51:7838415c99e7 133 int err_best = baudrate, b;
mbed_official 51:7838415c99e7 134 for (mv = 1; mv < 16 && !hit; mv++)
mbed_official 51:7838415c99e7 135 {
mbed_official 51:7838415c99e7 136 for (dav = 0; dav < mv; dav++)
mbed_official 51:7838415c99e7 137 {
mbed_official 51:7838415c99e7 138 // baudrate = PCLK / (16 * dlv * (1 + (DivAdd / Mul))
mbed_official 51:7838415c99e7 139 // solving for dlv, we get dlv = mul * PCLK / (16 * baudrate * (divadd + mul))
mbed_official 51:7838415c99e7 140 // mul has 4 bits, PCLK has 27 so we have 1 bit headroom which can be used for rounding
mbed_official 51:7838415c99e7 141 // for many values of mul and PCLK we have 2 or more bits of headroom which can be used to improve precision
mbed_official 51:7838415c99e7 142 // note: X / 32 doesn't round correctly. Instead, we use ((X / 16) + 1) / 2 for correct rounding
mbed_official 51:7838415c99e7 143
mbed_official 51:7838415c99e7 144 if ((mv * PCLK * 2) & 0x80000000) // 1 bit headroom
mbed_official 51:7838415c99e7 145 dlv = ((((2 * mv * PCLK) / (baudrate * (dav + mv))) / 16) + 1) / 2;
mbed_official 51:7838415c99e7 146 else // 2 bits headroom, use more precision
mbed_official 51:7838415c99e7 147 dlv = ((((4 * mv * PCLK) / (baudrate * (dav + mv))) / 32) + 1) / 2;
mbed_official 51:7838415c99e7 148
mbed_official 51:7838415c99e7 149 // datasheet says if DLL==DLM==0, then 1 is used instead since divide by zero is ungood
mbed_official 51:7838415c99e7 150 if (dlv == 0)
mbed_official 51:7838415c99e7 151 dlv = 1;
mbed_official 51:7838415c99e7 152
mbed_official 51:7838415c99e7 153 // datasheet says if dav > 0 then DL must be >= 2
mbed_official 51:7838415c99e7 154 if ((dav > 0) && (dlv < 2))
mbed_official 51:7838415c99e7 155 dlv = 2;
mbed_official 51:7838415c99e7 156
mbed_official 51:7838415c99e7 157 // integer rearrangement of the baudrate equation (with rounding)
mbed_official 51:7838415c99e7 158 b = ((PCLK * mv / (dlv * (dav + mv) * 8)) + 1) / 2;
mbed_official 51:7838415c99e7 159
mbed_official 51:7838415c99e7 160 // check to see how we went
mbed_official 51:7838415c99e7 161 b = abs(b - baudrate);
mbed_official 51:7838415c99e7 162 if (b < err_best)
mbed_official 51:7838415c99e7 163 {
mbed_official 51:7838415c99e7 164 err_best = b;
mbed_official 51:7838415c99e7 165
mbed_official 51:7838415c99e7 166 DL = dlv;
mbed_official 51:7838415c99e7 167 MulVal = mv;
mbed_official 51:7838415c99e7 168 DivAddVal = dav;
mbed_official 51:7838415c99e7 169
mbed_official 51:7838415c99e7 170 if (b == baudrate)
mbed_official 51:7838415c99e7 171 {
mbed_official 51:7838415c99e7 172 hit = 1;
mbed_official 51:7838415c99e7 173 break;
bogdanm 20:4263a77256ae 174 }
bogdanm 20:4263a77256ae 175 }
bogdanm 20:4263a77256ae 176 }
bogdanm 20:4263a77256ae 177 }
bogdanm 20:4263a77256ae 178 }
bogdanm 20:4263a77256ae 179
bogdanm 20:4263a77256ae 180 // set LCR[DLAB] to enable writing to divider registers
bogdanm 20:4263a77256ae 181 obj->uart->LCR |= (1 << 7);
bogdanm 20:4263a77256ae 182
bogdanm 20:4263a77256ae 183 // set divider values
bogdanm 20:4263a77256ae 184 obj->uart->DLM = (DL >> 8) & 0xFF;
bogdanm 20:4263a77256ae 185 obj->uart->DLL = (DL >> 0) & 0xFF;
bogdanm 20:4263a77256ae 186 obj->uart->FDR = (uint32_t) DivAddVal << 0
bogdanm 20:4263a77256ae 187 | (uint32_t) MulVal << 4;
bogdanm 20:4263a77256ae 188
bogdanm 20:4263a77256ae 189 // clear LCR[DLAB]
bogdanm 20:4263a77256ae 190 obj->uart->LCR &= ~(1 << 7);
bogdanm 20:4263a77256ae 191 }
bogdanm 20:4263a77256ae 192
bogdanm 20:4263a77256ae 193 void serial_format(serial_t *obj, int data_bits, SerialParity parity, int stop_bits) {
bogdanm 20:4263a77256ae 194 // 0: 1 stop bits, 1: 2 stop bits
bogdanm 20:4263a77256ae 195 if (stop_bits != 1 && stop_bits != 2) {
bogdanm 20:4263a77256ae 196 error("Invalid stop bits specified");
bogdanm 20:4263a77256ae 197 }
bogdanm 20:4263a77256ae 198 stop_bits -= 1;
bogdanm 20:4263a77256ae 199
bogdanm 20:4263a77256ae 200 // 0: 5 data bits ... 3: 8 data bits
bogdanm 20:4263a77256ae 201 if (data_bits < 5 || data_bits > 8) {
bogdanm 20:4263a77256ae 202 error("Invalid number of bits (%d) in serial format, should be 5..8", data_bits);
bogdanm 20:4263a77256ae 203 }
bogdanm 20:4263a77256ae 204 data_bits -= 5;
bogdanm 20:4263a77256ae 205
bogdanm 20:4263a77256ae 206 int parity_enable, parity_select;
bogdanm 20:4263a77256ae 207 switch (parity) {
bogdanm 20:4263a77256ae 208 case ParityNone: parity_enable = 0; parity_select = 0; break;
bogdanm 20:4263a77256ae 209 case ParityOdd : parity_enable = 1; parity_select = 0; break;
bogdanm 20:4263a77256ae 210 case ParityEven: parity_enable = 1; parity_select = 1; break;
bogdanm 20:4263a77256ae 211 case ParityForced1: parity_enable = 1; parity_select = 2; break;
bogdanm 20:4263a77256ae 212 case ParityForced0: parity_enable = 1; parity_select = 3; break;
bogdanm 20:4263a77256ae 213 default:
bogdanm 20:4263a77256ae 214 error("Invalid serial parity setting");
bogdanm 20:4263a77256ae 215 return;
bogdanm 20:4263a77256ae 216 }
bogdanm 20:4263a77256ae 217
bogdanm 20:4263a77256ae 218 obj->uart->LCR = data_bits << 0
bogdanm 20:4263a77256ae 219 | stop_bits << 2
bogdanm 20:4263a77256ae 220 | parity_enable << 3
bogdanm 20:4263a77256ae 221 | parity_select << 4;
bogdanm 20:4263a77256ae 222 }
bogdanm 20:4263a77256ae 223
bogdanm 20:4263a77256ae 224 /******************************************************************************
bogdanm 20:4263a77256ae 225 * INTERRUPTS HANDLING
bogdanm 20:4263a77256ae 226 ******************************************************************************/
bogdanm 20:4263a77256ae 227 static inline void uart_irq(uint32_t iir, uint32_t index) {
bogdanm 20:4263a77256ae 228 // [Chapter 14] LPC17xx UART0/2/3: UARTn Interrupt Handling
bogdanm 20:4263a77256ae 229 SerialIrq irq_type;
bogdanm 20:4263a77256ae 230 switch (iir) {
bogdanm 20:4263a77256ae 231 case 1: irq_type = TxIrq; break;
bogdanm 20:4263a77256ae 232 case 2: irq_type = RxIrq; break;
bogdanm 20:4263a77256ae 233 default: return;
bogdanm 20:4263a77256ae 234 }
bogdanm 20:4263a77256ae 235
bogdanm 20:4263a77256ae 236 if (serial_irq_ids[index] != 0)
bogdanm 20:4263a77256ae 237 irq_handler(serial_irq_ids[index], irq_type);
bogdanm 20:4263a77256ae 238 }
bogdanm 20:4263a77256ae 239
bogdanm 20:4263a77256ae 240 void uart0_irq() {uart_irq((LPC_USART0->IIR >> 1) & 0x7, 0);}
bogdanm 20:4263a77256ae 241 void uart1_irq() {uart_irq((LPC_UART1->IIR >> 1) & 0x7, 1);}
bogdanm 20:4263a77256ae 242 void uart2_irq() {uart_irq((LPC_USART2->IIR >> 1) & 0x7, 2);}
bogdanm 20:4263a77256ae 243 void uart3_irq() {uart_irq((LPC_USART3->IIR >> 1) & 0x7, 3);}
bogdanm 20:4263a77256ae 244
bogdanm 20:4263a77256ae 245 void serial_irq_handler(serial_t *obj, uart_irq_handler handler, uint32_t id) {
bogdanm 20:4263a77256ae 246 irq_handler = handler;
bogdanm 20:4263a77256ae 247 serial_irq_ids[obj->index] = id;
bogdanm 20:4263a77256ae 248 }
bogdanm 20:4263a77256ae 249
bogdanm 20:4263a77256ae 250 void serial_irq_set(serial_t *obj, SerialIrq irq, uint32_t enable) {
bogdanm 20:4263a77256ae 251 IRQn_Type irq_n = (IRQn_Type)0;
bogdanm 20:4263a77256ae 252 uint32_t vector = 0;
bogdanm 20:4263a77256ae 253 switch ((int)obj->uart) {
bogdanm 20:4263a77256ae 254 case UART_0: irq_n=USART0_IRQn; vector = (uint32_t)&uart0_irq; break;
bogdanm 20:4263a77256ae 255 case UART_1: irq_n=UART1_IRQn; vector = (uint32_t)&uart1_irq; break;
bogdanm 20:4263a77256ae 256 case UART_2: irq_n=USART2_IRQn; vector = (uint32_t)&uart2_irq; break;
bogdanm 20:4263a77256ae 257 case UART_3: irq_n=USART3_IRQn; vector = (uint32_t)&uart3_irq; break;
bogdanm 20:4263a77256ae 258 }
bogdanm 20:4263a77256ae 259
bogdanm 20:4263a77256ae 260 if (enable) {
bogdanm 20:4263a77256ae 261 obj->uart->IER |= 1 << irq;
bogdanm 20:4263a77256ae 262 NVIC_SetVector(irq_n, vector);
bogdanm 20:4263a77256ae 263 NVIC_EnableIRQ(irq_n);
bogdanm 20:4263a77256ae 264 } else { // disable
bogdanm 20:4263a77256ae 265 int all_disabled = 0;
bogdanm 20:4263a77256ae 266 SerialIrq other_irq = (irq == RxIrq) ? (TxIrq) : (RxIrq);
bogdanm 20:4263a77256ae 267 obj->uart->IER &= ~(1 << irq);
bogdanm 20:4263a77256ae 268 all_disabled = (obj->uart->IER & (1 << other_irq)) == 0;
bogdanm 20:4263a77256ae 269 if (all_disabled)
bogdanm 20:4263a77256ae 270 NVIC_DisableIRQ(irq_n);
bogdanm 20:4263a77256ae 271 }
bogdanm 20:4263a77256ae 272 }
bogdanm 20:4263a77256ae 273
bogdanm 20:4263a77256ae 274 /******************************************************************************
bogdanm 20:4263a77256ae 275 * READ/WRITE
bogdanm 20:4263a77256ae 276 ******************************************************************************/
bogdanm 20:4263a77256ae 277 int serial_getc(serial_t *obj) {
bogdanm 20:4263a77256ae 278 while (!serial_readable(obj));
bogdanm 20:4263a77256ae 279 return obj->uart->RBR;
bogdanm 20:4263a77256ae 280 }
bogdanm 20:4263a77256ae 281
bogdanm 20:4263a77256ae 282 void serial_putc(serial_t *obj, int c) {
bogdanm 20:4263a77256ae 283 while (!serial_writable(obj));
bogdanm 20:4263a77256ae 284 obj->uart->THR = c;
bogdanm 20:4263a77256ae 285 }
bogdanm 20:4263a77256ae 286
bogdanm 20:4263a77256ae 287 int serial_readable(serial_t *obj) {
bogdanm 20:4263a77256ae 288 return obj->uart->LSR & 0x01;
bogdanm 20:4263a77256ae 289 }
bogdanm 20:4263a77256ae 290
bogdanm 20:4263a77256ae 291 int serial_writable(serial_t *obj) {
bogdanm 20:4263a77256ae 292 return obj->uart->LSR & 0x20;
bogdanm 20:4263a77256ae 293 }
bogdanm 20:4263a77256ae 294
bogdanm 20:4263a77256ae 295 void serial_clear(serial_t *obj) {
bogdanm 20:4263a77256ae 296 obj->uart->FCR = 1 << 1 // rx FIFO reset
bogdanm 20:4263a77256ae 297 | 1 << 2 // tx FIFO reset
bogdanm 20:4263a77256ae 298 | 0 << 6; // interrupt depth
bogdanm 20:4263a77256ae 299 }
bogdanm 20:4263a77256ae 300
bogdanm 20:4263a77256ae 301 void serial_pinout_tx(PinName tx) {
bogdanm 20:4263a77256ae 302 pinmap_pinout(tx, PinMap_UART_TX);
bogdanm 20:4263a77256ae 303 }
bogdanm 20:4263a77256ae 304
bogdanm 20:4263a77256ae 305 void serial_break_set(serial_t *obj) {
bogdanm 20:4263a77256ae 306 obj->uart->LCR |= (1 << 6);
bogdanm 20:4263a77256ae 307 }
bogdanm 20:4263a77256ae 308
bogdanm 20:4263a77256ae 309 void serial_break_clear(serial_t *obj) {
bogdanm 20:4263a77256ae 310 obj->uart->LCR &= ~(1 << 6);
bogdanm 20:4263a77256ae 311 }
bogdanm 20:4263a77256ae 312