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targets/cmsis/TARGET_STM/TARGET_NUCLEO_F411RE/stm32f4xx_hal_tim.h@235:685d5f11838f, 2014-06-23 (annotated)

Committer:: mbed_official
Date:: Mon Jun 23 14:00:09 2014 +0100
Revision:: 235:685d5f11838f

Synchronized with git revision 9728c76667962b289ee9c4c687ef9f115db48cd3



Full URL: https://github.com/mbedmicro/mbed/commit/9728c76667962b289ee9c4c687ef9f115db48cd3/



[NUCLEO_F411RE] Add all target files

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User	Revision	Line number	New contents of line
mbed_official	235:685d5f11838f	1	/**
mbed_official	235:685d5f11838f	2	******************************************************************************
mbed_official	235:685d5f11838f	3	* @file stm32f4xx_hal_tim.h
mbed_official	235:685d5f11838f	4	* @author MCD Application Team
mbed_official	235:685d5f11838f	5	* @version V1.1.0
mbed_official	235:685d5f11838f	6	* @date 19-June-2014
mbed_official	235:685d5f11838f	7	* @brief Header file of TIM HAL module.
mbed_official	235:685d5f11838f	8	******************************************************************************
mbed_official	235:685d5f11838f	9	* @attention
mbed_official	235:685d5f11838f	10	*
mbed_official	235:685d5f11838f	11	* <h2><center>© COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
mbed_official	235:685d5f11838f	12	*
mbed_official	235:685d5f11838f	13	* Redistribution and use in source and binary forms, with or without modification,
mbed_official	235:685d5f11838f	14	* are permitted provided that the following conditions are met:
mbed_official	235:685d5f11838f	15	* 1. Redistributions of source code must retain the above copyright notice,
mbed_official	235:685d5f11838f	16	* this list of conditions and the following disclaimer.
mbed_official	235:685d5f11838f	17	* 2. Redistributions in binary form must reproduce the above copyright notice,
mbed_official	235:685d5f11838f	18	* this list of conditions and the following disclaimer in the documentation
mbed_official	235:685d5f11838f	19	* and/or other materials provided with the distribution.
mbed_official	235:685d5f11838f	20	* 3. Neither the name of STMicroelectronics nor the names of its contributors
mbed_official	235:685d5f11838f	21	* may be used to endorse or promote products derived from this software
mbed_official	235:685d5f11838f	22	* without specific prior written permission.
mbed_official	235:685d5f11838f	23	*
mbed_official	235:685d5f11838f	24	* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
mbed_official	235:685d5f11838f	25	* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
mbed_official	235:685d5f11838f	26	* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
mbed_official	235:685d5f11838f	27	* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
mbed_official	235:685d5f11838f	28	* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
mbed_official	235:685d5f11838f	29	* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
mbed_official	235:685d5f11838f	30	* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
mbed_official	235:685d5f11838f	31	* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
mbed_official	235:685d5f11838f	32	* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
mbed_official	235:685d5f11838f	33	* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
mbed_official	235:685d5f11838f	34	*
mbed_official	235:685d5f11838f	35	******************************************************************************
mbed_official	235:685d5f11838f	36	*/
mbed_official	235:685d5f11838f	37
mbed_official	235:685d5f11838f	38	/* Define to prevent recursive inclusion -------------------------------------*/
mbed_official	235:685d5f11838f	39	#ifndef __STM32F4xx_HAL_TIM_H
mbed_official	235:685d5f11838f	40	#define __STM32F4xx_HAL_TIM_H
mbed_official	235:685d5f11838f	41
mbed_official	235:685d5f11838f	42	#ifdef __cplusplus
mbed_official	235:685d5f11838f	43	extern "C" {
mbed_official	235:685d5f11838f	44	#endif
mbed_official	235:685d5f11838f	45
mbed_official	235:685d5f11838f	46	/* Includes ------------------------------------------------------------------*/
mbed_official	235:685d5f11838f	47	#include "stm32f4xx_hal_def.h"
mbed_official	235:685d5f11838f	48
mbed_official	235:685d5f11838f	49	/** @addtogroup STM32F4xx_HAL
mbed_official	235:685d5f11838f	50	* @{
mbed_official	235:685d5f11838f	51	*/
mbed_official	235:685d5f11838f	52
mbed_official	235:685d5f11838f	53	/** @addtogroup TIM
mbed_official	235:685d5f11838f	54	* @{
mbed_official	235:685d5f11838f	55	*/
mbed_official	235:685d5f11838f	56
mbed_official	235:685d5f11838f	57	/* Exported types ------------------------------------------------------------*/
mbed_official	235:685d5f11838f	58
mbed_official	235:685d5f11838f	59	/**
mbed_official	235:685d5f11838f	60	* @brief TIM Time base Configuration Structure definition
mbed_official	235:685d5f11838f	61	*/
mbed_official	235:685d5f11838f	62	typedef struct
mbed_official	235:685d5f11838f	63	{
mbed_official	235:685d5f11838f	64	uint32_t Prescaler; /*!< Specifies the prescaler value used to divide the TIM clock.
mbed_official	235:685d5f11838f	65	This parameter can be a number between Min_Data = 0x0000 and Max_Data = 0xFFFF */
mbed_official	235:685d5f11838f	66
mbed_official	235:685d5f11838f	67	uint32_t CounterMode; /*!< Specifies the counter mode.
mbed_official	235:685d5f11838f	68	This parameter can be a value of @ref TIM_Counter_Mode */
mbed_official	235:685d5f11838f	69
mbed_official	235:685d5f11838f	70	uint32_t Period; /*!< Specifies the period value to be loaded into the active
mbed_official	235:685d5f11838f	71	Auto-Reload Register at the next update event.
mbed_official	235:685d5f11838f	72	This parameter can be a number between Min_Data = 0x0000 and Max_Data = 0xFFFF. */
mbed_official	235:685d5f11838f	73
mbed_official	235:685d5f11838f	74	uint32_t ClockDivision; /*!< Specifies the clock division.
mbed_official	235:685d5f11838f	75	This parameter can be a value of @ref TIM_ClockDivision */
mbed_official	235:685d5f11838f	76
mbed_official	235:685d5f11838f	77	uint32_t RepetitionCounter; /*!< Specifies the repetition counter value. Each time the RCR downcounter
mbed_official	235:685d5f11838f	78	reaches zero, an update event is generated and counting restarts
mbed_official	235:685d5f11838f	79	from the RCR value (N).
mbed_official	235:685d5f11838f	80	This means in PWM mode that (N+1) corresponds to:
mbed_official	235:685d5f11838f	81	- the number of PWM periods in edge-aligned mode
mbed_official	235:685d5f11838f	82	- the number of half PWM period in center-aligned mode
mbed_official	235:685d5f11838f	83	This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF.
mbed_official	235:685d5f11838f	84	@note This parameter is valid only for TIM1 and TIM8. */
mbed_official	235:685d5f11838f	85	} TIM_Base_InitTypeDef;
mbed_official	235:685d5f11838f	86
mbed_official	235:685d5f11838f	87	/**
mbed_official	235:685d5f11838f	88	* @brief TIM Output Compare Configuration Structure definition
mbed_official	235:685d5f11838f	89	*/
mbed_official	235:685d5f11838f	90
mbed_official	235:685d5f11838f	91	typedef struct
mbed_official	235:685d5f11838f	92	{
mbed_official	235:685d5f11838f	93	uint32_t OCMode; /*!< Specifies the TIM mode.
mbed_official	235:685d5f11838f	94	This parameter can be a value of @ref TIM_Output_Compare_and_PWM_modes */
mbed_official	235:685d5f11838f	95
mbed_official	235:685d5f11838f	96	uint32_t Pulse; /*!< Specifies the pulse value to be loaded into the Capture Compare Register.
mbed_official	235:685d5f11838f	97	This parameter can be a number between Min_Data = 0x0000 and Max_Data = 0xFFFF */
mbed_official	235:685d5f11838f	98
mbed_official	235:685d5f11838f	99	uint32_t OCPolarity; /*!< Specifies the output polarity.
mbed_official	235:685d5f11838f	100	This parameter can be a value of @ref TIM_Output_Compare_Polarity */
mbed_official	235:685d5f11838f	101
mbed_official	235:685d5f11838f	102	uint32_t OCNPolarity; /*!< Specifies the complementary output polarity.
mbed_official	235:685d5f11838f	103	This parameter can be a value of @ref TIM_Output_Compare_N_Polarity
mbed_official	235:685d5f11838f	104	@note This parameter is valid only for TIM1 and TIM8. */
mbed_official	235:685d5f11838f	105
mbed_official	235:685d5f11838f	106	uint32_t OCFastMode; /*!< Specifies the Fast mode state.
mbed_official	235:685d5f11838f	107	This parameter can be a value of @ref TIM_Output_Fast_State
mbed_official	235:685d5f11838f	108	@note This parameter is valid only in PWM1 and PWM2 mode. */
mbed_official	235:685d5f11838f	109
mbed_official	235:685d5f11838f	110
mbed_official	235:685d5f11838f	111	uint32_t OCIdleState; /*!< Specifies the TIM Output Compare pin state during Idle state.
mbed_official	235:685d5f11838f	112	This parameter can be a value of @ref TIM_Output_Compare_Idle_State
mbed_official	235:685d5f11838f	113	@note This parameter is valid only for TIM1 and TIM8. */
mbed_official	235:685d5f11838f	114
mbed_official	235:685d5f11838f	115	uint32_t OCNIdleState; /*!< Specifies the TIM Output Compare pin state during Idle state.
mbed_official	235:685d5f11838f	116	This parameter can be a value of @ref TIM_Output_Compare_N_Idle_State
mbed_official	235:685d5f11838f	117	@note This parameter is valid only for TIM1 and TIM8. */
mbed_official	235:685d5f11838f	118	} TIM_OC_InitTypeDef;
mbed_official	235:685d5f11838f	119
mbed_official	235:685d5f11838f	120	/**
mbed_official	235:685d5f11838f	121	* @brief TIM One Pulse Mode Configuration Structure definition
mbed_official	235:685d5f11838f	122	*/
mbed_official	235:685d5f11838f	123	typedef struct
mbed_official	235:685d5f11838f	124	{
mbed_official	235:685d5f11838f	125	uint32_t OCMode; /*!< Specifies the TIM mode.
mbed_official	235:685d5f11838f	126	This parameter can be a value of @ref TIM_Output_Compare_and_PWM_modes */
mbed_official	235:685d5f11838f	127
mbed_official	235:685d5f11838f	128	uint32_t Pulse; /*!< Specifies the pulse value to be loaded into the Capture Compare Register.
mbed_official	235:685d5f11838f	129	This parameter can be a number between Min_Data = 0x0000 and Max_Data = 0xFFFF */
mbed_official	235:685d5f11838f	130
mbed_official	235:685d5f11838f	131	uint32_t OCPolarity; /*!< Specifies the output polarity.
mbed_official	235:685d5f11838f	132	This parameter can be a value of @ref TIM_Output_Compare_Polarity */
mbed_official	235:685d5f11838f	133
mbed_official	235:685d5f11838f	134	uint32_t OCNPolarity; /*!< Specifies the complementary output polarity.
mbed_official	235:685d5f11838f	135	This parameter can be a value of @ref TIM_Output_Compare_N_Polarity
mbed_official	235:685d5f11838f	136	@note This parameter is valid only for TIM1 and TIM8. */
mbed_official	235:685d5f11838f	137
mbed_official	235:685d5f11838f	138	uint32_t OCIdleState; /*!< Specifies the TIM Output Compare pin state during Idle state.
mbed_official	235:685d5f11838f	139	This parameter can be a value of @ref TIM_Output_Compare_Idle_State
mbed_official	235:685d5f11838f	140	@note This parameter is valid only for TIM1 and TIM8. */
mbed_official	235:685d5f11838f	141
mbed_official	235:685d5f11838f	142	uint32_t OCNIdleState; /*!< Specifies the TIM Output Compare pin state during Idle state.
mbed_official	235:685d5f11838f	143	This parameter can be a value of @ref TIM_Output_Compare_N_Idle_State
mbed_official	235:685d5f11838f	144	@note This parameter is valid only for TIM1 and TIM8. */
mbed_official	235:685d5f11838f	145
mbed_official	235:685d5f11838f	146	uint32_t ICPolarity; /*!< Specifies the active edge of the input signal.
mbed_official	235:685d5f11838f	147	This parameter can be a value of @ref TIM_Input_Capture_Polarity */
mbed_official	235:685d5f11838f	148
mbed_official	235:685d5f11838f	149	uint32_t ICSelection; /*!< Specifies the input.
mbed_official	235:685d5f11838f	150	This parameter can be a value of @ref TIM_Input_Capture_Selection */
mbed_official	235:685d5f11838f	151
mbed_official	235:685d5f11838f	152	uint32_t ICFilter; /*!< Specifies the input capture filter.
mbed_official	235:685d5f11838f	153	This parameter can be a number between Min_Data = 0x0 and Max_Data = 0xF */
mbed_official	235:685d5f11838f	154	} TIM_OnePulse_InitTypeDef;
mbed_official	235:685d5f11838f	155
mbed_official	235:685d5f11838f	156
mbed_official	235:685d5f11838f	157	/**
mbed_official	235:685d5f11838f	158	* @brief TIM Input Capture Configuration Structure definition
mbed_official	235:685d5f11838f	159	*/
mbed_official	235:685d5f11838f	160
mbed_official	235:685d5f11838f	161	typedef struct
mbed_official	235:685d5f11838f	162	{
mbed_official	235:685d5f11838f	163	uint32_t ICPolarity; /*!< Specifies the active edge of the input signal.
mbed_official	235:685d5f11838f	164	This parameter can be a value of @ref TIM_Input_Capture_Polarity */
mbed_official	235:685d5f11838f	165
mbed_official	235:685d5f11838f	166	uint32_t ICSelection; /*!< Specifies the input.
mbed_official	235:685d5f11838f	167	This parameter can be a value of @ref TIM_Input_Capture_Selection */
mbed_official	235:685d5f11838f	168
mbed_official	235:685d5f11838f	169	uint32_t ICPrescaler; /*!< Specifies the Input Capture Prescaler.
mbed_official	235:685d5f11838f	170	This parameter can be a value of @ref TIM_Input_Capture_Prescaler */
mbed_official	235:685d5f11838f	171
mbed_official	235:685d5f11838f	172	uint32_t ICFilter; /*!< Specifies the input capture filter.
mbed_official	235:685d5f11838f	173	This parameter can be a number between Min_Data = 0x0 and Max_Data = 0xF */
mbed_official	235:685d5f11838f	174	} TIM_IC_InitTypeDef;
mbed_official	235:685d5f11838f	175
mbed_official	235:685d5f11838f	176	/**
mbed_official	235:685d5f11838f	177	* @brief TIM Encoder Configuration Structure definition
mbed_official	235:685d5f11838f	178	*/
mbed_official	235:685d5f11838f	179
mbed_official	235:685d5f11838f	180	typedef struct
mbed_official	235:685d5f11838f	181	{
mbed_official	235:685d5f11838f	182	uint32_t EncoderMode; /*!< Specifies the active edge of the input signal.
mbed_official	235:685d5f11838f	183	This parameter can be a value of @ref TIM_Encoder_Mode */
mbed_official	235:685d5f11838f	184
mbed_official	235:685d5f11838f	185	uint32_t IC1Polarity; /*!< Specifies the active edge of the input signal.
mbed_official	235:685d5f11838f	186	This parameter can be a value of @ref TIM_Input_Capture_Polarity */
mbed_official	235:685d5f11838f	187
mbed_official	235:685d5f11838f	188	uint32_t IC1Selection; /*!< Specifies the input.
mbed_official	235:685d5f11838f	189	This parameter can be a value of @ref TIM_Input_Capture_Selection */
mbed_official	235:685d5f11838f	190
mbed_official	235:685d5f11838f	191	uint32_t IC1Prescaler; /*!< Specifies the Input Capture Prescaler.
mbed_official	235:685d5f11838f	192	This parameter can be a value of @ref TIM_Input_Capture_Prescaler */
mbed_official	235:685d5f11838f	193
mbed_official	235:685d5f11838f	194	uint32_t IC1Filter; /*!< Specifies the input capture filter.
mbed_official	235:685d5f11838f	195	This parameter can be a number between Min_Data = 0x0 and Max_Data = 0xF */
mbed_official	235:685d5f11838f	196
mbed_official	235:685d5f11838f	197	uint32_t IC2Polarity; /*!< Specifies the active edge of the input signal.
mbed_official	235:685d5f11838f	198	This parameter can be a value of @ref TIM_Input_Capture_Polarity */
mbed_official	235:685d5f11838f	199
mbed_official	235:685d5f11838f	200	uint32_t IC2Selection; /*!< Specifies the input.
mbed_official	235:685d5f11838f	201	This parameter can be a value of @ref TIM_Input_Capture_Selection */
mbed_official	235:685d5f11838f	202
mbed_official	235:685d5f11838f	203	uint32_t IC2Prescaler; /*!< Specifies the Input Capture Prescaler.
mbed_official	235:685d5f11838f	204	This parameter can be a value of @ref TIM_Input_Capture_Prescaler */
mbed_official	235:685d5f11838f	205
mbed_official	235:685d5f11838f	206	uint32_t IC2Filter; /*!< Specifies the input capture filter.
mbed_official	235:685d5f11838f	207	This parameter can be a number between Min_Data = 0x0 and Max_Data = 0xF */
mbed_official	235:685d5f11838f	208	} TIM_Encoder_InitTypeDef;
mbed_official	235:685d5f11838f	209
mbed_official	235:685d5f11838f	210	/**
mbed_official	235:685d5f11838f	211	* @brief Clock Configuration Handle Structure definition
mbed_official	235:685d5f11838f	212	*/
mbed_official	235:685d5f11838f	213	typedef struct
mbed_official	235:685d5f11838f	214	{
mbed_official	235:685d5f11838f	215	uint32_t ClockSource; /*!< TIM clock sources.
mbed_official	235:685d5f11838f	216	This parameter can be a value of @ref TIM_Clock_Source */
mbed_official	235:685d5f11838f	217	uint32_t ClockPolarity; /*!< TIM clock polarity.
mbed_official	235:685d5f11838f	218	This parameter can be a value of @ref TIM_Clock_Polarity */
mbed_official	235:685d5f11838f	219	uint32_t ClockPrescaler; /*!< TIM clock prescaler.
mbed_official	235:685d5f11838f	220	This parameter can be a value of @ref TIM_Clock_Prescaler */
mbed_official	235:685d5f11838f	221	uint32_t ClockFilter; /*!< TIM clock filter.
mbed_official	235:685d5f11838f	222	This parameter can be a number between Min_Data = 0x0 and Max_Data = 0xF */
mbed_official	235:685d5f11838f	223	}TIM_ClockConfigTypeDef;
mbed_official	235:685d5f11838f	224
mbed_official	235:685d5f11838f	225	/**
mbed_official	235:685d5f11838f	226	* @brief Clear Input Configuration Handle Structure definition
mbed_official	235:685d5f11838f	227	*/
mbed_official	235:685d5f11838f	228	typedef struct
mbed_official	235:685d5f11838f	229	{
mbed_official	235:685d5f11838f	230	uint32_t ClearInputState; /*!< TIM clear Input state.
mbed_official	235:685d5f11838f	231	This parameter can be ENABLE or DISABLE */
mbed_official	235:685d5f11838f	232	uint32_t ClearInputSource; /*!< TIM clear Input sources.
mbed_official	235:685d5f11838f	233	This parameter can be a value of @ref TIM_ClearInput_Source */
mbed_official	235:685d5f11838f	234	uint32_t ClearInputPolarity; /*!< TIM Clear Input polarity.
mbed_official	235:685d5f11838f	235	This parameter can be a value of @ref TIM_ClearInput_Polarity */
mbed_official	235:685d5f11838f	236	uint32_t ClearInputPrescaler; /*!< TIM Clear Input prescaler.
mbed_official	235:685d5f11838f	237	This parameter can be a value of @ref TIM_ClearInput_Prescaler */
mbed_official	235:685d5f11838f	238	uint32_t ClearInputFilter; /*!< TIM Clear Input filter.
mbed_official	235:685d5f11838f	239	This parameter can be a number between Min_Data = 0x0 and Max_Data = 0xF */
mbed_official	235:685d5f11838f	240	}TIM_ClearInputConfigTypeDef;
mbed_official	235:685d5f11838f	241
mbed_official	235:685d5f11838f	242	/**
mbed_official	235:685d5f11838f	243	* @brief TIM Slave configuration Structure definition
mbed_official	235:685d5f11838f	244	*/
mbed_official	235:685d5f11838f	245	typedef struct {
mbed_official	235:685d5f11838f	246	uint32_t SlaveMode; /*!< Slave mode selection
mbed_official	235:685d5f11838f	247	This parameter can be a value of @ref TIM_Slave_Mode */
mbed_official	235:685d5f11838f	248	uint32_t InputTrigger; /*!< Input Trigger source
mbed_official	235:685d5f11838f	249	This parameter can be a value of @ref TIM_Trigger_Selection */
mbed_official	235:685d5f11838f	250	uint32_t TriggerPolarity; /*!< Input Trigger polarity
mbed_official	235:685d5f11838f	251	This parameter can be a value of @ref TIM_Trigger_Polarity */
mbed_official	235:685d5f11838f	252	uint32_t TriggerPrescaler; /*!< Input trigger prescaler
mbed_official	235:685d5f11838f	253	This parameter can be a value of @ref TIM_Trigger_Prescaler */
mbed_official	235:685d5f11838f	254	uint32_t TriggerFilter; /*!< Input trigger filter
mbed_official	235:685d5f11838f	255	This parameter can be a number between Min_Data = 0x0 and Max_Data = 0xF */
mbed_official	235:685d5f11838f	256
mbed_official	235:685d5f11838f	257	}TIM_SlaveConfigTypeDef;
mbed_official	235:685d5f11838f	258
mbed_official	235:685d5f11838f	259	/**
mbed_official	235:685d5f11838f	260	* @brief HAL State structures definition
mbed_official	235:685d5f11838f	261	*/
mbed_official	235:685d5f11838f	262	typedef enum
mbed_official	235:685d5f11838f	263	{
mbed_official	235:685d5f11838f	264	HAL_TIM_STATE_RESET = 0x00, /!< Peripheral not yet initialized or disabled /
mbed_official	235:685d5f11838f	265	HAL_TIM_STATE_READY = 0x01, /!< Peripheral Initialized and ready for use /
mbed_official	235:685d5f11838f	266	HAL_TIM_STATE_BUSY = 0x02, /!< An internal process is ongoing /
mbed_official	235:685d5f11838f	267	HAL_TIM_STATE_TIMEOUT = 0x03, /!< Timeout state /
mbed_official	235:685d5f11838f	268	HAL_TIM_STATE_ERROR = 0x04 /!< Reception process is ongoing /
mbed_official	235:685d5f11838f	269	}HAL_TIM_StateTypeDef;
mbed_official	235:685d5f11838f	270
mbed_official	235:685d5f11838f	271	/**
mbed_official	235:685d5f11838f	272	* @brief HAL Active channel structures definition
mbed_official	235:685d5f11838f	273	*/
mbed_official	235:685d5f11838f	274	typedef enum
mbed_official	235:685d5f11838f	275	{
mbed_official	235:685d5f11838f	276	HAL_TIM_ACTIVE_CHANNEL_1 = 0x01, /!< The active channel is 1 /
mbed_official	235:685d5f11838f	277	HAL_TIM_ACTIVE_CHANNEL_2 = 0x02, /!< The active channel is 2 /
mbed_official	235:685d5f11838f	278	HAL_TIM_ACTIVE_CHANNEL_3 = 0x04, /!< The active channel is 3 /
mbed_official	235:685d5f11838f	279	HAL_TIM_ACTIVE_CHANNEL_4 = 0x08, /!< The active channel is 4 /
mbed_official	235:685d5f11838f	280	HAL_TIM_ACTIVE_CHANNEL_CLEARED = 0x00 /!< All active channels cleared /
mbed_official	235:685d5f11838f	281	}HAL_TIM_ActiveChannel;
mbed_official	235:685d5f11838f	282
mbed_official	235:685d5f11838f	283	/**
mbed_official	235:685d5f11838f	284	* @brief TIM Time Base Handle Structure definition
mbed_official	235:685d5f11838f	285	*/
mbed_official	235:685d5f11838f	286	typedef struct
mbed_official	235:685d5f11838f	287	{
mbed_official	235:685d5f11838f	288	TIM_TypeDef Instance; /!< Register base address */
mbed_official	235:685d5f11838f	289	TIM_Base_InitTypeDef Init; /!< TIM Time Base required parameters /
mbed_official	235:685d5f11838f	290	HAL_TIM_ActiveChannel Channel; /!< Active channel /
mbed_official	235:685d5f11838f	291	DMA_HandleTypeDef hdma[7]; /!< DMA Handlers array
mbed_official	235:685d5f11838f	292	This array is accessed by a @ref DMA_Handle_index */
mbed_official	235:685d5f11838f	293	HAL_LockTypeDef Lock; /!< Locking object /
mbed_official	235:685d5f11838f	294	__IO HAL_TIM_StateTypeDef State; /!< TIM operation state /
mbed_official	235:685d5f11838f	295	}TIM_HandleTypeDef;
mbed_official	235:685d5f11838f	296
mbed_official	235:685d5f11838f	297	/* Exported constants --------------------------------------------------------*/
mbed_official	235:685d5f11838f	298	/** @defgroup TIM_Exported_Constants
mbed_official	235:685d5f11838f	299	* @{
mbed_official	235:685d5f11838f	300	*/
mbed_official	235:685d5f11838f	301
mbed_official	235:685d5f11838f	302	/** @defgroup TIM_Input_Channel_Polarity
mbed_official	235:685d5f11838f	303	* @{
mbed_official	235:685d5f11838f	304	*/
mbed_official	235:685d5f11838f	305	#define TIM_INPUTCHANNELPOLARITY_RISING ((uint32_t)0x00000000) /!< Polarity for TIx source /
mbed_official	235:685d5f11838f	306	#define TIM_INPUTCHANNELPOLARITY_FALLING (TIM_CCER_CC1P) /!< Polarity for TIx source /
mbed_official	235:685d5f11838f	307	#define TIM_INPUTCHANNELPOLARITY_BOTHEDGE (TIM_CCER_CC1P \| TIM_CCER_CC1NP) /!< Polarity for TIx source /
mbed_official	235:685d5f11838f	308	/**
mbed_official	235:685d5f11838f	309	* @}
mbed_official	235:685d5f11838f	310	*/
mbed_official	235:685d5f11838f	311
mbed_official	235:685d5f11838f	312	/** @defgroup TIM_ETR_Polarity
mbed_official	235:685d5f11838f	313	* @{
mbed_official	235:685d5f11838f	314	*/
mbed_official	235:685d5f11838f	315	#define TIM_ETRPOLARITY_INVERTED (TIM_SMCR_ETP) /!< Polarity for ETR source /
mbed_official	235:685d5f11838f	316	#define TIM_ETRPOLARITY_NONINVERTED ((uint32_t)0x0000) /!< Polarity for ETR source /
mbed_official	235:685d5f11838f	317	/**
mbed_official	235:685d5f11838f	318	* @}
mbed_official	235:685d5f11838f	319	*/
mbed_official	235:685d5f11838f	320
mbed_official	235:685d5f11838f	321	/** @defgroup TIM_ETR_Prescaler
mbed_official	235:685d5f11838f	322	* @{
mbed_official	235:685d5f11838f	323	*/
mbed_official	235:685d5f11838f	324	#define TIM_ETRPRESCALER_DIV1 ((uint32_t)0x0000) /!< No prescaler is used /
mbed_official	235:685d5f11838f	325	#define TIM_ETRPRESCALER_DIV2 (TIM_SMCR_ETPS_0) /!< ETR input source is divided by 2 /
mbed_official	235:685d5f11838f	326	#define TIM_ETRPRESCALER_DIV4 (TIM_SMCR_ETPS_1) /!< ETR input source is divided by 4 /
mbed_official	235:685d5f11838f	327	#define TIM_ETRPRESCALER_DIV8 (TIM_SMCR_ETPS) /!< ETR input source is divided by 8 /
mbed_official	235:685d5f11838f	328	/**
mbed_official	235:685d5f11838f	329	* @}
mbed_official	235:685d5f11838f	330	*/
mbed_official	235:685d5f11838f	331
mbed_official	235:685d5f11838f	332	/** @defgroup TIM_Counter_Mode
mbed_official	235:685d5f11838f	333	* @{
mbed_official	235:685d5f11838f	334	*/
mbed_official	235:685d5f11838f	335	#define TIM_COUNTERMODE_UP ((uint32_t)0x0000)
mbed_official	235:685d5f11838f	336	#define TIM_COUNTERMODE_DOWN TIM_CR1_DIR
mbed_official	235:685d5f11838f	337	#define TIM_COUNTERMODE_CENTERALIGNED1 TIM_CR1_CMS_0
mbed_official	235:685d5f11838f	338	#define TIM_COUNTERMODE_CENTERALIGNED2 TIM_CR1_CMS_1
mbed_official	235:685d5f11838f	339	#define TIM_COUNTERMODE_CENTERALIGNED3 TIM_CR1_CMS
mbed_official	235:685d5f11838f	340
mbed_official	235:685d5f11838f	341	#define IS_TIM_COUNTER_MODE(MODE) (((MODE) == TIM_COUNTERMODE_UP) \|\| \
mbed_official	235:685d5f11838f	342	((MODE) == TIM_COUNTERMODE_DOWN) \|\| \
mbed_official	235:685d5f11838f	343	((MODE) == TIM_COUNTERMODE_CENTERALIGNED1) \|\| \
mbed_official	235:685d5f11838f	344	((MODE) == TIM_COUNTERMODE_CENTERALIGNED2) \|\| \
mbed_official	235:685d5f11838f	345	((MODE) == TIM_COUNTERMODE_CENTERALIGNED3))
mbed_official	235:685d5f11838f	346	/**
mbed_official	235:685d5f11838f	347	* @}
mbed_official	235:685d5f11838f	348	*/
mbed_official	235:685d5f11838f	349
mbed_official	235:685d5f11838f	350	/** @defgroup TIM_ClockDivision
mbed_official	235:685d5f11838f	351	* @{
mbed_official	235:685d5f11838f	352	*/
mbed_official	235:685d5f11838f	353	#define TIM_CLOCKDIVISION_DIV1 ((uint32_t)0x0000)
mbed_official	235:685d5f11838f	354	#define TIM_CLOCKDIVISION_DIV2 (TIM_CR1_CKD_0)
mbed_official	235:685d5f11838f	355	#define TIM_CLOCKDIVISION_DIV4 (TIM_CR1_CKD_1)
mbed_official	235:685d5f11838f	356
mbed_official	235:685d5f11838f	357	#define IS_TIM_CLOCKDIVISION_DIV(DIV) (((DIV) == TIM_CLOCKDIVISION_DIV1) \|\| \
mbed_official	235:685d5f11838f	358	((DIV) == TIM_CLOCKDIVISION_DIV2) \|\| \
mbed_official	235:685d5f11838f	359	((DIV) == TIM_CLOCKDIVISION_DIV4))
mbed_official	235:685d5f11838f	360	/**
mbed_official	235:685d5f11838f	361	* @}
mbed_official	235:685d5f11838f	362	*/
mbed_official	235:685d5f11838f	363
mbed_official	235:685d5f11838f	364	/** @defgroup TIM_Output_Compare_and_PWM_modes
mbed_official	235:685d5f11838f	365	* @{
mbed_official	235:685d5f11838f	366	*/
mbed_official	235:685d5f11838f	367	#define TIM_OCMODE_TIMING ((uint32_t)0x0000)
mbed_official	235:685d5f11838f	368	#define TIM_OCMODE_ACTIVE (TIM_CCMR1_OC1M_0)
mbed_official	235:685d5f11838f	369	#define TIM_OCMODE_INACTIVE (TIM_CCMR1_OC1M_1)
mbed_official	235:685d5f11838f	370	#define TIM_OCMODE_TOGGLE (TIM_CCMR1_OC1M_0 \| TIM_CCMR1_OC1M_1)
mbed_official	235:685d5f11838f	371	#define TIM_OCMODE_PWM1 (TIM_CCMR1_OC1M_1 \| TIM_CCMR1_OC1M_2)
mbed_official	235:685d5f11838f	372	#define TIM_OCMODE_PWM2 (TIM_CCMR1_OC1M)
mbed_official	235:685d5f11838f	373	#define TIM_OCMODE_FORCED_ACTIVE (TIM_CCMR1_OC1M_0 \| TIM_CCMR1_OC1M_2)
mbed_official	235:685d5f11838f	374	#define TIM_OCMODE_FORCED_INACTIVE (TIM_CCMR1_OC1M_2)
mbed_official	235:685d5f11838f	375
mbed_official	235:685d5f11838f	376	#define IS_TIM_PWM_MODE(MODE) (((MODE) == TIM_OCMODE_PWM1) \|\| \
mbed_official	235:685d5f11838f	377	((MODE) == TIM_OCMODE_PWM2))
mbed_official	235:685d5f11838f	378
mbed_official	235:685d5f11838f	379	#define IS_TIM_OC_MODE(MODE) (((MODE) == TIM_OCMODE_TIMING) \|\| \
mbed_official	235:685d5f11838f	380	((MODE) == TIM_OCMODE_ACTIVE) \|\| \
mbed_official	235:685d5f11838f	381	((MODE) == TIM_OCMODE_INACTIVE) \|\| \
mbed_official	235:685d5f11838f	382	((MODE) == TIM_OCMODE_TOGGLE) \|\| \
mbed_official	235:685d5f11838f	383	((MODE) == TIM_OCMODE_FORCED_ACTIVE) \|\| \
mbed_official	235:685d5f11838f	384	((MODE) == TIM_OCMODE_FORCED_INACTIVE))
mbed_official	235:685d5f11838f	385	/**
mbed_official	235:685d5f11838f	386	* @}
mbed_official	235:685d5f11838f	387	*/
mbed_official	235:685d5f11838f	388
mbed_official	235:685d5f11838f	389	/** @defgroup TIM_Output_Compare_State
mbed_official	235:685d5f11838f	390	* @{
mbed_official	235:685d5f11838f	391	*/
mbed_official	235:685d5f11838f	392	#define TIM_OUTPUTSTATE_DISABLE ((uint32_t)0x0000)
mbed_official	235:685d5f11838f	393	#define TIM_OUTPUTSTATE_ENABLE (TIM_CCER_CC1E)
mbed_official	235:685d5f11838f	394
mbed_official	235:685d5f11838f	395	#define IS_TIM_OUTPUT_STATE(STATE) (((STATE) == TIM_OUTPUTSTATE_DISABLE) \|\| \
mbed_official	235:685d5f11838f	396	((STATE) == TIM_OUTPUTSTATE_ENABLE))
mbed_official	235:685d5f11838f	397	/**
mbed_official	235:685d5f11838f	398	* @}
mbed_official	235:685d5f11838f	399	*/
mbed_official	235:685d5f11838f	400
mbed_official	235:685d5f11838f	401	/** @defgroup TIM_Output_Fast_State
mbed_official	235:685d5f11838f	402	* @{
mbed_official	235:685d5f11838f	403	*/
mbed_official	235:685d5f11838f	404	#define TIM_OCFAST_DISABLE ((uint32_t)0x0000)
mbed_official	235:685d5f11838f	405	#define TIM_OCFAST_ENABLE (TIM_CCMR1_OC1FE)
mbed_official	235:685d5f11838f	406
mbed_official	235:685d5f11838f	407	#define IS_TIM_FAST_STATE(STATE) (((STATE) == TIM_OCFAST_DISABLE) \|\| \
mbed_official	235:685d5f11838f	408	((STATE) == TIM_OCFAST_ENABLE))
mbed_official	235:685d5f11838f	409	/**
mbed_official	235:685d5f11838f	410	* @}
mbed_official	235:685d5f11838f	411	*/
mbed_official	235:685d5f11838f	412
mbed_official	235:685d5f11838f	413	/** @defgroup TIM_Output_Compare_N_State
mbed_official	235:685d5f11838f	414	* @{
mbed_official	235:685d5f11838f	415	*/
mbed_official	235:685d5f11838f	416	#define TIM_OUTPUTNSTATE_DISABLE ((uint32_t)0x0000)
mbed_official	235:685d5f11838f	417	#define TIM_OUTPUTNSTATE_ENABLE (TIM_CCER_CC1NE)
mbed_official	235:685d5f11838f	418
mbed_official	235:685d5f11838f	419	#define IS_TIM_OUTPUTN_STATE(STATE) (((STATE) == TIM_OUTPUTNSTATE_DISABLE) \|\| \
mbed_official	235:685d5f11838f	420	((STATE) == TIM_OUTPUTNSTATE_ENABLE))
mbed_official	235:685d5f11838f	421	/**
mbed_official	235:685d5f11838f	422	* @}
mbed_official	235:685d5f11838f	423	*/
mbed_official	235:685d5f11838f	424
mbed_official	235:685d5f11838f	425	/** @defgroup TIM_Output_Compare_Polarity
mbed_official	235:685d5f11838f	426	* @{
mbed_official	235:685d5f11838f	427	*/
mbed_official	235:685d5f11838f	428	#define TIM_OCPOLARITY_HIGH ((uint32_t)0x0000)
mbed_official	235:685d5f11838f	429	#define TIM_OCPOLARITY_LOW (TIM_CCER_CC1P)
mbed_official	235:685d5f11838f	430
mbed_official	235:685d5f11838f	431	#define IS_TIM_OC_POLARITY(POLARITY) (((POLARITY) == TIM_OCPOLARITY_HIGH) \|\| \
mbed_official	235:685d5f11838f	432	((POLARITY) == TIM_OCPOLARITY_LOW))
mbed_official	235:685d5f11838f	433	/**
mbed_official	235:685d5f11838f	434	* @}
mbed_official	235:685d5f11838f	435	*/
mbed_official	235:685d5f11838f	436
mbed_official	235:685d5f11838f	437	/** @defgroup TIM_Output_Compare_N_Polarity
mbed_official	235:685d5f11838f	438	* @{
mbed_official	235:685d5f11838f	439	*/
mbed_official	235:685d5f11838f	440	#define TIM_OCNPOLARITY_HIGH ((uint32_t)0x0000)
mbed_official	235:685d5f11838f	441	#define TIM_OCNPOLARITY_LOW (TIM_CCER_CC1NP)
mbed_official	235:685d5f11838f	442
mbed_official	235:685d5f11838f	443	#define IS_TIM_OCN_POLARITY(POLARITY) (((POLARITY) == TIM_OCNPOLARITY_HIGH) \|\| \
mbed_official	235:685d5f11838f	444	((POLARITY) == TIM_OCNPOLARITY_LOW))
mbed_official	235:685d5f11838f	445	/**
mbed_official	235:685d5f11838f	446	* @}
mbed_official	235:685d5f11838f	447	*/
mbed_official	235:685d5f11838f	448
mbed_official	235:685d5f11838f	449	/** @defgroup TIM_Output_Compare_Idle_State
mbed_official	235:685d5f11838f	450	* @{
mbed_official	235:685d5f11838f	451	*/
mbed_official	235:685d5f11838f	452	#define TIM_OCIDLESTATE_SET (TIM_CR2_OIS1)
mbed_official	235:685d5f11838f	453	#define TIM_OCIDLESTATE_RESET ((uint32_t)0x0000)
mbed_official	235:685d5f11838f	454	#define IS_TIM_OCIDLE_STATE(STATE) (((STATE) == TIM_OCIDLESTATE_SET) \|\| \
mbed_official	235:685d5f11838f	455	((STATE) == TIM_OCIDLESTATE_RESET))
mbed_official	235:685d5f11838f	456	/**
mbed_official	235:685d5f11838f	457	* @}
mbed_official	235:685d5f11838f	458	*/
mbed_official	235:685d5f11838f	459
mbed_official	235:685d5f11838f	460	/** @defgroup TIM_Output_Compare_N_Idle_State
mbed_official	235:685d5f11838f	461	* @{
mbed_official	235:685d5f11838f	462	*/
mbed_official	235:685d5f11838f	463	#define TIM_OCNIDLESTATE_SET (TIM_CR2_OIS1N)
mbed_official	235:685d5f11838f	464	#define TIM_OCNIDLESTATE_RESET ((uint32_t)0x0000)
mbed_official	235:685d5f11838f	465	#define IS_TIM_OCNIDLE_STATE(STATE) (((STATE) == TIM_OCNIDLESTATE_SET) \|\| \
mbed_official	235:685d5f11838f	466	((STATE) == TIM_OCNIDLESTATE_RESET))
mbed_official	235:685d5f11838f	467	/**
mbed_official	235:685d5f11838f	468	* @}
mbed_official	235:685d5f11838f	469	*/
mbed_official	235:685d5f11838f	470
mbed_official	235:685d5f11838f	471	/** @defgroup TIM_Channel
mbed_official	235:685d5f11838f	472	* @{
mbed_official	235:685d5f11838f	473	*/
mbed_official	235:685d5f11838f	474	#define TIM_CHANNEL_1 ((uint32_t)0x0000)
mbed_official	235:685d5f11838f	475	#define TIM_CHANNEL_2 ((uint32_t)0x0004)
mbed_official	235:685d5f11838f	476	#define TIM_CHANNEL_3 ((uint32_t)0x0008)
mbed_official	235:685d5f11838f	477	#define TIM_CHANNEL_4 ((uint32_t)0x000C)
mbed_official	235:685d5f11838f	478	#define TIM_CHANNEL_ALL ((uint32_t)0x0018)
mbed_official	235:685d5f11838f	479
mbed_official	235:685d5f11838f	480	#define IS_TIM_CHANNELS(CHANNEL) (((CHANNEL) == TIM_CHANNEL_1) \|\| \
mbed_official	235:685d5f11838f	481	((CHANNEL) == TIM_CHANNEL_2) \|\| \
mbed_official	235:685d5f11838f	482	((CHANNEL) == TIM_CHANNEL_3) \|\| \
mbed_official	235:685d5f11838f	483	((CHANNEL) == TIM_CHANNEL_4) \|\| \
mbed_official	235:685d5f11838f	484	((CHANNEL) == TIM_CHANNEL_ALL))
mbed_official	235:685d5f11838f	485
mbed_official	235:685d5f11838f	486	#define IS_TIM_PWMI_CHANNELS(CHANNEL) (((CHANNEL) == TIM_CHANNEL_1) \|\| \
mbed_official	235:685d5f11838f	487	((CHANNEL) == TIM_CHANNEL_2))
mbed_official	235:685d5f11838f	488
mbed_official	235:685d5f11838f	489	#define IS_TIM_OPM_CHANNELS(CHANNEL) (((CHANNEL) == TIM_CHANNEL_1) \|\| \
mbed_official	235:685d5f11838f	490	((CHANNEL) == TIM_CHANNEL_2))
mbed_official	235:685d5f11838f	491
mbed_official	235:685d5f11838f	492	#define IS_TIM_COMPLEMENTARY_CHANNELS(CHANNEL) (((CHANNEL) == TIM_CHANNEL_1) \|\| \
mbed_official	235:685d5f11838f	493	((CHANNEL) == TIM_CHANNEL_2) \|\| \
mbed_official	235:685d5f11838f	494	((CHANNEL) == TIM_CHANNEL_3))
mbed_official	235:685d5f11838f	495	/**
mbed_official	235:685d5f11838f	496	* @}
mbed_official	235:685d5f11838f	497	*/
mbed_official	235:685d5f11838f	498
mbed_official	235:685d5f11838f	499	/** @defgroup TIM_Input_Capture_Polarity
mbed_official	235:685d5f11838f	500	* @{
mbed_official	235:685d5f11838f	501	*/
mbed_official	235:685d5f11838f	502	#define TIM_ICPOLARITY_RISING TIM_INPUTCHANNELPOLARITY_RISING
mbed_official	235:685d5f11838f	503	#define TIM_ICPOLARITY_FALLING TIM_INPUTCHANNELPOLARITY_FALLING
mbed_official	235:685d5f11838f	504	#define TIM_ICPOLARITY_BOTHEDGE TIM_INPUTCHANNELPOLARITY_BOTHEDGE
mbed_official	235:685d5f11838f	505
mbed_official	235:685d5f11838f	506	#define IS_TIM_IC_POLARITY(POLARITY) (((POLARITY) == TIM_ICPOLARITY_RISING) \|\| \
mbed_official	235:685d5f11838f	507	((POLARITY) == TIM_ICPOLARITY_FALLING) \|\| \
mbed_official	235:685d5f11838f	508	((POLARITY) == TIM_ICPOLARITY_BOTHEDGE))
mbed_official	235:685d5f11838f	509	/**
mbed_official	235:685d5f11838f	510	* @}
mbed_official	235:685d5f11838f	511	*/
mbed_official	235:685d5f11838f	512
mbed_official	235:685d5f11838f	513	/** @defgroup TIM_Input_Capture_Selection
mbed_official	235:685d5f11838f	514	* @{
mbed_official	235:685d5f11838f	515	*/
mbed_official	235:685d5f11838f	516	#define TIM_ICSELECTION_DIRECTTI (TIM_CCMR1_CC1S_0) /*!< TIM Input 1, 2, 3 or 4 is selected to be
mbed_official	235:685d5f11838f	517	connected to IC1, IC2, IC3 or IC4, respectively */
mbed_official	235:685d5f11838f	518	#define TIM_ICSELECTION_INDIRECTTI (TIM_CCMR1_CC1S_1) /*!< TIM Input 1, 2, 3 or 4 is selected to be
mbed_official	235:685d5f11838f	519	connected to IC2, IC1, IC4 or IC3, respectively */
mbed_official	235:685d5f11838f	520	#define TIM_ICSELECTION_TRC (TIM_CCMR1_CC1S) /!< TIM Input 1, 2, 3 or 4 is selected to be connected to TRC /
mbed_official	235:685d5f11838f	521
mbed_official	235:685d5f11838f	522	#define IS_TIM_IC_SELECTION(SELECTION) (((SELECTION) == TIM_ICSELECTION_DIRECTTI) \|\| \
mbed_official	235:685d5f11838f	523	((SELECTION) == TIM_ICSELECTION_INDIRECTTI) \|\| \
mbed_official	235:685d5f11838f	524	((SELECTION) == TIM_ICSELECTION_TRC))
mbed_official	235:685d5f11838f	525	/**
mbed_official	235:685d5f11838f	526	* @}
mbed_official	235:685d5f11838f	527	*/
mbed_official	235:685d5f11838f	528
mbed_official	235:685d5f11838f	529	/** @defgroup TIM_Input_Capture_Prescaler
mbed_official	235:685d5f11838f	530	* @{
mbed_official	235:685d5f11838f	531	*/
mbed_official	235:685d5f11838f	532	#define TIM_ICPSC_DIV1 ((uint32_t)0x0000) /!< Capture performed each time an edge is detected on the capture input /
mbed_official	235:685d5f11838f	533	#define TIM_ICPSC_DIV2 (TIM_CCMR1_IC1PSC_0) /!< Capture performed once every 2 events /
mbed_official	235:685d5f11838f	534	#define TIM_ICPSC_DIV4 (TIM_CCMR1_IC1PSC_1) /!< Capture performed once every 4 events /
mbed_official	235:685d5f11838f	535	#define TIM_ICPSC_DIV8 (TIM_CCMR1_IC1PSC) /!< Capture performed once every 8 events /
mbed_official	235:685d5f11838f	536
mbed_official	235:685d5f11838f	537	#define IS_TIM_IC_PRESCALER(PRESCALER) (((PRESCALER) == TIM_ICPSC_DIV1) \|\| \
mbed_official	235:685d5f11838f	538	((PRESCALER) == TIM_ICPSC_DIV2) \|\| \
mbed_official	235:685d5f11838f	539	((PRESCALER) == TIM_ICPSC_DIV4) \|\| \
mbed_official	235:685d5f11838f	540	((PRESCALER) == TIM_ICPSC_DIV8))
mbed_official	235:685d5f11838f	541	/**
mbed_official	235:685d5f11838f	542	* @}
mbed_official	235:685d5f11838f	543	*/
mbed_official	235:685d5f11838f	544
mbed_official	235:685d5f11838f	545	/** @defgroup TIM_One_Pulse_Mode
mbed_official	235:685d5f11838f	546	* @{
mbed_official	235:685d5f11838f	547	*/
mbed_official	235:685d5f11838f	548	#define TIM_OPMODE_SINGLE (TIM_CR1_OPM)
mbed_official	235:685d5f11838f	549	#define TIM_OPMODE_REPETITIVE ((uint32_t)0x0000)
mbed_official	235:685d5f11838f	550	#define IS_TIM_OPM_MODE(MODE) (((MODE) == TIM_OPMODE_SINGLE) \|\| \
mbed_official	235:685d5f11838f	551	((MODE) == TIM_OPMODE_REPETITIVE))
mbed_official	235:685d5f11838f	552	/**
mbed_official	235:685d5f11838f	553	* @}
mbed_official	235:685d5f11838f	554	*/
mbed_official	235:685d5f11838f	555
mbed_official	235:685d5f11838f	556	/** @defgroup TIM_Encoder_Mode
mbed_official	235:685d5f11838f	557	* @{
mbed_official	235:685d5f11838f	558	*/
mbed_official	235:685d5f11838f	559	#define TIM_ENCODERMODE_TI1 (TIM_SMCR_SMS_0)
mbed_official	235:685d5f11838f	560	#define TIM_ENCODERMODE_TI2 (TIM_SMCR_SMS_1)
mbed_official	235:685d5f11838f	561	#define TIM_ENCODERMODE_TI12 (TIM_SMCR_SMS_1 \| TIM_SMCR_SMS_0)
mbed_official	235:685d5f11838f	562	#define IS_TIM_ENCODER_MODE(MODE) (((MODE) == TIM_ENCODERMODE_TI1) \|\| \
mbed_official	235:685d5f11838f	563	((MODE) == TIM_ENCODERMODE_TI2) \|\| \
mbed_official	235:685d5f11838f	564	((MODE) == TIM_ENCODERMODE_TI12))
mbed_official	235:685d5f11838f	565	/**
mbed_official	235:685d5f11838f	566	* @}
mbed_official	235:685d5f11838f	567	*/
mbed_official	235:685d5f11838f	568
mbed_official	235:685d5f11838f	569	/** @defgroup TIM_Interrupt_definition
mbed_official	235:685d5f11838f	570	* @{
mbed_official	235:685d5f11838f	571	*/
mbed_official	235:685d5f11838f	572	#define TIM_IT_UPDATE (TIM_DIER_UIE)
mbed_official	235:685d5f11838f	573	#define TIM_IT_CC1 (TIM_DIER_CC1IE)
mbed_official	235:685d5f11838f	574	#define TIM_IT_CC2 (TIM_DIER_CC2IE)
mbed_official	235:685d5f11838f	575	#define TIM_IT_CC3 (TIM_DIER_CC3IE)
mbed_official	235:685d5f11838f	576	#define TIM_IT_CC4 (TIM_DIER_CC4IE)
mbed_official	235:685d5f11838f	577	#define TIM_IT_COM (TIM_DIER_COMIE)
mbed_official	235:685d5f11838f	578	#define TIM_IT_TRIGGER (TIM_DIER_TIE)
mbed_official	235:685d5f11838f	579	#define TIM_IT_BREAK (TIM_DIER_BIE)
mbed_official	235:685d5f11838f	580
mbed_official	235:685d5f11838f	581	#define IS_TIM_IT(IT) ((((IT) & 0xFFFFFF00) == 0x00000000) && ((IT) != 0x00000000))
mbed_official	235:685d5f11838f	582
mbed_official	235:685d5f11838f	583	#define IS_TIM_GET_IT(IT) (((IT) == TIM_IT_UPDATE) \|\| \
mbed_official	235:685d5f11838f	584	((IT) == TIM_IT_CC1) \|\| \
mbed_official	235:685d5f11838f	585	((IT) == TIM_IT_CC2) \|\| \
mbed_official	235:685d5f11838f	586	((IT) == TIM_IT_CC3) \|\| \
mbed_official	235:685d5f11838f	587	((IT) == TIM_IT_CC4) \|\| \
mbed_official	235:685d5f11838f	588	((IT) == TIM_IT_COM) \|\| \
mbed_official	235:685d5f11838f	589	((IT) == TIM_IT_TRIGGER) \|\| \
mbed_official	235:685d5f11838f	590	((IT) == TIM_IT_BREAK))
mbed_official	235:685d5f11838f	591	/**
mbed_official	235:685d5f11838f	592	* @}
mbed_official	235:685d5f11838f	593	*/
mbed_official	235:685d5f11838f	594	#define TIM_COMMUTATION_TRGI (TIM_CR2_CCUS)
mbed_official	235:685d5f11838f	595	#define TIM_COMMUTATION_SOFTWARE ((uint32_t)0x0000)
mbed_official	235:685d5f11838f	596
mbed_official	235:685d5f11838f	597	/** @defgroup TIM_DMA_sources
mbed_official	235:685d5f11838f	598	* @{
mbed_official	235:685d5f11838f	599	*/
mbed_official	235:685d5f11838f	600	#define TIM_DMA_UPDATE (TIM_DIER_UDE)
mbed_official	235:685d5f11838f	601	#define TIM_DMA_CC1 (TIM_DIER_CC1DE)
mbed_official	235:685d5f11838f	602	#define TIM_DMA_CC2 (TIM_DIER_CC2DE)
mbed_official	235:685d5f11838f	603	#define TIM_DMA_CC3 (TIM_DIER_CC3DE)
mbed_official	235:685d5f11838f	604	#define TIM_DMA_CC4 (TIM_DIER_CC4DE)
mbed_official	235:685d5f11838f	605	#define TIM_DMA_COM (TIM_DIER_COMDE)
mbed_official	235:685d5f11838f	606	#define TIM_DMA_TRIGGER (TIM_DIER_TDE)
mbed_official	235:685d5f11838f	607	#define IS_TIM_DMA_SOURCE(SOURCE) ((((SOURCE) & 0xFFFF80FF) == 0x00000000) && ((SOURCE) != 0x00000000))
mbed_official	235:685d5f11838f	608	/**
mbed_official	235:685d5f11838f	609	* @}
mbed_official	235:685d5f11838f	610	*/
mbed_official	235:685d5f11838f	611
mbed_official	235:685d5f11838f	612	/** @defgroup TIM_Event_Source
mbed_official	235:685d5f11838f	613	* @{
mbed_official	235:685d5f11838f	614	*/
mbed_official	235:685d5f11838f	615	#define TIM_EventSource_Update TIM_EGR_UG
mbed_official	235:685d5f11838f	616	#define TIM_EventSource_CC1 TIM_EGR_CC1G
mbed_official	235:685d5f11838f	617	#define TIM_EventSource_CC2 TIM_EGR_CC2G
mbed_official	235:685d5f11838f	618	#define TIM_EventSource_CC3 TIM_EGR_CC3G
mbed_official	235:685d5f11838f	619	#define TIM_EventSource_CC4 TIM_EGR_CC4G
mbed_official	235:685d5f11838f	620	#define TIM_EventSource_COM TIM_EGR_COMG
mbed_official	235:685d5f11838f	621	#define TIM_EventSource_Trigger TIM_EGR_TG
mbed_official	235:685d5f11838f	622	#define TIM_EventSource_Break TIM_EGR_BG
mbed_official	235:685d5f11838f	623	#define IS_TIM_EVENT_SOURCE(SOURCE) ((((SOURCE) & 0xFFFFFF00) == 0x00000000) && ((SOURCE) != 0x00000000))
mbed_official	235:685d5f11838f	624	/**
mbed_official	235:685d5f11838f	625	* @}
mbed_official	235:685d5f11838f	626	*/
mbed_official	235:685d5f11838f	627
mbed_official	235:685d5f11838f	628	/** @defgroup TIM_Flag_definition
mbed_official	235:685d5f11838f	629	* @{
mbed_official	235:685d5f11838f	630	*/
mbed_official	235:685d5f11838f	631	#define TIM_FLAG_UPDATE (TIM_SR_UIF)
mbed_official	235:685d5f11838f	632	#define TIM_FLAG_CC1 (TIM_SR_CC1IF)
mbed_official	235:685d5f11838f	633	#define TIM_FLAG_CC2 (TIM_SR_CC2IF)
mbed_official	235:685d5f11838f	634	#define TIM_FLAG_CC3 (TIM_SR_CC3IF)
mbed_official	235:685d5f11838f	635	#define TIM_FLAG_CC4 (TIM_SR_CC4IF)
mbed_official	235:685d5f11838f	636	#define TIM_FLAG_COM (TIM_SR_COMIF)
mbed_official	235:685d5f11838f	637	#define TIM_FLAG_TRIGGER (TIM_SR_TIF)
mbed_official	235:685d5f11838f	638	#define TIM_FLAG_BREAK (TIM_SR_BIF)
mbed_official	235:685d5f11838f	639	#define TIM_FLAG_CC1OF (TIM_SR_CC1OF)
mbed_official	235:685d5f11838f	640	#define TIM_FLAG_CC2OF (TIM_SR_CC2OF)
mbed_official	235:685d5f11838f	641	#define TIM_FLAG_CC3OF (TIM_SR_CC3OF)
mbed_official	235:685d5f11838f	642	#define TIM_FLAG_CC4OF (TIM_SR_CC4OF)
mbed_official	235:685d5f11838f	643
mbed_official	235:685d5f11838f	644	#define IS_TIM_FLAG(FLAG) (((FLAG) == TIM_FLAG_UPDATE) \|\| \
mbed_official	235:685d5f11838f	645	((FLAG) == TIM_FLAG_CC1) \|\| \
mbed_official	235:685d5f11838f	646	((FLAG) == TIM_FLAG_CC2) \|\| \
mbed_official	235:685d5f11838f	647	((FLAG) == TIM_FLAG_CC3) \|\| \
mbed_official	235:685d5f11838f	648	((FLAG) == TIM_FLAG_CC4) \|\| \
mbed_official	235:685d5f11838f	649	((FLAG) == TIM_FLAG_COM) \|\| \
mbed_official	235:685d5f11838f	650	((FLAG) == TIM_FLAG_TRIGGER) \|\| \
mbed_official	235:685d5f11838f	651	((FLAG) == TIM_FLAG_BREAK) \|\| \
mbed_official	235:685d5f11838f	652	((FLAG) == TIM_FLAG_CC1OF) \|\| \
mbed_official	235:685d5f11838f	653	((FLAG) == TIM_FLAG_CC2OF) \|\| \
mbed_official	235:685d5f11838f	654	((FLAG) == TIM_FLAG_CC3OF) \|\| \
mbed_official	235:685d5f11838f	655	((FLAG) == TIM_FLAG_CC4OF))
mbed_official	235:685d5f11838f	656	/**
mbed_official	235:685d5f11838f	657	* @}
mbed_official	235:685d5f11838f	658	*/
mbed_official	235:685d5f11838f	659
mbed_official	235:685d5f11838f	660	/** @defgroup TIM_Clock_Source
mbed_official	235:685d5f11838f	661	* @{
mbed_official	235:685d5f11838f	662	*/
mbed_official	235:685d5f11838f	663	#define TIM_CLOCKSOURCE_ETRMODE2 (TIM_SMCR_ETPS_1)
mbed_official	235:685d5f11838f	664	#define TIM_CLOCKSOURCE_INTERNAL (TIM_SMCR_ETPS_0)
mbed_official	235:685d5f11838f	665	#define TIM_CLOCKSOURCE_ITR0 ((uint32_t)0x0000)
mbed_official	235:685d5f11838f	666	#define TIM_CLOCKSOURCE_ITR1 (TIM_SMCR_TS_0)
mbed_official	235:685d5f11838f	667	#define TIM_CLOCKSOURCE_ITR2 (TIM_SMCR_TS_1)
mbed_official	235:685d5f11838f	668	#define TIM_CLOCKSOURCE_ITR3 (TIM_SMCR_TS_0 \| TIM_SMCR_TS_1)
mbed_official	235:685d5f11838f	669	#define TIM_CLOCKSOURCE_TI1ED (TIM_SMCR_TS_2)
mbed_official	235:685d5f11838f	670	#define TIM_CLOCKSOURCE_TI1 (TIM_SMCR_TS_0 \| TIM_SMCR_TS_2)
mbed_official	235:685d5f11838f	671	#define TIM_CLOCKSOURCE_TI2 (TIM_SMCR_TS_1 \| TIM_SMCR_TS_2)
mbed_official	235:685d5f11838f	672	#define TIM_CLOCKSOURCE_ETRMODE1 (TIM_SMCR_TS)
mbed_official	235:685d5f11838f	673
mbed_official	235:685d5f11838f	674	#define IS_TIM_CLOCKSOURCE(CLOCK) (((CLOCK) == TIM_CLOCKSOURCE_INTERNAL) \|\| \
mbed_official	235:685d5f11838f	675	((CLOCK) == TIM_CLOCKSOURCE_ETRMODE2) \|\| \
mbed_official	235:685d5f11838f	676	((CLOCK) == TIM_CLOCKSOURCE_ITR0) \|\| \
mbed_official	235:685d5f11838f	677	((CLOCK) == TIM_CLOCKSOURCE_ITR1) \|\| \
mbed_official	235:685d5f11838f	678	((CLOCK) == TIM_CLOCKSOURCE_ITR2) \|\| \
mbed_official	235:685d5f11838f	679	((CLOCK) == TIM_CLOCKSOURCE_ITR3) \|\| \
mbed_official	235:685d5f11838f	680	((CLOCK) == TIM_CLOCKSOURCE_TI1ED) \|\| \
mbed_official	235:685d5f11838f	681	((CLOCK) == TIM_CLOCKSOURCE_TI1) \|\| \
mbed_official	235:685d5f11838f	682	((CLOCK) == TIM_CLOCKSOURCE_TI2) \|\| \
mbed_official	235:685d5f11838f	683	((CLOCK) == TIM_CLOCKSOURCE_ETRMODE1))
mbed_official	235:685d5f11838f	684	/**
mbed_official	235:685d5f11838f	685	* @}
mbed_official	235:685d5f11838f	686	*/
mbed_official	235:685d5f11838f	687
mbed_official	235:685d5f11838f	688	/** @defgroup TIM_Clock_Polarity
mbed_official	235:685d5f11838f	689	* @{
mbed_official	235:685d5f11838f	690	*/
mbed_official	235:685d5f11838f	691	#define TIM_CLOCKPOLARITY_INVERTED TIM_ETRPOLARITY_INVERTED /!< Polarity for ETRx clock sources /
mbed_official	235:685d5f11838f	692	#define TIM_CLOCKPOLARITY_NONINVERTED TIM_ETRPOLARITY_NONINVERTED /!< Polarity for ETRx clock sources /
mbed_official	235:685d5f11838f	693	#define TIM_CLOCKPOLARITY_RISING TIM_INPUTCHANNELPOLARITY_RISING /!< Polarity for TIx clock sources /
mbed_official	235:685d5f11838f	694	#define TIM_CLOCKPOLARITY_FALLING TIM_INPUTCHANNELPOLARITY_FALLING /!< Polarity for TIx clock sources /
mbed_official	235:685d5f11838f	695	#define TIM_CLOCKPOLARITY_BOTHEDGE TIM_INPUTCHANNELPOLARITY_BOTHEDGE /!< Polarity for TIx clock sources /
mbed_official	235:685d5f11838f	696
mbed_official	235:685d5f11838f	697	#define IS_TIM_CLOCKPOLARITY(POLARITY) (((POLARITY) == TIM_CLOCKPOLARITY_INVERTED) \|\| \
mbed_official	235:685d5f11838f	698	((POLARITY) == TIM_CLOCKPOLARITY_NONINVERTED) \|\| \
mbed_official	235:685d5f11838f	699	((POLARITY) == TIM_CLOCKPOLARITY_RISING) \|\| \
mbed_official	235:685d5f11838f	700	((POLARITY) == TIM_CLOCKPOLARITY_FALLING) \|\| \
mbed_official	235:685d5f11838f	701	((POLARITY) == TIM_CLOCKPOLARITY_BOTHEDGE))
mbed_official	235:685d5f11838f	702	/**
mbed_official	235:685d5f11838f	703	* @}
mbed_official	235:685d5f11838f	704	*/
mbed_official	235:685d5f11838f	705
mbed_official	235:685d5f11838f	706	/** @defgroup TIM_Clock_Prescaler
mbed_official	235:685d5f11838f	707	* @{
mbed_official	235:685d5f11838f	708	*/
mbed_official	235:685d5f11838f	709	#define TIM_CLOCKPRESCALER_DIV1 TIM_ETRPRESCALER_DIV1 /!< No prescaler is used /
mbed_official	235:685d5f11838f	710	#define TIM_CLOCKPRESCALER_DIV2 TIM_ETRPRESCALER_DIV2 /!< Prescaler for External ETR Clock: Capture performed once every 2 events. /
mbed_official	235:685d5f11838f	711	#define TIM_CLOCKPRESCALER_DIV4 TIM_ETRPRESCALER_DIV4 /!< Prescaler for External ETR Clock: Capture performed once every 4 events. /
mbed_official	235:685d5f11838f	712	#define TIM_CLOCKPRESCALER_DIV8 TIM_ETRPRESCALER_DIV8 /!< Prescaler for External ETR Clock: Capture performed once every 8 events. /
mbed_official	235:685d5f11838f	713
mbed_official	235:685d5f11838f	714	#define IS_TIM_CLOCKPRESCALER(PRESCALER) (((PRESCALER) == TIM_CLOCKPRESCALER_DIV1) \|\| \
mbed_official	235:685d5f11838f	715	((PRESCALER) == TIM_CLOCKPRESCALER_DIV2) \|\| \
mbed_official	235:685d5f11838f	716	((PRESCALER) == TIM_CLOCKPRESCALER_DIV4) \|\| \
mbed_official	235:685d5f11838f	717	((PRESCALER) == TIM_CLOCKPRESCALER_DIV8))
mbed_official	235:685d5f11838f	718	/**
mbed_official	235:685d5f11838f	719	* @}
mbed_official	235:685d5f11838f	720	*/
mbed_official	235:685d5f11838f	721
mbed_official	235:685d5f11838f	722	/** @defgroup TIM_Clock_Filter
mbed_official	235:685d5f11838f	723	* @{
mbed_official	235:685d5f11838f	724	*/
mbed_official	235:685d5f11838f	725	#define IS_TIM_CLOCKFILTER(ICFILTER) ((ICFILTER) <= 0xF)
mbed_official	235:685d5f11838f	726	/**
mbed_official	235:685d5f11838f	727	* @}
mbed_official	235:685d5f11838f	728	*/
mbed_official	235:685d5f11838f	729
mbed_official	235:685d5f11838f	730	/** @defgroup TIM_ClearInput_Source
mbed_official	235:685d5f11838f	731	* @{
mbed_official	235:685d5f11838f	732	*/
mbed_official	235:685d5f11838f	733	#define TIM_CLEARINPUTSOURCE_ETR ((uint32_t)0x0001)
mbed_official	235:685d5f11838f	734	#define TIM_CLEARINPUTSOURCE_NONE ((uint32_t)0x0000)
mbed_official	235:685d5f11838f	735
mbed_official	235:685d5f11838f	736	#define IS_TIM_CLEARINPUT_SOURCE(SOURCE) (((SOURCE) == TIM_CLEARINPUTSOURCE_NONE) \|\| \
mbed_official	235:685d5f11838f	737	((SOURCE) == TIM_CLEARINPUTSOURCE_ETR))
mbed_official	235:685d5f11838f	738	/**
mbed_official	235:685d5f11838f	739	* @}
mbed_official	235:685d5f11838f	740	*/
mbed_official	235:685d5f11838f	741
mbed_official	235:685d5f11838f	742	/** @defgroup TIM_ClearInput_Polarity
mbed_official	235:685d5f11838f	743	* @{
mbed_official	235:685d5f11838f	744	*/
mbed_official	235:685d5f11838f	745	#define TIM_CLEARINPUTPOLARITY_INVERTED TIM_ETRPOLARITY_INVERTED /!< Polarity for ETRx pin /
mbed_official	235:685d5f11838f	746	#define TIM_CLEARINPUTPOLARITY_NONINVERTED TIM_ETRPOLARITY_NONINVERTED /!< Polarity for ETRx pin /
mbed_official	235:685d5f11838f	747	#define IS_TIM_CLEARINPUT_POLARITY(POLARITY) (((POLARITY) == TIM_CLEARINPUTPOLARITY_INVERTED) \|\| \
mbed_official	235:685d5f11838f	748	((POLARITY) == TIM_CLEARINPUTPOLARITY_NONINVERTED))
mbed_official	235:685d5f11838f	749	/**
mbed_official	235:685d5f11838f	750	* @}
mbed_official	235:685d5f11838f	751	*/
mbed_official	235:685d5f11838f	752
mbed_official	235:685d5f11838f	753	/** @defgroup TIM_ClearInput_Prescaler
mbed_official	235:685d5f11838f	754	* @{
mbed_official	235:685d5f11838f	755	*/
mbed_official	235:685d5f11838f	756	#define TIM_CLEARINPUTPRESCALER_DIV1 TIM_ETRPRESCALER_DIV1 /!< No prescaler is used /
mbed_official	235:685d5f11838f	757	#define TIM_CLEARINPUTPRESCALER_DIV2 TIM_ETRPRESCALER_DIV2 /!< Prescaler for External ETR pin: Capture performed once every 2 events. /
mbed_official	235:685d5f11838f	758	#define TIM_CLEARINPUTPRESCALER_DIV4 TIM_ETRPRESCALER_DIV4 /!< Prescaler for External ETR pin: Capture performed once every 4 events. /
mbed_official	235:685d5f11838f	759	#define TIM_CLEARINPUTPRESCALER_DIV8 TIM_ETRPRESCALER_DIV8 /!< Prescaler for External ETR pin: Capture performed once every 8 events. /
mbed_official	235:685d5f11838f	760	#define IS_TIM_CLEARINPUT_PRESCALER(PRESCALER) (((PRESCALER) == TIM_CLEARINPUTPRESCALER_DIV1) \|\| \
mbed_official	235:685d5f11838f	761	((PRESCALER) == TIM_CLEARINPUTPRESCALER_DIV2) \|\| \
mbed_official	235:685d5f11838f	762	((PRESCALER) == TIM_CLEARINPUTPRESCALER_DIV4) \|\| \
mbed_official	235:685d5f11838f	763	((PRESCALER) == TIM_CLEARINPUTPRESCALER_DIV8))
mbed_official	235:685d5f11838f	764	/**
mbed_official	235:685d5f11838f	765	* @}
mbed_official	235:685d5f11838f	766	*/
mbed_official	235:685d5f11838f	767
mbed_official	235:685d5f11838f	768	/** @defgroup TIM_ClearInput_Filter
mbed_official	235:685d5f11838f	769	* @{
mbed_official	235:685d5f11838f	770	*/
mbed_official	235:685d5f11838f	771	#define IS_TIM_CLEARINPUT_FILTER(ICFILTER) ((ICFILTER) <= 0xF)
mbed_official	235:685d5f11838f	772	/**
mbed_official	235:685d5f11838f	773	* @}
mbed_official	235:685d5f11838f	774	*/
mbed_official	235:685d5f11838f	775
mbed_official	235:685d5f11838f	776	/** @defgroup TIM_OSSR_Off_State_Selection_for_Run_mode_state
mbed_official	235:685d5f11838f	777	* @{
mbed_official	235:685d5f11838f	778	*/
mbed_official	235:685d5f11838f	779	#define TIM_OSSR_ENABLE (TIM_BDTR_OSSR)
mbed_official	235:685d5f11838f	780	#define TIM_OSSR_DISABLE ((uint32_t)0x0000)
mbed_official	235:685d5f11838f	781
mbed_official	235:685d5f11838f	782	#define IS_TIM_OSSR_STATE(STATE) (((STATE) == TIM_OSSR_ENABLE) \|\| \
mbed_official	235:685d5f11838f	783	((STATE) == TIM_OSSR_DISABLE))
mbed_official	235:685d5f11838f	784	/**
mbed_official	235:685d5f11838f	785	* @}
mbed_official	235:685d5f11838f	786	*/
mbed_official	235:685d5f11838f	787
mbed_official	235:685d5f11838f	788	/** @defgroup TIM_OSSI_Off_State_Selection_for_Idle_mode_state
mbed_official	235:685d5f11838f	789	* @{
mbed_official	235:685d5f11838f	790	*/
mbed_official	235:685d5f11838f	791	#define TIM_OSSI_ENABLE (TIM_BDTR_OSSI)
mbed_official	235:685d5f11838f	792	#define TIM_OSSI_DISABLE ((uint32_t)0x0000)
mbed_official	235:685d5f11838f	793
mbed_official	235:685d5f11838f	794	#define IS_TIM_OSSI_STATE(STATE) (((STATE) == TIM_OSSI_ENABLE) \|\| \
mbed_official	235:685d5f11838f	795	((STATE) == TIM_OSSI_DISABLE))
mbed_official	235:685d5f11838f	796	/**
mbed_official	235:685d5f11838f	797	* @}
mbed_official	235:685d5f11838f	798	*/
mbed_official	235:685d5f11838f	799	/** @defgroup TIM_Lock_level
mbed_official	235:685d5f11838f	800	* @{
mbed_official	235:685d5f11838f	801	*/
mbed_official	235:685d5f11838f	802	#define TIM_LOCKLEVEL_OFF ((uint32_t)0x0000)
mbed_official	235:685d5f11838f	803	#define TIM_LOCKLEVEL_1 (TIM_BDTR_LOCK_0)
mbed_official	235:685d5f11838f	804	#define TIM_LOCKLEVEL_2 (TIM_BDTR_LOCK_1)
mbed_official	235:685d5f11838f	805	#define TIM_LOCKLEVEL_3 (TIM_BDTR_LOCK)
mbed_official	235:685d5f11838f	806
mbed_official	235:685d5f11838f	807	#define IS_TIM_LOCK_LEVEL(LEVEL) (((LEVEL) == TIM_LOCKLEVEL_OFF) \|\| \
mbed_official	235:685d5f11838f	808	((LEVEL) == TIM_LOCKLEVEL_1) \|\| \
mbed_official	235:685d5f11838f	809	((LEVEL) == TIM_LOCKLEVEL_2) \|\| \
mbed_official	235:685d5f11838f	810	((LEVEL) == TIM_LOCKLEVEL_3))
mbed_official	235:685d5f11838f	811	/**
mbed_official	235:685d5f11838f	812	* @}
mbed_official	235:685d5f11838f	813	*/
mbed_official	235:685d5f11838f	814	/** @defgroup TIM_Break_Input_enable_disable
mbed_official	235:685d5f11838f	815	* @{
mbed_official	235:685d5f11838f	816	*/
mbed_official	235:685d5f11838f	817	#define TIM_BREAK_ENABLE (TIM_BDTR_BKE)
mbed_official	235:685d5f11838f	818	#define TIM_BREAK_DISABLE ((uint32_t)0x0000)
mbed_official	235:685d5f11838f	819
mbed_official	235:685d5f11838f	820	#define IS_TIM_BREAK_STATE(STATE) (((STATE) == TIM_BREAK_ENABLE) \|\| \
mbed_official	235:685d5f11838f	821	((STATE) == TIM_BREAK_DISABLE))
mbed_official	235:685d5f11838f	822	/**
mbed_official	235:685d5f11838f	823	* @}
mbed_official	235:685d5f11838f	824	*/
mbed_official	235:685d5f11838f	825	/** @defgroup TIM_Break_Polarity
mbed_official	235:685d5f11838f	826	* @{
mbed_official	235:685d5f11838f	827	*/
mbed_official	235:685d5f11838f	828	#define TIM_BREAKPOLARITY_LOW ((uint32_t)0x0000)
mbed_official	235:685d5f11838f	829	#define TIM_BREAKPOLARITY_HIGH (TIM_BDTR_BKP)
mbed_official	235:685d5f11838f	830
mbed_official	235:685d5f11838f	831	#define IS_TIM_BREAK_POLARITY(POLARITY) (((POLARITY) == TIM_BREAKPOLARITY_LOW) \|\| \
mbed_official	235:685d5f11838f	832	((POLARITY) == TIM_BREAKPOLARITY_HIGH))
mbed_official	235:685d5f11838f	833	/**
mbed_official	235:685d5f11838f	834	* @}
mbed_official	235:685d5f11838f	835	*/
mbed_official	235:685d5f11838f	836	/** @defgroup TIM_AOE_Bit_Set_Reset
mbed_official	235:685d5f11838f	837	* @{
mbed_official	235:685d5f11838f	838	*/
mbed_official	235:685d5f11838f	839	#define TIM_AUTOMATICOUTPUT_ENABLE (TIM_BDTR_AOE)
mbed_official	235:685d5f11838f	840	#define TIM_AUTOMATICOUTPUT_DISABLE ((uint32_t)0x0000)
mbed_official	235:685d5f11838f	841
mbed_official	235:685d5f11838f	842	#define IS_TIM_AUTOMATIC_OUTPUT_STATE(STATE) (((STATE) == TIM_AUTOMATICOUTPUT_ENABLE) \|\| \
mbed_official	235:685d5f11838f	843	((STATE) == TIM_AUTOMATICOUTPUT_DISABLE))
mbed_official	235:685d5f11838f	844	/**
mbed_official	235:685d5f11838f	845	* @}
mbed_official	235:685d5f11838f	846	*/
mbed_official	235:685d5f11838f	847
mbed_official	235:685d5f11838f	848	/** @defgroup TIM_Master_Mode_Selection
mbed_official	235:685d5f11838f	849	* @{
mbed_official	235:685d5f11838f	850	*/
mbed_official	235:685d5f11838f	851	#define TIM_TRGO_RESET ((uint32_t)0x0000)
mbed_official	235:685d5f11838f	852	#define TIM_TRGO_ENABLE (TIM_CR2_MMS_0)
mbed_official	235:685d5f11838f	853	#define TIM_TRGO_UPDATE (TIM_CR2_MMS_1)
mbed_official	235:685d5f11838f	854	#define TIM_TRGO_OC1 ((TIM_CR2_MMS_1 \| TIM_CR2_MMS_0))
mbed_official	235:685d5f11838f	855	#define TIM_TRGO_OC1REF (TIM_CR2_MMS_2)
mbed_official	235:685d5f11838f	856	#define TIM_TRGO_OC2REF ((TIM_CR2_MMS_2 \| TIM_CR2_MMS_0))
mbed_official	235:685d5f11838f	857	#define TIM_TRGO_OC3REF ((TIM_CR2_MMS_2 \| TIM_CR2_MMS_1))
mbed_official	235:685d5f11838f	858	#define TIM_TRGO_OC4REF ((TIM_CR2_MMS_2 \| TIM_CR2_MMS_1 \| TIM_CR2_MMS_0))
mbed_official	235:685d5f11838f	859
mbed_official	235:685d5f11838f	860	#define IS_TIM_TRGO_SOURCE(SOURCE) (((SOURCE) == TIM_TRGO_RESET) \|\| \
mbed_official	235:685d5f11838f	861	((SOURCE) == TIM_TRGO_ENABLE) \|\| \
mbed_official	235:685d5f11838f	862	((SOURCE) == TIM_TRGO_UPDATE) \|\| \
mbed_official	235:685d5f11838f	863	((SOURCE) == TIM_TRGO_OC1) \|\| \
mbed_official	235:685d5f11838f	864	((SOURCE) == TIM_TRGO_OC1REF) \|\| \
mbed_official	235:685d5f11838f	865	((SOURCE) == TIM_TRGO_OC2REF) \|\| \
mbed_official	235:685d5f11838f	866	((SOURCE) == TIM_TRGO_OC3REF) \|\| \
mbed_official	235:685d5f11838f	867	((SOURCE) == TIM_TRGO_OC4REF))
mbed_official	235:685d5f11838f	868
mbed_official	235:685d5f11838f	869
mbed_official	235:685d5f11838f	870	/**
mbed_official	235:685d5f11838f	871	* @}
mbed_official	235:685d5f11838f	872	*/
mbed_official	235:685d5f11838f	873	/** @defgroup TIM_Slave_Mode
mbed_official	235:685d5f11838f	874	* @{
mbed_official	235:685d5f11838f	875	*/
mbed_official	235:685d5f11838f	876	#define TIM_SLAVEMODE_DISABLE ((uint32_t)0x0000)
mbed_official	235:685d5f11838f	877	#define TIM_SLAVEMODE_RESET ((uint32_t)0x0004)
mbed_official	235:685d5f11838f	878	#define TIM_SLAVEMODE_GATED ((uint32_t)0x0005)
mbed_official	235:685d5f11838f	879	#define TIM_SLAVEMODE_TRIGGER ((uint32_t)0x0006)
mbed_official	235:685d5f11838f	880	#define TIM_SLAVEMODE_EXTERNAL1 ((uint32_t)0x0007)
mbed_official	235:685d5f11838f	881
mbed_official	235:685d5f11838f	882	#define IS_TIM_SLAVE_MODE(MODE) (((MODE) == TIM_SLAVEMODE_DISABLE) \|\| \
mbed_official	235:685d5f11838f	883	((MODE) == TIM_SLAVEMODE_GATED) \|\| \
mbed_official	235:685d5f11838f	884	((MODE) == TIM_SLAVEMODE_RESET) \|\| \
mbed_official	235:685d5f11838f	885	((MODE) == TIM_SLAVEMODE_TRIGGER) \|\| \
mbed_official	235:685d5f11838f	886	((MODE) == TIM_SLAVEMODE_EXTERNAL1))
mbed_official	235:685d5f11838f	887	/**
mbed_official	235:685d5f11838f	888	* @}
mbed_official	235:685d5f11838f	889	*/
mbed_official	235:685d5f11838f	890
mbed_official	235:685d5f11838f	891	/** @defgroup TIM_Master_Slave_Mode
mbed_official	235:685d5f11838f	892	* @{
mbed_official	235:685d5f11838f	893	*/
mbed_official	235:685d5f11838f	894
mbed_official	235:685d5f11838f	895	#define TIM_MASTERSLAVEMODE_ENABLE ((uint32_t)0x0080)
mbed_official	235:685d5f11838f	896	#define TIM_MASTERSLAVEMODE_DISABLE ((uint32_t)0x0000)
mbed_official	235:685d5f11838f	897	#define IS_TIM_MSM_STATE(STATE) (((STATE) == TIM_MASTERSLAVEMODE_ENABLE) \|\| \
mbed_official	235:685d5f11838f	898	((STATE) == TIM_MASTERSLAVEMODE_DISABLE))
mbed_official	235:685d5f11838f	899	/**
mbed_official	235:685d5f11838f	900	* @}
mbed_official	235:685d5f11838f	901	*/
mbed_official	235:685d5f11838f	902	/** @defgroup TIM_Trigger_Selection
mbed_official	235:685d5f11838f	903	* @{
mbed_official	235:685d5f11838f	904	*/
mbed_official	235:685d5f11838f	905	#define TIM_TS_ITR0 ((uint32_t)0x0000)
mbed_official	235:685d5f11838f	906	#define TIM_TS_ITR1 ((uint32_t)0x0010)
mbed_official	235:685d5f11838f	907	#define TIM_TS_ITR2 ((uint32_t)0x0020)
mbed_official	235:685d5f11838f	908	#define TIM_TS_ITR3 ((uint32_t)0x0030)
mbed_official	235:685d5f11838f	909	#define TIM_TS_TI1F_ED ((uint32_t)0x0040)
mbed_official	235:685d5f11838f	910	#define TIM_TS_TI1FP1 ((uint32_t)0x0050)
mbed_official	235:685d5f11838f	911	#define TIM_TS_TI2FP2 ((uint32_t)0x0060)
mbed_official	235:685d5f11838f	912	#define TIM_TS_ETRF ((uint32_t)0x0070)
mbed_official	235:685d5f11838f	913	#define TIM_TS_NONE ((uint32_t)0xFFFF)
mbed_official	235:685d5f11838f	914	#define IS_TIM_TRIGGER_SELECTION(SELECTION) (((SELECTION) == TIM_TS_ITR0) \|\| \
mbed_official	235:685d5f11838f	915	((SELECTION) == TIM_TS_ITR1) \|\| \
mbed_official	235:685d5f11838f	916	((SELECTION) == TIM_TS_ITR2) \|\| \
mbed_official	235:685d5f11838f	917	((SELECTION) == TIM_TS_ITR3) \|\| \
mbed_official	235:685d5f11838f	918	((SELECTION) == TIM_TS_TI1F_ED) \|\| \
mbed_official	235:685d5f11838f	919	((SELECTION) == TIM_TS_TI1FP1) \|\| \
mbed_official	235:685d5f11838f	920	((SELECTION) == TIM_TS_TI2FP2) \|\| \
mbed_official	235:685d5f11838f	921	((SELECTION) == TIM_TS_ETRF))
mbed_official	235:685d5f11838f	922	#define IS_TIM_INTERNAL_TRIGGER_SELECTION(SELECTION) (((SELECTION) == TIM_TS_ITR0) \|\| \
mbed_official	235:685d5f11838f	923	((SELECTION) == TIM_TS_ITR1) \|\| \
mbed_official	235:685d5f11838f	924	((SELECTION) == TIM_TS_ITR2) \|\| \
mbed_official	235:685d5f11838f	925	((SELECTION) == TIM_TS_ITR3))
mbed_official	235:685d5f11838f	926	#define IS_TIM_INTERNAL_TRIGGEREVENT_SELECTION(SELECTION) (((SELECTION) == TIM_TS_ITR0) \|\| \
mbed_official	235:685d5f11838f	927	((SELECTION) == TIM_TS_ITR1) \|\| \
mbed_official	235:685d5f11838f	928	((SELECTION) == TIM_TS_ITR2) \|\| \
mbed_official	235:685d5f11838f	929	((SELECTION) == TIM_TS_ITR3) \|\| \
mbed_official	235:685d5f11838f	930	((SELECTION) == TIM_TS_NONE))
mbed_official	235:685d5f11838f	931	/**
mbed_official	235:685d5f11838f	932	* @}
mbed_official	235:685d5f11838f	933	*/
mbed_official	235:685d5f11838f	934
mbed_official	235:685d5f11838f	935	/** @defgroup TIM_Trigger_Polarity
mbed_official	235:685d5f11838f	936	* @{
mbed_official	235:685d5f11838f	937	*/
mbed_official	235:685d5f11838f	938	#define TIM_TRIGGERPOLARITY_INVERTED TIM_ETRPOLARITY_INVERTED /!< Polarity for ETRx trigger sources /
mbed_official	235:685d5f11838f	939	#define TIM_TRIGGERPOLARITY_NONINVERTED TIM_ETRPOLARITY_NONINVERTED /!< Polarity for ETRx trigger sources /
mbed_official	235:685d5f11838f	940	#define TIM_TRIGGERPOLARITY_RISING TIM_INPUTCHANNELPOLARITY_RISING /!< Polarity for TIxFPx or TI1_ED trigger sources /
mbed_official	235:685d5f11838f	941	#define TIM_TRIGGERPOLARITY_FALLING TIM_INPUTCHANNELPOLARITY_FALLING /!< Polarity for TIxFPx or TI1_ED trigger sources /
mbed_official	235:685d5f11838f	942	#define TIM_TRIGGERPOLARITY_BOTHEDGE TIM_INPUTCHANNELPOLARITY_BOTHEDGE /!< Polarity for TIxFPx or TI1_ED trigger sources /
mbed_official	235:685d5f11838f	943
mbed_official	235:685d5f11838f	944	#define IS_TIM_TRIGGERPOLARITY(POLARITY) (((POLARITY) == TIM_TRIGGERPOLARITY_INVERTED ) \|\| \
mbed_official	235:685d5f11838f	945	((POLARITY) == TIM_TRIGGERPOLARITY_NONINVERTED) \|\| \
mbed_official	235:685d5f11838f	946	((POLARITY) == TIM_TRIGGERPOLARITY_RISING ) \|\| \
mbed_official	235:685d5f11838f	947	((POLARITY) == TIM_TRIGGERPOLARITY_FALLING ) \|\| \
mbed_official	235:685d5f11838f	948	((POLARITY) == TIM_TRIGGERPOLARITY_BOTHEDGE ))
mbed_official	235:685d5f11838f	949	/**
mbed_official	235:685d5f11838f	950	* @}
mbed_official	235:685d5f11838f	951	*/
mbed_official	235:685d5f11838f	952
mbed_official	235:685d5f11838f	953	/** @defgroup TIM_Trigger_Prescaler
mbed_official	235:685d5f11838f	954	* @{
mbed_official	235:685d5f11838f	955	*/
mbed_official	235:685d5f11838f	956	#define TIM_TRIGGERPRESCALER_DIV1 TIM_ETRPRESCALER_DIV1 /!< No prescaler is used /
mbed_official	235:685d5f11838f	957	#define TIM_TRIGGERPRESCALER_DIV2 TIM_ETRPRESCALER_DIV2 /!< Prescaler for External ETR Trigger: Capture performed once every 2 events. /
mbed_official	235:685d5f11838f	958	#define TIM_TRIGGERPRESCALER_DIV4 TIM_ETRPRESCALER_DIV4 /!< Prescaler for External ETR Trigger: Capture performed once every 4 events. /
mbed_official	235:685d5f11838f	959	#define TIM_TRIGGERPRESCALER_DIV8 TIM_ETRPRESCALER_DIV8 /!< Prescaler for External ETR Trigger: Capture performed once every 8 events. /
mbed_official	235:685d5f11838f	960
mbed_official	235:685d5f11838f	961	#define IS_TIM_TRIGGERPRESCALER(PRESCALER) (((PRESCALER) == TIM_TRIGGERPRESCALER_DIV1) \|\| \
mbed_official	235:685d5f11838f	962	((PRESCALER) == TIM_TRIGGERPRESCALER_DIV2) \|\| \
mbed_official	235:685d5f11838f	963	((PRESCALER) == TIM_TRIGGERPRESCALER_DIV4) \|\| \
mbed_official	235:685d5f11838f	964	((PRESCALER) == TIM_TRIGGERPRESCALER_DIV8))
mbed_official	235:685d5f11838f	965	/**
mbed_official	235:685d5f11838f	966	* @}
mbed_official	235:685d5f11838f	967	*/
mbed_official	235:685d5f11838f	968
mbed_official	235:685d5f11838f	969	/** @defgroup TIM_Trigger_Filter
mbed_official	235:685d5f11838f	970	* @{
mbed_official	235:685d5f11838f	971	*/
mbed_official	235:685d5f11838f	972	#define IS_TIM_TRIGGERFILTER(ICFILTER) ((ICFILTER) <= 0xF)
mbed_official	235:685d5f11838f	973	/**
mbed_official	235:685d5f11838f	974	* @}
mbed_official	235:685d5f11838f	975	*/
mbed_official	235:685d5f11838f	976
mbed_official	235:685d5f11838f	977	/** @defgroup TIM_TI1_Selection
mbed_official	235:685d5f11838f	978	* @{
mbed_official	235:685d5f11838f	979	*/
mbed_official	235:685d5f11838f	980	#define TIM_TI1SELECTION_CH1 ((uint32_t)0x0000)
mbed_official	235:685d5f11838f	981	#define TIM_TI1SELECTION_XORCOMBINATION (TIM_CR2_TI1S)
mbed_official	235:685d5f11838f	982
mbed_official	235:685d5f11838f	983	#define IS_TIM_TI1SELECTION(TI1SELECTION) (((TI1SELECTION) == TIM_TI1SELECTION_CH1) \|\| \
mbed_official	235:685d5f11838f	984	((TI1SELECTION) == TIM_TI1SELECTION_XORCOMBINATION))
mbed_official	235:685d5f11838f	985	/**
mbed_official	235:685d5f11838f	986	* @}
mbed_official	235:685d5f11838f	987	*/
mbed_official	235:685d5f11838f	988
mbed_official	235:685d5f11838f	989	/** @defgroup TIM_DMA_Base_address
mbed_official	235:685d5f11838f	990	* @{
mbed_official	235:685d5f11838f	991	*/
mbed_official	235:685d5f11838f	992	#define TIM_DMABase_CR1 (0x00000000)
mbed_official	235:685d5f11838f	993	#define TIM_DMABase_CR2 (0x00000001)
mbed_official	235:685d5f11838f	994	#define TIM_DMABase_SMCR (0x00000002)
mbed_official	235:685d5f11838f	995	#define TIM_DMABase_DIER (0x00000003)
mbed_official	235:685d5f11838f	996	#define TIM_DMABase_SR (0x00000004)
mbed_official	235:685d5f11838f	997	#define TIM_DMABase_EGR (0x00000005)
mbed_official	235:685d5f11838f	998	#define TIM_DMABase_CCMR1 (0x00000006)
mbed_official	235:685d5f11838f	999	#define TIM_DMABase_CCMR2 (0x00000007)
mbed_official	235:685d5f11838f	1000	#define TIM_DMABase_CCER (0x00000008)
mbed_official	235:685d5f11838f	1001	#define TIM_DMABase_CNT (0x00000009)
mbed_official	235:685d5f11838f	1002	#define TIM_DMABase_PSC (0x0000000A)
mbed_official	235:685d5f11838f	1003	#define TIM_DMABase_ARR (0x0000000B)
mbed_official	235:685d5f11838f	1004	#define TIM_DMABase_RCR (0x0000000C)
mbed_official	235:685d5f11838f	1005	#define TIM_DMABase_CCR1 (0x0000000D)
mbed_official	235:685d5f11838f	1006	#define TIM_DMABase_CCR2 (0x0000000E)
mbed_official	235:685d5f11838f	1007	#define TIM_DMABase_CCR3 (0x0000000F)
mbed_official	235:685d5f11838f	1008	#define TIM_DMABase_CCR4 (0x00000010)
mbed_official	235:685d5f11838f	1009	#define TIM_DMABase_BDTR (0x00000011)
mbed_official	235:685d5f11838f	1010	#define TIM_DMABase_DCR (0x00000012)
mbed_official	235:685d5f11838f	1011	#define TIM_DMABase_OR (0x00000013)
mbed_official	235:685d5f11838f	1012	#define IS_TIM_DMA_BASE(BASE) (((BASE) == TIM_DMABase_CR1) \|\| \
mbed_official	235:685d5f11838f	1013	((BASE) == TIM_DMABase_CR2) \|\| \
mbed_official	235:685d5f11838f	1014	((BASE) == TIM_DMABase_SMCR) \|\| \
mbed_official	235:685d5f11838f	1015	((BASE) == TIM_DMABase_DIER) \|\| \
mbed_official	235:685d5f11838f	1016	((BASE) == TIM_DMABase_SR) \|\| \
mbed_official	235:685d5f11838f	1017	((BASE) == TIM_DMABase_EGR) \|\| \
mbed_official	235:685d5f11838f	1018	((BASE) == TIM_DMABase_CCMR1) \|\| \
mbed_official	235:685d5f11838f	1019	((BASE) == TIM_DMABase_CCMR2) \|\| \
mbed_official	235:685d5f11838f	1020	((BASE) == TIM_DMABase_CCER) \|\| \
mbed_official	235:685d5f11838f	1021	((BASE) == TIM_DMABase_CNT) \|\| \
mbed_official	235:685d5f11838f	1022	((BASE) == TIM_DMABase_PSC) \|\| \
mbed_official	235:685d5f11838f	1023	((BASE) == TIM_DMABase_ARR) \|\| \
mbed_official	235:685d5f11838f	1024	((BASE) == TIM_DMABase_RCR) \|\| \
mbed_official	235:685d5f11838f	1025	((BASE) == TIM_DMABase_CCR1) \|\| \
mbed_official	235:685d5f11838f	1026	((BASE) == TIM_DMABase_CCR2) \|\| \
mbed_official	235:685d5f11838f	1027	((BASE) == TIM_DMABase_CCR3) \|\| \
mbed_official	235:685d5f11838f	1028	((BASE) == TIM_DMABase_CCR4) \|\| \
mbed_official	235:685d5f11838f	1029	((BASE) == TIM_DMABase_BDTR) \|\| \
mbed_official	235:685d5f11838f	1030	((BASE) == TIM_DMABase_DCR) \|\| \
mbed_official	235:685d5f11838f	1031	((BASE) == TIM_DMABase_OR))
mbed_official	235:685d5f11838f	1032	/**
mbed_official	235:685d5f11838f	1033	* @}
mbed_official	235:685d5f11838f	1034	*/
mbed_official	235:685d5f11838f	1035
mbed_official	235:685d5f11838f	1036	/** @defgroup TIM_DMA_Burst_Length
mbed_official	235:685d5f11838f	1037	* @{
mbed_official	235:685d5f11838f	1038	*/
mbed_official	235:685d5f11838f	1039	#define TIM_DMABurstLength_1Transfer (0x00000000)
mbed_official	235:685d5f11838f	1040	#define TIM_DMABurstLength_2Transfers (0x00000100)
mbed_official	235:685d5f11838f	1041	#define TIM_DMABurstLength_3Transfers (0x00000200)
mbed_official	235:685d5f11838f	1042	#define TIM_DMABurstLength_4Transfers (0x00000300)
mbed_official	235:685d5f11838f	1043	#define TIM_DMABurstLength_5Transfers (0x00000400)
mbed_official	235:685d5f11838f	1044	#define TIM_DMABurstLength_6Transfers (0x00000500)
mbed_official	235:685d5f11838f	1045	#define TIM_DMABurstLength_7Transfers (0x00000600)
mbed_official	235:685d5f11838f	1046	#define TIM_DMABurstLength_8Transfers (0x00000700)
mbed_official	235:685d5f11838f	1047	#define TIM_DMABurstLength_9Transfers (0x00000800)
mbed_official	235:685d5f11838f	1048	#define TIM_DMABurstLength_10Transfers (0x00000900)
mbed_official	235:685d5f11838f	1049	#define TIM_DMABurstLength_11Transfers (0x00000A00)
mbed_official	235:685d5f11838f	1050	#define TIM_DMABurstLength_12Transfers (0x00000B00)
mbed_official	235:685d5f11838f	1051	#define TIM_DMABurstLength_13Transfers (0x00000C00)
mbed_official	235:685d5f11838f	1052	#define TIM_DMABurstLength_14Transfers (0x00000D00)
mbed_official	235:685d5f11838f	1053	#define TIM_DMABurstLength_15Transfers (0x00000E00)
mbed_official	235:685d5f11838f	1054	#define TIM_DMABurstLength_16Transfers (0x00000F00)
mbed_official	235:685d5f11838f	1055	#define TIM_DMABurstLength_17Transfers (0x00001000)
mbed_official	235:685d5f11838f	1056	#define TIM_DMABurstLength_18Transfers (0x00001100)
mbed_official	235:685d5f11838f	1057	#define IS_TIM_DMA_LENGTH(LENGTH) (((LENGTH) == TIM_DMABurstLength_1Transfer) \|\| \
mbed_official	235:685d5f11838f	1058	((LENGTH) == TIM_DMABurstLength_2Transfers) \|\| \
mbed_official	235:685d5f11838f	1059	((LENGTH) == TIM_DMABurstLength_3Transfers) \|\| \
mbed_official	235:685d5f11838f	1060	((LENGTH) == TIM_DMABurstLength_4Transfers) \|\| \
mbed_official	235:685d5f11838f	1061	((LENGTH) == TIM_DMABurstLength_5Transfers) \|\| \
mbed_official	235:685d5f11838f	1062	((LENGTH) == TIM_DMABurstLength_6Transfers) \|\| \
mbed_official	235:685d5f11838f	1063	((LENGTH) == TIM_DMABurstLength_7Transfers) \|\| \
mbed_official	235:685d5f11838f	1064	((LENGTH) == TIM_DMABurstLength_8Transfers) \|\| \
mbed_official	235:685d5f11838f	1065	((LENGTH) == TIM_DMABurstLength_9Transfers) \|\| \
mbed_official	235:685d5f11838f	1066	((LENGTH) == TIM_DMABurstLength_10Transfers) \|\| \
mbed_official	235:685d5f11838f	1067	((LENGTH) == TIM_DMABurstLength_11Transfers) \|\| \
mbed_official	235:685d5f11838f	1068	((LENGTH) == TIM_DMABurstLength_12Transfers) \|\| \
mbed_official	235:685d5f11838f	1069	((LENGTH) == TIM_DMABurstLength_13Transfers) \|\| \
mbed_official	235:685d5f11838f	1070	((LENGTH) == TIM_DMABurstLength_14Transfers) \|\| \
mbed_official	235:685d5f11838f	1071	((LENGTH) == TIM_DMABurstLength_15Transfers) \|\| \
mbed_official	235:685d5f11838f	1072	((LENGTH) == TIM_DMABurstLength_16Transfers) \|\| \
mbed_official	235:685d5f11838f	1073	((LENGTH) == TIM_DMABurstLength_17Transfers) \|\| \
mbed_official	235:685d5f11838f	1074	((LENGTH) == TIM_DMABurstLength_18Transfers))
mbed_official	235:685d5f11838f	1075	/**
mbed_official	235:685d5f11838f	1076	* @}
mbed_official	235:685d5f11838f	1077	*/
mbed_official	235:685d5f11838f	1078
mbed_official	235:685d5f11838f	1079	/** @defgroup TIM_Input_Capture_Filer_Value
mbed_official	235:685d5f11838f	1080	* @{
mbed_official	235:685d5f11838f	1081	*/
mbed_official	235:685d5f11838f	1082	#define IS_TIM_IC_FILTER(ICFILTER) ((ICFILTER) <= 0xF)
mbed_official	235:685d5f11838f	1083	/**
mbed_official	235:685d5f11838f	1084	* @}
mbed_official	235:685d5f11838f	1085	*/
mbed_official	235:685d5f11838f	1086
mbed_official	235:685d5f11838f	1087	/** @defgroup DMA_Handle_index
mbed_official	235:685d5f11838f	1088	* @{
mbed_official	235:685d5f11838f	1089	*/
mbed_official	235:685d5f11838f	1090	#define TIM_DMA_ID_UPDATE ((uint16_t) 0x0) /!< Index of the DMA handle used for Update DMA requests /
mbed_official	235:685d5f11838f	1091	#define TIM_DMA_ID_CC1 ((uint16_t) 0x1) /!< Index of the DMA handle used for Capture/Compare 1 DMA requests /
mbed_official	235:685d5f11838f	1092	#define TIM_DMA_ID_CC2 ((uint16_t) 0x2) /!< Index of the DMA handle used for Capture/Compare 2 DMA requests /
mbed_official	235:685d5f11838f	1093	#define TIM_DMA_ID_CC3 ((uint16_t) 0x3) /!< Index of the DMA handle used for Capture/Compare 3 DMA requests /
mbed_official	235:685d5f11838f	1094	#define TIM_DMA_ID_CC4 ((uint16_t) 0x4) /!< Index of the DMA handle used for Capture/Compare 4 DMA requests /
mbed_official	235:685d5f11838f	1095	#define TIM_DMA_ID_COMMUTATION ((uint16_t) 0x5) /!< Index of the DMA handle used for Commutation DMA requests /
mbed_official	235:685d5f11838f	1096	#define TIM_DMA_ID_TRIGGER ((uint16_t) 0x6) /!< Index of the DMA handle used for Trigger DMA requests /
mbed_official	235:685d5f11838f	1097	/**
mbed_official	235:685d5f11838f	1098	* @}
mbed_official	235:685d5f11838f	1099	*/
mbed_official	235:685d5f11838f	1100
mbed_official	235:685d5f11838f	1101	/** @defgroup Channel_CC_State
mbed_official	235:685d5f11838f	1102	* @{
mbed_official	235:685d5f11838f	1103	*/
mbed_official	235:685d5f11838f	1104	#define TIM_CCx_ENABLE ((uint32_t)0x0001)
mbed_official	235:685d5f11838f	1105	#define TIM_CCx_DISABLE ((uint32_t)0x0000)
mbed_official	235:685d5f11838f	1106	#define TIM_CCxN_ENABLE ((uint32_t)0x0004)
mbed_official	235:685d5f11838f	1107	#define TIM_CCxN_DISABLE ((uint32_t)0x0000)
mbed_official	235:685d5f11838f	1108	/**
mbed_official	235:685d5f11838f	1109	* @}
mbed_official	235:685d5f11838f	1110	*/
mbed_official	235:685d5f11838f	1111
mbed_official	235:685d5f11838f	1112	/**
mbed_official	235:685d5f11838f	1113	* @}
mbed_official	235:685d5f11838f	1114	*/
mbed_official	235:685d5f11838f	1115
mbed_official	235:685d5f11838f	1116	/* Exported macro ------------------------------------------------------------*/
mbed_official	235:685d5f11838f	1117
mbed_official	235:685d5f11838f	1118	/** @brief Reset TIM handle state
mbed_official	235:685d5f11838f	1119	* @param __HANDLE__: TIM handle
mbed_official	235:685d5f11838f	1120	* @retval None
mbed_official	235:685d5f11838f	1121	*/
mbed_official	235:685d5f11838f	1122	#define __HAL_TIM_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_TIM_STATE_RESET)
mbed_official	235:685d5f11838f	1123
mbed_official	235:685d5f11838f	1124	/**
mbed_official	235:685d5f11838f	1125	* @brief Enable the TIM peripheral.
mbed_official	235:685d5f11838f	1126	* @param __HANDLE__: TIM handle
mbed_official	235:685d5f11838f	1127	* @retval None
mbed_official	235:685d5f11838f	1128	*/
mbed_official	235:685d5f11838f	1129	#define __HAL_TIM_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR1\|=(TIM_CR1_CEN))
mbed_official	235:685d5f11838f	1130
mbed_official	235:685d5f11838f	1131	/**
mbed_official	235:685d5f11838f	1132	* @brief Enable the TIM main Output.
mbed_official	235:685d5f11838f	1133	* @param __HANDLE__: TIM handle
mbed_official	235:685d5f11838f	1134	* @retval None
mbed_official	235:685d5f11838f	1135	*/
mbed_official	235:685d5f11838f	1136	#define __HAL_TIM_MOE_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->BDTR\|=(TIM_BDTR_MOE))
mbed_official	235:685d5f11838f	1137
mbed_official	235:685d5f11838f	1138
mbed_official	235:685d5f11838f	1139	/* The counter of a timer instance is disabled only if all the CCx and CCxN
mbed_official	235:685d5f11838f	1140	channels have been disabled */
mbed_official	235:685d5f11838f	1141	#define CCER_CCxE_MASK ((uint32_t)(TIM_CCER_CC1E \| TIM_CCER_CC2E \| TIM_CCER_CC3E \| TIM_CCER_CC4E))
mbed_official	235:685d5f11838f	1142	#define CCER_CCxNE_MASK ((uint32_t)(TIM_CCER_CC1NE \| TIM_CCER_CC2NE \| TIM_CCER_CC3NE))
mbed_official	235:685d5f11838f	1143
mbed_official	235:685d5f11838f	1144	/**
mbed_official	235:685d5f11838f	1145	* @brief Disable the TIM peripheral.
mbed_official	235:685d5f11838f	1146	* @param __HANDLE__: TIM handle
mbed_official	235:685d5f11838f	1147	* @retval None
mbed_official	235:685d5f11838f	1148	*/
mbed_official	235:685d5f11838f	1149	#define __HAL_TIM_DISABLE(__HANDLE__) \
mbed_official	235:685d5f11838f	1150	do { \
mbed_official	235:685d5f11838f	1151	if (((__HANDLE__)->Instance->CCER & CCER_CCxE_MASK) == 0) \
mbed_official	235:685d5f11838f	1152	{ \
mbed_official	235:685d5f11838f	1153	if(((__HANDLE__)->Instance->CCER & CCER_CCxNE_MASK) == 0) \
mbed_official	235:685d5f11838f	1154	{ \
mbed_official	235:685d5f11838f	1155	(__HANDLE__)->Instance->CR1 &= ~(TIM_CR1_CEN); \
mbed_official	235:685d5f11838f	1156	} \
mbed_official	235:685d5f11838f	1157	} \
mbed_official	235:685d5f11838f	1158	} while(0)
mbed_official	235:685d5f11838f	1159
mbed_official	235:685d5f11838f	1160	/* The Main Output of a timer instance is disabled only if all the CCx and CCxN
mbed_official	235:685d5f11838f	1161	channels have been disabled */
mbed_official	235:685d5f11838f	1162	/**
mbed_official	235:685d5f11838f	1163	* @brief Disable the TIM main Output.
mbed_official	235:685d5f11838f	1164	* @param __HANDLE__: TIM handle
mbed_official	235:685d5f11838f	1165	* @retval None
mbed_official	235:685d5f11838f	1166	*/
mbed_official	235:685d5f11838f	1167	#define __HAL_TIM_MOE_DISABLE(__HANDLE__) \
mbed_official	235:685d5f11838f	1168	do { \
mbed_official	235:685d5f11838f	1169	if (((__HANDLE__)->Instance->CCER & CCER_CCxE_MASK) == 0) \
mbed_official	235:685d5f11838f	1170	{ \
mbed_official	235:685d5f11838f	1171	if(((__HANDLE__)->Instance->CCER & CCER_CCxNE_MASK) == 0) \
mbed_official	235:685d5f11838f	1172	{ \
mbed_official	235:685d5f11838f	1173	(__HANDLE__)->Instance->BDTR &= ~(TIM_BDTR_MOE); \
mbed_official	235:685d5f11838f	1174	} \
mbed_official	235:685d5f11838f	1175	} \
mbed_official	235:685d5f11838f	1176	} while(0)
mbed_official	235:685d5f11838f	1177
mbed_official	235:685d5f11838f	1178	#define __HAL_TIM_ENABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->DIER \|= (__INTERRUPT__))
mbed_official	235:685d5f11838f	1179	#define __HAL_TIM_ENABLE_DMA(__HANDLE__, __DMA__) ((__HANDLE__)->Instance->DIER \|= (__DMA__))
mbed_official	235:685d5f11838f	1180	#define __HAL_TIM_DISABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->DIER &= ~(__INTERRUPT__))
mbed_official	235:685d5f11838f	1181	#define __HAL_TIM_DISABLE_DMA(__HANDLE__, __DMA__) ((__HANDLE__)->Instance->DIER &= ~(__DMA__))
mbed_official	235:685d5f11838f	1182	#define __HAL_TIM_GET_FLAG(__HANDLE__, __FLAG__) (((__HANDLE__)->Instance->SR &(__FLAG__)) == (__FLAG__))
mbed_official	235:685d5f11838f	1183	#define __HAL_TIM_CLEAR_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->SR = ~(__FLAG__))
mbed_official	235:685d5f11838f	1184
mbed_official	235:685d5f11838f	1185	#define __HAL_TIM_GET_ITSTATUS(__HANDLE__, __INTERRUPT__) ((((__HANDLE__)->Instance->DIER & (__INTERRUPT__)) == (__INTERRUPT__)) ? SET : RESET)
mbed_official	235:685d5f11838f	1186	#define __HAL_TIM_CLEAR_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->SR = ~(__INTERRUPT__))
mbed_official	235:685d5f11838f	1187
mbed_official	235:685d5f11838f	1188	#define __HAL_TIM_DIRECTION_STATUS(__HANDLE__) (((__HANDLE__)->Instance->CR1 &(TIM_CR1_DIR)) == (TIM_CR1_DIR))
mbed_official	235:685d5f11838f	1189	#define __HAL_TIM_PRESCALER (__HANDLE__, __PRESC__) ((__HANDLE__)->Instance->PSC = (__PRESC__))
mbed_official	235:685d5f11838f	1190
mbed_official	235:685d5f11838f	1191	#define __HAL_TIM_SetICPrescalerValue(__HANDLE__, __CHANNEL__, __ICPSC__) \
mbed_official	235:685d5f11838f	1192	(((__CHANNEL__) == TIM_CHANNEL_1) ? ((__HANDLE__)->Instance->CCMR1 \|= (__ICPSC__)) :\
mbed_official	235:685d5f11838f	1193	((__CHANNEL__) == TIM_CHANNEL_2) ? ((__HANDLE__)->Instance->CCMR1 \|= ((__ICPSC__) << 8)) :\
mbed_official	235:685d5f11838f	1194	((__CHANNEL__) == TIM_CHANNEL_3) ? ((__HANDLE__)->Instance->CCMR2 \|= (__ICPSC__)) :\
mbed_official	235:685d5f11838f	1195	((__HANDLE__)->Instance->CCMR2 \|= ((__ICPSC__) << 8)))
mbed_official	235:685d5f11838f	1196
mbed_official	235:685d5f11838f	1197	#define __HAL_TIM_ResetICPrescalerValue(__HANDLE__, __CHANNEL__) \
mbed_official	235:685d5f11838f	1198	(((__CHANNEL__) == TIM_CHANNEL_1) ? ((__HANDLE__)->Instance->CCMR1 &= (uint16_t)~TIM_CCMR1_IC1PSC) :\
mbed_official	235:685d5f11838f	1199	((__CHANNEL__) == TIM_CHANNEL_2) ? ((__HANDLE__)->Instance->CCMR1 &= (uint16_t)~TIM_CCMR1_IC2PSC) :\
mbed_official	235:685d5f11838f	1200	((__CHANNEL__) == TIM_CHANNEL_3) ? ((__HANDLE__)->Instance->CCMR2 &= (uint16_t)~TIM_CCMR2_IC3PSC) :\
mbed_official	235:685d5f11838f	1201	((__HANDLE__)->Instance->CCMR2 &= (uint16_t)~TIM_CCMR2_IC4PSC))
mbed_official	235:685d5f11838f	1202
mbed_official	235:685d5f11838f	1203	/**
mbed_official	235:685d5f11838f	1204	* @brief Sets the TIM Capture Compare Register value on runtime without
mbed_official	235:685d5f11838f	1205	* calling another time ConfigChannel function.
mbed_official	235:685d5f11838f	1206	* @param __HANDLE__: TIM handle.
mbed_official	235:685d5f11838f	1207	* @param __CHANNEL__ : TIM Channels to be configured.
mbed_official	235:685d5f11838f	1208	* This parameter can be one of the following values:
mbed_official	235:685d5f11838f	1209	* @arg TIM_CHANNEL_1: TIM Channel 1 selected
mbed_official	235:685d5f11838f	1210	* @arg TIM_CHANNEL_2: TIM Channel 2 selected
mbed_official	235:685d5f11838f	1211	* @arg TIM_CHANNEL_3: TIM Channel 3 selected
mbed_official	235:685d5f11838f	1212	* @arg TIM_CHANNEL_4: TIM Channel 4 selected
mbed_official	235:685d5f11838f	1213	* @param __COMPARE__: specifies the Capture Compare register new value.
mbed_official	235:685d5f11838f	1214	* @retval None
mbed_official	235:685d5f11838f	1215	*/
mbed_official	235:685d5f11838f	1216	#define __HAL_TIM_SetCompare(__HANDLE__, __CHANNEL__, __COMPARE__) \
mbed_official	235:685d5f11838f	1217	((__IO uint32_t )(&((__HANDLE__)->Instance->CCR1) + ((__CHANNEL__) >> 2)) = (__COMPARE__))
mbed_official	235:685d5f11838f	1218
mbed_official	235:685d5f11838f	1219	/**
mbed_official	235:685d5f11838f	1220	* @brief Gets the TIM Capture Compare Register value on runtime
mbed_official	235:685d5f11838f	1221	* @param __HANDLE__: TIM handle.
mbed_official	235:685d5f11838f	1222	* @param __CHANNEL__ : TIM Channel associated with the capture compare register
mbed_official	235:685d5f11838f	1223	* This parameter can be one of the following values:
mbed_official	235:685d5f11838f	1224	* @arg TIM_CHANNEL_1: get capture/compare 1 register value
mbed_official	235:685d5f11838f	1225	* @arg TIM_CHANNEL_2: get capture/compare 2 register value
mbed_official	235:685d5f11838f	1226	* @arg TIM_CHANNEL_3: get capture/compare 3 register value
mbed_official	235:685d5f11838f	1227	* @arg TIM_CHANNEL_4: get capture/compare 4 register value
mbed_official	235:685d5f11838f	1228	* @retval None
mbed_official	235:685d5f11838f	1229	*/
mbed_official	235:685d5f11838f	1230	#define __HAL_TIM_GetCompare(__HANDLE__, __CHANNEL__) \
mbed_official	235:685d5f11838f	1231	((__IO uint32_t )(&((__HANDLE__)->Instance->CCR1) + ((__CHANNEL__) >> 2)))
mbed_official	235:685d5f11838f	1232
mbed_official	235:685d5f11838f	1233	/**
mbed_official	235:685d5f11838f	1234	* @brief Sets the TIM Counter Register value on runtime.
mbed_official	235:685d5f11838f	1235	* @param __HANDLE__: TIM handle.
mbed_official	235:685d5f11838f	1236	* @param __COUNTER__: specifies the Counter register new value.
mbed_official	235:685d5f11838f	1237	* @retval None
mbed_official	235:685d5f11838f	1238	*/
mbed_official	235:685d5f11838f	1239	#define __HAL_TIM_SetCounter(__HANDLE__, __COUNTER__) ((__HANDLE__)->Instance->CNT = (__COUNTER__))
mbed_official	235:685d5f11838f	1240
mbed_official	235:685d5f11838f	1241	/**
mbed_official	235:685d5f11838f	1242	* @brief Gets the TIM Counter Register value on runtime.
mbed_official	235:685d5f11838f	1243	* @param __HANDLE__: TIM handle.
mbed_official	235:685d5f11838f	1244	* @retval None
mbed_official	235:685d5f11838f	1245	*/
mbed_official	235:685d5f11838f	1246	#define __HAL_TIM_GetCounter(__HANDLE__) ((__HANDLE__)->Instance->CNT)
mbed_official	235:685d5f11838f	1247
mbed_official	235:685d5f11838f	1248	/**
mbed_official	235:685d5f11838f	1249	* @brief Sets the TIM Autoreload Register value on runtime without calling
mbed_official	235:685d5f11838f	1250	* another time any Init function.
mbed_official	235:685d5f11838f	1251	* @param __HANDLE__: TIM handle.
mbed_official	235:685d5f11838f	1252	* @param __AUTORELOAD__: specifies the Counter register new value.
mbed_official	235:685d5f11838f	1253	* @retval None
mbed_official	235:685d5f11838f	1254	*/
mbed_official	235:685d5f11838f	1255	#define __HAL_TIM_SetAutoreload(__HANDLE__, __AUTORELOAD__) \
mbed_official	235:685d5f11838f	1256	do{ \
mbed_official	235:685d5f11838f	1257	(__HANDLE__)->Instance->ARR = (__AUTORELOAD__); \
mbed_official	235:685d5f11838f	1258	(__HANDLE__)->Init.Period = (__AUTORELOAD__); \
mbed_official	235:685d5f11838f	1259	} while(0)
mbed_official	235:685d5f11838f	1260	/**
mbed_official	235:685d5f11838f	1261	* @brief Gets the TIM Autoreload Register value on runtime
mbed_official	235:685d5f11838f	1262	* @param __HANDLE__: TIM handle.
mbed_official	235:685d5f11838f	1263	* @retval None
mbed_official	235:685d5f11838f	1264	*/
mbed_official	235:685d5f11838f	1265	#define __HAL_TIM_GetAutoreload(__HANDLE__) ((__HANDLE__)->Instance->ARR)
mbed_official	235:685d5f11838f	1266
mbed_official	235:685d5f11838f	1267	/**
mbed_official	235:685d5f11838f	1268	* @brief Sets the TIM Clock Division value on runtime without calling
mbed_official	235:685d5f11838f	1269	* another time any Init function.
mbed_official	235:685d5f11838f	1270	* @param __HANDLE__: TIM handle.
mbed_official	235:685d5f11838f	1271	* @param __CKD__: specifies the clock division value.
mbed_official	235:685d5f11838f	1272	* This parameter can be one of the following value:
mbed_official	235:685d5f11838f	1273	* @arg TIM_CLOCKDIVISION_DIV1
mbed_official	235:685d5f11838f	1274	* @arg TIM_CLOCKDIVISION_DIV2
mbed_official	235:685d5f11838f	1275	* @arg TIM_CLOCKDIVISION_DIV4
mbed_official	235:685d5f11838f	1276	* @retval None
mbed_official	235:685d5f11838f	1277	*/
mbed_official	235:685d5f11838f	1278	#define __HAL_TIM_SetClockDivision(__HANDLE__, __CKD__) \
mbed_official	235:685d5f11838f	1279	do{ \
mbed_official	235:685d5f11838f	1280	(__HANDLE__)->Instance->CR1 &= (uint16_t)(~TIM_CR1_CKD); \
mbed_official	235:685d5f11838f	1281	(__HANDLE__)->Instance->CR1 \|= (__CKD__); \
mbed_official	235:685d5f11838f	1282	(__HANDLE__)->Init.ClockDivision = (__CKD__); \
mbed_official	235:685d5f11838f	1283	} while(0)
mbed_official	235:685d5f11838f	1284	/**
mbed_official	235:685d5f11838f	1285	* @brief Gets the TIM Clock Division value on runtime
mbed_official	235:685d5f11838f	1286	* @param __HANDLE__: TIM handle.
mbed_official	235:685d5f11838f	1287	* @retval None
mbed_official	235:685d5f11838f	1288	*/
mbed_official	235:685d5f11838f	1289	#define __HAL_TIM_GetClockDivision(__HANDLE__) ((__HANDLE__)->Instance->CR1 & TIM_CR1_CKD)
mbed_official	235:685d5f11838f	1290
mbed_official	235:685d5f11838f	1291	/**
mbed_official	235:685d5f11838f	1292	* @brief Sets the TIM Input Capture prescaler on runtime without calling
mbed_official	235:685d5f11838f	1293	* another time HAL_TIM_IC_ConfigChannel() function.
mbed_official	235:685d5f11838f	1294	* @param __HANDLE__: TIM handle.
mbed_official	235:685d5f11838f	1295	* @param __CHANNEL__ : TIM Channels to be configured.
mbed_official	235:685d5f11838f	1296	* This parameter can be one of the following values:
mbed_official	235:685d5f11838f	1297	* @arg TIM_CHANNEL_1: TIM Channel 1 selected
mbed_official	235:685d5f11838f	1298	* @arg TIM_CHANNEL_2: TIM Channel 2 selected
mbed_official	235:685d5f11838f	1299	* @arg TIM_CHANNEL_3: TIM Channel 3 selected
mbed_official	235:685d5f11838f	1300	* @arg TIM_CHANNEL_4: TIM Channel 4 selected
mbed_official	235:685d5f11838f	1301	* @param __ICPSC__: specifies the Input Capture4 prescaler new value.
mbed_official	235:685d5f11838f	1302	* This parameter can be one of the following values:
mbed_official	235:685d5f11838f	1303	* @arg TIM_ICPSC_DIV1: no prescaler
mbed_official	235:685d5f11838f	1304	* @arg TIM_ICPSC_DIV2: capture is done once every 2 events
mbed_official	235:685d5f11838f	1305	* @arg TIM_ICPSC_DIV4: capture is done once every 4 events
mbed_official	235:685d5f11838f	1306	* @arg TIM_ICPSC_DIV8: capture is done once every 8 events
mbed_official	235:685d5f11838f	1307	* @retval None
mbed_official	235:685d5f11838f	1308	*/
mbed_official	235:685d5f11838f	1309	#define __HAL_TIM_SetICPrescaler(__HANDLE__, __CHANNEL__, __ICPSC__) \
mbed_official	235:685d5f11838f	1310	do{ \
mbed_official	235:685d5f11838f	1311	__HAL_TIM_ResetICPrescalerValue((__HANDLE__), (__CHANNEL__)); \
mbed_official	235:685d5f11838f	1312	__HAL_TIM_SetICPrescalerValue((__HANDLE__), (__CHANNEL__), (__ICPSC__)); \
mbed_official	235:685d5f11838f	1313	} while(0)
mbed_official	235:685d5f11838f	1314
mbed_official	235:685d5f11838f	1315	/**
mbed_official	235:685d5f11838f	1316	* @brief Gets the TIM Input Capture prescaler on runtime
mbed_official	235:685d5f11838f	1317	* @param __HANDLE__: TIM handle.
mbed_official	235:685d5f11838f	1318	* @param __CHANNEL__ : TIM Channels to be configured.
mbed_official	235:685d5f11838f	1319	* This parameter can be one of the following values:
mbed_official	235:685d5f11838f	1320	* @arg TIM_CHANNEL_1: get input capture 1 prescaler value
mbed_official	235:685d5f11838f	1321	* @arg TIM_CHANNEL_2: get input capture 2 prescaler value
mbed_official	235:685d5f11838f	1322	* @arg TIM_CHANNEL_3: get input capture 3 prescaler value
mbed_official	235:685d5f11838f	1323	* @arg TIM_CHANNEL_4: get input capture 4 prescaler value
mbed_official	235:685d5f11838f	1324	* @retval None
mbed_official	235:685d5f11838f	1325	*/
mbed_official	235:685d5f11838f	1326	#define __HAL_TIM_GetICPrescaler(__HANDLE__, __CHANNEL__) \
mbed_official	235:685d5f11838f	1327	(((__CHANNEL__) == TIM_CHANNEL_1) ? ((__HANDLE__)->Instance->CCMR1 & TIM_CCMR1_IC1PSC) :\
mbed_official	235:685d5f11838f	1328	((__CHANNEL__) == TIM_CHANNEL_2) ? (((__HANDLE__)->Instance->CCMR1 & TIM_CCMR1_IC2PSC) >> 8) :\
mbed_official	235:685d5f11838f	1329	((__CHANNEL__) == TIM_CHANNEL_3) ? ((__HANDLE__)->Instance->CCMR2 & TIM_CCMR2_IC3PSC) :\
mbed_official	235:685d5f11838f	1330	(((__HANDLE__)->Instance->CCMR2 & TIM_CCMR2_IC4PSC)) >> 8)
mbed_official	235:685d5f11838f	1331	/**
mbed_official	235:685d5f11838f	1332	* @}
mbed_official	235:685d5f11838f	1333	*/
mbed_official	235:685d5f11838f	1334
mbed_official	235:685d5f11838f	1335	/* Include TIM HAL Extension module */
mbed_official	235:685d5f11838f	1336	#include "stm32f4xx_hal_tim_ex.h"
mbed_official	235:685d5f11838f	1337
mbed_official	235:685d5f11838f	1338	/* Exported functions --------------------------------------------------------*/
mbed_official	235:685d5f11838f	1339
mbed_official	235:685d5f11838f	1340	/* Time Base functions ********************************************************/
mbed_official	235:685d5f11838f	1341	HAL_StatusTypeDef HAL_TIM_Base_Init(TIM_HandleTypeDef *htim);
mbed_official	235:685d5f11838f	1342	HAL_StatusTypeDef HAL_TIM_Base_DeInit(TIM_HandleTypeDef *htim);
mbed_official	235:685d5f11838f	1343	void HAL_TIM_Base_MspInit(TIM_HandleTypeDef *htim);
mbed_official	235:685d5f11838f	1344	void HAL_TIM_Base_MspDeInit(TIM_HandleTypeDef *htim);
mbed_official	235:685d5f11838f	1345	/* Blocking mode: Polling */
mbed_official	235:685d5f11838f	1346	HAL_StatusTypeDef HAL_TIM_Base_Start(TIM_HandleTypeDef *htim);
mbed_official	235:685d5f11838f	1347	HAL_StatusTypeDef HAL_TIM_Base_Stop(TIM_HandleTypeDef *htim);
mbed_official	235:685d5f11838f	1348	/* Non-Blocking mode: Interrupt */
mbed_official	235:685d5f11838f	1349	HAL_StatusTypeDef HAL_TIM_Base_Start_IT(TIM_HandleTypeDef *htim);
mbed_official	235:685d5f11838f	1350	HAL_StatusTypeDef HAL_TIM_Base_Stop_IT(TIM_HandleTypeDef *htim);
mbed_official	235:685d5f11838f	1351	/* Non-Blocking mode: DMA */
mbed_official	235:685d5f11838f	1352	HAL_StatusTypeDef HAL_TIM_Base_Start_DMA(TIM_HandleTypeDef htim, uint32_t pData, uint16_t Length);
mbed_official	235:685d5f11838f	1353	HAL_StatusTypeDef HAL_TIM_Base_Stop_DMA(TIM_HandleTypeDef *htim);
mbed_official	235:685d5f11838f	1354
mbed_official	235:685d5f11838f	1355	/* Timer Output Compare functions **********************************************/
mbed_official	235:685d5f11838f	1356	HAL_StatusTypeDef HAL_TIM_OC_Init(TIM_HandleTypeDef *htim);
mbed_official	235:685d5f11838f	1357	HAL_StatusTypeDef HAL_TIM_OC_DeInit(TIM_HandleTypeDef *htim);
mbed_official	235:685d5f11838f	1358	void HAL_TIM_OC_MspInit(TIM_HandleTypeDef *htim);
mbed_official	235:685d5f11838f	1359	void HAL_TIM_OC_MspDeInit(TIM_HandleTypeDef *htim);
mbed_official	235:685d5f11838f	1360	/* Blocking mode: Polling */
mbed_official	235:685d5f11838f	1361	HAL_StatusTypeDef HAL_TIM_OC_Start(TIM_HandleTypeDef *htim, uint32_t Channel);
mbed_official	235:685d5f11838f	1362	HAL_StatusTypeDef HAL_TIM_OC_Stop(TIM_HandleTypeDef *htim, uint32_t Channel);
mbed_official	235:685d5f11838f	1363	/* Non-Blocking mode: Interrupt */
mbed_official	235:685d5f11838f	1364	HAL_StatusTypeDef HAL_TIM_OC_Start_IT(TIM_HandleTypeDef *htim, uint32_t Channel);
mbed_official	235:685d5f11838f	1365	HAL_StatusTypeDef HAL_TIM_OC_Stop_IT(TIM_HandleTypeDef *htim, uint32_t Channel);
mbed_official	235:685d5f11838f	1366	/* Non-Blocking mode: DMA */
mbed_official	235:685d5f11838f	1367	HAL_StatusTypeDef HAL_TIM_OC_Start_DMA(TIM_HandleTypeDef htim, uint32_t Channel, uint32_t pData, uint16_t Length);
mbed_official	235:685d5f11838f	1368	HAL_StatusTypeDef HAL_TIM_OC_Stop_DMA(TIM_HandleTypeDef *htim, uint32_t Channel);
mbed_official	235:685d5f11838f	1369
mbed_official	235:685d5f11838f	1370	/* Timer PWM functions *********************************************************/
mbed_official	235:685d5f11838f	1371	HAL_StatusTypeDef HAL_TIM_PWM_Init(TIM_HandleTypeDef *htim);
mbed_official	235:685d5f11838f	1372	HAL_StatusTypeDef HAL_TIM_PWM_DeInit(TIM_HandleTypeDef *htim);
mbed_official	235:685d5f11838f	1373	void HAL_TIM_PWM_MspInit(TIM_HandleTypeDef *htim);
mbed_official	235:685d5f11838f	1374	void HAL_TIM_PWM_MspDeInit(TIM_HandleTypeDef *htim);
mbed_official	235:685d5f11838f	1375	/* Blocking mode: Polling */
mbed_official	235:685d5f11838f	1376	HAL_StatusTypeDef HAL_TIM_PWM_Start(TIM_HandleTypeDef *htim, uint32_t Channel);
mbed_official	235:685d5f11838f	1377	HAL_StatusTypeDef HAL_TIM_PWM_Stop(TIM_HandleTypeDef *htim, uint32_t Channel);
mbed_official	235:685d5f11838f	1378	/* Non-Blocking mode: Interrupt */
mbed_official	235:685d5f11838f	1379	HAL_StatusTypeDef HAL_TIM_PWM_Start_IT(TIM_HandleTypeDef *htim, uint32_t Channel);
mbed_official	235:685d5f11838f	1380	HAL_StatusTypeDef HAL_TIM_PWM_Stop_IT(TIM_HandleTypeDef *htim, uint32_t Channel);
mbed_official	235:685d5f11838f	1381	/* Non-Blocking mode: DMA */
mbed_official	235:685d5f11838f	1382	HAL_StatusTypeDef HAL_TIM_PWM_Start_DMA(TIM_HandleTypeDef htim, uint32_t Channel, uint32_t pData, uint16_t Length);
mbed_official	235:685d5f11838f	1383	HAL_StatusTypeDef HAL_TIM_PWM_Stop_DMA(TIM_HandleTypeDef *htim, uint32_t Channel);
mbed_official	235:685d5f11838f	1384
mbed_official	235:685d5f11838f	1385	/* Timer Input Capture functions ***********************************************/
mbed_official	235:685d5f11838f	1386	HAL_StatusTypeDef HAL_TIM_IC_Init(TIM_HandleTypeDef *htim);
mbed_official	235:685d5f11838f	1387	HAL_StatusTypeDef HAL_TIM_IC_DeInit(TIM_HandleTypeDef *htim);
mbed_official	235:685d5f11838f	1388	void HAL_TIM_IC_MspInit(TIM_HandleTypeDef *htim);
mbed_official	235:685d5f11838f	1389	void HAL_TIM_IC_MspDeInit(TIM_HandleTypeDef *htim);
mbed_official	235:685d5f11838f	1390	/* Blocking mode: Polling */
mbed_official	235:685d5f11838f	1391	HAL_StatusTypeDef HAL_TIM_IC_Start(TIM_HandleTypeDef *htim, uint32_t Channel);
mbed_official	235:685d5f11838f	1392	HAL_StatusTypeDef HAL_TIM_IC_Stop(TIM_HandleTypeDef *htim, uint32_t Channel);
mbed_official	235:685d5f11838f	1393	/* Non-Blocking mode: Interrupt */
mbed_official	235:685d5f11838f	1394	HAL_StatusTypeDef HAL_TIM_IC_Start_IT(TIM_HandleTypeDef *htim, uint32_t Channel);
mbed_official	235:685d5f11838f	1395	HAL_StatusTypeDef HAL_TIM_IC_Stop_IT(TIM_HandleTypeDef *htim, uint32_t Channel);
mbed_official	235:685d5f11838f	1396	/* Non-Blocking mode: DMA */
mbed_official	235:685d5f11838f	1397	HAL_StatusTypeDef HAL_TIM_IC_Start_DMA(TIM_HandleTypeDef htim, uint32_t Channel, uint32_t pData, uint16_t Length);
mbed_official	235:685d5f11838f	1398	HAL_StatusTypeDef HAL_TIM_IC_Stop_DMA(TIM_HandleTypeDef *htim, uint32_t Channel);
mbed_official	235:685d5f11838f	1399
mbed_official	235:685d5f11838f	1400	/* Timer One Pulse functions ***************************************************/
mbed_official	235:685d5f11838f	1401	HAL_StatusTypeDef HAL_TIM_OnePulse_Init(TIM_HandleTypeDef *htim, uint32_t OnePulseMode);
mbed_official	235:685d5f11838f	1402	HAL_StatusTypeDef HAL_TIM_OnePulse_DeInit(TIM_HandleTypeDef *htim);
mbed_official	235:685d5f11838f	1403	void HAL_TIM_OnePulse_MspInit(TIM_HandleTypeDef *htim);
mbed_official	235:685d5f11838f	1404	void HAL_TIM_OnePulse_MspDeInit(TIM_HandleTypeDef *htim);
mbed_official	235:685d5f11838f	1405	/* Blocking mode: Polling */
mbed_official	235:685d5f11838f	1406	HAL_StatusTypeDef HAL_TIM_OnePulse_Start(TIM_HandleTypeDef *htim, uint32_t OutputChannel);
mbed_official	235:685d5f11838f	1407	HAL_StatusTypeDef HAL_TIM_OnePulse_Stop(TIM_HandleTypeDef *htim, uint32_t OutputChannel);
mbed_official	235:685d5f11838f	1408
mbed_official	235:685d5f11838f	1409	/* Non-Blocking mode: Interrupt */
mbed_official	235:685d5f11838f	1410	HAL_StatusTypeDef HAL_TIM_OnePulse_Start_IT(TIM_HandleTypeDef *htim, uint32_t OutputChannel);
mbed_official	235:685d5f11838f	1411	HAL_StatusTypeDef HAL_TIM_OnePulse_Stop_IT(TIM_HandleTypeDef *htim, uint32_t OutputChannel);
mbed_official	235:685d5f11838f	1412
mbed_official	235:685d5f11838f	1413	/* Timer Encoder functions *****************************************************/
mbed_official	235:685d5f11838f	1414	HAL_StatusTypeDef HAL_TIM_Encoder_Init(TIM_HandleTypeDef htim, TIM_Encoder_InitTypeDef sConfig);
mbed_official	235:685d5f11838f	1415	HAL_StatusTypeDef HAL_TIM_Encoder_DeInit(TIM_HandleTypeDef *htim);
mbed_official	235:685d5f11838f	1416	void HAL_TIM_Encoder_MspInit(TIM_HandleTypeDef *htim);
mbed_official	235:685d5f11838f	1417	void HAL_TIM_Encoder_MspDeInit(TIM_HandleTypeDef *htim);
mbed_official	235:685d5f11838f	1418	/* Blocking mode: Polling */
mbed_official	235:685d5f11838f	1419	HAL_StatusTypeDef HAL_TIM_Encoder_Start(TIM_HandleTypeDef *htim, uint32_t Channel);
mbed_official	235:685d5f11838f	1420	HAL_StatusTypeDef HAL_TIM_Encoder_Stop(TIM_HandleTypeDef *htim, uint32_t Channel);
mbed_official	235:685d5f11838f	1421	/* Non-Blocking mode: Interrupt */
mbed_official	235:685d5f11838f	1422	HAL_StatusTypeDef HAL_TIM_Encoder_Start_IT(TIM_HandleTypeDef *htim, uint32_t Channel);
mbed_official	235:685d5f11838f	1423	HAL_StatusTypeDef HAL_TIM_Encoder_Stop_IT(TIM_HandleTypeDef *htim, uint32_t Channel);
mbed_official	235:685d5f11838f	1424	/* Non-Blocking mode: DMA */
mbed_official	235:685d5f11838f	1425	HAL_StatusTypeDef HAL_TIM_Encoder_Start_DMA(TIM_HandleTypeDef htim, uint32_t Channel, uint32_t pData1, uint32_t *pData2, uint16_t Length);
mbed_official	235:685d5f11838f	1426	HAL_StatusTypeDef HAL_TIM_Encoder_Stop_DMA(TIM_HandleTypeDef *htim, uint32_t Channel);
mbed_official	235:685d5f11838f	1427
mbed_official	235:685d5f11838f	1428	/* Interrupt Handler functions **********************************************/
mbed_official	235:685d5f11838f	1429	void HAL_TIM_IRQHandler(TIM_HandleTypeDef *htim);
mbed_official	235:685d5f11838f	1430
mbed_official	235:685d5f11838f	1431	/* Control functions *********************************************************/
mbed_official	235:685d5f11838f	1432	HAL_StatusTypeDef HAL_TIM_OC_ConfigChannel(TIM_HandleTypeDef htim, TIM_OC_InitTypeDef sConfig, uint32_t Channel);
mbed_official	235:685d5f11838f	1433	HAL_StatusTypeDef HAL_TIM_PWM_ConfigChannel(TIM_HandleTypeDef htim, TIM_OC_InitTypeDef sConfig, uint32_t Channel);
mbed_official	235:685d5f11838f	1434	HAL_StatusTypeDef HAL_TIM_IC_ConfigChannel(TIM_HandleTypeDef htim, TIM_IC_InitTypeDef sConfig, uint32_t Channel);
mbed_official	235:685d5f11838f	1435	HAL_StatusTypeDef HAL_TIM_OnePulse_ConfigChannel(TIM_HandleTypeDef htim, TIM_OnePulse_InitTypeDef sConfig, uint32_t OutputChannel, uint32_t InputChannel);
mbed_official	235:685d5f11838f	1436	HAL_StatusTypeDef HAL_TIM_ConfigOCrefClear(TIM_HandleTypeDef htim, TIM_ClearInputConfigTypeDef sClearInputConfig, uint32_t Channel);
mbed_official	235:685d5f11838f	1437	HAL_StatusTypeDef HAL_TIM_ConfigClockSource(TIM_HandleTypeDef htim, TIM_ClockConfigTypeDef sClockSourceConfig);
mbed_official	235:685d5f11838f	1438	HAL_StatusTypeDef HAL_TIM_ConfigTI1Input(TIM_HandleTypeDef *htim, uint32_t TI1_Selection);
mbed_official	235:685d5f11838f	1439	HAL_StatusTypeDef HAL_TIM_SlaveConfigSynchronization(TIM_HandleTypeDef htim, TIM_SlaveConfigTypeDef sSlaveConfig);
mbed_official	235:685d5f11838f	1440	HAL_StatusTypeDef HAL_TIM_DMABurst_WriteStart(TIM_HandleTypeDef *htim, uint32_t BurstBaseAddress, uint32_t BurstRequestSrc, \
mbed_official	235:685d5f11838f	1441	uint32_t *BurstBuffer, uint32_t BurstLength);
mbed_official	235:685d5f11838f	1442	HAL_StatusTypeDef HAL_TIM_DMABurst_WriteStop(TIM_HandleTypeDef *htim, uint32_t BurstRequestSrc);
mbed_official	235:685d5f11838f	1443	HAL_StatusTypeDef HAL_TIM_DMABurst_ReadStart(TIM_HandleTypeDef *htim, uint32_t BurstBaseAddress, uint32_t BurstRequestSrc, \
mbed_official	235:685d5f11838f	1444	uint32_t *BurstBuffer, uint32_t BurstLength);
mbed_official	235:685d5f11838f	1445	HAL_StatusTypeDef HAL_TIM_DMABurst_ReadStop(TIM_HandleTypeDef *htim, uint32_t BurstRequestSrc);
mbed_official	235:685d5f11838f	1446	HAL_StatusTypeDef HAL_TIM_GenerateEvent(TIM_HandleTypeDef *htim, uint32_t EventSource);
mbed_official	235:685d5f11838f	1447	uint32_t HAL_TIM_ReadCapturedValue(TIM_HandleTypeDef *htim, uint32_t Channel);
mbed_official	235:685d5f11838f	1448
mbed_official	235:685d5f11838f	1449	/* Callback in non blocking modes (Interrupt and DMA) *************************/
mbed_official	235:685d5f11838f	1450	void HAL_TIM_PeriodElapsedCallback(TIM_HandleTypeDef *htim);
mbed_official	235:685d5f11838f	1451	void HAL_TIM_OC_DelayElapsedCallback(TIM_HandleTypeDef *htim);
mbed_official	235:685d5f11838f	1452	void HAL_TIM_IC_CaptureCallback(TIM_HandleTypeDef *htim);
mbed_official	235:685d5f11838f	1453	void HAL_TIM_PWM_PulseFinishedCallback(TIM_HandleTypeDef *htim);
mbed_official	235:685d5f11838f	1454	void HAL_TIM_TriggerCallback(TIM_HandleTypeDef *htim);
mbed_official	235:685d5f11838f	1455	void HAL_TIM_ErrorCallback(TIM_HandleTypeDef *htim);
mbed_official	235:685d5f11838f	1456
mbed_official	235:685d5f11838f	1457	/* Peripheral State functions **************************************************/
mbed_official	235:685d5f11838f	1458	HAL_TIM_StateTypeDef HAL_TIM_Base_GetState(TIM_HandleTypeDef *htim);
mbed_official	235:685d5f11838f	1459	HAL_TIM_StateTypeDef HAL_TIM_OC_GetState(TIM_HandleTypeDef *htim);
mbed_official	235:685d5f11838f	1460	HAL_TIM_StateTypeDef HAL_TIM_PWM_GetState(TIM_HandleTypeDef *htim);
mbed_official	235:685d5f11838f	1461	HAL_TIM_StateTypeDef HAL_TIM_IC_GetState(TIM_HandleTypeDef *htim);
mbed_official	235:685d5f11838f	1462	HAL_TIM_StateTypeDef HAL_TIM_OnePulse_GetState(TIM_HandleTypeDef *htim);
mbed_official	235:685d5f11838f	1463	HAL_TIM_StateTypeDef HAL_TIM_Encoder_GetState(TIM_HandleTypeDef *htim);
mbed_official	235:685d5f11838f	1464
mbed_official	235:685d5f11838f	1465	void TIM_Base_SetConfig(TIM_TypeDef TIMx, TIM_Base_InitTypeDef Structure);
mbed_official	235:685d5f11838f	1466	void TIM_TI1_SetConfig(TIM_TypeDef *TIMx, uint32_t TIM_ICPolarity, uint32_t TIM_ICSelection, uint32_t TIM_ICFilter);
mbed_official	235:685d5f11838f	1467	void TIM_OC2_SetConfig(TIM_TypeDef TIMx, TIM_OC_InitTypeDef OC_Config);
mbed_official	235:685d5f11838f	1468	void HAL_TIM_DMADelayPulseCplt(DMA_HandleTypeDef *hdma);
mbed_official	235:685d5f11838f	1469	void HAL_TIM_DMAError(DMA_HandleTypeDef *hdma);
mbed_official	235:685d5f11838f	1470	void HAL_TIM_DMACaptureCplt(DMA_HandleTypeDef *hdma);
mbed_official	235:685d5f11838f	1471	void TIM_CCxChannelCmd(TIM_TypeDef* TIMx, uint32_t Channel, uint32_t ChannelState);
mbed_official	235:685d5f11838f	1472
mbed_official	235:685d5f11838f	1473	/**
mbed_official	235:685d5f11838f	1474	* @}
mbed_official	235:685d5f11838f	1475	*/
mbed_official	235:685d5f11838f	1476
mbed_official	235:685d5f11838f	1477	/**
mbed_official	235:685d5f11838f	1478	* @}
mbed_official	235:685d5f11838f	1479	*/
mbed_official	235:685d5f11838f	1480
mbed_official	235:685d5f11838f	1481	#ifdef __cplusplus
mbed_official	235:685d5f11838f	1482	}
mbed_official	235:685d5f11838f	1483	#endif
mbed_official	235:685d5f11838f	1484
mbed_official	235:685d5f11838f	1485	#endif /* __STM32F4xx_HAL_TIM_H */
mbed_official	235:685d5f11838f	1486
mbed_official	235:685d5f11838f	1487	/********************** (C) COPYRIGHT STMicroelectronics *END OF FILE**/

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Type:	Library
Created:	13 Sep 2014
Imports:	4
Forks:	0
Commits:	324
Dependents:	1
Dependencies:	0
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targets/cmsis/TARGET_STM/TARGET_NUCLEO_F411RE/stm32f4xx_hal_tim.h@235:685d5f11838f, 2014-06-23 (annotated)

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