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targets/cmsis/TARGET_STM/TARGET_NUCLEO_F411RE/stm32f4xx_hal_dma2d.c@235:685d5f11838f, 2014-06-23 (annotated)

Committer:
mbed_official
Date:
Mon Jun 23 14:00:09 2014 +0100
Revision:
235:685d5f11838f
Synchronized with git revision 9728c76667962b289ee9c4c687ef9f115db48cd3



Full URL: https://github.com/mbedmicro/mbed/commit/9728c76667962b289ee9c4c687ef9f115db48cd3/



[NUCLEO_F411RE] Add all target files

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UserRevisionLine numberNew contents of line
mbed_official 235:685d5f11838f 1 /**
mbed_official 235:685d5f11838f 2 ******************************************************************************
mbed_official 235:685d5f11838f 3 * @file stm32f4xx_hal_dma2d.c
mbed_official 235:685d5f11838f 4 * @author MCD Application Team
mbed_official 235:685d5f11838f 5 * @version V1.1.0
mbed_official 235:685d5f11838f 6 * @date 19-June-2014
mbed_official 235:685d5f11838f 7 * @brief DMA2D HAL module driver.
mbed_official 235:685d5f11838f 8 * This file provides firmware functions to manage the following
mbed_official 235:685d5f11838f 9 * functionalities of the DMA2D peripheral:
mbed_official 235:685d5f11838f 10 * + Initialization and de-initialization functions
mbed_official 235:685d5f11838f 11 * + IO operation functions
mbed_official 235:685d5f11838f 12 * + Peripheral Control functions
mbed_official 235:685d5f11838f 13 * + Peripheral State and Errors functions
mbed_official 235:685d5f11838f 14 *
mbed_official 235:685d5f11838f 15 @verbatim
mbed_official 235:685d5f11838f 16 ==============================================================================
mbed_official 235:685d5f11838f 17 ##### How to use this driver #####
mbed_official 235:685d5f11838f 18 ==============================================================================
mbed_official 235:685d5f11838f 19 [..]
mbed_official 235:685d5f11838f 20 (#) Program the required configuration through following parameters:
mbed_official 235:685d5f11838f 21 the Transfer Mode, the output color mode and the output offset using
mbed_official 235:685d5f11838f 22 HAL_DMA2D_Init() function.
mbed_official 235:685d5f11838f 23
mbed_official 235:685d5f11838f 24 (#) Program the required configuration through following parameters:
mbed_official 235:685d5f11838f 25 the input color mode, the input color, input alpha value, alpha mode
mbed_official 235:685d5f11838f 26 and the input offset using HAL_DMA2D_ConfigLayer() function for foreground
mbed_official 235:685d5f11838f 27 or/and background layer.
mbed_official 235:685d5f11838f 28
mbed_official 235:685d5f11838f 29 *** Polling mode IO operation ***
mbed_official 235:685d5f11838f 30 =================================
mbed_official 235:685d5f11838f 31 [..]
mbed_official 235:685d5f11838f 32 (+) Configure the pdata, Destination and data length and Enable
mbed_official 235:685d5f11838f 33 the transfer using HAL_DMA2D_Start()
mbed_official 235:685d5f11838f 34 (+) Wait for end of transfer using HAL_DMA2D_PollForTransfer(), at this stage
mbed_official 235:685d5f11838f 35 user can specify the value of timeout according to his end application.
mbed_official 235:685d5f11838f 36
mbed_official 235:685d5f11838f 37 *** Interrupt mode IO operation ***
mbed_official 235:685d5f11838f 38 ===================================
mbed_official 235:685d5f11838f 39 [..]
mbed_official 235:685d5f11838f 40 (#) Configure the pdata, Destination and data length and Enable
mbed_official 235:685d5f11838f 41 the transfer using HAL_DMA2D_Start_IT()
mbed_official 235:685d5f11838f 42 (#) Use HAL_DMA2D_IRQHandler() called under DMA2D_IRQHandler() Interrupt subroutine
mbed_official 235:685d5f11838f 43 (#) At the end of data transfer HAL_DMA2D_IRQHandler() function is executed and user can
mbed_official 235:685d5f11838f 44 add his own function by customization of function pointer XferCpltCallback and
mbed_official 235:685d5f11838f 45 XferErrorCallback (i.e a member of DMA2D handle structure).
mbed_official 235:685d5f11838f 46
mbed_official 235:685d5f11838f 47 -@- In Register-to-Memory transfer mode, the pdata parameter is the register
mbed_official 235:685d5f11838f 48 color, in Memory-to-memory or memory-to-memory with pixel format
mbed_official 235:685d5f11838f 49 conversion the pdata is the source address.
mbed_official 235:685d5f11838f 50
mbed_official 235:685d5f11838f 51 -@- Configure the foreground source address, the background source address,
mbed_official 235:685d5f11838f 52 the Destination and data length and Enable the transfer using
mbed_official 235:685d5f11838f 53 HAL_DMA2D_BlendingStart() in polling mode and HAL_DMA2D_BlendingStart_IT()
mbed_official 235:685d5f11838f 54 in interrupt mode.
mbed_official 235:685d5f11838f 55
mbed_official 235:685d5f11838f 56 -@- HAL_DMA2D_BlendingStart() and HAL_DMA2D_BlendingStart_IT() functions
mbed_official 235:685d5f11838f 57 are used if the memory to memory with blending transfer mode is selected.
mbed_official 235:685d5f11838f 58
mbed_official 235:685d5f11838f 59 (#) Optionally, configure and enable the CLUT using HAL_DMA2D_ConfigCLUT()
mbed_official 235:685d5f11838f 60 HAL_DMA2D_EnableCLUT() functions.
mbed_official 235:685d5f11838f 61
mbed_official 235:685d5f11838f 62 (#) Optionally, configure and enable LineInterrupt using the following function:
mbed_official 235:685d5f11838f 63 HAL_DMA2D_ProgramLineEvent().
mbed_official 235:685d5f11838f 64
mbed_official 235:685d5f11838f 65 (#) The transfer can be suspended, continued and aborted using the following
mbed_official 235:685d5f11838f 66 functions: HAL_DMA2D_Suspend(), HAL_DMA2D_Resume(), HAL_DMA2D_Abort().
mbed_official 235:685d5f11838f 67
mbed_official 235:685d5f11838f 68 (#) To control DMA2D state you can use the following function: HAL_DMA2D_GetState()
mbed_official 235:685d5f11838f 69
mbed_official 235:685d5f11838f 70 *** DMA2D HAL driver macros list ***
mbed_official 235:685d5f11838f 71 =============================================
mbed_official 235:685d5f11838f 72 [..]
mbed_official 235:685d5f11838f 73 Below the list of most used macros in DMA2D HAL driver :
mbed_official 235:685d5f11838f 74
mbed_official 235:685d5f11838f 75 (+) __HAL_DMA2D_ENABLE: Enable the DMA2D peripheral.
mbed_official 235:685d5f11838f 76 (+) __HAL_DMA2D_DISABLE: Disable the DMA2D peripheral.
mbed_official 235:685d5f11838f 77 (+) __HAL_DMA2D_GET_FLAG: Get the DMA2D pending flags.
mbed_official 235:685d5f11838f 78 (+) __HAL_DMA2D_CLEAR_FLAG: Clear the DMA2D pending flags.
mbed_official 235:685d5f11838f 79 (+) __HAL_DMA2D_ENABLE_IT: Enable the specified DMA2D interrupts.
mbed_official 235:685d5f11838f 80 (+) __HAL_DMA2D_DISABLE_IT: Disable the specified DMA2D interrupts.
mbed_official 235:685d5f11838f 81 (+) __HAL_DMA2D_GET_IT_SOURCE: Check whether the specified DMA2D interrupt has occurred or not.
mbed_official 235:685d5f11838f 82
mbed_official 235:685d5f11838f 83 [..]
mbed_official 235:685d5f11838f 84 (@) You can refer to the DMA2D HAL driver header file for more useful macros
mbed_official 235:685d5f11838f 85
mbed_official 235:685d5f11838f 86 @endverbatim
mbed_official 235:685d5f11838f 87 ******************************************************************************
mbed_official 235:685d5f11838f 88 * @attention
mbed_official 235:685d5f11838f 89 *
mbed_official 235:685d5f11838f 90 * <h2><center>&copy; COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
mbed_official 235:685d5f11838f 91 *
mbed_official 235:685d5f11838f 92 * Redistribution and use in source and binary forms, with or without modification,
mbed_official 235:685d5f11838f 93 * are permitted provided that the following conditions are met:
mbed_official 235:685d5f11838f 94 * 1. Redistributions of source code must retain the above copyright notice,
mbed_official 235:685d5f11838f 95 * this list of conditions and the following disclaimer.
mbed_official 235:685d5f11838f 96 * 2. Redistributions in binary form must reproduce the above copyright notice,
mbed_official 235:685d5f11838f 97 * this list of conditions and the following disclaimer in the documentation
mbed_official 235:685d5f11838f 98 * and/or other materials provided with the distribution.
mbed_official 235:685d5f11838f 99 * 3. Neither the name of STMicroelectronics nor the names of its contributors
mbed_official 235:685d5f11838f 100 * may be used to endorse or promote products derived from this software
mbed_official 235:685d5f11838f 101 * without specific prior written permission.
mbed_official 235:685d5f11838f 102 *
mbed_official 235:685d5f11838f 103 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
mbed_official 235:685d5f11838f 104 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
mbed_official 235:685d5f11838f 105 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
mbed_official 235:685d5f11838f 106 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
mbed_official 235:685d5f11838f 107 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
mbed_official 235:685d5f11838f 108 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
mbed_official 235:685d5f11838f 109 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
mbed_official 235:685d5f11838f 110 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
mbed_official 235:685d5f11838f 111 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
mbed_official 235:685d5f11838f 112 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
mbed_official 235:685d5f11838f 113 *
mbed_official 235:685d5f11838f 114 ******************************************************************************
mbed_official 235:685d5f11838f 115 */
mbed_official 235:685d5f11838f 116
mbed_official 235:685d5f11838f 117 /* Includes ------------------------------------------------------------------*/
mbed_official 235:685d5f11838f 118 #include "stm32f4xx_hal.h"
mbed_official 235:685d5f11838f 119
mbed_official 235:685d5f11838f 120 /** @addtogroup STM32F4xx_HAL_Driver
mbed_official 235:685d5f11838f 121 * @{
mbed_official 235:685d5f11838f 122 */
mbed_official 235:685d5f11838f 123 /** @defgroup DMA2D
mbed_official 235:685d5f11838f 124 * @brief DMA2D HAL module driver
mbed_official 235:685d5f11838f 125 * @{
mbed_official 235:685d5f11838f 126 */
mbed_official 235:685d5f11838f 127
mbed_official 235:685d5f11838f 128 #ifdef HAL_DMA2D_MODULE_ENABLED
mbed_official 235:685d5f11838f 129
mbed_official 235:685d5f11838f 130 #if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx)
mbed_official 235:685d5f11838f 131
mbed_official 235:685d5f11838f 132 /* Private typedef -----------------------------------------------------------*/
mbed_official 235:685d5f11838f 133 /* Private define ------------------------------------------------------------*/
mbed_official 235:685d5f11838f 134 #define HAL_TIMEOUT_DMA2D_ABORT ((uint32_t)1000) /* 1s */
mbed_official 235:685d5f11838f 135 #define HAL_TIMEOUT_DMA2D_SUSPEND ((uint32_t)1000) /* 1s */
mbed_official 235:685d5f11838f 136 /* Private macro -------------------------------------------------------------*/
mbed_official 235:685d5f11838f 137 /* Private variables ---------------------------------------------------------*/
mbed_official 235:685d5f11838f 138 /* Private function prototypes -----------------------------------------------*/
mbed_official 235:685d5f11838f 139 static void DMA2D_SetConfig(DMA2D_HandleTypeDef *hdma2d, uint32_t pdata, uint32_t DstAddress, uint32_t Width, uint32_t Heigh);
mbed_official 235:685d5f11838f 140
mbed_official 235:685d5f11838f 141 /* Private functions ---------------------------------------------------------*/
mbed_official 235:685d5f11838f 142
mbed_official 235:685d5f11838f 143 /** @defgroup DMA2D_Private_Functions
mbed_official 235:685d5f11838f 144 * @{
mbed_official 235:685d5f11838f 145 */
mbed_official 235:685d5f11838f 146
mbed_official 235:685d5f11838f 147 /** @defgroup DMA2D_Group1 Initialization and Configuration functions
mbed_official 235:685d5f11838f 148 * @brief Initialization and Configuration functions
mbed_official 235:685d5f11838f 149 *
mbed_official 235:685d5f11838f 150 @verbatim
mbed_official 235:685d5f11838f 151 ===============================================================================
mbed_official 235:685d5f11838f 152 ##### Initialization and Configuration functions #####
mbed_official 235:685d5f11838f 153 ===============================================================================
mbed_official 235:685d5f11838f 154 [..] This section provides functions allowing to:
mbed_official 235:685d5f11838f 155 (+) Initialize and configure the DMA2D
mbed_official 235:685d5f11838f 156 (+) De-initialize the DMA2D
mbed_official 235:685d5f11838f 157
mbed_official 235:685d5f11838f 158 @endverbatim
mbed_official 235:685d5f11838f 159 * @{
mbed_official 235:685d5f11838f 160 */
mbed_official 235:685d5f11838f 161
mbed_official 235:685d5f11838f 162 /**
mbed_official 235:685d5f11838f 163 * @brief Initializes the DMA2D according to the specified
mbed_official 235:685d5f11838f 164 * parameters in the DMA2D_InitTypeDef and create the associated handle.
mbed_official 235:685d5f11838f 165 * @param hdma2d: pointer to a DMA2D_HandleTypeDef structure that contains
mbed_official 235:685d5f11838f 166 * the configuration information for the DMA2D.
mbed_official 235:685d5f11838f 167 * @retval HAL status
mbed_official 235:685d5f11838f 168 */
mbed_official 235:685d5f11838f 169 HAL_StatusTypeDef HAL_DMA2D_Init(DMA2D_HandleTypeDef *hdma2d)
mbed_official 235:685d5f11838f 170 {
mbed_official 235:685d5f11838f 171 uint32_t tmp = 0;
mbed_official 235:685d5f11838f 172
mbed_official 235:685d5f11838f 173 /* Check the DMA2D peripheral state */
mbed_official 235:685d5f11838f 174 if(hdma2d == NULL)
mbed_official 235:685d5f11838f 175 {
mbed_official 235:685d5f11838f 176 return HAL_ERROR;
mbed_official 235:685d5f11838f 177 }
mbed_official 235:685d5f11838f 178
mbed_official 235:685d5f11838f 179 /* Check the parameters */
mbed_official 235:685d5f11838f 180 assert_param(IS_DMA2D_ALL_INSTANCE(hdma2d->Instance));
mbed_official 235:685d5f11838f 181 assert_param(IS_DMA2D_MODE(hdma2d->Init.Mode));
mbed_official 235:685d5f11838f 182 assert_param(IS_DMA2D_CMODE(hdma2d->Init.ColorMode));
mbed_official 235:685d5f11838f 183 assert_param(IS_DMA2D_OFFSET(hdma2d->Init.OutputOffset));
mbed_official 235:685d5f11838f 184
mbed_official 235:685d5f11838f 185 if(hdma2d->State == HAL_DMA2D_STATE_RESET)
mbed_official 235:685d5f11838f 186 {
mbed_official 235:685d5f11838f 187 /* Init the low level hardware */
mbed_official 235:685d5f11838f 188 HAL_DMA2D_MspInit(hdma2d);
mbed_official 235:685d5f11838f 189 }
mbed_official 235:685d5f11838f 190
mbed_official 235:685d5f11838f 191 /* Change DMA2D peripheral state */
mbed_official 235:685d5f11838f 192 hdma2d->State = HAL_DMA2D_STATE_BUSY;
mbed_official 235:685d5f11838f 193
mbed_official 235:685d5f11838f 194 /* DMA2D CR register configuration -------------------------------------------*/
mbed_official 235:685d5f11838f 195 /* Get the CR register value */
mbed_official 235:685d5f11838f 196 tmp = hdma2d->Instance->CR;
mbed_official 235:685d5f11838f 197
mbed_official 235:685d5f11838f 198 /* Clear Mode bits */
mbed_official 235:685d5f11838f 199 tmp &= (uint32_t)~DMA2D_CR_MODE;
mbed_official 235:685d5f11838f 200
mbed_official 235:685d5f11838f 201 /* Prepare the value to be wrote to the CR register */
mbed_official 235:685d5f11838f 202 tmp |= hdma2d->Init.Mode;
mbed_official 235:685d5f11838f 203
mbed_official 235:685d5f11838f 204 /* Write to DMA2D CR register */
mbed_official 235:685d5f11838f 205 hdma2d->Instance->CR = tmp;
mbed_official 235:685d5f11838f 206
mbed_official 235:685d5f11838f 207 /* DMA2D OPFCCR register configuration ---------------------------------------*/
mbed_official 235:685d5f11838f 208 /* Get the OPFCCR register value */
mbed_official 235:685d5f11838f 209 tmp = hdma2d->Instance->OPFCCR;
mbed_official 235:685d5f11838f 210
mbed_official 235:685d5f11838f 211 /* Clear Color Mode bits */
mbed_official 235:685d5f11838f 212 tmp &= (uint32_t)~DMA2D_OPFCCR_CM;
mbed_official 235:685d5f11838f 213
mbed_official 235:685d5f11838f 214 /* Prepare the value to be wrote to the OPFCCR register */
mbed_official 235:685d5f11838f 215 tmp |= hdma2d->Init.ColorMode;
mbed_official 235:685d5f11838f 216
mbed_official 235:685d5f11838f 217 /* Write to DMA2D OPFCCR register */
mbed_official 235:685d5f11838f 218 hdma2d->Instance->OPFCCR = tmp;
mbed_official 235:685d5f11838f 219
mbed_official 235:685d5f11838f 220 /* DMA2D OOR register configuration ------------------------------------------*/
mbed_official 235:685d5f11838f 221 /* Get the OOR register value */
mbed_official 235:685d5f11838f 222 tmp = hdma2d->Instance->OOR;
mbed_official 235:685d5f11838f 223
mbed_official 235:685d5f11838f 224 /* Clear Offset bits */
mbed_official 235:685d5f11838f 225 tmp &= (uint32_t)~DMA2D_OOR_LO;
mbed_official 235:685d5f11838f 226
mbed_official 235:685d5f11838f 227 /* Prepare the value to be wrote to the OOR register */
mbed_official 235:685d5f11838f 228 tmp |= hdma2d->Init.OutputOffset;
mbed_official 235:685d5f11838f 229
mbed_official 235:685d5f11838f 230 /* Write to DMA2D OOR register */
mbed_official 235:685d5f11838f 231 hdma2d->Instance->OOR = tmp;
mbed_official 235:685d5f11838f 232
mbed_official 235:685d5f11838f 233 /* Update error code */
mbed_official 235:685d5f11838f 234 hdma2d->ErrorCode = HAL_DMA2D_ERROR_NONE;
mbed_official 235:685d5f11838f 235
mbed_official 235:685d5f11838f 236 /* Initialize the DMA2D state*/
mbed_official 235:685d5f11838f 237 hdma2d->State = HAL_DMA2D_STATE_READY;
mbed_official 235:685d5f11838f 238
mbed_official 235:685d5f11838f 239 return HAL_OK;
mbed_official 235:685d5f11838f 240 }
mbed_official 235:685d5f11838f 241
mbed_official 235:685d5f11838f 242 /**
mbed_official 235:685d5f11838f 243 * @brief Deinitializes the DMA2D peripheral registers to their default reset
mbed_official 235:685d5f11838f 244 * values.
mbed_official 235:685d5f11838f 245 * @param hdma2d: pointer to a DMA2D_HandleTypeDef structure that contains
mbed_official 235:685d5f11838f 246 * the configuration information for the DMA2D.
mbed_official 235:685d5f11838f 247 * @retval None
mbed_official 235:685d5f11838f 248 */
mbed_official 235:685d5f11838f 249
mbed_official 235:685d5f11838f 250 HAL_StatusTypeDef HAL_DMA2D_DeInit(DMA2D_HandleTypeDef *hdma2d)
mbed_official 235:685d5f11838f 251 {
mbed_official 235:685d5f11838f 252 /* Check the DMA2D peripheral state */
mbed_official 235:685d5f11838f 253 if(hdma2d == NULL)
mbed_official 235:685d5f11838f 254 {
mbed_official 235:685d5f11838f 255 return HAL_ERROR;
mbed_official 235:685d5f11838f 256 }
mbed_official 235:685d5f11838f 257
mbed_official 235:685d5f11838f 258 /* DeInit the low level hardware */
mbed_official 235:685d5f11838f 259 HAL_DMA2D_MspDeInit(hdma2d);
mbed_official 235:685d5f11838f 260
mbed_official 235:685d5f11838f 261 /* Update error code */
mbed_official 235:685d5f11838f 262 hdma2d->ErrorCode = HAL_DMA2D_ERROR_NONE;
mbed_official 235:685d5f11838f 263
mbed_official 235:685d5f11838f 264 /* Initialize the DMA2D state*/
mbed_official 235:685d5f11838f 265 hdma2d->State = HAL_DMA2D_STATE_RESET;
mbed_official 235:685d5f11838f 266
mbed_official 235:685d5f11838f 267 /* Release Lock */
mbed_official 235:685d5f11838f 268 __HAL_UNLOCK(hdma2d);
mbed_official 235:685d5f11838f 269
mbed_official 235:685d5f11838f 270 return HAL_OK;
mbed_official 235:685d5f11838f 271 }
mbed_official 235:685d5f11838f 272
mbed_official 235:685d5f11838f 273 /**
mbed_official 235:685d5f11838f 274 * @brief Initializes the DMA2D MSP.
mbed_official 235:685d5f11838f 275 * @param hdma2d: pointer to a DMA2D_HandleTypeDef structure that contains
mbed_official 235:685d5f11838f 276 * the configuration information for the DMA2D.
mbed_official 235:685d5f11838f 277 * @retval None
mbed_official 235:685d5f11838f 278 */
mbed_official 235:685d5f11838f 279 __weak void HAL_DMA2D_MspInit(DMA2D_HandleTypeDef* hdma2d)
mbed_official 235:685d5f11838f 280 {
mbed_official 235:685d5f11838f 281 /* NOTE : This function Should not be modified, when the callback is needed,
mbed_official 235:685d5f11838f 282 the HAL_DMA2D_MspInit could be implemented in the user file
mbed_official 235:685d5f11838f 283 */
mbed_official 235:685d5f11838f 284 }
mbed_official 235:685d5f11838f 285
mbed_official 235:685d5f11838f 286 /**
mbed_official 235:685d5f11838f 287 * @brief DeInitializes the DMA2D MSP.
mbed_official 235:685d5f11838f 288 * @param hdma2d: pointer to a DMA2D_HandleTypeDef structure that contains
mbed_official 235:685d5f11838f 289 * the configuration information for the DMA2D.
mbed_official 235:685d5f11838f 290 * @retval None
mbed_official 235:685d5f11838f 291 */
mbed_official 235:685d5f11838f 292 __weak void HAL_DMA2D_MspDeInit(DMA2D_HandleTypeDef* hdma2d)
mbed_official 235:685d5f11838f 293 {
mbed_official 235:685d5f11838f 294 /* NOTE : This function Should not be modified, when the callback is needed,
mbed_official 235:685d5f11838f 295 the HAL_DMA2D_MspDeInit could be implemented in the user file
mbed_official 235:685d5f11838f 296 */
mbed_official 235:685d5f11838f 297 }
mbed_official 235:685d5f11838f 298
mbed_official 235:685d5f11838f 299 /**
mbed_official 235:685d5f11838f 300 * @}
mbed_official 235:685d5f11838f 301 */
mbed_official 235:685d5f11838f 302
mbed_official 235:685d5f11838f 303 /** @defgroup DMA2D_Group2 IO operation functions
mbed_official 235:685d5f11838f 304 * @brief IO operation functions
mbed_official 235:685d5f11838f 305 *
mbed_official 235:685d5f11838f 306 @verbatim
mbed_official 235:685d5f11838f 307 ===============================================================================
mbed_official 235:685d5f11838f 308 ##### IO operation functions #####
mbed_official 235:685d5f11838f 309 ===============================================================================
mbed_official 235:685d5f11838f 310 [..] This section provides functions allowing to:
mbed_official 235:685d5f11838f 311 (+) Configure the pdata, destination address and data size and
mbed_official 235:685d5f11838f 312 Start DMA2D transfer.
mbed_official 235:685d5f11838f 313 (+) Configure the source for foreground and background, destination address
mbed_official 235:685d5f11838f 314 and data size and Start MultiBuffer DMA2D transfer.
mbed_official 235:685d5f11838f 315 (+) Configure the pdata, destination address and data size and
mbed_official 235:685d5f11838f 316 Start DMA2D transfer with interrupt.
mbed_official 235:685d5f11838f 317 (+) Configure the source for foreground and background, destination address
mbed_official 235:685d5f11838f 318 and data size and Start MultiBuffer DMA2D transfer with interrupt.
mbed_official 235:685d5f11838f 319 (+) Abort DMA2D transfer.
mbed_official 235:685d5f11838f 320 (+) Suspend DMA2D transfer.
mbed_official 235:685d5f11838f 321 (+) Continue DMA2D transfer.
mbed_official 235:685d5f11838f 322 (+) Poll for transfer complete.
mbed_official 235:685d5f11838f 323 (+) handle DMA2D interrupt request.
mbed_official 235:685d5f11838f 324
mbed_official 235:685d5f11838f 325 @endverbatim
mbed_official 235:685d5f11838f 326 * @{
mbed_official 235:685d5f11838f 327 */
mbed_official 235:685d5f11838f 328
mbed_official 235:685d5f11838f 329 /**
mbed_official 235:685d5f11838f 330 * @brief Start the DMA2D Transfer.
mbed_official 235:685d5f11838f 331 * @param hdma2d: pointer to a DMA2D_HandleTypeDef structure that contains
mbed_official 235:685d5f11838f 332 * the configuration information for the DMA2D.
mbed_official 235:685d5f11838f 333 * @param pdata: Configure the source memory Buffer address if
mbed_official 235:685d5f11838f 334 * the memory to memory or memory to memory with pixel format
mbed_official 235:685d5f11838f 335 * conversion DMA2D mode is selected, and configure
mbed_official 235:685d5f11838f 336 * the color value if register to memory DMA2D mode is selected.
mbed_official 235:685d5f11838f 337 * @param DstAddress: The destination memory Buffer address.
mbed_official 235:685d5f11838f 338 * @param Width: The width of data to be transferred from source to destination.
mbed_official 235:685d5f11838f 339 * @param Heigh: The heigh of data to be transferred from source to destination.
mbed_official 235:685d5f11838f 340 * @retval HAL status
mbed_official 235:685d5f11838f 341 */
mbed_official 235:685d5f11838f 342 HAL_StatusTypeDef HAL_DMA2D_Start(DMA2D_HandleTypeDef *hdma2d, uint32_t pdata, uint32_t DstAddress, uint32_t Width, uint32_t Heigh)
mbed_official 235:685d5f11838f 343 {
mbed_official 235:685d5f11838f 344 /* Process locked */
mbed_official 235:685d5f11838f 345 __HAL_LOCK(hdma2d);
mbed_official 235:685d5f11838f 346
mbed_official 235:685d5f11838f 347 /* Change DMA2D peripheral state */
mbed_official 235:685d5f11838f 348 hdma2d->State = HAL_DMA2D_STATE_BUSY;
mbed_official 235:685d5f11838f 349
mbed_official 235:685d5f11838f 350 /* Check the parameters */
mbed_official 235:685d5f11838f 351 assert_param(IS_DMA2D_LINE(Heigh));
mbed_official 235:685d5f11838f 352 assert_param(IS_DMA2D_PIXEL(Width));
mbed_official 235:685d5f11838f 353
mbed_official 235:685d5f11838f 354 /* Disable the Peripheral */
mbed_official 235:685d5f11838f 355 __HAL_DMA2D_DISABLE(hdma2d);
mbed_official 235:685d5f11838f 356
mbed_official 235:685d5f11838f 357 /* Configure the source, destination address and the data size */
mbed_official 235:685d5f11838f 358 DMA2D_SetConfig(hdma2d, pdata, DstAddress, Width, Heigh);
mbed_official 235:685d5f11838f 359
mbed_official 235:685d5f11838f 360 /* Enable the Peripheral */
mbed_official 235:685d5f11838f 361 __HAL_DMA2D_ENABLE(hdma2d);
mbed_official 235:685d5f11838f 362
mbed_official 235:685d5f11838f 363 return HAL_OK;
mbed_official 235:685d5f11838f 364 }
mbed_official 235:685d5f11838f 365
mbed_official 235:685d5f11838f 366 /**
mbed_official 235:685d5f11838f 367 * @brief Start the DMA2D Transfer with interrupt enabled.
mbed_official 235:685d5f11838f 368 * @param hdma2d: pointer to a DMA2D_HandleTypeDef structure that contains
mbed_official 235:685d5f11838f 369 * the configuration information for the DMA2D.
mbed_official 235:685d5f11838f 370 * @param pdata: Configure the source memory Buffer address if
mbed_official 235:685d5f11838f 371 * the memory to memory or memory to memory with pixel format
mbed_official 235:685d5f11838f 372 * conversion DMA2D mode is selected, and configure
mbed_official 235:685d5f11838f 373 * the color value if register to memory DMA2D mode is selected.
mbed_official 235:685d5f11838f 374 * @param DstAddress: The destination memory Buffer address.
mbed_official 235:685d5f11838f 375 * @param Width: The width of data to be transferred from source to destination.
mbed_official 235:685d5f11838f 376 * @param Heigh: The heigh of data to be transferred from source to destination.
mbed_official 235:685d5f11838f 377 * @retval HAL status
mbed_official 235:685d5f11838f 378 */
mbed_official 235:685d5f11838f 379 HAL_StatusTypeDef HAL_DMA2D_Start_IT(DMA2D_HandleTypeDef *hdma2d, uint32_t pdata, uint32_t DstAddress, uint32_t Width, uint32_t Heigh)
mbed_official 235:685d5f11838f 380 {
mbed_official 235:685d5f11838f 381 /* Process locked */
mbed_official 235:685d5f11838f 382 __HAL_LOCK(hdma2d);
mbed_official 235:685d5f11838f 383
mbed_official 235:685d5f11838f 384 /* Change DMA2D peripheral state */
mbed_official 235:685d5f11838f 385 hdma2d->State = HAL_DMA2D_STATE_BUSY;
mbed_official 235:685d5f11838f 386
mbed_official 235:685d5f11838f 387 /* Check the parameters */
mbed_official 235:685d5f11838f 388 assert_param(IS_DMA2D_LINE(Heigh));
mbed_official 235:685d5f11838f 389 assert_param(IS_DMA2D_PIXEL(Width));
mbed_official 235:685d5f11838f 390
mbed_official 235:685d5f11838f 391 /* Disable the Peripheral */
mbed_official 235:685d5f11838f 392 __HAL_DMA2D_DISABLE(hdma2d);
mbed_official 235:685d5f11838f 393
mbed_official 235:685d5f11838f 394 /* Configure the source, destination address and the data size */
mbed_official 235:685d5f11838f 395 DMA2D_SetConfig(hdma2d, pdata, DstAddress, Width, Heigh);
mbed_official 235:685d5f11838f 396
mbed_official 235:685d5f11838f 397 /* Enable the transfer complete interrupt */
mbed_official 235:685d5f11838f 398 __HAL_DMA2D_ENABLE_IT(hdma2d, DMA2D_IT_TC);
mbed_official 235:685d5f11838f 399
mbed_official 235:685d5f11838f 400 /* Enable the transfer Error interrupt */
mbed_official 235:685d5f11838f 401 __HAL_DMA2D_ENABLE_IT(hdma2d, DMA2D_IT_TE);
mbed_official 235:685d5f11838f 402
mbed_official 235:685d5f11838f 403 /* Enable the Peripheral */
mbed_official 235:685d5f11838f 404 __HAL_DMA2D_ENABLE(hdma2d);
mbed_official 235:685d5f11838f 405
mbed_official 235:685d5f11838f 406 /* Enable the configuration error interrupt */
mbed_official 235:685d5f11838f 407 __HAL_DMA2D_ENABLE_IT(hdma2d, DMA2D_IT_CE);
mbed_official 235:685d5f11838f 408
mbed_official 235:685d5f11838f 409 return HAL_OK;
mbed_official 235:685d5f11838f 410 }
mbed_official 235:685d5f11838f 411
mbed_official 235:685d5f11838f 412 /**
mbed_official 235:685d5f11838f 413 * @brief Start the multi-source DMA2D Transfer.
mbed_official 235:685d5f11838f 414 * @param hdma2d: pointer to a DMA2D_HandleTypeDef structure that contains
mbed_official 235:685d5f11838f 415 * the configuration information for the DMA2D.
mbed_official 235:685d5f11838f 416 * @param SrcAddress1: The source memory Buffer address of the foreground layer.
mbed_official 235:685d5f11838f 417 * @param SrcAddress2: The source memory Buffer address of the background layer.
mbed_official 235:685d5f11838f 418 * @param DstAddress: The destination memory Buffer address
mbed_official 235:685d5f11838f 419 * @param Width: The width of data to be transferred from source to destination.
mbed_official 235:685d5f11838f 420 * @param Heigh: The heigh of data to be transferred from source to destination.
mbed_official 235:685d5f11838f 421 * @retval HAL status
mbed_official 235:685d5f11838f 422 */
mbed_official 235:685d5f11838f 423 HAL_StatusTypeDef HAL_DMA2D_BlendingStart(DMA2D_HandleTypeDef *hdma2d, uint32_t SrcAddress1, uint32_t SrcAddress2, uint32_t DstAddress, uint32_t Width, uint32_t Heigh)
mbed_official 235:685d5f11838f 424 {
mbed_official 235:685d5f11838f 425 /* Process locked */
mbed_official 235:685d5f11838f 426 __HAL_LOCK(hdma2d);
mbed_official 235:685d5f11838f 427
mbed_official 235:685d5f11838f 428 /* Change DMA2D peripheral state */
mbed_official 235:685d5f11838f 429 hdma2d->State = HAL_DMA2D_STATE_BUSY;
mbed_official 235:685d5f11838f 430
mbed_official 235:685d5f11838f 431 /* Check the parameters */
mbed_official 235:685d5f11838f 432 assert_param(IS_DMA2D_LINE(Heigh));
mbed_official 235:685d5f11838f 433 assert_param(IS_DMA2D_PIXEL(Width));
mbed_official 235:685d5f11838f 434
mbed_official 235:685d5f11838f 435 /* Disable the Peripheral */
mbed_official 235:685d5f11838f 436 __HAL_DMA2D_DISABLE(hdma2d);
mbed_official 235:685d5f11838f 437
mbed_official 235:685d5f11838f 438 /* Configure DMA2D Stream source2 address */
mbed_official 235:685d5f11838f 439 hdma2d->Instance->BGMAR = SrcAddress2;
mbed_official 235:685d5f11838f 440
mbed_official 235:685d5f11838f 441 /* Configure the source, destination address and the data size */
mbed_official 235:685d5f11838f 442 DMA2D_SetConfig(hdma2d, SrcAddress1, DstAddress, Width, Heigh);
mbed_official 235:685d5f11838f 443
mbed_official 235:685d5f11838f 444 /* Enable the Peripheral */
mbed_official 235:685d5f11838f 445 __HAL_DMA2D_ENABLE(hdma2d);
mbed_official 235:685d5f11838f 446
mbed_official 235:685d5f11838f 447 return HAL_OK;
mbed_official 235:685d5f11838f 448 }
mbed_official 235:685d5f11838f 449
mbed_official 235:685d5f11838f 450 /**
mbed_official 235:685d5f11838f 451 * @brief Start the multi-source DMA2D Transfer with interrupt enabled.
mbed_official 235:685d5f11838f 452 * @param hdma2d: pointer to a DMA2D_HandleTypeDef structure that contains
mbed_official 235:685d5f11838f 453 * the configuration information for the DMA2D.
mbed_official 235:685d5f11838f 454 * @param SrcAddress1: The source memory Buffer address of the foreground layer.
mbed_official 235:685d5f11838f 455 * @param SrcAddress2: The source memory Buffer address of the background layer.
mbed_official 235:685d5f11838f 456 * @param DstAddress: The destination memory Buffer address.
mbed_official 235:685d5f11838f 457 * @param Width: The width of data to be transferred from source to destination.
mbed_official 235:685d5f11838f 458 * @param Heigh: The heigh of data to be transferred from source to destination.
mbed_official 235:685d5f11838f 459 * @retval HAL status
mbed_official 235:685d5f11838f 460 */
mbed_official 235:685d5f11838f 461 HAL_StatusTypeDef HAL_DMA2D_BlendingStart_IT(DMA2D_HandleTypeDef *hdma2d, uint32_t SrcAddress1, uint32_t SrcAddress2, uint32_t DstAddress, uint32_t Width, uint32_t Heigh)
mbed_official 235:685d5f11838f 462 {
mbed_official 235:685d5f11838f 463 /* Process locked */
mbed_official 235:685d5f11838f 464 __HAL_LOCK(hdma2d);
mbed_official 235:685d5f11838f 465
mbed_official 235:685d5f11838f 466 /* Change DMA2D peripheral state */
mbed_official 235:685d5f11838f 467 hdma2d->State = HAL_DMA2D_STATE_BUSY;
mbed_official 235:685d5f11838f 468
mbed_official 235:685d5f11838f 469 /* Check the parameters */
mbed_official 235:685d5f11838f 470 assert_param(IS_DMA2D_LINE(Heigh));
mbed_official 235:685d5f11838f 471 assert_param(IS_DMA2D_PIXEL(Width));
mbed_official 235:685d5f11838f 472
mbed_official 235:685d5f11838f 473 /* Disable the Peripheral */
mbed_official 235:685d5f11838f 474 __HAL_DMA2D_DISABLE(hdma2d);
mbed_official 235:685d5f11838f 475
mbed_official 235:685d5f11838f 476 /* Configure DMA2D Stream source2 address */
mbed_official 235:685d5f11838f 477 hdma2d->Instance->BGMAR = SrcAddress2;
mbed_official 235:685d5f11838f 478
mbed_official 235:685d5f11838f 479 /* Configure the source, destination address and the data size */
mbed_official 235:685d5f11838f 480 DMA2D_SetConfig(hdma2d, SrcAddress1, DstAddress, Width, Heigh);
mbed_official 235:685d5f11838f 481
mbed_official 235:685d5f11838f 482 /* Enable the configuration error interrupt */
mbed_official 235:685d5f11838f 483 __HAL_DMA2D_ENABLE_IT(hdma2d, DMA2D_IT_CE);
mbed_official 235:685d5f11838f 484
mbed_official 235:685d5f11838f 485 /* Enable the transfer complete interrupt */
mbed_official 235:685d5f11838f 486 __HAL_DMA2D_ENABLE_IT(hdma2d, DMA2D_IT_TC);
mbed_official 235:685d5f11838f 487
mbed_official 235:685d5f11838f 488 /* Enable the transfer Error interrupt */
mbed_official 235:685d5f11838f 489 __HAL_DMA2D_ENABLE_IT(hdma2d, DMA2D_IT_TE);
mbed_official 235:685d5f11838f 490
mbed_official 235:685d5f11838f 491 /* Enable the Peripheral */
mbed_official 235:685d5f11838f 492 __HAL_DMA2D_ENABLE(hdma2d);
mbed_official 235:685d5f11838f 493
mbed_official 235:685d5f11838f 494 return HAL_OK;
mbed_official 235:685d5f11838f 495 }
mbed_official 235:685d5f11838f 496
mbed_official 235:685d5f11838f 497 /**
mbed_official 235:685d5f11838f 498 * @brief Abort the DMA2D Transfer.
mbed_official 235:685d5f11838f 499 * @param hdma2d : pointer to a DMA2D_HandleTypeDef structure that contains
mbed_official 235:685d5f11838f 500 * the configuration information for the DMA2D.
mbed_official 235:685d5f11838f 501 * @retval HAL status
mbed_official 235:685d5f11838f 502 */
mbed_official 235:685d5f11838f 503 HAL_StatusTypeDef HAL_DMA2D_Abort(DMA2D_HandleTypeDef *hdma2d)
mbed_official 235:685d5f11838f 504 {
mbed_official 235:685d5f11838f 505 uint32_t tickstart = 0;
mbed_official 235:685d5f11838f 506
mbed_official 235:685d5f11838f 507 /* Disable the DMA2D */
mbed_official 235:685d5f11838f 508 __HAL_DMA2D_DISABLE(hdma2d);
mbed_official 235:685d5f11838f 509
mbed_official 235:685d5f11838f 510 /* Get tick */
mbed_official 235:685d5f11838f 511 tickstart = HAL_GetTick();
mbed_official 235:685d5f11838f 512
mbed_official 235:685d5f11838f 513 /* Check if the DMA2D is effectively disabled */
mbed_official 235:685d5f11838f 514 while((hdma2d->Instance->CR & DMA2D_CR_START) != 0)
mbed_official 235:685d5f11838f 515 {
mbed_official 235:685d5f11838f 516 if((HAL_GetTick() - tickstart ) > HAL_TIMEOUT_DMA2D_ABORT)
mbed_official 235:685d5f11838f 517 {
mbed_official 235:685d5f11838f 518 /* Update error code */
mbed_official 235:685d5f11838f 519 hdma2d->ErrorCode |= HAL_DMA2D_ERROR_TIMEOUT;
mbed_official 235:685d5f11838f 520
mbed_official 235:685d5f11838f 521 /* Change the DMA2D state */
mbed_official 235:685d5f11838f 522 hdma2d->State= HAL_DMA2D_STATE_TIMEOUT;
mbed_official 235:685d5f11838f 523
mbed_official 235:685d5f11838f 524 /* Process Unlocked */
mbed_official 235:685d5f11838f 525 __HAL_UNLOCK(hdma2d);
mbed_official 235:685d5f11838f 526
mbed_official 235:685d5f11838f 527 return HAL_TIMEOUT;
mbed_official 235:685d5f11838f 528 }
mbed_official 235:685d5f11838f 529 }
mbed_official 235:685d5f11838f 530 /* Process Unlocked */
mbed_official 235:685d5f11838f 531 __HAL_UNLOCK(hdma2d);
mbed_official 235:685d5f11838f 532
mbed_official 235:685d5f11838f 533 /* Change the DMA2D state*/
mbed_official 235:685d5f11838f 534 hdma2d->State = HAL_DMA2D_STATE_READY;
mbed_official 235:685d5f11838f 535
mbed_official 235:685d5f11838f 536 return HAL_OK;
mbed_official 235:685d5f11838f 537 }
mbed_official 235:685d5f11838f 538
mbed_official 235:685d5f11838f 539 /**
mbed_official 235:685d5f11838f 540 * @brief Suspend the DMA2D Transfer.
mbed_official 235:685d5f11838f 541 * @param hdma2d: pointer to a DMA2D_HandleTypeDef structure that contains
mbed_official 235:685d5f11838f 542 * the configuration information for the DMA2D.
mbed_official 235:685d5f11838f 543 * @retval HAL status
mbed_official 235:685d5f11838f 544 */
mbed_official 235:685d5f11838f 545 HAL_StatusTypeDef HAL_DMA2D_Suspend(DMA2D_HandleTypeDef *hdma2d)
mbed_official 235:685d5f11838f 546 {
mbed_official 235:685d5f11838f 547 uint32_t tickstart = 0;
mbed_official 235:685d5f11838f 548
mbed_official 235:685d5f11838f 549 /* Suspend the DMA2D transfer */
mbed_official 235:685d5f11838f 550 hdma2d->Instance->CR |= DMA2D_CR_SUSP;
mbed_official 235:685d5f11838f 551
mbed_official 235:685d5f11838f 552 /* Get tick */
mbed_official 235:685d5f11838f 553 tickstart = HAL_GetTick();
mbed_official 235:685d5f11838f 554
mbed_official 235:685d5f11838f 555 /* Check if the DMA2D is effectively suspended */
mbed_official 235:685d5f11838f 556 while((hdma2d->Instance->CR & DMA2D_CR_SUSP) != DMA2D_CR_SUSP)
mbed_official 235:685d5f11838f 557 {
mbed_official 235:685d5f11838f 558 if((HAL_GetTick() - tickstart ) > HAL_TIMEOUT_DMA2D_SUSPEND)
mbed_official 235:685d5f11838f 559 {
mbed_official 235:685d5f11838f 560 /* Update error code */
mbed_official 235:685d5f11838f 561 hdma2d->ErrorCode |= HAL_DMA2D_ERROR_TIMEOUT;
mbed_official 235:685d5f11838f 562
mbed_official 235:685d5f11838f 563 /* Change the DMA2D state */
mbed_official 235:685d5f11838f 564 hdma2d->State= HAL_DMA2D_STATE_TIMEOUT;
mbed_official 235:685d5f11838f 565
mbed_official 235:685d5f11838f 566 return HAL_TIMEOUT;
mbed_official 235:685d5f11838f 567 }
mbed_official 235:685d5f11838f 568 }
mbed_official 235:685d5f11838f 569 /* Change the DMA2D state*/
mbed_official 235:685d5f11838f 570 hdma2d->State = HAL_DMA2D_STATE_SUSPEND;
mbed_official 235:685d5f11838f 571
mbed_official 235:685d5f11838f 572 return HAL_OK;
mbed_official 235:685d5f11838f 573 }
mbed_official 235:685d5f11838f 574
mbed_official 235:685d5f11838f 575 /**
mbed_official 235:685d5f11838f 576 * @brief Resume the DMA2D Transfer.
mbed_official 235:685d5f11838f 577 * @param hdma2d: pointer to a DMA2D_HandleTypeDef structure that contains
mbed_official 235:685d5f11838f 578 * the configuration information for the DMA2D.
mbed_official 235:685d5f11838f 579 * @retval HAL status
mbed_official 235:685d5f11838f 580 */
mbed_official 235:685d5f11838f 581 HAL_StatusTypeDef HAL_DMA2D_Resume(DMA2D_HandleTypeDef *hdma2d)
mbed_official 235:685d5f11838f 582 {
mbed_official 235:685d5f11838f 583 /* Resume the DMA2D transfer */
mbed_official 235:685d5f11838f 584 hdma2d->Instance->CR &= ~DMA2D_CR_SUSP;
mbed_official 235:685d5f11838f 585
mbed_official 235:685d5f11838f 586 /* Change the DMA2D state*/
mbed_official 235:685d5f11838f 587 hdma2d->State = HAL_DMA2D_STATE_BUSY;
mbed_official 235:685d5f11838f 588
mbed_official 235:685d5f11838f 589 return HAL_OK;
mbed_official 235:685d5f11838f 590 }
mbed_official 235:685d5f11838f 591
mbed_official 235:685d5f11838f 592 /**
mbed_official 235:685d5f11838f 593 * @brief Polling for transfer complete or CLUT loading.
mbed_official 235:685d5f11838f 594 * @param hdma2d: pointer to a DMA2D_HandleTypeDef structure that contains
mbed_official 235:685d5f11838f 595 * the configuration information for the DMA2D.
mbed_official 235:685d5f11838f 596 * @param Timeout: Timeout duration
mbed_official 235:685d5f11838f 597 * @retval HAL status
mbed_official 235:685d5f11838f 598 */
mbed_official 235:685d5f11838f 599 HAL_StatusTypeDef HAL_DMA2D_PollForTransfer(DMA2D_HandleTypeDef *hdma2d, uint32_t Timeout)
mbed_official 235:685d5f11838f 600 {
mbed_official 235:685d5f11838f 601 uint32_t tmp, tmp1;
mbed_official 235:685d5f11838f 602 uint32_t tickstart = 0;
mbed_official 235:685d5f11838f 603
mbed_official 235:685d5f11838f 604 /* Polling for DMA2D transfer */
mbed_official 235:685d5f11838f 605 if((hdma2d->Instance->CR & DMA2D_CR_START) != 0)
mbed_official 235:685d5f11838f 606 {
mbed_official 235:685d5f11838f 607 /* Get tick */
mbed_official 235:685d5f11838f 608 tickstart = HAL_GetTick();
mbed_official 235:685d5f11838f 609
mbed_official 235:685d5f11838f 610 while(__HAL_DMA2D_GET_FLAG(hdma2d, DMA2D_FLAG_TC) == RESET)
mbed_official 235:685d5f11838f 611 {
mbed_official 235:685d5f11838f 612 tmp = __HAL_DMA2D_GET_FLAG(hdma2d, DMA2D_FLAG_CE);
mbed_official 235:685d5f11838f 613 tmp1 = __HAL_DMA2D_GET_FLAG(hdma2d, DMA2D_FLAG_TE);
mbed_official 235:685d5f11838f 614
mbed_official 235:685d5f11838f 615 if((tmp != RESET) || (tmp1 != RESET))
mbed_official 235:685d5f11838f 616 {
mbed_official 235:685d5f11838f 617 /* Clear the transfer and configuration error flags */
mbed_official 235:685d5f11838f 618 __HAL_DMA2D_CLEAR_FLAG(hdma2d, DMA2D_FLAG_CE);
mbed_official 235:685d5f11838f 619 __HAL_DMA2D_CLEAR_FLAG(hdma2d, DMA2D_FLAG_TE);
mbed_official 235:685d5f11838f 620
mbed_official 235:685d5f11838f 621 /* Change DMA2D state */
mbed_official 235:685d5f11838f 622 hdma2d->State= HAL_DMA2D_STATE_ERROR;
mbed_official 235:685d5f11838f 623
mbed_official 235:685d5f11838f 624 /* Process unlocked */
mbed_official 235:685d5f11838f 625 __HAL_UNLOCK(hdma2d);
mbed_official 235:685d5f11838f 626
mbed_official 235:685d5f11838f 627 return HAL_ERROR;
mbed_official 235:685d5f11838f 628 }
mbed_official 235:685d5f11838f 629 /* Check for the Timeout */
mbed_official 235:685d5f11838f 630 if(Timeout != HAL_MAX_DELAY)
mbed_official 235:685d5f11838f 631 {
mbed_official 235:685d5f11838f 632 if((Timeout == 0)||((HAL_GetTick() - tickstart ) > Timeout))
mbed_official 235:685d5f11838f 633 {
mbed_official 235:685d5f11838f 634 /* Process unlocked */
mbed_official 235:685d5f11838f 635 __HAL_UNLOCK(hdma2d);
mbed_official 235:685d5f11838f 636
mbed_official 235:685d5f11838f 637 /* Update error code */
mbed_official 235:685d5f11838f 638 hdma2d->ErrorCode |= HAL_DMA2D_ERROR_TIMEOUT;
mbed_official 235:685d5f11838f 639
mbed_official 235:685d5f11838f 640 /* Change the DMA2D state */
mbed_official 235:685d5f11838f 641 hdma2d->State= HAL_DMA2D_STATE_TIMEOUT;
mbed_official 235:685d5f11838f 642
mbed_official 235:685d5f11838f 643 return HAL_TIMEOUT;
mbed_official 235:685d5f11838f 644 }
mbed_official 235:685d5f11838f 645 }
mbed_official 235:685d5f11838f 646 }
mbed_official 235:685d5f11838f 647 }
mbed_official 235:685d5f11838f 648 /* Polling for CLUT loading */
mbed_official 235:685d5f11838f 649 if((hdma2d->Instance->FGPFCCR & DMA2D_FGPFCCR_START) != 0)
mbed_official 235:685d5f11838f 650 {
mbed_official 235:685d5f11838f 651 /* Get tick */
mbed_official 235:685d5f11838f 652 tickstart = HAL_GetTick();
mbed_official 235:685d5f11838f 653
mbed_official 235:685d5f11838f 654 while(__HAL_DMA2D_GET_FLAG(hdma2d, DMA2D_FLAG_CTC) == RESET)
mbed_official 235:685d5f11838f 655 {
mbed_official 235:685d5f11838f 656 if((__HAL_DMA2D_GET_FLAG(hdma2d, DMA2D_FLAG_CAE) != RESET))
mbed_official 235:685d5f11838f 657 {
mbed_official 235:685d5f11838f 658 /* Clear the transfer and configuration error flags */
mbed_official 235:685d5f11838f 659 __HAL_DMA2D_CLEAR_FLAG(hdma2d, DMA2D_FLAG_CAE);
mbed_official 235:685d5f11838f 660
mbed_official 235:685d5f11838f 661 /* Change DMA2D state */
mbed_official 235:685d5f11838f 662 hdma2d->State= HAL_DMA2D_STATE_ERROR;
mbed_official 235:685d5f11838f 663
mbed_official 235:685d5f11838f 664 return HAL_ERROR;
mbed_official 235:685d5f11838f 665 }
mbed_official 235:685d5f11838f 666 /* Check for the Timeout */
mbed_official 235:685d5f11838f 667 if(Timeout != HAL_MAX_DELAY)
mbed_official 235:685d5f11838f 668 {
mbed_official 235:685d5f11838f 669 if((Timeout == 0)||((HAL_GetTick() - tickstart ) > Timeout))
mbed_official 235:685d5f11838f 670 {
mbed_official 235:685d5f11838f 671 /* Update error code */
mbed_official 235:685d5f11838f 672 hdma2d->ErrorCode |= HAL_DMA2D_ERROR_TIMEOUT;
mbed_official 235:685d5f11838f 673
mbed_official 235:685d5f11838f 674 /* Change the DMA2D state */
mbed_official 235:685d5f11838f 675 hdma2d->State= HAL_DMA2D_STATE_TIMEOUT;
mbed_official 235:685d5f11838f 676
mbed_official 235:685d5f11838f 677 return HAL_TIMEOUT;
mbed_official 235:685d5f11838f 678 }
mbed_official 235:685d5f11838f 679 }
mbed_official 235:685d5f11838f 680 }
mbed_official 235:685d5f11838f 681 }
mbed_official 235:685d5f11838f 682 /* Clear the transfer complete flag */
mbed_official 235:685d5f11838f 683 __HAL_DMA2D_CLEAR_FLAG(hdma2d, DMA2D_FLAG_TC);
mbed_official 235:685d5f11838f 684
mbed_official 235:685d5f11838f 685 /* Clear the CLUT loading flag */
mbed_official 235:685d5f11838f 686 __HAL_DMA2D_CLEAR_FLAG(hdma2d, DMA2D_FLAG_CTC);
mbed_official 235:685d5f11838f 687
mbed_official 235:685d5f11838f 688 /* Change DMA2D state */
mbed_official 235:685d5f11838f 689 hdma2d->State = HAL_DMA2D_STATE_READY;
mbed_official 235:685d5f11838f 690
mbed_official 235:685d5f11838f 691 /* Process unlocked */
mbed_official 235:685d5f11838f 692 __HAL_UNLOCK(hdma2d);
mbed_official 235:685d5f11838f 693
mbed_official 235:685d5f11838f 694 return HAL_OK;
mbed_official 235:685d5f11838f 695 }
mbed_official 235:685d5f11838f 696 /**
mbed_official 235:685d5f11838f 697 * @brief Handles DMA2D interrupt request.
mbed_official 235:685d5f11838f 698 * @param hdma2d: pointer to a DMA2D_HandleTypeDef structure that contains
mbed_official 235:685d5f11838f 699 * the configuration information for the DMA2D.
mbed_official 235:685d5f11838f 700 * @retval HAL status
mbed_official 235:685d5f11838f 701 */
mbed_official 235:685d5f11838f 702 void HAL_DMA2D_IRQHandler(DMA2D_HandleTypeDef *hdma2d)
mbed_official 235:685d5f11838f 703 {
mbed_official 235:685d5f11838f 704 /* Transfer Error Interrupt management ***************************************/
mbed_official 235:685d5f11838f 705 if(__HAL_DMA2D_GET_FLAG(hdma2d, DMA2D_FLAG_TE) != RESET)
mbed_official 235:685d5f11838f 706 {
mbed_official 235:685d5f11838f 707 if(__HAL_DMA2D_GET_IT_SOURCE(hdma2d, DMA2D_IT_TE) != RESET)
mbed_official 235:685d5f11838f 708 {
mbed_official 235:685d5f11838f 709 /* Disable the transfer Error interrupt */
mbed_official 235:685d5f11838f 710 __HAL_DMA2D_DISABLE_IT(hdma2d, DMA2D_IT_TE);
mbed_official 235:685d5f11838f 711
mbed_official 235:685d5f11838f 712 /* Update error code */
mbed_official 235:685d5f11838f 713 hdma2d->ErrorCode |= HAL_DMA2D_ERROR_TE;
mbed_official 235:685d5f11838f 714
mbed_official 235:685d5f11838f 715 /* Clear the transfer error flag */
mbed_official 235:685d5f11838f 716 __HAL_DMA2D_CLEAR_FLAG(hdma2d, DMA2D_FLAG_TE);
mbed_official 235:685d5f11838f 717
mbed_official 235:685d5f11838f 718 /* Change DMA2D state */
mbed_official 235:685d5f11838f 719 hdma2d->State = HAL_DMA2D_STATE_ERROR;
mbed_official 235:685d5f11838f 720
mbed_official 235:685d5f11838f 721 /* Process Unlocked */
mbed_official 235:685d5f11838f 722 __HAL_UNLOCK(hdma2d);
mbed_official 235:685d5f11838f 723
mbed_official 235:685d5f11838f 724 if(hdma2d->XferErrorCallback != NULL)
mbed_official 235:685d5f11838f 725 {
mbed_official 235:685d5f11838f 726 /* Transfer error Callback */
mbed_official 235:685d5f11838f 727 hdma2d->XferErrorCallback(hdma2d);
mbed_official 235:685d5f11838f 728 }
mbed_official 235:685d5f11838f 729 }
mbed_official 235:685d5f11838f 730 }
mbed_official 235:685d5f11838f 731 /* Configuration Error Interrupt management **********************************/
mbed_official 235:685d5f11838f 732 if(__HAL_DMA2D_GET_FLAG(hdma2d, DMA2D_FLAG_CE) != RESET)
mbed_official 235:685d5f11838f 733 {
mbed_official 235:685d5f11838f 734 if(__HAL_DMA2D_GET_IT_SOURCE(hdma2d, DMA2D_IT_CE) != RESET)
mbed_official 235:685d5f11838f 735 {
mbed_official 235:685d5f11838f 736 /* Disable the Configuration Error interrupt */
mbed_official 235:685d5f11838f 737 __HAL_DMA2D_DISABLE_IT(hdma2d, DMA2D_IT_CE);
mbed_official 235:685d5f11838f 738
mbed_official 235:685d5f11838f 739 /* Clear the Configuration error flag */
mbed_official 235:685d5f11838f 740 __HAL_DMA2D_CLEAR_FLAG(hdma2d, DMA2D_FLAG_CE);
mbed_official 235:685d5f11838f 741
mbed_official 235:685d5f11838f 742 /* Update error code */
mbed_official 235:685d5f11838f 743 hdma2d->ErrorCode |= HAL_DMA2D_ERROR_CE;
mbed_official 235:685d5f11838f 744
mbed_official 235:685d5f11838f 745 /* Change DMA2D state */
mbed_official 235:685d5f11838f 746 hdma2d->State = HAL_DMA2D_STATE_ERROR;
mbed_official 235:685d5f11838f 747
mbed_official 235:685d5f11838f 748 /* Process Unlocked */
mbed_official 235:685d5f11838f 749 __HAL_UNLOCK(hdma2d);
mbed_official 235:685d5f11838f 750
mbed_official 235:685d5f11838f 751 if(hdma2d->XferErrorCallback != NULL)
mbed_official 235:685d5f11838f 752 {
mbed_official 235:685d5f11838f 753 /* Transfer error Callback */
mbed_official 235:685d5f11838f 754 hdma2d->XferErrorCallback(hdma2d);
mbed_official 235:685d5f11838f 755 }
mbed_official 235:685d5f11838f 756 }
mbed_official 235:685d5f11838f 757 }
mbed_official 235:685d5f11838f 758 /* Transfer Complete Interrupt management ************************************/
mbed_official 235:685d5f11838f 759 if(__HAL_DMA2D_GET_FLAG(hdma2d, DMA2D_FLAG_TC) != RESET)
mbed_official 235:685d5f11838f 760 {
mbed_official 235:685d5f11838f 761 if(__HAL_DMA2D_GET_IT_SOURCE(hdma2d, DMA2D_IT_TC) != RESET)
mbed_official 235:685d5f11838f 762 {
mbed_official 235:685d5f11838f 763 /* Disable the transfer complete interrupt */
mbed_official 235:685d5f11838f 764 __HAL_DMA2D_DISABLE_IT(hdma2d, DMA2D_IT_TC);
mbed_official 235:685d5f11838f 765
mbed_official 235:685d5f11838f 766 /* Clear the transfer complete flag */
mbed_official 235:685d5f11838f 767 __HAL_DMA2D_CLEAR_FLAG(hdma2d, DMA2D_FLAG_TC);
mbed_official 235:685d5f11838f 768
mbed_official 235:685d5f11838f 769 /* Update error code */
mbed_official 235:685d5f11838f 770 hdma2d->ErrorCode |= HAL_DMA2D_ERROR_NONE;
mbed_official 235:685d5f11838f 771
mbed_official 235:685d5f11838f 772 /* Change DMA2D state */
mbed_official 235:685d5f11838f 773 hdma2d->State = HAL_DMA2D_STATE_READY;
mbed_official 235:685d5f11838f 774
mbed_official 235:685d5f11838f 775 /* Process Unlocked */
mbed_official 235:685d5f11838f 776 __HAL_UNLOCK(hdma2d);
mbed_official 235:685d5f11838f 777
mbed_official 235:685d5f11838f 778 if(hdma2d->XferCpltCallback != NULL)
mbed_official 235:685d5f11838f 779 {
mbed_official 235:685d5f11838f 780 /* Transfer complete Callback */
mbed_official 235:685d5f11838f 781 hdma2d->XferCpltCallback(hdma2d);
mbed_official 235:685d5f11838f 782 }
mbed_official 235:685d5f11838f 783 }
mbed_official 235:685d5f11838f 784 }
mbed_official 235:685d5f11838f 785 }
mbed_official 235:685d5f11838f 786
mbed_official 235:685d5f11838f 787 /**
mbed_official 235:685d5f11838f 788 * @}
mbed_official 235:685d5f11838f 789 */
mbed_official 235:685d5f11838f 790
mbed_official 235:685d5f11838f 791 /** @defgroup DMA2D_Group3 Peripheral Control functions
mbed_official 235:685d5f11838f 792 * @brief Peripheral Control functions
mbed_official 235:685d5f11838f 793 *
mbed_official 235:685d5f11838f 794 @verbatim
mbed_official 235:685d5f11838f 795 ===============================================================================
mbed_official 235:685d5f11838f 796 ##### Peripheral Control functions #####
mbed_official 235:685d5f11838f 797 ===============================================================================
mbed_official 235:685d5f11838f 798 [..] This section provides functions allowing to:
mbed_official 235:685d5f11838f 799 (+) Configure the DMA2D foreground or/and background parameters.
mbed_official 235:685d5f11838f 800 (+) Configure the DMA2D CLUT transfer.
mbed_official 235:685d5f11838f 801 (+) Enable DMA2D CLUT.
mbed_official 235:685d5f11838f 802 (+) Disable DMA2D CLUT.
mbed_official 235:685d5f11838f 803 (+) Configure the line watermark
mbed_official 235:685d5f11838f 804
mbed_official 235:685d5f11838f 805 @endverbatim
mbed_official 235:685d5f11838f 806 * @{
mbed_official 235:685d5f11838f 807 */
mbed_official 235:685d5f11838f 808 /**
mbed_official 235:685d5f11838f 809 * @brief Configure the DMA2D Layer according to the specified
mbed_official 235:685d5f11838f 810 * parameters in the DMA2D_InitTypeDef and create the associated handle.
mbed_official 235:685d5f11838f 811 * @param hdma2d: pointer to a DMA2D_HandleTypeDef structure that contains
mbed_official 235:685d5f11838f 812 * the configuration information for the DMA2D.
mbed_official 235:685d5f11838f 813 * @param LayerIdx: DMA2D Layer index.
mbed_official 235:685d5f11838f 814 * This parameter can be one of the following values:
mbed_official 235:685d5f11838f 815 * 0(background) / 1(foreground)
mbed_official 235:685d5f11838f 816 * @retval HAL status
mbed_official 235:685d5f11838f 817 */
mbed_official 235:685d5f11838f 818 HAL_StatusTypeDef HAL_DMA2D_ConfigLayer(DMA2D_HandleTypeDef *hdma2d, uint32_t LayerIdx)
mbed_official 235:685d5f11838f 819 {
mbed_official 235:685d5f11838f 820 DMA2D_LayerCfgTypeDef *pLayerCfg = &hdma2d->LayerCfg[LayerIdx];
mbed_official 235:685d5f11838f 821
mbed_official 235:685d5f11838f 822 uint32_t tmp = 0;
mbed_official 235:685d5f11838f 823
mbed_official 235:685d5f11838f 824 /* Process locked */
mbed_official 235:685d5f11838f 825 __HAL_LOCK(hdma2d);
mbed_official 235:685d5f11838f 826
mbed_official 235:685d5f11838f 827 /* Change DMA2D peripheral state */
mbed_official 235:685d5f11838f 828 hdma2d->State = HAL_DMA2D_STATE_BUSY;
mbed_official 235:685d5f11838f 829
mbed_official 235:685d5f11838f 830 /* Check the parameters */
mbed_official 235:685d5f11838f 831 assert_param(IS_DMA2D_LAYER(LayerIdx));
mbed_official 235:685d5f11838f 832 assert_param(IS_DMA2D_OFFSET(pLayerCfg->InputOffset));
mbed_official 235:685d5f11838f 833 if(hdma2d->Init.Mode != DMA2D_R2M)
mbed_official 235:685d5f11838f 834 {
mbed_official 235:685d5f11838f 835 assert_param(IS_DMA2D_INPUT_COLOR_MODE(pLayerCfg->InputColorMode));
mbed_official 235:685d5f11838f 836 if(hdma2d->Init.Mode != DMA2D_M2M)
mbed_official 235:685d5f11838f 837 {
mbed_official 235:685d5f11838f 838 assert_param(IS_DMA2D_ALPHA_MODE(pLayerCfg->AlphaMode));
mbed_official 235:685d5f11838f 839 }
mbed_official 235:685d5f11838f 840 }
mbed_official 235:685d5f11838f 841
mbed_official 235:685d5f11838f 842 /* Configure the background DMA2D layer */
mbed_official 235:685d5f11838f 843 if(LayerIdx == 0)
mbed_official 235:685d5f11838f 844 {
mbed_official 235:685d5f11838f 845 /* DMA2D BGPFCR register configuration -----------------------------------*/
mbed_official 235:685d5f11838f 846 /* Get the BGPFCCR register value */
mbed_official 235:685d5f11838f 847 tmp = hdma2d->Instance->BGPFCCR;
mbed_official 235:685d5f11838f 848
mbed_official 235:685d5f11838f 849 /* Clear Input color mode, alpha value and alpha mode bits */
mbed_official 235:685d5f11838f 850 tmp &= (uint32_t)~(DMA2D_BGPFCCR_CM | DMA2D_BGPFCCR_AM | DMA2D_BGPFCCR_ALPHA);
mbed_official 235:685d5f11838f 851
mbed_official 235:685d5f11838f 852 if ((pLayerCfg->InputColorMode == CM_A4) || (pLayerCfg->InputColorMode == CM_A8))
mbed_official 235:685d5f11838f 853 {
mbed_official 235:685d5f11838f 854 /* Prepare the value to be wrote to the BGPFCCR register */
mbed_official 235:685d5f11838f 855 tmp |= (pLayerCfg->InputColorMode | (pLayerCfg->AlphaMode << 16) | ((pLayerCfg->InputAlpha) & 0xFF000000));
mbed_official 235:685d5f11838f 856 }
mbed_official 235:685d5f11838f 857 else
mbed_official 235:685d5f11838f 858 {
mbed_official 235:685d5f11838f 859 /* Prepare the value to be wrote to the BGPFCCR register */
mbed_official 235:685d5f11838f 860 tmp |= (pLayerCfg->InputColorMode | (pLayerCfg->AlphaMode << 16) | (pLayerCfg->InputAlpha << 24));
mbed_official 235:685d5f11838f 861 }
mbed_official 235:685d5f11838f 862
mbed_official 235:685d5f11838f 863 /* Write to DMA2D BGPFCCR register */
mbed_official 235:685d5f11838f 864 hdma2d->Instance->BGPFCCR = tmp;
mbed_official 235:685d5f11838f 865
mbed_official 235:685d5f11838f 866 /* DMA2D BGOR register configuration -------------------------------------*/
mbed_official 235:685d5f11838f 867 /* Get the BGOR register value */
mbed_official 235:685d5f11838f 868 tmp = hdma2d->Instance->BGOR;
mbed_official 235:685d5f11838f 869
mbed_official 235:685d5f11838f 870 /* Clear colors bits */
mbed_official 235:685d5f11838f 871 tmp &= (uint32_t)~DMA2D_BGOR_LO;
mbed_official 235:685d5f11838f 872
mbed_official 235:685d5f11838f 873 /* Prepare the value to be wrote to the BGOR register */
mbed_official 235:685d5f11838f 874 tmp |= pLayerCfg->InputOffset;
mbed_official 235:685d5f11838f 875
mbed_official 235:685d5f11838f 876 /* Write to DMA2D BGOR register */
mbed_official 235:685d5f11838f 877 hdma2d->Instance->BGOR = tmp;
mbed_official 235:685d5f11838f 878
mbed_official 235:685d5f11838f 879 if ((pLayerCfg->InputColorMode == CM_A4) || (pLayerCfg->InputColorMode == CM_A8))
mbed_official 235:685d5f11838f 880 {
mbed_official 235:685d5f11838f 881 /* Prepare the value to be wrote to the BGCOLR register */
mbed_official 235:685d5f11838f 882 tmp |= ((pLayerCfg->InputAlpha) & 0x00FFFFFF);
mbed_official 235:685d5f11838f 883
mbed_official 235:685d5f11838f 884 /* Write to DMA2D BGCOLR register */
mbed_official 235:685d5f11838f 885 hdma2d->Instance->BGCOLR = tmp;
mbed_official 235:685d5f11838f 886 }
mbed_official 235:685d5f11838f 887 }
mbed_official 235:685d5f11838f 888 /* Configure the foreground DMA2D layer */
mbed_official 235:685d5f11838f 889 else
mbed_official 235:685d5f11838f 890 {
mbed_official 235:685d5f11838f 891 /* DMA2D FGPFCR register configuration -----------------------------------*/
mbed_official 235:685d5f11838f 892 /* Get the FGPFCCR register value */
mbed_official 235:685d5f11838f 893 tmp = hdma2d->Instance->FGPFCCR;
mbed_official 235:685d5f11838f 894
mbed_official 235:685d5f11838f 895 /* Clear Input color mode, alpha value and alpha mode bits */
mbed_official 235:685d5f11838f 896 tmp &= (uint32_t)~(DMA2D_FGPFCCR_CM | DMA2D_FGPFCCR_AM | DMA2D_FGPFCCR_ALPHA);
mbed_official 235:685d5f11838f 897
mbed_official 235:685d5f11838f 898 if ((pLayerCfg->InputColorMode == CM_A4) || (pLayerCfg->InputColorMode == CM_A8))
mbed_official 235:685d5f11838f 899 {
mbed_official 235:685d5f11838f 900 /* Prepare the value to be wrote to the FGPFCCR register */
mbed_official 235:685d5f11838f 901 tmp |= (pLayerCfg->InputColorMode | (pLayerCfg->AlphaMode << 16) | ((pLayerCfg->InputAlpha) & 0xFF000000));
mbed_official 235:685d5f11838f 902 }
mbed_official 235:685d5f11838f 903 else
mbed_official 235:685d5f11838f 904 {
mbed_official 235:685d5f11838f 905 /* Prepare the value to be wrote to the FGPFCCR register */
mbed_official 235:685d5f11838f 906 tmp |= (pLayerCfg->InputColorMode | (pLayerCfg->AlphaMode << 16) | (pLayerCfg->InputAlpha << 24));
mbed_official 235:685d5f11838f 907 }
mbed_official 235:685d5f11838f 908
mbed_official 235:685d5f11838f 909 /* Write to DMA2D FGPFCCR register */
mbed_official 235:685d5f11838f 910 hdma2d->Instance->FGPFCCR = tmp;
mbed_official 235:685d5f11838f 911
mbed_official 235:685d5f11838f 912 /* DMA2D FGOR register configuration -------------------------------------*/
mbed_official 235:685d5f11838f 913 /* Get the FGOR register value */
mbed_official 235:685d5f11838f 914 tmp = hdma2d->Instance->FGOR;
mbed_official 235:685d5f11838f 915
mbed_official 235:685d5f11838f 916 /* Clear colors bits */
mbed_official 235:685d5f11838f 917 tmp &= (uint32_t)~DMA2D_FGOR_LO;
mbed_official 235:685d5f11838f 918
mbed_official 235:685d5f11838f 919 /* Prepare the value to be wrote to the FGOR register */
mbed_official 235:685d5f11838f 920 tmp |= pLayerCfg->InputOffset;
mbed_official 235:685d5f11838f 921
mbed_official 235:685d5f11838f 922 /* Write to DMA2D FGOR register */
mbed_official 235:685d5f11838f 923 hdma2d->Instance->FGOR = tmp;
mbed_official 235:685d5f11838f 924
mbed_official 235:685d5f11838f 925 if ((pLayerCfg->InputColorMode == CM_A4) || (pLayerCfg->InputColorMode == CM_A8))
mbed_official 235:685d5f11838f 926 {
mbed_official 235:685d5f11838f 927 /* Prepare the value to be wrote to the FGCOLR register */
mbed_official 235:685d5f11838f 928 tmp |= ((pLayerCfg->InputAlpha) & 0x00FFFFFF);
mbed_official 235:685d5f11838f 929
mbed_official 235:685d5f11838f 930 /* Write to DMA2D FGCOLR register */
mbed_official 235:685d5f11838f 931 hdma2d->Instance->FGCOLR = tmp;
mbed_official 235:685d5f11838f 932 }
mbed_official 235:685d5f11838f 933 }
mbed_official 235:685d5f11838f 934 /* Initialize the DMA2D state*/
mbed_official 235:685d5f11838f 935 hdma2d->State = HAL_DMA2D_STATE_READY;
mbed_official 235:685d5f11838f 936
mbed_official 235:685d5f11838f 937 /* Process unlocked */
mbed_official 235:685d5f11838f 938 __HAL_UNLOCK(hdma2d);
mbed_official 235:685d5f11838f 939
mbed_official 235:685d5f11838f 940 return HAL_OK;
mbed_official 235:685d5f11838f 941 }
mbed_official 235:685d5f11838f 942
mbed_official 235:685d5f11838f 943 /**
mbed_official 235:685d5f11838f 944 * @brief Configure the DMA2D CLUT Transfer.
mbed_official 235:685d5f11838f 945 * @param hdma2d: pointer to a DMA2D_HandleTypeDef structure that contains
mbed_official 235:685d5f11838f 946 * the configuration information for the DMA2D.
mbed_official 235:685d5f11838f 947 * @param CLUTCfg: pointer to a DMA2D_CLUTCfgTypeDef structure that contains
mbed_official 235:685d5f11838f 948 * the configuration information for the color look up table.
mbed_official 235:685d5f11838f 949 * @param LayerIdx: DMA2D Layer index.
mbed_official 235:685d5f11838f 950 * This parameter can be one of the following values:
mbed_official 235:685d5f11838f 951 * 0(background) / 1(foreground)
mbed_official 235:685d5f11838f 952 * @retval HAL status
mbed_official 235:685d5f11838f 953 */
mbed_official 235:685d5f11838f 954 HAL_StatusTypeDef HAL_DMA2D_ConfigCLUT(DMA2D_HandleTypeDef *hdma2d, DMA2D_CLUTCfgTypeDef CLUTCfg, uint32_t LayerIdx)
mbed_official 235:685d5f11838f 955 {
mbed_official 235:685d5f11838f 956 uint32_t tmp = 0, tmp1 = 0;
mbed_official 235:685d5f11838f 957
mbed_official 235:685d5f11838f 958 /* Check the parameters */
mbed_official 235:685d5f11838f 959 assert_param(IS_DMA2D_LAYER(LayerIdx));
mbed_official 235:685d5f11838f 960 assert_param(IS_DMA2D_CLUT_CM(CLUTCfg.CLUTColorMode));
mbed_official 235:685d5f11838f 961 assert_param(IS_DMA2D_CLUT_SIZE(CLUTCfg.Size));
mbed_official 235:685d5f11838f 962
mbed_official 235:685d5f11838f 963 /* Configure the CLUT of the background DMA2D layer */
mbed_official 235:685d5f11838f 964 if(LayerIdx == 0)
mbed_official 235:685d5f11838f 965 {
mbed_official 235:685d5f11838f 966 /* Get the BGCMAR register value */
mbed_official 235:685d5f11838f 967 tmp = hdma2d->Instance->BGCMAR;
mbed_official 235:685d5f11838f 968
mbed_official 235:685d5f11838f 969 /* Clear CLUT address bits */
mbed_official 235:685d5f11838f 970 tmp &= (uint32_t)~DMA2D_BGCMAR_MA;
mbed_official 235:685d5f11838f 971
mbed_official 235:685d5f11838f 972 /* Prepare the value to be wrote to the BGCMAR register */
mbed_official 235:685d5f11838f 973 tmp |= (uint32_t)CLUTCfg.pCLUT;
mbed_official 235:685d5f11838f 974
mbed_official 235:685d5f11838f 975 /* Write to DMA2D BGCMAR register */
mbed_official 235:685d5f11838f 976 hdma2d->Instance->BGCMAR = tmp;
mbed_official 235:685d5f11838f 977
mbed_official 235:685d5f11838f 978 /* Get the BGPFCCR register value */
mbed_official 235:685d5f11838f 979 tmp = hdma2d->Instance->BGPFCCR;
mbed_official 235:685d5f11838f 980
mbed_official 235:685d5f11838f 981 /* Clear CLUT size and CLUT address bits */
mbed_official 235:685d5f11838f 982 tmp &= (uint32_t)~(DMA2D_BGPFCCR_CS | DMA2D_BGPFCCR_CCM);
mbed_official 235:685d5f11838f 983
mbed_official 235:685d5f11838f 984 /* Get the CLUT size */
mbed_official 235:685d5f11838f 985 tmp1 = CLUTCfg.Size << 16;
mbed_official 235:685d5f11838f 986
mbed_official 235:685d5f11838f 987 /* Prepare the value to be wrote to the BGPFCCR register */
mbed_official 235:685d5f11838f 988 tmp |= (CLUTCfg.CLUTColorMode | tmp1);
mbed_official 235:685d5f11838f 989
mbed_official 235:685d5f11838f 990 /* Write to DMA2D BGPFCCR register */
mbed_official 235:685d5f11838f 991 hdma2d->Instance->BGPFCCR = tmp;
mbed_official 235:685d5f11838f 992 }
mbed_official 235:685d5f11838f 993 /* Configure the CLUT of the foreground DMA2D layer */
mbed_official 235:685d5f11838f 994 else
mbed_official 235:685d5f11838f 995 {
mbed_official 235:685d5f11838f 996 /* Get the FGCMAR register value */
mbed_official 235:685d5f11838f 997 tmp = hdma2d->Instance->FGCMAR;
mbed_official 235:685d5f11838f 998
mbed_official 235:685d5f11838f 999 /* Clear CLUT address bits */
mbed_official 235:685d5f11838f 1000 tmp &= (uint32_t)~DMA2D_FGCMAR_MA;
mbed_official 235:685d5f11838f 1001
mbed_official 235:685d5f11838f 1002 /* Prepare the value to be wrote to the FGCMAR register */
mbed_official 235:685d5f11838f 1003 tmp |= (uint32_t)CLUTCfg.pCLUT;
mbed_official 235:685d5f11838f 1004
mbed_official 235:685d5f11838f 1005 /* Write to DMA2D FGCMAR register */
mbed_official 235:685d5f11838f 1006 hdma2d->Instance->FGCMAR = tmp;
mbed_official 235:685d5f11838f 1007
mbed_official 235:685d5f11838f 1008 /* Get the FGPFCCR register value */
mbed_official 235:685d5f11838f 1009 tmp = hdma2d->Instance->FGPFCCR;
mbed_official 235:685d5f11838f 1010
mbed_official 235:685d5f11838f 1011 /* Clear CLUT size and CLUT address bits */
mbed_official 235:685d5f11838f 1012 tmp &= (uint32_t)~(DMA2D_FGPFCCR_CS | DMA2D_FGPFCCR_CCM);
mbed_official 235:685d5f11838f 1013
mbed_official 235:685d5f11838f 1014 /* Get the CLUT size */
mbed_official 235:685d5f11838f 1015 tmp1 = CLUTCfg.Size << 8;
mbed_official 235:685d5f11838f 1016
mbed_official 235:685d5f11838f 1017 /* Prepare the value to be wrote to the FGPFCCR register */
mbed_official 235:685d5f11838f 1018 tmp |= (CLUTCfg.CLUTColorMode | tmp1);
mbed_official 235:685d5f11838f 1019
mbed_official 235:685d5f11838f 1020 /* Write to DMA2D FGPFCCR register */
mbed_official 235:685d5f11838f 1021 hdma2d->Instance->FGPFCCR = tmp;
mbed_official 235:685d5f11838f 1022 }
mbed_official 235:685d5f11838f 1023
mbed_official 235:685d5f11838f 1024 return HAL_OK;
mbed_official 235:685d5f11838f 1025 }
mbed_official 235:685d5f11838f 1026
mbed_official 235:685d5f11838f 1027 /**
mbed_official 235:685d5f11838f 1028 * @brief Enable the DMA2D CLUT Transfer.
mbed_official 235:685d5f11838f 1029 * @param hdma2d: pointer to a DMA2D_HandleTypeDef structure that contains
mbed_official 235:685d5f11838f 1030 * the configuration information for the DMA2D.
mbed_official 235:685d5f11838f 1031 * @param LayerIdx: DMA2D Layer index.
mbed_official 235:685d5f11838f 1032 * This parameter can be one of the following values:
mbed_official 235:685d5f11838f 1033 * 0(background) / 1(foreground)
mbed_official 235:685d5f11838f 1034 * @retval HAL status
mbed_official 235:685d5f11838f 1035 */
mbed_official 235:685d5f11838f 1036 HAL_StatusTypeDef HAL_DMA2D_EnableCLUT(DMA2D_HandleTypeDef *hdma2d, uint32_t LayerIdx)
mbed_official 235:685d5f11838f 1037 {
mbed_official 235:685d5f11838f 1038 /* Check the parameters */
mbed_official 235:685d5f11838f 1039 assert_param(IS_DMA2D_LAYER(LayerIdx));
mbed_official 235:685d5f11838f 1040
mbed_official 235:685d5f11838f 1041 if(LayerIdx == 0)
mbed_official 235:685d5f11838f 1042 {
mbed_official 235:685d5f11838f 1043 /* Enable the CLUT loading for the background */
mbed_official 235:685d5f11838f 1044 hdma2d->Instance->BGPFCCR |= DMA2D_BGPFCCR_START;
mbed_official 235:685d5f11838f 1045 }
mbed_official 235:685d5f11838f 1046 else
mbed_official 235:685d5f11838f 1047 {
mbed_official 235:685d5f11838f 1048 /* Enable the CLUT loading for the foreground */
mbed_official 235:685d5f11838f 1049 hdma2d->Instance->FGPFCCR |= DMA2D_FGPFCCR_START;
mbed_official 235:685d5f11838f 1050 }
mbed_official 235:685d5f11838f 1051
mbed_official 235:685d5f11838f 1052 return HAL_OK;
mbed_official 235:685d5f11838f 1053 }
mbed_official 235:685d5f11838f 1054
mbed_official 235:685d5f11838f 1055 /**
mbed_official 235:685d5f11838f 1056 * @brief Disable the DMA2D CLUT Transfer.
mbed_official 235:685d5f11838f 1057 * @param hdma2d: pointer to a DMA2D_HandleTypeDef structure that contains
mbed_official 235:685d5f11838f 1058 * the configuration information for the DMA2D.
mbed_official 235:685d5f11838f 1059 * @param LayerIdx: DMA2D Layer index.
mbed_official 235:685d5f11838f 1060 * This parameter can be one of the following values:
mbed_official 235:685d5f11838f 1061 * 0(background) / 1(foreground)
mbed_official 235:685d5f11838f 1062 * @retval HAL status
mbed_official 235:685d5f11838f 1063 */
mbed_official 235:685d5f11838f 1064 HAL_StatusTypeDef HAL_DMA2D_DisableCLUT(DMA2D_HandleTypeDef *hdma2d, uint32_t LayerIdx)
mbed_official 235:685d5f11838f 1065 {
mbed_official 235:685d5f11838f 1066 /* Check the parameters */
mbed_official 235:685d5f11838f 1067 assert_param(IS_DMA2D_LAYER(LayerIdx));
mbed_official 235:685d5f11838f 1068
mbed_official 235:685d5f11838f 1069 if(LayerIdx == 0)
mbed_official 235:685d5f11838f 1070 {
mbed_official 235:685d5f11838f 1071 /* Disable the CLUT loading for the background */
mbed_official 235:685d5f11838f 1072 hdma2d->Instance->BGPFCCR &= ~DMA2D_BGPFCCR_START;
mbed_official 235:685d5f11838f 1073 }
mbed_official 235:685d5f11838f 1074 else
mbed_official 235:685d5f11838f 1075 {
mbed_official 235:685d5f11838f 1076 /* Disable the CLUT loading for the foreground */
mbed_official 235:685d5f11838f 1077 hdma2d->Instance->FGPFCCR &= ~DMA2D_FGPFCCR_START;
mbed_official 235:685d5f11838f 1078 }
mbed_official 235:685d5f11838f 1079
mbed_official 235:685d5f11838f 1080 return HAL_OK;
mbed_official 235:685d5f11838f 1081 }
mbed_official 235:685d5f11838f 1082
mbed_official 235:685d5f11838f 1083 /**
mbed_official 235:685d5f11838f 1084 * @brief Define the configuration of the line watermark .
mbed_official 235:685d5f11838f 1085 * @param hdma2d: pointer to a DMA2D_HandleTypeDef structure that contains
mbed_official 235:685d5f11838f 1086 * the configuration information for the DMA2D.
mbed_official 235:685d5f11838f 1087 * @param Line: Line Watermark configuration.
mbed_official 235:685d5f11838f 1088 * @retval HAL status
mbed_official 235:685d5f11838f 1089 */
mbed_official 235:685d5f11838f 1090
mbed_official 235:685d5f11838f 1091 HAL_StatusTypeDef HAL_DMA2D_ProgramLineEvent(DMA2D_HandleTypeDef *hdma2d, uint32_t Line)
mbed_official 235:685d5f11838f 1092 {
mbed_official 235:685d5f11838f 1093 /* Process locked */
mbed_official 235:685d5f11838f 1094 __HAL_LOCK(hdma2d);
mbed_official 235:685d5f11838f 1095
mbed_official 235:685d5f11838f 1096 /* Change DMA2D peripheral state */
mbed_official 235:685d5f11838f 1097 hdma2d->State = HAL_DMA2D_STATE_BUSY;
mbed_official 235:685d5f11838f 1098
mbed_official 235:685d5f11838f 1099 /* Check the parameters */
mbed_official 235:685d5f11838f 1100 assert_param(IS_DMA2D_LineWatermark(Line));
mbed_official 235:685d5f11838f 1101
mbed_official 235:685d5f11838f 1102 /* Sets the Line watermark configuration */
mbed_official 235:685d5f11838f 1103 DMA2D->LWR = (uint32_t)Line;
mbed_official 235:685d5f11838f 1104
mbed_official 235:685d5f11838f 1105 /* Initialize the DMA2D state*/
mbed_official 235:685d5f11838f 1106 hdma2d->State = HAL_DMA2D_STATE_READY;
mbed_official 235:685d5f11838f 1107
mbed_official 235:685d5f11838f 1108 /* Process unlocked */
mbed_official 235:685d5f11838f 1109 __HAL_UNLOCK(hdma2d);
mbed_official 235:685d5f11838f 1110
mbed_official 235:685d5f11838f 1111 return HAL_OK;
mbed_official 235:685d5f11838f 1112 }
mbed_official 235:685d5f11838f 1113
mbed_official 235:685d5f11838f 1114 /**
mbed_official 235:685d5f11838f 1115 * @}
mbed_official 235:685d5f11838f 1116 */
mbed_official 235:685d5f11838f 1117
mbed_official 235:685d5f11838f 1118 /** @defgroup DMA2D_Group4 Peripheral State functions
mbed_official 235:685d5f11838f 1119 * @brief Peripheral State functions
mbed_official 235:685d5f11838f 1120 *
mbed_official 235:685d5f11838f 1121 @verbatim
mbed_official 235:685d5f11838f 1122 ===============================================================================
mbed_official 235:685d5f11838f 1123 ##### Peripheral State and Errors functions #####
mbed_official 235:685d5f11838f 1124 ===============================================================================
mbed_official 235:685d5f11838f 1125 [..]
mbed_official 235:685d5f11838f 1126 This subsection provides functions allowing to :
mbed_official 235:685d5f11838f 1127 (+) Check the DMA2D state
mbed_official 235:685d5f11838f 1128 (+) Get error code
mbed_official 235:685d5f11838f 1129
mbed_official 235:685d5f11838f 1130 @endverbatim
mbed_official 235:685d5f11838f 1131 * @{
mbed_official 235:685d5f11838f 1132 */
mbed_official 235:685d5f11838f 1133
mbed_official 235:685d5f11838f 1134 /**
mbed_official 235:685d5f11838f 1135 * @brief Return the DMA2D state
mbed_official 235:685d5f11838f 1136 * @param hdma2d: pointer to a DMA2D_HandleTypeDef structure that contains
mbed_official 235:685d5f11838f 1137 * the configuration information for the DMA2D.
mbed_official 235:685d5f11838f 1138 * @retval HAL state
mbed_official 235:685d5f11838f 1139 */
mbed_official 235:685d5f11838f 1140 HAL_DMA2D_StateTypeDef HAL_DMA2D_GetState(DMA2D_HandleTypeDef *hdma2d)
mbed_official 235:685d5f11838f 1141 {
mbed_official 235:685d5f11838f 1142 return hdma2d->State;
mbed_official 235:685d5f11838f 1143 }
mbed_official 235:685d5f11838f 1144
mbed_official 235:685d5f11838f 1145 /**
mbed_official 235:685d5f11838f 1146 * @brief Return the DMA2D error code
mbed_official 235:685d5f11838f 1147 * @param hdma2d : pointer to a DMA2D_HandleTypeDef structure that contains
mbed_official 235:685d5f11838f 1148 * the configuration information for DMA2D.
mbed_official 235:685d5f11838f 1149 * @retval DMA2D Error Code
mbed_official 235:685d5f11838f 1150 */
mbed_official 235:685d5f11838f 1151 uint32_t HAL_DMA2D_GetError(DMA2D_HandleTypeDef *hdma2d)
mbed_official 235:685d5f11838f 1152 {
mbed_official 235:685d5f11838f 1153 return hdma2d->ErrorCode;
mbed_official 235:685d5f11838f 1154 }
mbed_official 235:685d5f11838f 1155
mbed_official 235:685d5f11838f 1156 /**
mbed_official 235:685d5f11838f 1157 * @}
mbed_official 235:685d5f11838f 1158 */
mbed_official 235:685d5f11838f 1159
mbed_official 235:685d5f11838f 1160
mbed_official 235:685d5f11838f 1161 /**
mbed_official 235:685d5f11838f 1162 * @brief Set the DMA2D Transfer parameter.
mbed_official 235:685d5f11838f 1163 * @param hdma2d: pointer to a DMA2D_HandleTypeDef structure that contains
mbed_official 235:685d5f11838f 1164 * the configuration information for the specified DMA2D.
mbed_official 235:685d5f11838f 1165 * @param pdata: The source memory Buffer address
mbed_official 235:685d5f11838f 1166 * @param DstAddress: The destination memory Buffer address
mbed_official 235:685d5f11838f 1167 * @param Width: The width of data to be transferred from source to destination.
mbed_official 235:685d5f11838f 1168 * @param Heigh: The heigh of data to be transferred from source to destination.
mbed_official 235:685d5f11838f 1169 * @retval HAL status
mbed_official 235:685d5f11838f 1170 */
mbed_official 235:685d5f11838f 1171 static void DMA2D_SetConfig(DMA2D_HandleTypeDef *hdma2d, uint32_t pdata, uint32_t DstAddress, uint32_t Width, uint32_t Heigh)
mbed_official 235:685d5f11838f 1172 {
mbed_official 235:685d5f11838f 1173 uint32_t tmp = 0;
mbed_official 235:685d5f11838f 1174 uint32_t tmp1 = 0;
mbed_official 235:685d5f11838f 1175 uint32_t tmp2 = 0;
mbed_official 235:685d5f11838f 1176 uint32_t tmp3 = 0;
mbed_official 235:685d5f11838f 1177 uint32_t tmp4 = 0;
mbed_official 235:685d5f11838f 1178
mbed_official 235:685d5f11838f 1179 tmp = Width << 16;
mbed_official 235:685d5f11838f 1180
mbed_official 235:685d5f11838f 1181 /* Configure DMA2D data size */
mbed_official 235:685d5f11838f 1182 hdma2d->Instance->NLR = (Heigh | tmp);
mbed_official 235:685d5f11838f 1183
mbed_official 235:685d5f11838f 1184 /* Configure DMA2D destination address */
mbed_official 235:685d5f11838f 1185 hdma2d->Instance->OMAR = DstAddress;
mbed_official 235:685d5f11838f 1186
mbed_official 235:685d5f11838f 1187 /* Register to memory DMA2D mode selected */
mbed_official 235:685d5f11838f 1188 if (hdma2d->Init.Mode == DMA2D_R2M)
mbed_official 235:685d5f11838f 1189 {
mbed_official 235:685d5f11838f 1190 tmp1 = pdata & DMA2D_OCOLR_ALPHA_1;
mbed_official 235:685d5f11838f 1191 tmp2 = pdata & DMA2D_OCOLR_RED_1;
mbed_official 235:685d5f11838f 1192 tmp3 = pdata & DMA2D_OCOLR_GREEN_1;
mbed_official 235:685d5f11838f 1193 tmp4 = pdata & DMA2D_OCOLR_BLUE_1;
mbed_official 235:685d5f11838f 1194
mbed_official 235:685d5f11838f 1195 /* Prepare the value to be wrote to the OCOLR register according to the color mode */
mbed_official 235:685d5f11838f 1196 if (hdma2d->Init.ColorMode == DMA2D_ARGB8888)
mbed_official 235:685d5f11838f 1197 {
mbed_official 235:685d5f11838f 1198 tmp = (tmp3 | tmp2 | tmp1| tmp4);
mbed_official 235:685d5f11838f 1199 }
mbed_official 235:685d5f11838f 1200 else if (hdma2d->Init.ColorMode == DMA2D_RGB888)
mbed_official 235:685d5f11838f 1201 {
mbed_official 235:685d5f11838f 1202 tmp = (tmp3 | tmp2 | tmp4);
mbed_official 235:685d5f11838f 1203 }
mbed_official 235:685d5f11838f 1204 else if (hdma2d->Init.ColorMode == DMA2D_RGB565)
mbed_official 235:685d5f11838f 1205 {
mbed_official 235:685d5f11838f 1206 tmp2 = (tmp2 >> 19);
mbed_official 235:685d5f11838f 1207 tmp3 = (tmp3 >> 10);
mbed_official 235:685d5f11838f 1208 tmp4 = (tmp4 >> 3 );
mbed_official 235:685d5f11838f 1209 tmp = ((tmp3 << 5) | (tmp2 << 11) | tmp4);
mbed_official 235:685d5f11838f 1210 }
mbed_official 235:685d5f11838f 1211 else if (hdma2d->Init.ColorMode == DMA2D_ARGB1555)
mbed_official 235:685d5f11838f 1212 {
mbed_official 235:685d5f11838f 1213 tmp1 = (tmp1 >> 31);
mbed_official 235:685d5f11838f 1214 tmp2 = (tmp2 >> 19);
mbed_official 235:685d5f11838f 1215 tmp3 = (tmp3 >> 11);
mbed_official 235:685d5f11838f 1216 tmp4 = (tmp4 >> 3 );
mbed_official 235:685d5f11838f 1217 tmp = ((tmp3 << 5) | (tmp2 << 10) | (tmp1 << 15) | tmp4);
mbed_official 235:685d5f11838f 1218 }
mbed_official 235:685d5f11838f 1219 else /* DMA2D_CMode = DMA2D_ARGB4444 */
mbed_official 235:685d5f11838f 1220 {
mbed_official 235:685d5f11838f 1221 tmp1 = (tmp1 >> 28);
mbed_official 235:685d5f11838f 1222 tmp2 = (tmp2 >> 20);
mbed_official 235:685d5f11838f 1223 tmp3 = (tmp3 >> 12);
mbed_official 235:685d5f11838f 1224 tmp4 = (tmp4 >> 4 );
mbed_official 235:685d5f11838f 1225 tmp = ((tmp3 << 4) | (tmp2 << 8) | (tmp1 << 12) | tmp4);
mbed_official 235:685d5f11838f 1226 }
mbed_official 235:685d5f11838f 1227 /* Write to DMA2D OCOLR register */
mbed_official 235:685d5f11838f 1228 hdma2d->Instance->OCOLR = tmp;
mbed_official 235:685d5f11838f 1229 }
mbed_official 235:685d5f11838f 1230 else /* M2M, M2M_PFC or M2M_Blending DMA2D Mode */
mbed_official 235:685d5f11838f 1231 {
mbed_official 235:685d5f11838f 1232 /* Configure DMA2D source address */
mbed_official 235:685d5f11838f 1233 hdma2d->Instance->FGMAR = pdata;
mbed_official 235:685d5f11838f 1234 }
mbed_official 235:685d5f11838f 1235 }
mbed_official 235:685d5f11838f 1236
mbed_official 235:685d5f11838f 1237 /**
mbed_official 235:685d5f11838f 1238 * @}
mbed_official 235:685d5f11838f 1239 */
mbed_official 235:685d5f11838f 1240 #endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx */
mbed_official 235:685d5f11838f 1241 #endif /* HAL_DMA2D_MODULE_ENABLED */
mbed_official 235:685d5f11838f 1242 /**
mbed_official 235:685d5f11838f 1243 * @}
mbed_official 235:685d5f11838f 1244 */
mbed_official 235:685d5f11838f 1245
mbed_official 235:685d5f11838f 1246 /**
mbed_official 235:685d5f11838f 1247 * @}
mbed_official 235:685d5f11838f 1248 */
mbed_official 235:685d5f11838f 1249
mbed_official 235:685d5f11838f 1250 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/