shao ziyang / mbed-src-kl05

mbed library sources

Dependents:   frdm_kl05z_gpio_test

Fork of mbed-src by mbed official

targets/hal/TARGET_NXP/TARGET_LPC176X/serial_api.c@40:5fa4b7c54c1d, 2013-10-25 (annotated)

Committer:
mbed_official
Date:
Fri Oct 25 13:45:04 2013 +0100
Revision:
40:5fa4b7c54c1d
Parent:
20:4263a77256ae
Child:
51:7838415c99e7
Synchronized with git revision 9d881770c95de5efecb420cd223375ebc93153b9

Who changed what in which revision?

UserRevisionLine numberNew contents of line
bogdanm 13:0645d8841f51 1 /* mbed Microcontroller Library
bogdanm 13:0645d8841f51 2 * Copyright (c) 2006-2013 ARM Limited
bogdanm 13:0645d8841f51 3 *
bogdanm 13:0645d8841f51 4 * Licensed under the Apache License, Version 2.0 (the "License");
bogdanm 13:0645d8841f51 5 * you may not use this file except in compliance with the License.
bogdanm 13:0645d8841f51 6 * You may obtain a copy of the License at
bogdanm 13:0645d8841f51 7 *
bogdanm 13:0645d8841f51 8 * http://www.apache.org/licenses/LICENSE-2.0
bogdanm 13:0645d8841f51 9 *
bogdanm 13:0645d8841f51 10 * Unless required by applicable law or agreed to in writing, software
bogdanm 13:0645d8841f51 11 * distributed under the License is distributed on an "AS IS" BASIS,
bogdanm 13:0645d8841f51 12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
bogdanm 13:0645d8841f51 13 * See the License for the specific language governing permissions and
bogdanm 13:0645d8841f51 14 * limitations under the License.
bogdanm 13:0645d8841f51 15 */
bogdanm 13:0645d8841f51 16 // math.h required for floating point operations for baud rate calculation
bogdanm 13:0645d8841f51 17 #include <math.h>
bogdanm 13:0645d8841f51 18 #include <string.h>
bogdanm 13:0645d8841f51 19
bogdanm 13:0645d8841f51 20 #include "serial_api.h"
bogdanm 13:0645d8841f51 21 #include "cmsis.h"
bogdanm 13:0645d8841f51 22 #include "pinmap.h"
bogdanm 13:0645d8841f51 23 #include "error.h"
bogdanm 13:0645d8841f51 24
bogdanm 13:0645d8841f51 25 /******************************************************************************
bogdanm 13:0645d8841f51 26 * INITIALIZATION
bogdanm 13:0645d8841f51 27 ******************************************************************************/
bogdanm 13:0645d8841f51 28 #define UART_NUM 4
bogdanm 13:0645d8841f51 29
bogdanm 13:0645d8841f51 30 static const PinMap PinMap_UART_TX[] = {
bogdanm 13:0645d8841f51 31 {P0_0, UART_3, 2},
bogdanm 13:0645d8841f51 32 {P0_2, UART_0, 1},
bogdanm 13:0645d8841f51 33 {P0_10, UART_2, 1},
bogdanm 13:0645d8841f51 34 {P0_15, UART_1, 1},
bogdanm 13:0645d8841f51 35 {P0_25, UART_3, 3},
bogdanm 13:0645d8841f51 36 {P2_0 , UART_1, 2},
bogdanm 13:0645d8841f51 37 {P2_8 , UART_2, 2},
bogdanm 13:0645d8841f51 38 {P4_28, UART_3, 3},
bogdanm 13:0645d8841f51 39 {NC , NC , 0}
bogdanm 13:0645d8841f51 40 };
bogdanm 13:0645d8841f51 41
bogdanm 13:0645d8841f51 42 static const PinMap PinMap_UART_RX[] = {
bogdanm 13:0645d8841f51 43 {P0_1 , UART_3, 2},
bogdanm 13:0645d8841f51 44 {P0_3 , UART_0, 1},
bogdanm 13:0645d8841f51 45 {P0_11, UART_2, 1},
bogdanm 13:0645d8841f51 46 {P0_16, UART_1, 1},
bogdanm 13:0645d8841f51 47 {P0_26, UART_3, 3},
bogdanm 13:0645d8841f51 48 {P2_1 , UART_1, 2},
bogdanm 13:0645d8841f51 49 {P2_9 , UART_2, 2},
bogdanm 13:0645d8841f51 50 {P4_29, UART_3, 3},
bogdanm 13:0645d8841f51 51 {NC , NC , 0}
bogdanm 13:0645d8841f51 52 };
bogdanm 13:0645d8841f51 53
bogdanm 13:0645d8841f51 54 static uint32_t serial_irq_ids[UART_NUM] = {0};
bogdanm 13:0645d8841f51 55 static uart_irq_handler irq_handler;
bogdanm 13:0645d8841f51 56
bogdanm 13:0645d8841f51 57 int stdio_uart_inited = 0;
bogdanm 13:0645d8841f51 58 serial_t stdio_uart;
bogdanm 13:0645d8841f51 59
bogdanm 13:0645d8841f51 60 void serial_init(serial_t *obj, PinName tx, PinName rx) {
bogdanm 13:0645d8841f51 61 int is_stdio_uart = 0;
bogdanm 13:0645d8841f51 62
bogdanm 13:0645d8841f51 63 // determine the UART to use
bogdanm 13:0645d8841f51 64 UARTName uart_tx = (UARTName)pinmap_peripheral(tx, PinMap_UART_TX);
bogdanm 13:0645d8841f51 65 UARTName uart_rx = (UARTName)pinmap_peripheral(rx, PinMap_UART_RX);
bogdanm 13:0645d8841f51 66 UARTName uart = (UARTName)pinmap_merge(uart_tx, uart_rx);
bogdanm 13:0645d8841f51 67 if ((int)uart == NC) {
bogdanm 13:0645d8841f51 68 error("Serial pinout mapping failed");
bogdanm 13:0645d8841f51 69 }
bogdanm 13:0645d8841f51 70
bogdanm 13:0645d8841f51 71 obj->uart = (LPC_UART_TypeDef *)uart;
bogdanm 13:0645d8841f51 72 // enable power
bogdanm 13:0645d8841f51 73 switch (uart) {
bogdanm 13:0645d8841f51 74 case UART_0: LPC_SC->PCONP |= 1 << 3; break;
bogdanm 13:0645d8841f51 75 case UART_1: LPC_SC->PCONP |= 1 << 4; break;
bogdanm 13:0645d8841f51 76 case UART_2: LPC_SC->PCONP |= 1 << 24; break;
bogdanm 13:0645d8841f51 77 case UART_3: LPC_SC->PCONP |= 1 << 25; break;
bogdanm 13:0645d8841f51 78 }
bogdanm 13:0645d8841f51 79
bogdanm 13:0645d8841f51 80 // enable fifos and default rx trigger level
bogdanm 13:0645d8841f51 81 obj->uart->FCR = 1 << 0 // FIFO Enable - 0 = Disables, 1 = Enabled
bogdanm 13:0645d8841f51 82 | 0 << 1 // Rx Fifo Reset
bogdanm 13:0645d8841f51 83 | 0 << 2 // Tx Fifo Reset
bogdanm 13:0645d8841f51 84 | 0 << 6; // Rx irq trigger level - 0 = 1 char, 1 = 4 chars, 2 = 8 chars, 3 = 14 chars
bogdanm 13:0645d8841f51 85
bogdanm 13:0645d8841f51 86 // disable irqs
bogdanm 13:0645d8841f51 87 obj->uart->IER = 0 << 0 // Rx Data available irq enable
bogdanm 13:0645d8841f51 88 | 0 << 1 // Tx Fifo empty irq enable
bogdanm 13:0645d8841f51 89 | 0 << 2; // Rx Line Status irq enable
bogdanm 13:0645d8841f51 90
bogdanm 13:0645d8841f51 91 // set default baud rate and format
bogdanm 13:0645d8841f51 92 serial_baud (obj, 9600);
bogdanm 13:0645d8841f51 93 serial_format(obj, 8, ParityNone, 1);
bogdanm 13:0645d8841f51 94
bogdanm 13:0645d8841f51 95 // pinout the chosen uart
bogdanm 13:0645d8841f51 96 pinmap_pinout(tx, PinMap_UART_TX);
bogdanm 13:0645d8841f51 97 pinmap_pinout(rx, PinMap_UART_RX);
bogdanm 13:0645d8841f51 98
bogdanm 13:0645d8841f51 99 // set rx/tx pins in PullUp mode
bogdanm 13:0645d8841f51 100 pin_mode(tx, PullUp);
bogdanm 13:0645d8841f51 101 pin_mode(rx, PullUp);
bogdanm 13:0645d8841f51 102
bogdanm 13:0645d8841f51 103 switch (uart) {
bogdanm 13:0645d8841f51 104 case UART_0: obj->index = 0; break;
bogdanm 13:0645d8841f51 105 case UART_1: obj->index = 1; break;
bogdanm 13:0645d8841f51 106 case UART_2: obj->index = 2; break;
bogdanm 13:0645d8841f51 107 case UART_3: obj->index = 3; break;
bogdanm 13:0645d8841f51 108 }
mbed_official 40:5fa4b7c54c1d 109 obj->count = 0;
bogdanm 13:0645d8841f51 110
bogdanm 13:0645d8841f51 111 is_stdio_uart = (uart == STDIO_UART) ? (1) : (0);
bogdanm 13:0645d8841f51 112
bogdanm 13:0645d8841f51 113 if (is_stdio_uart) {
bogdanm 13:0645d8841f51 114 stdio_uart_inited = 1;
bogdanm 13:0645d8841f51 115 memcpy(&stdio_uart, obj, sizeof(serial_t));
bogdanm 13:0645d8841f51 116 }
bogdanm 13:0645d8841f51 117 }
bogdanm 13:0645d8841f51 118
bogdanm 13:0645d8841f51 119 void serial_free(serial_t *obj) {
bogdanm 13:0645d8841f51 120 serial_irq_ids[obj->index] = 0;
bogdanm 13:0645d8841f51 121 }
bogdanm 13:0645d8841f51 122
bogdanm 13:0645d8841f51 123 // serial_baud
bogdanm 13:0645d8841f51 124 // set the baud rate, taking in to account the current SystemFrequency
bogdanm 13:0645d8841f51 125 void serial_baud(serial_t *obj, int baudrate) {
bogdanm 13:0645d8841f51 126 // The LPC2300 and LPC1700 have a divider and a fractional divider to control the
bogdanm 13:0645d8841f51 127 // baud rate. The formula is:
bogdanm 13:0645d8841f51 128 //
bogdanm 13:0645d8841f51 129 // Baudrate = (1 / PCLK) * 16 * DL * (1 + DivAddVal / MulVal)
bogdanm 13:0645d8841f51 130 // where:
bogdanm 13:0645d8841f51 131 // 1 < MulVal <= 15
bogdanm 13:0645d8841f51 132 // 0 <= DivAddVal < 14
bogdanm 13:0645d8841f51 133 // DivAddVal < MulVal
bogdanm 13:0645d8841f51 134 //
bogdanm 13:0645d8841f51 135 // set pclk to /1
bogdanm 13:0645d8841f51 136 switch ((int)obj->uart) {
bogdanm 13:0645d8841f51 137 case UART_0: LPC_SC->PCLKSEL0 &= ~(0x3 << 6); LPC_SC->PCLKSEL0 |= (0x1 << 6); break;
bogdanm 13:0645d8841f51 138 case UART_1: LPC_SC->PCLKSEL0 &= ~(0x3 << 8); LPC_SC->PCLKSEL0 |= (0x1 << 8); break;
bogdanm 13:0645d8841f51 139 case UART_2: LPC_SC->PCLKSEL1 &= ~(0x3 << 16); LPC_SC->PCLKSEL1 |= (0x1 << 16); break;
bogdanm 13:0645d8841f51 140 case UART_3: LPC_SC->PCLKSEL1 &= ~(0x3 << 18); LPC_SC->PCLKSEL1 |= (0x1 << 18); break;
bogdanm 13:0645d8841f51 141 default: error("serial_baud"); break;
bogdanm 13:0645d8841f51 142 }
bogdanm 13:0645d8841f51 143
bogdanm 13:0645d8841f51 144 uint32_t PCLK = SystemCoreClock;
bogdanm 13:0645d8841f51 145
bogdanm 13:0645d8841f51 146 // First we check to see if the basic divide with no DivAddVal/MulVal
bogdanm 13:0645d8841f51 147 // ratio gives us an integer result. If it does, we set DivAddVal = 0,
bogdanm 13:0645d8841f51 148 // MulVal = 1. Otherwise, we search the valid ratio value range to find
bogdanm 13:0645d8841f51 149 // the closest match. This could be more elegant, using search methods
bogdanm 13:0645d8841f51 150 // and/or lookup tables, but the brute force method is not that much
bogdanm 13:0645d8841f51 151 // slower, and is more maintainable.
bogdanm 13:0645d8841f51 152 uint16_t DL = PCLK / (16 * baudrate);
bogdanm 13:0645d8841f51 153
bogdanm 13:0645d8841f51 154 uint8_t DivAddVal = 0;
bogdanm 13:0645d8841f51 155 uint8_t MulVal = 1;
bogdanm 13:0645d8841f51 156 int hit = 0;
bogdanm 13:0645d8841f51 157 uint16_t dlv;
bogdanm 13:0645d8841f51 158 uint8_t mv, dav;
bogdanm 13:0645d8841f51 159 if ((PCLK % (16 * baudrate)) != 0) { // Checking for zero remainder
bogdanm 13:0645d8841f51 160 float err_best = (float) baudrate;
bogdanm 13:0645d8841f51 161 uint16_t dlmax = DL;
bogdanm 13:0645d8841f51 162 for ( dlv = (dlmax/2); (dlv <= dlmax) && !hit; dlv++) {
bogdanm 13:0645d8841f51 163 for ( mv = 1; mv <= 15; mv++) {
bogdanm 13:0645d8841f51 164 for ( dav = 1; dav < mv; dav++) {
bogdanm 13:0645d8841f51 165 float ratio = 1.0f + ((float) dav / (float) mv);
bogdanm 13:0645d8841f51 166 float calcbaud = (float)PCLK / (16.0f * (float) dlv * ratio);
bogdanm 13:0645d8841f51 167 float err = fabs(((float) baudrate - calcbaud) / (float) baudrate);
bogdanm 13:0645d8841f51 168 if (err < err_best) {
bogdanm 13:0645d8841f51 169 DL = dlv;
bogdanm 13:0645d8841f51 170 DivAddVal = dav;
bogdanm 13:0645d8841f51 171 MulVal = mv;
bogdanm 13:0645d8841f51 172 err_best = err;
bogdanm 13:0645d8841f51 173 if (err < 0.001f) {
bogdanm 13:0645d8841f51 174 hit = 1;
bogdanm 13:0645d8841f51 175 }
bogdanm 13:0645d8841f51 176 }
bogdanm 13:0645d8841f51 177 }
bogdanm 13:0645d8841f51 178 }
bogdanm 13:0645d8841f51 179 }
bogdanm 13:0645d8841f51 180 }
bogdanm 13:0645d8841f51 181
bogdanm 13:0645d8841f51 182 // set LCR[DLAB] to enable writing to divider registers
bogdanm 13:0645d8841f51 183 obj->uart->LCR |= (1 << 7);
bogdanm 13:0645d8841f51 184
bogdanm 13:0645d8841f51 185 // set divider values
bogdanm 13:0645d8841f51 186 obj->uart->DLM = (DL >> 8) & 0xFF;
bogdanm 13:0645d8841f51 187 obj->uart->DLL = (DL >> 0) & 0xFF;
bogdanm 13:0645d8841f51 188 obj->uart->FDR = (uint32_t) DivAddVal << 0
bogdanm 13:0645d8841f51 189 | (uint32_t) MulVal << 4;
bogdanm 13:0645d8841f51 190
bogdanm 13:0645d8841f51 191 // clear LCR[DLAB]
bogdanm 13:0645d8841f51 192 obj->uart->LCR &= ~(1 << 7);
bogdanm 13:0645d8841f51 193 }
bogdanm 13:0645d8841f51 194
bogdanm 13:0645d8841f51 195 void serial_format(serial_t *obj, int data_bits, SerialParity parity, int stop_bits) {
bogdanm 13:0645d8841f51 196 // 0: 1 stop bits, 1: 2 stop bits
bogdanm 13:0645d8841f51 197 if (stop_bits != 1 && stop_bits != 2) {
bogdanm 13:0645d8841f51 198 error("Invalid stop bits specified");
bogdanm 13:0645d8841f51 199 }
bogdanm 13:0645d8841f51 200 stop_bits -= 1;
bogdanm 13:0645d8841f51 201
bogdanm 13:0645d8841f51 202 // 0: 5 data bits ... 3: 8 data bits
bogdanm 13:0645d8841f51 203 if (data_bits < 5 || data_bits > 8) {
bogdanm 13:0645d8841f51 204 error("Invalid number of bits (%d) in serial format, should be 5..8", data_bits);
bogdanm 13:0645d8841f51 205 }
bogdanm 13:0645d8841f51 206 data_bits -= 5;
bogdanm 13:0645d8841f51 207
bogdanm 13:0645d8841f51 208 int parity_enable, parity_select;
bogdanm 13:0645d8841f51 209 switch (parity) {
bogdanm 13:0645d8841f51 210 case ParityNone: parity_enable = 0; parity_select = 0; break;
bogdanm 13:0645d8841f51 211 case ParityOdd : parity_enable = 1; parity_select = 0; break;
bogdanm 13:0645d8841f51 212 case ParityEven: parity_enable = 1; parity_select = 1; break;
bogdanm 13:0645d8841f51 213 case ParityForced1: parity_enable = 1; parity_select = 2; break;
bogdanm 13:0645d8841f51 214 case ParityForced0: parity_enable = 1; parity_select = 3; break;
bogdanm 13:0645d8841f51 215 default:
bogdanm 13:0645d8841f51 216 error("Invalid serial parity setting");
bogdanm 13:0645d8841f51 217 return;
bogdanm 13:0645d8841f51 218 }
bogdanm 13:0645d8841f51 219
bogdanm 13:0645d8841f51 220 obj->uart->LCR = data_bits << 0
bogdanm 13:0645d8841f51 221 | stop_bits << 2
bogdanm 13:0645d8841f51 222 | parity_enable << 3
bogdanm 13:0645d8841f51 223 | parity_select << 4;
bogdanm 13:0645d8841f51 224 }
bogdanm 13:0645d8841f51 225
bogdanm 13:0645d8841f51 226 /******************************************************************************
bogdanm 13:0645d8841f51 227 * INTERRUPTS HANDLING
bogdanm 13:0645d8841f51 228 ******************************************************************************/
bogdanm 13:0645d8841f51 229 static inline void uart_irq(uint32_t iir, uint32_t index) {
bogdanm 13:0645d8841f51 230 // [Chapter 14] LPC17xx UART0/2/3: UARTn Interrupt Handling
bogdanm 13:0645d8841f51 231 SerialIrq irq_type;
bogdanm 13:0645d8841f51 232 switch (iir) {
bogdanm 13:0645d8841f51 233 case 1: irq_type = TxIrq; break;
bogdanm 13:0645d8841f51 234 case 2: irq_type = RxIrq; break;
bogdanm 13:0645d8841f51 235 default: return;
bogdanm 13:0645d8841f51 236 }
bogdanm 13:0645d8841f51 237
bogdanm 13:0645d8841f51 238 if (serial_irq_ids[index] != 0)
bogdanm 13:0645d8841f51 239 irq_handler(serial_irq_ids[index], irq_type);
bogdanm 13:0645d8841f51 240 }
bogdanm 13:0645d8841f51 241
bogdanm 13:0645d8841f51 242 void uart0_irq() {uart_irq((LPC_UART0->IIR >> 1) & 0x7, 0);}
bogdanm 13:0645d8841f51 243 void uart1_irq() {uart_irq((LPC_UART1->IIR >> 1) & 0x7, 1);}
bogdanm 13:0645d8841f51 244 void uart2_irq() {uart_irq((LPC_UART2->IIR >> 1) & 0x7, 2);}
bogdanm 13:0645d8841f51 245 void uart3_irq() {uart_irq((LPC_UART3->IIR >> 1) & 0x7, 3);}
bogdanm 13:0645d8841f51 246
bogdanm 13:0645d8841f51 247 void serial_irq_handler(serial_t *obj, uart_irq_handler handler, uint32_t id) {
bogdanm 13:0645d8841f51 248 irq_handler = handler;
bogdanm 13:0645d8841f51 249 serial_irq_ids[obj->index] = id;
bogdanm 13:0645d8841f51 250 }
bogdanm 13:0645d8841f51 251
bogdanm 13:0645d8841f51 252 void serial_irq_set(serial_t *obj, SerialIrq irq, uint32_t enable) {
bogdanm 13:0645d8841f51 253 IRQn_Type irq_n = (IRQn_Type)0;
bogdanm 13:0645d8841f51 254 uint32_t vector = 0;
bogdanm 13:0645d8841f51 255 switch ((int)obj->uart) {
bogdanm 13:0645d8841f51 256 case UART_0: irq_n=UART0_IRQn; vector = (uint32_t)&uart0_irq; break;
bogdanm 13:0645d8841f51 257 case UART_1: irq_n=UART1_IRQn; vector = (uint32_t)&uart1_irq; break;
bogdanm 13:0645d8841f51 258 case UART_2: irq_n=UART2_IRQn; vector = (uint32_t)&uart2_irq; break;
bogdanm 13:0645d8841f51 259 case UART_3: irq_n=UART3_IRQn; vector = (uint32_t)&uart3_irq; break;
bogdanm 13:0645d8841f51 260 }
bogdanm 13:0645d8841f51 261
bogdanm 13:0645d8841f51 262 if (enable) {
bogdanm 13:0645d8841f51 263 obj->uart->IER |= 1 << irq;
bogdanm 13:0645d8841f51 264 NVIC_SetVector(irq_n, vector);
bogdanm 13:0645d8841f51 265 NVIC_EnableIRQ(irq_n);
bogdanm 13:0645d8841f51 266 } else { // disable
bogdanm 13:0645d8841f51 267 int all_disabled = 0;
bogdanm 13:0645d8841f51 268 SerialIrq other_irq = (irq == RxIrq) ? (TxIrq) : (RxIrq);
bogdanm 13:0645d8841f51 269 obj->uart->IER &= ~(1 << irq);
bogdanm 13:0645d8841f51 270 all_disabled = (obj->uart->IER & (1 << other_irq)) == 0;
bogdanm 13:0645d8841f51 271 if (all_disabled)
bogdanm 13:0645d8841f51 272 NVIC_DisableIRQ(irq_n);
bogdanm 13:0645d8841f51 273 }
bogdanm 13:0645d8841f51 274 }
bogdanm 13:0645d8841f51 275
bogdanm 13:0645d8841f51 276 /******************************************************************************
bogdanm 13:0645d8841f51 277 * READ/WRITE
bogdanm 13:0645d8841f51 278 ******************************************************************************/
bogdanm 13:0645d8841f51 279 int serial_getc(serial_t *obj) {
bogdanm 13:0645d8841f51 280 while (!serial_readable(obj));
bogdanm 13:0645d8841f51 281 return obj->uart->RBR;
bogdanm 13:0645d8841f51 282 }
bogdanm 13:0645d8841f51 283
bogdanm 13:0645d8841f51 284 void serial_putc(serial_t *obj, int c) {
bogdanm 13:0645d8841f51 285 while (!serial_writable(obj));
bogdanm 13:0645d8841f51 286 obj->uart->THR = c;
mbed_official 40:5fa4b7c54c1d 287 obj->count++;
bogdanm 13:0645d8841f51 288 }
bogdanm 13:0645d8841f51 289
bogdanm 13:0645d8841f51 290 int serial_readable(serial_t *obj) {
bogdanm 13:0645d8841f51 291 return obj->uart->LSR & 0x01;
bogdanm 13:0645d8841f51 292 }
bogdanm 13:0645d8841f51 293
bogdanm 13:0645d8841f51 294 int serial_writable(serial_t *obj) {
mbed_official 40:5fa4b7c54c1d 295 int isWritable = 1;
mbed_official 40:5fa4b7c54c1d 296 if (obj->uart->LSR & 0x20)
mbed_official 40:5fa4b7c54c1d 297 obj->count = 0;
mbed_official 40:5fa4b7c54c1d 298 else if (obj->count >= 16)
mbed_official 40:5fa4b7c54c1d 299 isWritable = 0;
mbed_official 40:5fa4b7c54c1d 300
mbed_official 40:5fa4b7c54c1d 301 return isWritable;
bogdanm 13:0645d8841f51 302 }
bogdanm 13:0645d8841f51 303
bogdanm 13:0645d8841f51 304 void serial_clear(serial_t *obj) {
bogdanm 20:4263a77256ae 305 obj->uart->FCR = 1 << 0 // FIFO Enable - 0 = Disables, 1 = Enabled
bogdanm 20:4263a77256ae 306 | 1 << 1 // rx FIFO reset
bogdanm 13:0645d8841f51 307 | 1 << 2 // tx FIFO reset
bogdanm 13:0645d8841f51 308 | 0 << 6; // interrupt depth
bogdanm 13:0645d8841f51 309 }
bogdanm 13:0645d8841f51 310
bogdanm 13:0645d8841f51 311 void serial_pinout_tx(PinName tx) {
bogdanm 13:0645d8841f51 312 pinmap_pinout(tx, PinMap_UART_TX);
bogdanm 13:0645d8841f51 313 }
bogdanm 13:0645d8841f51 314
bogdanm 13:0645d8841f51 315 void serial_break_set(serial_t *obj) {
bogdanm 13:0645d8841f51 316 obj->uart->LCR |= (1 << 6);
bogdanm 13:0645d8841f51 317 }
bogdanm 13:0645d8841f51 318
bogdanm 13:0645d8841f51 319 void serial_break_clear(serial_t *obj) {
bogdanm 13:0645d8841f51 320 obj->uart->LCR &= ~(1 << 6);
bogdanm 13:0645d8841f51 321 }
bogdanm 13:0645d8841f51 322