shao ziyang
mbed library sources
Dependents: frdm_kl05z_gpio_test
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mbed official
targets/cmsis/TARGET_STM/TARGET_DISCO_F100RB/stm32f10x_spi.c@126:549ba18ddd81, 2014-03-19 (annotated)
- Committer:
- mbed_official
- Date:
- Wed Mar 19 16:00:09 2014 +0000
- Revision:
- 126:549ba18ddd81
Synchronized with git revision cf8fd1cf86b0cd85131dd24a6ded21cc6fe04827
Full URL: https://github.com/mbedmicro/mbed/commit/cf8fd1cf86b0cd85131dd24a6ded21cc6fe04827/
Conflicts:
workspace_tools/targets.py
Who changed what in which revision?
| User | Revision | Line number | New contents of line |
|---|---|---|---|
| mbed_official | 126:549ba18ddd81 | 1 | /** |
| mbed_official | 126:549ba18ddd81 | 2 | ****************************************************************************** |
| mbed_official | 126:549ba18ddd81 | 3 | * @file stm32f10x_spi.c |
| mbed_official | 126:549ba18ddd81 | 4 | * @author MCD Application Team |
| mbed_official | 126:549ba18ddd81 | 5 | * @version V3.6.1 |
| mbed_official | 126:549ba18ddd81 | 6 | * @date 05-March-2012 |
| mbed_official | 126:549ba18ddd81 | 7 | * @brief This file provides all the SPI firmware functions. |
| mbed_official | 126:549ba18ddd81 | 8 | ******************************************************************************* |
| mbed_official | 126:549ba18ddd81 | 9 | * Copyright (c) 2014, STMicroelectronics |
| mbed_official | 126:549ba18ddd81 | 10 | * All rights reserved. |
| mbed_official | 126:549ba18ddd81 | 11 | * |
| mbed_official | 126:549ba18ddd81 | 12 | * Redistribution and use in source and binary forms, with or without |
| mbed_official | 126:549ba18ddd81 | 13 | * modification, are permitted provided that the following conditions are met: |
| mbed_official | 126:549ba18ddd81 | 14 | * |
| mbed_official | 126:549ba18ddd81 | 15 | * 1. Redistributions of source code must retain the above copyright notice, |
| mbed_official | 126:549ba18ddd81 | 16 | * this list of conditions and the following disclaimer. |
| mbed_official | 126:549ba18ddd81 | 17 | * 2. Redistributions in binary form must reproduce the above copyright notice, |
| mbed_official | 126:549ba18ddd81 | 18 | * this list of conditions and the following disclaimer in the documentation |
| mbed_official | 126:549ba18ddd81 | 19 | * and/or other materials provided with the distribution. |
| mbed_official | 126:549ba18ddd81 | 20 | * 3. Neither the name of STMicroelectronics nor the names of its contributors |
| mbed_official | 126:549ba18ddd81 | 21 | * may be used to endorse or promote products derived from this software |
| mbed_official | 126:549ba18ddd81 | 22 | * without specific prior written permission. |
| mbed_official | 126:549ba18ddd81 | 23 | * |
| mbed_official | 126:549ba18ddd81 | 24 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
| mbed_official | 126:549ba18ddd81 | 25 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
| mbed_official | 126:549ba18ddd81 | 26 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
| mbed_official | 126:549ba18ddd81 | 27 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE |
| mbed_official | 126:549ba18ddd81 | 28 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
| mbed_official | 126:549ba18ddd81 | 29 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR |
| mbed_official | 126:549ba18ddd81 | 30 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
| mbed_official | 126:549ba18ddd81 | 31 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, |
| mbed_official | 126:549ba18ddd81 | 32 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
| mbed_official | 126:549ba18ddd81 | 33 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
| mbed_official | 126:549ba18ddd81 | 34 | ******************************************************************************* |
| mbed_official | 126:549ba18ddd81 | 35 | */ |
| mbed_official | 126:549ba18ddd81 | 36 | |
| mbed_official | 126:549ba18ddd81 | 37 | /* Includes ------------------------------------------------------------------*/ |
| mbed_official | 126:549ba18ddd81 | 38 | #include "stm32f10x_spi.h" |
| mbed_official | 126:549ba18ddd81 | 39 | #include "stm32f10x_rcc.h" |
| mbed_official | 126:549ba18ddd81 | 40 | |
| mbed_official | 126:549ba18ddd81 | 41 | /** @addtogroup STM32F10x_StdPeriph_Driver |
| mbed_official | 126:549ba18ddd81 | 42 | * @{ |
| mbed_official | 126:549ba18ddd81 | 43 | */ |
| mbed_official | 126:549ba18ddd81 | 44 | |
| mbed_official | 126:549ba18ddd81 | 45 | /** @defgroup SPI |
| mbed_official | 126:549ba18ddd81 | 46 | * @brief SPI driver modules |
| mbed_official | 126:549ba18ddd81 | 47 | * @{ |
| mbed_official | 126:549ba18ddd81 | 48 | */ |
| mbed_official | 126:549ba18ddd81 | 49 | |
| mbed_official | 126:549ba18ddd81 | 50 | /** @defgroup SPI_Private_TypesDefinitions |
| mbed_official | 126:549ba18ddd81 | 51 | * @{ |
| mbed_official | 126:549ba18ddd81 | 52 | */ |
| mbed_official | 126:549ba18ddd81 | 53 | |
| mbed_official | 126:549ba18ddd81 | 54 | /** |
| mbed_official | 126:549ba18ddd81 | 55 | * @} |
| mbed_official | 126:549ba18ddd81 | 56 | */ |
| mbed_official | 126:549ba18ddd81 | 57 | |
| mbed_official | 126:549ba18ddd81 | 58 | |
| mbed_official | 126:549ba18ddd81 | 59 | /** @defgroup SPI_Private_Defines |
| mbed_official | 126:549ba18ddd81 | 60 | * @{ |
| mbed_official | 126:549ba18ddd81 | 61 | */ |
| mbed_official | 126:549ba18ddd81 | 62 | |
| mbed_official | 126:549ba18ddd81 | 63 | /* SPI SPE mask */ |
| mbed_official | 126:549ba18ddd81 | 64 | #define CR1_SPE_Set ((uint16_t)0x0040) |
| mbed_official | 126:549ba18ddd81 | 65 | #define CR1_SPE_Reset ((uint16_t)0xFFBF) |
| mbed_official | 126:549ba18ddd81 | 66 | |
| mbed_official | 126:549ba18ddd81 | 67 | /* I2S I2SE mask */ |
| mbed_official | 126:549ba18ddd81 | 68 | #define I2SCFGR_I2SE_Set ((uint16_t)0x0400) |
| mbed_official | 126:549ba18ddd81 | 69 | #define I2SCFGR_I2SE_Reset ((uint16_t)0xFBFF) |
| mbed_official | 126:549ba18ddd81 | 70 | |
| mbed_official | 126:549ba18ddd81 | 71 | /* SPI CRCNext mask */ |
| mbed_official | 126:549ba18ddd81 | 72 | #define CR1_CRCNext_Set ((uint16_t)0x1000) |
| mbed_official | 126:549ba18ddd81 | 73 | |
| mbed_official | 126:549ba18ddd81 | 74 | /* SPI CRCEN mask */ |
| mbed_official | 126:549ba18ddd81 | 75 | #define CR1_CRCEN_Set ((uint16_t)0x2000) |
| mbed_official | 126:549ba18ddd81 | 76 | #define CR1_CRCEN_Reset ((uint16_t)0xDFFF) |
| mbed_official | 126:549ba18ddd81 | 77 | |
| mbed_official | 126:549ba18ddd81 | 78 | /* SPI SSOE mask */ |
| mbed_official | 126:549ba18ddd81 | 79 | #define CR2_SSOE_Set ((uint16_t)0x0004) |
| mbed_official | 126:549ba18ddd81 | 80 | #define CR2_SSOE_Reset ((uint16_t)0xFFFB) |
| mbed_official | 126:549ba18ddd81 | 81 | |
| mbed_official | 126:549ba18ddd81 | 82 | /* SPI registers Masks */ |
| mbed_official | 126:549ba18ddd81 | 83 | #define CR1_CLEAR_Mask ((uint16_t)0x3040) |
| mbed_official | 126:549ba18ddd81 | 84 | #define I2SCFGR_CLEAR_Mask ((uint16_t)0xF040) |
| mbed_official | 126:549ba18ddd81 | 85 | |
| mbed_official | 126:549ba18ddd81 | 86 | /* SPI or I2S mode selection masks */ |
| mbed_official | 126:549ba18ddd81 | 87 | #define SPI_Mode_Select ((uint16_t)0xF7FF) |
| mbed_official | 126:549ba18ddd81 | 88 | #define I2S_Mode_Select ((uint16_t)0x0800) |
| mbed_official | 126:549ba18ddd81 | 89 | |
| mbed_official | 126:549ba18ddd81 | 90 | /* I2S clock source selection masks */ |
| mbed_official | 126:549ba18ddd81 | 91 | #define I2S2_CLOCK_SRC ((uint32_t)(0x00020000)) |
| mbed_official | 126:549ba18ddd81 | 92 | #define I2S3_CLOCK_SRC ((uint32_t)(0x00040000)) |
| mbed_official | 126:549ba18ddd81 | 93 | #define I2S_MUL_MASK ((uint32_t)(0x0000F000)) |
| mbed_official | 126:549ba18ddd81 | 94 | #define I2S_DIV_MASK ((uint32_t)(0x000000F0)) |
| mbed_official | 126:549ba18ddd81 | 95 | |
| mbed_official | 126:549ba18ddd81 | 96 | /** |
| mbed_official | 126:549ba18ddd81 | 97 | * @} |
| mbed_official | 126:549ba18ddd81 | 98 | */ |
| mbed_official | 126:549ba18ddd81 | 99 | |
| mbed_official | 126:549ba18ddd81 | 100 | /** @defgroup SPI_Private_Macros |
| mbed_official | 126:549ba18ddd81 | 101 | * @{ |
| mbed_official | 126:549ba18ddd81 | 102 | */ |
| mbed_official | 126:549ba18ddd81 | 103 | |
| mbed_official | 126:549ba18ddd81 | 104 | /** |
| mbed_official | 126:549ba18ddd81 | 105 | * @} |
| mbed_official | 126:549ba18ddd81 | 106 | */ |
| mbed_official | 126:549ba18ddd81 | 107 | |
| mbed_official | 126:549ba18ddd81 | 108 | /** @defgroup SPI_Private_Variables |
| mbed_official | 126:549ba18ddd81 | 109 | * @{ |
| mbed_official | 126:549ba18ddd81 | 110 | */ |
| mbed_official | 126:549ba18ddd81 | 111 | |
| mbed_official | 126:549ba18ddd81 | 112 | /** |
| mbed_official | 126:549ba18ddd81 | 113 | * @} |
| mbed_official | 126:549ba18ddd81 | 114 | */ |
| mbed_official | 126:549ba18ddd81 | 115 | |
| mbed_official | 126:549ba18ddd81 | 116 | /** @defgroup SPI_Private_FunctionPrototypes |
| mbed_official | 126:549ba18ddd81 | 117 | * @{ |
| mbed_official | 126:549ba18ddd81 | 118 | */ |
| mbed_official | 126:549ba18ddd81 | 119 | |
| mbed_official | 126:549ba18ddd81 | 120 | /** |
| mbed_official | 126:549ba18ddd81 | 121 | * @} |
| mbed_official | 126:549ba18ddd81 | 122 | */ |
| mbed_official | 126:549ba18ddd81 | 123 | |
| mbed_official | 126:549ba18ddd81 | 124 | /** @defgroup SPI_Private_Functions |
| mbed_official | 126:549ba18ddd81 | 125 | * @{ |
| mbed_official | 126:549ba18ddd81 | 126 | */ |
| mbed_official | 126:549ba18ddd81 | 127 | |
| mbed_official | 126:549ba18ddd81 | 128 | /** |
| mbed_official | 126:549ba18ddd81 | 129 | * @brief Deinitializes the SPIx peripheral registers to their default |
| mbed_official | 126:549ba18ddd81 | 130 | * reset values (Affects also the I2Ss). |
| mbed_official | 126:549ba18ddd81 | 131 | * @param SPIx: where x can be 1, 2 or 3 to select the SPI peripheral. |
| mbed_official | 126:549ba18ddd81 | 132 | * @retval None |
| mbed_official | 126:549ba18ddd81 | 133 | */ |
| mbed_official | 126:549ba18ddd81 | 134 | void SPI_I2S_DeInit(SPI_TypeDef* SPIx) |
| mbed_official | 126:549ba18ddd81 | 135 | { |
| mbed_official | 126:549ba18ddd81 | 136 | /* Check the parameters */ |
| mbed_official | 126:549ba18ddd81 | 137 | assert_param(IS_SPI_ALL_PERIPH(SPIx)); |
| mbed_official | 126:549ba18ddd81 | 138 | |
| mbed_official | 126:549ba18ddd81 | 139 | if (SPIx == SPI1) |
| mbed_official | 126:549ba18ddd81 | 140 | { |
| mbed_official | 126:549ba18ddd81 | 141 | /* Enable SPI1 reset state */ |
| mbed_official | 126:549ba18ddd81 | 142 | RCC_APB2PeriphResetCmd(RCC_APB2Periph_SPI1, ENABLE); |
| mbed_official | 126:549ba18ddd81 | 143 | /* Release SPI1 from reset state */ |
| mbed_official | 126:549ba18ddd81 | 144 | RCC_APB2PeriphResetCmd(RCC_APB2Periph_SPI1, DISABLE); |
| mbed_official | 126:549ba18ddd81 | 145 | } |
| mbed_official | 126:549ba18ddd81 | 146 | else if (SPIx == SPI2) |
| mbed_official | 126:549ba18ddd81 | 147 | { |
| mbed_official | 126:549ba18ddd81 | 148 | /* Enable SPI2 reset state */ |
| mbed_official | 126:549ba18ddd81 | 149 | RCC_APB1PeriphResetCmd(RCC_APB1Periph_SPI2, ENABLE); |
| mbed_official | 126:549ba18ddd81 | 150 | /* Release SPI2 from reset state */ |
| mbed_official | 126:549ba18ddd81 | 151 | RCC_APB1PeriphResetCmd(RCC_APB1Periph_SPI2, DISABLE); |
| mbed_official | 126:549ba18ddd81 | 152 | } |
| mbed_official | 126:549ba18ddd81 | 153 | else |
| mbed_official | 126:549ba18ddd81 | 154 | { |
| mbed_official | 126:549ba18ddd81 | 155 | if (SPIx == SPI3) |
| mbed_official | 126:549ba18ddd81 | 156 | { |
| mbed_official | 126:549ba18ddd81 | 157 | /* Enable SPI3 reset state */ |
| mbed_official | 126:549ba18ddd81 | 158 | RCC_APB1PeriphResetCmd(RCC_APB1Periph_SPI3, ENABLE); |
| mbed_official | 126:549ba18ddd81 | 159 | /* Release SPI3 from reset state */ |
| mbed_official | 126:549ba18ddd81 | 160 | RCC_APB1PeriphResetCmd(RCC_APB1Periph_SPI3, DISABLE); |
| mbed_official | 126:549ba18ddd81 | 161 | } |
| mbed_official | 126:549ba18ddd81 | 162 | } |
| mbed_official | 126:549ba18ddd81 | 163 | } |
| mbed_official | 126:549ba18ddd81 | 164 | |
| mbed_official | 126:549ba18ddd81 | 165 | /** |
| mbed_official | 126:549ba18ddd81 | 166 | * @brief Initializes the SPIx peripheral according to the specified |
| mbed_official | 126:549ba18ddd81 | 167 | * parameters in the SPI_InitStruct. |
| mbed_official | 126:549ba18ddd81 | 168 | * @param SPIx: where x can be 1, 2 or 3 to select the SPI peripheral. |
| mbed_official | 126:549ba18ddd81 | 169 | * @param SPI_InitStruct: pointer to a SPI_InitTypeDef structure that |
| mbed_official | 126:549ba18ddd81 | 170 | * contains the configuration information for the specified SPI peripheral. |
| mbed_official | 126:549ba18ddd81 | 171 | * @retval None |
| mbed_official | 126:549ba18ddd81 | 172 | */ |
| mbed_official | 126:549ba18ddd81 | 173 | void SPI_Init(SPI_TypeDef* SPIx, SPI_InitTypeDef* SPI_InitStruct) |
| mbed_official | 126:549ba18ddd81 | 174 | { |
| mbed_official | 126:549ba18ddd81 | 175 | uint16_t tmpreg = 0; |
| mbed_official | 126:549ba18ddd81 | 176 | |
| mbed_official | 126:549ba18ddd81 | 177 | /* check the parameters */ |
| mbed_official | 126:549ba18ddd81 | 178 | assert_param(IS_SPI_ALL_PERIPH(SPIx)); |
| mbed_official | 126:549ba18ddd81 | 179 | |
| mbed_official | 126:549ba18ddd81 | 180 | /* Check the SPI parameters */ |
| mbed_official | 126:549ba18ddd81 | 181 | assert_param(IS_SPI_DIRECTION_MODE(SPI_InitStruct->SPI_Direction)); |
| mbed_official | 126:549ba18ddd81 | 182 | assert_param(IS_SPI_MODE(SPI_InitStruct->SPI_Mode)); |
| mbed_official | 126:549ba18ddd81 | 183 | assert_param(IS_SPI_DATASIZE(SPI_InitStruct->SPI_DataSize)); |
| mbed_official | 126:549ba18ddd81 | 184 | assert_param(IS_SPI_CPOL(SPI_InitStruct->SPI_CPOL)); |
| mbed_official | 126:549ba18ddd81 | 185 | assert_param(IS_SPI_CPHA(SPI_InitStruct->SPI_CPHA)); |
| mbed_official | 126:549ba18ddd81 | 186 | assert_param(IS_SPI_NSS(SPI_InitStruct->SPI_NSS)); |
| mbed_official | 126:549ba18ddd81 | 187 | assert_param(IS_SPI_BAUDRATE_PRESCALER(SPI_InitStruct->SPI_BaudRatePrescaler)); |
| mbed_official | 126:549ba18ddd81 | 188 | assert_param(IS_SPI_FIRST_BIT(SPI_InitStruct->SPI_FirstBit)); |
| mbed_official | 126:549ba18ddd81 | 189 | assert_param(IS_SPI_CRC_POLYNOMIAL(SPI_InitStruct->SPI_CRCPolynomial)); |
| mbed_official | 126:549ba18ddd81 | 190 | |
| mbed_official | 126:549ba18ddd81 | 191 | /*---------------------------- SPIx CR1 Configuration ------------------------*/ |
| mbed_official | 126:549ba18ddd81 | 192 | /* Get the SPIx CR1 value */ |
| mbed_official | 126:549ba18ddd81 | 193 | tmpreg = SPIx->CR1; |
| mbed_official | 126:549ba18ddd81 | 194 | /* Clear BIDIMode, BIDIOE, RxONLY, SSM, SSI, LSBFirst, BR, MSTR, CPOL and CPHA bits */ |
| mbed_official | 126:549ba18ddd81 | 195 | tmpreg &= CR1_CLEAR_Mask; |
| mbed_official | 126:549ba18ddd81 | 196 | /* Configure SPIx: direction, NSS management, first transmitted bit, BaudRate prescaler |
| mbed_official | 126:549ba18ddd81 | 197 | master/salve mode, CPOL and CPHA */ |
| mbed_official | 126:549ba18ddd81 | 198 | /* Set BIDImode, BIDIOE and RxONLY bits according to SPI_Direction value */ |
| mbed_official | 126:549ba18ddd81 | 199 | /* Set SSM, SSI and MSTR bits according to SPI_Mode and SPI_NSS values */ |
| mbed_official | 126:549ba18ddd81 | 200 | /* Set LSBFirst bit according to SPI_FirstBit value */ |
| mbed_official | 126:549ba18ddd81 | 201 | /* Set BR bits according to SPI_BaudRatePrescaler value */ |
| mbed_official | 126:549ba18ddd81 | 202 | /* Set CPOL bit according to SPI_CPOL value */ |
| mbed_official | 126:549ba18ddd81 | 203 | /* Set CPHA bit according to SPI_CPHA value */ |
| mbed_official | 126:549ba18ddd81 | 204 | tmpreg |= (uint16_t)((uint32_t)SPI_InitStruct->SPI_Direction | SPI_InitStruct->SPI_Mode | |
| mbed_official | 126:549ba18ddd81 | 205 | SPI_InitStruct->SPI_DataSize | SPI_InitStruct->SPI_CPOL | |
| mbed_official | 126:549ba18ddd81 | 206 | SPI_InitStruct->SPI_CPHA | SPI_InitStruct->SPI_NSS | |
| mbed_official | 126:549ba18ddd81 | 207 | SPI_InitStruct->SPI_BaudRatePrescaler | SPI_InitStruct->SPI_FirstBit); |
| mbed_official | 126:549ba18ddd81 | 208 | /* Write to SPIx CR1 */ |
| mbed_official | 126:549ba18ddd81 | 209 | SPIx->CR1 = tmpreg; |
| mbed_official | 126:549ba18ddd81 | 210 | |
| mbed_official | 126:549ba18ddd81 | 211 | /* Activate the SPI mode (Reset I2SMOD bit in I2SCFGR register) */ |
| mbed_official | 126:549ba18ddd81 | 212 | SPIx->I2SCFGR &= SPI_Mode_Select; |
| mbed_official | 126:549ba18ddd81 | 213 | |
| mbed_official | 126:549ba18ddd81 | 214 | /*---------------------------- SPIx CRCPOLY Configuration --------------------*/ |
| mbed_official | 126:549ba18ddd81 | 215 | /* Write to SPIx CRCPOLY */ |
| mbed_official | 126:549ba18ddd81 | 216 | SPIx->CRCPR = SPI_InitStruct->SPI_CRCPolynomial; |
| mbed_official | 126:549ba18ddd81 | 217 | } |
| mbed_official | 126:549ba18ddd81 | 218 | |
| mbed_official | 126:549ba18ddd81 | 219 | /** |
| mbed_official | 126:549ba18ddd81 | 220 | * @brief Initializes the SPIx peripheral according to the specified |
| mbed_official | 126:549ba18ddd81 | 221 | * parameters in the I2S_InitStruct. |
| mbed_official | 126:549ba18ddd81 | 222 | * @param SPIx: where x can be 2 or 3 to select the SPI peripheral |
| mbed_official | 126:549ba18ddd81 | 223 | * (configured in I2S mode). |
| mbed_official | 126:549ba18ddd81 | 224 | * @param I2S_InitStruct: pointer to an I2S_InitTypeDef structure that |
| mbed_official | 126:549ba18ddd81 | 225 | * contains the configuration information for the specified SPI peripheral |
| mbed_official | 126:549ba18ddd81 | 226 | * configured in I2S mode. |
| mbed_official | 126:549ba18ddd81 | 227 | * @note |
| mbed_official | 126:549ba18ddd81 | 228 | * The function calculates the optimal prescaler needed to obtain the most |
| mbed_official | 126:549ba18ddd81 | 229 | * accurate audio frequency (depending on the I2S clock source, the PLL values |
| mbed_official | 126:549ba18ddd81 | 230 | * and the product configuration). But in case the prescaler value is greater |
| mbed_official | 126:549ba18ddd81 | 231 | * than 511, the default value (0x02) will be configured instead. * |
| mbed_official | 126:549ba18ddd81 | 232 | * @retval None |
| mbed_official | 126:549ba18ddd81 | 233 | */ |
| mbed_official | 126:549ba18ddd81 | 234 | void I2S_Init(SPI_TypeDef* SPIx, I2S_InitTypeDef* I2S_InitStruct) |
| mbed_official | 126:549ba18ddd81 | 235 | { |
| mbed_official | 126:549ba18ddd81 | 236 | uint16_t tmpreg = 0, i2sdiv = 2, i2sodd = 0, packetlength = 1; |
| mbed_official | 126:549ba18ddd81 | 237 | uint32_t tmp = 0; |
| mbed_official | 126:549ba18ddd81 | 238 | RCC_ClocksTypeDef RCC_Clocks; |
| mbed_official | 126:549ba18ddd81 | 239 | uint32_t sourceclock = 0; |
| mbed_official | 126:549ba18ddd81 | 240 | |
| mbed_official | 126:549ba18ddd81 | 241 | /* Check the I2S parameters */ |
| mbed_official | 126:549ba18ddd81 | 242 | assert_param(IS_SPI_23_PERIPH(SPIx)); |
| mbed_official | 126:549ba18ddd81 | 243 | assert_param(IS_I2S_MODE(I2S_InitStruct->I2S_Mode)); |
| mbed_official | 126:549ba18ddd81 | 244 | assert_param(IS_I2S_STANDARD(I2S_InitStruct->I2S_Standard)); |
| mbed_official | 126:549ba18ddd81 | 245 | assert_param(IS_I2S_DATA_FORMAT(I2S_InitStruct->I2S_DataFormat)); |
| mbed_official | 126:549ba18ddd81 | 246 | assert_param(IS_I2S_MCLK_OUTPUT(I2S_InitStruct->I2S_MCLKOutput)); |
| mbed_official | 126:549ba18ddd81 | 247 | assert_param(IS_I2S_AUDIO_FREQ(I2S_InitStruct->I2S_AudioFreq)); |
| mbed_official | 126:549ba18ddd81 | 248 | assert_param(IS_I2S_CPOL(I2S_InitStruct->I2S_CPOL)); |
| mbed_official | 126:549ba18ddd81 | 249 | |
| mbed_official | 126:549ba18ddd81 | 250 | /*----------------------- SPIx I2SCFGR & I2SPR Configuration -----------------*/ |
| mbed_official | 126:549ba18ddd81 | 251 | /* Clear I2SMOD, I2SE, I2SCFG, PCMSYNC, I2SSTD, CKPOL, DATLEN and CHLEN bits */ |
| mbed_official | 126:549ba18ddd81 | 252 | SPIx->I2SCFGR &= I2SCFGR_CLEAR_Mask; |
| mbed_official | 126:549ba18ddd81 | 253 | SPIx->I2SPR = 0x0002; |
| mbed_official | 126:549ba18ddd81 | 254 | |
| mbed_official | 126:549ba18ddd81 | 255 | /* Get the I2SCFGR register value */ |
| mbed_official | 126:549ba18ddd81 | 256 | tmpreg = SPIx->I2SCFGR; |
| mbed_official | 126:549ba18ddd81 | 257 | |
| mbed_official | 126:549ba18ddd81 | 258 | /* If the default value has to be written, reinitialize i2sdiv and i2sodd*/ |
| mbed_official | 126:549ba18ddd81 | 259 | if(I2S_InitStruct->I2S_AudioFreq == I2S_AudioFreq_Default) |
| mbed_official | 126:549ba18ddd81 | 260 | { |
| mbed_official | 126:549ba18ddd81 | 261 | i2sodd = (uint16_t)0; |
| mbed_official | 126:549ba18ddd81 | 262 | i2sdiv = (uint16_t)2; |
| mbed_official | 126:549ba18ddd81 | 263 | } |
| mbed_official | 126:549ba18ddd81 | 264 | /* If the requested audio frequency is not the default, compute the prescaler */ |
| mbed_official | 126:549ba18ddd81 | 265 | else |
| mbed_official | 126:549ba18ddd81 | 266 | { |
| mbed_official | 126:549ba18ddd81 | 267 | /* Check the frame length (For the Prescaler computing) */ |
| mbed_official | 126:549ba18ddd81 | 268 | if(I2S_InitStruct->I2S_DataFormat == I2S_DataFormat_16b) |
| mbed_official | 126:549ba18ddd81 | 269 | { |
| mbed_official | 126:549ba18ddd81 | 270 | /* Packet length is 16 bits */ |
| mbed_official | 126:549ba18ddd81 | 271 | packetlength = 1; |
| mbed_official | 126:549ba18ddd81 | 272 | } |
| mbed_official | 126:549ba18ddd81 | 273 | else |
| mbed_official | 126:549ba18ddd81 | 274 | { |
| mbed_official | 126:549ba18ddd81 | 275 | /* Packet length is 32 bits */ |
| mbed_official | 126:549ba18ddd81 | 276 | packetlength = 2; |
| mbed_official | 126:549ba18ddd81 | 277 | } |
| mbed_official | 126:549ba18ddd81 | 278 | |
| mbed_official | 126:549ba18ddd81 | 279 | /* Get the I2S clock source mask depending on the peripheral number */ |
| mbed_official | 126:549ba18ddd81 | 280 | if(((uint32_t)SPIx) == SPI2_BASE) |
| mbed_official | 126:549ba18ddd81 | 281 | { |
| mbed_official | 126:549ba18ddd81 | 282 | /* The mask is relative to I2S2 */ |
| mbed_official | 126:549ba18ddd81 | 283 | tmp = I2S2_CLOCK_SRC; |
| mbed_official | 126:549ba18ddd81 | 284 | } |
| mbed_official | 126:549ba18ddd81 | 285 | else |
| mbed_official | 126:549ba18ddd81 | 286 | { |
| mbed_official | 126:549ba18ddd81 | 287 | /* The mask is relative to I2S3 */ |
| mbed_official | 126:549ba18ddd81 | 288 | tmp = I2S3_CLOCK_SRC; |
| mbed_official | 126:549ba18ddd81 | 289 | } |
| mbed_official | 126:549ba18ddd81 | 290 | |
| mbed_official | 126:549ba18ddd81 | 291 | /* Check the I2S clock source configuration depending on the Device: |
| mbed_official | 126:549ba18ddd81 | 292 | Only Connectivity line devices have the PLL3 VCO clock */ |
| mbed_official | 126:549ba18ddd81 | 293 | #ifdef STM32F10X_CL |
| mbed_official | 126:549ba18ddd81 | 294 | if((RCC->CFGR2 & tmp) != 0) |
| mbed_official | 126:549ba18ddd81 | 295 | { |
| mbed_official | 126:549ba18ddd81 | 296 | /* Get the configuration bits of RCC PLL3 multiplier */ |
| mbed_official | 126:549ba18ddd81 | 297 | tmp = (uint32_t)((RCC->CFGR2 & I2S_MUL_MASK) >> 12); |
| mbed_official | 126:549ba18ddd81 | 298 | |
| mbed_official | 126:549ba18ddd81 | 299 | /* Get the value of the PLL3 multiplier */ |
| mbed_official | 126:549ba18ddd81 | 300 | if((tmp > 5) && (tmp < 15)) |
| mbed_official | 126:549ba18ddd81 | 301 | { |
| mbed_official | 126:549ba18ddd81 | 302 | /* Multiplier is between 8 and 14 (value 15 is forbidden) */ |
| mbed_official | 126:549ba18ddd81 | 303 | tmp += 2; |
| mbed_official | 126:549ba18ddd81 | 304 | } |
| mbed_official | 126:549ba18ddd81 | 305 | else |
| mbed_official | 126:549ba18ddd81 | 306 | { |
| mbed_official | 126:549ba18ddd81 | 307 | if (tmp == 15) |
| mbed_official | 126:549ba18ddd81 | 308 | { |
| mbed_official | 126:549ba18ddd81 | 309 | /* Multiplier is 20 */ |
| mbed_official | 126:549ba18ddd81 | 310 | tmp = 20; |
| mbed_official | 126:549ba18ddd81 | 311 | } |
| mbed_official | 126:549ba18ddd81 | 312 | } |
| mbed_official | 126:549ba18ddd81 | 313 | /* Get the PREDIV2 value */ |
| mbed_official | 126:549ba18ddd81 | 314 | sourceclock = (uint32_t)(((RCC->CFGR2 & I2S_DIV_MASK) >> 4) + 1); |
| mbed_official | 126:549ba18ddd81 | 315 | |
| mbed_official | 126:549ba18ddd81 | 316 | /* Calculate the Source Clock frequency based on PLL3 and PREDIV2 values */ |
| mbed_official | 126:549ba18ddd81 | 317 | sourceclock = (uint32_t) ((HSE_Value / sourceclock) * tmp * 2); |
| mbed_official | 126:549ba18ddd81 | 318 | } |
| mbed_official | 126:549ba18ddd81 | 319 | else |
| mbed_official | 126:549ba18ddd81 | 320 | { |
| mbed_official | 126:549ba18ddd81 | 321 | /* I2S Clock source is System clock: Get System Clock frequency */ |
| mbed_official | 126:549ba18ddd81 | 322 | RCC_GetClocksFreq(&RCC_Clocks); |
| mbed_official | 126:549ba18ddd81 | 323 | |
| mbed_official | 126:549ba18ddd81 | 324 | /* Get the source clock value: based on System Clock value */ |
| mbed_official | 126:549ba18ddd81 | 325 | sourceclock = RCC_Clocks.SYSCLK_Frequency; |
| mbed_official | 126:549ba18ddd81 | 326 | } |
| mbed_official | 126:549ba18ddd81 | 327 | #else /* STM32F10X_HD */ |
| mbed_official | 126:549ba18ddd81 | 328 | /* I2S Clock source is System clock: Get System Clock frequency */ |
| mbed_official | 126:549ba18ddd81 | 329 | RCC_GetClocksFreq(&RCC_Clocks); |
| mbed_official | 126:549ba18ddd81 | 330 | |
| mbed_official | 126:549ba18ddd81 | 331 | /* Get the source clock value: based on System Clock value */ |
| mbed_official | 126:549ba18ddd81 | 332 | sourceclock = RCC_Clocks.SYSCLK_Frequency; |
| mbed_official | 126:549ba18ddd81 | 333 | #endif /* STM32F10X_CL */ |
| mbed_official | 126:549ba18ddd81 | 334 | |
| mbed_official | 126:549ba18ddd81 | 335 | /* Compute the Real divider depending on the MCLK output state with a floating point */ |
| mbed_official | 126:549ba18ddd81 | 336 | if(I2S_InitStruct->I2S_MCLKOutput == I2S_MCLKOutput_Enable) |
| mbed_official | 126:549ba18ddd81 | 337 | { |
| mbed_official | 126:549ba18ddd81 | 338 | /* MCLK output is enabled */ |
| mbed_official | 126:549ba18ddd81 | 339 | tmp = (uint16_t)(((((sourceclock / 256) * 10) / I2S_InitStruct->I2S_AudioFreq)) + 5); |
| mbed_official | 126:549ba18ddd81 | 340 | } |
| mbed_official | 126:549ba18ddd81 | 341 | else |
| mbed_official | 126:549ba18ddd81 | 342 | { |
| mbed_official | 126:549ba18ddd81 | 343 | /* MCLK output is disabled */ |
| mbed_official | 126:549ba18ddd81 | 344 | tmp = (uint16_t)(((((sourceclock / (32 * packetlength)) *10 ) / I2S_InitStruct->I2S_AudioFreq)) + 5); |
| mbed_official | 126:549ba18ddd81 | 345 | } |
| mbed_official | 126:549ba18ddd81 | 346 | |
| mbed_official | 126:549ba18ddd81 | 347 | /* Remove the floating point */ |
| mbed_official | 126:549ba18ddd81 | 348 | tmp = tmp / 10; |
| mbed_official | 126:549ba18ddd81 | 349 | |
| mbed_official | 126:549ba18ddd81 | 350 | /* Check the parity of the divider */ |
| mbed_official | 126:549ba18ddd81 | 351 | i2sodd = (uint16_t)(tmp & (uint16_t)0x0001); |
| mbed_official | 126:549ba18ddd81 | 352 | |
| mbed_official | 126:549ba18ddd81 | 353 | /* Compute the i2sdiv prescaler */ |
| mbed_official | 126:549ba18ddd81 | 354 | i2sdiv = (uint16_t)((tmp - i2sodd) / 2); |
| mbed_official | 126:549ba18ddd81 | 355 | |
| mbed_official | 126:549ba18ddd81 | 356 | /* Get the Mask for the Odd bit (SPI_I2SPR[8]) register */ |
| mbed_official | 126:549ba18ddd81 | 357 | i2sodd = (uint16_t) (i2sodd << 8); |
| mbed_official | 126:549ba18ddd81 | 358 | } |
| mbed_official | 126:549ba18ddd81 | 359 | |
| mbed_official | 126:549ba18ddd81 | 360 | /* Test if the divider is 1 or 0 or greater than 0xFF */ |
| mbed_official | 126:549ba18ddd81 | 361 | if ((i2sdiv < 2) || (i2sdiv > 0xFF)) |
| mbed_official | 126:549ba18ddd81 | 362 | { |
| mbed_official | 126:549ba18ddd81 | 363 | /* Set the default values */ |
| mbed_official | 126:549ba18ddd81 | 364 | i2sdiv = 2; |
| mbed_official | 126:549ba18ddd81 | 365 | i2sodd = 0; |
| mbed_official | 126:549ba18ddd81 | 366 | } |
| mbed_official | 126:549ba18ddd81 | 367 | |
| mbed_official | 126:549ba18ddd81 | 368 | /* Write to SPIx I2SPR register the computed value */ |
| mbed_official | 126:549ba18ddd81 | 369 | SPIx->I2SPR = (uint16_t)(i2sdiv | (uint16_t)(i2sodd | (uint16_t)I2S_InitStruct->I2S_MCLKOutput)); |
| mbed_official | 126:549ba18ddd81 | 370 | |
| mbed_official | 126:549ba18ddd81 | 371 | /* Configure the I2S with the SPI_InitStruct values */ |
| mbed_official | 126:549ba18ddd81 | 372 | tmpreg |= (uint16_t)(I2S_Mode_Select | (uint16_t)(I2S_InitStruct->I2S_Mode | \ |
| mbed_official | 126:549ba18ddd81 | 373 | (uint16_t)(I2S_InitStruct->I2S_Standard | (uint16_t)(I2S_InitStruct->I2S_DataFormat | \ |
| mbed_official | 126:549ba18ddd81 | 374 | (uint16_t)I2S_InitStruct->I2S_CPOL)))); |
| mbed_official | 126:549ba18ddd81 | 375 | |
| mbed_official | 126:549ba18ddd81 | 376 | /* Write to SPIx I2SCFGR */ |
| mbed_official | 126:549ba18ddd81 | 377 | SPIx->I2SCFGR = tmpreg; |
| mbed_official | 126:549ba18ddd81 | 378 | } |
| mbed_official | 126:549ba18ddd81 | 379 | |
| mbed_official | 126:549ba18ddd81 | 380 | /** |
| mbed_official | 126:549ba18ddd81 | 381 | * @brief Fills each SPI_InitStruct member with its default value. |
| mbed_official | 126:549ba18ddd81 | 382 | * @param SPI_InitStruct : pointer to a SPI_InitTypeDef structure which will be initialized. |
| mbed_official | 126:549ba18ddd81 | 383 | * @retval None |
| mbed_official | 126:549ba18ddd81 | 384 | */ |
| mbed_official | 126:549ba18ddd81 | 385 | void SPI_StructInit(SPI_InitTypeDef* SPI_InitStruct) |
| mbed_official | 126:549ba18ddd81 | 386 | { |
| mbed_official | 126:549ba18ddd81 | 387 | /*--------------- Reset SPI init structure parameters values -----------------*/ |
| mbed_official | 126:549ba18ddd81 | 388 | /* Initialize the SPI_Direction member */ |
| mbed_official | 126:549ba18ddd81 | 389 | SPI_InitStruct->SPI_Direction = SPI_Direction_2Lines_FullDuplex; |
| mbed_official | 126:549ba18ddd81 | 390 | /* initialize the SPI_Mode member */ |
| mbed_official | 126:549ba18ddd81 | 391 | SPI_InitStruct->SPI_Mode = SPI_Mode_Slave; |
| mbed_official | 126:549ba18ddd81 | 392 | /* initialize the SPI_DataSize member */ |
| mbed_official | 126:549ba18ddd81 | 393 | SPI_InitStruct->SPI_DataSize = SPI_DataSize_8b; |
| mbed_official | 126:549ba18ddd81 | 394 | /* Initialize the SPI_CPOL member */ |
| mbed_official | 126:549ba18ddd81 | 395 | SPI_InitStruct->SPI_CPOL = SPI_CPOL_Low; |
| mbed_official | 126:549ba18ddd81 | 396 | /* Initialize the SPI_CPHA member */ |
| mbed_official | 126:549ba18ddd81 | 397 | SPI_InitStruct->SPI_CPHA = SPI_CPHA_1Edge; |
| mbed_official | 126:549ba18ddd81 | 398 | /* Initialize the SPI_NSS member */ |
| mbed_official | 126:549ba18ddd81 | 399 | SPI_InitStruct->SPI_NSS = SPI_NSS_Hard; |
| mbed_official | 126:549ba18ddd81 | 400 | /* Initialize the SPI_BaudRatePrescaler member */ |
| mbed_official | 126:549ba18ddd81 | 401 | SPI_InitStruct->SPI_BaudRatePrescaler = SPI_BaudRatePrescaler_2; |
| mbed_official | 126:549ba18ddd81 | 402 | /* Initialize the SPI_FirstBit member */ |
| mbed_official | 126:549ba18ddd81 | 403 | SPI_InitStruct->SPI_FirstBit = SPI_FirstBit_MSB; |
| mbed_official | 126:549ba18ddd81 | 404 | /* Initialize the SPI_CRCPolynomial member */ |
| mbed_official | 126:549ba18ddd81 | 405 | SPI_InitStruct->SPI_CRCPolynomial = 7; |
| mbed_official | 126:549ba18ddd81 | 406 | } |
| mbed_official | 126:549ba18ddd81 | 407 | |
| mbed_official | 126:549ba18ddd81 | 408 | /** |
| mbed_official | 126:549ba18ddd81 | 409 | * @brief Fills each I2S_InitStruct member with its default value. |
| mbed_official | 126:549ba18ddd81 | 410 | * @param I2S_InitStruct : pointer to a I2S_InitTypeDef structure which will be initialized. |
| mbed_official | 126:549ba18ddd81 | 411 | * @retval None |
| mbed_official | 126:549ba18ddd81 | 412 | */ |
| mbed_official | 126:549ba18ddd81 | 413 | void I2S_StructInit(I2S_InitTypeDef* I2S_InitStruct) |
| mbed_official | 126:549ba18ddd81 | 414 | { |
| mbed_official | 126:549ba18ddd81 | 415 | /*--------------- Reset I2S init structure parameters values -----------------*/ |
| mbed_official | 126:549ba18ddd81 | 416 | /* Initialize the I2S_Mode member */ |
| mbed_official | 126:549ba18ddd81 | 417 | I2S_InitStruct->I2S_Mode = I2S_Mode_SlaveTx; |
| mbed_official | 126:549ba18ddd81 | 418 | |
| mbed_official | 126:549ba18ddd81 | 419 | /* Initialize the I2S_Standard member */ |
| mbed_official | 126:549ba18ddd81 | 420 | I2S_InitStruct->I2S_Standard = I2S_Standard_Phillips; |
| mbed_official | 126:549ba18ddd81 | 421 | |
| mbed_official | 126:549ba18ddd81 | 422 | /* Initialize the I2S_DataFormat member */ |
| mbed_official | 126:549ba18ddd81 | 423 | I2S_InitStruct->I2S_DataFormat = I2S_DataFormat_16b; |
| mbed_official | 126:549ba18ddd81 | 424 | |
| mbed_official | 126:549ba18ddd81 | 425 | /* Initialize the I2S_MCLKOutput member */ |
| mbed_official | 126:549ba18ddd81 | 426 | I2S_InitStruct->I2S_MCLKOutput = I2S_MCLKOutput_Disable; |
| mbed_official | 126:549ba18ddd81 | 427 | |
| mbed_official | 126:549ba18ddd81 | 428 | /* Initialize the I2S_AudioFreq member */ |
| mbed_official | 126:549ba18ddd81 | 429 | I2S_InitStruct->I2S_AudioFreq = I2S_AudioFreq_Default; |
| mbed_official | 126:549ba18ddd81 | 430 | |
| mbed_official | 126:549ba18ddd81 | 431 | /* Initialize the I2S_CPOL member */ |
| mbed_official | 126:549ba18ddd81 | 432 | I2S_InitStruct->I2S_CPOL = I2S_CPOL_Low; |
| mbed_official | 126:549ba18ddd81 | 433 | } |
| mbed_official | 126:549ba18ddd81 | 434 | |
| mbed_official | 126:549ba18ddd81 | 435 | /** |
| mbed_official | 126:549ba18ddd81 | 436 | * @brief Enables or disables the specified SPI peripheral. |
| mbed_official | 126:549ba18ddd81 | 437 | * @param SPIx: where x can be 1, 2 or 3 to select the SPI peripheral. |
| mbed_official | 126:549ba18ddd81 | 438 | * @param NewState: new state of the SPIx peripheral. |
| mbed_official | 126:549ba18ddd81 | 439 | * This parameter can be: ENABLE or DISABLE. |
| mbed_official | 126:549ba18ddd81 | 440 | * @retval None |
| mbed_official | 126:549ba18ddd81 | 441 | */ |
| mbed_official | 126:549ba18ddd81 | 442 | void SPI_Cmd(SPI_TypeDef* SPIx, FunctionalState NewState) |
| mbed_official | 126:549ba18ddd81 | 443 | { |
| mbed_official | 126:549ba18ddd81 | 444 | /* Check the parameters */ |
| mbed_official | 126:549ba18ddd81 | 445 | assert_param(IS_SPI_ALL_PERIPH(SPIx)); |
| mbed_official | 126:549ba18ddd81 | 446 | assert_param(IS_FUNCTIONAL_STATE(NewState)); |
| mbed_official | 126:549ba18ddd81 | 447 | if (NewState != DISABLE) |
| mbed_official | 126:549ba18ddd81 | 448 | { |
| mbed_official | 126:549ba18ddd81 | 449 | /* Enable the selected SPI peripheral */ |
| mbed_official | 126:549ba18ddd81 | 450 | SPIx->CR1 |= CR1_SPE_Set; |
| mbed_official | 126:549ba18ddd81 | 451 | } |
| mbed_official | 126:549ba18ddd81 | 452 | else |
| mbed_official | 126:549ba18ddd81 | 453 | { |
| mbed_official | 126:549ba18ddd81 | 454 | /* Disable the selected SPI peripheral */ |
| mbed_official | 126:549ba18ddd81 | 455 | SPIx->CR1 &= CR1_SPE_Reset; |
| mbed_official | 126:549ba18ddd81 | 456 | } |
| mbed_official | 126:549ba18ddd81 | 457 | } |
| mbed_official | 126:549ba18ddd81 | 458 | |
| mbed_official | 126:549ba18ddd81 | 459 | /** |
| mbed_official | 126:549ba18ddd81 | 460 | * @brief Enables or disables the specified SPI peripheral (in I2S mode). |
| mbed_official | 126:549ba18ddd81 | 461 | * @param SPIx: where x can be 2 or 3 to select the SPI peripheral. |
| mbed_official | 126:549ba18ddd81 | 462 | * @param NewState: new state of the SPIx peripheral. |
| mbed_official | 126:549ba18ddd81 | 463 | * This parameter can be: ENABLE or DISABLE. |
| mbed_official | 126:549ba18ddd81 | 464 | * @retval None |
| mbed_official | 126:549ba18ddd81 | 465 | */ |
| mbed_official | 126:549ba18ddd81 | 466 | void I2S_Cmd(SPI_TypeDef* SPIx, FunctionalState NewState) |
| mbed_official | 126:549ba18ddd81 | 467 | { |
| mbed_official | 126:549ba18ddd81 | 468 | /* Check the parameters */ |
| mbed_official | 126:549ba18ddd81 | 469 | assert_param(IS_SPI_23_PERIPH(SPIx)); |
| mbed_official | 126:549ba18ddd81 | 470 | assert_param(IS_FUNCTIONAL_STATE(NewState)); |
| mbed_official | 126:549ba18ddd81 | 471 | if (NewState != DISABLE) |
| mbed_official | 126:549ba18ddd81 | 472 | { |
| mbed_official | 126:549ba18ddd81 | 473 | /* Enable the selected SPI peripheral (in I2S mode) */ |
| mbed_official | 126:549ba18ddd81 | 474 | SPIx->I2SCFGR |= I2SCFGR_I2SE_Set; |
| mbed_official | 126:549ba18ddd81 | 475 | } |
| mbed_official | 126:549ba18ddd81 | 476 | else |
| mbed_official | 126:549ba18ddd81 | 477 | { |
| mbed_official | 126:549ba18ddd81 | 478 | /* Disable the selected SPI peripheral (in I2S mode) */ |
| mbed_official | 126:549ba18ddd81 | 479 | SPIx->I2SCFGR &= I2SCFGR_I2SE_Reset; |
| mbed_official | 126:549ba18ddd81 | 480 | } |
| mbed_official | 126:549ba18ddd81 | 481 | } |
| mbed_official | 126:549ba18ddd81 | 482 | |
| mbed_official | 126:549ba18ddd81 | 483 | /** |
| mbed_official | 126:549ba18ddd81 | 484 | * @brief Enables or disables the specified SPI/I2S interrupts. |
| mbed_official | 126:549ba18ddd81 | 485 | * @param SPIx: where x can be |
| mbed_official | 126:549ba18ddd81 | 486 | * - 1, 2 or 3 in SPI mode |
| mbed_official | 126:549ba18ddd81 | 487 | * - 2 or 3 in I2S mode |
| mbed_official | 126:549ba18ddd81 | 488 | * @param SPI_I2S_IT: specifies the SPI/I2S interrupt source to be enabled or disabled. |
| mbed_official | 126:549ba18ddd81 | 489 | * This parameter can be one of the following values: |
| mbed_official | 126:549ba18ddd81 | 490 | * @arg SPI_I2S_IT_TXE: Tx buffer empty interrupt mask |
| mbed_official | 126:549ba18ddd81 | 491 | * @arg SPI_I2S_IT_RXNE: Rx buffer not empty interrupt mask |
| mbed_official | 126:549ba18ddd81 | 492 | * @arg SPI_I2S_IT_ERR: Error interrupt mask |
| mbed_official | 126:549ba18ddd81 | 493 | * @param NewState: new state of the specified SPI/I2S interrupt. |
| mbed_official | 126:549ba18ddd81 | 494 | * This parameter can be: ENABLE or DISABLE. |
| mbed_official | 126:549ba18ddd81 | 495 | * @retval None |
| mbed_official | 126:549ba18ddd81 | 496 | */ |
| mbed_official | 126:549ba18ddd81 | 497 | void SPI_I2S_ITConfig(SPI_TypeDef* SPIx, uint8_t SPI_I2S_IT, FunctionalState NewState) |
| mbed_official | 126:549ba18ddd81 | 498 | { |
| mbed_official | 126:549ba18ddd81 | 499 | uint16_t itpos = 0, itmask = 0 ; |
| mbed_official | 126:549ba18ddd81 | 500 | /* Check the parameters */ |
| mbed_official | 126:549ba18ddd81 | 501 | assert_param(IS_SPI_ALL_PERIPH(SPIx)); |
| mbed_official | 126:549ba18ddd81 | 502 | assert_param(IS_FUNCTIONAL_STATE(NewState)); |
| mbed_official | 126:549ba18ddd81 | 503 | assert_param(IS_SPI_I2S_CONFIG_IT(SPI_I2S_IT)); |
| mbed_official | 126:549ba18ddd81 | 504 | |
| mbed_official | 126:549ba18ddd81 | 505 | /* Get the SPI/I2S IT index */ |
| mbed_official | 126:549ba18ddd81 | 506 | itpos = SPI_I2S_IT >> 4; |
| mbed_official | 126:549ba18ddd81 | 507 | |
| mbed_official | 126:549ba18ddd81 | 508 | /* Set the IT mask */ |
| mbed_official | 126:549ba18ddd81 | 509 | itmask = (uint16_t)1 << (uint16_t)itpos; |
| mbed_official | 126:549ba18ddd81 | 510 | |
| mbed_official | 126:549ba18ddd81 | 511 | if (NewState != DISABLE) |
| mbed_official | 126:549ba18ddd81 | 512 | { |
| mbed_official | 126:549ba18ddd81 | 513 | /* Enable the selected SPI/I2S interrupt */ |
| mbed_official | 126:549ba18ddd81 | 514 | SPIx->CR2 |= itmask; |
| mbed_official | 126:549ba18ddd81 | 515 | } |
| mbed_official | 126:549ba18ddd81 | 516 | else |
| mbed_official | 126:549ba18ddd81 | 517 | { |
| mbed_official | 126:549ba18ddd81 | 518 | /* Disable the selected SPI/I2S interrupt */ |
| mbed_official | 126:549ba18ddd81 | 519 | SPIx->CR2 &= (uint16_t)~itmask; |
| mbed_official | 126:549ba18ddd81 | 520 | } |
| mbed_official | 126:549ba18ddd81 | 521 | } |
| mbed_official | 126:549ba18ddd81 | 522 | |
| mbed_official | 126:549ba18ddd81 | 523 | /** |
| mbed_official | 126:549ba18ddd81 | 524 | * @brief Enables or disables the SPIx/I2Sx DMA interface. |
| mbed_official | 126:549ba18ddd81 | 525 | * @param SPIx: where x can be |
| mbed_official | 126:549ba18ddd81 | 526 | * - 1, 2 or 3 in SPI mode |
| mbed_official | 126:549ba18ddd81 | 527 | * - 2 or 3 in I2S mode |
| mbed_official | 126:549ba18ddd81 | 528 | * @param SPI_I2S_DMAReq: specifies the SPI/I2S DMA transfer request to be enabled or disabled. |
| mbed_official | 126:549ba18ddd81 | 529 | * This parameter can be any combination of the following values: |
| mbed_official | 126:549ba18ddd81 | 530 | * @arg SPI_I2S_DMAReq_Tx: Tx buffer DMA transfer request |
| mbed_official | 126:549ba18ddd81 | 531 | * @arg SPI_I2S_DMAReq_Rx: Rx buffer DMA transfer request |
| mbed_official | 126:549ba18ddd81 | 532 | * @param NewState: new state of the selected SPI/I2S DMA transfer request. |
| mbed_official | 126:549ba18ddd81 | 533 | * This parameter can be: ENABLE or DISABLE. |
| mbed_official | 126:549ba18ddd81 | 534 | * @retval None |
| mbed_official | 126:549ba18ddd81 | 535 | */ |
| mbed_official | 126:549ba18ddd81 | 536 | void SPI_I2S_DMACmd(SPI_TypeDef* SPIx, uint16_t SPI_I2S_DMAReq, FunctionalState NewState) |
| mbed_official | 126:549ba18ddd81 | 537 | { |
| mbed_official | 126:549ba18ddd81 | 538 | /* Check the parameters */ |
| mbed_official | 126:549ba18ddd81 | 539 | assert_param(IS_SPI_ALL_PERIPH(SPIx)); |
| mbed_official | 126:549ba18ddd81 | 540 | assert_param(IS_FUNCTIONAL_STATE(NewState)); |
| mbed_official | 126:549ba18ddd81 | 541 | assert_param(IS_SPI_I2S_DMAREQ(SPI_I2S_DMAReq)); |
| mbed_official | 126:549ba18ddd81 | 542 | if (NewState != DISABLE) |
| mbed_official | 126:549ba18ddd81 | 543 | { |
| mbed_official | 126:549ba18ddd81 | 544 | /* Enable the selected SPI/I2S DMA requests */ |
| mbed_official | 126:549ba18ddd81 | 545 | SPIx->CR2 |= SPI_I2S_DMAReq; |
| mbed_official | 126:549ba18ddd81 | 546 | } |
| mbed_official | 126:549ba18ddd81 | 547 | else |
| mbed_official | 126:549ba18ddd81 | 548 | { |
| mbed_official | 126:549ba18ddd81 | 549 | /* Disable the selected SPI/I2S DMA requests */ |
| mbed_official | 126:549ba18ddd81 | 550 | SPIx->CR2 &= (uint16_t)~SPI_I2S_DMAReq; |
| mbed_official | 126:549ba18ddd81 | 551 | } |
| mbed_official | 126:549ba18ddd81 | 552 | } |
| mbed_official | 126:549ba18ddd81 | 553 | |
| mbed_official | 126:549ba18ddd81 | 554 | /** |
| mbed_official | 126:549ba18ddd81 | 555 | * @brief Transmits a Data through the SPIx/I2Sx peripheral. |
| mbed_official | 126:549ba18ddd81 | 556 | * @param SPIx: where x can be |
| mbed_official | 126:549ba18ddd81 | 557 | * - 1, 2 or 3 in SPI mode |
| mbed_official | 126:549ba18ddd81 | 558 | * - 2 or 3 in I2S mode |
| mbed_official | 126:549ba18ddd81 | 559 | * @param Data : Data to be transmitted. |
| mbed_official | 126:549ba18ddd81 | 560 | * @retval None |
| mbed_official | 126:549ba18ddd81 | 561 | */ |
| mbed_official | 126:549ba18ddd81 | 562 | void SPI_I2S_SendData(SPI_TypeDef* SPIx, uint16_t Data) |
| mbed_official | 126:549ba18ddd81 | 563 | { |
| mbed_official | 126:549ba18ddd81 | 564 | /* Check the parameters */ |
| mbed_official | 126:549ba18ddd81 | 565 | assert_param(IS_SPI_ALL_PERIPH(SPIx)); |
| mbed_official | 126:549ba18ddd81 | 566 | |
| mbed_official | 126:549ba18ddd81 | 567 | /* Write in the DR register the data to be sent */ |
| mbed_official | 126:549ba18ddd81 | 568 | SPIx->DR = Data; |
| mbed_official | 126:549ba18ddd81 | 569 | } |
| mbed_official | 126:549ba18ddd81 | 570 | |
| mbed_official | 126:549ba18ddd81 | 571 | /** |
| mbed_official | 126:549ba18ddd81 | 572 | * @brief Returns the most recent received data by the SPIx/I2Sx peripheral. |
| mbed_official | 126:549ba18ddd81 | 573 | * @param SPIx: where x can be |
| mbed_official | 126:549ba18ddd81 | 574 | * - 1, 2 or 3 in SPI mode |
| mbed_official | 126:549ba18ddd81 | 575 | * - 2 or 3 in I2S mode |
| mbed_official | 126:549ba18ddd81 | 576 | * @retval The value of the received data. |
| mbed_official | 126:549ba18ddd81 | 577 | */ |
| mbed_official | 126:549ba18ddd81 | 578 | uint16_t SPI_I2S_ReceiveData(SPI_TypeDef* SPIx) |
| mbed_official | 126:549ba18ddd81 | 579 | { |
| mbed_official | 126:549ba18ddd81 | 580 | /* Check the parameters */ |
| mbed_official | 126:549ba18ddd81 | 581 | assert_param(IS_SPI_ALL_PERIPH(SPIx)); |
| mbed_official | 126:549ba18ddd81 | 582 | |
| mbed_official | 126:549ba18ddd81 | 583 | /* Return the data in the DR register */ |
| mbed_official | 126:549ba18ddd81 | 584 | return SPIx->DR; |
| mbed_official | 126:549ba18ddd81 | 585 | } |
| mbed_official | 126:549ba18ddd81 | 586 | |
| mbed_official | 126:549ba18ddd81 | 587 | /** |
| mbed_official | 126:549ba18ddd81 | 588 | * @brief Configures internally by software the NSS pin for the selected SPI. |
| mbed_official | 126:549ba18ddd81 | 589 | * @param SPIx: where x can be 1, 2 or 3 to select the SPI peripheral. |
| mbed_official | 126:549ba18ddd81 | 590 | * @param SPI_NSSInternalSoft: specifies the SPI NSS internal state. |
| mbed_official | 126:549ba18ddd81 | 591 | * This parameter can be one of the following values: |
| mbed_official | 126:549ba18ddd81 | 592 | * @arg SPI_NSSInternalSoft_Set: Set NSS pin internally |
| mbed_official | 126:549ba18ddd81 | 593 | * @arg SPI_NSSInternalSoft_Reset: Reset NSS pin internally |
| mbed_official | 126:549ba18ddd81 | 594 | * @retval None |
| mbed_official | 126:549ba18ddd81 | 595 | */ |
| mbed_official | 126:549ba18ddd81 | 596 | void SPI_NSSInternalSoftwareConfig(SPI_TypeDef* SPIx, uint16_t SPI_NSSInternalSoft) |
| mbed_official | 126:549ba18ddd81 | 597 | { |
| mbed_official | 126:549ba18ddd81 | 598 | /* Check the parameters */ |
| mbed_official | 126:549ba18ddd81 | 599 | assert_param(IS_SPI_ALL_PERIPH(SPIx)); |
| mbed_official | 126:549ba18ddd81 | 600 | assert_param(IS_SPI_NSS_INTERNAL(SPI_NSSInternalSoft)); |
| mbed_official | 126:549ba18ddd81 | 601 | if (SPI_NSSInternalSoft != SPI_NSSInternalSoft_Reset) |
| mbed_official | 126:549ba18ddd81 | 602 | { |
| mbed_official | 126:549ba18ddd81 | 603 | /* Set NSS pin internally by software */ |
| mbed_official | 126:549ba18ddd81 | 604 | SPIx->CR1 |= SPI_NSSInternalSoft_Set; |
| mbed_official | 126:549ba18ddd81 | 605 | } |
| mbed_official | 126:549ba18ddd81 | 606 | else |
| mbed_official | 126:549ba18ddd81 | 607 | { |
| mbed_official | 126:549ba18ddd81 | 608 | /* Reset NSS pin internally by software */ |
| mbed_official | 126:549ba18ddd81 | 609 | SPIx->CR1 &= SPI_NSSInternalSoft_Reset; |
| mbed_official | 126:549ba18ddd81 | 610 | } |
| mbed_official | 126:549ba18ddd81 | 611 | } |
| mbed_official | 126:549ba18ddd81 | 612 | |
| mbed_official | 126:549ba18ddd81 | 613 | /** |
| mbed_official | 126:549ba18ddd81 | 614 | * @brief Enables or disables the SS output for the selected SPI. |
| mbed_official | 126:549ba18ddd81 | 615 | * @param SPIx: where x can be 1, 2 or 3 to select the SPI peripheral. |
| mbed_official | 126:549ba18ddd81 | 616 | * @param NewState: new state of the SPIx SS output. |
| mbed_official | 126:549ba18ddd81 | 617 | * This parameter can be: ENABLE or DISABLE. |
| mbed_official | 126:549ba18ddd81 | 618 | * @retval None |
| mbed_official | 126:549ba18ddd81 | 619 | */ |
| mbed_official | 126:549ba18ddd81 | 620 | void SPI_SSOutputCmd(SPI_TypeDef* SPIx, FunctionalState NewState) |
| mbed_official | 126:549ba18ddd81 | 621 | { |
| mbed_official | 126:549ba18ddd81 | 622 | /* Check the parameters */ |
| mbed_official | 126:549ba18ddd81 | 623 | assert_param(IS_SPI_ALL_PERIPH(SPIx)); |
| mbed_official | 126:549ba18ddd81 | 624 | assert_param(IS_FUNCTIONAL_STATE(NewState)); |
| mbed_official | 126:549ba18ddd81 | 625 | if (NewState != DISABLE) |
| mbed_official | 126:549ba18ddd81 | 626 | { |
| mbed_official | 126:549ba18ddd81 | 627 | /* Enable the selected SPI SS output */ |
| mbed_official | 126:549ba18ddd81 | 628 | SPIx->CR2 |= CR2_SSOE_Set; |
| mbed_official | 126:549ba18ddd81 | 629 | } |
| mbed_official | 126:549ba18ddd81 | 630 | else |
| mbed_official | 126:549ba18ddd81 | 631 | { |
| mbed_official | 126:549ba18ddd81 | 632 | /* Disable the selected SPI SS output */ |
| mbed_official | 126:549ba18ddd81 | 633 | SPIx->CR2 &= CR2_SSOE_Reset; |
| mbed_official | 126:549ba18ddd81 | 634 | } |
| mbed_official | 126:549ba18ddd81 | 635 | } |
| mbed_official | 126:549ba18ddd81 | 636 | |
| mbed_official | 126:549ba18ddd81 | 637 | /** |
| mbed_official | 126:549ba18ddd81 | 638 | * @brief Configures the data size for the selected SPI. |
| mbed_official | 126:549ba18ddd81 | 639 | * @param SPIx: where x can be 1, 2 or 3 to select the SPI peripheral. |
| mbed_official | 126:549ba18ddd81 | 640 | * @param SPI_DataSize: specifies the SPI data size. |
| mbed_official | 126:549ba18ddd81 | 641 | * This parameter can be one of the following values: |
| mbed_official | 126:549ba18ddd81 | 642 | * @arg SPI_DataSize_16b: Set data frame format to 16bit |
| mbed_official | 126:549ba18ddd81 | 643 | * @arg SPI_DataSize_8b: Set data frame format to 8bit |
| mbed_official | 126:549ba18ddd81 | 644 | * @retval None |
| mbed_official | 126:549ba18ddd81 | 645 | */ |
| mbed_official | 126:549ba18ddd81 | 646 | void SPI_DataSizeConfig(SPI_TypeDef* SPIx, uint16_t SPI_DataSize) |
| mbed_official | 126:549ba18ddd81 | 647 | { |
| mbed_official | 126:549ba18ddd81 | 648 | /* Check the parameters */ |
| mbed_official | 126:549ba18ddd81 | 649 | assert_param(IS_SPI_ALL_PERIPH(SPIx)); |
| mbed_official | 126:549ba18ddd81 | 650 | assert_param(IS_SPI_DATASIZE(SPI_DataSize)); |
| mbed_official | 126:549ba18ddd81 | 651 | /* Clear DFF bit */ |
| mbed_official | 126:549ba18ddd81 | 652 | SPIx->CR1 &= (uint16_t)~SPI_DataSize_16b; |
| mbed_official | 126:549ba18ddd81 | 653 | /* Set new DFF bit value */ |
| mbed_official | 126:549ba18ddd81 | 654 | SPIx->CR1 |= SPI_DataSize; |
| mbed_official | 126:549ba18ddd81 | 655 | } |
| mbed_official | 126:549ba18ddd81 | 656 | |
| mbed_official | 126:549ba18ddd81 | 657 | /** |
| mbed_official | 126:549ba18ddd81 | 658 | * @brief Transmit the SPIx CRC value. |
| mbed_official | 126:549ba18ddd81 | 659 | * @param SPIx: where x can be 1, 2 or 3 to select the SPI peripheral. |
| mbed_official | 126:549ba18ddd81 | 660 | * @retval None |
| mbed_official | 126:549ba18ddd81 | 661 | */ |
| mbed_official | 126:549ba18ddd81 | 662 | void SPI_TransmitCRC(SPI_TypeDef* SPIx) |
| mbed_official | 126:549ba18ddd81 | 663 | { |
| mbed_official | 126:549ba18ddd81 | 664 | /* Check the parameters */ |
| mbed_official | 126:549ba18ddd81 | 665 | assert_param(IS_SPI_ALL_PERIPH(SPIx)); |
| mbed_official | 126:549ba18ddd81 | 666 | |
| mbed_official | 126:549ba18ddd81 | 667 | /* Enable the selected SPI CRC transmission */ |
| mbed_official | 126:549ba18ddd81 | 668 | SPIx->CR1 |= CR1_CRCNext_Set; |
| mbed_official | 126:549ba18ddd81 | 669 | } |
| mbed_official | 126:549ba18ddd81 | 670 | |
| mbed_official | 126:549ba18ddd81 | 671 | /** |
| mbed_official | 126:549ba18ddd81 | 672 | * @brief Enables or disables the CRC value calculation of the transferred bytes. |
| mbed_official | 126:549ba18ddd81 | 673 | * @param SPIx: where x can be 1, 2 or 3 to select the SPI peripheral. |
| mbed_official | 126:549ba18ddd81 | 674 | * @param NewState: new state of the SPIx CRC value calculation. |
| mbed_official | 126:549ba18ddd81 | 675 | * This parameter can be: ENABLE or DISABLE. |
| mbed_official | 126:549ba18ddd81 | 676 | * @retval None |
| mbed_official | 126:549ba18ddd81 | 677 | */ |
| mbed_official | 126:549ba18ddd81 | 678 | void SPI_CalculateCRC(SPI_TypeDef* SPIx, FunctionalState NewState) |
| mbed_official | 126:549ba18ddd81 | 679 | { |
| mbed_official | 126:549ba18ddd81 | 680 | /* Check the parameters */ |
| mbed_official | 126:549ba18ddd81 | 681 | assert_param(IS_SPI_ALL_PERIPH(SPIx)); |
| mbed_official | 126:549ba18ddd81 | 682 | assert_param(IS_FUNCTIONAL_STATE(NewState)); |
| mbed_official | 126:549ba18ddd81 | 683 | if (NewState != DISABLE) |
| mbed_official | 126:549ba18ddd81 | 684 | { |
| mbed_official | 126:549ba18ddd81 | 685 | /* Enable the selected SPI CRC calculation */ |
| mbed_official | 126:549ba18ddd81 | 686 | SPIx->CR1 |= CR1_CRCEN_Set; |
| mbed_official | 126:549ba18ddd81 | 687 | } |
| mbed_official | 126:549ba18ddd81 | 688 | else |
| mbed_official | 126:549ba18ddd81 | 689 | { |
| mbed_official | 126:549ba18ddd81 | 690 | /* Disable the selected SPI CRC calculation */ |
| mbed_official | 126:549ba18ddd81 | 691 | SPIx->CR1 &= CR1_CRCEN_Reset; |
| mbed_official | 126:549ba18ddd81 | 692 | } |
| mbed_official | 126:549ba18ddd81 | 693 | } |
| mbed_official | 126:549ba18ddd81 | 694 | |
| mbed_official | 126:549ba18ddd81 | 695 | /** |
| mbed_official | 126:549ba18ddd81 | 696 | * @brief Returns the transmit or the receive CRC register value for the specified SPI. |
| mbed_official | 126:549ba18ddd81 | 697 | * @param SPIx: where x can be 1, 2 or 3 to select the SPI peripheral. |
| mbed_official | 126:549ba18ddd81 | 698 | * @param SPI_CRC: specifies the CRC register to be read. |
| mbed_official | 126:549ba18ddd81 | 699 | * This parameter can be one of the following values: |
| mbed_official | 126:549ba18ddd81 | 700 | * @arg SPI_CRC_Tx: Selects Tx CRC register |
| mbed_official | 126:549ba18ddd81 | 701 | * @arg SPI_CRC_Rx: Selects Rx CRC register |
| mbed_official | 126:549ba18ddd81 | 702 | * @retval The selected CRC register value.. |
| mbed_official | 126:549ba18ddd81 | 703 | */ |
| mbed_official | 126:549ba18ddd81 | 704 | uint16_t SPI_GetCRC(SPI_TypeDef* SPIx, uint8_t SPI_CRC) |
| mbed_official | 126:549ba18ddd81 | 705 | { |
| mbed_official | 126:549ba18ddd81 | 706 | uint16_t crcreg = 0; |
| mbed_official | 126:549ba18ddd81 | 707 | /* Check the parameters */ |
| mbed_official | 126:549ba18ddd81 | 708 | assert_param(IS_SPI_ALL_PERIPH(SPIx)); |
| mbed_official | 126:549ba18ddd81 | 709 | assert_param(IS_SPI_CRC(SPI_CRC)); |
| mbed_official | 126:549ba18ddd81 | 710 | if (SPI_CRC != SPI_CRC_Rx) |
| mbed_official | 126:549ba18ddd81 | 711 | { |
| mbed_official | 126:549ba18ddd81 | 712 | /* Get the Tx CRC register */ |
| mbed_official | 126:549ba18ddd81 | 713 | crcreg = SPIx->TXCRCR; |
| mbed_official | 126:549ba18ddd81 | 714 | } |
| mbed_official | 126:549ba18ddd81 | 715 | else |
| mbed_official | 126:549ba18ddd81 | 716 | { |
| mbed_official | 126:549ba18ddd81 | 717 | /* Get the Rx CRC register */ |
| mbed_official | 126:549ba18ddd81 | 718 | crcreg = SPIx->RXCRCR; |
| mbed_official | 126:549ba18ddd81 | 719 | } |
| mbed_official | 126:549ba18ddd81 | 720 | /* Return the selected CRC register */ |
| mbed_official | 126:549ba18ddd81 | 721 | return crcreg; |
| mbed_official | 126:549ba18ddd81 | 722 | } |
| mbed_official | 126:549ba18ddd81 | 723 | |
| mbed_official | 126:549ba18ddd81 | 724 | /** |
| mbed_official | 126:549ba18ddd81 | 725 | * @brief Returns the CRC Polynomial register value for the specified SPI. |
| mbed_official | 126:549ba18ddd81 | 726 | * @param SPIx: where x can be 1, 2 or 3 to select the SPI peripheral. |
| mbed_official | 126:549ba18ddd81 | 727 | * @retval The CRC Polynomial register value. |
| mbed_official | 126:549ba18ddd81 | 728 | */ |
| mbed_official | 126:549ba18ddd81 | 729 | uint16_t SPI_GetCRCPolynomial(SPI_TypeDef* SPIx) |
| mbed_official | 126:549ba18ddd81 | 730 | { |
| mbed_official | 126:549ba18ddd81 | 731 | /* Check the parameters */ |
| mbed_official | 126:549ba18ddd81 | 732 | assert_param(IS_SPI_ALL_PERIPH(SPIx)); |
| mbed_official | 126:549ba18ddd81 | 733 | |
| mbed_official | 126:549ba18ddd81 | 734 | /* Return the CRC polynomial register */ |
| mbed_official | 126:549ba18ddd81 | 735 | return SPIx->CRCPR; |
| mbed_official | 126:549ba18ddd81 | 736 | } |
| mbed_official | 126:549ba18ddd81 | 737 | |
| mbed_official | 126:549ba18ddd81 | 738 | /** |
| mbed_official | 126:549ba18ddd81 | 739 | * @brief Selects the data transfer direction in bi-directional mode for the specified SPI. |
| mbed_official | 126:549ba18ddd81 | 740 | * @param SPIx: where x can be 1, 2 or 3 to select the SPI peripheral. |
| mbed_official | 126:549ba18ddd81 | 741 | * @param SPI_Direction: specifies the data transfer direction in bi-directional mode. |
| mbed_official | 126:549ba18ddd81 | 742 | * This parameter can be one of the following values: |
| mbed_official | 126:549ba18ddd81 | 743 | * @arg SPI_Direction_Tx: Selects Tx transmission direction |
| mbed_official | 126:549ba18ddd81 | 744 | * @arg SPI_Direction_Rx: Selects Rx receive direction |
| mbed_official | 126:549ba18ddd81 | 745 | * @retval None |
| mbed_official | 126:549ba18ddd81 | 746 | */ |
| mbed_official | 126:549ba18ddd81 | 747 | void SPI_BiDirectionalLineConfig(SPI_TypeDef* SPIx, uint16_t SPI_Direction) |
| mbed_official | 126:549ba18ddd81 | 748 | { |
| mbed_official | 126:549ba18ddd81 | 749 | /* Check the parameters */ |
| mbed_official | 126:549ba18ddd81 | 750 | assert_param(IS_SPI_ALL_PERIPH(SPIx)); |
| mbed_official | 126:549ba18ddd81 | 751 | assert_param(IS_SPI_DIRECTION(SPI_Direction)); |
| mbed_official | 126:549ba18ddd81 | 752 | if (SPI_Direction == SPI_Direction_Tx) |
| mbed_official | 126:549ba18ddd81 | 753 | { |
| mbed_official | 126:549ba18ddd81 | 754 | /* Set the Tx only mode */ |
| mbed_official | 126:549ba18ddd81 | 755 | SPIx->CR1 |= SPI_Direction_Tx; |
| mbed_official | 126:549ba18ddd81 | 756 | } |
| mbed_official | 126:549ba18ddd81 | 757 | else |
| mbed_official | 126:549ba18ddd81 | 758 | { |
| mbed_official | 126:549ba18ddd81 | 759 | /* Set the Rx only mode */ |
| mbed_official | 126:549ba18ddd81 | 760 | SPIx->CR1 &= SPI_Direction_Rx; |
| mbed_official | 126:549ba18ddd81 | 761 | } |
| mbed_official | 126:549ba18ddd81 | 762 | } |
| mbed_official | 126:549ba18ddd81 | 763 | |
| mbed_official | 126:549ba18ddd81 | 764 | /** |
| mbed_official | 126:549ba18ddd81 | 765 | * @brief Checks whether the specified SPI/I2S flag is set or not. |
| mbed_official | 126:549ba18ddd81 | 766 | * @param SPIx: where x can be |
| mbed_official | 126:549ba18ddd81 | 767 | * - 1, 2 or 3 in SPI mode |
| mbed_official | 126:549ba18ddd81 | 768 | * - 2 or 3 in I2S mode |
| mbed_official | 126:549ba18ddd81 | 769 | * @param SPI_I2S_FLAG: specifies the SPI/I2S flag to check. |
| mbed_official | 126:549ba18ddd81 | 770 | * This parameter can be one of the following values: |
| mbed_official | 126:549ba18ddd81 | 771 | * @arg SPI_I2S_FLAG_TXE: Transmit buffer empty flag. |
| mbed_official | 126:549ba18ddd81 | 772 | * @arg SPI_I2S_FLAG_RXNE: Receive buffer not empty flag. |
| mbed_official | 126:549ba18ddd81 | 773 | * @arg SPI_I2S_FLAG_BSY: Busy flag. |
| mbed_official | 126:549ba18ddd81 | 774 | * @arg SPI_I2S_FLAG_OVR: Overrun flag. |
| mbed_official | 126:549ba18ddd81 | 775 | * @arg SPI_FLAG_MODF: Mode Fault flag. |
| mbed_official | 126:549ba18ddd81 | 776 | * @arg SPI_FLAG_CRCERR: CRC Error flag. |
| mbed_official | 126:549ba18ddd81 | 777 | * @arg I2S_FLAG_UDR: Underrun Error flag. |
| mbed_official | 126:549ba18ddd81 | 778 | * @arg I2S_FLAG_CHSIDE: Channel Side flag. |
| mbed_official | 126:549ba18ddd81 | 779 | * @retval The new state of SPI_I2S_FLAG (SET or RESET). |
| mbed_official | 126:549ba18ddd81 | 780 | */ |
| mbed_official | 126:549ba18ddd81 | 781 | FlagStatus SPI_I2S_GetFlagStatus(SPI_TypeDef* SPIx, uint16_t SPI_I2S_FLAG) |
| mbed_official | 126:549ba18ddd81 | 782 | { |
| mbed_official | 126:549ba18ddd81 | 783 | FlagStatus bitstatus = RESET; |
| mbed_official | 126:549ba18ddd81 | 784 | /* Check the parameters */ |
| mbed_official | 126:549ba18ddd81 | 785 | assert_param(IS_SPI_ALL_PERIPH(SPIx)); |
| mbed_official | 126:549ba18ddd81 | 786 | assert_param(IS_SPI_I2S_GET_FLAG(SPI_I2S_FLAG)); |
| mbed_official | 126:549ba18ddd81 | 787 | /* Check the status of the specified SPI/I2S flag */ |
| mbed_official | 126:549ba18ddd81 | 788 | if ((SPIx->SR & SPI_I2S_FLAG) != (uint16_t)RESET) |
| mbed_official | 126:549ba18ddd81 | 789 | { |
| mbed_official | 126:549ba18ddd81 | 790 | /* SPI_I2S_FLAG is set */ |
| mbed_official | 126:549ba18ddd81 | 791 | bitstatus = SET; |
| mbed_official | 126:549ba18ddd81 | 792 | } |
| mbed_official | 126:549ba18ddd81 | 793 | else |
| mbed_official | 126:549ba18ddd81 | 794 | { |
| mbed_official | 126:549ba18ddd81 | 795 | /* SPI_I2S_FLAG is reset */ |
| mbed_official | 126:549ba18ddd81 | 796 | bitstatus = RESET; |
| mbed_official | 126:549ba18ddd81 | 797 | } |
| mbed_official | 126:549ba18ddd81 | 798 | /* Return the SPI_I2S_FLAG status */ |
| mbed_official | 126:549ba18ddd81 | 799 | return bitstatus; |
| mbed_official | 126:549ba18ddd81 | 800 | } |
| mbed_official | 126:549ba18ddd81 | 801 | |
| mbed_official | 126:549ba18ddd81 | 802 | /** |
| mbed_official | 126:549ba18ddd81 | 803 | * @brief Clears the SPIx CRC Error (CRCERR) flag. |
| mbed_official | 126:549ba18ddd81 | 804 | * @param SPIx: where x can be |
| mbed_official | 126:549ba18ddd81 | 805 | * - 1, 2 or 3 in SPI mode |
| mbed_official | 126:549ba18ddd81 | 806 | * @param SPI_I2S_FLAG: specifies the SPI flag to clear. |
| mbed_official | 126:549ba18ddd81 | 807 | * This function clears only CRCERR flag. |
| mbed_official | 126:549ba18ddd81 | 808 | * @note |
| mbed_official | 126:549ba18ddd81 | 809 | * - OVR (OverRun error) flag is cleared by software sequence: a read |
| mbed_official | 126:549ba18ddd81 | 810 | * operation to SPI_DR register (SPI_I2S_ReceiveData()) followed by a read |
| mbed_official | 126:549ba18ddd81 | 811 | * operation to SPI_SR register (SPI_I2S_GetFlagStatus()). |
| mbed_official | 126:549ba18ddd81 | 812 | * - UDR (UnderRun error) flag is cleared by a read operation to |
| mbed_official | 126:549ba18ddd81 | 813 | * SPI_SR register (SPI_I2S_GetFlagStatus()). |
| mbed_official | 126:549ba18ddd81 | 814 | * - MODF (Mode Fault) flag is cleared by software sequence: a read/write |
| mbed_official | 126:549ba18ddd81 | 815 | * operation to SPI_SR register (SPI_I2S_GetFlagStatus()) followed by a |
| mbed_official | 126:549ba18ddd81 | 816 | * write operation to SPI_CR1 register (SPI_Cmd() to enable the SPI). |
| mbed_official | 126:549ba18ddd81 | 817 | * @retval None |
| mbed_official | 126:549ba18ddd81 | 818 | */ |
| mbed_official | 126:549ba18ddd81 | 819 | void SPI_I2S_ClearFlag(SPI_TypeDef* SPIx, uint16_t SPI_I2S_FLAG) |
| mbed_official | 126:549ba18ddd81 | 820 | { |
| mbed_official | 126:549ba18ddd81 | 821 | /* Check the parameters */ |
| mbed_official | 126:549ba18ddd81 | 822 | assert_param(IS_SPI_ALL_PERIPH(SPIx)); |
| mbed_official | 126:549ba18ddd81 | 823 | assert_param(IS_SPI_I2S_CLEAR_FLAG(SPI_I2S_FLAG)); |
| mbed_official | 126:549ba18ddd81 | 824 | |
| mbed_official | 126:549ba18ddd81 | 825 | /* Clear the selected SPI CRC Error (CRCERR) flag */ |
| mbed_official | 126:549ba18ddd81 | 826 | SPIx->SR = (uint16_t)~SPI_I2S_FLAG; |
| mbed_official | 126:549ba18ddd81 | 827 | } |
| mbed_official | 126:549ba18ddd81 | 828 | |
| mbed_official | 126:549ba18ddd81 | 829 | /** |
| mbed_official | 126:549ba18ddd81 | 830 | * @brief Checks whether the specified SPI/I2S interrupt has occurred or not. |
| mbed_official | 126:549ba18ddd81 | 831 | * @param SPIx: where x can be |
| mbed_official | 126:549ba18ddd81 | 832 | * - 1, 2 or 3 in SPI mode |
| mbed_official | 126:549ba18ddd81 | 833 | * - 2 or 3 in I2S mode |
| mbed_official | 126:549ba18ddd81 | 834 | * @param SPI_I2S_IT: specifies the SPI/I2S interrupt source to check. |
| mbed_official | 126:549ba18ddd81 | 835 | * This parameter can be one of the following values: |
| mbed_official | 126:549ba18ddd81 | 836 | * @arg SPI_I2S_IT_TXE: Transmit buffer empty interrupt. |
| mbed_official | 126:549ba18ddd81 | 837 | * @arg SPI_I2S_IT_RXNE: Receive buffer not empty interrupt. |
| mbed_official | 126:549ba18ddd81 | 838 | * @arg SPI_I2S_IT_OVR: Overrun interrupt. |
| mbed_official | 126:549ba18ddd81 | 839 | * @arg SPI_IT_MODF: Mode Fault interrupt. |
| mbed_official | 126:549ba18ddd81 | 840 | * @arg SPI_IT_CRCERR: CRC Error interrupt. |
| mbed_official | 126:549ba18ddd81 | 841 | * @arg I2S_IT_UDR: Underrun Error interrupt. |
| mbed_official | 126:549ba18ddd81 | 842 | * @retval The new state of SPI_I2S_IT (SET or RESET). |
| mbed_official | 126:549ba18ddd81 | 843 | */ |
| mbed_official | 126:549ba18ddd81 | 844 | ITStatus SPI_I2S_GetITStatus(SPI_TypeDef* SPIx, uint8_t SPI_I2S_IT) |
| mbed_official | 126:549ba18ddd81 | 845 | { |
| mbed_official | 126:549ba18ddd81 | 846 | ITStatus bitstatus = RESET; |
| mbed_official | 126:549ba18ddd81 | 847 | uint16_t itpos = 0, itmask = 0, enablestatus = 0; |
| mbed_official | 126:549ba18ddd81 | 848 | |
| mbed_official | 126:549ba18ddd81 | 849 | /* Check the parameters */ |
| mbed_official | 126:549ba18ddd81 | 850 | assert_param(IS_SPI_ALL_PERIPH(SPIx)); |
| mbed_official | 126:549ba18ddd81 | 851 | assert_param(IS_SPI_I2S_GET_IT(SPI_I2S_IT)); |
| mbed_official | 126:549ba18ddd81 | 852 | |
| mbed_official | 126:549ba18ddd81 | 853 | /* Get the SPI/I2S IT index */ |
| mbed_official | 126:549ba18ddd81 | 854 | itpos = 0x01 << (SPI_I2S_IT & 0x0F); |
| mbed_official | 126:549ba18ddd81 | 855 | |
| mbed_official | 126:549ba18ddd81 | 856 | /* Get the SPI/I2S IT mask */ |
| mbed_official | 126:549ba18ddd81 | 857 | itmask = SPI_I2S_IT >> 4; |
| mbed_official | 126:549ba18ddd81 | 858 | |
| mbed_official | 126:549ba18ddd81 | 859 | /* Set the IT mask */ |
| mbed_official | 126:549ba18ddd81 | 860 | itmask = 0x01 << itmask; |
| mbed_official | 126:549ba18ddd81 | 861 | |
| mbed_official | 126:549ba18ddd81 | 862 | /* Get the SPI_I2S_IT enable bit status */ |
| mbed_official | 126:549ba18ddd81 | 863 | enablestatus = (SPIx->CR2 & itmask) ; |
| mbed_official | 126:549ba18ddd81 | 864 | |
| mbed_official | 126:549ba18ddd81 | 865 | /* Check the status of the specified SPI/I2S interrupt */ |
| mbed_official | 126:549ba18ddd81 | 866 | if (((SPIx->SR & itpos) != (uint16_t)RESET) && enablestatus) |
| mbed_official | 126:549ba18ddd81 | 867 | { |
| mbed_official | 126:549ba18ddd81 | 868 | /* SPI_I2S_IT is set */ |
| mbed_official | 126:549ba18ddd81 | 869 | bitstatus = SET; |
| mbed_official | 126:549ba18ddd81 | 870 | } |
| mbed_official | 126:549ba18ddd81 | 871 | else |
| mbed_official | 126:549ba18ddd81 | 872 | { |
| mbed_official | 126:549ba18ddd81 | 873 | /* SPI_I2S_IT is reset */ |
| mbed_official | 126:549ba18ddd81 | 874 | bitstatus = RESET; |
| mbed_official | 126:549ba18ddd81 | 875 | } |
| mbed_official | 126:549ba18ddd81 | 876 | /* Return the SPI_I2S_IT status */ |
| mbed_official | 126:549ba18ddd81 | 877 | return bitstatus; |
| mbed_official | 126:549ba18ddd81 | 878 | } |
| mbed_official | 126:549ba18ddd81 | 879 | |
| mbed_official | 126:549ba18ddd81 | 880 | /** |
| mbed_official | 126:549ba18ddd81 | 881 | * @brief Clears the SPIx CRC Error (CRCERR) interrupt pending bit. |
| mbed_official | 126:549ba18ddd81 | 882 | * @param SPIx: where x can be |
| mbed_official | 126:549ba18ddd81 | 883 | * - 1, 2 or 3 in SPI mode |
| mbed_official | 126:549ba18ddd81 | 884 | * @param SPI_I2S_IT: specifies the SPI interrupt pending bit to clear. |
| mbed_official | 126:549ba18ddd81 | 885 | * This function clears only CRCERR interrupt pending bit. |
| mbed_official | 126:549ba18ddd81 | 886 | * @note |
| mbed_official | 126:549ba18ddd81 | 887 | * - OVR (OverRun Error) interrupt pending bit is cleared by software |
| mbed_official | 126:549ba18ddd81 | 888 | * sequence: a read operation to SPI_DR register (SPI_I2S_ReceiveData()) |
| mbed_official | 126:549ba18ddd81 | 889 | * followed by a read operation to SPI_SR register (SPI_I2S_GetITStatus()). |
| mbed_official | 126:549ba18ddd81 | 890 | * - UDR (UnderRun Error) interrupt pending bit is cleared by a read |
| mbed_official | 126:549ba18ddd81 | 891 | * operation to SPI_SR register (SPI_I2S_GetITStatus()). |
| mbed_official | 126:549ba18ddd81 | 892 | * - MODF (Mode Fault) interrupt pending bit is cleared by software sequence: |
| mbed_official | 126:549ba18ddd81 | 893 | * a read/write operation to SPI_SR register (SPI_I2S_GetITStatus()) |
| mbed_official | 126:549ba18ddd81 | 894 | * followed by a write operation to SPI_CR1 register (SPI_Cmd() to enable |
| mbed_official | 126:549ba18ddd81 | 895 | * the SPI). |
| mbed_official | 126:549ba18ddd81 | 896 | * @retval None |
| mbed_official | 126:549ba18ddd81 | 897 | */ |
| mbed_official | 126:549ba18ddd81 | 898 | void SPI_I2S_ClearITPendingBit(SPI_TypeDef* SPIx, uint8_t SPI_I2S_IT) |
| mbed_official | 126:549ba18ddd81 | 899 | { |
| mbed_official | 126:549ba18ddd81 | 900 | uint16_t itpos = 0; |
| mbed_official | 126:549ba18ddd81 | 901 | /* Check the parameters */ |
| mbed_official | 126:549ba18ddd81 | 902 | assert_param(IS_SPI_ALL_PERIPH(SPIx)); |
| mbed_official | 126:549ba18ddd81 | 903 | assert_param(IS_SPI_I2S_CLEAR_IT(SPI_I2S_IT)); |
| mbed_official | 126:549ba18ddd81 | 904 | |
| mbed_official | 126:549ba18ddd81 | 905 | /* Get the SPI IT index */ |
| mbed_official | 126:549ba18ddd81 | 906 | itpos = 0x01 << (SPI_I2S_IT & 0x0F); |
| mbed_official | 126:549ba18ddd81 | 907 | |
| mbed_official | 126:549ba18ddd81 | 908 | /* Clear the selected SPI CRC Error (CRCERR) interrupt pending bit */ |
| mbed_official | 126:549ba18ddd81 | 909 | SPIx->SR = (uint16_t)~itpos; |
| mbed_official | 126:549ba18ddd81 | 910 | } |
| mbed_official | 126:549ba18ddd81 | 911 | /** |
| mbed_official | 126:549ba18ddd81 | 912 | * @} |
| mbed_official | 126:549ba18ddd81 | 913 | */ |
| mbed_official | 126:549ba18ddd81 | 914 | |
| mbed_official | 126:549ba18ddd81 | 915 | /** |
| mbed_official | 126:549ba18ddd81 | 916 | * @} |
| mbed_official | 126:549ba18ddd81 | 917 | */ |
| mbed_official | 126:549ba18ddd81 | 918 | |
| mbed_official | 126:549ba18ddd81 | 919 | /** |
| mbed_official | 126:549ba18ddd81 | 920 | * @} |
| mbed_official | 126:549ba18ddd81 | 921 | */ |
| mbed_official | 126:549ba18ddd81 | 922 | |
| mbed_official | 126:549ba18ddd81 | 923 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |