mbed library sources
Dependents: frdm_kl05z_gpio_test
Fork of mbed-src by
targets/cmsis/TARGET_STM/TARGET_DISCO_F100RB/stm32f10x_sdio.c@126:549ba18ddd81, 2014-03-19 (annotated)
- Committer:
- mbed_official
- Date:
- Wed Mar 19 16:00:09 2014 +0000
- Revision:
- 126:549ba18ddd81
Synchronized with git revision cf8fd1cf86b0cd85131dd24a6ded21cc6fe04827
Full URL: https://github.com/mbedmicro/mbed/commit/cf8fd1cf86b0cd85131dd24a6ded21cc6fe04827/
Conflicts:
workspace_tools/targets.py
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
mbed_official | 126:549ba18ddd81 | 1 | /** |
mbed_official | 126:549ba18ddd81 | 2 | ****************************************************************************** |
mbed_official | 126:549ba18ddd81 | 3 | * @file stm32f10x_sdio.c |
mbed_official | 126:549ba18ddd81 | 4 | * @author MCD Application Team |
mbed_official | 126:549ba18ddd81 | 5 | * @version V3.6.1 |
mbed_official | 126:549ba18ddd81 | 6 | * @date 05-March-2012 |
mbed_official | 126:549ba18ddd81 | 7 | * @brief This file provides all the SDIO firmware functions. |
mbed_official | 126:549ba18ddd81 | 8 | ******************************************************************************* |
mbed_official | 126:549ba18ddd81 | 9 | * Copyright (c) 2014, STMicroelectronics |
mbed_official | 126:549ba18ddd81 | 10 | * All rights reserved. |
mbed_official | 126:549ba18ddd81 | 11 | * |
mbed_official | 126:549ba18ddd81 | 12 | * Redistribution and use in source and binary forms, with or without |
mbed_official | 126:549ba18ddd81 | 13 | * modification, are permitted provided that the following conditions are met: |
mbed_official | 126:549ba18ddd81 | 14 | * |
mbed_official | 126:549ba18ddd81 | 15 | * 1. Redistributions of source code must retain the above copyright notice, |
mbed_official | 126:549ba18ddd81 | 16 | * this list of conditions and the following disclaimer. |
mbed_official | 126:549ba18ddd81 | 17 | * 2. Redistributions in binary form must reproduce the above copyright notice, |
mbed_official | 126:549ba18ddd81 | 18 | * this list of conditions and the following disclaimer in the documentation |
mbed_official | 126:549ba18ddd81 | 19 | * and/or other materials provided with the distribution. |
mbed_official | 126:549ba18ddd81 | 20 | * 3. Neither the name of STMicroelectronics nor the names of its contributors |
mbed_official | 126:549ba18ddd81 | 21 | * may be used to endorse or promote products derived from this software |
mbed_official | 126:549ba18ddd81 | 22 | * without specific prior written permission. |
mbed_official | 126:549ba18ddd81 | 23 | * |
mbed_official | 126:549ba18ddd81 | 24 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
mbed_official | 126:549ba18ddd81 | 25 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
mbed_official | 126:549ba18ddd81 | 26 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
mbed_official | 126:549ba18ddd81 | 27 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE |
mbed_official | 126:549ba18ddd81 | 28 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
mbed_official | 126:549ba18ddd81 | 29 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR |
mbed_official | 126:549ba18ddd81 | 30 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
mbed_official | 126:549ba18ddd81 | 31 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, |
mbed_official | 126:549ba18ddd81 | 32 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
mbed_official | 126:549ba18ddd81 | 33 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
mbed_official | 126:549ba18ddd81 | 34 | ******************************************************************************* |
mbed_official | 126:549ba18ddd81 | 35 | */ |
mbed_official | 126:549ba18ddd81 | 36 | |
mbed_official | 126:549ba18ddd81 | 37 | /* Includes ------------------------------------------------------------------*/ |
mbed_official | 126:549ba18ddd81 | 38 | #include "stm32f10x_sdio.h" |
mbed_official | 126:549ba18ddd81 | 39 | #include "stm32f10x_rcc.h" |
mbed_official | 126:549ba18ddd81 | 40 | |
mbed_official | 126:549ba18ddd81 | 41 | /** @addtogroup STM32F10x_StdPeriph_Driver |
mbed_official | 126:549ba18ddd81 | 42 | * @{ |
mbed_official | 126:549ba18ddd81 | 43 | */ |
mbed_official | 126:549ba18ddd81 | 44 | |
mbed_official | 126:549ba18ddd81 | 45 | /** @defgroup SDIO |
mbed_official | 126:549ba18ddd81 | 46 | * @brief SDIO driver modules |
mbed_official | 126:549ba18ddd81 | 47 | * @{ |
mbed_official | 126:549ba18ddd81 | 48 | */ |
mbed_official | 126:549ba18ddd81 | 49 | |
mbed_official | 126:549ba18ddd81 | 50 | /** @defgroup SDIO_Private_TypesDefinitions |
mbed_official | 126:549ba18ddd81 | 51 | * @{ |
mbed_official | 126:549ba18ddd81 | 52 | */ |
mbed_official | 126:549ba18ddd81 | 53 | |
mbed_official | 126:549ba18ddd81 | 54 | /* ------------ SDIO registers bit address in the alias region ----------- */ |
mbed_official | 126:549ba18ddd81 | 55 | #define SDIO_OFFSET (SDIO_BASE - PERIPH_BASE) |
mbed_official | 126:549ba18ddd81 | 56 | |
mbed_official | 126:549ba18ddd81 | 57 | /* --- CLKCR Register ---*/ |
mbed_official | 126:549ba18ddd81 | 58 | |
mbed_official | 126:549ba18ddd81 | 59 | /* Alias word address of CLKEN bit */ |
mbed_official | 126:549ba18ddd81 | 60 | #define CLKCR_OFFSET (SDIO_OFFSET + 0x04) |
mbed_official | 126:549ba18ddd81 | 61 | #define CLKEN_BitNumber 0x08 |
mbed_official | 126:549ba18ddd81 | 62 | #define CLKCR_CLKEN_BB (PERIPH_BB_BASE + (CLKCR_OFFSET * 32) + (CLKEN_BitNumber * 4)) |
mbed_official | 126:549ba18ddd81 | 63 | |
mbed_official | 126:549ba18ddd81 | 64 | /* --- CMD Register ---*/ |
mbed_official | 126:549ba18ddd81 | 65 | |
mbed_official | 126:549ba18ddd81 | 66 | /* Alias word address of SDIOSUSPEND bit */ |
mbed_official | 126:549ba18ddd81 | 67 | #define CMD_OFFSET (SDIO_OFFSET + 0x0C) |
mbed_official | 126:549ba18ddd81 | 68 | #define SDIOSUSPEND_BitNumber 0x0B |
mbed_official | 126:549ba18ddd81 | 69 | #define CMD_SDIOSUSPEND_BB (PERIPH_BB_BASE + (CMD_OFFSET * 32) + (SDIOSUSPEND_BitNumber * 4)) |
mbed_official | 126:549ba18ddd81 | 70 | |
mbed_official | 126:549ba18ddd81 | 71 | /* Alias word address of ENCMDCOMPL bit */ |
mbed_official | 126:549ba18ddd81 | 72 | #define ENCMDCOMPL_BitNumber 0x0C |
mbed_official | 126:549ba18ddd81 | 73 | #define CMD_ENCMDCOMPL_BB (PERIPH_BB_BASE + (CMD_OFFSET * 32) + (ENCMDCOMPL_BitNumber * 4)) |
mbed_official | 126:549ba18ddd81 | 74 | |
mbed_official | 126:549ba18ddd81 | 75 | /* Alias word address of NIEN bit */ |
mbed_official | 126:549ba18ddd81 | 76 | #define NIEN_BitNumber 0x0D |
mbed_official | 126:549ba18ddd81 | 77 | #define CMD_NIEN_BB (PERIPH_BB_BASE + (CMD_OFFSET * 32) + (NIEN_BitNumber * 4)) |
mbed_official | 126:549ba18ddd81 | 78 | |
mbed_official | 126:549ba18ddd81 | 79 | /* Alias word address of ATACMD bit */ |
mbed_official | 126:549ba18ddd81 | 80 | #define ATACMD_BitNumber 0x0E |
mbed_official | 126:549ba18ddd81 | 81 | #define CMD_ATACMD_BB (PERIPH_BB_BASE + (CMD_OFFSET * 32) + (ATACMD_BitNumber * 4)) |
mbed_official | 126:549ba18ddd81 | 82 | |
mbed_official | 126:549ba18ddd81 | 83 | /* --- DCTRL Register ---*/ |
mbed_official | 126:549ba18ddd81 | 84 | |
mbed_official | 126:549ba18ddd81 | 85 | /* Alias word address of DMAEN bit */ |
mbed_official | 126:549ba18ddd81 | 86 | #define DCTRL_OFFSET (SDIO_OFFSET + 0x2C) |
mbed_official | 126:549ba18ddd81 | 87 | #define DMAEN_BitNumber 0x03 |
mbed_official | 126:549ba18ddd81 | 88 | #define DCTRL_DMAEN_BB (PERIPH_BB_BASE + (DCTRL_OFFSET * 32) + (DMAEN_BitNumber * 4)) |
mbed_official | 126:549ba18ddd81 | 89 | |
mbed_official | 126:549ba18ddd81 | 90 | /* Alias word address of RWSTART bit */ |
mbed_official | 126:549ba18ddd81 | 91 | #define RWSTART_BitNumber 0x08 |
mbed_official | 126:549ba18ddd81 | 92 | #define DCTRL_RWSTART_BB (PERIPH_BB_BASE + (DCTRL_OFFSET * 32) + (RWSTART_BitNumber * 4)) |
mbed_official | 126:549ba18ddd81 | 93 | |
mbed_official | 126:549ba18ddd81 | 94 | /* Alias word address of RWSTOP bit */ |
mbed_official | 126:549ba18ddd81 | 95 | #define RWSTOP_BitNumber 0x09 |
mbed_official | 126:549ba18ddd81 | 96 | #define DCTRL_RWSTOP_BB (PERIPH_BB_BASE + (DCTRL_OFFSET * 32) + (RWSTOP_BitNumber * 4)) |
mbed_official | 126:549ba18ddd81 | 97 | |
mbed_official | 126:549ba18ddd81 | 98 | /* Alias word address of RWMOD bit */ |
mbed_official | 126:549ba18ddd81 | 99 | #define RWMOD_BitNumber 0x0A |
mbed_official | 126:549ba18ddd81 | 100 | #define DCTRL_RWMOD_BB (PERIPH_BB_BASE + (DCTRL_OFFSET * 32) + (RWMOD_BitNumber * 4)) |
mbed_official | 126:549ba18ddd81 | 101 | |
mbed_official | 126:549ba18ddd81 | 102 | /* Alias word address of SDIOEN bit */ |
mbed_official | 126:549ba18ddd81 | 103 | #define SDIOEN_BitNumber 0x0B |
mbed_official | 126:549ba18ddd81 | 104 | #define DCTRL_SDIOEN_BB (PERIPH_BB_BASE + (DCTRL_OFFSET * 32) + (SDIOEN_BitNumber * 4)) |
mbed_official | 126:549ba18ddd81 | 105 | |
mbed_official | 126:549ba18ddd81 | 106 | /* ---------------------- SDIO registers bit mask ------------------------ */ |
mbed_official | 126:549ba18ddd81 | 107 | |
mbed_official | 126:549ba18ddd81 | 108 | /* --- CLKCR Register ---*/ |
mbed_official | 126:549ba18ddd81 | 109 | |
mbed_official | 126:549ba18ddd81 | 110 | /* CLKCR register clear mask */ |
mbed_official | 126:549ba18ddd81 | 111 | #define CLKCR_CLEAR_MASK ((uint32_t)0xFFFF8100) |
mbed_official | 126:549ba18ddd81 | 112 | |
mbed_official | 126:549ba18ddd81 | 113 | /* --- PWRCTRL Register ---*/ |
mbed_official | 126:549ba18ddd81 | 114 | |
mbed_official | 126:549ba18ddd81 | 115 | /* SDIO PWRCTRL Mask */ |
mbed_official | 126:549ba18ddd81 | 116 | #define PWR_PWRCTRL_MASK ((uint32_t)0xFFFFFFFC) |
mbed_official | 126:549ba18ddd81 | 117 | |
mbed_official | 126:549ba18ddd81 | 118 | /* --- DCTRL Register ---*/ |
mbed_official | 126:549ba18ddd81 | 119 | |
mbed_official | 126:549ba18ddd81 | 120 | /* SDIO DCTRL Clear Mask */ |
mbed_official | 126:549ba18ddd81 | 121 | #define DCTRL_CLEAR_MASK ((uint32_t)0xFFFFFF08) |
mbed_official | 126:549ba18ddd81 | 122 | |
mbed_official | 126:549ba18ddd81 | 123 | /* --- CMD Register ---*/ |
mbed_official | 126:549ba18ddd81 | 124 | |
mbed_official | 126:549ba18ddd81 | 125 | /* CMD Register clear mask */ |
mbed_official | 126:549ba18ddd81 | 126 | #define CMD_CLEAR_MASK ((uint32_t)0xFFFFF800) |
mbed_official | 126:549ba18ddd81 | 127 | |
mbed_official | 126:549ba18ddd81 | 128 | /* SDIO RESP Registers Address */ |
mbed_official | 126:549ba18ddd81 | 129 | #define SDIO_RESP_ADDR ((uint32_t)(SDIO_BASE + 0x14)) |
mbed_official | 126:549ba18ddd81 | 130 | |
mbed_official | 126:549ba18ddd81 | 131 | /** |
mbed_official | 126:549ba18ddd81 | 132 | * @} |
mbed_official | 126:549ba18ddd81 | 133 | */ |
mbed_official | 126:549ba18ddd81 | 134 | |
mbed_official | 126:549ba18ddd81 | 135 | /** @defgroup SDIO_Private_Defines |
mbed_official | 126:549ba18ddd81 | 136 | * @{ |
mbed_official | 126:549ba18ddd81 | 137 | */ |
mbed_official | 126:549ba18ddd81 | 138 | |
mbed_official | 126:549ba18ddd81 | 139 | /** |
mbed_official | 126:549ba18ddd81 | 140 | * @} |
mbed_official | 126:549ba18ddd81 | 141 | */ |
mbed_official | 126:549ba18ddd81 | 142 | |
mbed_official | 126:549ba18ddd81 | 143 | /** @defgroup SDIO_Private_Macros |
mbed_official | 126:549ba18ddd81 | 144 | * @{ |
mbed_official | 126:549ba18ddd81 | 145 | */ |
mbed_official | 126:549ba18ddd81 | 146 | |
mbed_official | 126:549ba18ddd81 | 147 | /** |
mbed_official | 126:549ba18ddd81 | 148 | * @} |
mbed_official | 126:549ba18ddd81 | 149 | */ |
mbed_official | 126:549ba18ddd81 | 150 | |
mbed_official | 126:549ba18ddd81 | 151 | /** @defgroup SDIO_Private_Variables |
mbed_official | 126:549ba18ddd81 | 152 | * @{ |
mbed_official | 126:549ba18ddd81 | 153 | */ |
mbed_official | 126:549ba18ddd81 | 154 | |
mbed_official | 126:549ba18ddd81 | 155 | /** |
mbed_official | 126:549ba18ddd81 | 156 | * @} |
mbed_official | 126:549ba18ddd81 | 157 | */ |
mbed_official | 126:549ba18ddd81 | 158 | |
mbed_official | 126:549ba18ddd81 | 159 | /** @defgroup SDIO_Private_FunctionPrototypes |
mbed_official | 126:549ba18ddd81 | 160 | * @{ |
mbed_official | 126:549ba18ddd81 | 161 | */ |
mbed_official | 126:549ba18ddd81 | 162 | |
mbed_official | 126:549ba18ddd81 | 163 | /** |
mbed_official | 126:549ba18ddd81 | 164 | * @} |
mbed_official | 126:549ba18ddd81 | 165 | */ |
mbed_official | 126:549ba18ddd81 | 166 | |
mbed_official | 126:549ba18ddd81 | 167 | /** @defgroup SDIO_Private_Functions |
mbed_official | 126:549ba18ddd81 | 168 | * @{ |
mbed_official | 126:549ba18ddd81 | 169 | */ |
mbed_official | 126:549ba18ddd81 | 170 | |
mbed_official | 126:549ba18ddd81 | 171 | /** |
mbed_official | 126:549ba18ddd81 | 172 | * @brief Deinitializes the SDIO peripheral registers to their default reset values. |
mbed_official | 126:549ba18ddd81 | 173 | * @param None |
mbed_official | 126:549ba18ddd81 | 174 | * @retval None |
mbed_official | 126:549ba18ddd81 | 175 | */ |
mbed_official | 126:549ba18ddd81 | 176 | void SDIO_DeInit(void) |
mbed_official | 126:549ba18ddd81 | 177 | { |
mbed_official | 126:549ba18ddd81 | 178 | SDIO->POWER = 0x00000000; |
mbed_official | 126:549ba18ddd81 | 179 | SDIO->CLKCR = 0x00000000; |
mbed_official | 126:549ba18ddd81 | 180 | SDIO->ARG = 0x00000000; |
mbed_official | 126:549ba18ddd81 | 181 | SDIO->CMD = 0x00000000; |
mbed_official | 126:549ba18ddd81 | 182 | SDIO->DTIMER = 0x00000000; |
mbed_official | 126:549ba18ddd81 | 183 | SDIO->DLEN = 0x00000000; |
mbed_official | 126:549ba18ddd81 | 184 | SDIO->DCTRL = 0x00000000; |
mbed_official | 126:549ba18ddd81 | 185 | SDIO->ICR = 0x00C007FF; |
mbed_official | 126:549ba18ddd81 | 186 | SDIO->MASK = 0x00000000; |
mbed_official | 126:549ba18ddd81 | 187 | } |
mbed_official | 126:549ba18ddd81 | 188 | |
mbed_official | 126:549ba18ddd81 | 189 | /** |
mbed_official | 126:549ba18ddd81 | 190 | * @brief Initializes the SDIO peripheral according to the specified |
mbed_official | 126:549ba18ddd81 | 191 | * parameters in the SDIO_InitStruct. |
mbed_official | 126:549ba18ddd81 | 192 | * @param SDIO_InitStruct : pointer to a SDIO_InitTypeDef structure |
mbed_official | 126:549ba18ddd81 | 193 | * that contains the configuration information for the SDIO peripheral. |
mbed_official | 126:549ba18ddd81 | 194 | * @retval None |
mbed_official | 126:549ba18ddd81 | 195 | */ |
mbed_official | 126:549ba18ddd81 | 196 | void SDIO_Init(SDIO_InitTypeDef* SDIO_InitStruct) |
mbed_official | 126:549ba18ddd81 | 197 | { |
mbed_official | 126:549ba18ddd81 | 198 | uint32_t tmpreg = 0; |
mbed_official | 126:549ba18ddd81 | 199 | |
mbed_official | 126:549ba18ddd81 | 200 | /* Check the parameters */ |
mbed_official | 126:549ba18ddd81 | 201 | assert_param(IS_SDIO_CLOCK_EDGE(SDIO_InitStruct->SDIO_ClockEdge)); |
mbed_official | 126:549ba18ddd81 | 202 | assert_param(IS_SDIO_CLOCK_BYPASS(SDIO_InitStruct->SDIO_ClockBypass)); |
mbed_official | 126:549ba18ddd81 | 203 | assert_param(IS_SDIO_CLOCK_POWER_SAVE(SDIO_InitStruct->SDIO_ClockPowerSave)); |
mbed_official | 126:549ba18ddd81 | 204 | assert_param(IS_SDIO_BUS_WIDE(SDIO_InitStruct->SDIO_BusWide)); |
mbed_official | 126:549ba18ddd81 | 205 | assert_param(IS_SDIO_HARDWARE_FLOW_CONTROL(SDIO_InitStruct->SDIO_HardwareFlowControl)); |
mbed_official | 126:549ba18ddd81 | 206 | |
mbed_official | 126:549ba18ddd81 | 207 | /*---------------------------- SDIO CLKCR Configuration ------------------------*/ |
mbed_official | 126:549ba18ddd81 | 208 | /* Get the SDIO CLKCR value */ |
mbed_official | 126:549ba18ddd81 | 209 | tmpreg = SDIO->CLKCR; |
mbed_official | 126:549ba18ddd81 | 210 | |
mbed_official | 126:549ba18ddd81 | 211 | /* Clear CLKDIV, PWRSAV, BYPASS, WIDBUS, NEGEDGE, HWFC_EN bits */ |
mbed_official | 126:549ba18ddd81 | 212 | tmpreg &= CLKCR_CLEAR_MASK; |
mbed_official | 126:549ba18ddd81 | 213 | |
mbed_official | 126:549ba18ddd81 | 214 | /* Set CLKDIV bits according to SDIO_ClockDiv value */ |
mbed_official | 126:549ba18ddd81 | 215 | /* Set PWRSAV bit according to SDIO_ClockPowerSave value */ |
mbed_official | 126:549ba18ddd81 | 216 | /* Set BYPASS bit according to SDIO_ClockBypass value */ |
mbed_official | 126:549ba18ddd81 | 217 | /* Set WIDBUS bits according to SDIO_BusWide value */ |
mbed_official | 126:549ba18ddd81 | 218 | /* Set NEGEDGE bits according to SDIO_ClockEdge value */ |
mbed_official | 126:549ba18ddd81 | 219 | /* Set HWFC_EN bits according to SDIO_HardwareFlowControl value */ |
mbed_official | 126:549ba18ddd81 | 220 | tmpreg |= (SDIO_InitStruct->SDIO_ClockDiv | SDIO_InitStruct->SDIO_ClockPowerSave | |
mbed_official | 126:549ba18ddd81 | 221 | SDIO_InitStruct->SDIO_ClockBypass | SDIO_InitStruct->SDIO_BusWide | |
mbed_official | 126:549ba18ddd81 | 222 | SDIO_InitStruct->SDIO_ClockEdge | SDIO_InitStruct->SDIO_HardwareFlowControl); |
mbed_official | 126:549ba18ddd81 | 223 | |
mbed_official | 126:549ba18ddd81 | 224 | /* Write to SDIO CLKCR */ |
mbed_official | 126:549ba18ddd81 | 225 | SDIO->CLKCR = tmpreg; |
mbed_official | 126:549ba18ddd81 | 226 | } |
mbed_official | 126:549ba18ddd81 | 227 | |
mbed_official | 126:549ba18ddd81 | 228 | /** |
mbed_official | 126:549ba18ddd81 | 229 | * @brief Fills each SDIO_InitStruct member with its default value. |
mbed_official | 126:549ba18ddd81 | 230 | * @param SDIO_InitStruct: pointer to an SDIO_InitTypeDef structure which |
mbed_official | 126:549ba18ddd81 | 231 | * will be initialized. |
mbed_official | 126:549ba18ddd81 | 232 | * @retval None |
mbed_official | 126:549ba18ddd81 | 233 | */ |
mbed_official | 126:549ba18ddd81 | 234 | void SDIO_StructInit(SDIO_InitTypeDef* SDIO_InitStruct) |
mbed_official | 126:549ba18ddd81 | 235 | { |
mbed_official | 126:549ba18ddd81 | 236 | /* SDIO_InitStruct members default value */ |
mbed_official | 126:549ba18ddd81 | 237 | SDIO_InitStruct->SDIO_ClockDiv = 0x00; |
mbed_official | 126:549ba18ddd81 | 238 | SDIO_InitStruct->SDIO_ClockEdge = SDIO_ClockEdge_Rising; |
mbed_official | 126:549ba18ddd81 | 239 | SDIO_InitStruct->SDIO_ClockBypass = SDIO_ClockBypass_Disable; |
mbed_official | 126:549ba18ddd81 | 240 | SDIO_InitStruct->SDIO_ClockPowerSave = SDIO_ClockPowerSave_Disable; |
mbed_official | 126:549ba18ddd81 | 241 | SDIO_InitStruct->SDIO_BusWide = SDIO_BusWide_1b; |
mbed_official | 126:549ba18ddd81 | 242 | SDIO_InitStruct->SDIO_HardwareFlowControl = SDIO_HardwareFlowControl_Disable; |
mbed_official | 126:549ba18ddd81 | 243 | } |
mbed_official | 126:549ba18ddd81 | 244 | |
mbed_official | 126:549ba18ddd81 | 245 | /** |
mbed_official | 126:549ba18ddd81 | 246 | * @brief Enables or disables the SDIO Clock. |
mbed_official | 126:549ba18ddd81 | 247 | * @param NewState: new state of the SDIO Clock. This parameter can be: ENABLE or DISABLE. |
mbed_official | 126:549ba18ddd81 | 248 | * @retval None |
mbed_official | 126:549ba18ddd81 | 249 | */ |
mbed_official | 126:549ba18ddd81 | 250 | void SDIO_ClockCmd(FunctionalState NewState) |
mbed_official | 126:549ba18ddd81 | 251 | { |
mbed_official | 126:549ba18ddd81 | 252 | /* Check the parameters */ |
mbed_official | 126:549ba18ddd81 | 253 | assert_param(IS_FUNCTIONAL_STATE(NewState)); |
mbed_official | 126:549ba18ddd81 | 254 | |
mbed_official | 126:549ba18ddd81 | 255 | *(__IO uint32_t *) CLKCR_CLKEN_BB = (uint32_t)NewState; |
mbed_official | 126:549ba18ddd81 | 256 | } |
mbed_official | 126:549ba18ddd81 | 257 | |
mbed_official | 126:549ba18ddd81 | 258 | /** |
mbed_official | 126:549ba18ddd81 | 259 | * @brief Sets the power status of the controller. |
mbed_official | 126:549ba18ddd81 | 260 | * @param SDIO_PowerState: new state of the Power state. |
mbed_official | 126:549ba18ddd81 | 261 | * This parameter can be one of the following values: |
mbed_official | 126:549ba18ddd81 | 262 | * @arg SDIO_PowerState_OFF |
mbed_official | 126:549ba18ddd81 | 263 | * @arg SDIO_PowerState_ON |
mbed_official | 126:549ba18ddd81 | 264 | * @retval None |
mbed_official | 126:549ba18ddd81 | 265 | */ |
mbed_official | 126:549ba18ddd81 | 266 | void SDIO_SetPowerState(uint32_t SDIO_PowerState) |
mbed_official | 126:549ba18ddd81 | 267 | { |
mbed_official | 126:549ba18ddd81 | 268 | /* Check the parameters */ |
mbed_official | 126:549ba18ddd81 | 269 | assert_param(IS_SDIO_POWER_STATE(SDIO_PowerState)); |
mbed_official | 126:549ba18ddd81 | 270 | |
mbed_official | 126:549ba18ddd81 | 271 | SDIO->POWER = SDIO_PowerState; |
mbed_official | 126:549ba18ddd81 | 272 | } |
mbed_official | 126:549ba18ddd81 | 273 | |
mbed_official | 126:549ba18ddd81 | 274 | /** |
mbed_official | 126:549ba18ddd81 | 275 | * @brief Gets the power status of the controller. |
mbed_official | 126:549ba18ddd81 | 276 | * @param None |
mbed_official | 126:549ba18ddd81 | 277 | * @retval Power status of the controller. The returned value can |
mbed_official | 126:549ba18ddd81 | 278 | * be one of the following: |
mbed_official | 126:549ba18ddd81 | 279 | * - 0x00: Power OFF |
mbed_official | 126:549ba18ddd81 | 280 | * - 0x02: Power UP |
mbed_official | 126:549ba18ddd81 | 281 | * - 0x03: Power ON |
mbed_official | 126:549ba18ddd81 | 282 | */ |
mbed_official | 126:549ba18ddd81 | 283 | uint32_t SDIO_GetPowerState(void) |
mbed_official | 126:549ba18ddd81 | 284 | { |
mbed_official | 126:549ba18ddd81 | 285 | return (SDIO->POWER & (~PWR_PWRCTRL_MASK)); |
mbed_official | 126:549ba18ddd81 | 286 | } |
mbed_official | 126:549ba18ddd81 | 287 | |
mbed_official | 126:549ba18ddd81 | 288 | /** |
mbed_official | 126:549ba18ddd81 | 289 | * @brief Enables or disables the SDIO interrupts. |
mbed_official | 126:549ba18ddd81 | 290 | * @param SDIO_IT: specifies the SDIO interrupt sources to be enabled or disabled. |
mbed_official | 126:549ba18ddd81 | 291 | * This parameter can be one or a combination of the following values: |
mbed_official | 126:549ba18ddd81 | 292 | * @arg SDIO_IT_CCRCFAIL: Command response received (CRC check failed) interrupt |
mbed_official | 126:549ba18ddd81 | 293 | * @arg SDIO_IT_DCRCFAIL: Data block sent/received (CRC check failed) interrupt |
mbed_official | 126:549ba18ddd81 | 294 | * @arg SDIO_IT_CTIMEOUT: Command response timeout interrupt |
mbed_official | 126:549ba18ddd81 | 295 | * @arg SDIO_IT_DTIMEOUT: Data timeout interrupt |
mbed_official | 126:549ba18ddd81 | 296 | * @arg SDIO_IT_TXUNDERR: Transmit FIFO underrun error interrupt |
mbed_official | 126:549ba18ddd81 | 297 | * @arg SDIO_IT_RXOVERR: Received FIFO overrun error interrupt |
mbed_official | 126:549ba18ddd81 | 298 | * @arg SDIO_IT_CMDREND: Command response received (CRC check passed) interrupt |
mbed_official | 126:549ba18ddd81 | 299 | * @arg SDIO_IT_CMDSENT: Command sent (no response required) interrupt |
mbed_official | 126:549ba18ddd81 | 300 | * @arg SDIO_IT_DATAEND: Data end (data counter, SDIDCOUNT, is zero) interrupt |
mbed_official | 126:549ba18ddd81 | 301 | * @arg SDIO_IT_STBITERR: Start bit not detected on all data signals in wide |
mbed_official | 126:549ba18ddd81 | 302 | * bus mode interrupt |
mbed_official | 126:549ba18ddd81 | 303 | * @arg SDIO_IT_DBCKEND: Data block sent/received (CRC check passed) interrupt |
mbed_official | 126:549ba18ddd81 | 304 | * @arg SDIO_IT_CMDACT: Command transfer in progress interrupt |
mbed_official | 126:549ba18ddd81 | 305 | * @arg SDIO_IT_TXACT: Data transmit in progress interrupt |
mbed_official | 126:549ba18ddd81 | 306 | * @arg SDIO_IT_RXACT: Data receive in progress interrupt |
mbed_official | 126:549ba18ddd81 | 307 | * @arg SDIO_IT_TXFIFOHE: Transmit FIFO Half Empty interrupt |
mbed_official | 126:549ba18ddd81 | 308 | * @arg SDIO_IT_RXFIFOHF: Receive FIFO Half Full interrupt |
mbed_official | 126:549ba18ddd81 | 309 | * @arg SDIO_IT_TXFIFOF: Transmit FIFO full interrupt |
mbed_official | 126:549ba18ddd81 | 310 | * @arg SDIO_IT_RXFIFOF: Receive FIFO full interrupt |
mbed_official | 126:549ba18ddd81 | 311 | * @arg SDIO_IT_TXFIFOE: Transmit FIFO empty interrupt |
mbed_official | 126:549ba18ddd81 | 312 | * @arg SDIO_IT_RXFIFOE: Receive FIFO empty interrupt |
mbed_official | 126:549ba18ddd81 | 313 | * @arg SDIO_IT_TXDAVL: Data available in transmit FIFO interrupt |
mbed_official | 126:549ba18ddd81 | 314 | * @arg SDIO_IT_RXDAVL: Data available in receive FIFO interrupt |
mbed_official | 126:549ba18ddd81 | 315 | * @arg SDIO_IT_SDIOIT: SD I/O interrupt received interrupt |
mbed_official | 126:549ba18ddd81 | 316 | * @arg SDIO_IT_CEATAEND: CE-ATA command completion signal received for CMD61 interrupt |
mbed_official | 126:549ba18ddd81 | 317 | * @param NewState: new state of the specified SDIO interrupts. |
mbed_official | 126:549ba18ddd81 | 318 | * This parameter can be: ENABLE or DISABLE. |
mbed_official | 126:549ba18ddd81 | 319 | * @retval None |
mbed_official | 126:549ba18ddd81 | 320 | */ |
mbed_official | 126:549ba18ddd81 | 321 | void SDIO_ITConfig(uint32_t SDIO_IT, FunctionalState NewState) |
mbed_official | 126:549ba18ddd81 | 322 | { |
mbed_official | 126:549ba18ddd81 | 323 | /* Check the parameters */ |
mbed_official | 126:549ba18ddd81 | 324 | assert_param(IS_SDIO_IT(SDIO_IT)); |
mbed_official | 126:549ba18ddd81 | 325 | assert_param(IS_FUNCTIONAL_STATE(NewState)); |
mbed_official | 126:549ba18ddd81 | 326 | |
mbed_official | 126:549ba18ddd81 | 327 | if (NewState != DISABLE) |
mbed_official | 126:549ba18ddd81 | 328 | { |
mbed_official | 126:549ba18ddd81 | 329 | /* Enable the SDIO interrupts */ |
mbed_official | 126:549ba18ddd81 | 330 | SDIO->MASK |= SDIO_IT; |
mbed_official | 126:549ba18ddd81 | 331 | } |
mbed_official | 126:549ba18ddd81 | 332 | else |
mbed_official | 126:549ba18ddd81 | 333 | { |
mbed_official | 126:549ba18ddd81 | 334 | /* Disable the SDIO interrupts */ |
mbed_official | 126:549ba18ddd81 | 335 | SDIO->MASK &= ~SDIO_IT; |
mbed_official | 126:549ba18ddd81 | 336 | } |
mbed_official | 126:549ba18ddd81 | 337 | } |
mbed_official | 126:549ba18ddd81 | 338 | |
mbed_official | 126:549ba18ddd81 | 339 | /** |
mbed_official | 126:549ba18ddd81 | 340 | * @brief Enables or disables the SDIO DMA request. |
mbed_official | 126:549ba18ddd81 | 341 | * @param NewState: new state of the selected SDIO DMA request. |
mbed_official | 126:549ba18ddd81 | 342 | * This parameter can be: ENABLE or DISABLE. |
mbed_official | 126:549ba18ddd81 | 343 | * @retval None |
mbed_official | 126:549ba18ddd81 | 344 | */ |
mbed_official | 126:549ba18ddd81 | 345 | void SDIO_DMACmd(FunctionalState NewState) |
mbed_official | 126:549ba18ddd81 | 346 | { |
mbed_official | 126:549ba18ddd81 | 347 | /* Check the parameters */ |
mbed_official | 126:549ba18ddd81 | 348 | assert_param(IS_FUNCTIONAL_STATE(NewState)); |
mbed_official | 126:549ba18ddd81 | 349 | |
mbed_official | 126:549ba18ddd81 | 350 | *(__IO uint32_t *) DCTRL_DMAEN_BB = (uint32_t)NewState; |
mbed_official | 126:549ba18ddd81 | 351 | } |
mbed_official | 126:549ba18ddd81 | 352 | |
mbed_official | 126:549ba18ddd81 | 353 | /** |
mbed_official | 126:549ba18ddd81 | 354 | * @brief Initializes the SDIO Command according to the specified |
mbed_official | 126:549ba18ddd81 | 355 | * parameters in the SDIO_CmdInitStruct and send the command. |
mbed_official | 126:549ba18ddd81 | 356 | * @param SDIO_CmdInitStruct : pointer to a SDIO_CmdInitTypeDef |
mbed_official | 126:549ba18ddd81 | 357 | * structure that contains the configuration information for the SDIO command. |
mbed_official | 126:549ba18ddd81 | 358 | * @retval None |
mbed_official | 126:549ba18ddd81 | 359 | */ |
mbed_official | 126:549ba18ddd81 | 360 | void SDIO_SendCommand(SDIO_CmdInitTypeDef *SDIO_CmdInitStruct) |
mbed_official | 126:549ba18ddd81 | 361 | { |
mbed_official | 126:549ba18ddd81 | 362 | uint32_t tmpreg = 0; |
mbed_official | 126:549ba18ddd81 | 363 | |
mbed_official | 126:549ba18ddd81 | 364 | /* Check the parameters */ |
mbed_official | 126:549ba18ddd81 | 365 | assert_param(IS_SDIO_CMD_INDEX(SDIO_CmdInitStruct->SDIO_CmdIndex)); |
mbed_official | 126:549ba18ddd81 | 366 | assert_param(IS_SDIO_RESPONSE(SDIO_CmdInitStruct->SDIO_Response)); |
mbed_official | 126:549ba18ddd81 | 367 | assert_param(IS_SDIO_WAIT(SDIO_CmdInitStruct->SDIO_Wait)); |
mbed_official | 126:549ba18ddd81 | 368 | assert_param(IS_SDIO_CPSM(SDIO_CmdInitStruct->SDIO_CPSM)); |
mbed_official | 126:549ba18ddd81 | 369 | |
mbed_official | 126:549ba18ddd81 | 370 | /*---------------------------- SDIO ARG Configuration ------------------------*/ |
mbed_official | 126:549ba18ddd81 | 371 | /* Set the SDIO Argument value */ |
mbed_official | 126:549ba18ddd81 | 372 | SDIO->ARG = SDIO_CmdInitStruct->SDIO_Argument; |
mbed_official | 126:549ba18ddd81 | 373 | |
mbed_official | 126:549ba18ddd81 | 374 | /*---------------------------- SDIO CMD Configuration ------------------------*/ |
mbed_official | 126:549ba18ddd81 | 375 | /* Get the SDIO CMD value */ |
mbed_official | 126:549ba18ddd81 | 376 | tmpreg = SDIO->CMD; |
mbed_official | 126:549ba18ddd81 | 377 | /* Clear CMDINDEX, WAITRESP, WAITINT, WAITPEND, CPSMEN bits */ |
mbed_official | 126:549ba18ddd81 | 378 | tmpreg &= CMD_CLEAR_MASK; |
mbed_official | 126:549ba18ddd81 | 379 | /* Set CMDINDEX bits according to SDIO_CmdIndex value */ |
mbed_official | 126:549ba18ddd81 | 380 | /* Set WAITRESP bits according to SDIO_Response value */ |
mbed_official | 126:549ba18ddd81 | 381 | /* Set WAITINT and WAITPEND bits according to SDIO_Wait value */ |
mbed_official | 126:549ba18ddd81 | 382 | /* Set CPSMEN bits according to SDIO_CPSM value */ |
mbed_official | 126:549ba18ddd81 | 383 | tmpreg |= (uint32_t)SDIO_CmdInitStruct->SDIO_CmdIndex | SDIO_CmdInitStruct->SDIO_Response |
mbed_official | 126:549ba18ddd81 | 384 | | SDIO_CmdInitStruct->SDIO_Wait | SDIO_CmdInitStruct->SDIO_CPSM; |
mbed_official | 126:549ba18ddd81 | 385 | |
mbed_official | 126:549ba18ddd81 | 386 | /* Write to SDIO CMD */ |
mbed_official | 126:549ba18ddd81 | 387 | SDIO->CMD = tmpreg; |
mbed_official | 126:549ba18ddd81 | 388 | } |
mbed_official | 126:549ba18ddd81 | 389 | |
mbed_official | 126:549ba18ddd81 | 390 | /** |
mbed_official | 126:549ba18ddd81 | 391 | * @brief Fills each SDIO_CmdInitStruct member with its default value. |
mbed_official | 126:549ba18ddd81 | 392 | * @param SDIO_CmdInitStruct: pointer to an SDIO_CmdInitTypeDef |
mbed_official | 126:549ba18ddd81 | 393 | * structure which will be initialized. |
mbed_official | 126:549ba18ddd81 | 394 | * @retval None |
mbed_official | 126:549ba18ddd81 | 395 | */ |
mbed_official | 126:549ba18ddd81 | 396 | void SDIO_CmdStructInit(SDIO_CmdInitTypeDef* SDIO_CmdInitStruct) |
mbed_official | 126:549ba18ddd81 | 397 | { |
mbed_official | 126:549ba18ddd81 | 398 | /* SDIO_CmdInitStruct members default value */ |
mbed_official | 126:549ba18ddd81 | 399 | SDIO_CmdInitStruct->SDIO_Argument = 0x00; |
mbed_official | 126:549ba18ddd81 | 400 | SDIO_CmdInitStruct->SDIO_CmdIndex = 0x00; |
mbed_official | 126:549ba18ddd81 | 401 | SDIO_CmdInitStruct->SDIO_Response = SDIO_Response_No; |
mbed_official | 126:549ba18ddd81 | 402 | SDIO_CmdInitStruct->SDIO_Wait = SDIO_Wait_No; |
mbed_official | 126:549ba18ddd81 | 403 | SDIO_CmdInitStruct->SDIO_CPSM = SDIO_CPSM_Disable; |
mbed_official | 126:549ba18ddd81 | 404 | } |
mbed_official | 126:549ba18ddd81 | 405 | |
mbed_official | 126:549ba18ddd81 | 406 | /** |
mbed_official | 126:549ba18ddd81 | 407 | * @brief Returns command index of last command for which response received. |
mbed_official | 126:549ba18ddd81 | 408 | * @param None |
mbed_official | 126:549ba18ddd81 | 409 | * @retval Returns the command index of the last command response received. |
mbed_official | 126:549ba18ddd81 | 410 | */ |
mbed_official | 126:549ba18ddd81 | 411 | uint8_t SDIO_GetCommandResponse(void) |
mbed_official | 126:549ba18ddd81 | 412 | { |
mbed_official | 126:549ba18ddd81 | 413 | return (uint8_t)(SDIO->RESPCMD); |
mbed_official | 126:549ba18ddd81 | 414 | } |
mbed_official | 126:549ba18ddd81 | 415 | |
mbed_official | 126:549ba18ddd81 | 416 | /** |
mbed_official | 126:549ba18ddd81 | 417 | * @brief Returns response received from the card for the last command. |
mbed_official | 126:549ba18ddd81 | 418 | * @param SDIO_RESP: Specifies the SDIO response register. |
mbed_official | 126:549ba18ddd81 | 419 | * This parameter can be one of the following values: |
mbed_official | 126:549ba18ddd81 | 420 | * @arg SDIO_RESP1: Response Register 1 |
mbed_official | 126:549ba18ddd81 | 421 | * @arg SDIO_RESP2: Response Register 2 |
mbed_official | 126:549ba18ddd81 | 422 | * @arg SDIO_RESP3: Response Register 3 |
mbed_official | 126:549ba18ddd81 | 423 | * @arg SDIO_RESP4: Response Register 4 |
mbed_official | 126:549ba18ddd81 | 424 | * @retval The Corresponding response register value. |
mbed_official | 126:549ba18ddd81 | 425 | */ |
mbed_official | 126:549ba18ddd81 | 426 | uint32_t SDIO_GetResponse(uint32_t SDIO_RESP) |
mbed_official | 126:549ba18ddd81 | 427 | { |
mbed_official | 126:549ba18ddd81 | 428 | __IO uint32_t tmp = 0; |
mbed_official | 126:549ba18ddd81 | 429 | |
mbed_official | 126:549ba18ddd81 | 430 | /* Check the parameters */ |
mbed_official | 126:549ba18ddd81 | 431 | assert_param(IS_SDIO_RESP(SDIO_RESP)); |
mbed_official | 126:549ba18ddd81 | 432 | |
mbed_official | 126:549ba18ddd81 | 433 | tmp = SDIO_RESP_ADDR + SDIO_RESP; |
mbed_official | 126:549ba18ddd81 | 434 | |
mbed_official | 126:549ba18ddd81 | 435 | return (*(__IO uint32_t *) tmp); |
mbed_official | 126:549ba18ddd81 | 436 | } |
mbed_official | 126:549ba18ddd81 | 437 | |
mbed_official | 126:549ba18ddd81 | 438 | /** |
mbed_official | 126:549ba18ddd81 | 439 | * @brief Initializes the SDIO data path according to the specified |
mbed_official | 126:549ba18ddd81 | 440 | * parameters in the SDIO_DataInitStruct. |
mbed_official | 126:549ba18ddd81 | 441 | * @param SDIO_DataInitStruct : pointer to a SDIO_DataInitTypeDef structure that |
mbed_official | 126:549ba18ddd81 | 442 | * contains the configuration information for the SDIO command. |
mbed_official | 126:549ba18ddd81 | 443 | * @retval None |
mbed_official | 126:549ba18ddd81 | 444 | */ |
mbed_official | 126:549ba18ddd81 | 445 | void SDIO_DataConfig(SDIO_DataInitTypeDef* SDIO_DataInitStruct) |
mbed_official | 126:549ba18ddd81 | 446 | { |
mbed_official | 126:549ba18ddd81 | 447 | uint32_t tmpreg = 0; |
mbed_official | 126:549ba18ddd81 | 448 | |
mbed_official | 126:549ba18ddd81 | 449 | /* Check the parameters */ |
mbed_official | 126:549ba18ddd81 | 450 | assert_param(IS_SDIO_DATA_LENGTH(SDIO_DataInitStruct->SDIO_DataLength)); |
mbed_official | 126:549ba18ddd81 | 451 | assert_param(IS_SDIO_BLOCK_SIZE(SDIO_DataInitStruct->SDIO_DataBlockSize)); |
mbed_official | 126:549ba18ddd81 | 452 | assert_param(IS_SDIO_TRANSFER_DIR(SDIO_DataInitStruct->SDIO_TransferDir)); |
mbed_official | 126:549ba18ddd81 | 453 | assert_param(IS_SDIO_TRANSFER_MODE(SDIO_DataInitStruct->SDIO_TransferMode)); |
mbed_official | 126:549ba18ddd81 | 454 | assert_param(IS_SDIO_DPSM(SDIO_DataInitStruct->SDIO_DPSM)); |
mbed_official | 126:549ba18ddd81 | 455 | |
mbed_official | 126:549ba18ddd81 | 456 | /*---------------------------- SDIO DTIMER Configuration ---------------------*/ |
mbed_official | 126:549ba18ddd81 | 457 | /* Set the SDIO Data TimeOut value */ |
mbed_official | 126:549ba18ddd81 | 458 | SDIO->DTIMER = SDIO_DataInitStruct->SDIO_DataTimeOut; |
mbed_official | 126:549ba18ddd81 | 459 | |
mbed_official | 126:549ba18ddd81 | 460 | /*---------------------------- SDIO DLEN Configuration -----------------------*/ |
mbed_official | 126:549ba18ddd81 | 461 | /* Set the SDIO DataLength value */ |
mbed_official | 126:549ba18ddd81 | 462 | SDIO->DLEN = SDIO_DataInitStruct->SDIO_DataLength; |
mbed_official | 126:549ba18ddd81 | 463 | |
mbed_official | 126:549ba18ddd81 | 464 | /*---------------------------- SDIO DCTRL Configuration ----------------------*/ |
mbed_official | 126:549ba18ddd81 | 465 | /* Get the SDIO DCTRL value */ |
mbed_official | 126:549ba18ddd81 | 466 | tmpreg = SDIO->DCTRL; |
mbed_official | 126:549ba18ddd81 | 467 | /* Clear DEN, DTMODE, DTDIR and DBCKSIZE bits */ |
mbed_official | 126:549ba18ddd81 | 468 | tmpreg &= DCTRL_CLEAR_MASK; |
mbed_official | 126:549ba18ddd81 | 469 | /* Set DEN bit according to SDIO_DPSM value */ |
mbed_official | 126:549ba18ddd81 | 470 | /* Set DTMODE bit according to SDIO_TransferMode value */ |
mbed_official | 126:549ba18ddd81 | 471 | /* Set DTDIR bit according to SDIO_TransferDir value */ |
mbed_official | 126:549ba18ddd81 | 472 | /* Set DBCKSIZE bits according to SDIO_DataBlockSize value */ |
mbed_official | 126:549ba18ddd81 | 473 | tmpreg |= (uint32_t)SDIO_DataInitStruct->SDIO_DataBlockSize | SDIO_DataInitStruct->SDIO_TransferDir |
mbed_official | 126:549ba18ddd81 | 474 | | SDIO_DataInitStruct->SDIO_TransferMode | SDIO_DataInitStruct->SDIO_DPSM; |
mbed_official | 126:549ba18ddd81 | 475 | |
mbed_official | 126:549ba18ddd81 | 476 | /* Write to SDIO DCTRL */ |
mbed_official | 126:549ba18ddd81 | 477 | SDIO->DCTRL = tmpreg; |
mbed_official | 126:549ba18ddd81 | 478 | } |
mbed_official | 126:549ba18ddd81 | 479 | |
mbed_official | 126:549ba18ddd81 | 480 | /** |
mbed_official | 126:549ba18ddd81 | 481 | * @brief Fills each SDIO_DataInitStruct member with its default value. |
mbed_official | 126:549ba18ddd81 | 482 | * @param SDIO_DataInitStruct: pointer to an SDIO_DataInitTypeDef structure which |
mbed_official | 126:549ba18ddd81 | 483 | * will be initialized. |
mbed_official | 126:549ba18ddd81 | 484 | * @retval None |
mbed_official | 126:549ba18ddd81 | 485 | */ |
mbed_official | 126:549ba18ddd81 | 486 | void SDIO_DataStructInit(SDIO_DataInitTypeDef* SDIO_DataInitStruct) |
mbed_official | 126:549ba18ddd81 | 487 | { |
mbed_official | 126:549ba18ddd81 | 488 | /* SDIO_DataInitStruct members default value */ |
mbed_official | 126:549ba18ddd81 | 489 | SDIO_DataInitStruct->SDIO_DataTimeOut = 0xFFFFFFFF; |
mbed_official | 126:549ba18ddd81 | 490 | SDIO_DataInitStruct->SDIO_DataLength = 0x00; |
mbed_official | 126:549ba18ddd81 | 491 | SDIO_DataInitStruct->SDIO_DataBlockSize = SDIO_DataBlockSize_1b; |
mbed_official | 126:549ba18ddd81 | 492 | SDIO_DataInitStruct->SDIO_TransferDir = SDIO_TransferDir_ToCard; |
mbed_official | 126:549ba18ddd81 | 493 | SDIO_DataInitStruct->SDIO_TransferMode = SDIO_TransferMode_Block; |
mbed_official | 126:549ba18ddd81 | 494 | SDIO_DataInitStruct->SDIO_DPSM = SDIO_DPSM_Disable; |
mbed_official | 126:549ba18ddd81 | 495 | } |
mbed_official | 126:549ba18ddd81 | 496 | |
mbed_official | 126:549ba18ddd81 | 497 | /** |
mbed_official | 126:549ba18ddd81 | 498 | * @brief Returns number of remaining data bytes to be transferred. |
mbed_official | 126:549ba18ddd81 | 499 | * @param None |
mbed_official | 126:549ba18ddd81 | 500 | * @retval Number of remaining data bytes to be transferred |
mbed_official | 126:549ba18ddd81 | 501 | */ |
mbed_official | 126:549ba18ddd81 | 502 | uint32_t SDIO_GetDataCounter(void) |
mbed_official | 126:549ba18ddd81 | 503 | { |
mbed_official | 126:549ba18ddd81 | 504 | return SDIO->DCOUNT; |
mbed_official | 126:549ba18ddd81 | 505 | } |
mbed_official | 126:549ba18ddd81 | 506 | |
mbed_official | 126:549ba18ddd81 | 507 | /** |
mbed_official | 126:549ba18ddd81 | 508 | * @brief Read one data word from Rx FIFO. |
mbed_official | 126:549ba18ddd81 | 509 | * @param None |
mbed_official | 126:549ba18ddd81 | 510 | * @retval Data received |
mbed_official | 126:549ba18ddd81 | 511 | */ |
mbed_official | 126:549ba18ddd81 | 512 | uint32_t SDIO_ReadData(void) |
mbed_official | 126:549ba18ddd81 | 513 | { |
mbed_official | 126:549ba18ddd81 | 514 | return SDIO->FIFO; |
mbed_official | 126:549ba18ddd81 | 515 | } |
mbed_official | 126:549ba18ddd81 | 516 | |
mbed_official | 126:549ba18ddd81 | 517 | /** |
mbed_official | 126:549ba18ddd81 | 518 | * @brief Write one data word to Tx FIFO. |
mbed_official | 126:549ba18ddd81 | 519 | * @param Data: 32-bit data word to write. |
mbed_official | 126:549ba18ddd81 | 520 | * @retval None |
mbed_official | 126:549ba18ddd81 | 521 | */ |
mbed_official | 126:549ba18ddd81 | 522 | void SDIO_WriteData(uint32_t Data) |
mbed_official | 126:549ba18ddd81 | 523 | { |
mbed_official | 126:549ba18ddd81 | 524 | SDIO->FIFO = Data; |
mbed_official | 126:549ba18ddd81 | 525 | } |
mbed_official | 126:549ba18ddd81 | 526 | |
mbed_official | 126:549ba18ddd81 | 527 | /** |
mbed_official | 126:549ba18ddd81 | 528 | * @brief Returns the number of words left to be written to or read from FIFO. |
mbed_official | 126:549ba18ddd81 | 529 | * @param None |
mbed_official | 126:549ba18ddd81 | 530 | * @retval Remaining number of words. |
mbed_official | 126:549ba18ddd81 | 531 | */ |
mbed_official | 126:549ba18ddd81 | 532 | uint32_t SDIO_GetFIFOCount(void) |
mbed_official | 126:549ba18ddd81 | 533 | { |
mbed_official | 126:549ba18ddd81 | 534 | return SDIO->FIFOCNT; |
mbed_official | 126:549ba18ddd81 | 535 | } |
mbed_official | 126:549ba18ddd81 | 536 | |
mbed_official | 126:549ba18ddd81 | 537 | /** |
mbed_official | 126:549ba18ddd81 | 538 | * @brief Starts the SD I/O Read Wait operation. |
mbed_official | 126:549ba18ddd81 | 539 | * @param NewState: new state of the Start SDIO Read Wait operation. |
mbed_official | 126:549ba18ddd81 | 540 | * This parameter can be: ENABLE or DISABLE. |
mbed_official | 126:549ba18ddd81 | 541 | * @retval None |
mbed_official | 126:549ba18ddd81 | 542 | */ |
mbed_official | 126:549ba18ddd81 | 543 | void SDIO_StartSDIOReadWait(FunctionalState NewState) |
mbed_official | 126:549ba18ddd81 | 544 | { |
mbed_official | 126:549ba18ddd81 | 545 | /* Check the parameters */ |
mbed_official | 126:549ba18ddd81 | 546 | assert_param(IS_FUNCTIONAL_STATE(NewState)); |
mbed_official | 126:549ba18ddd81 | 547 | |
mbed_official | 126:549ba18ddd81 | 548 | *(__IO uint32_t *) DCTRL_RWSTART_BB = (uint32_t) NewState; |
mbed_official | 126:549ba18ddd81 | 549 | } |
mbed_official | 126:549ba18ddd81 | 550 | |
mbed_official | 126:549ba18ddd81 | 551 | /** |
mbed_official | 126:549ba18ddd81 | 552 | * @brief Stops the SD I/O Read Wait operation. |
mbed_official | 126:549ba18ddd81 | 553 | * @param NewState: new state of the Stop SDIO Read Wait operation. |
mbed_official | 126:549ba18ddd81 | 554 | * This parameter can be: ENABLE or DISABLE. |
mbed_official | 126:549ba18ddd81 | 555 | * @retval None |
mbed_official | 126:549ba18ddd81 | 556 | */ |
mbed_official | 126:549ba18ddd81 | 557 | void SDIO_StopSDIOReadWait(FunctionalState NewState) |
mbed_official | 126:549ba18ddd81 | 558 | { |
mbed_official | 126:549ba18ddd81 | 559 | /* Check the parameters */ |
mbed_official | 126:549ba18ddd81 | 560 | assert_param(IS_FUNCTIONAL_STATE(NewState)); |
mbed_official | 126:549ba18ddd81 | 561 | |
mbed_official | 126:549ba18ddd81 | 562 | *(__IO uint32_t *) DCTRL_RWSTOP_BB = (uint32_t) NewState; |
mbed_official | 126:549ba18ddd81 | 563 | } |
mbed_official | 126:549ba18ddd81 | 564 | |
mbed_official | 126:549ba18ddd81 | 565 | /** |
mbed_official | 126:549ba18ddd81 | 566 | * @brief Sets one of the two options of inserting read wait interval. |
mbed_official | 126:549ba18ddd81 | 567 | * @param SDIO_ReadWaitMode: SD I/O Read Wait operation mode. |
mbed_official | 126:549ba18ddd81 | 568 | * This parameter can be: |
mbed_official | 126:549ba18ddd81 | 569 | * @arg SDIO_ReadWaitMode_CLK: Read Wait control by stopping SDIOCLK |
mbed_official | 126:549ba18ddd81 | 570 | * @arg SDIO_ReadWaitMode_DATA2: Read Wait control using SDIO_DATA2 |
mbed_official | 126:549ba18ddd81 | 571 | * @retval None |
mbed_official | 126:549ba18ddd81 | 572 | */ |
mbed_official | 126:549ba18ddd81 | 573 | void SDIO_SetSDIOReadWaitMode(uint32_t SDIO_ReadWaitMode) |
mbed_official | 126:549ba18ddd81 | 574 | { |
mbed_official | 126:549ba18ddd81 | 575 | /* Check the parameters */ |
mbed_official | 126:549ba18ddd81 | 576 | assert_param(IS_SDIO_READWAIT_MODE(SDIO_ReadWaitMode)); |
mbed_official | 126:549ba18ddd81 | 577 | |
mbed_official | 126:549ba18ddd81 | 578 | *(__IO uint32_t *) DCTRL_RWMOD_BB = SDIO_ReadWaitMode; |
mbed_official | 126:549ba18ddd81 | 579 | } |
mbed_official | 126:549ba18ddd81 | 580 | |
mbed_official | 126:549ba18ddd81 | 581 | /** |
mbed_official | 126:549ba18ddd81 | 582 | * @brief Enables or disables the SD I/O Mode Operation. |
mbed_official | 126:549ba18ddd81 | 583 | * @param NewState: new state of SDIO specific operation. |
mbed_official | 126:549ba18ddd81 | 584 | * This parameter can be: ENABLE or DISABLE. |
mbed_official | 126:549ba18ddd81 | 585 | * @retval None |
mbed_official | 126:549ba18ddd81 | 586 | */ |
mbed_official | 126:549ba18ddd81 | 587 | void SDIO_SetSDIOOperation(FunctionalState NewState) |
mbed_official | 126:549ba18ddd81 | 588 | { |
mbed_official | 126:549ba18ddd81 | 589 | /* Check the parameters */ |
mbed_official | 126:549ba18ddd81 | 590 | assert_param(IS_FUNCTIONAL_STATE(NewState)); |
mbed_official | 126:549ba18ddd81 | 591 | |
mbed_official | 126:549ba18ddd81 | 592 | *(__IO uint32_t *) DCTRL_SDIOEN_BB = (uint32_t)NewState; |
mbed_official | 126:549ba18ddd81 | 593 | } |
mbed_official | 126:549ba18ddd81 | 594 | |
mbed_official | 126:549ba18ddd81 | 595 | /** |
mbed_official | 126:549ba18ddd81 | 596 | * @brief Enables or disables the SD I/O Mode suspend command sending. |
mbed_official | 126:549ba18ddd81 | 597 | * @param NewState: new state of the SD I/O Mode suspend command. |
mbed_official | 126:549ba18ddd81 | 598 | * This parameter can be: ENABLE or DISABLE. |
mbed_official | 126:549ba18ddd81 | 599 | * @retval None |
mbed_official | 126:549ba18ddd81 | 600 | */ |
mbed_official | 126:549ba18ddd81 | 601 | void SDIO_SendSDIOSuspendCmd(FunctionalState NewState) |
mbed_official | 126:549ba18ddd81 | 602 | { |
mbed_official | 126:549ba18ddd81 | 603 | /* Check the parameters */ |
mbed_official | 126:549ba18ddd81 | 604 | assert_param(IS_FUNCTIONAL_STATE(NewState)); |
mbed_official | 126:549ba18ddd81 | 605 | |
mbed_official | 126:549ba18ddd81 | 606 | *(__IO uint32_t *) CMD_SDIOSUSPEND_BB = (uint32_t)NewState; |
mbed_official | 126:549ba18ddd81 | 607 | } |
mbed_official | 126:549ba18ddd81 | 608 | |
mbed_official | 126:549ba18ddd81 | 609 | /** |
mbed_official | 126:549ba18ddd81 | 610 | * @brief Enables or disables the command completion signal. |
mbed_official | 126:549ba18ddd81 | 611 | * @param NewState: new state of command completion signal. |
mbed_official | 126:549ba18ddd81 | 612 | * This parameter can be: ENABLE or DISABLE. |
mbed_official | 126:549ba18ddd81 | 613 | * @retval None |
mbed_official | 126:549ba18ddd81 | 614 | */ |
mbed_official | 126:549ba18ddd81 | 615 | void SDIO_CommandCompletionCmd(FunctionalState NewState) |
mbed_official | 126:549ba18ddd81 | 616 | { |
mbed_official | 126:549ba18ddd81 | 617 | /* Check the parameters */ |
mbed_official | 126:549ba18ddd81 | 618 | assert_param(IS_FUNCTIONAL_STATE(NewState)); |
mbed_official | 126:549ba18ddd81 | 619 | |
mbed_official | 126:549ba18ddd81 | 620 | *(__IO uint32_t *) CMD_ENCMDCOMPL_BB = (uint32_t)NewState; |
mbed_official | 126:549ba18ddd81 | 621 | } |
mbed_official | 126:549ba18ddd81 | 622 | |
mbed_official | 126:549ba18ddd81 | 623 | /** |
mbed_official | 126:549ba18ddd81 | 624 | * @brief Enables or disables the CE-ATA interrupt. |
mbed_official | 126:549ba18ddd81 | 625 | * @param NewState: new state of CE-ATA interrupt. This parameter can be: ENABLE or DISABLE. |
mbed_official | 126:549ba18ddd81 | 626 | * @retval None |
mbed_official | 126:549ba18ddd81 | 627 | */ |
mbed_official | 126:549ba18ddd81 | 628 | void SDIO_CEATAITCmd(FunctionalState NewState) |
mbed_official | 126:549ba18ddd81 | 629 | { |
mbed_official | 126:549ba18ddd81 | 630 | /* Check the parameters */ |
mbed_official | 126:549ba18ddd81 | 631 | assert_param(IS_FUNCTIONAL_STATE(NewState)); |
mbed_official | 126:549ba18ddd81 | 632 | |
mbed_official | 126:549ba18ddd81 | 633 | *(__IO uint32_t *) CMD_NIEN_BB = (uint32_t)((~((uint32_t)NewState)) & ((uint32_t)0x1)); |
mbed_official | 126:549ba18ddd81 | 634 | } |
mbed_official | 126:549ba18ddd81 | 635 | |
mbed_official | 126:549ba18ddd81 | 636 | /** |
mbed_official | 126:549ba18ddd81 | 637 | * @brief Sends CE-ATA command (CMD61). |
mbed_official | 126:549ba18ddd81 | 638 | * @param NewState: new state of CE-ATA command. This parameter can be: ENABLE or DISABLE. |
mbed_official | 126:549ba18ddd81 | 639 | * @retval None |
mbed_official | 126:549ba18ddd81 | 640 | */ |
mbed_official | 126:549ba18ddd81 | 641 | void SDIO_SendCEATACmd(FunctionalState NewState) |
mbed_official | 126:549ba18ddd81 | 642 | { |
mbed_official | 126:549ba18ddd81 | 643 | /* Check the parameters */ |
mbed_official | 126:549ba18ddd81 | 644 | assert_param(IS_FUNCTIONAL_STATE(NewState)); |
mbed_official | 126:549ba18ddd81 | 645 | |
mbed_official | 126:549ba18ddd81 | 646 | *(__IO uint32_t *) CMD_ATACMD_BB = (uint32_t)NewState; |
mbed_official | 126:549ba18ddd81 | 647 | } |
mbed_official | 126:549ba18ddd81 | 648 | |
mbed_official | 126:549ba18ddd81 | 649 | /** |
mbed_official | 126:549ba18ddd81 | 650 | * @brief Checks whether the specified SDIO flag is set or not. |
mbed_official | 126:549ba18ddd81 | 651 | * @param SDIO_FLAG: specifies the flag to check. |
mbed_official | 126:549ba18ddd81 | 652 | * This parameter can be one of the following values: |
mbed_official | 126:549ba18ddd81 | 653 | * @arg SDIO_FLAG_CCRCFAIL: Command response received (CRC check failed) |
mbed_official | 126:549ba18ddd81 | 654 | * @arg SDIO_FLAG_DCRCFAIL: Data block sent/received (CRC check failed) |
mbed_official | 126:549ba18ddd81 | 655 | * @arg SDIO_FLAG_CTIMEOUT: Command response timeout |
mbed_official | 126:549ba18ddd81 | 656 | * @arg SDIO_FLAG_DTIMEOUT: Data timeout |
mbed_official | 126:549ba18ddd81 | 657 | * @arg SDIO_FLAG_TXUNDERR: Transmit FIFO underrun error |
mbed_official | 126:549ba18ddd81 | 658 | * @arg SDIO_FLAG_RXOVERR: Received FIFO overrun error |
mbed_official | 126:549ba18ddd81 | 659 | * @arg SDIO_FLAG_CMDREND: Command response received (CRC check passed) |
mbed_official | 126:549ba18ddd81 | 660 | * @arg SDIO_FLAG_CMDSENT: Command sent (no response required) |
mbed_official | 126:549ba18ddd81 | 661 | * @arg SDIO_FLAG_DATAEND: Data end (data counter, SDIDCOUNT, is zero) |
mbed_official | 126:549ba18ddd81 | 662 | * @arg SDIO_FLAG_STBITERR: Start bit not detected on all data signals in wide |
mbed_official | 126:549ba18ddd81 | 663 | * bus mode. |
mbed_official | 126:549ba18ddd81 | 664 | * @arg SDIO_FLAG_DBCKEND: Data block sent/received (CRC check passed) |
mbed_official | 126:549ba18ddd81 | 665 | * @arg SDIO_FLAG_CMDACT: Command transfer in progress |
mbed_official | 126:549ba18ddd81 | 666 | * @arg SDIO_FLAG_TXACT: Data transmit in progress |
mbed_official | 126:549ba18ddd81 | 667 | * @arg SDIO_FLAG_RXACT: Data receive in progress |
mbed_official | 126:549ba18ddd81 | 668 | * @arg SDIO_FLAG_TXFIFOHE: Transmit FIFO Half Empty |
mbed_official | 126:549ba18ddd81 | 669 | * @arg SDIO_FLAG_RXFIFOHF: Receive FIFO Half Full |
mbed_official | 126:549ba18ddd81 | 670 | * @arg SDIO_FLAG_TXFIFOF: Transmit FIFO full |
mbed_official | 126:549ba18ddd81 | 671 | * @arg SDIO_FLAG_RXFIFOF: Receive FIFO full |
mbed_official | 126:549ba18ddd81 | 672 | * @arg SDIO_FLAG_TXFIFOE: Transmit FIFO empty |
mbed_official | 126:549ba18ddd81 | 673 | * @arg SDIO_FLAG_RXFIFOE: Receive FIFO empty |
mbed_official | 126:549ba18ddd81 | 674 | * @arg SDIO_FLAG_TXDAVL: Data available in transmit FIFO |
mbed_official | 126:549ba18ddd81 | 675 | * @arg SDIO_FLAG_RXDAVL: Data available in receive FIFO |
mbed_official | 126:549ba18ddd81 | 676 | * @arg SDIO_FLAG_SDIOIT: SD I/O interrupt received |
mbed_official | 126:549ba18ddd81 | 677 | * @arg SDIO_FLAG_CEATAEND: CE-ATA command completion signal received for CMD61 |
mbed_official | 126:549ba18ddd81 | 678 | * @retval The new state of SDIO_FLAG (SET or RESET). |
mbed_official | 126:549ba18ddd81 | 679 | */ |
mbed_official | 126:549ba18ddd81 | 680 | FlagStatus SDIO_GetFlagStatus(uint32_t SDIO_FLAG) |
mbed_official | 126:549ba18ddd81 | 681 | { |
mbed_official | 126:549ba18ddd81 | 682 | FlagStatus bitstatus = RESET; |
mbed_official | 126:549ba18ddd81 | 683 | |
mbed_official | 126:549ba18ddd81 | 684 | /* Check the parameters */ |
mbed_official | 126:549ba18ddd81 | 685 | assert_param(IS_SDIO_FLAG(SDIO_FLAG)); |
mbed_official | 126:549ba18ddd81 | 686 | |
mbed_official | 126:549ba18ddd81 | 687 | if ((SDIO->STA & SDIO_FLAG) != (uint32_t)RESET) |
mbed_official | 126:549ba18ddd81 | 688 | { |
mbed_official | 126:549ba18ddd81 | 689 | bitstatus = SET; |
mbed_official | 126:549ba18ddd81 | 690 | } |
mbed_official | 126:549ba18ddd81 | 691 | else |
mbed_official | 126:549ba18ddd81 | 692 | { |
mbed_official | 126:549ba18ddd81 | 693 | bitstatus = RESET; |
mbed_official | 126:549ba18ddd81 | 694 | } |
mbed_official | 126:549ba18ddd81 | 695 | return bitstatus; |
mbed_official | 126:549ba18ddd81 | 696 | } |
mbed_official | 126:549ba18ddd81 | 697 | |
mbed_official | 126:549ba18ddd81 | 698 | /** |
mbed_official | 126:549ba18ddd81 | 699 | * @brief Clears the SDIO's pending flags. |
mbed_official | 126:549ba18ddd81 | 700 | * @param SDIO_FLAG: specifies the flag to clear. |
mbed_official | 126:549ba18ddd81 | 701 | * This parameter can be one or a combination of the following values: |
mbed_official | 126:549ba18ddd81 | 702 | * @arg SDIO_FLAG_CCRCFAIL: Command response received (CRC check failed) |
mbed_official | 126:549ba18ddd81 | 703 | * @arg SDIO_FLAG_DCRCFAIL: Data block sent/received (CRC check failed) |
mbed_official | 126:549ba18ddd81 | 704 | * @arg SDIO_FLAG_CTIMEOUT: Command response timeout |
mbed_official | 126:549ba18ddd81 | 705 | * @arg SDIO_FLAG_DTIMEOUT: Data timeout |
mbed_official | 126:549ba18ddd81 | 706 | * @arg SDIO_FLAG_TXUNDERR: Transmit FIFO underrun error |
mbed_official | 126:549ba18ddd81 | 707 | * @arg SDIO_FLAG_RXOVERR: Received FIFO overrun error |
mbed_official | 126:549ba18ddd81 | 708 | * @arg SDIO_FLAG_CMDREND: Command response received (CRC check passed) |
mbed_official | 126:549ba18ddd81 | 709 | * @arg SDIO_FLAG_CMDSENT: Command sent (no response required) |
mbed_official | 126:549ba18ddd81 | 710 | * @arg SDIO_FLAG_DATAEND: Data end (data counter, SDIDCOUNT, is zero) |
mbed_official | 126:549ba18ddd81 | 711 | * @arg SDIO_FLAG_STBITERR: Start bit not detected on all data signals in wide |
mbed_official | 126:549ba18ddd81 | 712 | * bus mode |
mbed_official | 126:549ba18ddd81 | 713 | * @arg SDIO_FLAG_DBCKEND: Data block sent/received (CRC check passed) |
mbed_official | 126:549ba18ddd81 | 714 | * @arg SDIO_FLAG_SDIOIT: SD I/O interrupt received |
mbed_official | 126:549ba18ddd81 | 715 | * @arg SDIO_FLAG_CEATAEND: CE-ATA command completion signal received for CMD61 |
mbed_official | 126:549ba18ddd81 | 716 | * @retval None |
mbed_official | 126:549ba18ddd81 | 717 | */ |
mbed_official | 126:549ba18ddd81 | 718 | void SDIO_ClearFlag(uint32_t SDIO_FLAG) |
mbed_official | 126:549ba18ddd81 | 719 | { |
mbed_official | 126:549ba18ddd81 | 720 | /* Check the parameters */ |
mbed_official | 126:549ba18ddd81 | 721 | assert_param(IS_SDIO_CLEAR_FLAG(SDIO_FLAG)); |
mbed_official | 126:549ba18ddd81 | 722 | |
mbed_official | 126:549ba18ddd81 | 723 | SDIO->ICR = SDIO_FLAG; |
mbed_official | 126:549ba18ddd81 | 724 | } |
mbed_official | 126:549ba18ddd81 | 725 | |
mbed_official | 126:549ba18ddd81 | 726 | /** |
mbed_official | 126:549ba18ddd81 | 727 | * @brief Checks whether the specified SDIO interrupt has occurred or not. |
mbed_official | 126:549ba18ddd81 | 728 | * @param SDIO_IT: specifies the SDIO interrupt source to check. |
mbed_official | 126:549ba18ddd81 | 729 | * This parameter can be one of the following values: |
mbed_official | 126:549ba18ddd81 | 730 | * @arg SDIO_IT_CCRCFAIL: Command response received (CRC check failed) interrupt |
mbed_official | 126:549ba18ddd81 | 731 | * @arg SDIO_IT_DCRCFAIL: Data block sent/received (CRC check failed) interrupt |
mbed_official | 126:549ba18ddd81 | 732 | * @arg SDIO_IT_CTIMEOUT: Command response timeout interrupt |
mbed_official | 126:549ba18ddd81 | 733 | * @arg SDIO_IT_DTIMEOUT: Data timeout interrupt |
mbed_official | 126:549ba18ddd81 | 734 | * @arg SDIO_IT_TXUNDERR: Transmit FIFO underrun error interrupt |
mbed_official | 126:549ba18ddd81 | 735 | * @arg SDIO_IT_RXOVERR: Received FIFO overrun error interrupt |
mbed_official | 126:549ba18ddd81 | 736 | * @arg SDIO_IT_CMDREND: Command response received (CRC check passed) interrupt |
mbed_official | 126:549ba18ddd81 | 737 | * @arg SDIO_IT_CMDSENT: Command sent (no response required) interrupt |
mbed_official | 126:549ba18ddd81 | 738 | * @arg SDIO_IT_DATAEND: Data end (data counter, SDIDCOUNT, is zero) interrupt |
mbed_official | 126:549ba18ddd81 | 739 | * @arg SDIO_IT_STBITERR: Start bit not detected on all data signals in wide |
mbed_official | 126:549ba18ddd81 | 740 | * bus mode interrupt |
mbed_official | 126:549ba18ddd81 | 741 | * @arg SDIO_IT_DBCKEND: Data block sent/received (CRC check passed) interrupt |
mbed_official | 126:549ba18ddd81 | 742 | * @arg SDIO_IT_CMDACT: Command transfer in progress interrupt |
mbed_official | 126:549ba18ddd81 | 743 | * @arg SDIO_IT_TXACT: Data transmit in progress interrupt |
mbed_official | 126:549ba18ddd81 | 744 | * @arg SDIO_IT_RXACT: Data receive in progress interrupt |
mbed_official | 126:549ba18ddd81 | 745 | * @arg SDIO_IT_TXFIFOHE: Transmit FIFO Half Empty interrupt |
mbed_official | 126:549ba18ddd81 | 746 | * @arg SDIO_IT_RXFIFOHF: Receive FIFO Half Full interrupt |
mbed_official | 126:549ba18ddd81 | 747 | * @arg SDIO_IT_TXFIFOF: Transmit FIFO full interrupt |
mbed_official | 126:549ba18ddd81 | 748 | * @arg SDIO_IT_RXFIFOF: Receive FIFO full interrupt |
mbed_official | 126:549ba18ddd81 | 749 | * @arg SDIO_IT_TXFIFOE: Transmit FIFO empty interrupt |
mbed_official | 126:549ba18ddd81 | 750 | * @arg SDIO_IT_RXFIFOE: Receive FIFO empty interrupt |
mbed_official | 126:549ba18ddd81 | 751 | * @arg SDIO_IT_TXDAVL: Data available in transmit FIFO interrupt |
mbed_official | 126:549ba18ddd81 | 752 | * @arg SDIO_IT_RXDAVL: Data available in receive FIFO interrupt |
mbed_official | 126:549ba18ddd81 | 753 | * @arg SDIO_IT_SDIOIT: SD I/O interrupt received interrupt |
mbed_official | 126:549ba18ddd81 | 754 | * @arg SDIO_IT_CEATAEND: CE-ATA command completion signal received for CMD61 interrupt |
mbed_official | 126:549ba18ddd81 | 755 | * @retval The new state of SDIO_IT (SET or RESET). |
mbed_official | 126:549ba18ddd81 | 756 | */ |
mbed_official | 126:549ba18ddd81 | 757 | ITStatus SDIO_GetITStatus(uint32_t SDIO_IT) |
mbed_official | 126:549ba18ddd81 | 758 | { |
mbed_official | 126:549ba18ddd81 | 759 | ITStatus bitstatus = RESET; |
mbed_official | 126:549ba18ddd81 | 760 | |
mbed_official | 126:549ba18ddd81 | 761 | /* Check the parameters */ |
mbed_official | 126:549ba18ddd81 | 762 | assert_param(IS_SDIO_GET_IT(SDIO_IT)); |
mbed_official | 126:549ba18ddd81 | 763 | if ((SDIO->STA & SDIO_IT) != (uint32_t)RESET) |
mbed_official | 126:549ba18ddd81 | 764 | { |
mbed_official | 126:549ba18ddd81 | 765 | bitstatus = SET; |
mbed_official | 126:549ba18ddd81 | 766 | } |
mbed_official | 126:549ba18ddd81 | 767 | else |
mbed_official | 126:549ba18ddd81 | 768 | { |
mbed_official | 126:549ba18ddd81 | 769 | bitstatus = RESET; |
mbed_official | 126:549ba18ddd81 | 770 | } |
mbed_official | 126:549ba18ddd81 | 771 | return bitstatus; |
mbed_official | 126:549ba18ddd81 | 772 | } |
mbed_official | 126:549ba18ddd81 | 773 | |
mbed_official | 126:549ba18ddd81 | 774 | /** |
mbed_official | 126:549ba18ddd81 | 775 | * @brief Clears the SDIO's interrupt pending bits. |
mbed_official | 126:549ba18ddd81 | 776 | * @param SDIO_IT: specifies the interrupt pending bit to clear. |
mbed_official | 126:549ba18ddd81 | 777 | * This parameter can be one or a combination of the following values: |
mbed_official | 126:549ba18ddd81 | 778 | * @arg SDIO_IT_CCRCFAIL: Command response received (CRC check failed) interrupt |
mbed_official | 126:549ba18ddd81 | 779 | * @arg SDIO_IT_DCRCFAIL: Data block sent/received (CRC check failed) interrupt |
mbed_official | 126:549ba18ddd81 | 780 | * @arg SDIO_IT_CTIMEOUT: Command response timeout interrupt |
mbed_official | 126:549ba18ddd81 | 781 | * @arg SDIO_IT_DTIMEOUT: Data timeout interrupt |
mbed_official | 126:549ba18ddd81 | 782 | * @arg SDIO_IT_TXUNDERR: Transmit FIFO underrun error interrupt |
mbed_official | 126:549ba18ddd81 | 783 | * @arg SDIO_IT_RXOVERR: Received FIFO overrun error interrupt |
mbed_official | 126:549ba18ddd81 | 784 | * @arg SDIO_IT_CMDREND: Command response received (CRC check passed) interrupt |
mbed_official | 126:549ba18ddd81 | 785 | * @arg SDIO_IT_CMDSENT: Command sent (no response required) interrupt |
mbed_official | 126:549ba18ddd81 | 786 | * @arg SDIO_IT_DATAEND: Data end (data counter, SDIDCOUNT, is zero) interrupt |
mbed_official | 126:549ba18ddd81 | 787 | * @arg SDIO_IT_STBITERR: Start bit not detected on all data signals in wide |
mbed_official | 126:549ba18ddd81 | 788 | * bus mode interrupt |
mbed_official | 126:549ba18ddd81 | 789 | * @arg SDIO_IT_SDIOIT: SD I/O interrupt received interrupt |
mbed_official | 126:549ba18ddd81 | 790 | * @arg SDIO_IT_CEATAEND: CE-ATA command completion signal received for CMD61 |
mbed_official | 126:549ba18ddd81 | 791 | * @retval None |
mbed_official | 126:549ba18ddd81 | 792 | */ |
mbed_official | 126:549ba18ddd81 | 793 | void SDIO_ClearITPendingBit(uint32_t SDIO_IT) |
mbed_official | 126:549ba18ddd81 | 794 | { |
mbed_official | 126:549ba18ddd81 | 795 | /* Check the parameters */ |
mbed_official | 126:549ba18ddd81 | 796 | assert_param(IS_SDIO_CLEAR_IT(SDIO_IT)); |
mbed_official | 126:549ba18ddd81 | 797 | |
mbed_official | 126:549ba18ddd81 | 798 | SDIO->ICR = SDIO_IT; |
mbed_official | 126:549ba18ddd81 | 799 | } |
mbed_official | 126:549ba18ddd81 | 800 | |
mbed_official | 126:549ba18ddd81 | 801 | /** |
mbed_official | 126:549ba18ddd81 | 802 | * @} |
mbed_official | 126:549ba18ddd81 | 803 | */ |
mbed_official | 126:549ba18ddd81 | 804 | |
mbed_official | 126:549ba18ddd81 | 805 | /** |
mbed_official | 126:549ba18ddd81 | 806 | * @} |
mbed_official | 126:549ba18ddd81 | 807 | */ |
mbed_official | 126:549ba18ddd81 | 808 | |
mbed_official | 126:549ba18ddd81 | 809 | /** |
mbed_official | 126:549ba18ddd81 | 810 | * @} |
mbed_official | 126:549ba18ddd81 | 811 | */ |
mbed_official | 126:549ba18ddd81 | 812 | |
mbed_official | 126:549ba18ddd81 | 813 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |