shao ziyang / mbed-src-kl05

mbed library sources

Dependents:   frdm_kl05z_gpio_test

Fork of mbed-src by mbed official

targets/hal/TARGET_Freescale/TARGET_K20D5M/rtc_api.c@68:41613245dfd7, 2013-12-26 (annotated)

Committer:
mbed_official
Date:
Thu Dec 26 13:00:06 2013 +0000
Revision:
68:41613245dfd7
Synchronized with git revision fba199a9c4445231b0f38e1e113c118182635546



Full URL: https://github.com/mbedmicro/mbed/commit/fba199a9c4445231b0f38e1e113c118182635546/



target K20D5M

Who changed what in which revision?

UserRevisionLine numberNew contents of line
mbed_official 68:41613245dfd7 1 /* mbed Microcontroller Library
mbed_official 68:41613245dfd7 2 * Copyright (c) 2006-2013 ARM Limited
mbed_official 68:41613245dfd7 3 *
mbed_official 68:41613245dfd7 4 * Licensed under the Apache License, Version 2.0 (the "License");
mbed_official 68:41613245dfd7 5 * you may not use this file except in compliance with the License.
mbed_official 68:41613245dfd7 6 * You may obtain a copy of the License at
mbed_official 68:41613245dfd7 7 *
mbed_official 68:41613245dfd7 8 * http://www.apache.org/licenses/LICENSE-2.0
mbed_official 68:41613245dfd7 9 *
mbed_official 68:41613245dfd7 10 * Unless required by applicable law or agreed to in writing, software
mbed_official 68:41613245dfd7 11 * distributed under the License is distributed on an "AS IS" BASIS,
mbed_official 68:41613245dfd7 12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
mbed_official 68:41613245dfd7 13 * See the License for the specific language governing permissions and
mbed_official 68:41613245dfd7 14 * limitations under the License.
mbed_official 68:41613245dfd7 15 */
mbed_official 68:41613245dfd7 16 #include "rtc_api.h"
mbed_official 68:41613245dfd7 17
mbed_official 68:41613245dfd7 18 static void init(void) {
mbed_official 68:41613245dfd7 19 // enable PORTC clock
mbed_official 68:41613245dfd7 20 SIM->SCGC5 |= SIM_SCGC5_PORTC_MASK;
mbed_official 68:41613245dfd7 21
mbed_official 68:41613245dfd7 22 // enable RTC clock
mbed_official 68:41613245dfd7 23 SIM->SCGC6 |= SIM_SCGC6_RTC_MASK;
mbed_official 68:41613245dfd7 24
mbed_official 68:41613245dfd7 25 // OSC32 as source
mbed_official 68:41613245dfd7 26 SIM->SOPT1 &= ~SIM_SOPT1_OSC32KSEL_MASK;
mbed_official 68:41613245dfd7 27 SIM->SOPT1 |= SIM_SOPT1_OSC32KSEL(0);
mbed_official 68:41613245dfd7 28 }
mbed_official 68:41613245dfd7 29
mbed_official 68:41613245dfd7 30 void rtc_init(void) {
mbed_official 68:41613245dfd7 31 init();
mbed_official 68:41613245dfd7 32
mbed_official 68:41613245dfd7 33 // Enable the oscillator
mbed_official 68:41613245dfd7 34 RTC->CR |= RTC_CR_OSCE_MASK;
mbed_official 68:41613245dfd7 35
mbed_official 68:41613245dfd7 36 //Configure the TSR. default value: 1
mbed_official 68:41613245dfd7 37 RTC->TSR = 1;
mbed_official 68:41613245dfd7 38
mbed_official 68:41613245dfd7 39 // enable counter
mbed_official 68:41613245dfd7 40 RTC->SR |= RTC_SR_TCE_MASK;
mbed_official 68:41613245dfd7 41 }
mbed_official 68:41613245dfd7 42
mbed_official 68:41613245dfd7 43 void rtc_free(void) {
mbed_official 68:41613245dfd7 44 // [TODO]
mbed_official 68:41613245dfd7 45 }
mbed_official 68:41613245dfd7 46
mbed_official 68:41613245dfd7 47 /*
mbed_official 68:41613245dfd7 48 * Little check routine to see if the RTC has been enabled
mbed_official 68:41613245dfd7 49 * 0 = Disabled, 1 = Enabled
mbed_official 68:41613245dfd7 50 */
mbed_official 68:41613245dfd7 51 int rtc_isenabled(void) {
mbed_official 68:41613245dfd7 52 // even if the RTC module is enabled,
mbed_official 68:41613245dfd7 53 // as we use RTC_CLKIN and an external clock,
mbed_official 68:41613245dfd7 54 // we need to reconfigure the pins. That is why we
mbed_official 68:41613245dfd7 55 // call init() if the rtc is enabled
mbed_official 68:41613245dfd7 56
mbed_official 68:41613245dfd7 57 // if RTC not enabled return 0
mbed_official 68:41613245dfd7 58 SIM->SCGC5 |= SIM_SCGC5_PORTC_MASK;
mbed_official 68:41613245dfd7 59 SIM->SCGC6 |= SIM_SCGC6_RTC_MASK;
mbed_official 68:41613245dfd7 60 if ((RTC->SR & RTC_SR_TCE_MASK) == 0)
mbed_official 68:41613245dfd7 61 return 0;
mbed_official 68:41613245dfd7 62
mbed_official 68:41613245dfd7 63 init();
mbed_official 68:41613245dfd7 64 return 1;
mbed_official 68:41613245dfd7 65 }
mbed_official 68:41613245dfd7 66
mbed_official 68:41613245dfd7 67 time_t rtc_read(void) {
mbed_official 68:41613245dfd7 68 return RTC->TSR;
mbed_official 68:41613245dfd7 69 }
mbed_official 68:41613245dfd7 70
mbed_official 68:41613245dfd7 71 void rtc_write(time_t t) {
mbed_official 68:41613245dfd7 72 // disable counter
mbed_official 68:41613245dfd7 73 RTC->SR &= ~RTC_SR_TCE_MASK;
mbed_official 68:41613245dfd7 74
mbed_official 68:41613245dfd7 75 // we do not write 0 into TSR
mbed_official 68:41613245dfd7 76 // to avoid invalid time
mbed_official 68:41613245dfd7 77 if (t == 0)
mbed_official 68:41613245dfd7 78 t = 1;
mbed_official 68:41613245dfd7 79
mbed_official 68:41613245dfd7 80 // write seconds
mbed_official 68:41613245dfd7 81 RTC->TSR = t;
mbed_official 68:41613245dfd7 82
mbed_official 68:41613245dfd7 83 // re-enable counter
mbed_official 68:41613245dfd7 84 RTC->SR |= RTC_SR_TCE_MASK;
mbed_official 68:41613245dfd7 85 }