shao ziyang / mbed-src-kl05

mbed library sources

Dependents:   frdm_kl05z_gpio_test

Fork of mbed-src by mbed official

targets/hal/TARGET_NXP/TARGET_LPC11UXX/analogin_api.c@285:31249416b6f9, 2014-08-15 (annotated)

Committer:
mbed_official
Date:
Fri Aug 15 16:30:08 2014 +0100
Revision:
285:31249416b6f9
Parent:
274:6937b19af361 
Synchronized with git revision 601712595f49bbd2a2771c52cf3e84c9c7a591af



Full URL: https://github.com/mbedmicro/mbed/commit/601712595f49bbd2a2771c52cf3e84c9c7a591af/

Who changed what in which revision?

UserRevisionLine numberNew contents of line
emilmont 10:3bc89ef62ce7 1 /* mbed Microcontroller Library
emilmont 10:3bc89ef62ce7 2 * Copyright (c) 2006-2013 ARM Limited
emilmont 10:3bc89ef62ce7 3 *
emilmont 10:3bc89ef62ce7 4 * Licensed under the Apache License, Version 2.0 (the "License");
emilmont 10:3bc89ef62ce7 5 * you may not use this file except in compliance with the License.
emilmont 10:3bc89ef62ce7 6 * You may obtain a copy of the License at
emilmont 10:3bc89ef62ce7 7 *
emilmont 10:3bc89ef62ce7 8 * http://www.apache.org/licenses/LICENSE-2.0
emilmont 10:3bc89ef62ce7 9 *
emilmont 10:3bc89ef62ce7 10 * Unless required by applicable law or agreed to in writing, software
emilmont 10:3bc89ef62ce7 11 * distributed under the License is distributed on an "AS IS" BASIS,
emilmont 10:3bc89ef62ce7 12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
emilmont 10:3bc89ef62ce7 13 * See the License for the specific language governing permissions and
emilmont 10:3bc89ef62ce7 14 * limitations under the License.
emilmont 10:3bc89ef62ce7 15 */
mbed_official 227:7bd0639b8911 16 #include "mbed_assert.h"
emilmont 10:3bc89ef62ce7 17 #include "analogin_api.h"
emilmont 10:3bc89ef62ce7 18 #include "cmsis.h"
emilmont 10:3bc89ef62ce7 19 #include "pinmap.h"
mbed_official 285:31249416b6f9 20 #include "mbed_error.h"
mbed_official 274:6937b19af361 21 #include "PeripheralPins.h" // For the Peripheral to Pin Definitions found in the individual Target's Platform
emilmont 10:3bc89ef62ce7 22
emilmont 10:3bc89ef62ce7 23 #define ANALOGIN_MEDIAN_FILTER 1
emilmont 10:3bc89ef62ce7 24
emilmont 10:3bc89ef62ce7 25 #define ADC_10BIT_RANGE 0x3FF
emilmont 10:3bc89ef62ce7 26 #define ADC_12BIT_RANGE 0xFFF
emilmont 10:3bc89ef62ce7 27
emilmont 10:3bc89ef62ce7 28 static inline int div_round_up(int x, int y) {
emilmont 10:3bc89ef62ce7 29 return (x + (y - 1)) / y;
emilmont 10:3bc89ef62ce7 30 }
emilmont 10:3bc89ef62ce7 31
emilmont 10:3bc89ef62ce7 32 #define LPC_IOCON0_BASE (LPC_IOCON_BASE)
emilmont 10:3bc89ef62ce7 33 #define LPC_IOCON1_BASE (LPC_IOCON_BASE + 0x60)
emilmont 10:3bc89ef62ce7 34
emilmont 10:3bc89ef62ce7 35 #define ADC_RANGE ADC_10BIT_RANGE
emilmont 10:3bc89ef62ce7 36
emilmont 10:3bc89ef62ce7 37 void analogin_init(analogin_t *obj, PinName pin) {
emilmont 10:3bc89ef62ce7 38 obj->adc = (ADCName)pinmap_peripheral(pin, PinMap_ADC);
mbed_official 227:7bd0639b8911 39 MBED_ASSERT(obj->adc != (ADCName)NC);
emilmont 10:3bc89ef62ce7 40
emilmont 10:3bc89ef62ce7 41 // Power up ADC
emilmont 10:3bc89ef62ce7 42 LPC_SYSCON->PDRUNCFG &= ~ (1 << 4);
emilmont 10:3bc89ef62ce7 43 LPC_SYSCON->SYSAHBCLKCTRL |= ((uint32_t)1 << 13);
emilmont 10:3bc89ef62ce7 44
emilmont 10:3bc89ef62ce7 45 uint32_t pin_number = (uint32_t)pin;
emilmont 10:3bc89ef62ce7 46 __IO uint32_t *reg = (pin_number < 32) ? (__IO uint32_t*)(LPC_IOCON0_BASE + 4 * pin_number) : (__IO uint32_t*)(LPC_IOCON1_BASE + 4 * (pin_number - 32));
emilmont 10:3bc89ef62ce7 47
emilmont 10:3bc89ef62ce7 48 // set pin to ADC mode
emilmont 10:3bc89ef62ce7 49 *reg &= ~(1 << 7); // set ADMODE = 0 (analog mode)
emilmont 10:3bc89ef62ce7 50
emilmont 10:3bc89ef62ce7 51 uint32_t PCLK = SystemCoreClock;
emilmont 10:3bc89ef62ce7 52 uint32_t MAX_ADC_CLK = 4500000;
emilmont 10:3bc89ef62ce7 53 uint32_t clkdiv = div_round_up(PCLK, MAX_ADC_CLK) - 1;
emilmont 10:3bc89ef62ce7 54
emilmont 10:3bc89ef62ce7 55 LPC_ADC->CR = (0 << 0) // no channels selected
emilmont 10:3bc89ef62ce7 56 | (clkdiv << 8) // max of 4.5MHz
emilmont 10:3bc89ef62ce7 57 | (0 << 16) // BURST = 0, software controlled
emilmont 10:3bc89ef62ce7 58 | ( 0 << 17 ); // CLKS = 0, not applicable
emilmont 10:3bc89ef62ce7 59
emilmont 10:3bc89ef62ce7 60 pinmap_pinout(pin, PinMap_ADC);
emilmont 10:3bc89ef62ce7 61 }
emilmont 10:3bc89ef62ce7 62
emilmont 10:3bc89ef62ce7 63 static inline uint32_t adc_read(analogin_t *obj) {
emilmont 10:3bc89ef62ce7 64 // Select the appropriate channel and start conversion
emilmont 10:3bc89ef62ce7 65 LPC_ADC->CR &= ~0xFF;
emilmont 10:3bc89ef62ce7 66 LPC_ADC->CR |= 1 << (int)obj->adc;
emilmont 10:3bc89ef62ce7 67 LPC_ADC->CR |= 1 << 24;
emilmont 10:3bc89ef62ce7 68
emilmont 10:3bc89ef62ce7 69 // Repeatedly get the sample data until DONE bit
emilmont 10:3bc89ef62ce7 70 unsigned int data;
emilmont 10:3bc89ef62ce7 71 do {
emilmont 10:3bc89ef62ce7 72 data = LPC_ADC->GDR;
emilmont 10:3bc89ef62ce7 73 } while ((data & ((unsigned int)1 << 31)) == 0);
emilmont 10:3bc89ef62ce7 74
emilmont 10:3bc89ef62ce7 75 // Stop conversion
emilmont 10:3bc89ef62ce7 76 LPC_ADC->CR &= ~(1 << 24);
emilmont 10:3bc89ef62ce7 77
emilmont 10:3bc89ef62ce7 78 return (data >> 6) & ADC_RANGE; // 10 bit
emilmont 10:3bc89ef62ce7 79 }
emilmont 10:3bc89ef62ce7 80
emilmont 10:3bc89ef62ce7 81 static inline void order(uint32_t *a, uint32_t *b) {
emilmont 10:3bc89ef62ce7 82 if (*a > *b) {
emilmont 10:3bc89ef62ce7 83 uint32_t t = *a;
emilmont 10:3bc89ef62ce7 84 *a = *b;
emilmont 10:3bc89ef62ce7 85 *b = t;
emilmont 10:3bc89ef62ce7 86 }
emilmont 10:3bc89ef62ce7 87 }
emilmont 10:3bc89ef62ce7 88
emilmont 10:3bc89ef62ce7 89 static inline uint32_t adc_read_u32(analogin_t *obj) {
emilmont 10:3bc89ef62ce7 90 uint32_t value;
emilmont 10:3bc89ef62ce7 91 #if ANALOGIN_MEDIAN_FILTER
emilmont 10:3bc89ef62ce7 92 uint32_t v1 = adc_read(obj);
emilmont 10:3bc89ef62ce7 93 uint32_t v2 = adc_read(obj);
emilmont 10:3bc89ef62ce7 94 uint32_t v3 = adc_read(obj);
emilmont 10:3bc89ef62ce7 95 order(&v1, &v2);
emilmont 10:3bc89ef62ce7 96 order(&v2, &v3);
emilmont 10:3bc89ef62ce7 97 order(&v1, &v2);
emilmont 10:3bc89ef62ce7 98 value = v2;
emilmont 10:3bc89ef62ce7 99 #else
emilmont 10:3bc89ef62ce7 100 value = adc_read(obj);
emilmont 10:3bc89ef62ce7 101 #endif
emilmont 10:3bc89ef62ce7 102 return value;
emilmont 10:3bc89ef62ce7 103 }
emilmont 10:3bc89ef62ce7 104
emilmont 10:3bc89ef62ce7 105 uint16_t analogin_read_u16(analogin_t *obj) {
emilmont 10:3bc89ef62ce7 106 uint32_t value = adc_read_u32(obj);
emilmont 10:3bc89ef62ce7 107
emilmont 10:3bc89ef62ce7 108 return (value << 6) | ((value >> 4) & 0x003F); // 10 bit
emilmont 10:3bc89ef62ce7 109 }
emilmont 10:3bc89ef62ce7 110
emilmont 10:3bc89ef62ce7 111 float analogin_read(analogin_t *obj) {
emilmont 10:3bc89ef62ce7 112 uint32_t value = adc_read_u32(obj);
emilmont 10:3bc89ef62ce7 113 return (float)value * (1.0f / (float)ADC_RANGE);
emilmont 10:3bc89ef62ce7 114 }