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mbed library sources
Dependents: frdm_kl05z_gpio_test
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targets/cmsis/TARGET_STM/TARGET_NUCLEO_F302R8/stm32f30x_pwr.c@125:23cc3068a9e4, 2014-03-19 (annotated)
- Committer:
- mbed_official
- Date:
- Wed Mar 19 10:15:22 2014 +0000
- Revision:
- 125:23cc3068a9e4
Synchronized with git revision ace35dfba3748c7cdc102eb38ec6b9e1067c3252
Full URL: https://github.com/mbedmicro/mbed/commit/ace35dfba3748c7cdc102eb38ec6b9e1067c3252/
[NUCLEO_F302R8] Add cmsis and hal files + change F401RE clock to 84MHz
Who changed what in which revision?
| User | Revision | Line number | New contents of line |
|---|---|---|---|
| mbed_official | 125:23cc3068a9e4 | 1 | /** |
| mbed_official | 125:23cc3068a9e4 | 2 | ****************************************************************************** |
| mbed_official | 125:23cc3068a9e4 | 3 | * @file stm32f30x_pwr.c |
| mbed_official | 125:23cc3068a9e4 | 4 | * @author MCD Application Team |
| mbed_official | 125:23cc3068a9e4 | 5 | * @version V1.1.0 |
| mbed_official | 125:23cc3068a9e4 | 6 | * @date 27-February-2014 |
| mbed_official | 125:23cc3068a9e4 | 7 | * @brief This file provides firmware functions to manage the following |
| mbed_official | 125:23cc3068a9e4 | 8 | * functionalities of the Power Controller (PWR) peripheral: |
| mbed_official | 125:23cc3068a9e4 | 9 | * + Backup Domain Access |
| mbed_official | 125:23cc3068a9e4 | 10 | * + PVD configuration |
| mbed_official | 125:23cc3068a9e4 | 11 | * + WakeUp pins configuration |
| mbed_official | 125:23cc3068a9e4 | 12 | * + Low Power modes configuration |
| mbed_official | 125:23cc3068a9e4 | 13 | * + Flags management |
| mbed_official | 125:23cc3068a9e4 | 14 | * |
| mbed_official | 125:23cc3068a9e4 | 15 | ****************************************************************************** |
| mbed_official | 125:23cc3068a9e4 | 16 | * @attention |
| mbed_official | 125:23cc3068a9e4 | 17 | * |
| mbed_official | 125:23cc3068a9e4 | 18 | * <h2><center>© COPYRIGHT(c) 2014 STMicroelectronics</center></h2> |
| mbed_official | 125:23cc3068a9e4 | 19 | * |
| mbed_official | 125:23cc3068a9e4 | 20 | * Redistribution and use in source and binary forms, with or without modification, |
| mbed_official | 125:23cc3068a9e4 | 21 | * are permitted provided that the following conditions are met: |
| mbed_official | 125:23cc3068a9e4 | 22 | * 1. Redistributions of source code must retain the above copyright notice, |
| mbed_official | 125:23cc3068a9e4 | 23 | * this list of conditions and the following disclaimer. |
| mbed_official | 125:23cc3068a9e4 | 24 | * 2. Redistributions in binary form must reproduce the above copyright notice, |
| mbed_official | 125:23cc3068a9e4 | 25 | * this list of conditions and the following disclaimer in the documentation |
| mbed_official | 125:23cc3068a9e4 | 26 | * and/or other materials provided with the distribution. |
| mbed_official | 125:23cc3068a9e4 | 27 | * 3. Neither the name of STMicroelectronics nor the names of its contributors |
| mbed_official | 125:23cc3068a9e4 | 28 | * may be used to endorse or promote products derived from this software |
| mbed_official | 125:23cc3068a9e4 | 29 | * without specific prior written permission. |
| mbed_official | 125:23cc3068a9e4 | 30 | * |
| mbed_official | 125:23cc3068a9e4 | 31 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
| mbed_official | 125:23cc3068a9e4 | 32 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
| mbed_official | 125:23cc3068a9e4 | 33 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
| mbed_official | 125:23cc3068a9e4 | 34 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE |
| mbed_official | 125:23cc3068a9e4 | 35 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
| mbed_official | 125:23cc3068a9e4 | 36 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR |
| mbed_official | 125:23cc3068a9e4 | 37 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
| mbed_official | 125:23cc3068a9e4 | 38 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, |
| mbed_official | 125:23cc3068a9e4 | 39 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
| mbed_official | 125:23cc3068a9e4 | 40 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
| mbed_official | 125:23cc3068a9e4 | 41 | * |
| mbed_official | 125:23cc3068a9e4 | 42 | ****************************************************************************** |
| mbed_official | 125:23cc3068a9e4 | 43 | */ |
| mbed_official | 125:23cc3068a9e4 | 44 | |
| mbed_official | 125:23cc3068a9e4 | 45 | /* Includes ------------------------------------------------------------------*/ |
| mbed_official | 125:23cc3068a9e4 | 46 | #include "stm32f30x_pwr.h" |
| mbed_official | 125:23cc3068a9e4 | 47 | #include "stm32f30x_rcc.h" |
| mbed_official | 125:23cc3068a9e4 | 48 | |
| mbed_official | 125:23cc3068a9e4 | 49 | /** @addtogroup STM32F30x_StdPeriph_Driver |
| mbed_official | 125:23cc3068a9e4 | 50 | * @{ |
| mbed_official | 125:23cc3068a9e4 | 51 | */ |
| mbed_official | 125:23cc3068a9e4 | 52 | |
| mbed_official | 125:23cc3068a9e4 | 53 | /** @defgroup PWR |
| mbed_official | 125:23cc3068a9e4 | 54 | * @brief PWR driver modules |
| mbed_official | 125:23cc3068a9e4 | 55 | * @{ |
| mbed_official | 125:23cc3068a9e4 | 56 | */ |
| mbed_official | 125:23cc3068a9e4 | 57 | |
| mbed_official | 125:23cc3068a9e4 | 58 | /* Private typedef -----------------------------------------------------------*/ |
| mbed_official | 125:23cc3068a9e4 | 59 | /* Private define ------------------------------------------------------------*/ |
| mbed_official | 125:23cc3068a9e4 | 60 | /* --------- PWR registers bit address in the alias region ---------- */ |
| mbed_official | 125:23cc3068a9e4 | 61 | #define PWR_OFFSET (PWR_BASE - PERIPH_BASE) |
| mbed_official | 125:23cc3068a9e4 | 62 | |
| mbed_official | 125:23cc3068a9e4 | 63 | /* --- CR Register ---*/ |
| mbed_official | 125:23cc3068a9e4 | 64 | |
| mbed_official | 125:23cc3068a9e4 | 65 | /* Alias word address of DBP bit */ |
| mbed_official | 125:23cc3068a9e4 | 66 | #define CR_OFFSET (PWR_OFFSET + 0x00) |
| mbed_official | 125:23cc3068a9e4 | 67 | #define DBP_BitNumber 0x08 |
| mbed_official | 125:23cc3068a9e4 | 68 | #define CR_DBP_BB (PERIPH_BB_BASE + (CR_OFFSET * 32) + (DBP_BitNumber * 4)) |
| mbed_official | 125:23cc3068a9e4 | 69 | |
| mbed_official | 125:23cc3068a9e4 | 70 | /* Alias word address of PVDE bit */ |
| mbed_official | 125:23cc3068a9e4 | 71 | #define PVDE_BitNumber 0x04 |
| mbed_official | 125:23cc3068a9e4 | 72 | #define CR_PVDE_BB (PERIPH_BB_BASE + (CR_OFFSET * 32) + (PVDE_BitNumber * 4)) |
| mbed_official | 125:23cc3068a9e4 | 73 | |
| mbed_official | 125:23cc3068a9e4 | 74 | /* ------------------ PWR registers bit mask ------------------------ */ |
| mbed_official | 125:23cc3068a9e4 | 75 | |
| mbed_official | 125:23cc3068a9e4 | 76 | /* CR register bit mask */ |
| mbed_official | 125:23cc3068a9e4 | 77 | #define CR_DS_MASK ((uint32_t)0xFFFFFFFC) |
| mbed_official | 125:23cc3068a9e4 | 78 | #define CR_PLS_MASK ((uint32_t)0xFFFFFF1F) |
| mbed_official | 125:23cc3068a9e4 | 79 | |
| mbed_official | 125:23cc3068a9e4 | 80 | /* Private macro -------------------------------------------------------------*/ |
| mbed_official | 125:23cc3068a9e4 | 81 | /* Private variables ---------------------------------------------------------*/ |
| mbed_official | 125:23cc3068a9e4 | 82 | /* Private function prototypes -----------------------------------------------*/ |
| mbed_official | 125:23cc3068a9e4 | 83 | /* Private functions ---------------------------------------------------------*/ |
| mbed_official | 125:23cc3068a9e4 | 84 | |
| mbed_official | 125:23cc3068a9e4 | 85 | /** @defgroup PWR_Private_Functions |
| mbed_official | 125:23cc3068a9e4 | 86 | * @{ |
| mbed_official | 125:23cc3068a9e4 | 87 | */ |
| mbed_official | 125:23cc3068a9e4 | 88 | |
| mbed_official | 125:23cc3068a9e4 | 89 | /** @defgroup PWR_Group1 Backup Domain Access function |
| mbed_official | 125:23cc3068a9e4 | 90 | * @brief Backup Domain Access function |
| mbed_official | 125:23cc3068a9e4 | 91 | * |
| mbed_official | 125:23cc3068a9e4 | 92 | @verbatim |
| mbed_official | 125:23cc3068a9e4 | 93 | ============================================================================== |
| mbed_official | 125:23cc3068a9e4 | 94 | ##### Backup Domain Access function ##### |
| mbed_official | 125:23cc3068a9e4 | 95 | ============================================================================== |
| mbed_official | 125:23cc3068a9e4 | 96 | |
| mbed_official | 125:23cc3068a9e4 | 97 | [..] After reset, the Backup Domain Registers (RCC BDCR Register, RTC registers |
| mbed_official | 125:23cc3068a9e4 | 98 | and RTC backup registers) are protected against possible stray write accesses. |
| mbed_official | 125:23cc3068a9e4 | 99 | [..] To enable access to Backup domain use the PWR_BackupAccessCmd(ENABLE) function. |
| mbed_official | 125:23cc3068a9e4 | 100 | |
| mbed_official | 125:23cc3068a9e4 | 101 | @endverbatim |
| mbed_official | 125:23cc3068a9e4 | 102 | * @{ |
| mbed_official | 125:23cc3068a9e4 | 103 | */ |
| mbed_official | 125:23cc3068a9e4 | 104 | |
| mbed_official | 125:23cc3068a9e4 | 105 | /** |
| mbed_official | 125:23cc3068a9e4 | 106 | * @brief Deinitializes the PWR peripheral registers to their default reset values. |
| mbed_official | 125:23cc3068a9e4 | 107 | * @param None |
| mbed_official | 125:23cc3068a9e4 | 108 | * @retval None |
| mbed_official | 125:23cc3068a9e4 | 109 | */ |
| mbed_official | 125:23cc3068a9e4 | 110 | void PWR_DeInit(void) |
| mbed_official | 125:23cc3068a9e4 | 111 | { |
| mbed_official | 125:23cc3068a9e4 | 112 | RCC_APB1PeriphResetCmd(RCC_APB1Periph_PWR, ENABLE); |
| mbed_official | 125:23cc3068a9e4 | 113 | RCC_APB1PeriphResetCmd(RCC_APB1Periph_PWR, DISABLE); |
| mbed_official | 125:23cc3068a9e4 | 114 | } |
| mbed_official | 125:23cc3068a9e4 | 115 | |
| mbed_official | 125:23cc3068a9e4 | 116 | /** |
| mbed_official | 125:23cc3068a9e4 | 117 | * @brief Enables or disables access to the RTC and backup registers. |
| mbed_official | 125:23cc3068a9e4 | 118 | * @note If the HSE divided by 32 is used as the RTC clock, the |
| mbed_official | 125:23cc3068a9e4 | 119 | * Backup Domain Access should be kept enabled. |
| mbed_official | 125:23cc3068a9e4 | 120 | * @param NewState: new state of the access to the RTC and backup registers. |
| mbed_official | 125:23cc3068a9e4 | 121 | * This parameter can be: ENABLE or DISABLE. |
| mbed_official | 125:23cc3068a9e4 | 122 | * @retval None |
| mbed_official | 125:23cc3068a9e4 | 123 | */ |
| mbed_official | 125:23cc3068a9e4 | 124 | void PWR_BackupAccessCmd(FunctionalState NewState) |
| mbed_official | 125:23cc3068a9e4 | 125 | { |
| mbed_official | 125:23cc3068a9e4 | 126 | /* Check the parameters */ |
| mbed_official | 125:23cc3068a9e4 | 127 | assert_param(IS_FUNCTIONAL_STATE(NewState)); |
| mbed_official | 125:23cc3068a9e4 | 128 | *(__IO uint32_t *) CR_DBP_BB = (uint32_t)NewState; |
| mbed_official | 125:23cc3068a9e4 | 129 | } |
| mbed_official | 125:23cc3068a9e4 | 130 | |
| mbed_official | 125:23cc3068a9e4 | 131 | /** |
| mbed_official | 125:23cc3068a9e4 | 132 | * @} |
| mbed_official | 125:23cc3068a9e4 | 133 | */ |
| mbed_official | 125:23cc3068a9e4 | 134 | |
| mbed_official | 125:23cc3068a9e4 | 135 | /** @defgroup PWR_Group2 PVD configuration functions |
| mbed_official | 125:23cc3068a9e4 | 136 | * @brief PVD configuration functions |
| mbed_official | 125:23cc3068a9e4 | 137 | * |
| mbed_official | 125:23cc3068a9e4 | 138 | @verbatim |
| mbed_official | 125:23cc3068a9e4 | 139 | =============================================================================== |
| mbed_official | 125:23cc3068a9e4 | 140 | ##### PVD configuration functions ##### |
| mbed_official | 125:23cc3068a9e4 | 141 | ============================================================================== |
| mbed_official | 125:23cc3068a9e4 | 142 | [..] |
| mbed_official | 125:23cc3068a9e4 | 143 | (+) The PVD is used to monitor the VDD power supply by comparing it to a threshold |
| mbed_official | 125:23cc3068a9e4 | 144 | selected by the PVD Level (PLS[2:0] bits in the PWR_CR). |
| mbed_official | 125:23cc3068a9e4 | 145 | (+) A PVDO flag is available to indicate if VDD/VDDA is higher or lower than the |
| mbed_official | 125:23cc3068a9e4 | 146 | PVD threshold. This event is internally connected to the EXTI line16 |
| mbed_official | 125:23cc3068a9e4 | 147 | and can generate an interrupt if enabled through the EXTI registers. |
| mbed_official | 125:23cc3068a9e4 | 148 | (+) The PVD is stopped in Standby mode. |
| mbed_official | 125:23cc3068a9e4 | 149 | |
| mbed_official | 125:23cc3068a9e4 | 150 | @endverbatim |
| mbed_official | 125:23cc3068a9e4 | 151 | * @{ |
| mbed_official | 125:23cc3068a9e4 | 152 | */ |
| mbed_official | 125:23cc3068a9e4 | 153 | |
| mbed_official | 125:23cc3068a9e4 | 154 | /** |
| mbed_official | 125:23cc3068a9e4 | 155 | * @brief Configures the voltage threshold detected by the Power Voltage Detector(PVD). |
| mbed_official | 125:23cc3068a9e4 | 156 | * @param PWR_PVDLevel: specifies the PVD detection level |
| mbed_official | 125:23cc3068a9e4 | 157 | * This parameter can be one of the following values: |
| mbed_official | 125:23cc3068a9e4 | 158 | * @arg PWR_PVDLevel_0: PVD detection level set to 2.18V |
| mbed_official | 125:23cc3068a9e4 | 159 | * @arg PWR_PVDLevel_1: PVD detection level set to 2.28V |
| mbed_official | 125:23cc3068a9e4 | 160 | * @arg PWR_PVDLevel_2: PVD detection level set to 2.38V |
| mbed_official | 125:23cc3068a9e4 | 161 | * @arg PWR_PVDLevel_3: PVD detection level set to 2.48V |
| mbed_official | 125:23cc3068a9e4 | 162 | * @arg PWR_PVDLevel_4: PVD detection level set to 2.58V |
| mbed_official | 125:23cc3068a9e4 | 163 | * @arg PWR_PVDLevel_5: PVD detection level set to 2.68V |
| mbed_official | 125:23cc3068a9e4 | 164 | * @arg PWR_PVDLevel_6: PVD detection level set to 2.78V |
| mbed_official | 125:23cc3068a9e4 | 165 | * @arg PWR_PVDLevel_7: PVD detection level set to 2.88V |
| mbed_official | 125:23cc3068a9e4 | 166 | * @retval None |
| mbed_official | 125:23cc3068a9e4 | 167 | */ |
| mbed_official | 125:23cc3068a9e4 | 168 | void PWR_PVDLevelConfig(uint32_t PWR_PVDLevel) |
| mbed_official | 125:23cc3068a9e4 | 169 | { |
| mbed_official | 125:23cc3068a9e4 | 170 | uint32_t tmpreg = 0; |
| mbed_official | 125:23cc3068a9e4 | 171 | |
| mbed_official | 125:23cc3068a9e4 | 172 | /* Check the parameters */ |
| mbed_official | 125:23cc3068a9e4 | 173 | assert_param(IS_PWR_PVD_LEVEL(PWR_PVDLevel)); |
| mbed_official | 125:23cc3068a9e4 | 174 | |
| mbed_official | 125:23cc3068a9e4 | 175 | tmpreg = PWR->CR; |
| mbed_official | 125:23cc3068a9e4 | 176 | |
| mbed_official | 125:23cc3068a9e4 | 177 | /* Clear PLS[7:5] bits */ |
| mbed_official | 125:23cc3068a9e4 | 178 | tmpreg &= CR_PLS_MASK; |
| mbed_official | 125:23cc3068a9e4 | 179 | |
| mbed_official | 125:23cc3068a9e4 | 180 | /* Set PLS[7:5] bits according to PWR_PVDLevel value */ |
| mbed_official | 125:23cc3068a9e4 | 181 | tmpreg |= PWR_PVDLevel; |
| mbed_official | 125:23cc3068a9e4 | 182 | |
| mbed_official | 125:23cc3068a9e4 | 183 | /* Store the new value */ |
| mbed_official | 125:23cc3068a9e4 | 184 | PWR->CR = tmpreg; |
| mbed_official | 125:23cc3068a9e4 | 185 | } |
| mbed_official | 125:23cc3068a9e4 | 186 | |
| mbed_official | 125:23cc3068a9e4 | 187 | /** |
| mbed_official | 125:23cc3068a9e4 | 188 | * @brief Enables or disables the Power Voltage Detector(PVD). |
| mbed_official | 125:23cc3068a9e4 | 189 | * @param NewState: new state of the PVD. |
| mbed_official | 125:23cc3068a9e4 | 190 | * This parameter can be: ENABLE or DISABLE. |
| mbed_official | 125:23cc3068a9e4 | 191 | * @retval None |
| mbed_official | 125:23cc3068a9e4 | 192 | */ |
| mbed_official | 125:23cc3068a9e4 | 193 | void PWR_PVDCmd(FunctionalState NewState) |
| mbed_official | 125:23cc3068a9e4 | 194 | { |
| mbed_official | 125:23cc3068a9e4 | 195 | /* Check the parameters */ |
| mbed_official | 125:23cc3068a9e4 | 196 | assert_param(IS_FUNCTIONAL_STATE(NewState)); |
| mbed_official | 125:23cc3068a9e4 | 197 | *(__IO uint32_t *) CR_PVDE_BB = (uint32_t)NewState; |
| mbed_official | 125:23cc3068a9e4 | 198 | } |
| mbed_official | 125:23cc3068a9e4 | 199 | |
| mbed_official | 125:23cc3068a9e4 | 200 | /** |
| mbed_official | 125:23cc3068a9e4 | 201 | * @} |
| mbed_official | 125:23cc3068a9e4 | 202 | */ |
| mbed_official | 125:23cc3068a9e4 | 203 | |
| mbed_official | 125:23cc3068a9e4 | 204 | /** @defgroup PWR_Group3 WakeUp pins configuration functions |
| mbed_official | 125:23cc3068a9e4 | 205 | * @brief WakeUp pins configuration functions |
| mbed_official | 125:23cc3068a9e4 | 206 | * |
| mbed_official | 125:23cc3068a9e4 | 207 | @verbatim |
| mbed_official | 125:23cc3068a9e4 | 208 | =============================================================================== |
| mbed_official | 125:23cc3068a9e4 | 209 | ##### WakeUp pins configuration functions ##### |
| mbed_official | 125:23cc3068a9e4 | 210 | =============================================================================== |
| mbed_official | 125:23cc3068a9e4 | 211 | [..] |
| mbed_official | 125:23cc3068a9e4 | 212 | (+) WakeUp pins are used to wakeup the system from Standby mode. These pins are |
| mbed_official | 125:23cc3068a9e4 | 213 | forced in input pull down configuration and are active on rising edges. |
| mbed_official | 125:23cc3068a9e4 | 214 | (+) There are three WakeUp pins: WakeUp Pin 1 on PA.00, WakeUp Pin 2 on PC.13 and |
| mbed_official | 125:23cc3068a9e4 | 215 | WakeUp Pin 3 on PE.06. |
| mbed_official | 125:23cc3068a9e4 | 216 | |
| mbed_official | 125:23cc3068a9e4 | 217 | @endverbatim |
| mbed_official | 125:23cc3068a9e4 | 218 | * @{ |
| mbed_official | 125:23cc3068a9e4 | 219 | */ |
| mbed_official | 125:23cc3068a9e4 | 220 | |
| mbed_official | 125:23cc3068a9e4 | 221 | /** |
| mbed_official | 125:23cc3068a9e4 | 222 | * @brief Enables or disables the WakeUp Pin functionality. |
| mbed_official | 125:23cc3068a9e4 | 223 | * @param PWR_WakeUpPin: specifies the WakeUpPin. |
| mbed_official | 125:23cc3068a9e4 | 224 | * This parameter can be: PWR_WakeUpPin_1, PWR_WakeUpPin_2 or PWR_WakeUpPin_3. |
| mbed_official | 125:23cc3068a9e4 | 225 | * @param NewState: new state of the WakeUp Pin functionality. |
| mbed_official | 125:23cc3068a9e4 | 226 | * This parameter can be: ENABLE or DISABLE. |
| mbed_official | 125:23cc3068a9e4 | 227 | * @retval None |
| mbed_official | 125:23cc3068a9e4 | 228 | */ |
| mbed_official | 125:23cc3068a9e4 | 229 | void PWR_WakeUpPinCmd(uint32_t PWR_WakeUpPin, FunctionalState NewState) |
| mbed_official | 125:23cc3068a9e4 | 230 | { |
| mbed_official | 125:23cc3068a9e4 | 231 | /* Check the parameters */ |
| mbed_official | 125:23cc3068a9e4 | 232 | assert_param(IS_PWR_WAKEUP_PIN(PWR_WakeUpPin)); |
| mbed_official | 125:23cc3068a9e4 | 233 | assert_param(IS_FUNCTIONAL_STATE(NewState)); |
| mbed_official | 125:23cc3068a9e4 | 234 | |
| mbed_official | 125:23cc3068a9e4 | 235 | if (NewState != DISABLE) |
| mbed_official | 125:23cc3068a9e4 | 236 | { |
| mbed_official | 125:23cc3068a9e4 | 237 | /* Enable the EWUPx pin */ |
| mbed_official | 125:23cc3068a9e4 | 238 | PWR->CSR |= PWR_WakeUpPin; |
| mbed_official | 125:23cc3068a9e4 | 239 | } |
| mbed_official | 125:23cc3068a9e4 | 240 | else |
| mbed_official | 125:23cc3068a9e4 | 241 | { |
| mbed_official | 125:23cc3068a9e4 | 242 | /* Disable the EWUPx pin */ |
| mbed_official | 125:23cc3068a9e4 | 243 | PWR->CSR &= ~PWR_WakeUpPin; |
| mbed_official | 125:23cc3068a9e4 | 244 | } |
| mbed_official | 125:23cc3068a9e4 | 245 | } |
| mbed_official | 125:23cc3068a9e4 | 246 | |
| mbed_official | 125:23cc3068a9e4 | 247 | /** |
| mbed_official | 125:23cc3068a9e4 | 248 | * @} |
| mbed_official | 125:23cc3068a9e4 | 249 | */ |
| mbed_official | 125:23cc3068a9e4 | 250 | |
| mbed_official | 125:23cc3068a9e4 | 251 | |
| mbed_official | 125:23cc3068a9e4 | 252 | /** @defgroup PWR_Group4 Low Power modes configuration functions |
| mbed_official | 125:23cc3068a9e4 | 253 | * @brief Low Power modes configuration functions |
| mbed_official | 125:23cc3068a9e4 | 254 | * |
| mbed_official | 125:23cc3068a9e4 | 255 | @verbatim |
| mbed_official | 125:23cc3068a9e4 | 256 | =============================================================================== |
| mbed_official | 125:23cc3068a9e4 | 257 | ##### Low Power modes configuration functions ##### |
| mbed_official | 125:23cc3068a9e4 | 258 | ============================================================================== |
| mbed_official | 125:23cc3068a9e4 | 259 | |
| mbed_official | 125:23cc3068a9e4 | 260 | [..] The devices feature three low-power modes: |
| mbed_official | 125:23cc3068a9e4 | 261 | (+) Sleep mode: Cortex-M4 core stopped, peripherals kept running. |
| mbed_official | 125:23cc3068a9e4 | 262 | (+) Stop mode: all clocks are stopped, regulator running, regulator in low power mode |
| mbed_official | 125:23cc3068a9e4 | 263 | (+) Standby mode: VCORE domain powered off |
| mbed_official | 125:23cc3068a9e4 | 264 | |
| mbed_official | 125:23cc3068a9e4 | 265 | *** Sleep mode *** |
| mbed_official | 125:23cc3068a9e4 | 266 | ================== |
| mbed_official | 125:23cc3068a9e4 | 267 | [..] |
| mbed_official | 125:23cc3068a9e4 | 268 | (+) Entry: |
| mbed_official | 125:23cc3068a9e4 | 269 | (++) The Sleep mode is entered by executing the WFE() or WFI() instructions. |
| mbed_official | 125:23cc3068a9e4 | 270 | (+) Exit: |
| mbed_official | 125:23cc3068a9e4 | 271 | (++) Any peripheral interrupt acknowledged by the nested vectored interrupt |
| mbed_official | 125:23cc3068a9e4 | 272 | controller (NVIC) can wake up the device from Sleep mode. |
| mbed_official | 125:23cc3068a9e4 | 273 | |
| mbed_official | 125:23cc3068a9e4 | 274 | *** Stop mode *** |
| mbed_official | 125:23cc3068a9e4 | 275 | ================= |
| mbed_official | 125:23cc3068a9e4 | 276 | [..] In Stop mode, all clocks in the VCORE domain are stopped, the PLL, the HSI, |
| mbed_official | 125:23cc3068a9e4 | 277 | and the HSE RC oscillators are disabled. Internal SRAM and register |
| mbed_official | 125:23cc3068a9e4 | 278 | contents are preserved. |
| mbed_official | 125:23cc3068a9e4 | 279 | The voltage regulator can be configured either in normal or low-power mode. |
| mbed_official | 125:23cc3068a9e4 | 280 | |
| mbed_official | 125:23cc3068a9e4 | 281 | (+) Entry: |
| mbed_official | 125:23cc3068a9e4 | 282 | (++) The Stop mode is entered using the PWR_EnterSTOPMode(PWR_Regulator_LowPower,) |
| mbed_official | 125:23cc3068a9e4 | 283 | function with regulator in LowPower or with Regulator ON. |
| mbed_official | 125:23cc3068a9e4 | 284 | (+) Exit: |
| mbed_official | 125:23cc3068a9e4 | 285 | (++) Any EXTI Line (Internal or External) configured in Interrupt/Event mode |
| mbed_official | 125:23cc3068a9e4 | 286 | or any internal IPs (I2C or UASRT) wakeup event. |
| mbed_official | 125:23cc3068a9e4 | 287 | |
| mbed_official | 125:23cc3068a9e4 | 288 | *** Standby mode *** |
| mbed_official | 125:23cc3068a9e4 | 289 | ==================== |
| mbed_official | 125:23cc3068a9e4 | 290 | [..] The Standby mode allows to achieve the lowest power consumption. It is based |
| mbed_official | 125:23cc3068a9e4 | 291 | on the Cortex-M4 deepsleep mode, with the voltage regulator disabled. |
| mbed_official | 125:23cc3068a9e4 | 292 | The VCORE domain is consequently powered off. The PLL, the HSI, and the HSE |
| mbed_official | 125:23cc3068a9e4 | 293 | oscillator are also switched off. SRAM and register |
| mbed_official | 125:23cc3068a9e4 | 294 | contents are lost except for the Backup domain (RTC registers, RTC backup |
| mbed_official | 125:23cc3068a9e4 | 295 | registers and Standby circuitry). |
| mbed_official | 125:23cc3068a9e4 | 296 | |
| mbed_official | 125:23cc3068a9e4 | 297 | [..] The voltage regulator is OFF. |
| mbed_official | 125:23cc3068a9e4 | 298 | |
| mbed_official | 125:23cc3068a9e4 | 299 | (+) Entry: |
| mbed_official | 125:23cc3068a9e4 | 300 | (++) The Standby mode is entered using the PWR_EnterSTANDBYMode() function. |
| mbed_official | 125:23cc3068a9e4 | 301 | (+) Exit: |
| mbed_official | 125:23cc3068a9e4 | 302 | (++) WKUP pin rising edge, RTC alarm (Alarm A and Alarm B), RTC wakeup, |
| mbed_official | 125:23cc3068a9e4 | 303 | tamper event, time-stamp event, external reset in NRST pin, IWDG reset. |
| mbed_official | 125:23cc3068a9e4 | 304 | |
| mbed_official | 125:23cc3068a9e4 | 305 | *** Auto-wakeup (AWU) from low-power mode *** |
| mbed_official | 125:23cc3068a9e4 | 306 | ============================================= |
| mbed_official | 125:23cc3068a9e4 | 307 | [..] The MCU can be woken up from low-power mode by an RTC Alarm event, a tamper |
| mbed_official | 125:23cc3068a9e4 | 308 | event, a time-stamp event, or a comparator event, without depending on an |
| mbed_official | 125:23cc3068a9e4 | 309 | external interrupt (Auto-wakeup mode). |
| mbed_official | 125:23cc3068a9e4 | 310 | |
| mbed_official | 125:23cc3068a9e4 | 311 | (+) RTC auto-wakeup (AWU) from the Stop mode |
| mbed_official | 125:23cc3068a9e4 | 312 | (++) To wake up from the Stop mode with an RTC alarm event, it is necessary to: |
| mbed_official | 125:23cc3068a9e4 | 313 | (+++) Configure the EXTI Line 17 to be sensitive to rising edges (Interrupt |
| mbed_official | 125:23cc3068a9e4 | 314 | or Event modes) using the EXTI_Init() function. |
| mbed_official | 125:23cc3068a9e4 | 315 | (+++) Enable the RTC Alarm Interrupt using the RTC_ITConfig() function |
| mbed_official | 125:23cc3068a9e4 | 316 | (+++) Configure the RTC to generate the RTC alarm using the RTC_SetAlarm() |
| mbed_official | 125:23cc3068a9e4 | 317 | and RTC_AlarmCmd() functions. |
| mbed_official | 125:23cc3068a9e4 | 318 | (++) To wake up from the Stop mode with an RTC Tamper or time stamp event, it |
| mbed_official | 125:23cc3068a9e4 | 319 | is necessary to: |
| mbed_official | 125:23cc3068a9e4 | 320 | (+++) Configure the EXTI Line 19 to be sensitive to rising edges (Interrupt |
| mbed_official | 125:23cc3068a9e4 | 321 | or Event modes) using the EXTI_Init() function. |
| mbed_official | 125:23cc3068a9e4 | 322 | (+++) Enable the RTC Tamper or time stamp Interrupt using the RTC_ITConfig() |
| mbed_official | 125:23cc3068a9e4 | 323 | function. |
| mbed_official | 125:23cc3068a9e4 | 324 | (+++) Configure the RTC to detect the tamper or time stamp event using the |
| mbed_official | 125:23cc3068a9e4 | 325 | RTC_TimeStampConfig(), RTC_TamperTriggerConfig() and RTC_TamperCmd() |
| mbed_official | 125:23cc3068a9e4 | 326 | functions. |
| mbed_official | 125:23cc3068a9e4 | 327 | |
| mbed_official | 125:23cc3068a9e4 | 328 | (+) RTC auto-wakeup (AWU) from the Standby mode |
| mbed_official | 125:23cc3068a9e4 | 329 | (++) To wake up from the Standby mode with an RTC alarm event, it is necessary to: |
| mbed_official | 125:23cc3068a9e4 | 330 | (+++) Enable the RTC Alarm Interrupt using the RTC_ITConfig() function. |
| mbed_official | 125:23cc3068a9e4 | 331 | (+++) Configure the RTC to generate the RTC alarm using the RTC_SetAlarm() |
| mbed_official | 125:23cc3068a9e4 | 332 | and RTC_AlarmCmd() functions. |
| mbed_official | 125:23cc3068a9e4 | 333 | (++) To wake up from the Standby mode with an RTC Tamper or time stamp event, it |
| mbed_official | 125:23cc3068a9e4 | 334 | is necessary to: |
| mbed_official | 125:23cc3068a9e4 | 335 | (+++) Enable the RTC Tamper or time stamp Interrupt using the RTC_ITConfig() |
| mbed_official | 125:23cc3068a9e4 | 336 | function. |
| mbed_official | 125:23cc3068a9e4 | 337 | (+++) Configure the RTC to detect the tamper or time stamp event using the |
| mbed_official | 125:23cc3068a9e4 | 338 | RTC_TimeStampConfig(), RTC_TamperTriggerConfig() and RTC_TamperCmd() |
| mbed_official | 125:23cc3068a9e4 | 339 | functions. |
| mbed_official | 125:23cc3068a9e4 | 340 | |
| mbed_official | 125:23cc3068a9e4 | 341 | (+) Comparator auto-wakeup (AWU) from the Stop mode |
| mbed_official | 125:23cc3068a9e4 | 342 | (++) To wake up from the Stop mode with a comparator wakeup event, it is necessary to: |
| mbed_official | 125:23cc3068a9e4 | 343 | (+++) Configure the correspondant comparator EXTI Line to be sensitive to |
| mbed_official | 125:23cc3068a9e4 | 344 | the selected edges (falling, rising or falling and rising) |
| mbed_official | 125:23cc3068a9e4 | 345 | (Interrupt or Event modes) using the EXTI_Init() function. |
| mbed_official | 125:23cc3068a9e4 | 346 | (+++) Configure the comparator to generate the event. |
| mbed_official | 125:23cc3068a9e4 | 347 | |
| mbed_official | 125:23cc3068a9e4 | 348 | @endverbatim |
| mbed_official | 125:23cc3068a9e4 | 349 | * @{ |
| mbed_official | 125:23cc3068a9e4 | 350 | */ |
| mbed_official | 125:23cc3068a9e4 | 351 | |
| mbed_official | 125:23cc3068a9e4 | 352 | /** |
| mbed_official | 125:23cc3068a9e4 | 353 | * @brief Enters Sleep mode. |
| mbed_official | 125:23cc3068a9e4 | 354 | * @note In Sleep mode, all I/O pins keep the same state as in Run mode. |
| mbed_official | 125:23cc3068a9e4 | 355 | * @param PWR_SLEEPEntry: specifies if SLEEP mode in entered with WFI or WFE instruction. |
| mbed_official | 125:23cc3068a9e4 | 356 | * This parameter can be one of the following values: |
| mbed_official | 125:23cc3068a9e4 | 357 | * @arg PWR_SLEEPEntry_WFI: enter SLEEP mode with WFI instruction |
| mbed_official | 125:23cc3068a9e4 | 358 | * @arg PWR_SLEEPEntry_WFE: enter SLEEP mode with WFE instruction |
| mbed_official | 125:23cc3068a9e4 | 359 | * @retval None |
| mbed_official | 125:23cc3068a9e4 | 360 | */ |
| mbed_official | 125:23cc3068a9e4 | 361 | void PWR_EnterSleepMode(uint8_t PWR_SLEEPEntry) |
| mbed_official | 125:23cc3068a9e4 | 362 | { |
| mbed_official | 125:23cc3068a9e4 | 363 | /* Check the parameters */ |
| mbed_official | 125:23cc3068a9e4 | 364 | assert_param(IS_PWR_SLEEP_ENTRY(PWR_SLEEPEntry)); |
| mbed_official | 125:23cc3068a9e4 | 365 | |
| mbed_official | 125:23cc3068a9e4 | 366 | /* Clear SLEEPDEEP bit of Cortex System Control Register */ |
| mbed_official | 125:23cc3068a9e4 | 367 | SCB->SCR &= (uint32_t)~((uint32_t)SCB_SCR_SLEEPDEEP_Msk); |
| mbed_official | 125:23cc3068a9e4 | 368 | |
| mbed_official | 125:23cc3068a9e4 | 369 | /* Select SLEEP mode entry -------------------------------------------------*/ |
| mbed_official | 125:23cc3068a9e4 | 370 | if(PWR_SLEEPEntry == PWR_SLEEPEntry_WFI) |
| mbed_official | 125:23cc3068a9e4 | 371 | { |
| mbed_official | 125:23cc3068a9e4 | 372 | /* Request Wait For Interrupt */ |
| mbed_official | 125:23cc3068a9e4 | 373 | __WFI(); |
| mbed_official | 125:23cc3068a9e4 | 374 | } |
| mbed_official | 125:23cc3068a9e4 | 375 | else |
| mbed_official | 125:23cc3068a9e4 | 376 | { |
| mbed_official | 125:23cc3068a9e4 | 377 | /* Request Wait For Event */ |
| mbed_official | 125:23cc3068a9e4 | 378 | __WFE(); |
| mbed_official | 125:23cc3068a9e4 | 379 | } |
| mbed_official | 125:23cc3068a9e4 | 380 | } |
| mbed_official | 125:23cc3068a9e4 | 381 | |
| mbed_official | 125:23cc3068a9e4 | 382 | /** |
| mbed_official | 125:23cc3068a9e4 | 383 | * @brief Enters STOP mode. |
| mbed_official | 125:23cc3068a9e4 | 384 | * @note In Stop mode, all I/O pins keep the same state as in Run mode. |
| mbed_official | 125:23cc3068a9e4 | 385 | * @note When exiting Stop mode by issuing an interrupt or a wakeup event, |
| mbed_official | 125:23cc3068a9e4 | 386 | * the HSI RC oscillator is selected as system clock. |
| mbed_official | 125:23cc3068a9e4 | 387 | * @note When the voltage regulator operates in low power mode, an additional |
| mbed_official | 125:23cc3068a9e4 | 388 | * startup delay is incurred when waking up from Stop mode. |
| mbed_official | 125:23cc3068a9e4 | 389 | * By keeping the internal regulator ON during Stop mode, the consumption |
| mbed_official | 125:23cc3068a9e4 | 390 | * is higher although the startup time is reduced. |
| mbed_official | 125:23cc3068a9e4 | 391 | * @param PWR_Regulator: specifies the regulator state in STOP mode. |
| mbed_official | 125:23cc3068a9e4 | 392 | * This parameter can be one of the following values: |
| mbed_official | 125:23cc3068a9e4 | 393 | * @arg PWR_Regulator_ON: STOP mode with regulator ON |
| mbed_official | 125:23cc3068a9e4 | 394 | * @arg PWR_Regulator_LowPower: STOP mode with regulator in low power mode |
| mbed_official | 125:23cc3068a9e4 | 395 | * @param PWR_STOPEntry: specifies if STOP mode in entered with WFI or WFE instruction. |
| mbed_official | 125:23cc3068a9e4 | 396 | * This parameter can be one of the following values: |
| mbed_official | 125:23cc3068a9e4 | 397 | * @arg PWR_STOPEntry_WFI: enter STOP mode with WFI instruction |
| mbed_official | 125:23cc3068a9e4 | 398 | * @arg PWR_STOPEntry_WFE: enter STOP mode with WFE instruction |
| mbed_official | 125:23cc3068a9e4 | 399 | * @retval None |
| mbed_official | 125:23cc3068a9e4 | 400 | */ |
| mbed_official | 125:23cc3068a9e4 | 401 | void PWR_EnterSTOPMode(uint32_t PWR_Regulator, uint8_t PWR_STOPEntry) |
| mbed_official | 125:23cc3068a9e4 | 402 | { |
| mbed_official | 125:23cc3068a9e4 | 403 | uint32_t tmpreg = 0; |
| mbed_official | 125:23cc3068a9e4 | 404 | |
| mbed_official | 125:23cc3068a9e4 | 405 | /* Check the parameters */ |
| mbed_official | 125:23cc3068a9e4 | 406 | assert_param(IS_PWR_REGULATOR(PWR_Regulator)); |
| mbed_official | 125:23cc3068a9e4 | 407 | assert_param(IS_PWR_STOP_ENTRY(PWR_STOPEntry)); |
| mbed_official | 125:23cc3068a9e4 | 408 | |
| mbed_official | 125:23cc3068a9e4 | 409 | /* Select the regulator state in STOP mode ---------------------------------*/ |
| mbed_official | 125:23cc3068a9e4 | 410 | tmpreg = PWR->CR; |
| mbed_official | 125:23cc3068a9e4 | 411 | /* Clear PDDS and LPDSR bits */ |
| mbed_official | 125:23cc3068a9e4 | 412 | tmpreg &= CR_DS_MASK; |
| mbed_official | 125:23cc3068a9e4 | 413 | |
| mbed_official | 125:23cc3068a9e4 | 414 | /* Set LPDSR bit according to PWR_Regulator value */ |
| mbed_official | 125:23cc3068a9e4 | 415 | tmpreg |= PWR_Regulator; |
| mbed_official | 125:23cc3068a9e4 | 416 | |
| mbed_official | 125:23cc3068a9e4 | 417 | /* Store the new value */ |
| mbed_official | 125:23cc3068a9e4 | 418 | PWR->CR = tmpreg; |
| mbed_official | 125:23cc3068a9e4 | 419 | |
| mbed_official | 125:23cc3068a9e4 | 420 | /* Set SLEEPDEEP bit of Cortex System Control Register */ |
| mbed_official | 125:23cc3068a9e4 | 421 | SCB->SCR |= SCB_SCR_SLEEPDEEP_Msk; |
| mbed_official | 125:23cc3068a9e4 | 422 | |
| mbed_official | 125:23cc3068a9e4 | 423 | /* Select STOP mode entry --------------------------------------------------*/ |
| mbed_official | 125:23cc3068a9e4 | 424 | if(PWR_STOPEntry == PWR_STOPEntry_WFI) |
| mbed_official | 125:23cc3068a9e4 | 425 | { |
| mbed_official | 125:23cc3068a9e4 | 426 | /* Request Wait For Interrupt */ |
| mbed_official | 125:23cc3068a9e4 | 427 | __WFI(); |
| mbed_official | 125:23cc3068a9e4 | 428 | } |
| mbed_official | 125:23cc3068a9e4 | 429 | else |
| mbed_official | 125:23cc3068a9e4 | 430 | { |
| mbed_official | 125:23cc3068a9e4 | 431 | /* Request Wait For Event */ |
| mbed_official | 125:23cc3068a9e4 | 432 | __WFE(); |
| mbed_official | 125:23cc3068a9e4 | 433 | } |
| mbed_official | 125:23cc3068a9e4 | 434 | /* Reset SLEEPDEEP bit of Cortex System Control Register */ |
| mbed_official | 125:23cc3068a9e4 | 435 | SCB->SCR &= (uint32_t)~((uint32_t)SCB_SCR_SLEEPDEEP_Msk); |
| mbed_official | 125:23cc3068a9e4 | 436 | } |
| mbed_official | 125:23cc3068a9e4 | 437 | |
| mbed_official | 125:23cc3068a9e4 | 438 | /** |
| mbed_official | 125:23cc3068a9e4 | 439 | * @brief Enters STANDBY mode. |
| mbed_official | 125:23cc3068a9e4 | 440 | * @note In Standby mode, all I/O pins are high impedance except for: |
| mbed_official | 125:23cc3068a9e4 | 441 | * @note Reset pad (still available) |
| mbed_official | 125:23cc3068a9e4 | 442 | * @note RTC_AF1 pin (PC13) if configured for Wakeup pin 2 (WKUP2), tamper, |
| mbed_official | 125:23cc3068a9e4 | 443 | * time-stamp, RTC Alarm out, or RTC clock calibration out. |
| mbed_official | 125:23cc3068a9e4 | 444 | * @note WKUP pin 1 (PA0) and WKUP pin 3 (PE6), if enabled. |
| mbed_official | 125:23cc3068a9e4 | 445 | * @param None |
| mbed_official | 125:23cc3068a9e4 | 446 | * @retval None |
| mbed_official | 125:23cc3068a9e4 | 447 | */ |
| mbed_official | 125:23cc3068a9e4 | 448 | void PWR_EnterSTANDBYMode(void) |
| mbed_official | 125:23cc3068a9e4 | 449 | { |
| mbed_official | 125:23cc3068a9e4 | 450 | /* Clear Wakeup flag */ |
| mbed_official | 125:23cc3068a9e4 | 451 | PWR->CR |= PWR_CR_CWUF; |
| mbed_official | 125:23cc3068a9e4 | 452 | |
| mbed_official | 125:23cc3068a9e4 | 453 | /* Select STANDBY mode */ |
| mbed_official | 125:23cc3068a9e4 | 454 | PWR->CR |= PWR_CR_PDDS; |
| mbed_official | 125:23cc3068a9e4 | 455 | |
| mbed_official | 125:23cc3068a9e4 | 456 | /* Set SLEEPDEEP bit of Cortex System Control Register */ |
| mbed_official | 125:23cc3068a9e4 | 457 | SCB->SCR |= SCB_SCR_SLEEPDEEP_Msk; |
| mbed_official | 125:23cc3068a9e4 | 458 | |
| mbed_official | 125:23cc3068a9e4 | 459 | /* This option is used to ensure that store operations are completed */ |
| mbed_official | 125:23cc3068a9e4 | 460 | #if defined ( __CC_ARM ) |
| mbed_official | 125:23cc3068a9e4 | 461 | __force_stores(); |
| mbed_official | 125:23cc3068a9e4 | 462 | #endif |
| mbed_official | 125:23cc3068a9e4 | 463 | /* Request Wait For Interrupt */ |
| mbed_official | 125:23cc3068a9e4 | 464 | __WFI(); |
| mbed_official | 125:23cc3068a9e4 | 465 | } |
| mbed_official | 125:23cc3068a9e4 | 466 | |
| mbed_official | 125:23cc3068a9e4 | 467 | /** |
| mbed_official | 125:23cc3068a9e4 | 468 | * @} |
| mbed_official | 125:23cc3068a9e4 | 469 | */ |
| mbed_official | 125:23cc3068a9e4 | 470 | |
| mbed_official | 125:23cc3068a9e4 | 471 | /** @defgroup PWR_Group5 Flags management functions |
| mbed_official | 125:23cc3068a9e4 | 472 | * @brief Flags management functions |
| mbed_official | 125:23cc3068a9e4 | 473 | * |
| mbed_official | 125:23cc3068a9e4 | 474 | @verbatim |
| mbed_official | 125:23cc3068a9e4 | 475 | =============================================================================== |
| mbed_official | 125:23cc3068a9e4 | 476 | ##### Flags management functions ##### |
| mbed_official | 125:23cc3068a9e4 | 477 | =============================================================================== |
| mbed_official | 125:23cc3068a9e4 | 478 | |
| mbed_official | 125:23cc3068a9e4 | 479 | @endverbatim |
| mbed_official | 125:23cc3068a9e4 | 480 | * @{ |
| mbed_official | 125:23cc3068a9e4 | 481 | */ |
| mbed_official | 125:23cc3068a9e4 | 482 | |
| mbed_official | 125:23cc3068a9e4 | 483 | /** |
| mbed_official | 125:23cc3068a9e4 | 484 | * @brief Checks whether the specified PWR flag is set or not. |
| mbed_official | 125:23cc3068a9e4 | 485 | * @param PWR_FLAG: specifies the flag to check. |
| mbed_official | 125:23cc3068a9e4 | 486 | * This parameter can be one of the following values: |
| mbed_official | 125:23cc3068a9e4 | 487 | * @arg PWR_FLAG_WU: Wake Up flag. This flag indicates that a wakeup event |
| mbed_official | 125:23cc3068a9e4 | 488 | * was received from the WKUP pin or from the RTC alarm (Alarm A or Alarm B), |
| mbed_official | 125:23cc3068a9e4 | 489 | * RTC Tamper event, RTC TimeStamp event or RTC Wakeup. |
| mbed_official | 125:23cc3068a9e4 | 490 | * @arg PWR_FLAG_SB: StandBy flag. This flag indicates that the system was |
| mbed_official | 125:23cc3068a9e4 | 491 | * resumed from StandBy mode. |
| mbed_official | 125:23cc3068a9e4 | 492 | * @arg PWR_FLAG_PVDO: PVD Output. This flag is valid only if PVD is enabled |
| mbed_official | 125:23cc3068a9e4 | 493 | * by the PWR_PVDCmd() function. |
| mbed_official | 125:23cc3068a9e4 | 494 | * @arg PWR_FLAG_VREFINTRDY: Internal Voltage Reference Ready flag. This |
| mbed_official | 125:23cc3068a9e4 | 495 | * flag indicates the state of the internal voltage reference, VREFINT. |
| mbed_official | 125:23cc3068a9e4 | 496 | * @retval The new state of PWR_FLAG (SET or RESET). |
| mbed_official | 125:23cc3068a9e4 | 497 | */ |
| mbed_official | 125:23cc3068a9e4 | 498 | FlagStatus PWR_GetFlagStatus(uint32_t PWR_FLAG) |
| mbed_official | 125:23cc3068a9e4 | 499 | { |
| mbed_official | 125:23cc3068a9e4 | 500 | FlagStatus bitstatus = RESET; |
| mbed_official | 125:23cc3068a9e4 | 501 | /* Check the parameters */ |
| mbed_official | 125:23cc3068a9e4 | 502 | assert_param(IS_PWR_GET_FLAG(PWR_FLAG)); |
| mbed_official | 125:23cc3068a9e4 | 503 | |
| mbed_official | 125:23cc3068a9e4 | 504 | if ((PWR->CSR & PWR_FLAG) != (uint32_t)RESET) |
| mbed_official | 125:23cc3068a9e4 | 505 | { |
| mbed_official | 125:23cc3068a9e4 | 506 | bitstatus = SET; |
| mbed_official | 125:23cc3068a9e4 | 507 | } |
| mbed_official | 125:23cc3068a9e4 | 508 | else |
| mbed_official | 125:23cc3068a9e4 | 509 | { |
| mbed_official | 125:23cc3068a9e4 | 510 | bitstatus = RESET; |
| mbed_official | 125:23cc3068a9e4 | 511 | } |
| mbed_official | 125:23cc3068a9e4 | 512 | /* Return the flag status */ |
| mbed_official | 125:23cc3068a9e4 | 513 | return bitstatus; |
| mbed_official | 125:23cc3068a9e4 | 514 | } |
| mbed_official | 125:23cc3068a9e4 | 515 | |
| mbed_official | 125:23cc3068a9e4 | 516 | /** |
| mbed_official | 125:23cc3068a9e4 | 517 | * @brief Clears the PWR's pending flags. |
| mbed_official | 125:23cc3068a9e4 | 518 | * @param PWR_FLAG: specifies the flag to clear. |
| mbed_official | 125:23cc3068a9e4 | 519 | * This parameter can be one of the following values: |
| mbed_official | 125:23cc3068a9e4 | 520 | * @arg PWR_FLAG_WU: Wake Up flag |
| mbed_official | 125:23cc3068a9e4 | 521 | * @arg PWR_FLAG_SB: StandBy flag |
| mbed_official | 125:23cc3068a9e4 | 522 | * @retval None |
| mbed_official | 125:23cc3068a9e4 | 523 | */ |
| mbed_official | 125:23cc3068a9e4 | 524 | void PWR_ClearFlag(uint32_t PWR_FLAG) |
| mbed_official | 125:23cc3068a9e4 | 525 | { |
| mbed_official | 125:23cc3068a9e4 | 526 | /* Check the parameters */ |
| mbed_official | 125:23cc3068a9e4 | 527 | assert_param(IS_PWR_CLEAR_FLAG(PWR_FLAG)); |
| mbed_official | 125:23cc3068a9e4 | 528 | |
| mbed_official | 125:23cc3068a9e4 | 529 | PWR->CR |= PWR_FLAG << 2; |
| mbed_official | 125:23cc3068a9e4 | 530 | } |
| mbed_official | 125:23cc3068a9e4 | 531 | |
| mbed_official | 125:23cc3068a9e4 | 532 | /** |
| mbed_official | 125:23cc3068a9e4 | 533 | * @} |
| mbed_official | 125:23cc3068a9e4 | 534 | */ |
| mbed_official | 125:23cc3068a9e4 | 535 | |
| mbed_official | 125:23cc3068a9e4 | 536 | /** |
| mbed_official | 125:23cc3068a9e4 | 537 | * @} |
| mbed_official | 125:23cc3068a9e4 | 538 | */ |
| mbed_official | 125:23cc3068a9e4 | 539 | |
| mbed_official | 125:23cc3068a9e4 | 540 | /** |
| mbed_official | 125:23cc3068a9e4 | 541 | * @} |
| mbed_official | 125:23cc3068a9e4 | 542 | */ |
| mbed_official | 125:23cc3068a9e4 | 543 | |
| mbed_official | 125:23cc3068a9e4 | 544 | /** |
| mbed_official | 125:23cc3068a9e4 | 545 | * @} |
| mbed_official | 125:23cc3068a9e4 | 546 | */ |
| mbed_official | 125:23cc3068a9e4 | 547 | |
| mbed_official | 125:23cc3068a9e4 | 548 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |