mbed library sources
Dependents: frdm_kl05z_gpio_test
Fork of mbed-src by
targets/hal/TARGET_Freescale/TARGET_KPSDK_MCUS/TARGET_K64F/us_ticker.c@149:1fb5f62b92bd, 2014-04-03 (annotated)
- Committer:
- mbed_official
- Date:
- Thu Apr 03 11:45:06 2014 +0100
- Revision:
- 149:1fb5f62b92bd
- Parent:
- targets/hal/TARGET_Freescale/TARGET_KSDK_MCUS/TARGET_K64F/us_ticker.c@146:f64d43ff0c18
- Child:
- 304:89b9c3a9a045
Synchronized with git revision 220c0bb39ceee40016e1e86350c058963d01ed42
Full URL: https://github.com/mbedmicro/mbed/commit/220c0bb39ceee40016e1e86350c058963d01ed42/
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
mbed_official | 146:f64d43ff0c18 | 1 | /* mbed Microcontroller Library |
mbed_official | 146:f64d43ff0c18 | 2 | * Copyright (c) 2006-2013 ARM Limited |
mbed_official | 146:f64d43ff0c18 | 3 | * |
mbed_official | 146:f64d43ff0c18 | 4 | * Licensed under the Apache License, Version 2.0 (the "License"); |
mbed_official | 146:f64d43ff0c18 | 5 | * you may not use this file except in compliance with the License. |
mbed_official | 146:f64d43ff0c18 | 6 | * You may obtain a copy of the License at |
mbed_official | 146:f64d43ff0c18 | 7 | * |
mbed_official | 146:f64d43ff0c18 | 8 | * http://www.apache.org/licenses/LICENSE-2.0 |
mbed_official | 146:f64d43ff0c18 | 9 | * |
mbed_official | 146:f64d43ff0c18 | 10 | * Unless required by applicable law or agreed to in writing, software |
mbed_official | 146:f64d43ff0c18 | 11 | * distributed under the License is distributed on an "AS IS" BASIS, |
mbed_official | 146:f64d43ff0c18 | 12 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. |
mbed_official | 146:f64d43ff0c18 | 13 | * See the License for the specific language governing permissions and |
mbed_official | 146:f64d43ff0c18 | 14 | * limitations under the License. |
mbed_official | 146:f64d43ff0c18 | 15 | */ |
mbed_official | 146:f64d43ff0c18 | 16 | #include <stddef.h> |
mbed_official | 146:f64d43ff0c18 | 17 | #include "us_ticker_api.h" |
mbed_official | 146:f64d43ff0c18 | 18 | #include "PeripheralNames.h" |
mbed_official | 146:f64d43ff0c18 | 19 | #include "fsl_pit_hal.h" |
mbed_official | 146:f64d43ff0c18 | 20 | #include "fsl_sim_hal.h" |
mbed_official | 146:f64d43ff0c18 | 21 | #include "fsl_clock_manager.h" |
mbed_official | 146:f64d43ff0c18 | 22 | #include "fsl_clock_configs.h" |
mbed_official | 146:f64d43ff0c18 | 23 | |
mbed_official | 146:f64d43ff0c18 | 24 | static void pit_init(void); |
mbed_official | 146:f64d43ff0c18 | 25 | static void lptmr_init(void); |
mbed_official | 146:f64d43ff0c18 | 26 | |
mbed_official | 146:f64d43ff0c18 | 27 | static int us_ticker_inited = 0; |
mbed_official | 146:f64d43ff0c18 | 28 | |
mbed_official | 146:f64d43ff0c18 | 29 | void us_ticker_init(void) { |
mbed_official | 146:f64d43ff0c18 | 30 | if (us_ticker_inited) { |
mbed_official | 146:f64d43ff0c18 | 31 | return; |
mbed_official | 146:f64d43ff0c18 | 32 | } |
mbed_official | 146:f64d43ff0c18 | 33 | us_ticker_inited = 1; |
mbed_official | 146:f64d43ff0c18 | 34 | |
mbed_official | 146:f64d43ff0c18 | 35 | pit_init(); |
mbed_official | 146:f64d43ff0c18 | 36 | lptmr_init(); |
mbed_official | 146:f64d43ff0c18 | 37 | } |
mbed_official | 146:f64d43ff0c18 | 38 | |
mbed_official | 146:f64d43ff0c18 | 39 | |
mbed_official | 146:f64d43ff0c18 | 40 | uint32_t us_ticker_read() { |
mbed_official | 146:f64d43ff0c18 | 41 | if (!us_ticker_inited) { |
mbed_official | 146:f64d43ff0c18 | 42 | us_ticker_init(); |
mbed_official | 146:f64d43ff0c18 | 43 | } |
mbed_official | 146:f64d43ff0c18 | 44 | |
mbed_official | 146:f64d43ff0c18 | 45 | return ~(pit_hal_read_timer_count(1)); |
mbed_official | 146:f64d43ff0c18 | 46 | } |
mbed_official | 146:f64d43ff0c18 | 47 | /****************************************************************************** |
mbed_official | 146:f64d43ff0c18 | 48 | * Timer for us timing. |
mbed_official | 146:f64d43ff0c18 | 49 | ******************************************************************************/ |
mbed_official | 146:f64d43ff0c18 | 50 | static void pit_init(void) { |
mbed_official | 146:f64d43ff0c18 | 51 | uint32_t busClock; |
mbed_official | 146:f64d43ff0c18 | 52 | |
mbed_official | 146:f64d43ff0c18 | 53 | clock_hal_set_gate(kSimClockModulePIT, 0, true); |
mbed_official | 146:f64d43ff0c18 | 54 | pit_hal_enable(); |
mbed_official | 146:f64d43ff0c18 | 55 | clock_manager_get_frequency(kBusClock, &busClock); |
mbed_official | 146:f64d43ff0c18 | 56 | pit_hal_set_timer_period_count(0, busClock / 1000000 - 1); |
mbed_official | 146:f64d43ff0c18 | 57 | pit_hal_set_timer_period_count(1, 0xFFFFFFFF); |
mbed_official | 146:f64d43ff0c18 | 58 | pit_hal_configure_timer_chain(1, true); |
mbed_official | 146:f64d43ff0c18 | 59 | |
mbed_official | 146:f64d43ff0c18 | 60 | pit_hal_timer_start(0); |
mbed_official | 146:f64d43ff0c18 | 61 | pit_hal_timer_start(1); |
mbed_official | 146:f64d43ff0c18 | 62 | } |
mbed_official | 146:f64d43ff0c18 | 63 | |
mbed_official | 146:f64d43ff0c18 | 64 | /****************************************************************************** |
mbed_official | 146:f64d43ff0c18 | 65 | * Timer Event |
mbed_official | 146:f64d43ff0c18 | 66 | * |
mbed_official | 146:f64d43ff0c18 | 67 | * It schedules interrupts at given (32bit)us interval of time. |
mbed_official | 146:f64d43ff0c18 | 68 | * It is implemented used the 16bit Low Power Timer that remains powered in all |
mbed_official | 146:f64d43ff0c18 | 69 | * power modes. |
mbed_official | 146:f64d43ff0c18 | 70 | ******************************************************************************/ |
mbed_official | 146:f64d43ff0c18 | 71 | static void lptmr_isr(void); |
mbed_official | 146:f64d43ff0c18 | 72 | |
mbed_official | 146:f64d43ff0c18 | 73 | static void lptmr_init(void) { |
mbed_official | 146:f64d43ff0c18 | 74 | clock_hal_set_gate(kSimClockModuleLPTIMER, 0, true); |
mbed_official | 146:f64d43ff0c18 | 75 | |
mbed_official | 146:f64d43ff0c18 | 76 | /* Set interrupt handler */ |
mbed_official | 146:f64d43ff0c18 | 77 | NVIC_SetVector(LPTimer_IRQn, (uint32_t)lptmr_isr); |
mbed_official | 146:f64d43ff0c18 | 78 | NVIC_EnableIRQ(LPTimer_IRQn); |
mbed_official | 146:f64d43ff0c18 | 79 | |
mbed_official | 146:f64d43ff0c18 | 80 | /* TODO: check clock manager, due to nonstandard 50 MHz */ |
mbed_official | 146:f64d43ff0c18 | 81 | //No suitable external oscillator clock -> Use fast internal oscillator (4MHz / divider) |
mbed_official | 146:f64d43ff0c18 | 82 | MCG->C1 |= MCG_C1_IRCLKEN_MASK; |
mbed_official | 146:f64d43ff0c18 | 83 | MCG->C2 |= MCG_C2_IRCS_MASK; |
mbed_official | 146:f64d43ff0c18 | 84 | LPTMR0->PSR = LPTMR_PSR_PCS(0); |
mbed_official | 146:f64d43ff0c18 | 85 | switch (MCG->SC & MCG_SC_FCRDIV_MASK) { |
mbed_official | 146:f64d43ff0c18 | 86 | case MCG_SC_FCRDIV(0): //4MHz |
mbed_official | 146:f64d43ff0c18 | 87 | LPTMR0->PSR |= LPTMR_PSR_PRESCALE(1); |
mbed_official | 146:f64d43ff0c18 | 88 | break; |
mbed_official | 146:f64d43ff0c18 | 89 | case MCG_SC_FCRDIV(1): //2MHz |
mbed_official | 146:f64d43ff0c18 | 90 | LPTMR0->PSR |= LPTMR_PSR_PRESCALE(0); |
mbed_official | 146:f64d43ff0c18 | 91 | break; |
mbed_official | 146:f64d43ff0c18 | 92 | default: //1MHz or anything else, in which case we put it on 1MHz |
mbed_official | 146:f64d43ff0c18 | 93 | MCG->SC &= ~MCG_SC_FCRDIV_MASK; |
mbed_official | 146:f64d43ff0c18 | 94 | MCG->SC |= MCG_SC_FCRDIV(2); |
mbed_official | 146:f64d43ff0c18 | 95 | LPTMR0->PSR |= LPTMR_PSR_PBYP_MASK; |
mbed_official | 146:f64d43ff0c18 | 96 | } |
mbed_official | 146:f64d43ff0c18 | 97 | } |
mbed_official | 146:f64d43ff0c18 | 98 | |
mbed_official | 146:f64d43ff0c18 | 99 | void us_ticker_disable_interrupt(void) { |
mbed_official | 146:f64d43ff0c18 | 100 | BW_LPTMR_CSR_TIE(0); |
mbed_official | 146:f64d43ff0c18 | 101 | } |
mbed_official | 146:f64d43ff0c18 | 102 | |
mbed_official | 146:f64d43ff0c18 | 103 | void us_ticker_clear_interrupt(void) { |
mbed_official | 146:f64d43ff0c18 | 104 | // we already clear interrupt in lptmr_isr |
mbed_official | 146:f64d43ff0c18 | 105 | } |
mbed_official | 146:f64d43ff0c18 | 106 | |
mbed_official | 146:f64d43ff0c18 | 107 | static uint32_t us_ticker_int_counter = 0; |
mbed_official | 146:f64d43ff0c18 | 108 | static uint16_t us_ticker_int_remainder = 0; |
mbed_official | 146:f64d43ff0c18 | 109 | |
mbed_official | 146:f64d43ff0c18 | 110 | static void lptmr_set(unsigned short count) { |
mbed_official | 146:f64d43ff0c18 | 111 | HW_LPTMR_CSR_WR(0); |
mbed_official | 146:f64d43ff0c18 | 112 | BW_LPTMR_CMR_COMPARE(count); |
mbed_official | 146:f64d43ff0c18 | 113 | BW_LPTMR_CSR_TIE(1); |
mbed_official | 146:f64d43ff0c18 | 114 | BW_LPTMR_CSR_TEN(1); |
mbed_official | 146:f64d43ff0c18 | 115 | } |
mbed_official | 146:f64d43ff0c18 | 116 | |
mbed_official | 146:f64d43ff0c18 | 117 | static void lptmr_isr(void) { |
mbed_official | 146:f64d43ff0c18 | 118 | // write 1 to TCF to clear the LPT timer compare flag |
mbed_official | 146:f64d43ff0c18 | 119 | BW_LPTMR_CSR_TCF(1); |
mbed_official | 146:f64d43ff0c18 | 120 | |
mbed_official | 146:f64d43ff0c18 | 121 | if (us_ticker_int_counter > 0) { |
mbed_official | 146:f64d43ff0c18 | 122 | lptmr_set(0xFFFF); |
mbed_official | 146:f64d43ff0c18 | 123 | us_ticker_int_counter--; |
mbed_official | 146:f64d43ff0c18 | 124 | } else { |
mbed_official | 146:f64d43ff0c18 | 125 | if (us_ticker_int_remainder > 0) { |
mbed_official | 146:f64d43ff0c18 | 126 | lptmr_set(us_ticker_int_remainder); |
mbed_official | 146:f64d43ff0c18 | 127 | us_ticker_int_remainder = 0; |
mbed_official | 146:f64d43ff0c18 | 128 | } else { |
mbed_official | 146:f64d43ff0c18 | 129 | // This function is going to disable the interrupts if there are |
mbed_official | 146:f64d43ff0c18 | 130 | // no other events in the queue |
mbed_official | 146:f64d43ff0c18 | 131 | us_ticker_irq_handler(); |
mbed_official | 146:f64d43ff0c18 | 132 | } |
mbed_official | 146:f64d43ff0c18 | 133 | } |
mbed_official | 146:f64d43ff0c18 | 134 | } |
mbed_official | 146:f64d43ff0c18 | 135 | |
mbed_official | 146:f64d43ff0c18 | 136 | void us_ticker_set_interrupt(unsigned int timestamp) { |
mbed_official | 146:f64d43ff0c18 | 137 | int delta = (int)(timestamp - us_ticker_read()); |
mbed_official | 146:f64d43ff0c18 | 138 | if (delta <= 0) { |
mbed_official | 146:f64d43ff0c18 | 139 | // This event was in the past: |
mbed_official | 146:f64d43ff0c18 | 140 | us_ticker_irq_handler(); |
mbed_official | 146:f64d43ff0c18 | 141 | return; |
mbed_official | 146:f64d43ff0c18 | 142 | } |
mbed_official | 146:f64d43ff0c18 | 143 | |
mbed_official | 146:f64d43ff0c18 | 144 | us_ticker_int_counter = (uint32_t)(delta >> 16); |
mbed_official | 146:f64d43ff0c18 | 145 | us_ticker_int_remainder = (uint16_t)(0xFFFF & delta); |
mbed_official | 146:f64d43ff0c18 | 146 | if (us_ticker_int_counter > 0) { |
mbed_official | 146:f64d43ff0c18 | 147 | lptmr_set(0xFFFF); |
mbed_official | 146:f64d43ff0c18 | 148 | us_ticker_int_counter--; |
mbed_official | 146:f64d43ff0c18 | 149 | } else { |
mbed_official | 146:f64d43ff0c18 | 150 | lptmr_set(us_ticker_int_remainder); |
mbed_official | 146:f64d43ff0c18 | 151 | us_ticker_int_remainder = 0; |
mbed_official | 146:f64d43ff0c18 | 152 | } |
mbed_official | 146:f64d43ff0c18 | 153 | } |