shao ziyang / mbed-src-kl05

mbed library sources

Dependents:   frdm_kl05z_gpio_test

Fork of mbed-src by mbed official

targets/hal/TARGET_NXP/TARGET_LPC23XX/gpio_api.c@13:0645d8841f51, 2013-08-05 (annotated)

Committer:
bogdanm
Date:
Mon Aug 05 14:12:34 2013 +0300
Revision:
13:0645d8841f51
Parent:
vendor/NXP/LPC2368/hal/gpio_api.c@10:3bc89ef62ce7
Child:
113:65a335a675de
Update mbed sources to revision 64

Who changed what in which revision?

UserRevisionLine numberNew contents of line
emilmont 10:3bc89ef62ce7 1 /* mbed Microcontroller Library
emilmont 10:3bc89ef62ce7 2 * Copyright (c) 2006-2013 ARM Limited
emilmont 10:3bc89ef62ce7 3 *
emilmont 10:3bc89ef62ce7 4 * Licensed under the Apache License, Version 2.0 (the "License");
emilmont 10:3bc89ef62ce7 5 * you may not use this file except in compliance with the License.
emilmont 10:3bc89ef62ce7 6 * You may obtain a copy of the License at
emilmont 10:3bc89ef62ce7 7 *
emilmont 10:3bc89ef62ce7 8 * http://www.apache.org/licenses/LICENSE-2.0
emilmont 10:3bc89ef62ce7 9 *
emilmont 10:3bc89ef62ce7 10 * Unless required by applicable law or agreed to in writing, software
emilmont 10:3bc89ef62ce7 11 * distributed under the License is distributed on an "AS IS" BASIS,
emilmont 10:3bc89ef62ce7 12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
emilmont 10:3bc89ef62ce7 13 * See the License for the specific language governing permissions and
emilmont 10:3bc89ef62ce7 14 * limitations under the License.
emilmont 10:3bc89ef62ce7 15 */
emilmont 10:3bc89ef62ce7 16 #include "gpio_api.h"
emilmont 10:3bc89ef62ce7 17 #include "pinmap.h"
emilmont 10:3bc89ef62ce7 18
emilmont 10:3bc89ef62ce7 19 uint32_t gpio_set(PinName pin) {
emilmont 10:3bc89ef62ce7 20 LPC_SC->SCS |= 1; // High speed GPIO is enabled on ports 0 and 1
emilmont 10:3bc89ef62ce7 21
emilmont 10:3bc89ef62ce7 22 pin_function(pin, 0);
emilmont 10:3bc89ef62ce7 23
emilmont 10:3bc89ef62ce7 24 return (1 << ((int)pin & 0x1F));
emilmont 10:3bc89ef62ce7 25 }
emilmont 10:3bc89ef62ce7 26
emilmont 10:3bc89ef62ce7 27 void gpio_init(gpio_t *obj, PinName pin, PinDirection direction) {
emilmont 10:3bc89ef62ce7 28 if (pin == NC) return;
emilmont 10:3bc89ef62ce7 29
emilmont 10:3bc89ef62ce7 30 obj->pin = pin;
emilmont 10:3bc89ef62ce7 31 obj->mask = gpio_set(pin);
emilmont 10:3bc89ef62ce7 32
emilmont 10:3bc89ef62ce7 33 LPC_GPIO_TypeDef *port_reg = (LPC_GPIO_TypeDef *) ((int)pin & ~0x1F);
emilmont 10:3bc89ef62ce7 34
emilmont 10:3bc89ef62ce7 35 obj->reg_set = &port_reg->FIOSET;
emilmont 10:3bc89ef62ce7 36 obj->reg_clr = &port_reg->FIOCLR;
emilmont 10:3bc89ef62ce7 37 obj->reg_in = &port_reg->FIOPIN;
emilmont 10:3bc89ef62ce7 38 obj->reg_dir = &port_reg->FIODIR;
emilmont 10:3bc89ef62ce7 39
emilmont 10:3bc89ef62ce7 40 gpio_dir(obj, direction);
emilmont 10:3bc89ef62ce7 41 switch (direction) {
emilmont 10:3bc89ef62ce7 42 case PIN_OUTPUT: pin_mode(pin, PullNone); break;
emilmont 10:3bc89ef62ce7 43 case PIN_INPUT : pin_mode(pin, PullDown); break;
emilmont 10:3bc89ef62ce7 44 }
emilmont 10:3bc89ef62ce7 45 }
emilmont 10:3bc89ef62ce7 46
emilmont 10:3bc89ef62ce7 47 void gpio_mode(gpio_t *obj, PinMode mode) {
emilmont 10:3bc89ef62ce7 48 pin_mode(obj->pin, mode);
emilmont 10:3bc89ef62ce7 49 }
emilmont 10:3bc89ef62ce7 50
emilmont 10:3bc89ef62ce7 51 void gpio_dir(gpio_t *obj, PinDirection direction) {
emilmont 10:3bc89ef62ce7 52 switch (direction) {
emilmont 10:3bc89ef62ce7 53 case PIN_INPUT : *obj->reg_dir &= ~obj->mask; break;
emilmont 10:3bc89ef62ce7 54 case PIN_OUTPUT: *obj->reg_dir |= obj->mask; break;
emilmont 10:3bc89ef62ce7 55 }
emilmont 10:3bc89ef62ce7 56 }