shao ziyang / mbed-dev

mbed library sources. Supersedes mbed-src. Add PORTG support for STM32L476JG (SensorTile kit)

Dependents:   SensorTileTest

Fork of mbed-dev by mbed official

targets/TARGET_NXP/TARGET_LPC13XX/serial_api.c@154:1375a99fb16d, 2017-01-02 (annotated)

Committer:
shaoziyang
Date:
Mon Jan 02 15:52:04 2017 +0000
Revision:
154:1375a99fb16d
Parent:
149:156823d33999 
Mbed for ST SensorTile kit, fixed GPIOG bug, add PORTG support.

Who changed what in which revision?

UserRevisionLine numberNew contents of line
<> 144:ef7eb2e8f9f7 1 /* mbed Microcontroller Library
<> 144:ef7eb2e8f9f7 2 * Copyright (c) 2006-2013 ARM Limited
<> 144:ef7eb2e8f9f7 3 *
<> 144:ef7eb2e8f9f7 4 * Licensed under the Apache License, Version 2.0 (the "License");
<> 144:ef7eb2e8f9f7 5 * you may not use this file except in compliance with the License.
<> 144:ef7eb2e8f9f7 6 * You may obtain a copy of the License at
<> 144:ef7eb2e8f9f7 7 *
<> 144:ef7eb2e8f9f7 8 * http://www.apache.org/licenses/LICENSE-2.0
<> 144:ef7eb2e8f9f7 9 *
<> 144:ef7eb2e8f9f7 10 * Unless required by applicable law or agreed to in writing, software
<> 144:ef7eb2e8f9f7 11 * distributed under the License is distributed on an "AS IS" BASIS,
<> 144:ef7eb2e8f9f7 12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
<> 144:ef7eb2e8f9f7 13 * See the License for the specific language governing permissions and
<> 144:ef7eb2e8f9f7 14 * limitations under the License.
<> 144:ef7eb2e8f9f7 15 */
<> 144:ef7eb2e8f9f7 16 // math.h required for floating point operations for baud rate calculation
<> 144:ef7eb2e8f9f7 17 #include "mbed_assert.h"
<> 144:ef7eb2e8f9f7 18 #include <math.h>
<> 144:ef7eb2e8f9f7 19 #include <string.h>
<> 144:ef7eb2e8f9f7 20 #include <stdlib.h>
<> 144:ef7eb2e8f9f7 21
<> 144:ef7eb2e8f9f7 22 #include "serial_api.h"
<> 144:ef7eb2e8f9f7 23 #include "cmsis.h"
<> 144:ef7eb2e8f9f7 24 #include "pinmap.h"
<> 144:ef7eb2e8f9f7 25
<> 144:ef7eb2e8f9f7 26 /******************************************************************************
<> 144:ef7eb2e8f9f7 27 * INITIALIZATION
<> 144:ef7eb2e8f9f7 28 ******************************************************************************/
<> 144:ef7eb2e8f9f7 29 #define UART_NUM 1
<> 144:ef7eb2e8f9f7 30
<> 144:ef7eb2e8f9f7 31 static const PinMap PinMap_UART_TX[] = {
<> 144:ef7eb2e8f9f7 32 {P0_19, UART_0, 1},
<> 144:ef7eb2e8f9f7 33 {P1_13, UART_0, 3},
<> 144:ef7eb2e8f9f7 34 {P1_27, UART_0, 2},
<> 144:ef7eb2e8f9f7 35 { NC , NC , 0}
<> 144:ef7eb2e8f9f7 36 };
<> 144:ef7eb2e8f9f7 37
<> 144:ef7eb2e8f9f7 38 static const PinMap PinMap_UART_RX[] = {
<> 144:ef7eb2e8f9f7 39 {P0_18, UART_0, 1},
<> 144:ef7eb2e8f9f7 40 {P1_14, UART_0, 3},
<> 144:ef7eb2e8f9f7 41 {P1_26, UART_0, 2},
<> 144:ef7eb2e8f9f7 42 {NC , NC , 0}
<> 144:ef7eb2e8f9f7 43 };
<> 144:ef7eb2e8f9f7 44
<> 144:ef7eb2e8f9f7 45 static uint32_t serial_irq_ids[UART_NUM] = {0};
<> 144:ef7eb2e8f9f7 46 static uart_irq_handler irq_handler;
<> 144:ef7eb2e8f9f7 47
<> 144:ef7eb2e8f9f7 48 int stdio_uart_inited = 0;
<> 144:ef7eb2e8f9f7 49 serial_t stdio_uart;
<> 144:ef7eb2e8f9f7 50
<> 144:ef7eb2e8f9f7 51 void serial_init(serial_t *obj, PinName tx, PinName rx) {
<> 144:ef7eb2e8f9f7 52 int is_stdio_uart = 0;
<> 144:ef7eb2e8f9f7 53
<> 144:ef7eb2e8f9f7 54 // determine the UART to use
<> 144:ef7eb2e8f9f7 55 UARTName uart_tx = (UARTName)pinmap_peripheral(tx, PinMap_UART_TX);
<> 144:ef7eb2e8f9f7 56 UARTName uart_rx = (UARTName)pinmap_peripheral(rx, PinMap_UART_RX);
<> 144:ef7eb2e8f9f7 57 UARTName uart = (UARTName)pinmap_merge(uart_tx, uart_rx);
<> 144:ef7eb2e8f9f7 58 MBED_ASSERT((int)uart != NC);
<> 144:ef7eb2e8f9f7 59
<> 144:ef7eb2e8f9f7 60 obj->uart = (LPC_USART_Type *)uart;
<> 144:ef7eb2e8f9f7 61 LPC_SYSCON->SYSAHBCLKCTRL |= (1<<12);
<> 144:ef7eb2e8f9f7 62
<> 144:ef7eb2e8f9f7 63 // [TODO] Consider more elegant approach
<> 144:ef7eb2e8f9f7 64 // disconnect USBTX/RX mapping mux, for case when switching ports
<> 144:ef7eb2e8f9f7 65 //pin_function(USBTX, 0);
<> 144:ef7eb2e8f9f7 66 //pin_function(USBRX, 0);
<> 144:ef7eb2e8f9f7 67
<> 144:ef7eb2e8f9f7 68 // enable fifos and default rx trigger level
<> 144:ef7eb2e8f9f7 69 obj->uart->FCR = 1 << 0 // FIFO Enable - 0 = Disables, 1 = Enabled
<> 144:ef7eb2e8f9f7 70 | 0 << 1 // Rx Fifo Reset
<> 144:ef7eb2e8f9f7 71 | 0 << 2 // Tx Fifo Reset
<> 144:ef7eb2e8f9f7 72 | 0 << 6; // Rx irq trigger level - 0 = 1 char, 1 = 4 chars, 2 = 8 chars, 3 = 14 chars
<> 144:ef7eb2e8f9f7 73
<> 144:ef7eb2e8f9f7 74 // disable irqs
<> 144:ef7eb2e8f9f7 75 obj->uart->IER = 0 << 0 // Rx Data available irq enable
<> 144:ef7eb2e8f9f7 76 | 0 << 1 // Tx Fifo empty irq enable
<> 144:ef7eb2e8f9f7 77 | 0 << 2; // Rx Line Status irq enable
<> 144:ef7eb2e8f9f7 78
<> 144:ef7eb2e8f9f7 79 // set default baud rate and format
<> 144:ef7eb2e8f9f7 80 serial_baud (obj, 9600);
<> 144:ef7eb2e8f9f7 81 serial_format(obj, 8, ParityNone, 1);
<> 144:ef7eb2e8f9f7 82
<> 144:ef7eb2e8f9f7 83 // pinout the chosen uart
<> 144:ef7eb2e8f9f7 84 pinmap_pinout(tx, PinMap_UART_TX);
<> 144:ef7eb2e8f9f7 85 pinmap_pinout(rx, PinMap_UART_RX);
<> 144:ef7eb2e8f9f7 86
<> 144:ef7eb2e8f9f7 87 // set rx/tx pins in PullUp mode
<> 144:ef7eb2e8f9f7 88 if (tx != NC) {
<> 144:ef7eb2e8f9f7 89 pin_mode(tx, PullUp);
<> 144:ef7eb2e8f9f7 90 }
<> 144:ef7eb2e8f9f7 91 if (rx != NC) {
<> 144:ef7eb2e8f9f7 92 pin_mode(rx, PullUp);
<> 144:ef7eb2e8f9f7 93 }
<> 144:ef7eb2e8f9f7 94
<> 144:ef7eb2e8f9f7 95 switch (uart) {
<> 144:ef7eb2e8f9f7 96 case UART_0: obj->index = 0; break;
<> 144:ef7eb2e8f9f7 97 }
<> 144:ef7eb2e8f9f7 98
<> 144:ef7eb2e8f9f7 99 is_stdio_uart = (uart == STDIO_UART) ? (1) : (0);
<> 144:ef7eb2e8f9f7 100
<> 144:ef7eb2e8f9f7 101 if (is_stdio_uart) {
<> 144:ef7eb2e8f9f7 102 stdio_uart_inited = 1;
<> 144:ef7eb2e8f9f7 103 memcpy(&stdio_uart, obj, sizeof(serial_t));
<> 144:ef7eb2e8f9f7 104 }
<> 144:ef7eb2e8f9f7 105 }
<> 144:ef7eb2e8f9f7 106
<> 144:ef7eb2e8f9f7 107 void serial_free(serial_t *obj) {
<> 144:ef7eb2e8f9f7 108 serial_irq_ids[obj->index] = 0;
<> 144:ef7eb2e8f9f7 109 }
<> 144:ef7eb2e8f9f7 110
<> 144:ef7eb2e8f9f7 111 // serial_baud
<> 144:ef7eb2e8f9f7 112 // set the baud rate, taking in to account the current SystemFrequency
<> 144:ef7eb2e8f9f7 113 void serial_baud(serial_t *obj, int baudrate) {
<> 144:ef7eb2e8f9f7 114 LPC_SYSCON->UARTCLKDIV = 0x1;
<> 144:ef7eb2e8f9f7 115 uint32_t PCLK = SystemCoreClock;
<> 144:ef7eb2e8f9f7 116 // First we check to see if the basic divide with no DivAddVal/MulVal
<> 144:ef7eb2e8f9f7 117 // ratio gives us an integer result. If it does, we set DivAddVal = 0,
<> 144:ef7eb2e8f9f7 118 // MulVal = 1. Otherwise, we search the valid ratio value range to find
<> 144:ef7eb2e8f9f7 119 // the closest match. This could be more elegant, using search methods
<> 144:ef7eb2e8f9f7 120 // and/or lookup tables, but the brute force method is not that much
<> 144:ef7eb2e8f9f7 121 // slower, and is more maintainable.
<> 144:ef7eb2e8f9f7 122 uint16_t DL = PCLK / (16 * baudrate);
<> 144:ef7eb2e8f9f7 123
<> 144:ef7eb2e8f9f7 124 uint8_t DivAddVal = 0;
<> 144:ef7eb2e8f9f7 125 uint8_t MulVal = 1;
<> 144:ef7eb2e8f9f7 126 int hit = 0;
<> 144:ef7eb2e8f9f7 127 uint16_t dlv;
<> 144:ef7eb2e8f9f7 128 uint8_t mv, dav;
<> 144:ef7eb2e8f9f7 129 if ((PCLK % (16 * baudrate)) != 0) { // Checking for zero remainder
<> 144:ef7eb2e8f9f7 130 int err_best = baudrate, b;
<> 144:ef7eb2e8f9f7 131 for (mv = 1; mv < 16 && !hit; mv++)
<> 144:ef7eb2e8f9f7 132 {
<> 144:ef7eb2e8f9f7 133 for (dav = 0; dav < mv; dav++)
<> 144:ef7eb2e8f9f7 134 {
<> 144:ef7eb2e8f9f7 135 // baudrate = PCLK / (16 * dlv * (1 + (DivAdd / Mul))
<> 144:ef7eb2e8f9f7 136 // solving for dlv, we get dlv = mul * PCLK / (16 * baudrate * (divadd + mul))
<> 144:ef7eb2e8f9f7 137 // mul has 4 bits, PCLK has 27 so we have 1 bit headroom which can be used for rounding
<> 144:ef7eb2e8f9f7 138 // for many values of mul and PCLK we have 2 or more bits of headroom which can be used to improve precision
<> 144:ef7eb2e8f9f7 139 // note: X / 32 doesn't round correctly. Instead, we use ((X / 16) + 1) / 2 for correct rounding
<> 144:ef7eb2e8f9f7 140
<> 144:ef7eb2e8f9f7 141 if ((mv * PCLK * 2) & 0x80000000) // 1 bit headroom
<> 144:ef7eb2e8f9f7 142 dlv = ((((2 * mv * PCLK) / (baudrate * (dav + mv))) / 16) + 1) / 2;
<> 144:ef7eb2e8f9f7 143 else // 2 bits headroom, use more precision
<> 144:ef7eb2e8f9f7 144 dlv = ((((4 * mv * PCLK) / (baudrate * (dav + mv))) / 32) + 1) / 2;
<> 144:ef7eb2e8f9f7 145
<> 144:ef7eb2e8f9f7 146 // datasheet says if DLL==DLM==0, then 1 is used instead since divide by zero is ungood
<> 144:ef7eb2e8f9f7 147 if (dlv == 0)
<> 144:ef7eb2e8f9f7 148 dlv = 1;
<> 144:ef7eb2e8f9f7 149
<> 144:ef7eb2e8f9f7 150 // datasheet says if dav > 0 then DL must be >= 2
<> 144:ef7eb2e8f9f7 151 if ((dav > 0) && (dlv < 2))
<> 144:ef7eb2e8f9f7 152 dlv = 2;
<> 144:ef7eb2e8f9f7 153
<> 144:ef7eb2e8f9f7 154 // integer rearrangement of the baudrate equation (with rounding)
<> 144:ef7eb2e8f9f7 155 b = ((PCLK * mv / (dlv * (dav + mv) * 8)) + 1) / 2;
<> 144:ef7eb2e8f9f7 156
<> 144:ef7eb2e8f9f7 157 // check to see how we went
<> 144:ef7eb2e8f9f7 158 b = abs(b - baudrate);
<> 144:ef7eb2e8f9f7 159 if (b < err_best)
<> 144:ef7eb2e8f9f7 160 {
<> 144:ef7eb2e8f9f7 161 err_best = b;
<> 144:ef7eb2e8f9f7 162
<> 144:ef7eb2e8f9f7 163 DL = dlv;
<> 144:ef7eb2e8f9f7 164 MulVal = mv;
<> 144:ef7eb2e8f9f7 165 DivAddVal = dav;
<> 144:ef7eb2e8f9f7 166
<> 144:ef7eb2e8f9f7 167 if (b == baudrate)
<> 144:ef7eb2e8f9f7 168 {
<> 144:ef7eb2e8f9f7 169 hit = 1;
<> 144:ef7eb2e8f9f7 170 break;
<> 144:ef7eb2e8f9f7 171 }
<> 144:ef7eb2e8f9f7 172 }
<> 144:ef7eb2e8f9f7 173 }
<> 144:ef7eb2e8f9f7 174 }
<> 144:ef7eb2e8f9f7 175 }
<> 144:ef7eb2e8f9f7 176
<> 144:ef7eb2e8f9f7 177 // set LCR[DLAB] to enable writing to divider registers
<> 144:ef7eb2e8f9f7 178 obj->uart->LCR |= (1 << 7);
<> 144:ef7eb2e8f9f7 179
<> 144:ef7eb2e8f9f7 180 // set divider values
<> 144:ef7eb2e8f9f7 181 obj->uart->DLM = (DL >> 8) & 0xFF;
<> 144:ef7eb2e8f9f7 182 obj->uart->DLL = (DL >> 0) & 0xFF;
<> 144:ef7eb2e8f9f7 183 obj->uart->FDR = (uint32_t) DivAddVal << 0
<> 144:ef7eb2e8f9f7 184 | (uint32_t) MulVal << 4;
<> 144:ef7eb2e8f9f7 185
<> 144:ef7eb2e8f9f7 186 // clear LCR[DLAB]
<> 144:ef7eb2e8f9f7 187 obj->uart->LCR &= ~(1 << 7);
<> 144:ef7eb2e8f9f7 188 }
<> 144:ef7eb2e8f9f7 189
<> 144:ef7eb2e8f9f7 190 void serial_format(serial_t *obj, int data_bits, SerialParity parity, int stop_bits) {
<> 144:ef7eb2e8f9f7 191 MBED_ASSERT((stop_bits == 1) || (stop_bits == 2)); // 0: 1 stop bits, 1: 2 stop bits
<> 144:ef7eb2e8f9f7 192 MBED_ASSERT((data_bits > 4) && (data_bits < 9)); // 0: 5 data bits ... 3: 8 data bits
<> 144:ef7eb2e8f9f7 193 MBED_ASSERT((parity == ParityNone) || (parity == ParityOdd) || (parity == ParityEven) ||
<> 144:ef7eb2e8f9f7 194 (parity == ParityForced1) || (parity == ParityForced0));
<> 144:ef7eb2e8f9f7 195
<> 144:ef7eb2e8f9f7 196 stop_bits -= 1;
<> 144:ef7eb2e8f9f7 197 data_bits -= 5;
<> 144:ef7eb2e8f9f7 198
<> 144:ef7eb2e8f9f7 199 int parity_enable, parity_select;
<> 144:ef7eb2e8f9f7 200 switch (parity) {
<> 144:ef7eb2e8f9f7 201 case ParityNone: parity_enable = 0; parity_select = 0; break;
<> 144:ef7eb2e8f9f7 202 case ParityOdd : parity_enable = 1; parity_select = 0; break;
<> 144:ef7eb2e8f9f7 203 case ParityEven: parity_enable = 1; parity_select = 1; break;
<> 144:ef7eb2e8f9f7 204 case ParityForced1: parity_enable = 1; parity_select = 2; break;
<> 144:ef7eb2e8f9f7 205 case ParityForced0: parity_enable = 1; parity_select = 3; break;
<> 144:ef7eb2e8f9f7 206 default:
<> 144:ef7eb2e8f9f7 207 break;
<> 144:ef7eb2e8f9f7 208 }
<> 144:ef7eb2e8f9f7 209
<> 144:ef7eb2e8f9f7 210 obj->uart->LCR = data_bits << 0
<> 144:ef7eb2e8f9f7 211 | stop_bits << 2
<> 144:ef7eb2e8f9f7 212 | parity_enable << 3
<> 144:ef7eb2e8f9f7 213 | parity_select << 4;
<> 144:ef7eb2e8f9f7 214 }
<> 144:ef7eb2e8f9f7 215
<> 144:ef7eb2e8f9f7 216 /******************************************************************************
<> 144:ef7eb2e8f9f7 217 * INTERRUPTS HANDLING
<> 144:ef7eb2e8f9f7 218 ******************************************************************************/
<> 144:ef7eb2e8f9f7 219 static inline void uart_irq(uint32_t iir, uint32_t index) {
<> 144:ef7eb2e8f9f7 220 // [Chapter 14] LPC17xx UART0/2/3: UARTn Interrupt Handling
<> 144:ef7eb2e8f9f7 221 SerialIrq irq_type;
<> 144:ef7eb2e8f9f7 222 switch (iir) {
<> 144:ef7eb2e8f9f7 223 case 1: irq_type = TxIrq; break;
<> 144:ef7eb2e8f9f7 224 case 2: irq_type = RxIrq; break;
<> 144:ef7eb2e8f9f7 225 default: return;
<> 144:ef7eb2e8f9f7 226 }
<> 144:ef7eb2e8f9f7 227
<> 144:ef7eb2e8f9f7 228 if (serial_irq_ids[index] != 0)
<> 144:ef7eb2e8f9f7 229 irq_handler(serial_irq_ids[index], irq_type);
<> 144:ef7eb2e8f9f7 230 }
<> 144:ef7eb2e8f9f7 231
<> 144:ef7eb2e8f9f7 232 void uart0_irq() {uart_irq((LPC_USART->IIR >> 1) & 0x7, 0);}
<> 144:ef7eb2e8f9f7 233
<> 144:ef7eb2e8f9f7 234 void serial_irq_handler(serial_t *obj, uart_irq_handler handler, uint32_t id) {
<> 144:ef7eb2e8f9f7 235 irq_handler = handler;
<> 144:ef7eb2e8f9f7 236 serial_irq_ids[obj->index] = id;
<> 144:ef7eb2e8f9f7 237 }
<> 144:ef7eb2e8f9f7 238
<> 144:ef7eb2e8f9f7 239 void serial_irq_set(serial_t *obj, SerialIrq irq, uint32_t enable) {
<> 144:ef7eb2e8f9f7 240 IRQn_Type irq_n = (IRQn_Type)0;
<> 144:ef7eb2e8f9f7 241 uint32_t vector = 0;
<> 144:ef7eb2e8f9f7 242 switch ((int)obj->uart) {
<> 144:ef7eb2e8f9f7 243 case UART_0: irq_n=USART_IRQn ; vector = (uint32_t)&uart0_irq; break;
<> 144:ef7eb2e8f9f7 244 }
<> 144:ef7eb2e8f9f7 245
<> 144:ef7eb2e8f9f7 246 if (enable) {
<> 144:ef7eb2e8f9f7 247 obj->uart->IER |= 1 << irq;
<> 144:ef7eb2e8f9f7 248 NVIC_SetVector(irq_n, vector);
<> 144:ef7eb2e8f9f7 249 NVIC_EnableIRQ(irq_n);
<> 144:ef7eb2e8f9f7 250 } else { // disable
<> 144:ef7eb2e8f9f7 251 int all_disabled = 0;
<> 144:ef7eb2e8f9f7 252 SerialIrq other_irq = (irq == RxIrq) ? (TxIrq) : (RxIrq);
<> 144:ef7eb2e8f9f7 253
<> 144:ef7eb2e8f9f7 254 obj->uart->IER &= ~(1 << irq);
<> 144:ef7eb2e8f9f7 255 all_disabled = (obj->uart->IER & (1 << other_irq)) == 0;
<> 144:ef7eb2e8f9f7 256
<> 144:ef7eb2e8f9f7 257 if (all_disabled)
<> 144:ef7eb2e8f9f7 258 NVIC_DisableIRQ(irq_n);
<> 144:ef7eb2e8f9f7 259 }
<> 144:ef7eb2e8f9f7 260 }
<> 144:ef7eb2e8f9f7 261
<> 144:ef7eb2e8f9f7 262 /******************************************************************************
<> 144:ef7eb2e8f9f7 263 * READ/WRITE
<> 144:ef7eb2e8f9f7 264 ******************************************************************************/
<> 144:ef7eb2e8f9f7 265 int serial_getc(serial_t *obj) {
<> 144:ef7eb2e8f9f7 266 while (!serial_readable(obj));
<> 144:ef7eb2e8f9f7 267 return obj->uart->RBR;
<> 144:ef7eb2e8f9f7 268 }
<> 144:ef7eb2e8f9f7 269
<> 144:ef7eb2e8f9f7 270 void serial_putc(serial_t *obj, int c) {
<> 144:ef7eb2e8f9f7 271 while (!serial_writable(obj));
<> 144:ef7eb2e8f9f7 272 obj->uart->THR = c;
<> 144:ef7eb2e8f9f7 273 }
<> 144:ef7eb2e8f9f7 274
<> 144:ef7eb2e8f9f7 275 int serial_readable(serial_t *obj) {
<> 144:ef7eb2e8f9f7 276 return obj->uart->LSR & 0x01;
<> 144:ef7eb2e8f9f7 277 }
<> 144:ef7eb2e8f9f7 278
<> 144:ef7eb2e8f9f7 279 int serial_writable(serial_t *obj) {
<> 144:ef7eb2e8f9f7 280 return obj->uart->LSR & 0x20;
<> 144:ef7eb2e8f9f7 281 }
<> 144:ef7eb2e8f9f7 282
<> 144:ef7eb2e8f9f7 283 void serial_clear(serial_t *obj) {
<> 144:ef7eb2e8f9f7 284 obj->uart->FCR = 1 << 1 // rx FIFO reset
<> 144:ef7eb2e8f9f7 285 | 1 << 2 // tx FIFO reset
<> 144:ef7eb2e8f9f7 286 | 0 << 6; // interrupt depth
<> 144:ef7eb2e8f9f7 287 }
<> 144:ef7eb2e8f9f7 288
<> 144:ef7eb2e8f9f7 289 void serial_pinout_tx(PinName tx) {
<> 144:ef7eb2e8f9f7 290 pinmap_pinout(tx, PinMap_UART_TX);
<> 144:ef7eb2e8f9f7 291 }
<> 144:ef7eb2e8f9f7 292
<> 144:ef7eb2e8f9f7 293 void serial_break_set(serial_t *obj) {
<> 144:ef7eb2e8f9f7 294 obj->uart->LCR |= (1 << 6);
<> 144:ef7eb2e8f9f7 295 }
<> 144:ef7eb2e8f9f7 296
<> 144:ef7eb2e8f9f7 297 void serial_break_clear(serial_t *obj) {
<> 144:ef7eb2e8f9f7 298 obj->uart->LCR &= ~(1 << 6);
<> 144:ef7eb2e8f9f7 299 }
<> 144:ef7eb2e8f9f7 300