mbed library sources. Supersedes mbed-src. Add PORTG support for STM32L476JG (SensorTile kit)
Fork of mbed-dev by
targets/hal/TARGET_STM/TARGET_STM32L1/sleep.c@0:9b334a45a8ff, 2015-10-01 (annotated)
- Committer:
- bogdanm
- Date:
- Thu Oct 01 15:25:22 2015 +0300
- Revision:
- 0:9b334a45a8ff
- Child:
- 144:ef7eb2e8f9f7
Initial commit on mbed-dev
Replaces mbed-src (now inactive)
Who changed what in which revision?
User | Revision | Line number | New contents of line |
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bogdanm | 0:9b334a45a8ff | 1 | /* mbed Microcontroller Library |
bogdanm | 0:9b334a45a8ff | 2 | ******************************************************************************* |
bogdanm | 0:9b334a45a8ff | 3 | * Copyright (c) 2014, STMicroelectronics |
bogdanm | 0:9b334a45a8ff | 4 | * All rights reserved. |
bogdanm | 0:9b334a45a8ff | 5 | * |
bogdanm | 0:9b334a45a8ff | 6 | * Redistribution and use in source and binary forms, with or without |
bogdanm | 0:9b334a45a8ff | 7 | * modification, are permitted provided that the following conditions are met: |
bogdanm | 0:9b334a45a8ff | 8 | * |
bogdanm | 0:9b334a45a8ff | 9 | * 1. Redistributions of source code must retain the above copyright notice, |
bogdanm | 0:9b334a45a8ff | 10 | * this list of conditions and the following disclaimer. |
bogdanm | 0:9b334a45a8ff | 11 | * 2. Redistributions in binary form must reproduce the above copyright notice, |
bogdanm | 0:9b334a45a8ff | 12 | * this list of conditions and the following disclaimer in the documentation |
bogdanm | 0:9b334a45a8ff | 13 | * and/or other materials provided with the distribution. |
bogdanm | 0:9b334a45a8ff | 14 | * 3. Neither the name of STMicroelectronics nor the names of its contributors |
bogdanm | 0:9b334a45a8ff | 15 | * may be used to endorse or promote products derived from this software |
bogdanm | 0:9b334a45a8ff | 16 | * without specific prior written permission. |
bogdanm | 0:9b334a45a8ff | 17 | * |
bogdanm | 0:9b334a45a8ff | 18 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
bogdanm | 0:9b334a45a8ff | 19 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
bogdanm | 0:9b334a45a8ff | 20 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
bogdanm | 0:9b334a45a8ff | 21 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE |
bogdanm | 0:9b334a45a8ff | 22 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
bogdanm | 0:9b334a45a8ff | 23 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR |
bogdanm | 0:9b334a45a8ff | 24 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
bogdanm | 0:9b334a45a8ff | 25 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, |
bogdanm | 0:9b334a45a8ff | 26 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
bogdanm | 0:9b334a45a8ff | 27 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
bogdanm | 0:9b334a45a8ff | 28 | ******************************************************************************* |
bogdanm | 0:9b334a45a8ff | 29 | */ |
bogdanm | 0:9b334a45a8ff | 30 | #include "sleep_api.h" |
bogdanm | 0:9b334a45a8ff | 31 | |
bogdanm | 0:9b334a45a8ff | 32 | #if DEVICE_SLEEP |
bogdanm | 0:9b334a45a8ff | 33 | |
bogdanm | 0:9b334a45a8ff | 34 | #include "cmsis.h" |
bogdanm | 0:9b334a45a8ff | 35 | |
bogdanm | 0:9b334a45a8ff | 36 | static TIM_HandleTypeDef TimMasterHandle; |
bogdanm | 0:9b334a45a8ff | 37 | |
bogdanm | 0:9b334a45a8ff | 38 | void sleep(void) |
bogdanm | 0:9b334a45a8ff | 39 | { |
bogdanm | 0:9b334a45a8ff | 40 | // Disable HAL tick interrupt |
bogdanm | 0:9b334a45a8ff | 41 | TimMasterHandle.Instance = TIM5; |
bogdanm | 0:9b334a45a8ff | 42 | __HAL_TIM_DISABLE_IT(&TimMasterHandle, TIM_IT_CC2); |
bogdanm | 0:9b334a45a8ff | 43 | |
bogdanm | 0:9b334a45a8ff | 44 | // Request to enter SLEEP mode |
bogdanm | 0:9b334a45a8ff | 45 | HAL_PWR_EnterSLEEPMode(PWR_MAINREGULATOR_ON, PWR_SLEEPENTRY_WFI); |
bogdanm | 0:9b334a45a8ff | 46 | |
bogdanm | 0:9b334a45a8ff | 47 | // Enable HAL tick interrupt |
bogdanm | 0:9b334a45a8ff | 48 | __HAL_TIM_ENABLE_IT(&TimMasterHandle, TIM_IT_CC2); |
bogdanm | 0:9b334a45a8ff | 49 | } |
bogdanm | 0:9b334a45a8ff | 50 | |
bogdanm | 0:9b334a45a8ff | 51 | void deepsleep(void) |
bogdanm | 0:9b334a45a8ff | 52 | { |
bogdanm | 0:9b334a45a8ff | 53 | #if defined(TARGET_MOTE_L152RC) |
bogdanm | 0:9b334a45a8ff | 54 | int8_t STOPEntry = PWR_STOPENTRY_WFI; |
bogdanm | 0:9b334a45a8ff | 55 | #endif |
bogdanm | 0:9b334a45a8ff | 56 | |
bogdanm | 0:9b334a45a8ff | 57 | // Disable HAL tick interrupt |
bogdanm | 0:9b334a45a8ff | 58 | TimMasterHandle.Instance = TIM5; |
bogdanm | 0:9b334a45a8ff | 59 | __HAL_TIM_DISABLE_IT(&TimMasterHandle, TIM_IT_CC2); |
bogdanm | 0:9b334a45a8ff | 60 | |
bogdanm | 0:9b334a45a8ff | 61 | #if defined(TARGET_MOTE_L152RC) |
bogdanm | 0:9b334a45a8ff | 62 | /* Select the regulator state in Stop mode: Set PDDS and LPSDSR bit according to PWR_Regulator value */ |
bogdanm | 0:9b334a45a8ff | 63 | MODIFY_REG(PWR->CR, (PWR_CR_PDDS | PWR_CR_LPSDSR), PWR_LOWPOWERREGULATOR_ON); |
bogdanm | 0:9b334a45a8ff | 64 | |
bogdanm | 0:9b334a45a8ff | 65 | /* Set SLEEPDEEP bit of Cortex System Control Register */ |
bogdanm | 0:9b334a45a8ff | 66 | SET_BIT(SCB->SCR, ((uint32_t)SCB_SCR_SLEEPDEEP_Msk)); |
bogdanm | 0:9b334a45a8ff | 67 | |
bogdanm | 0:9b334a45a8ff | 68 | /* Select Stop mode entry --------------------------------------------------*/ |
bogdanm | 0:9b334a45a8ff | 69 | if(STOPEntry == PWR_STOPENTRY_WFI) |
bogdanm | 0:9b334a45a8ff | 70 | { |
bogdanm | 0:9b334a45a8ff | 71 | /* Request Wait For Interrupt */ |
bogdanm | 0:9b334a45a8ff | 72 | __WFI(); |
bogdanm | 0:9b334a45a8ff | 73 | } |
bogdanm | 0:9b334a45a8ff | 74 | else |
bogdanm | 0:9b334a45a8ff | 75 | { |
bogdanm | 0:9b334a45a8ff | 76 | /* Request Wait For Event */ |
bogdanm | 0:9b334a45a8ff | 77 | __SEV(); |
bogdanm | 0:9b334a45a8ff | 78 | __WFE(); |
bogdanm | 0:9b334a45a8ff | 79 | __WFE(); |
bogdanm | 0:9b334a45a8ff | 80 | } |
bogdanm | 0:9b334a45a8ff | 81 | __NOP(); |
bogdanm | 0:9b334a45a8ff | 82 | __NOP(); |
bogdanm | 0:9b334a45a8ff | 83 | __NOP(); |
bogdanm | 0:9b334a45a8ff | 84 | /* Reset SLEEPDEEP bit of Cortex System Control Register */ |
bogdanm | 0:9b334a45a8ff | 85 | CLEAR_BIT(SCB->SCR, ((uint32_t)SCB_SCR_SLEEPDEEP_Msk)); |
bogdanm | 0:9b334a45a8ff | 86 | #else |
bogdanm | 0:9b334a45a8ff | 87 | // Request to enter STOP mode with regulator in low power mode |
bogdanm | 0:9b334a45a8ff | 88 | HAL_PWR_EnterSTOPMode(PWR_LOWPOWERREGULATOR_ON, PWR_STOPENTRY_WFI); |
bogdanm | 0:9b334a45a8ff | 89 | #endif |
bogdanm | 0:9b334a45a8ff | 90 | |
bogdanm | 0:9b334a45a8ff | 91 | // After wake-up from STOP reconfigure the PLL |
bogdanm | 0:9b334a45a8ff | 92 | SetSysClock(); |
bogdanm | 0:9b334a45a8ff | 93 | |
bogdanm | 0:9b334a45a8ff | 94 | // Enable HAL tick interrupt |
bogdanm | 0:9b334a45a8ff | 95 | __HAL_TIM_ENABLE_IT(&TimMasterHandle, TIM_IT_CC2); |
bogdanm | 0:9b334a45a8ff | 96 | } |
bogdanm | 0:9b334a45a8ff | 97 | |
bogdanm | 0:9b334a45a8ff | 98 | #endif |