shao ziyang / mbed-dev

mbed library sources. Supersedes mbed-src. Add PORTG support for STM32L476JG (SensorTile kit)

Dependents:   SensorTileTest

Fork of mbed-dev by mbed official

targets/TARGET_ONSEMI/TARGET_NCS36510/pwm_map.h@149:156823d33999, 2016-10-28 (annotated)

Committer:
<>
Date:
Fri Oct 28 11:17:30 2016 +0100
Revision:
149:156823d33999
Child:
150:02e0a0aed4ec
This updates the lib to the mbed lib v128



NOTE: This release includes a restructuring of the file and directory locations and thus some

include paths in your code may need updating accordingly.

Who changed what in which revision?

UserRevisionLine numberNew contents of line
<> 149:156823d33999 1 /**
<> 149:156823d33999 2 ******************************************************************************
<> 149:156823d33999 3 * @file pwm_map.h
<> 149:156823d33999 4 * @brief PWM HW register map
<> 149:156823d33999 5 * @internal
<> 149:156823d33999 6 * @author ON Semiconductor
<> 149:156823d33999 7 * $Rev: 3378 $
<> 149:156823d33999 8 * $Date: 2015-04-28 13:38:36 +0530 (Tue, 28 Apr 2015) $
<> 149:156823d33999 9 ******************************************************************************
<> 149:156823d33999 10 * Copyright 2016 Semiconductor Components Industries LLC (d/b/a “ON Semiconductor”).
<> 149:156823d33999 11 * All rights reserved. This software and/or documentation is licensed by ON Semiconductor
<> 149:156823d33999 12 * under limited terms and conditions. The terms and conditions pertaining to the software
<> 149:156823d33999 13 * and/or documentation are available at http://www.onsemi.com/site/pdf/ONSEMI_T&C.pdf
<> 149:156823d33999 14 * (“ON Semiconductor Standard Terms and Conditions of Sale, Section 8 Software”) and
<> 149:156823d33999 15 * if applicable the software license agreement. Do not use this software and/or
<> 149:156823d33999 16 * documentation unless you have carefully read and you agree to the limited terms and
<> 149:156823d33999 17 * conditions. By using this software and/or documentation, you agree to the limited
<> 149:156823d33999 18 * terms and conditions.
<> 149:156823d33999 19 *
<> 149:156823d33999 20 * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
<> 149:156823d33999 21 * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
<> 149:156823d33999 22 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
<> 149:156823d33999 23 * ON SEMICONDUCTOR SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL,
<> 149:156823d33999 24 * INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
<> 149:156823d33999 25 * @endinternal
<> 149:156823d33999 26 *
<> 149:156823d33999 27 * @ingroup pwm
<> 149:156823d33999 28 *
<> 149:156823d33999 29 * @details
<> 149:156823d33999 30 * <p>
<> 149:156823d33999 31 * PWM HW register map description
<> 149:156823d33999 32 * </p>
<> 149:156823d33999 33 *
<> 149:156823d33999 34 * <h1> Reference document(s) </h1>
<> 149:156823d33999 35 * <p>
<> 149:156823d33999 36 * <a href="../../../../build/doc/pdf/IPC7205_PWM_APB_DS_v1P1.pdf" target="_blank">
<> 149:156823d33999 37 * IPC7205 APB PWM Design Specification v1.1 </a>
<> 149:156823d33999 38 * </p>
<> 149:156823d33999 39 */
<> 149:156823d33999 40
<> 149:156823d33999 41 #ifndef PWM_MAP_H_
<> 149:156823d33999 42 #define PWM_MAP_H_
<> 149:156823d33999 43
<> 149:156823d33999 44 #include "architecture.h"
<> 149:156823d33999 45
<> 149:156823d33999 46 /** Power management Control HW Structure Overlay */
<> 149:156823d33999 47 #ifdef REVB
<> 149:156823d33999 48 typedef struct {
<> 149:156823d33999 49 __IO uint32_t DUTYCYCLE;
<> 149:156823d33999 50 union {
<> 149:156823d33999 51 struct {
<> 149:156823d33999 52 __IO uint32_t ENABLED :1;/**< 1 = PWM enable , 0 = PWM disable */
<> 149:156823d33999 53 __I uint32_t CURRENT :1;/**< current state of PWM enable signal */
<> 149:156823d33999 54 __O uint32_t PAD1 :6; /**< Reserved. Writes have no effect; Read as 0x00. */
<> 149:156823d33999 55 __O uint32_t RDPWMEN :1;/**< current state of pwmEnable configuration */
<> 149:156823d33999 56 __O uint32_t RDPWMOP :1;/**< current state of PWM out signal */
<> 149:156823d33999 57 __O uint32_t PAD2 :6; /**< Reserved. Writes have no effect; Read as 0x00. */
<> 149:156823d33999 58 } BITS;
<> 149:156823d33999 59 __I uint32_t WORD;
<> 149:156823d33999 60 } PWMOUT;
<> 149:156823d33999 61 __O uint32_t DISABLE;
<> 149:156823d33999 62 union {
<> 149:156823d33999 63 struct {
<> 149:156823d33999 64 __IO uint32_t ENABLED :1;
<> 149:156823d33999 65 __O uint32_t PAD1 :7; /**< Reserved. Writes have no effect */
<> 149:156823d33999 66 __O uint32_t STATE :1; /**< current state of prescaler enable configuration. */
<> 149:156823d33999 67 __O uint32_t PAD2 :7; /**< Reserved. Writes have no effect; Read as 0x00. */
<> 149:156823d33999 68 } BITS;
<> 149:156823d33999 69 __I uint32_t WORD;
<> 149:156823d33999 70 } PRESCALE_EN;
<> 149:156823d33999 71
<> 149:156823d33999 72 __O uint32_t PRESCALE_DIS;
<> 149:156823d33999 73
<> 149:156823d33999 74 } PwmReg_t, *PwmReg_pt;
<> 149:156823d33999 75 #endif /* REVB */
<> 149:156823d33999 76
<> 149:156823d33999 77 #ifdef REVD
<> 149:156823d33999 78 typedef struct {
<> 149:156823d33999 79 __IO uint32_t DUTYCYCLE;
<> 149:156823d33999 80 union {
<> 149:156823d33999 81 struct {
<> 149:156823d33999 82 __O uint32_t ENABLE :8; /**< Write any value to enable PWM output */
<> 149:156823d33999 83 __I uint32_t PAD :1; /** < Pad */
<> 149:156823d33999 84 __I uint32_t ENABLE_STATE :1; /**< Current state of pwmEnable configuration bit. ‘1’ PWM output is enabled. ‘0’ PWN output is disabled. */
<> 149:156823d33999 85 __I uint32_t OUTPUT_STATE :1; /**< Current state of PWM output */
<> 149:156823d33999 86 } BITS;
<> 149:156823d33999 87 __IO uint32_t WORD;
<> 149:156823d33999 88 } PWM_ENABLE;
<> 149:156823d33999 89 __O uint32_t PWM_DISABLE;
<> 149:156823d33999 90 union {
<> 149:156823d33999 91 struct {
<> 149:156823d33999 92 __O uint32_t ENABLE :8; /**< Write any value to select enable the 4-bit prescaler */
<> 149:156823d33999 93 __I uint32_t STATE:1; /**< Current state of the prescaler. ‘1’ the prescaler is enabled. ‘0’ the prescaler is disabled. */
<> 149:156823d33999 94 } BITS;
<> 149:156823d33999 95 __IO uint32_t WORD;
<> 149:156823d33999 96 } PRESCALE_ENABLE;
<> 149:156823d33999 97 __O uint32_t PRESCALE_DISABLE;
<> 149:156823d33999 98 } PwmReg_t, *PwmReg_pt;
<> 149:156823d33999 99 #endif /* REVD */
<> 149:156823d33999 100 #endif /* PWM_MAP_H_ */