shao ziyang / mbed-dev

mbed library sources. Supersedes mbed-src. Add PORTG support for STM32L476JG (SensorTile kit)

Dependents:   SensorTileTest

Fork of mbed-dev by mbed official

targets/TARGET_ONSEMI/TARGET_NCS36510/random_map.h@154:1375a99fb16d, 2017-01-02 (annotated)

Committer:
shaoziyang
Date:
Mon Jan 02 15:52:04 2017 +0000
Revision:
154:1375a99fb16d
Parent:
150:02e0a0aed4ec 
Mbed for ST SensorTile kit, fixed GPIOG bug, add PORTG support.

Who changed what in which revision?

UserRevisionLine numberNew contents of line
<> 149:156823d33999 1 /**
<> 149:156823d33999 2 ******************************************************************************
<> 149:156823d33999 3 * @file random_map.h
<> 149:156823d33999 4 * @brief Randomizer hw module register map
<> 149:156823d33999 5 * @internal
<> 149:156823d33999 6 * @author ON Semiconductor
<> 149:156823d33999 7 * $Rev: 3283 $
<> 149:156823d33999 8 * $Date: 2015-02-26 18:52:22 +0530 (Thu, 26 Feb 2015) $
<> 149:156823d33999 9 ******************************************************************************
<> 149:156823d33999 10 * Copyright 2016 Semiconductor Components Industries LLC (d/b/a “ON Semiconductor”).
<> 149:156823d33999 11 * All rights reserved. This software and/or documentation is licensed by ON Semiconductor
<> 149:156823d33999 12 * under limited terms and conditions. The terms and conditions pertaining to the software
<> 149:156823d33999 13 * and/or documentation are available at http://www.onsemi.com/site/pdf/ONSEMI_T&C.pdf
<> 149:156823d33999 14 * (“ON Semiconductor Standard Terms and Conditions of Sale, Section 8 Software”) and
<> 149:156823d33999 15 * if applicable the software license agreement. Do not use this software and/or
<> 149:156823d33999 16 * documentation unless you have carefully read and you agree to the limited terms and
<> 149:156823d33999 17 * conditions. By using this software and/or documentation, you agree to the limited
<> 149:156823d33999 18 * terms and conditions.
<> 149:156823d33999 19 *
<> 149:156823d33999 20 * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
<> 149:156823d33999 21 * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
<> 149:156823d33999 22 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
<> 149:156823d33999 23 * ON SEMICONDUCTOR SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL,
<> 149:156823d33999 24 * INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
<> 149:156823d33999 25 * @endinternal
<> 149:156823d33999 26 *
<> 149:156823d33999 27 * @ingroup random
<> 149:156823d33999 28 *
<> 149:156823d33999 29 * @details
<> 149:156823d33999 30 */
<> 149:156823d33999 31
<> 149:156823d33999 32 #ifndef RANDOM_MAP_H_
<> 149:156823d33999 33 #define RANDOM_MAP_H_
<> 149:156823d33999 34
<> 149:156823d33999 35 /*************************************************************************************************
<> 149:156823d33999 36 * *
<> 149:156823d33999 37 * Header files *
<> 149:156823d33999 38 * *
<> 149:156823d33999 39 *************************************************************************************************/
<> 149:156823d33999 40
<> 149:156823d33999 41 #include "architecture.h"
<> 149:156823d33999 42
<> 149:156823d33999 43 /**************************************************************************************************
<> 149:156823d33999 44 * *
<> 149:156823d33999 45 * Type definitions *
<> 149:156823d33999 46 * *
<> 149:156823d33999 47 **************************************************************************************************/
<> 149:156823d33999 48
<> 149:156823d33999 49 /** Random Number Generator Control HW Structure Overlay */
<> 149:156823d33999 50 typedef struct {
<> 149:156823d33999 51 __IO uint32_t WR_SEED_RD_RAND; /* Seed set & random read reg - 0x40011000 */
<> 149:156823d33999 52 union {
<> 149:156823d33999 53 struct {
<> 149:156823d33999 54 __IO uint32_t MODE :1; /**<Mode Register, 0 – LSFR is updated on every rising edge of PCLK, 1 – LSFR is only updated on a read event of the LSFR register */
<> 149:156823d33999 55 __IO uint32_t BYTE_SWAP :1; /**<Byte Swap Control, 0 – 32-bit byte swap, 1 – 64-bit byte swap */
<> 149:156823d33999 56 __IO uint32_t MEATSTABLE_SPEED :1; /**<Meta-stable Latch TRNG Speed Control, 0 – Slow mode, 1 – Fast mode */
<> 149:156823d33999 57 __IO uint32_t WHITENOISE_EN :1; /**<White Noise TRNG Enable, 0 – Disabled, 1 – Enabled */
<> 149:156823d33999 58 __IO uint32_t METASTABLE_LATCH_EN :1; /**<Meta-stable Latch TRNG Enable, 0 – Disabled, 1 – Enabled */
<> 149:156823d33999 59 __IO uint32_t JIC :1; /**<JIC */
<> 149:156823d33999 60 } BITS;
<> 149:156823d33999 61 __IO uint32_t WORD;
<> 149:156823d33999 62 } CONTROL; /* Control register - 0x40011004 */
<> 149:156823d33999 63 union {
<> 149:156823d33999 64 struct {
<> 149:156823d33999 65 __IO uint32_t BYTE_0 :8; /**<Byte #0*/
<> 149:156823d33999 66 __IO uint32_t BYTE_1 :8; /**<Byte #1*/
<> 149:156823d33999 67 __IO uint32_t BYTE_2 :8; /**<Byte #2*/
<> 149:156823d33999 68 __IO uint32_t BYTE_3 :8; /**<Byte #3*/
<> 149:156823d33999 69 } BITS;
<> 149:156823d33999 70 __IO uint32_t WORD;
<> 149:156823d33999 71 } WRITE_BUF_LSW; /* Byte swap write buffer – Least significant word - 0x40011008 */
<> 149:156823d33999 72 union {
<> 149:156823d33999 73 struct {
<> 149:156823d33999 74 __IO uint32_t BYTE_4 :8; /**<Byte #4*/
<> 149:156823d33999 75 __IO uint32_t BYTE_5 :8; /**<Byte #5*/
<> 149:156823d33999 76 __IO uint32_t BYTE_6 :8; /**<Byte #6*/
<> 149:156823d33999 77 __IO uint32_t BYTE_7 :8; /**<Byte #7*/
<> 149:156823d33999 78 } BITS;
<> 149:156823d33999 79 __IO uint32_t WORD;
<> 149:156823d33999 80 } WRITE_BUF_MSW; /* Byte swap write buffer – Most significant word - 0x4001100C */
<> 149:156823d33999 81 union {
<> 149:156823d33999 82 struct {
<> 149:156823d33999 83 __IO uint32_t BYTE_7_3 :8; /**<Byte Swap Control == 1? Byte #7 : Byte #3*/
<> 149:156823d33999 84 __IO uint32_t BYTE_6_2 :8; /**<Byte Swap Control == 1? Byte #6 : Byte #2*/
<> 149:156823d33999 85 __IO uint32_t BYTE_5_1 :8; /**<Byte Swap Control == 1? Byte #5 : Byte #1*/
<> 149:156823d33999 86 __IO uint32_t BYTE_4_0 :8; /**<Byte Swap Control == 1? Byte #4 : Byte #0*/
<> 149:156823d33999 87 } BITS;
<> 149:156823d33999 88 __IO uint32_t WORD;
<> 149:156823d33999 89 } READ_BUF_LSW; /* Byte swap read buffer – Least significant word - 0x40011010 */
<> 149:156823d33999 90 union {
<> 149:156823d33999 91 struct {
<> 149:156823d33999 92 __IO uint32_t BYTE_3 :8; /**<Byte #3*/
<> 149:156823d33999 93 __IO uint32_t BYTE_2 :8; /**<Byte #2*/
<> 149:156823d33999 94 __IO uint32_t BYTE_1 :8; /**<Byte #1*/
<> 149:156823d33999 95 __IO uint32_t BYTE_0 :8; /**<Byte #0*/
<> 149:156823d33999 96 } BITS;
<> 149:156823d33999 97 __IO uint32_t WORD;
<> 149:156823d33999 98 } READ_BUF_MSW; /* Byte swap read buffer – Most significant word - 0x40011014 */
<> 149:156823d33999 99 __I uint32_t METASTABLE_LATCH_VAL; /* Meta-stable latch TRNG value - 0x40011018 */
<> 149:156823d33999 100 __I uint32_t WHITENOISE_VAL; /* White noise TRNG value - 0x4001101C */
<> 149:156823d33999 101 } RandReg_t, *RandReg_pt;
<> 149:156823d33999 102
<> 149:156823d33999 103 #endif /* RANDOM_MAP_H_ */