Shao Rui
/
AGV
1
FlashWriter/stm32f4xx_flash.c@0:571a1835428e, 2021-01-25 (annotated)
- Committer:
- shaorui
- Date:
- Mon Jan 25 08:36:48 2021 +0000
- Revision:
- 0:571a1835428e
1
Who changed what in which revision?
User | Revision | Line number | New contents of line |
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shaorui | 0:571a1835428e | 1 | /** |
shaorui | 0:571a1835428e | 2 | ****************************************************************************** |
shaorui | 0:571a1835428e | 3 | * @file stm32f4xx_flash.c |
shaorui | 0:571a1835428e | 4 | * @author MCD Application Team |
shaorui | 0:571a1835428e | 5 | * @version V1.7.1 |
shaorui | 0:571a1835428e | 6 | * @date 20-May-2016 |
shaorui | 0:571a1835428e | 7 | * @brief This file provides firmware functions to manage the following |
shaorui | 0:571a1835428e | 8 | * functionalities of the FLASH peripheral: |
shaorui | 0:571a1835428e | 9 | * + FLASH Interface configuration |
shaorui | 0:571a1835428e | 10 | * + FLASH Memory Programming |
shaorui | 0:571a1835428e | 11 | * + Option Bytes Programming |
shaorui | 0:571a1835428e | 12 | * + Interrupts and flags management |
shaorui | 0:571a1835428e | 13 | * |
shaorui | 0:571a1835428e | 14 | @verbatim |
shaorui | 0:571a1835428e | 15 | =============================================================================== |
shaorui | 0:571a1835428e | 16 | ##### How to use this driver ##### |
shaorui | 0:571a1835428e | 17 | =============================================================================== |
shaorui | 0:571a1835428e | 18 | [..] |
shaorui | 0:571a1835428e | 19 | This driver provides functions to configure and program the FLASH memory |
shaorui | 0:571a1835428e | 20 | of all STM32F4xx devices. These functions are split in 4 groups: |
shaorui | 0:571a1835428e | 21 | |
shaorui | 0:571a1835428e | 22 | (#) FLASH Interface configuration functions: this group includes the |
shaorui | 0:571a1835428e | 23 | management of the following features: |
shaorui | 0:571a1835428e | 24 | (++) Set the latency |
shaorui | 0:571a1835428e | 25 | (++) Enable/Disable the prefetch buffer |
shaorui | 0:571a1835428e | 26 | (++) Enable/Disable the Instruction cache and the Data cache |
shaorui | 0:571a1835428e | 27 | (++) Reset the Instruction cache and the Data cache |
shaorui | 0:571a1835428e | 28 | |
shaorui | 0:571a1835428e | 29 | (#) FLASH Memory Programming functions: this group includes all needed |
shaorui | 0:571a1835428e | 30 | functions to erase and program the main memory: |
shaorui | 0:571a1835428e | 31 | (++) Lock and Unlock the FLASH interface |
shaorui | 0:571a1835428e | 32 | (++) Erase function: Erase sector, erase all sectors |
shaorui | 0:571a1835428e | 33 | (++) Program functions: byte, half word, word and double word |
shaorui | 0:571a1835428e | 34 | |
shaorui | 0:571a1835428e | 35 | (#) Option Bytes Programming functions: this group includes all needed |
shaorui | 0:571a1835428e | 36 | functions to manage the Option Bytes: |
shaorui | 0:571a1835428e | 37 | (++) Set/Reset the write protection |
shaorui | 0:571a1835428e | 38 | (++) Set the Read protection Level |
shaorui | 0:571a1835428e | 39 | (++) Set the BOR level |
shaorui | 0:571a1835428e | 40 | (++) Program the user Option Bytes |
shaorui | 0:571a1835428e | 41 | (++) Launch the Option Bytes loader |
shaorui | 0:571a1835428e | 42 | |
shaorui | 0:571a1835428e | 43 | (#) Interrupts and flags management functions: this group |
shaorui | 0:571a1835428e | 44 | includes all needed functions to: |
shaorui | 0:571a1835428e | 45 | (++) Enable/Disable the FLASH interrupt sources |
shaorui | 0:571a1835428e | 46 | (++) Get flags status |
shaorui | 0:571a1835428e | 47 | (++) Clear flags |
shaorui | 0:571a1835428e | 48 | (++) Get FLASH operation status |
shaorui | 0:571a1835428e | 49 | (++) Wait for last FLASH operation |
shaorui | 0:571a1835428e | 50 | @endverbatim |
shaorui | 0:571a1835428e | 51 | ****************************************************************************** |
shaorui | 0:571a1835428e | 52 | * @attention |
shaorui | 0:571a1835428e | 53 | * |
shaorui | 0:571a1835428e | 54 | * <h2><center>© COPYRIGHT 2016 STMicroelectronics</center></h2> |
shaorui | 0:571a1835428e | 55 | * |
shaorui | 0:571a1835428e | 56 | * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); |
shaorui | 0:571a1835428e | 57 | * You may not use this file except in compliance with the License. |
shaorui | 0:571a1835428e | 58 | * You may obtain a copy of the License at: |
shaorui | 0:571a1835428e | 59 | * |
shaorui | 0:571a1835428e | 60 | * http://www.st.com/software_license_agreement_liberty_v2 |
shaorui | 0:571a1835428e | 61 | * |
shaorui | 0:571a1835428e | 62 | * Unless required by applicable law or agreed to in writing, software |
shaorui | 0:571a1835428e | 63 | * distributed under the License is distributed on an "AS IS" BASIS, |
shaorui | 0:571a1835428e | 64 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. |
shaorui | 0:571a1835428e | 65 | * See the License for the specific language governing permissions and |
shaorui | 0:571a1835428e | 66 | * limitations under the License. |
shaorui | 0:571a1835428e | 67 | * |
shaorui | 0:571a1835428e | 68 | ****************************************************************************** |
shaorui | 0:571a1835428e | 69 | */ |
shaorui | 0:571a1835428e | 70 | |
shaorui | 0:571a1835428e | 71 | /* Includes ------------------------------------------------------------------*/ |
shaorui | 0:571a1835428e | 72 | #include "stm32f4xx_flash.h" |
shaorui | 0:571a1835428e | 73 | |
shaorui | 0:571a1835428e | 74 | /** @addtogroup STM32F4xx_StdPeriph_Driver |
shaorui | 0:571a1835428e | 75 | * @{ |
shaorui | 0:571a1835428e | 76 | */ |
shaorui | 0:571a1835428e | 77 | |
shaorui | 0:571a1835428e | 78 | /** @defgroup FLASH |
shaorui | 0:571a1835428e | 79 | * @brief FLASH driver modules |
shaorui | 0:571a1835428e | 80 | * @{ |
shaorui | 0:571a1835428e | 81 | */ |
shaorui | 0:571a1835428e | 82 | |
shaorui | 0:571a1835428e | 83 | /* Private typedef -----------------------------------------------------------*/ |
shaorui | 0:571a1835428e | 84 | /* Private define ------------------------------------------------------------*/ |
shaorui | 0:571a1835428e | 85 | #define SECTOR_MASK ((uint32_t)0xFFFFFF07) |
shaorui | 0:571a1835428e | 86 | |
shaorui | 0:571a1835428e | 87 | /* Private macro -------------------------------------------------------------*/ |
shaorui | 0:571a1835428e | 88 | /* Private variables ---------------------------------------------------------*/ |
shaorui | 0:571a1835428e | 89 | /* Private function prototypes -----------------------------------------------*/ |
shaorui | 0:571a1835428e | 90 | /* Private functions ---------------------------------------------------------*/ |
shaorui | 0:571a1835428e | 91 | |
shaorui | 0:571a1835428e | 92 | /** @defgroup FLASH_Private_Functions |
shaorui | 0:571a1835428e | 93 | * @{ |
shaorui | 0:571a1835428e | 94 | */ |
shaorui | 0:571a1835428e | 95 | |
shaorui | 0:571a1835428e | 96 | /** @defgroup FLASH_Group1 FLASH Interface configuration functions |
shaorui | 0:571a1835428e | 97 | * @brief FLASH Interface configuration functions |
shaorui | 0:571a1835428e | 98 | * |
shaorui | 0:571a1835428e | 99 | |
shaorui | 0:571a1835428e | 100 | @verbatim |
shaorui | 0:571a1835428e | 101 | =============================================================================== |
shaorui | 0:571a1835428e | 102 | ##### FLASH Interface configuration functions ##### |
shaorui | 0:571a1835428e | 103 | =============================================================================== |
shaorui | 0:571a1835428e | 104 | [..] |
shaorui | 0:571a1835428e | 105 | This group includes the following functions: |
shaorui | 0:571a1835428e | 106 | (+) void FLASH_SetLatency(uint32_t FLASH_Latency) |
shaorui | 0:571a1835428e | 107 | To correctly read data from FLASH memory, the number of wait states (LATENCY) |
shaorui | 0:571a1835428e | 108 | must be correctly programmed according to the frequency of the CPU clock |
shaorui | 0:571a1835428e | 109 | (HCLK) and the supply voltage of the device. |
shaorui | 0:571a1835428e | 110 | [..] |
shaorui | 0:571a1835428e | 111 | For STM32F405xx/07xx and STM32F415xx/17xx devices |
shaorui | 0:571a1835428e | 112 | +-------------------------------------------------------------------------------------+ |
shaorui | 0:571a1835428e | 113 | | Latency | HCLK clock frequency (MHz) | |
shaorui | 0:571a1835428e | 114 | | |---------------------------------------------------------------------| |
shaorui | 0:571a1835428e | 115 | | | voltage range | voltage range | voltage range | voltage range | |
shaorui | 0:571a1835428e | 116 | | | 2.7 V - 3.6 V | 2.4 V - 2.7 V | 2.1 V - 2.4 V | 1.8 V - 2.1 V | |
shaorui | 0:571a1835428e | 117 | |---------------|----------------|----------------|-----------------|-----------------| |
shaorui | 0:571a1835428e | 118 | |0WS(1CPU cycle)|0 < HCLK <= 30 |0 < HCLK <= 24 |0 < HCLK <= 22 |0 < HCLK <= 20 | |
shaorui | 0:571a1835428e | 119 | |---------------|----------------|----------------|-----------------|-----------------| |
shaorui | 0:571a1835428e | 120 | |1WS(2CPU cycle)|30 < HCLK <= 60 |24 < HCLK <= 48 |22 < HCLK <= 44 |20 < HCLK <= 40 | |
shaorui | 0:571a1835428e | 121 | |---------------|----------------|----------------|-----------------|-----------------| |
shaorui | 0:571a1835428e | 122 | |2WS(3CPU cycle)|60 < HCLK <= 90 |48 < HCLK <= 72 |44 < HCLK <= 66 |40 < HCLK <= 60 | |
shaorui | 0:571a1835428e | 123 | |---------------|----------------|----------------|-----------------|-----------------| |
shaorui | 0:571a1835428e | 124 | |3WS(4CPU cycle)|90 < HCLK <= 120|72 < HCLK <= 96 |66 < HCLK <= 88 |60 < HCLK <= 80 | |
shaorui | 0:571a1835428e | 125 | |---------------|----------------|----------------|-----------------|-----------------| |
shaorui | 0:571a1835428e | 126 | |4WS(5CPU cycle)|120< HCLK <= 150|96 < HCLK <= 120|88 < HCLK <= 110 |80 < HCLK <= 100 | |
shaorui | 0:571a1835428e | 127 | |---------------|----------------|----------------|-----------------|-----------------| |
shaorui | 0:571a1835428e | 128 | |5WS(6CPU cycle)|150< HCLK <= 168|120< HCLK <= 144|110 < HCLK <= 132|100 < HCLK <= 120| |
shaorui | 0:571a1835428e | 129 | |---------------|----------------|----------------|-----------------|-----------------| |
shaorui | 0:571a1835428e | 130 | |6WS(7CPU cycle)| NA |144< HCLK <= 168|132 < HCLK <= 154|120 < HCLK <= 140| |
shaorui | 0:571a1835428e | 131 | |---------------|----------------|----------------|-----------------|-----------------| |
shaorui | 0:571a1835428e | 132 | |7WS(8CPU cycle)| NA | NA |154 < HCLK <= 168|140 < HCLK <= 160| |
shaorui | 0:571a1835428e | 133 | +---------------|----------------|----------------|-----------------|-----------------+ |
shaorui | 0:571a1835428e | 134 | |
shaorui | 0:571a1835428e | 135 | [..] |
shaorui | 0:571a1835428e | 136 | For STM32F42xxx/43xxx devices |
shaorui | 0:571a1835428e | 137 | +-------------------------------------------------------------------------------------+ |
shaorui | 0:571a1835428e | 138 | | Latency | HCLK clock frequency (MHz) | |
shaorui | 0:571a1835428e | 139 | | |---------------------------------------------------------------------| |
shaorui | 0:571a1835428e | 140 | | | voltage range | voltage range | voltage range | voltage range | |
shaorui | 0:571a1835428e | 141 | | | 2.7 V - 3.6 V | 2.4 V - 2.7 V | 2.1 V - 2.4 V | 1.8 V - 2.1 V | |
shaorui | 0:571a1835428e | 142 | |---------------|----------------|----------------|-----------------|-----------------| |
shaorui | 0:571a1835428e | 143 | |0WS(1CPU cycle)|0 < HCLK <= 30 |0 < HCLK <= 24 |0 < HCLK <= 22 |0 < HCLK <= 20 | |
shaorui | 0:571a1835428e | 144 | |---------------|----------------|----------------|-----------------|-----------------| |
shaorui | 0:571a1835428e | 145 | |1WS(2CPU cycle)|30 < HCLK <= 60 |24 < HCLK <= 48 |22 < HCLK <= 44 |20 < HCLK <= 40 | |
shaorui | 0:571a1835428e | 146 | |---------------|----------------|----------------|-----------------|-----------------| |
shaorui | 0:571a1835428e | 147 | |2WS(3CPU cycle)|60 < HCLK <= 90 |48 < HCLK <= 72 |44 < HCLK <= 66 |40 < HCLK <= 60 | |
shaorui | 0:571a1835428e | 148 | |---------------|----------------|----------------|-----------------|-----------------| |
shaorui | 0:571a1835428e | 149 | |3WS(4CPU cycle)|90 < HCLK <= 120|72 < HCLK <= 96 |66 < HCLK <= 88 |60 < HCLK <= 80 | |
shaorui | 0:571a1835428e | 150 | |---------------|----------------|----------------|-----------------|-----------------| |
shaorui | 0:571a1835428e | 151 | |4WS(5CPU cycle)|120< HCLK <= 150|96 < HCLK <= 120|88 < HCLK <= 110 |80 < HCLK <= 100 | |
shaorui | 0:571a1835428e | 152 | |---------------|----------------|----------------|-----------------|-----------------| |
shaorui | 0:571a1835428e | 153 | |5WS(6CPU cycle)|120< HCLK <= 180|120< HCLK <= 144|110 < HCLK <= 132|100 < HCLK <= 120| |
shaorui | 0:571a1835428e | 154 | |---------------|----------------|----------------|-----------------|-----------------| |
shaorui | 0:571a1835428e | 155 | |6WS(7CPU cycle)| NA |144< HCLK <= 168|132 < HCLK <= 154|120 < HCLK <= 140| |
shaorui | 0:571a1835428e | 156 | |---------------|----------------|----------------|-----------------|-----------------| |
shaorui | 0:571a1835428e | 157 | |7WS(8CPU cycle)| NA |168< HCLK <= 180|154 < HCLK <= 176|140 < HCLK <= 160| |
shaorui | 0:571a1835428e | 158 | |---------------|----------------|----------------|-----------------|-----------------| |
shaorui | 0:571a1835428e | 159 | |8WS(9CPU cycle)| NA | NA |176 < HCLK <= 180|160 < HCLK <= 168| |
shaorui | 0:571a1835428e | 160 | +-------------------------------------------------------------------------------------+ |
shaorui | 0:571a1835428e | 161 | |
shaorui | 0:571a1835428e | 162 | [..] |
shaorui | 0:571a1835428e | 163 | For STM32F401x devices |
shaorui | 0:571a1835428e | 164 | +-------------------------------------------------------------------------------------+ |
shaorui | 0:571a1835428e | 165 | | Latency | HCLK clock frequency (MHz) | |
shaorui | 0:571a1835428e | 166 | | |---------------------------------------------------------------------| |
shaorui | 0:571a1835428e | 167 | | | voltage range | voltage range | voltage range | voltage range | |
shaorui | 0:571a1835428e | 168 | | | 2.7 V - 3.6 V | 2.4 V - 2.7 V | 2.1 V - 2.4 V | 1.8 V - 2.1 V | |
shaorui | 0:571a1835428e | 169 | |---------------|----------------|----------------|-----------------|-----------------| |
shaorui | 0:571a1835428e | 170 | |0WS(1CPU cycle)|0 < HCLK <= 30 |0 < HCLK <= 24 |0 < HCLK <= 22 |0 < HCLK <= 20 | |
shaorui | 0:571a1835428e | 171 | |---------------|----------------|----------------|-----------------|-----------------| |
shaorui | 0:571a1835428e | 172 | |1WS(2CPU cycle)|30 < HCLK <= 60 |24 < HCLK <= 48 |22 < HCLK <= 44 |20 < HCLK <= 40 | |
shaorui | 0:571a1835428e | 173 | |---------------|----------------|----------------|-----------------|-----------------| |
shaorui | 0:571a1835428e | 174 | |2WS(3CPU cycle)|60 < HCLK <= 84 |48 < HCLK <= 72 |44 < HCLK <= 66 |40 < HCLK <= 60 | |
shaorui | 0:571a1835428e | 175 | |---------------|----------------|----------------|-----------------|-----------------| |
shaorui | 0:571a1835428e | 176 | |3WS(4CPU cycle)| NA |72 < HCLK <= 84 |66 < HCLK <= 84 |60 < HCLK <= 80 | |
shaorui | 0:571a1835428e | 177 | |---------------|----------------|----------------|-----------------|-----------------| |
shaorui | 0:571a1835428e | 178 | |4WS(5CPU cycle)| NA | NA | NA |80 < HCLK <= 84 | |
shaorui | 0:571a1835428e | 179 | +-------------------------------------------------------------------------------------+ |
shaorui | 0:571a1835428e | 180 | |
shaorui | 0:571a1835428e | 181 | [..] |
shaorui | 0:571a1835428e | 182 | For STM32F410xx/STM32F411xE devices |
shaorui | 0:571a1835428e | 183 | +-------------------------------------------------------------------------------------+ |
shaorui | 0:571a1835428e | 184 | | Latency | HCLK clock frequency (MHz) | |
shaorui | 0:571a1835428e | 185 | | |---------------------------------------------------------------------| |
shaorui | 0:571a1835428e | 186 | | | voltage range | voltage range | voltage range | voltage range | |
shaorui | 0:571a1835428e | 187 | | | 2.7 V - 3.6 V | 2.4 V - 2.7 V | 2.1 V - 2.4 V | 1.8 V - 2.1 V | |
shaorui | 0:571a1835428e | 188 | |---------------|----------------|----------------|-----------------|-----------------| |
shaorui | 0:571a1835428e | 189 | |0WS(1CPU cycle)|0 < HCLK <= 30 |0 < HCLK <= 24 |0 < HCLK <= 18 |0 < HCLK <= 16 | |
shaorui | 0:571a1835428e | 190 | |---------------|----------------|----------------|-----------------|-----------------| |
shaorui | 0:571a1835428e | 191 | |1WS(2CPU cycle)|30 < HCLK <= 64 |24 < HCLK <= 48 |18 < HCLK <= 36 |16 < HCLK <= 32 | |
shaorui | 0:571a1835428e | 192 | |---------------|----------------|----------------|-----------------|-----------------| |
shaorui | 0:571a1835428e | 193 | |2WS(3CPU cycle)|64 < HCLK <= 90 |48 < HCLK <= 72 |36 < HCLK <= 54 |32 < HCLK <= 48 | |
shaorui | 0:571a1835428e | 194 | |---------------|----------------|----------------|-----------------|-----------------| |
shaorui | 0:571a1835428e | 195 | |3WS(4CPU cycle)|90 < HCLK <= 100|72 < HCLK <= 96 |54 < HCLK <= 72 |48 < HCLK <= 64 | |
shaorui | 0:571a1835428e | 196 | |---------------|----------------|----------------|-----------------|-----------------| |
shaorui | 0:571a1835428e | 197 | |4WS(5CPU cycle)| NA |96 < HCLK <= 100|72 < HCLK <= 90 |64 < HCLK <= 80 | |
shaorui | 0:571a1835428e | 198 | |---------------|----------------|----------------|-----------------|-----------------| |
shaorui | 0:571a1835428e | 199 | |5WS(6CPU cycle)| NA | NA |90 < HCLK <= 100 |80 < HCLK <= 96 | |
shaorui | 0:571a1835428e | 200 | |---------------|----------------|----------------|-----------------|-----------------| |
shaorui | 0:571a1835428e | 201 | |6WS(7CPU cycle)| NA | NA | NA |96 < HCLK <= 100 | |
shaorui | 0:571a1835428e | 202 | +-------------------------------------------------------------------------------------+ |
shaorui | 0:571a1835428e | 203 | |
shaorui | 0:571a1835428e | 204 | [..] |
shaorui | 0:571a1835428e | 205 | +-------------------------------------------------------------------------------------------------------------------+ |
shaorui | 0:571a1835428e | 206 | | | voltage range | voltage range | voltage range | voltage range | voltage range 2.7 V - 3.6 V | |
shaorui | 0:571a1835428e | 207 | | | 2.7 V - 3.6 V | 2.4 V - 2.7 V | 2.1 V - 2.4 V | 1.8 V - 2.1 V | with External Vpp = 9V | |
shaorui | 0:571a1835428e | 208 | |---------------|----------------|----------------|-----------------|-----------------|-----------------------------| |
shaorui | 0:571a1835428e | 209 | |Max Parallelism| x32 | x16 | x8 | x64 | |
shaorui | 0:571a1835428e | 210 | |---------------|----------------|----------------|-----------------|-----------------|-----------------------------| |
shaorui | 0:571a1835428e | 211 | |PSIZE[1:0] | 10 | 01 | 00 | 11 | |
shaorui | 0:571a1835428e | 212 | +-------------------------------------------------------------------------------------------------------------------+ |
shaorui | 0:571a1835428e | 213 | |
shaorui | 0:571a1835428e | 214 | -@- On STM32F405xx/407xx and STM32F415xx/417xx devices: |
shaorui | 0:571a1835428e | 215 | (++) when VOS = '0' Scale 2 mode, the maximum value of fHCLK = 144MHz. |
shaorui | 0:571a1835428e | 216 | (++) when VOS = '1' Scale 1 mode, the maximum value of fHCLK = 168MHz. |
shaorui | 0:571a1835428e | 217 | [..] |
shaorui | 0:571a1835428e | 218 | On STM32F42xxx/43xxx devices: |
shaorui | 0:571a1835428e | 219 | (++) when VOS[1:0] = '0x01' Scale 3 mode, the maximum value of fHCLK is 120MHz. |
shaorui | 0:571a1835428e | 220 | (++) when VOS[1:0] = '0x10' Scale 2 mode, the maximum value of fHCLK is 144MHz if OverDrive OFF and 168MHz if OverDrive ON. |
shaorui | 0:571a1835428e | 221 | (++) when VOS[1:0] = '0x11' Scale 1 mode, the maximum value of fHCLK is 168MHz if OverDrive OFF and 180MHz if OverDrive ON. |
shaorui | 0:571a1835428e | 222 | [..] |
shaorui | 0:571a1835428e | 223 | On STM32F401x devices: |
shaorui | 0:571a1835428e | 224 | (++) when VOS[1:0] = '0x01' Scale 3 mode, the maximum value of fHCLK is 60MHz. |
shaorui | 0:571a1835428e | 225 | (++) when VOS[1:0] = '0x10' Scale 2 mode, the maximum value of fHCLK is 84MHz. |
shaorui | 0:571a1835428e | 226 | [..] |
shaorui | 0:571a1835428e | 227 | On STM32F410xx/STM32F411xE devices: |
shaorui | 0:571a1835428e | 228 | (++) when VOS[1:0] = '0x01' Scale 3 mode, the maximum value of fHCLK is 64MHz. |
shaorui | 0:571a1835428e | 229 | (++) when VOS[1:0] = '0x10' Scale 2 mode, the maximum value of fHCLK is 84MHz. |
shaorui | 0:571a1835428e | 230 | (++) when VOS[1:0] = '0x11' Scale 1 mode, the maximum value of fHCLK is 100MHz. |
shaorui | 0:571a1835428e | 231 | |
shaorui | 0:571a1835428e | 232 | For more details please refer product DataSheet |
shaorui | 0:571a1835428e | 233 | You can use PWR_MainRegulatorModeConfig() function to control VOS bits. |
shaorui | 0:571a1835428e | 234 | |
shaorui | 0:571a1835428e | 235 | (+) void FLASH_PrefetchBufferCmd(FunctionalState NewState) |
shaorui | 0:571a1835428e | 236 | (+) void FLASH_InstructionCacheCmd(FunctionalState NewState) |
shaorui | 0:571a1835428e | 237 | (+) void FLASH_DataCacheCmd(FunctionalState NewState) |
shaorui | 0:571a1835428e | 238 | (+) void FLASH_InstructionCacheReset(void) |
shaorui | 0:571a1835428e | 239 | (+) void FLASH_DataCacheReset(void) |
shaorui | 0:571a1835428e | 240 | |
shaorui | 0:571a1835428e | 241 | [..] |
shaorui | 0:571a1835428e | 242 | The unlock sequence is not needed for these functions. |
shaorui | 0:571a1835428e | 243 | |
shaorui | 0:571a1835428e | 244 | @endverbatim |
shaorui | 0:571a1835428e | 245 | * @{ |
shaorui | 0:571a1835428e | 246 | */ |
shaorui | 0:571a1835428e | 247 | |
shaorui | 0:571a1835428e | 248 | /** |
shaorui | 0:571a1835428e | 249 | * @brief Sets the code latency value. |
shaorui | 0:571a1835428e | 250 | * @param FLASH_Latency: specifies the FLASH Latency value. |
shaorui | 0:571a1835428e | 251 | * This parameter can be one of the following values: |
shaorui | 0:571a1835428e | 252 | * @arg FLASH_Latency_0: FLASH Zero Latency cycle |
shaorui | 0:571a1835428e | 253 | * @arg FLASH_Latency_1: FLASH One Latency cycle |
shaorui | 0:571a1835428e | 254 | * @arg FLASH_Latency_2: FLASH Two Latency cycles |
shaorui | 0:571a1835428e | 255 | * @arg FLASH_Latency_3: FLASH Three Latency cycles |
shaorui | 0:571a1835428e | 256 | * @arg FLASH_Latency_4: FLASH Four Latency cycles |
shaorui | 0:571a1835428e | 257 | * @arg FLASH_Latency_5: FLASH Five Latency cycles |
shaorui | 0:571a1835428e | 258 | * @arg FLASH_Latency_6: FLASH Six Latency cycles |
shaorui | 0:571a1835428e | 259 | * @arg FLASH_Latency_7: FLASH Seven Latency cycles |
shaorui | 0:571a1835428e | 260 | * @arg FLASH_Latency_8: FLASH Eight Latency cycles |
shaorui | 0:571a1835428e | 261 | * @arg FLASH_Latency_9: FLASH Nine Latency cycles |
shaorui | 0:571a1835428e | 262 | * @arg FLASH_Latency_10: FLASH Teen Latency cycles |
shaorui | 0:571a1835428e | 263 | * @arg FLASH_Latency_11: FLASH Eleven Latency cycles |
shaorui | 0:571a1835428e | 264 | * @arg FLASH_Latency_12: FLASH Twelve Latency cycles |
shaorui | 0:571a1835428e | 265 | * @arg FLASH_Latency_13: FLASH Thirteen Latency cycles |
shaorui | 0:571a1835428e | 266 | * @arg FLASH_Latency_14: FLASH Fourteen Latency cycles |
shaorui | 0:571a1835428e | 267 | * @arg FLASH_Latency_15: FLASH Fifteen Latency cycles |
shaorui | 0:571a1835428e | 268 | * |
shaorui | 0:571a1835428e | 269 | * @note For STM32F405xx/407xx, STM32F415xx/417xx, STM32F401xx/411xE and STM32F412xG devices |
shaorui | 0:571a1835428e | 270 | * this parameter can be a value between FLASH_Latency_0 and FLASH_Latency_7. |
shaorui | 0:571a1835428e | 271 | * |
shaorui | 0:571a1835428e | 272 | * @note For STM32F42xxx/43xxx devices this parameter can be a value between |
shaorui | 0:571a1835428e | 273 | * FLASH_Latency_0 and FLASH_Latency_15. |
shaorui | 0:571a1835428e | 274 | * |
shaorui | 0:571a1835428e | 275 | * @retval None |
shaorui | 0:571a1835428e | 276 | */ |
shaorui | 0:571a1835428e | 277 | void FLASH_SetLatency(uint32_t FLASH_Latency) |
shaorui | 0:571a1835428e | 278 | { |
shaorui | 0:571a1835428e | 279 | /* Check the parameters */ |
shaorui | 0:571a1835428e | 280 | assert_param(IS_FLASH_LATENCY(FLASH_Latency)); |
shaorui | 0:571a1835428e | 281 | |
shaorui | 0:571a1835428e | 282 | /* Perform Byte access to FLASH_ACR[8:0] to set the Latency value */ |
shaorui | 0:571a1835428e | 283 | *(__IO uint8_t *)ACR_BYTE0_ADDRESS = (uint8_t)FLASH_Latency; |
shaorui | 0:571a1835428e | 284 | } |
shaorui | 0:571a1835428e | 285 | |
shaorui | 0:571a1835428e | 286 | /** |
shaorui | 0:571a1835428e | 287 | * @brief Enables or disables the Prefetch Buffer. |
shaorui | 0:571a1835428e | 288 | * @param NewState: new state of the Prefetch Buffer. |
shaorui | 0:571a1835428e | 289 | * This parameter can be: ENABLE or DISABLE. |
shaorui | 0:571a1835428e | 290 | * @retval None |
shaorui | 0:571a1835428e | 291 | */ |
shaorui | 0:571a1835428e | 292 | void FLASH_PrefetchBufferCmd(FunctionalState NewState) |
shaorui | 0:571a1835428e | 293 | { |
shaorui | 0:571a1835428e | 294 | /* Check the parameters */ |
shaorui | 0:571a1835428e | 295 | assert_param(IS_FUNCTIONAL_STATE(NewState)); |
shaorui | 0:571a1835428e | 296 | |
shaorui | 0:571a1835428e | 297 | /* Enable or disable the Prefetch Buffer */ |
shaorui | 0:571a1835428e | 298 | if(NewState != DISABLE) |
shaorui | 0:571a1835428e | 299 | { |
shaorui | 0:571a1835428e | 300 | FLASH->ACR |= FLASH_ACR_PRFTEN; |
shaorui | 0:571a1835428e | 301 | } |
shaorui | 0:571a1835428e | 302 | else |
shaorui | 0:571a1835428e | 303 | { |
shaorui | 0:571a1835428e | 304 | FLASH->ACR &= (~FLASH_ACR_PRFTEN); |
shaorui | 0:571a1835428e | 305 | } |
shaorui | 0:571a1835428e | 306 | } |
shaorui | 0:571a1835428e | 307 | |
shaorui | 0:571a1835428e | 308 | /** |
shaorui | 0:571a1835428e | 309 | * @brief Enables or disables the Instruction Cache feature. |
shaorui | 0:571a1835428e | 310 | * @param NewState: new state of the Instruction Cache. |
shaorui | 0:571a1835428e | 311 | * This parameter can be: ENABLE or DISABLE. |
shaorui | 0:571a1835428e | 312 | * @retval None |
shaorui | 0:571a1835428e | 313 | */ |
shaorui | 0:571a1835428e | 314 | void FLASH_InstructionCacheCmd(FunctionalState NewState) |
shaorui | 0:571a1835428e | 315 | { |
shaorui | 0:571a1835428e | 316 | /* Check the parameters */ |
shaorui | 0:571a1835428e | 317 | assert_param(IS_FUNCTIONAL_STATE(NewState)); |
shaorui | 0:571a1835428e | 318 | |
shaorui | 0:571a1835428e | 319 | if(NewState != DISABLE) |
shaorui | 0:571a1835428e | 320 | { |
shaorui | 0:571a1835428e | 321 | FLASH->ACR |= FLASH_ACR_ICEN; |
shaorui | 0:571a1835428e | 322 | } |
shaorui | 0:571a1835428e | 323 | else |
shaorui | 0:571a1835428e | 324 | { |
shaorui | 0:571a1835428e | 325 | FLASH->ACR &= (~FLASH_ACR_ICEN); |
shaorui | 0:571a1835428e | 326 | } |
shaorui | 0:571a1835428e | 327 | } |
shaorui | 0:571a1835428e | 328 | |
shaorui | 0:571a1835428e | 329 | /** |
shaorui | 0:571a1835428e | 330 | * @brief Enables or disables the Data Cache feature. |
shaorui | 0:571a1835428e | 331 | * @param NewState: new state of the Data Cache. |
shaorui | 0:571a1835428e | 332 | * This parameter can be: ENABLE or DISABLE. |
shaorui | 0:571a1835428e | 333 | * @retval None |
shaorui | 0:571a1835428e | 334 | */ |
shaorui | 0:571a1835428e | 335 | void FLASH_DataCacheCmd(FunctionalState NewState) |
shaorui | 0:571a1835428e | 336 | { |
shaorui | 0:571a1835428e | 337 | /* Check the parameters */ |
shaorui | 0:571a1835428e | 338 | assert_param(IS_FUNCTIONAL_STATE(NewState)); |
shaorui | 0:571a1835428e | 339 | |
shaorui | 0:571a1835428e | 340 | if(NewState != DISABLE) |
shaorui | 0:571a1835428e | 341 | { |
shaorui | 0:571a1835428e | 342 | FLASH->ACR |= FLASH_ACR_DCEN; |
shaorui | 0:571a1835428e | 343 | } |
shaorui | 0:571a1835428e | 344 | else |
shaorui | 0:571a1835428e | 345 | { |
shaorui | 0:571a1835428e | 346 | FLASH->ACR &= (~FLASH_ACR_DCEN); |
shaorui | 0:571a1835428e | 347 | } |
shaorui | 0:571a1835428e | 348 | } |
shaorui | 0:571a1835428e | 349 | |
shaorui | 0:571a1835428e | 350 | /** |
shaorui | 0:571a1835428e | 351 | * @brief Resets the Instruction Cache. |
shaorui | 0:571a1835428e | 352 | * @note This function must be used only when the Instruction Cache is disabled. |
shaorui | 0:571a1835428e | 353 | * @param None |
shaorui | 0:571a1835428e | 354 | * @retval None |
shaorui | 0:571a1835428e | 355 | */ |
shaorui | 0:571a1835428e | 356 | void FLASH_InstructionCacheReset(void) |
shaorui | 0:571a1835428e | 357 | { |
shaorui | 0:571a1835428e | 358 | FLASH->ACR |= FLASH_ACR_ICRST; |
shaorui | 0:571a1835428e | 359 | } |
shaorui | 0:571a1835428e | 360 | |
shaorui | 0:571a1835428e | 361 | /** |
shaorui | 0:571a1835428e | 362 | * @brief Resets the Data Cache. |
shaorui | 0:571a1835428e | 363 | * @note This function must be used only when the Data Cache is disabled. |
shaorui | 0:571a1835428e | 364 | * @param None |
shaorui | 0:571a1835428e | 365 | * @retval None |
shaorui | 0:571a1835428e | 366 | */ |
shaorui | 0:571a1835428e | 367 | void FLASH_DataCacheReset(void) |
shaorui | 0:571a1835428e | 368 | { |
shaorui | 0:571a1835428e | 369 | FLASH->ACR |= FLASH_ACR_DCRST; |
shaorui | 0:571a1835428e | 370 | } |
shaorui | 0:571a1835428e | 371 | |
shaorui | 0:571a1835428e | 372 | /** |
shaorui | 0:571a1835428e | 373 | * @} |
shaorui | 0:571a1835428e | 374 | */ |
shaorui | 0:571a1835428e | 375 | |
shaorui | 0:571a1835428e | 376 | /** @defgroup FLASH_Group2 FLASH Memory Programming functions |
shaorui | 0:571a1835428e | 377 | * @brief FLASH Memory Programming functions |
shaorui | 0:571a1835428e | 378 | * |
shaorui | 0:571a1835428e | 379 | @verbatim |
shaorui | 0:571a1835428e | 380 | =============================================================================== |
shaorui | 0:571a1835428e | 381 | ##### FLASH Memory Programming functions ##### |
shaorui | 0:571a1835428e | 382 | =============================================================================== |
shaorui | 0:571a1835428e | 383 | [..] |
shaorui | 0:571a1835428e | 384 | This group includes the following functions: |
shaorui | 0:571a1835428e | 385 | (+) void FLASH_Unlock(void) |
shaorui | 0:571a1835428e | 386 | (+) void FLASH_Lock(void) |
shaorui | 0:571a1835428e | 387 | (+) FLASH_Status FLASH_EraseSector(uint32_t FLASH_Sector, uint8_t VoltageRange) |
shaorui | 0:571a1835428e | 388 | (+) FLASH_Status FLASH_EraseAllSectors(uint8_t VoltageRange) |
shaorui | 0:571a1835428e | 389 | (+) FLASH_Status FLASH_ProgramDoubleWord(uint32_t Address, uint64_t Data) |
shaorui | 0:571a1835428e | 390 | (+) FLASH_Status FLASH_ProgramWord(uint32_t Address, uint32_t Data) |
shaorui | 0:571a1835428e | 391 | (+) FLASH_Status FLASH_ProgramHalfWord(uint32_t Address, uint16_t Data) |
shaorui | 0:571a1835428e | 392 | (+) FLASH_Status FLASH_ProgramByte(uint32_t Address, uint8_t Data) |
shaorui | 0:571a1835428e | 393 | The following functions can be used only for STM32F42xxx/43xxx devices. |
shaorui | 0:571a1835428e | 394 | (+) FLASH_Status FLASH_EraseAllBank1Sectors(uint8_t VoltageRange) |
shaorui | 0:571a1835428e | 395 | (+) FLASH_Status FLASH_EraseAllBank2Sectors(uint8_t VoltageRange) |
shaorui | 0:571a1835428e | 396 | [..] |
shaorui | 0:571a1835428e | 397 | Any operation of erase or program should follow these steps: |
shaorui | 0:571a1835428e | 398 | (#) Call the FLASH_Unlock() function to enable the FLASH control register access |
shaorui | 0:571a1835428e | 399 | |
shaorui | 0:571a1835428e | 400 | (#) Call the desired function to erase sector(s) or program data |
shaorui | 0:571a1835428e | 401 | |
shaorui | 0:571a1835428e | 402 | (#) Call the FLASH_Lock() function to disable the FLASH control register access |
shaorui | 0:571a1835428e | 403 | (recommended to protect the FLASH memory against possible unwanted operation) |
shaorui | 0:571a1835428e | 404 | |
shaorui | 0:571a1835428e | 405 | @endverbatim |
shaorui | 0:571a1835428e | 406 | * @{ |
shaorui | 0:571a1835428e | 407 | */ |
shaorui | 0:571a1835428e | 408 | |
shaorui | 0:571a1835428e | 409 | /** |
shaorui | 0:571a1835428e | 410 | * @brief Unlocks the FLASH control register access |
shaorui | 0:571a1835428e | 411 | * @param None |
shaorui | 0:571a1835428e | 412 | * @retval None |
shaorui | 0:571a1835428e | 413 | */ |
shaorui | 0:571a1835428e | 414 | void FLASH_Unlock(void) |
shaorui | 0:571a1835428e | 415 | { |
shaorui | 0:571a1835428e | 416 | if((FLASH->CR & FLASH_CR_LOCK) != RESET) |
shaorui | 0:571a1835428e | 417 | { |
shaorui | 0:571a1835428e | 418 | /* Authorize the FLASH Registers access */ |
shaorui | 0:571a1835428e | 419 | FLASH->KEYR = FLASH_KEY1; |
shaorui | 0:571a1835428e | 420 | FLASH->KEYR = FLASH_KEY2; |
shaorui | 0:571a1835428e | 421 | } |
shaorui | 0:571a1835428e | 422 | } |
shaorui | 0:571a1835428e | 423 | |
shaorui | 0:571a1835428e | 424 | /** |
shaorui | 0:571a1835428e | 425 | * @brief Locks the FLASH control register access |
shaorui | 0:571a1835428e | 426 | * @param None |
shaorui | 0:571a1835428e | 427 | * @retval None |
shaorui | 0:571a1835428e | 428 | */ |
shaorui | 0:571a1835428e | 429 | void FLASH_Lock(void) |
shaorui | 0:571a1835428e | 430 | { |
shaorui | 0:571a1835428e | 431 | /* Set the LOCK Bit to lock the FLASH Registers access */ |
shaorui | 0:571a1835428e | 432 | FLASH->CR |= FLASH_CR_LOCK; |
shaorui | 0:571a1835428e | 433 | } |
shaorui | 0:571a1835428e | 434 | |
shaorui | 0:571a1835428e | 435 | /** |
shaorui | 0:571a1835428e | 436 | * @brief Erases a specified FLASH Sector. |
shaorui | 0:571a1835428e | 437 | * |
shaorui | 0:571a1835428e | 438 | * @note If an erase and a program operations are requested simultaneously, |
shaorui | 0:571a1835428e | 439 | * the erase operation is performed before the program one. |
shaorui | 0:571a1835428e | 440 | * |
shaorui | 0:571a1835428e | 441 | * @param FLASH_Sector: The Sector number to be erased. |
shaorui | 0:571a1835428e | 442 | * |
shaorui | 0:571a1835428e | 443 | * @note For STM32F405xx/407xx and STM32F415xx/417xx devices this parameter can |
shaorui | 0:571a1835428e | 444 | * be a value between FLASH_Sector_0 and FLASH_Sector_11. |
shaorui | 0:571a1835428e | 445 | * |
shaorui | 0:571a1835428e | 446 | * For STM32F42xxx/43xxx devices this parameter can be a value between |
shaorui | 0:571a1835428e | 447 | * FLASH_Sector_0 and FLASH_Sector_23. |
shaorui | 0:571a1835428e | 448 | * |
shaorui | 0:571a1835428e | 449 | * For STM32F401xx devices this parameter can be a value between |
shaorui | 0:571a1835428e | 450 | * FLASH_Sector_0 and FLASH_Sector_5. |
shaorui | 0:571a1835428e | 451 | * |
shaorui | 0:571a1835428e | 452 | * For STM32F411xE and STM32F412xG devices this parameter can be a value between |
shaorui | 0:571a1835428e | 453 | * FLASH_Sector_0 and FLASH_Sector_7. |
shaorui | 0:571a1835428e | 454 | * |
shaorui | 0:571a1835428e | 455 | * For STM32F410xx devices this parameter can be a value between |
shaorui | 0:571a1835428e | 456 | * FLASH_Sector_0 and FLASH_Sector_4. |
shaorui | 0:571a1835428e | 457 | * |
shaorui | 0:571a1835428e | 458 | * @param VoltageRange: The device voltage range which defines the erase parallelism. |
shaorui | 0:571a1835428e | 459 | * This parameter can be one of the following values: |
shaorui | 0:571a1835428e | 460 | * @arg VoltageRange_1: when the device voltage range is 1.8V to 2.1V, |
shaorui | 0:571a1835428e | 461 | * the operation will be done by byte (8-bit) |
shaorui | 0:571a1835428e | 462 | * @arg VoltageRange_2: when the device voltage range is 2.1V to 2.7V, |
shaorui | 0:571a1835428e | 463 | * the operation will be done by half word (16-bit) |
shaorui | 0:571a1835428e | 464 | * @arg VoltageRange_3: when the device voltage range is 2.7V to 3.6V, |
shaorui | 0:571a1835428e | 465 | * the operation will be done by word (32-bit) |
shaorui | 0:571a1835428e | 466 | * @arg VoltageRange_4: when the device voltage range is 2.7V to 3.6V + External Vpp, |
shaorui | 0:571a1835428e | 467 | * the operation will be done by double word (64-bit) |
shaorui | 0:571a1835428e | 468 | * |
shaorui | 0:571a1835428e | 469 | * @retval FLASH Status: The returned value can be: FLASH_BUSY2, FLASH_ERROR_PROGRAM2, |
shaorui | 0:571a1835428e | 470 | * FLASH_ERROR_WRP2, FLASH_ERROR_OPERATION2 or FLASH_COMPLETE2. |
shaorui | 0:571a1835428e | 471 | */ |
shaorui | 0:571a1835428e | 472 | FLASH_Status FLASH_EraseSector(uint32_t FLASH_Sector, uint8_t VoltageRange) |
shaorui | 0:571a1835428e | 473 | { |
shaorui | 0:571a1835428e | 474 | uint32_t tmp_psize = 0x0; |
shaorui | 0:571a1835428e | 475 | FLASH_Status status = FLASH_COMPLETE2; |
shaorui | 0:571a1835428e | 476 | |
shaorui | 0:571a1835428e | 477 | /* Check the parameters */ |
shaorui | 0:571a1835428e | 478 | assert_param(IS_FLASH_SECTOR(FLASH_Sector)); |
shaorui | 0:571a1835428e | 479 | assert_param(IS_VOLTAGERANGE(VoltageRange)); |
shaorui | 0:571a1835428e | 480 | |
shaorui | 0:571a1835428e | 481 | if(VoltageRange == VoltageRange_1) |
shaorui | 0:571a1835428e | 482 | { |
shaorui | 0:571a1835428e | 483 | tmp_psize = FLASH_PSIZE_BYTE; |
shaorui | 0:571a1835428e | 484 | } |
shaorui | 0:571a1835428e | 485 | else if(VoltageRange == VoltageRange_2) |
shaorui | 0:571a1835428e | 486 | { |
shaorui | 0:571a1835428e | 487 | tmp_psize = FLASH_PSIZE_HALF_WORD; |
shaorui | 0:571a1835428e | 488 | } |
shaorui | 0:571a1835428e | 489 | else if(VoltageRange == VoltageRange_3) |
shaorui | 0:571a1835428e | 490 | { |
shaorui | 0:571a1835428e | 491 | tmp_psize = FLASH_PSIZE_WORD; |
shaorui | 0:571a1835428e | 492 | } |
shaorui | 0:571a1835428e | 493 | else |
shaorui | 0:571a1835428e | 494 | { |
shaorui | 0:571a1835428e | 495 | tmp_psize = FLASH_PSIZE_DOUBLE_WORD; |
shaorui | 0:571a1835428e | 496 | } |
shaorui | 0:571a1835428e | 497 | /* Wait for last operation to be completed */ |
shaorui | 0:571a1835428e | 498 | status = FLASH_WaitForLastOperation2(); |
shaorui | 0:571a1835428e | 499 | |
shaorui | 0:571a1835428e | 500 | if(status == FLASH_COMPLETE2) |
shaorui | 0:571a1835428e | 501 | { |
shaorui | 0:571a1835428e | 502 | /* if the previous operation is completed, proceed to erase the sector */ |
shaorui | 0:571a1835428e | 503 | FLASH->CR &= CR_PSIZE_MASK; |
shaorui | 0:571a1835428e | 504 | FLASH->CR |= tmp_psize; |
shaorui | 0:571a1835428e | 505 | FLASH->CR &= SECTOR_MASK; |
shaorui | 0:571a1835428e | 506 | FLASH->CR |= FLASH_CR_SER | FLASH_Sector; |
shaorui | 0:571a1835428e | 507 | FLASH->CR |= FLASH_CR_STRT; |
shaorui | 0:571a1835428e | 508 | |
shaorui | 0:571a1835428e | 509 | /* Wait for last operation to be completed */ |
shaorui | 0:571a1835428e | 510 | status = FLASH_WaitForLastOperation2(); |
shaorui | 0:571a1835428e | 511 | |
shaorui | 0:571a1835428e | 512 | /* if the erase operation is completed, disable the SER Bit */ |
shaorui | 0:571a1835428e | 513 | FLASH->CR &= (~FLASH_CR_SER); |
shaorui | 0:571a1835428e | 514 | FLASH->CR &= SECTOR_MASK; |
shaorui | 0:571a1835428e | 515 | } |
shaorui | 0:571a1835428e | 516 | /* Return the Erase Status */ |
shaorui | 0:571a1835428e | 517 | return status; |
shaorui | 0:571a1835428e | 518 | } |
shaorui | 0:571a1835428e | 519 | |
shaorui | 0:571a1835428e | 520 | /** |
shaorui | 0:571a1835428e | 521 | * @brief Erases all FLASH Sectors. |
shaorui | 0:571a1835428e | 522 | * |
shaorui | 0:571a1835428e | 523 | * @note If an erase and a program operations are requested simultaneously, |
shaorui | 0:571a1835428e | 524 | * the erase operation is performed before the program one. |
shaorui | 0:571a1835428e | 525 | * |
shaorui | 0:571a1835428e | 526 | * @param VoltageRange: The device voltage range which defines the erase parallelism. |
shaorui | 0:571a1835428e | 527 | * This parameter can be one of the following values: |
shaorui | 0:571a1835428e | 528 | * @arg VoltageRange_1: when the device voltage range is 1.8V to 2.1V, |
shaorui | 0:571a1835428e | 529 | * the operation will be done by byte (8-bit) |
shaorui | 0:571a1835428e | 530 | * @arg VoltageRange_2: when the device voltage range is 2.1V to 2.7V, |
shaorui | 0:571a1835428e | 531 | * the operation will be done by half word (16-bit) |
shaorui | 0:571a1835428e | 532 | * @arg VoltageRange_3: when the device voltage range is 2.7V to 3.6V, |
shaorui | 0:571a1835428e | 533 | * the operation will be done by word (32-bit) |
shaorui | 0:571a1835428e | 534 | * @arg VoltageRange_4: when the device voltage range is 2.7V to 3.6V + External Vpp, |
shaorui | 0:571a1835428e | 535 | * the operation will be done by double word (64-bit) |
shaorui | 0:571a1835428e | 536 | * |
shaorui | 0:571a1835428e | 537 | * @retval FLASH Status: The returned value can be: FLASH_BUSY2, FLASH_ERROR_PROGRAM2, |
shaorui | 0:571a1835428e | 538 | * FLASH_ERROR_WRP2, FLASH_ERROR_OPERATION2 or FLASH_COMPLETE2. |
shaorui | 0:571a1835428e | 539 | */ |
shaorui | 0:571a1835428e | 540 | FLASH_Status FLASH_EraseAllSectors(uint8_t VoltageRange) |
shaorui | 0:571a1835428e | 541 | { |
shaorui | 0:571a1835428e | 542 | uint32_t tmp_psize = 0x0; |
shaorui | 0:571a1835428e | 543 | FLASH_Status status = FLASH_COMPLETE2; |
shaorui | 0:571a1835428e | 544 | |
shaorui | 0:571a1835428e | 545 | /* Wait for last operation to be completed */ |
shaorui | 0:571a1835428e | 546 | status = FLASH_WaitForLastOperation2(); |
shaorui | 0:571a1835428e | 547 | assert_param(IS_VOLTAGERANGE(VoltageRange)); |
shaorui | 0:571a1835428e | 548 | |
shaorui | 0:571a1835428e | 549 | if(VoltageRange == VoltageRange_1) |
shaorui | 0:571a1835428e | 550 | { |
shaorui | 0:571a1835428e | 551 | tmp_psize = FLASH_PSIZE_BYTE; |
shaorui | 0:571a1835428e | 552 | } |
shaorui | 0:571a1835428e | 553 | else if(VoltageRange == VoltageRange_2) |
shaorui | 0:571a1835428e | 554 | { |
shaorui | 0:571a1835428e | 555 | tmp_psize = FLASH_PSIZE_HALF_WORD; |
shaorui | 0:571a1835428e | 556 | } |
shaorui | 0:571a1835428e | 557 | else if(VoltageRange == VoltageRange_3) |
shaorui | 0:571a1835428e | 558 | { |
shaorui | 0:571a1835428e | 559 | tmp_psize = FLASH_PSIZE_WORD; |
shaorui | 0:571a1835428e | 560 | } |
shaorui | 0:571a1835428e | 561 | else |
shaorui | 0:571a1835428e | 562 | { |
shaorui | 0:571a1835428e | 563 | tmp_psize = FLASH_PSIZE_DOUBLE_WORD; |
shaorui | 0:571a1835428e | 564 | } |
shaorui | 0:571a1835428e | 565 | if(status == FLASH_COMPLETE2) |
shaorui | 0:571a1835428e | 566 | { |
shaorui | 0:571a1835428e | 567 | /* if the previous operation is completed, proceed to erase all sectors */ |
shaorui | 0:571a1835428e | 568 | #if defined(STM32F427_437xx) || defined(STM32F429_439xx) || defined(STM32F469_479xx) |
shaorui | 0:571a1835428e | 569 | FLASH->CR &= CR_PSIZE_MASK; |
shaorui | 0:571a1835428e | 570 | FLASH->CR |= tmp_psize; |
shaorui | 0:571a1835428e | 571 | FLASH->CR |= (FLASH_CR_MER1 | FLASH_CR_MER2); |
shaorui | 0:571a1835428e | 572 | FLASH->CR |= FLASH_CR_STRT; |
shaorui | 0:571a1835428e | 573 | |
shaorui | 0:571a1835428e | 574 | /* Wait for last operation to be completed */ |
shaorui | 0:571a1835428e | 575 | status = FLASH_WaitForLastOperation2(); |
shaorui | 0:571a1835428e | 576 | |
shaorui | 0:571a1835428e | 577 | /* if the erase operation is completed, disable the MER Bit */ |
shaorui | 0:571a1835428e | 578 | FLASH->CR &= ~(FLASH_CR_MER1 | FLASH_CR_MER2); |
shaorui | 0:571a1835428e | 579 | #endif /* STM32F427_437xx || STM32F429_439xx || STM32F469_479xx */ |
shaorui | 0:571a1835428e | 580 | |
shaorui | 0:571a1835428e | 581 | #if defined(STM32F40_41xxx) || defined(STM32F401xx) || defined(STM32F410xx) || defined(STM32F411xE) || defined(STM32F412xG) || defined(STM32F446xx) |
shaorui | 0:571a1835428e | 582 | FLASH->CR &= CR_PSIZE_MASK; |
shaorui | 0:571a1835428e | 583 | FLASH->CR |= tmp_psize; |
shaorui | 0:571a1835428e | 584 | FLASH->CR |= FLASH_CR_MER; |
shaorui | 0:571a1835428e | 585 | FLASH->CR |= FLASH_CR_STRT; |
shaorui | 0:571a1835428e | 586 | |
shaorui | 0:571a1835428e | 587 | /* Wait for last operation to be completed */ |
shaorui | 0:571a1835428e | 588 | status = FLASH_WaitForLastOperation2(); |
shaorui | 0:571a1835428e | 589 | |
shaorui | 0:571a1835428e | 590 | /* if the erase operation is completed, disable the MER Bit */ |
shaorui | 0:571a1835428e | 591 | FLASH->CR &= (~FLASH_CR_MER); |
shaorui | 0:571a1835428e | 592 | #endif /* STM32F40_41xxx || STM32F401xx || STM32F410xx || STM32F411xE || STM32F412xG || STM32F446xx */ |
shaorui | 0:571a1835428e | 593 | |
shaorui | 0:571a1835428e | 594 | } |
shaorui | 0:571a1835428e | 595 | /* Return the Erase Status */ |
shaorui | 0:571a1835428e | 596 | return status; |
shaorui | 0:571a1835428e | 597 | } |
shaorui | 0:571a1835428e | 598 | |
shaorui | 0:571a1835428e | 599 | /** |
shaorui | 0:571a1835428e | 600 | * @brief Erases all FLASH Sectors in Bank 1. |
shaorui | 0:571a1835428e | 601 | * |
shaorui | 0:571a1835428e | 602 | * @note This function can be used only for STM32F42xxx/43xxx devices. |
shaorui | 0:571a1835428e | 603 | * |
shaorui | 0:571a1835428e | 604 | * @note If an erase and a program operations are requested simultaneously, |
shaorui | 0:571a1835428e | 605 | * the erase operation is performed before the program one. |
shaorui | 0:571a1835428e | 606 | * |
shaorui | 0:571a1835428e | 607 | * @param VoltageRange: The device voltage range which defines the erase parallelism. |
shaorui | 0:571a1835428e | 608 | * This parameter can be one of the following values: |
shaorui | 0:571a1835428e | 609 | * @arg VoltageRange_1: when the device voltage range is 1.8V to 2.1V, |
shaorui | 0:571a1835428e | 610 | * the operation will be done by byte (8-bit) |
shaorui | 0:571a1835428e | 611 | * @arg VoltageRange_2: when the device voltage range is 2.1V to 2.7V, |
shaorui | 0:571a1835428e | 612 | * the operation will be done by half word (16-bit) |
shaorui | 0:571a1835428e | 613 | * @arg VoltageRange_3: when the device voltage range is 2.7V to 3.6V, |
shaorui | 0:571a1835428e | 614 | * the operation will be done by word (32-bit) |
shaorui | 0:571a1835428e | 615 | * @arg VoltageRange_4: when the device voltage range is 2.7V to 3.6V + External Vpp, |
shaorui | 0:571a1835428e | 616 | * the operation will be done by double word (64-bit) |
shaorui | 0:571a1835428e | 617 | * |
shaorui | 0:571a1835428e | 618 | * @retval FLASH Status: The returned value can be: FLASH_BUSY2, FLASH_ERROR_PROGRAM2, |
shaorui | 0:571a1835428e | 619 | * FLASH_ERROR_WRP2, FLASH_ERROR_OPERATION2 or FLASH_COMPLETE2. |
shaorui | 0:571a1835428e | 620 | */ |
shaorui | 0:571a1835428e | 621 | FLASH_Status FLASH_EraseAllBank1Sectors(uint8_t VoltageRange) |
shaorui | 0:571a1835428e | 622 | { |
shaorui | 0:571a1835428e | 623 | uint32_t tmp_psize = 0x0; |
shaorui | 0:571a1835428e | 624 | FLASH_Status status = FLASH_COMPLETE2; |
shaorui | 0:571a1835428e | 625 | |
shaorui | 0:571a1835428e | 626 | /* Wait for last operation to be completed */ |
shaorui | 0:571a1835428e | 627 | status = FLASH_WaitForLastOperation2(); |
shaorui | 0:571a1835428e | 628 | assert_param(IS_VOLTAGERANGE(VoltageRange)); |
shaorui | 0:571a1835428e | 629 | |
shaorui | 0:571a1835428e | 630 | if(VoltageRange == VoltageRange_1) |
shaorui | 0:571a1835428e | 631 | { |
shaorui | 0:571a1835428e | 632 | tmp_psize = FLASH_PSIZE_BYTE; |
shaorui | 0:571a1835428e | 633 | } |
shaorui | 0:571a1835428e | 634 | else if(VoltageRange == VoltageRange_2) |
shaorui | 0:571a1835428e | 635 | { |
shaorui | 0:571a1835428e | 636 | tmp_psize = FLASH_PSIZE_HALF_WORD; |
shaorui | 0:571a1835428e | 637 | } |
shaorui | 0:571a1835428e | 638 | else if(VoltageRange == VoltageRange_3) |
shaorui | 0:571a1835428e | 639 | { |
shaorui | 0:571a1835428e | 640 | tmp_psize = FLASH_PSIZE_WORD; |
shaorui | 0:571a1835428e | 641 | } |
shaorui | 0:571a1835428e | 642 | else |
shaorui | 0:571a1835428e | 643 | { |
shaorui | 0:571a1835428e | 644 | tmp_psize = FLASH_PSIZE_DOUBLE_WORD; |
shaorui | 0:571a1835428e | 645 | } |
shaorui | 0:571a1835428e | 646 | if(status == FLASH_COMPLETE2) |
shaorui | 0:571a1835428e | 647 | { |
shaorui | 0:571a1835428e | 648 | /* if the previous operation is completed, proceed to erase all sectors */ |
shaorui | 0:571a1835428e | 649 | FLASH->CR &= CR_PSIZE_MASK; |
shaorui | 0:571a1835428e | 650 | FLASH->CR |= tmp_psize; |
shaorui | 0:571a1835428e | 651 | FLASH->CR |= FLASH_CR_MER1; |
shaorui | 0:571a1835428e | 652 | FLASH->CR |= FLASH_CR_STRT; |
shaorui | 0:571a1835428e | 653 | |
shaorui | 0:571a1835428e | 654 | /* Wait for last operation to be completed */ |
shaorui | 0:571a1835428e | 655 | status = FLASH_WaitForLastOperation2(); |
shaorui | 0:571a1835428e | 656 | |
shaorui | 0:571a1835428e | 657 | /* if the erase operation is completed, disable the MER Bit */ |
shaorui | 0:571a1835428e | 658 | FLASH->CR &= (~FLASH_CR_MER1); |
shaorui | 0:571a1835428e | 659 | |
shaorui | 0:571a1835428e | 660 | } |
shaorui | 0:571a1835428e | 661 | /* Return the Erase Status */ |
shaorui | 0:571a1835428e | 662 | return status; |
shaorui | 0:571a1835428e | 663 | } |
shaorui | 0:571a1835428e | 664 | |
shaorui | 0:571a1835428e | 665 | |
shaorui | 0:571a1835428e | 666 | /** |
shaorui | 0:571a1835428e | 667 | * @brief Erases all FLASH Sectors in Bank 2. |
shaorui | 0:571a1835428e | 668 | * |
shaorui | 0:571a1835428e | 669 | * @note This function can be used only for STM32F42xxx/43xxx devices. |
shaorui | 0:571a1835428e | 670 | * |
shaorui | 0:571a1835428e | 671 | * @note If an erase and a program operations are requested simultaneously, |
shaorui | 0:571a1835428e | 672 | * the erase operation is performed before the program one. |
shaorui | 0:571a1835428e | 673 | * |
shaorui | 0:571a1835428e | 674 | * @param VoltageRange: The device voltage range which defines the erase parallelism. |
shaorui | 0:571a1835428e | 675 | * This parameter can be one of the following values: |
shaorui | 0:571a1835428e | 676 | * @arg VoltageRange_1: when the device voltage range is 1.8V to 2.1V, |
shaorui | 0:571a1835428e | 677 | * the operation will be done by byte (8-bit) |
shaorui | 0:571a1835428e | 678 | * @arg VoltageRange_2: when the device voltage range is 2.1V to 2.7V, |
shaorui | 0:571a1835428e | 679 | * the operation will be done by half word (16-bit) |
shaorui | 0:571a1835428e | 680 | * @arg VoltageRange_3: when the device voltage range is 2.7V to 3.6V, |
shaorui | 0:571a1835428e | 681 | * the operation will be done by word (32-bit) |
shaorui | 0:571a1835428e | 682 | * @arg VoltageRange_4: when the device voltage range is 2.7V to 3.6V + External Vpp, |
shaorui | 0:571a1835428e | 683 | * the operation will be done by double word (64-bit) |
shaorui | 0:571a1835428e | 684 | * |
shaorui | 0:571a1835428e | 685 | * @retval FLASH Status: The returned value can be: FLASH_BUSY2, FLASH_ERROR_PROGRAM2, |
shaorui | 0:571a1835428e | 686 | * FLASH_ERROR_WRP2, FLASH_ERROR_OPERATION2 or FLASH_COMPLETE2. |
shaorui | 0:571a1835428e | 687 | */ |
shaorui | 0:571a1835428e | 688 | FLASH_Status FLASH_EraseAllBank2Sectors(uint8_t VoltageRange) |
shaorui | 0:571a1835428e | 689 | { |
shaorui | 0:571a1835428e | 690 | uint32_t tmp_psize = 0x0; |
shaorui | 0:571a1835428e | 691 | FLASH_Status status = FLASH_COMPLETE2; |
shaorui | 0:571a1835428e | 692 | |
shaorui | 0:571a1835428e | 693 | /* Wait for last operation to be completed */ |
shaorui | 0:571a1835428e | 694 | status = FLASH_WaitForLastOperation2(); |
shaorui | 0:571a1835428e | 695 | assert_param(IS_VOLTAGERANGE(VoltageRange)); |
shaorui | 0:571a1835428e | 696 | |
shaorui | 0:571a1835428e | 697 | if(VoltageRange == VoltageRange_1) |
shaorui | 0:571a1835428e | 698 | { |
shaorui | 0:571a1835428e | 699 | tmp_psize = FLASH_PSIZE_BYTE; |
shaorui | 0:571a1835428e | 700 | } |
shaorui | 0:571a1835428e | 701 | else if(VoltageRange == VoltageRange_2) |
shaorui | 0:571a1835428e | 702 | { |
shaorui | 0:571a1835428e | 703 | tmp_psize = FLASH_PSIZE_HALF_WORD; |
shaorui | 0:571a1835428e | 704 | } |
shaorui | 0:571a1835428e | 705 | else if(VoltageRange == VoltageRange_3) |
shaorui | 0:571a1835428e | 706 | { |
shaorui | 0:571a1835428e | 707 | tmp_psize = FLASH_PSIZE_WORD; |
shaorui | 0:571a1835428e | 708 | } |
shaorui | 0:571a1835428e | 709 | else |
shaorui | 0:571a1835428e | 710 | { |
shaorui | 0:571a1835428e | 711 | tmp_psize = FLASH_PSIZE_DOUBLE_WORD; |
shaorui | 0:571a1835428e | 712 | } |
shaorui | 0:571a1835428e | 713 | if(status == FLASH_COMPLETE2) |
shaorui | 0:571a1835428e | 714 | { |
shaorui | 0:571a1835428e | 715 | /* if the previous operation is completed, proceed to erase all sectors */ |
shaorui | 0:571a1835428e | 716 | FLASH->CR &= CR_PSIZE_MASK; |
shaorui | 0:571a1835428e | 717 | FLASH->CR |= tmp_psize; |
shaorui | 0:571a1835428e | 718 | FLASH->CR |= FLASH_CR_MER2; |
shaorui | 0:571a1835428e | 719 | FLASH->CR |= FLASH_CR_STRT; |
shaorui | 0:571a1835428e | 720 | |
shaorui | 0:571a1835428e | 721 | /* Wait for last operation to be completed */ |
shaorui | 0:571a1835428e | 722 | status = FLASH_WaitForLastOperation2(); |
shaorui | 0:571a1835428e | 723 | |
shaorui | 0:571a1835428e | 724 | /* if the erase operation is completed, disable the MER Bit */ |
shaorui | 0:571a1835428e | 725 | FLASH->CR &= (~FLASH_CR_MER2); |
shaorui | 0:571a1835428e | 726 | |
shaorui | 0:571a1835428e | 727 | } |
shaorui | 0:571a1835428e | 728 | /* Return the Erase Status */ |
shaorui | 0:571a1835428e | 729 | return status; |
shaorui | 0:571a1835428e | 730 | } |
shaorui | 0:571a1835428e | 731 | |
shaorui | 0:571a1835428e | 732 | /** |
shaorui | 0:571a1835428e | 733 | * @brief Programs a double word (64-bit) at a specified address. |
shaorui | 0:571a1835428e | 734 | * @note This function must be used when the device voltage range is from |
shaorui | 0:571a1835428e | 735 | * 2.7V to 3.6V and an External Vpp is present. |
shaorui | 0:571a1835428e | 736 | * |
shaorui | 0:571a1835428e | 737 | * @note If an erase and a program operations are requested simultaneously, |
shaorui | 0:571a1835428e | 738 | * the erase operation is performed before the program one. |
shaorui | 0:571a1835428e | 739 | * |
shaorui | 0:571a1835428e | 740 | * @param Address: specifies the address to be programmed. |
shaorui | 0:571a1835428e | 741 | * @param Data: specifies the data to be programmed. |
shaorui | 0:571a1835428e | 742 | * @retval FLASH Status: The returned value can be: FLASH_BUSY2, FLASH_ERROR_PROGRAM2, |
shaorui | 0:571a1835428e | 743 | * FLASH_ERROR_WRP2, FLASH_ERROR_OPERATION2 or FLASH_COMPLETE2. |
shaorui | 0:571a1835428e | 744 | */ |
shaorui | 0:571a1835428e | 745 | FLASH_Status FLASH_ProgramDoubleWord(uint32_t Address, uint64_t Data) |
shaorui | 0:571a1835428e | 746 | { |
shaorui | 0:571a1835428e | 747 | FLASH_Status status = FLASH_COMPLETE2; |
shaorui | 0:571a1835428e | 748 | |
shaorui | 0:571a1835428e | 749 | /* Check the parameters */ |
shaorui | 0:571a1835428e | 750 | assert_param(IS_FLASH_ADDRESS(Address)); |
shaorui | 0:571a1835428e | 751 | |
shaorui | 0:571a1835428e | 752 | /* Wait for last operation to be completed */ |
shaorui | 0:571a1835428e | 753 | status = FLASH_WaitForLastOperation2(); |
shaorui | 0:571a1835428e | 754 | |
shaorui | 0:571a1835428e | 755 | if(status == FLASH_COMPLETE2) |
shaorui | 0:571a1835428e | 756 | { |
shaorui | 0:571a1835428e | 757 | /* if the previous operation is completed, proceed to program the new data */ |
shaorui | 0:571a1835428e | 758 | FLASH->CR &= CR_PSIZE_MASK; |
shaorui | 0:571a1835428e | 759 | FLASH->CR |= FLASH_PSIZE_DOUBLE_WORD; |
shaorui | 0:571a1835428e | 760 | FLASH->CR |= FLASH_CR_PG; |
shaorui | 0:571a1835428e | 761 | |
shaorui | 0:571a1835428e | 762 | *(__IO uint64_t*)Address = Data; |
shaorui | 0:571a1835428e | 763 | |
shaorui | 0:571a1835428e | 764 | /* Wait for last operation to be completed */ |
shaorui | 0:571a1835428e | 765 | status = FLASH_WaitForLastOperation2(); |
shaorui | 0:571a1835428e | 766 | |
shaorui | 0:571a1835428e | 767 | /* if the program operation is completed, disable the PG Bit */ |
shaorui | 0:571a1835428e | 768 | FLASH->CR &= (~FLASH_CR_PG); |
shaorui | 0:571a1835428e | 769 | } |
shaorui | 0:571a1835428e | 770 | /* Return the Program Status */ |
shaorui | 0:571a1835428e | 771 | return status; |
shaorui | 0:571a1835428e | 772 | } |
shaorui | 0:571a1835428e | 773 | |
shaorui | 0:571a1835428e | 774 | /** |
shaorui | 0:571a1835428e | 775 | * @brief Programs a word (32-bit) at a specified address. |
shaorui | 0:571a1835428e | 776 | * |
shaorui | 0:571a1835428e | 777 | * @note This function must be used when the device voltage range is from 2.7V to 3.6V. |
shaorui | 0:571a1835428e | 778 | * |
shaorui | 0:571a1835428e | 779 | * @note If an erase and a program operations are requested simultaneously, |
shaorui | 0:571a1835428e | 780 | * the erase operation is performed before the program one. |
shaorui | 0:571a1835428e | 781 | * |
shaorui | 0:571a1835428e | 782 | * @param Address: specifies the address to be programmed. |
shaorui | 0:571a1835428e | 783 | * This parameter can be any address in Program memory zone or in OTP zone. |
shaorui | 0:571a1835428e | 784 | * @param Data: specifies the data to be programmed. |
shaorui | 0:571a1835428e | 785 | * @retval FLASH Status: The returned value can be: FLASH_BUSY2, FLASH_ERROR_PROGRAM2, |
shaorui | 0:571a1835428e | 786 | * FLASH_ERROR_WRP2, FLASH_ERROR_OPERATION2 or FLASH_COMPLETE2. |
shaorui | 0:571a1835428e | 787 | */ |
shaorui | 0:571a1835428e | 788 | FLASH_Status FLASH_ProgramWord(uint32_t Address, uint32_t Data) |
shaorui | 0:571a1835428e | 789 | { |
shaorui | 0:571a1835428e | 790 | FLASH_Status status = FLASH_COMPLETE2; |
shaorui | 0:571a1835428e | 791 | |
shaorui | 0:571a1835428e | 792 | /* Check the parameters */ |
shaorui | 0:571a1835428e | 793 | assert_param(IS_FLASH_ADDRESS(Address)); |
shaorui | 0:571a1835428e | 794 | |
shaorui | 0:571a1835428e | 795 | /* Wait for last operation to be completed */ |
shaorui | 0:571a1835428e | 796 | status = FLASH_WaitForLastOperation2(); |
shaorui | 0:571a1835428e | 797 | |
shaorui | 0:571a1835428e | 798 | if(status == FLASH_COMPLETE2) |
shaorui | 0:571a1835428e | 799 | { |
shaorui | 0:571a1835428e | 800 | /* if the previous operation is completed, proceed to program the new data */ |
shaorui | 0:571a1835428e | 801 | FLASH->CR &= CR_PSIZE_MASK; |
shaorui | 0:571a1835428e | 802 | FLASH->CR |= FLASH_PSIZE_WORD; |
shaorui | 0:571a1835428e | 803 | FLASH->CR |= FLASH_CR_PG; |
shaorui | 0:571a1835428e | 804 | |
shaorui | 0:571a1835428e | 805 | *(__IO uint32_t*)Address = Data; |
shaorui | 0:571a1835428e | 806 | |
shaorui | 0:571a1835428e | 807 | /* Wait for last operation to be completed */ |
shaorui | 0:571a1835428e | 808 | status = FLASH_WaitForLastOperation2(); |
shaorui | 0:571a1835428e | 809 | |
shaorui | 0:571a1835428e | 810 | /* if the program operation is completed, disable the PG Bit */ |
shaorui | 0:571a1835428e | 811 | FLASH->CR &= (~FLASH_CR_PG); |
shaorui | 0:571a1835428e | 812 | } |
shaorui | 0:571a1835428e | 813 | /* Return the Program Status */ |
shaorui | 0:571a1835428e | 814 | return status; |
shaorui | 0:571a1835428e | 815 | } |
shaorui | 0:571a1835428e | 816 | |
shaorui | 0:571a1835428e | 817 | /** |
shaorui | 0:571a1835428e | 818 | * @brief Programs a half word (16-bit) at a specified address. |
shaorui | 0:571a1835428e | 819 | * @note This function must be used when the device voltage range is from 2.1V to 3.6V. |
shaorui | 0:571a1835428e | 820 | * |
shaorui | 0:571a1835428e | 821 | * @note If an erase and a program operations are requested simultaneously, |
shaorui | 0:571a1835428e | 822 | * the erase operation is performed before the program one. |
shaorui | 0:571a1835428e | 823 | * |
shaorui | 0:571a1835428e | 824 | * @param Address: specifies the address to be programmed. |
shaorui | 0:571a1835428e | 825 | * This parameter can be any address in Program memory zone or in OTP zone. |
shaorui | 0:571a1835428e | 826 | * @param Data: specifies the data to be programmed. |
shaorui | 0:571a1835428e | 827 | * @retval FLASH Status: The returned value can be: FLASH_BUSY2, FLASH_ERROR_PROGRAM2, |
shaorui | 0:571a1835428e | 828 | * FLASH_ERROR_WRP2, FLASH_ERROR_OPERATION2 or FLASH_COMPLETE2. |
shaorui | 0:571a1835428e | 829 | */ |
shaorui | 0:571a1835428e | 830 | FLASH_Status FLASH_ProgramHalfWord(uint32_t Address, uint16_t Data) |
shaorui | 0:571a1835428e | 831 | { |
shaorui | 0:571a1835428e | 832 | FLASH_Status status = FLASH_COMPLETE2; |
shaorui | 0:571a1835428e | 833 | |
shaorui | 0:571a1835428e | 834 | /* Check the parameters */ |
shaorui | 0:571a1835428e | 835 | assert_param(IS_FLASH_ADDRESS(Address)); |
shaorui | 0:571a1835428e | 836 | |
shaorui | 0:571a1835428e | 837 | /* Wait for last operation to be completed */ |
shaorui | 0:571a1835428e | 838 | status = FLASH_WaitForLastOperation2(); |
shaorui | 0:571a1835428e | 839 | |
shaorui | 0:571a1835428e | 840 | if(status == FLASH_COMPLETE2) |
shaorui | 0:571a1835428e | 841 | { |
shaorui | 0:571a1835428e | 842 | /* if the previous operation is completed, proceed to program the new data */ |
shaorui | 0:571a1835428e | 843 | FLASH->CR &= CR_PSIZE_MASK; |
shaorui | 0:571a1835428e | 844 | FLASH->CR |= FLASH_PSIZE_HALF_WORD; |
shaorui | 0:571a1835428e | 845 | FLASH->CR |= FLASH_CR_PG; |
shaorui | 0:571a1835428e | 846 | |
shaorui | 0:571a1835428e | 847 | *(__IO uint16_t*)Address = Data; |
shaorui | 0:571a1835428e | 848 | |
shaorui | 0:571a1835428e | 849 | /* Wait for last operation to be completed */ |
shaorui | 0:571a1835428e | 850 | status = FLASH_WaitForLastOperation2(); |
shaorui | 0:571a1835428e | 851 | |
shaorui | 0:571a1835428e | 852 | /* if the program operation is completed, disable the PG Bit */ |
shaorui | 0:571a1835428e | 853 | FLASH->CR &= (~FLASH_CR_PG); |
shaorui | 0:571a1835428e | 854 | } |
shaorui | 0:571a1835428e | 855 | /* Return the Program Status */ |
shaorui | 0:571a1835428e | 856 | return status; |
shaorui | 0:571a1835428e | 857 | } |
shaorui | 0:571a1835428e | 858 | |
shaorui | 0:571a1835428e | 859 | /** |
shaorui | 0:571a1835428e | 860 | * @brief Programs a byte (8-bit) at a specified address. |
shaorui | 0:571a1835428e | 861 | * @note This function can be used within all the device supply voltage ranges. |
shaorui | 0:571a1835428e | 862 | * |
shaorui | 0:571a1835428e | 863 | * @note If an erase and a program operations are requested simultaneously, |
shaorui | 0:571a1835428e | 864 | * the erase operation is performed before the program one. |
shaorui | 0:571a1835428e | 865 | * |
shaorui | 0:571a1835428e | 866 | * @param Address: specifies the address to be programmed. |
shaorui | 0:571a1835428e | 867 | * This parameter can be any address in Program memory zone or in OTP zone. |
shaorui | 0:571a1835428e | 868 | * @param Data: specifies the data to be programmed. |
shaorui | 0:571a1835428e | 869 | * @retval FLASH Status: The returned value can be: FLASH_BUSY2, FLASH_ERROR_PROGRAM2, |
shaorui | 0:571a1835428e | 870 | * FLASH_ERROR_WRP2, FLASH_ERROR_OPERATION2 or FLASH_COMPLETE2. |
shaorui | 0:571a1835428e | 871 | */ |
shaorui | 0:571a1835428e | 872 | FLASH_Status FLASH_ProgramByte(uint32_t Address, uint8_t Data) |
shaorui | 0:571a1835428e | 873 | { |
shaorui | 0:571a1835428e | 874 | FLASH_Status status = FLASH_COMPLETE2; |
shaorui | 0:571a1835428e | 875 | |
shaorui | 0:571a1835428e | 876 | /* Check the parameters */ |
shaorui | 0:571a1835428e | 877 | assert_param(IS_FLASH_ADDRESS(Address)); |
shaorui | 0:571a1835428e | 878 | |
shaorui | 0:571a1835428e | 879 | /* Wait for last operation to be completed */ |
shaorui | 0:571a1835428e | 880 | status = FLASH_WaitForLastOperation2(); |
shaorui | 0:571a1835428e | 881 | |
shaorui | 0:571a1835428e | 882 | if(status == FLASH_COMPLETE2) |
shaorui | 0:571a1835428e | 883 | { |
shaorui | 0:571a1835428e | 884 | /* if the previous operation is completed, proceed to program the new data */ |
shaorui | 0:571a1835428e | 885 | FLASH->CR &= CR_PSIZE_MASK; |
shaorui | 0:571a1835428e | 886 | FLASH->CR |= FLASH_PSIZE_BYTE; |
shaorui | 0:571a1835428e | 887 | FLASH->CR |= FLASH_CR_PG; |
shaorui | 0:571a1835428e | 888 | |
shaorui | 0:571a1835428e | 889 | *(__IO uint8_t*)Address = Data; |
shaorui | 0:571a1835428e | 890 | |
shaorui | 0:571a1835428e | 891 | /* Wait for last operation to be completed */ |
shaorui | 0:571a1835428e | 892 | status = FLASH_WaitForLastOperation2(); |
shaorui | 0:571a1835428e | 893 | |
shaorui | 0:571a1835428e | 894 | /* if the program operation is completed, disable the PG Bit */ |
shaorui | 0:571a1835428e | 895 | FLASH->CR &= (~FLASH_CR_PG); |
shaorui | 0:571a1835428e | 896 | } |
shaorui | 0:571a1835428e | 897 | |
shaorui | 0:571a1835428e | 898 | /* Return the Program Status */ |
shaorui | 0:571a1835428e | 899 | return status; |
shaorui | 0:571a1835428e | 900 | } |
shaorui | 0:571a1835428e | 901 | |
shaorui | 0:571a1835428e | 902 | /** |
shaorui | 0:571a1835428e | 903 | * @} |
shaorui | 0:571a1835428e | 904 | */ |
shaorui | 0:571a1835428e | 905 | |
shaorui | 0:571a1835428e | 906 | /** @defgroup FLASH_Group3 Option Bytes Programming functions |
shaorui | 0:571a1835428e | 907 | * @brief Option Bytes Programming functions |
shaorui | 0:571a1835428e | 908 | * |
shaorui | 0:571a1835428e | 909 | @verbatim |
shaorui | 0:571a1835428e | 910 | =============================================================================== |
shaorui | 0:571a1835428e | 911 | ##### Option Bytes Programming functions ##### |
shaorui | 0:571a1835428e | 912 | =============================================================================== |
shaorui | 0:571a1835428e | 913 | [..] |
shaorui | 0:571a1835428e | 914 | This group includes the following functions: |
shaorui | 0:571a1835428e | 915 | (+) void FLASH_OB_Unlock(void) |
shaorui | 0:571a1835428e | 916 | (+) void FLASH_OB_Lock(void) |
shaorui | 0:571a1835428e | 917 | (+) void FLASH_OB_WRPConfig(uint32_t OB_WRP, FunctionalState NewState) |
shaorui | 0:571a1835428e | 918 | (+) void FLASH_OB_WRP1Config(uint32_t OB_WRP, FunctionalState NewState) |
shaorui | 0:571a1835428e | 919 | (+) void FLASH_OB_PCROPSelectionConfig(uint8_t OB_PCROPSelect) |
shaorui | 0:571a1835428e | 920 | (+) void FLASH_OB_PCROPConfig(uint32_t OB_PCROP, FunctionalState NewState) |
shaorui | 0:571a1835428e | 921 | (+) void FLASH_OB_PCROP1Config(uint32_t OB_PCROP, FunctionalState NewState) |
shaorui | 0:571a1835428e | 922 | (+) void FLASH_OB_RDPConfig(uint8_t OB_RDP) |
shaorui | 0:571a1835428e | 923 | (+) void FLASH_OB_UserConfig(uint8_t OB_IWDG, uint8_t OB_STOP, uint8_t OB_STDBY) |
shaorui | 0:571a1835428e | 924 | (+) void FLASH_OB_BORConfig(uint8_t OB_BOR) |
shaorui | 0:571a1835428e | 925 | (+) FLASH_Status FLASH_ProgramOTP(uint32_t Address, uint32_t Data) |
shaorui | 0:571a1835428e | 926 | (+) FLASH_Status FLASH_OB_Launch(void) |
shaorui | 0:571a1835428e | 927 | (+) uint32_t FLASH_OB_GetUser(void) |
shaorui | 0:571a1835428e | 928 | (+) uint8_t FLASH_OB_GetWRP(void) |
shaorui | 0:571a1835428e | 929 | (+) uint8_t FLASH_OB_GetWRP1(void) |
shaorui | 0:571a1835428e | 930 | (+) uint8_t FLASH_OB_GetPCROP(void) |
shaorui | 0:571a1835428e | 931 | (+) uint8_t FLASH_OB_GetPCROP1(void) |
shaorui | 0:571a1835428e | 932 | (+) uint8_t FLASH_OB_GetRDP(void) |
shaorui | 0:571a1835428e | 933 | (+) uint8_t FLASH_OB_GetBOR(void) |
shaorui | 0:571a1835428e | 934 | [..] |
shaorui | 0:571a1835428e | 935 | The following function can be used only for STM32F42xxx/43xxx devices. |
shaorui | 0:571a1835428e | 936 | (+) void FLASH_OB_BootConfig(uint8_t OB_BOOT) |
shaorui | 0:571a1835428e | 937 | [..] |
shaorui | 0:571a1835428e | 938 | Any operation of erase or program should follow these steps: |
shaorui | 0:571a1835428e | 939 | (#) Call the FLASH_OB_Unlock() function to enable the FLASH option control |
shaorui | 0:571a1835428e | 940 | register access |
shaorui | 0:571a1835428e | 941 | |
shaorui | 0:571a1835428e | 942 | (#) Call one or several functions to program the desired Option Bytes: |
shaorui | 0:571a1835428e | 943 | (++) void FLASH_OB_WRPConfig(uint32_t OB_WRP, FunctionalState NewState) |
shaorui | 0:571a1835428e | 944 | => to Enable/Disable the desired sector write protection |
shaorui | 0:571a1835428e | 945 | (++) void FLASH_OB_RDPConfig(uint8_t OB_RDP) => to set the desired read |
shaorui | 0:571a1835428e | 946 | Protection Level |
shaorui | 0:571a1835428e | 947 | (++) void FLASH_OB_UserConfig(uint8_t OB_IWDG, uint8_t OB_STOP, uint8_t OB_STDBY) |
shaorui | 0:571a1835428e | 948 | => to configure the user Option Bytes. |
shaorui | 0:571a1835428e | 949 | (++) void FLASH_OB_BORConfig(uint8_t OB_BOR) => to set the BOR Level |
shaorui | 0:571a1835428e | 950 | |
shaorui | 0:571a1835428e | 951 | (#) Once all needed Option Bytes to be programmed are correctly written, |
shaorui | 0:571a1835428e | 952 | call the FLASH_OB_Launch() function to launch the Option Bytes |
shaorui | 0:571a1835428e | 953 | programming process. |
shaorui | 0:571a1835428e | 954 | |
shaorui | 0:571a1835428e | 955 | -@- When changing the IWDG mode from HW to SW or from SW to HW, a system |
shaorui | 0:571a1835428e | 956 | reset is needed to make the change effective. |
shaorui | 0:571a1835428e | 957 | |
shaorui | 0:571a1835428e | 958 | (#) Call the FLASH_OB_Lock() function to disable the FLASH option control |
shaorui | 0:571a1835428e | 959 | register access (recommended to protect the Option Bytes against |
shaorui | 0:571a1835428e | 960 | possible unwanted operations) |
shaorui | 0:571a1835428e | 961 | |
shaorui | 0:571a1835428e | 962 | @endverbatim |
shaorui | 0:571a1835428e | 963 | * @{ |
shaorui | 0:571a1835428e | 964 | */ |
shaorui | 0:571a1835428e | 965 | |
shaorui | 0:571a1835428e | 966 | /** |
shaorui | 0:571a1835428e | 967 | * @brief Unlocks the FLASH Option Control Registers access. |
shaorui | 0:571a1835428e | 968 | * @param None |
shaorui | 0:571a1835428e | 969 | * @retval None |
shaorui | 0:571a1835428e | 970 | */ |
shaorui | 0:571a1835428e | 971 | void FLASH_OB_Unlock(void) |
shaorui | 0:571a1835428e | 972 | { |
shaorui | 0:571a1835428e | 973 | if((FLASH->OPTCR & FLASH_OPTCR_OPTLOCK) != RESET) |
shaorui | 0:571a1835428e | 974 | { |
shaorui | 0:571a1835428e | 975 | /* Authorizes the Option Byte register programming */ |
shaorui | 0:571a1835428e | 976 | FLASH->OPTKEYR = FLASH_OPT_KEY1; |
shaorui | 0:571a1835428e | 977 | FLASH->OPTKEYR = FLASH_OPT_KEY2; |
shaorui | 0:571a1835428e | 978 | } |
shaorui | 0:571a1835428e | 979 | } |
shaorui | 0:571a1835428e | 980 | |
shaorui | 0:571a1835428e | 981 | /** |
shaorui | 0:571a1835428e | 982 | * @brief Locks the FLASH Option Control Registers access. |
shaorui | 0:571a1835428e | 983 | * @param None |
shaorui | 0:571a1835428e | 984 | * @retval None |
shaorui | 0:571a1835428e | 985 | */ |
shaorui | 0:571a1835428e | 986 | void FLASH_OB_Lock(void) |
shaorui | 0:571a1835428e | 987 | { |
shaorui | 0:571a1835428e | 988 | /* Set the OPTLOCK Bit to lock the FLASH Option Byte Registers access */ |
shaorui | 0:571a1835428e | 989 | FLASH->OPTCR |= FLASH_OPTCR_OPTLOCK; |
shaorui | 0:571a1835428e | 990 | } |
shaorui | 0:571a1835428e | 991 | |
shaorui | 0:571a1835428e | 992 | /** |
shaorui | 0:571a1835428e | 993 | * @brief Enables or disables the write protection of the desired sectors, for the first |
shaorui | 0:571a1835428e | 994 | * 1 Mb of the Flash |
shaorui | 0:571a1835428e | 995 | * |
shaorui | 0:571a1835428e | 996 | * @note When the memory read protection level is selected (RDP level = 1), |
shaorui | 0:571a1835428e | 997 | * it is not possible to program or erase the flash sector i if CortexM4 |
shaorui | 0:571a1835428e | 998 | * debug features are connected or boot code is executed in RAM, even if nWRPi = 1 |
shaorui | 0:571a1835428e | 999 | * @note Active value of nWRPi bits is inverted when PCROP mode is active (SPRMOD =1). |
shaorui | 0:571a1835428e | 1000 | * |
shaorui | 0:571a1835428e | 1001 | * @param OB_WRP: specifies the sector(s) to be write protected or unprotected. |
shaorui | 0:571a1835428e | 1002 | * This parameter can be one of the following values: |
shaorui | 0:571a1835428e | 1003 | * @arg OB_WRP: A value between OB_WRP_Sector0 and OB_WRP_Sector11 |
shaorui | 0:571a1835428e | 1004 | * @arg OB_WRP_Sector_All |
shaorui | 0:571a1835428e | 1005 | * @param Newstate: new state of the Write Protection. |
shaorui | 0:571a1835428e | 1006 | * This parameter can be: ENABLE or DISABLE. |
shaorui | 0:571a1835428e | 1007 | * @retval None |
shaorui | 0:571a1835428e | 1008 | */ |
shaorui | 0:571a1835428e | 1009 | void FLASH_OB_WRPConfig(uint32_t OB_WRP, FunctionalState NewState) |
shaorui | 0:571a1835428e | 1010 | { |
shaorui | 0:571a1835428e | 1011 | FLASH_Status status = FLASH_COMPLETE2; |
shaorui | 0:571a1835428e | 1012 | |
shaorui | 0:571a1835428e | 1013 | /* Check the parameters */ |
shaorui | 0:571a1835428e | 1014 | assert_param(IS_OB_WRP(OB_WRP)); |
shaorui | 0:571a1835428e | 1015 | assert_param(IS_FUNCTIONAL_STATE(NewState)); |
shaorui | 0:571a1835428e | 1016 | |
shaorui | 0:571a1835428e | 1017 | status = FLASH_WaitForLastOperation2(); |
shaorui | 0:571a1835428e | 1018 | |
shaorui | 0:571a1835428e | 1019 | if(status == FLASH_COMPLETE2) |
shaorui | 0:571a1835428e | 1020 | { |
shaorui | 0:571a1835428e | 1021 | if(NewState != DISABLE) |
shaorui | 0:571a1835428e | 1022 | { |
shaorui | 0:571a1835428e | 1023 | *(__IO uint16_t*)OPTCR_BYTE2_ADDRESS &= (~OB_WRP); |
shaorui | 0:571a1835428e | 1024 | } |
shaorui | 0:571a1835428e | 1025 | else |
shaorui | 0:571a1835428e | 1026 | { |
shaorui | 0:571a1835428e | 1027 | *(__IO uint16_t*)OPTCR_BYTE2_ADDRESS |= (uint16_t)OB_WRP; |
shaorui | 0:571a1835428e | 1028 | } |
shaorui | 0:571a1835428e | 1029 | } |
shaorui | 0:571a1835428e | 1030 | } |
shaorui | 0:571a1835428e | 1031 | |
shaorui | 0:571a1835428e | 1032 | /** |
shaorui | 0:571a1835428e | 1033 | * @brief Enables or disables the write protection of the desired sectors, for the second |
shaorui | 0:571a1835428e | 1034 | * 1 Mb of the Flash |
shaorui | 0:571a1835428e | 1035 | * |
shaorui | 0:571a1835428e | 1036 | * @note This function can be used only for STM32F42xxx/43xxx devices. |
shaorui | 0:571a1835428e | 1037 | * |
shaorui | 0:571a1835428e | 1038 | * @note When the memory read out protection is selected (RDP level = 1), |
shaorui | 0:571a1835428e | 1039 | * it is not possible to program or erase the flash sector i if CortexM4 |
shaorui | 0:571a1835428e | 1040 | * debug features are connected or boot code is executed in RAM, even if nWRPi = 1 |
shaorui | 0:571a1835428e | 1041 | * @note Active value of nWRPi bits is inverted when PCROP mode is active (SPRMOD =1). |
shaorui | 0:571a1835428e | 1042 | * |
shaorui | 0:571a1835428e | 1043 | * @param OB_WRP: specifies the sector(s) to be write protected or unprotected. |
shaorui | 0:571a1835428e | 1044 | * This parameter can be one of the following values: |
shaorui | 0:571a1835428e | 1045 | * @arg OB_WRP: A value between OB_WRP_Sector12 and OB_WRP_Sector23 |
shaorui | 0:571a1835428e | 1046 | * @arg OB_WRP_Sector_All |
shaorui | 0:571a1835428e | 1047 | * @param Newstate: new state of the Write Protection. |
shaorui | 0:571a1835428e | 1048 | * This parameter can be: ENABLE or DISABLE. |
shaorui | 0:571a1835428e | 1049 | * @retval None |
shaorui | 0:571a1835428e | 1050 | */ |
shaorui | 0:571a1835428e | 1051 | void FLASH_OB_WRP1Config(uint32_t OB_WRP, FunctionalState NewState) |
shaorui | 0:571a1835428e | 1052 | { |
shaorui | 0:571a1835428e | 1053 | FLASH_Status status = FLASH_COMPLETE2; |
shaorui | 0:571a1835428e | 1054 | |
shaorui | 0:571a1835428e | 1055 | /* Check the parameters */ |
shaorui | 0:571a1835428e | 1056 | assert_param(IS_OB_WRP(OB_WRP)); |
shaorui | 0:571a1835428e | 1057 | assert_param(IS_FUNCTIONAL_STATE(NewState)); |
shaorui | 0:571a1835428e | 1058 | |
shaorui | 0:571a1835428e | 1059 | status = FLASH_WaitForLastOperation2(); |
shaorui | 0:571a1835428e | 1060 | |
shaorui | 0:571a1835428e | 1061 | if(status == FLASH_COMPLETE2) |
shaorui | 0:571a1835428e | 1062 | { |
shaorui | 0:571a1835428e | 1063 | if(NewState != DISABLE) |
shaorui | 0:571a1835428e | 1064 | { |
shaorui | 0:571a1835428e | 1065 | *(__IO uint16_t*)OPTCR1_BYTE2_ADDRESS &= (~OB_WRP); |
shaorui | 0:571a1835428e | 1066 | } |
shaorui | 0:571a1835428e | 1067 | else |
shaorui | 0:571a1835428e | 1068 | { |
shaorui | 0:571a1835428e | 1069 | *(__IO uint16_t*)OPTCR1_BYTE2_ADDRESS |= (uint16_t)OB_WRP; |
shaorui | 0:571a1835428e | 1070 | } |
shaorui | 0:571a1835428e | 1071 | } |
shaorui | 0:571a1835428e | 1072 | } |
shaorui | 0:571a1835428e | 1073 | |
shaorui | 0:571a1835428e | 1074 | /** |
shaorui | 0:571a1835428e | 1075 | * @brief Select the Protection Mode (SPRMOD). |
shaorui | 0:571a1835428e | 1076 | * |
shaorui | 0:571a1835428e | 1077 | * @note This function can be used only for STM32F42xxx/43xxx and STM32F401xx/411xE devices. |
shaorui | 0:571a1835428e | 1078 | * |
shaorui | 0:571a1835428e | 1079 | * @note After PCROP activation, Option Byte modification is not possible. |
shaorui | 0:571a1835428e | 1080 | * Exception made for the global Read Out Protection modification level (level1 to level0) |
shaorui | 0:571a1835428e | 1081 | * @note Once SPRMOD bit is active unprotection of a protected sector is not possible |
shaorui | 0:571a1835428e | 1082 | * |
shaorui | 0:571a1835428e | 1083 | * @note Read a protected sector will set RDERR Flag and write a protected sector will set WRPERR Flag |
shaorui | 0:571a1835428e | 1084 | * |
shaorui | 0:571a1835428e | 1085 | * @note Some Precautions should be taken when activating the PCROP feature : |
shaorui | 0:571a1835428e | 1086 | * The active value of nWRPi bits is inverted when PCROP mode is active, this means if SPRMOD = 1 |
shaorui | 0:571a1835428e | 1087 | * and WRPi = 1 (default value), then the user sector i is read/write protected. |
shaorui | 0:571a1835428e | 1088 | * In order to avoid activation of PCROP Mode for undesired sectors, please follow the |
shaorui | 0:571a1835428e | 1089 | * below safety sequence : |
shaorui | 0:571a1835428e | 1090 | * - Disable PCROP for all Sectors using FLASH_OB_PCROPConfig(OB_PCROP_Sector_All, DISABLE) function |
shaorui | 0:571a1835428e | 1091 | * for Bank1 or FLASH_OB_PCROP1Config(OB_PCROP_Sector_All, DISABLE) function for Bank2 |
shaorui | 0:571a1835428e | 1092 | * - Enable PCROP for the desired Sector i using FLASH_OB_PCROPConfig(Sector i, ENABLE) function |
shaorui | 0:571a1835428e | 1093 | * - Activate the PCROP Mode FLASH_OB_PCROPSelectionConfig() function. |
shaorui | 0:571a1835428e | 1094 | * |
shaorui | 0:571a1835428e | 1095 | * @param OB_PCROP: Select the Protection Mode of nWPRi bits |
shaorui | 0:571a1835428e | 1096 | * This parameter can be one of the following values: |
shaorui | 0:571a1835428e | 1097 | * @arg OB_PcROP_Disable: nWRPi control the write protection of respective user sectors. |
shaorui | 0:571a1835428e | 1098 | * @arg OB_PcROP_Enable: nWRPi control the read&write protection (PCROP) of respective user sectors. |
shaorui | 0:571a1835428e | 1099 | * @retval None |
shaorui | 0:571a1835428e | 1100 | */ |
shaorui | 0:571a1835428e | 1101 | void FLASH_OB_PCROPSelectionConfig(uint8_t OB_PcROP) |
shaorui | 0:571a1835428e | 1102 | { |
shaorui | 0:571a1835428e | 1103 | uint8_t optiontmp = 0xFF; |
shaorui | 0:571a1835428e | 1104 | |
shaorui | 0:571a1835428e | 1105 | /* Check the parameters */ |
shaorui | 0:571a1835428e | 1106 | assert_param(IS_OB_PCROP_SELECT(OB_PcROP)); |
shaorui | 0:571a1835428e | 1107 | |
shaorui | 0:571a1835428e | 1108 | /* Mask SPRMOD bit */ |
shaorui | 0:571a1835428e | 1109 | optiontmp = (uint8_t)((*(__IO uint8_t *)OPTCR_BYTE3_ADDRESS) & (uint8_t)0x7F); |
shaorui | 0:571a1835428e | 1110 | /* Update Option Byte */ |
shaorui | 0:571a1835428e | 1111 | *(__IO uint8_t *)OPTCR_BYTE3_ADDRESS = (uint8_t)(OB_PcROP | optiontmp); |
shaorui | 0:571a1835428e | 1112 | |
shaorui | 0:571a1835428e | 1113 | } |
shaorui | 0:571a1835428e | 1114 | |
shaorui | 0:571a1835428e | 1115 | /** |
shaorui | 0:571a1835428e | 1116 | * @brief Enables or disables the read/write protection (PCROP) of the desired |
shaorui | 0:571a1835428e | 1117 | * sectors, for the first 1 MB of the Flash. |
shaorui | 0:571a1835428e | 1118 | * |
shaorui | 0:571a1835428e | 1119 | * @note This function can be used only for STM32F42xxx/43xxx , STM32F401xx/411xE |
shaorui | 0:571a1835428e | 1120 | * and STM32F412xG devices. |
shaorui | 0:571a1835428e | 1121 | * |
shaorui | 0:571a1835428e | 1122 | * @param OB_PCROP: specifies the sector(s) to be read/write protected or unprotected. |
shaorui | 0:571a1835428e | 1123 | * This parameter can be one of the following values: |
shaorui | 0:571a1835428e | 1124 | * @arg OB_PCROP: A value between OB_PCROP_Sector0 and OB_PCROP_Sector11 for |
shaorui | 0:571a1835428e | 1125 | * STM32F42xxx/43xxx devices and between OB_PCROP_Sector0 and |
shaorui | 0:571a1835428e | 1126 | * OB_PCROP_Sector5 for STM32F401xx/411xE devices. |
shaorui | 0:571a1835428e | 1127 | * @arg OB_PCROP_Sector_All |
shaorui | 0:571a1835428e | 1128 | * @param Newstate: new state of the Write Protection. |
shaorui | 0:571a1835428e | 1129 | * This parameter can be: ENABLE or DISABLE. |
shaorui | 0:571a1835428e | 1130 | * @retval None |
shaorui | 0:571a1835428e | 1131 | */ |
shaorui | 0:571a1835428e | 1132 | void FLASH_OB_PCROPConfig(uint32_t OB_PCROP, FunctionalState NewState) |
shaorui | 0:571a1835428e | 1133 | { |
shaorui | 0:571a1835428e | 1134 | FLASH_Status status = FLASH_COMPLETE2; |
shaorui | 0:571a1835428e | 1135 | |
shaorui | 0:571a1835428e | 1136 | /* Check the parameters */ |
shaorui | 0:571a1835428e | 1137 | assert_param(IS_OB_PCROP(OB_PCROP)); |
shaorui | 0:571a1835428e | 1138 | assert_param(IS_FUNCTIONAL_STATE(NewState)); |
shaorui | 0:571a1835428e | 1139 | |
shaorui | 0:571a1835428e | 1140 | status = FLASH_WaitForLastOperation2(); |
shaorui | 0:571a1835428e | 1141 | |
shaorui | 0:571a1835428e | 1142 | if(status == FLASH_COMPLETE2) |
shaorui | 0:571a1835428e | 1143 | { |
shaorui | 0:571a1835428e | 1144 | if(NewState != DISABLE) |
shaorui | 0:571a1835428e | 1145 | { |
shaorui | 0:571a1835428e | 1146 | *(__IO uint16_t*)OPTCR_BYTE2_ADDRESS |= (uint16_t)OB_PCROP; |
shaorui | 0:571a1835428e | 1147 | } |
shaorui | 0:571a1835428e | 1148 | else |
shaorui | 0:571a1835428e | 1149 | { |
shaorui | 0:571a1835428e | 1150 | *(__IO uint16_t*)OPTCR_BYTE2_ADDRESS &= (~OB_PCROP); |
shaorui | 0:571a1835428e | 1151 | } |
shaorui | 0:571a1835428e | 1152 | } |
shaorui | 0:571a1835428e | 1153 | } |
shaorui | 0:571a1835428e | 1154 | |
shaorui | 0:571a1835428e | 1155 | /** |
shaorui | 0:571a1835428e | 1156 | * @brief Enables or disables the read/write protection (PCROP) of the desired |
shaorui | 0:571a1835428e | 1157 | * sectors |
shaorui | 0:571a1835428e | 1158 | * |
shaorui | 0:571a1835428e | 1159 | * @note This function can be used only for STM32F42xxx/43xxx devices. |
shaorui | 0:571a1835428e | 1160 | * |
shaorui | 0:571a1835428e | 1161 | * @param OB_PCROP: specifies the sector(s) to be read/write protected or unprotected. |
shaorui | 0:571a1835428e | 1162 | * This parameter can be one of the following values: |
shaorui | 0:571a1835428e | 1163 | * @arg OB_PCROP: A value between OB_PCROP_Sector12 and OB_PCROP_Sector23 |
shaorui | 0:571a1835428e | 1164 | * @arg OB_PCROP_Sector_All |
shaorui | 0:571a1835428e | 1165 | * @param Newstate: new state of the Write Protection. |
shaorui | 0:571a1835428e | 1166 | * This parameter can be: ENABLE or DISABLE. |
shaorui | 0:571a1835428e | 1167 | * @retval None |
shaorui | 0:571a1835428e | 1168 | */ |
shaorui | 0:571a1835428e | 1169 | void FLASH_OB_PCROP1Config(uint32_t OB_PCROP, FunctionalState NewState) |
shaorui | 0:571a1835428e | 1170 | { |
shaorui | 0:571a1835428e | 1171 | FLASH_Status status = FLASH_COMPLETE2; |
shaorui | 0:571a1835428e | 1172 | |
shaorui | 0:571a1835428e | 1173 | /* Check the parameters */ |
shaorui | 0:571a1835428e | 1174 | assert_param(IS_OB_PCROP(OB_PCROP)); |
shaorui | 0:571a1835428e | 1175 | assert_param(IS_FUNCTIONAL_STATE(NewState)); |
shaorui | 0:571a1835428e | 1176 | |
shaorui | 0:571a1835428e | 1177 | status = FLASH_WaitForLastOperation2(); |
shaorui | 0:571a1835428e | 1178 | |
shaorui | 0:571a1835428e | 1179 | if(status == FLASH_COMPLETE2) |
shaorui | 0:571a1835428e | 1180 | { |
shaorui | 0:571a1835428e | 1181 | if(NewState != DISABLE) |
shaorui | 0:571a1835428e | 1182 | { |
shaorui | 0:571a1835428e | 1183 | *(__IO uint16_t*)OPTCR1_BYTE2_ADDRESS |= (uint16_t)OB_PCROP; |
shaorui | 0:571a1835428e | 1184 | } |
shaorui | 0:571a1835428e | 1185 | else |
shaorui | 0:571a1835428e | 1186 | { |
shaorui | 0:571a1835428e | 1187 | *(__IO uint16_t*)OPTCR1_BYTE2_ADDRESS &= (~OB_PCROP); |
shaorui | 0:571a1835428e | 1188 | } |
shaorui | 0:571a1835428e | 1189 | } |
shaorui | 0:571a1835428e | 1190 | } |
shaorui | 0:571a1835428e | 1191 | |
shaorui | 0:571a1835428e | 1192 | |
shaorui | 0:571a1835428e | 1193 | /** |
shaorui | 0:571a1835428e | 1194 | * @brief Sets the read protection level. |
shaorui | 0:571a1835428e | 1195 | * @param OB_RDP: specifies the read protection level. |
shaorui | 0:571a1835428e | 1196 | * This parameter can be one of the following values: |
shaorui | 0:571a1835428e | 1197 | * @arg OB_RDP_Level_0: No protection |
shaorui | 0:571a1835428e | 1198 | * @arg OB_RDP_Level_1: Read protection of the memory |
shaorui | 0:571a1835428e | 1199 | * @arg OB_RDP_Level_2: Full chip protection |
shaorui | 0:571a1835428e | 1200 | * |
shaorui | 0:571a1835428e | 1201 | * /!\ Warning /!\ When enabling OB_RDP level 2 it's no more possible to go back to level 1 or 0 |
shaorui | 0:571a1835428e | 1202 | * |
shaorui | 0:571a1835428e | 1203 | * @retval None |
shaorui | 0:571a1835428e | 1204 | */ |
shaorui | 0:571a1835428e | 1205 | void FLASH_OB_RDPConfig(uint8_t OB_RDP) |
shaorui | 0:571a1835428e | 1206 | { |
shaorui | 0:571a1835428e | 1207 | FLASH_Status status = FLASH_COMPLETE2; |
shaorui | 0:571a1835428e | 1208 | |
shaorui | 0:571a1835428e | 1209 | /* Check the parameters */ |
shaorui | 0:571a1835428e | 1210 | assert_param(IS_OB_RDP(OB_RDP)); |
shaorui | 0:571a1835428e | 1211 | |
shaorui | 0:571a1835428e | 1212 | status = FLASH_WaitForLastOperation2(); |
shaorui | 0:571a1835428e | 1213 | |
shaorui | 0:571a1835428e | 1214 | if(status == FLASH_COMPLETE2) |
shaorui | 0:571a1835428e | 1215 | { |
shaorui | 0:571a1835428e | 1216 | *(__IO uint8_t*)OPTCR_BYTE1_ADDRESS = OB_RDP; |
shaorui | 0:571a1835428e | 1217 | |
shaorui | 0:571a1835428e | 1218 | } |
shaorui | 0:571a1835428e | 1219 | } |
shaorui | 0:571a1835428e | 1220 | |
shaorui | 0:571a1835428e | 1221 | /** |
shaorui | 0:571a1835428e | 1222 | * @brief Programs the FLASH User Option Byte: IWDG_SW / RST_STOP / RST_STDBY. |
shaorui | 0:571a1835428e | 1223 | * @param OB_IWDG: Selects the IWDG mode |
shaorui | 0:571a1835428e | 1224 | * This parameter can be one of the following values: |
shaorui | 0:571a1835428e | 1225 | * @arg OB_IWDG_SW: Software IWDG selected |
shaorui | 0:571a1835428e | 1226 | * @arg OB_IWDG_HW: Hardware IWDG selected |
shaorui | 0:571a1835428e | 1227 | * @param OB_STOP: Reset event when entering STOP mode. |
shaorui | 0:571a1835428e | 1228 | * This parameter can be one of the following values: |
shaorui | 0:571a1835428e | 1229 | * @arg OB_STOP_NoRST: No reset generated when entering in STOP |
shaorui | 0:571a1835428e | 1230 | * @arg OB_STOP_RST: Reset generated when entering in STOP |
shaorui | 0:571a1835428e | 1231 | * @param OB_STDBY: Reset event when entering Standby mode. |
shaorui | 0:571a1835428e | 1232 | * This parameter can be one of the following values: |
shaorui | 0:571a1835428e | 1233 | * @arg OB_STDBY_NoRST: No reset generated when entering in STANDBY |
shaorui | 0:571a1835428e | 1234 | * @arg OB_STDBY_RST: Reset generated when entering in STANDBY |
shaorui | 0:571a1835428e | 1235 | * @retval None |
shaorui | 0:571a1835428e | 1236 | */ |
shaorui | 0:571a1835428e | 1237 | void FLASH_OB_UserConfig(uint8_t OB_IWDG, uint8_t OB_STOP, uint8_t OB_STDBY) |
shaorui | 0:571a1835428e | 1238 | { |
shaorui | 0:571a1835428e | 1239 | uint8_t optiontmp = 0xFF; |
shaorui | 0:571a1835428e | 1240 | FLASH_Status status = FLASH_COMPLETE2; |
shaorui | 0:571a1835428e | 1241 | |
shaorui | 0:571a1835428e | 1242 | /* Check the parameters */ |
shaorui | 0:571a1835428e | 1243 | assert_param(IS_OB_IWDG_SOURCE(OB_IWDG)); |
shaorui | 0:571a1835428e | 1244 | assert_param(IS_OB_STOP_SOURCE(OB_STOP)); |
shaorui | 0:571a1835428e | 1245 | assert_param(IS_OB_STDBY_SOURCE(OB_STDBY)); |
shaorui | 0:571a1835428e | 1246 | |
shaorui | 0:571a1835428e | 1247 | /* Wait for last operation to be completed */ |
shaorui | 0:571a1835428e | 1248 | status = FLASH_WaitForLastOperation2(); |
shaorui | 0:571a1835428e | 1249 | |
shaorui | 0:571a1835428e | 1250 | if(status == FLASH_COMPLETE2) |
shaorui | 0:571a1835428e | 1251 | { |
shaorui | 0:571a1835428e | 1252 | #if defined(STM32F427_437xx) || defined(STM32F429_439xx) || defined(STM32F469_479xx) |
shaorui | 0:571a1835428e | 1253 | /* Mask OPTLOCK, OPTSTRT, BOR_LEV and BFB2 bits */ |
shaorui | 0:571a1835428e | 1254 | optiontmp = (uint8_t)((*(__IO uint8_t *)OPTCR_BYTE0_ADDRESS) & (uint8_t)0x1F); |
shaorui | 0:571a1835428e | 1255 | #endif /* STM32F427_437xx || STM32F429_439xx || STM32F469_479xx */ |
shaorui | 0:571a1835428e | 1256 | |
shaorui | 0:571a1835428e | 1257 | #if defined(STM32F40_41xxx) || defined(STM32F401xx) || defined(STM32F410xx) || defined(STM32F411xE) || defined(STM32F446xx) |
shaorui | 0:571a1835428e | 1258 | /* Mask OPTLOCK, OPTSTRT and BOR_LEV bits */ |
shaorui | 0:571a1835428e | 1259 | optiontmp = (uint8_t)((*(__IO uint8_t *)OPTCR_BYTE0_ADDRESS) & (uint8_t)0x0F); |
shaorui | 0:571a1835428e | 1260 | #endif /* STM32F40_41xxx || STM32F401xx || STM32F410xx || STM32F411xE || STM32F446xx */ |
shaorui | 0:571a1835428e | 1261 | |
shaorui | 0:571a1835428e | 1262 | /* Update User Option Byte */ |
shaorui | 0:571a1835428e | 1263 | *(__IO uint8_t *)OPTCR_BYTE0_ADDRESS = OB_IWDG | (uint8_t)(OB_STDBY | (uint8_t)(OB_STOP | ((uint8_t)optiontmp))); |
shaorui | 0:571a1835428e | 1264 | } |
shaorui | 0:571a1835428e | 1265 | } |
shaorui | 0:571a1835428e | 1266 | |
shaorui | 0:571a1835428e | 1267 | /** |
shaorui | 0:571a1835428e | 1268 | * @brief Configure the Dual Bank Boot. |
shaorui | 0:571a1835428e | 1269 | * |
shaorui | 0:571a1835428e | 1270 | * @note This function can be used only for STM32F42xxx/43xxx devices. |
shaorui | 0:571a1835428e | 1271 | * |
shaorui | 0:571a1835428e | 1272 | * @param OB_BOOT: specifies the Dual Bank Boot Option byte. |
shaorui | 0:571a1835428e | 1273 | * This parameter can be one of the following values: |
shaorui | 0:571a1835428e | 1274 | * @arg OB_Dual_BootEnabled: Dual Bank Boot Enable |
shaorui | 0:571a1835428e | 1275 | * @arg OB_Dual_BootDisabled: Dual Bank Boot Disabled |
shaorui | 0:571a1835428e | 1276 | * @retval None |
shaorui | 0:571a1835428e | 1277 | */ |
shaorui | 0:571a1835428e | 1278 | void FLASH_OB_BootConfig(uint8_t OB_BOOT) |
shaorui | 0:571a1835428e | 1279 | { |
shaorui | 0:571a1835428e | 1280 | /* Check the parameters */ |
shaorui | 0:571a1835428e | 1281 | assert_param(IS_OB_BOOT(OB_BOOT)); |
shaorui | 0:571a1835428e | 1282 | |
shaorui | 0:571a1835428e | 1283 | /* Set Dual Bank Boot */ |
shaorui | 0:571a1835428e | 1284 | *(__IO uint8_t *)OPTCR_BYTE0_ADDRESS &= (~FLASH_OPTCR_BFB2); |
shaorui | 0:571a1835428e | 1285 | *(__IO uint8_t *)OPTCR_BYTE0_ADDRESS |= OB_BOOT; |
shaorui | 0:571a1835428e | 1286 | |
shaorui | 0:571a1835428e | 1287 | } |
shaorui | 0:571a1835428e | 1288 | |
shaorui | 0:571a1835428e | 1289 | /** |
shaorui | 0:571a1835428e | 1290 | * @brief Sets the BOR Level. |
shaorui | 0:571a1835428e | 1291 | * @param OB_BOR: specifies the Option Bytes BOR Reset Level. |
shaorui | 0:571a1835428e | 1292 | * This parameter can be one of the following values: |
shaorui | 0:571a1835428e | 1293 | * @arg OB_BOR_LEVEL3: Supply voltage ranges from 2.7 to 3.6 V |
shaorui | 0:571a1835428e | 1294 | * @arg OB_BOR_LEVEL2: Supply voltage ranges from 2.4 to 2.7 V |
shaorui | 0:571a1835428e | 1295 | * @arg OB_BOR_LEVEL1: Supply voltage ranges from 2.1 to 2.4 V |
shaorui | 0:571a1835428e | 1296 | * @arg OB_BOR_OFF: Supply voltage ranges from 1.62 to 2.1 V |
shaorui | 0:571a1835428e | 1297 | * @retval None |
shaorui | 0:571a1835428e | 1298 | */ |
shaorui | 0:571a1835428e | 1299 | void FLASH_OB_BORConfig(uint8_t OB_BOR) |
shaorui | 0:571a1835428e | 1300 | { |
shaorui | 0:571a1835428e | 1301 | /* Check the parameters */ |
shaorui | 0:571a1835428e | 1302 | assert_param(IS_OB_BOR(OB_BOR)); |
shaorui | 0:571a1835428e | 1303 | |
shaorui | 0:571a1835428e | 1304 | /* Set the BOR Level */ |
shaorui | 0:571a1835428e | 1305 | *(__IO uint8_t *)OPTCR_BYTE0_ADDRESS &= (~FLASH_OPTCR_BOR_LEV); |
shaorui | 0:571a1835428e | 1306 | *(__IO uint8_t *)OPTCR_BYTE0_ADDRESS |= OB_BOR; |
shaorui | 0:571a1835428e | 1307 | |
shaorui | 0:571a1835428e | 1308 | } |
shaorui | 0:571a1835428e | 1309 | |
shaorui | 0:571a1835428e | 1310 | /** |
shaorui | 0:571a1835428e | 1311 | * @brief Launch the option byte loading. |
shaorui | 0:571a1835428e | 1312 | * @param None |
shaorui | 0:571a1835428e | 1313 | * @retval FLASH Status: The returned value can be: FLASH_BUSY2, FLASH_ERROR_PROGRAM2, |
shaorui | 0:571a1835428e | 1314 | * FLASH_ERROR_WRP2, FLASH_ERROR_OPERATION2 or FLASH_COMPLETE2. |
shaorui | 0:571a1835428e | 1315 | */ |
shaorui | 0:571a1835428e | 1316 | FLASH_Status FLASH_OB_Launch(void) |
shaorui | 0:571a1835428e | 1317 | { |
shaorui | 0:571a1835428e | 1318 | FLASH_Status status = FLASH_COMPLETE2; |
shaorui | 0:571a1835428e | 1319 | |
shaorui | 0:571a1835428e | 1320 | /* Set the OPTSTRT bit in OPTCR register */ |
shaorui | 0:571a1835428e | 1321 | *(__IO uint8_t *)OPTCR_BYTE0_ADDRESS |= FLASH_OPTCR_OPTSTRT; |
shaorui | 0:571a1835428e | 1322 | |
shaorui | 0:571a1835428e | 1323 | /* Wait for last operation to be completed */ |
shaorui | 0:571a1835428e | 1324 | status = FLASH_WaitForLastOperation2(); |
shaorui | 0:571a1835428e | 1325 | |
shaorui | 0:571a1835428e | 1326 | return status; |
shaorui | 0:571a1835428e | 1327 | } |
shaorui | 0:571a1835428e | 1328 | |
shaorui | 0:571a1835428e | 1329 | /** |
shaorui | 0:571a1835428e | 1330 | * @brief Returns the FLASH User Option Bytes values. |
shaorui | 0:571a1835428e | 1331 | * @param None |
shaorui | 0:571a1835428e | 1332 | * @retval The FLASH User Option Bytes values: IWDG_SW(Bit0), RST_STOP(Bit1) |
shaorui | 0:571a1835428e | 1333 | * and RST_STDBY(Bit2). |
shaorui | 0:571a1835428e | 1334 | */ |
shaorui | 0:571a1835428e | 1335 | uint8_t FLASH_OB_GetUser(void) |
shaorui | 0:571a1835428e | 1336 | { |
shaorui | 0:571a1835428e | 1337 | /* Return the User Option Byte */ |
shaorui | 0:571a1835428e | 1338 | return (uint8_t)(FLASH->OPTCR >> 5); |
shaorui | 0:571a1835428e | 1339 | } |
shaorui | 0:571a1835428e | 1340 | |
shaorui | 0:571a1835428e | 1341 | /** |
shaorui | 0:571a1835428e | 1342 | * @brief Returns the FLASH Write Protection Option Bytes value. |
shaorui | 0:571a1835428e | 1343 | * @param None |
shaorui | 0:571a1835428e | 1344 | * @retval The FLASH Write Protection Option Bytes value |
shaorui | 0:571a1835428e | 1345 | */ |
shaorui | 0:571a1835428e | 1346 | uint16_t FLASH_OB_GetWRP(void) |
shaorui | 0:571a1835428e | 1347 | { |
shaorui | 0:571a1835428e | 1348 | /* Return the FLASH write protection Register value */ |
shaorui | 0:571a1835428e | 1349 | return (*(__IO uint16_t *)(OPTCR_BYTE2_ADDRESS)); |
shaorui | 0:571a1835428e | 1350 | } |
shaorui | 0:571a1835428e | 1351 | |
shaorui | 0:571a1835428e | 1352 | /** |
shaorui | 0:571a1835428e | 1353 | * @brief Returns the FLASH Write Protection Option Bytes value. |
shaorui | 0:571a1835428e | 1354 | * |
shaorui | 0:571a1835428e | 1355 | * @note This function can be used only for STM32F42xxx/43xxx devices. |
shaorui | 0:571a1835428e | 1356 | * |
shaorui | 0:571a1835428e | 1357 | * @param None |
shaorui | 0:571a1835428e | 1358 | * @retval The FLASH Write Protection Option Bytes value |
shaorui | 0:571a1835428e | 1359 | */ |
shaorui | 0:571a1835428e | 1360 | uint16_t FLASH_OB_GetWRP1(void) |
shaorui | 0:571a1835428e | 1361 | { |
shaorui | 0:571a1835428e | 1362 | /* Return the FLASH write protection Register value */ |
shaorui | 0:571a1835428e | 1363 | return (*(__IO uint16_t *)(OPTCR1_BYTE2_ADDRESS)); |
shaorui | 0:571a1835428e | 1364 | } |
shaorui | 0:571a1835428e | 1365 | |
shaorui | 0:571a1835428e | 1366 | /** |
shaorui | 0:571a1835428e | 1367 | * @brief Returns the FLASH PC Read/Write Protection Option Bytes value. |
shaorui | 0:571a1835428e | 1368 | * |
shaorui | 0:571a1835428e | 1369 | * @note This function can be used only for STM32F42xxx/43xxx devices and STM32F401xx/411xE devices. |
shaorui | 0:571a1835428e | 1370 | * |
shaorui | 0:571a1835428e | 1371 | * @param None |
shaorui | 0:571a1835428e | 1372 | * @retval The FLASH PC Read/Write Protection Option Bytes value |
shaorui | 0:571a1835428e | 1373 | */ |
shaorui | 0:571a1835428e | 1374 | uint16_t FLASH_OB_GetPCROP(void) |
shaorui | 0:571a1835428e | 1375 | { |
shaorui | 0:571a1835428e | 1376 | /* Return the FLASH PC Read/write protection Register value */ |
shaorui | 0:571a1835428e | 1377 | return (*(__IO uint16_t *)(OPTCR_BYTE2_ADDRESS)); |
shaorui | 0:571a1835428e | 1378 | } |
shaorui | 0:571a1835428e | 1379 | |
shaorui | 0:571a1835428e | 1380 | /** |
shaorui | 0:571a1835428e | 1381 | * @brief Returns the FLASH PC Read/Write Protection Option Bytes value. |
shaorui | 0:571a1835428e | 1382 | * |
shaorui | 0:571a1835428e | 1383 | * @note This function can be used only for STM32F42xxx/43xxx devices. |
shaorui | 0:571a1835428e | 1384 | * |
shaorui | 0:571a1835428e | 1385 | * @param None |
shaorui | 0:571a1835428e | 1386 | * @retval The FLASH PC Read/Write Protection Option Bytes value |
shaorui | 0:571a1835428e | 1387 | */ |
shaorui | 0:571a1835428e | 1388 | uint16_t FLASH_OB_GetPCROP1(void) |
shaorui | 0:571a1835428e | 1389 | { |
shaorui | 0:571a1835428e | 1390 | /* Return the FLASH write protection Register value */ |
shaorui | 0:571a1835428e | 1391 | return (*(__IO uint16_t *)(OPTCR1_BYTE2_ADDRESS)); |
shaorui | 0:571a1835428e | 1392 | } |
shaorui | 0:571a1835428e | 1393 | |
shaorui | 0:571a1835428e | 1394 | /** |
shaorui | 0:571a1835428e | 1395 | * @brief Returns the FLASH Read Protection level. |
shaorui | 0:571a1835428e | 1396 | * @param None |
shaorui | 0:571a1835428e | 1397 | * @retval FLASH ReadOut Protection Status: |
shaorui | 0:571a1835428e | 1398 | * - SET, when OB_RDP_Level_1 or OB_RDP_Level_2 is set |
shaorui | 0:571a1835428e | 1399 | * - RESET, when OB_RDP_Level_0 is set |
shaorui | 0:571a1835428e | 1400 | */ |
shaorui | 0:571a1835428e | 1401 | FlagStatus FLASH_OB_GetRDP(void) |
shaorui | 0:571a1835428e | 1402 | { |
shaorui | 0:571a1835428e | 1403 | FlagStatus readstatus = RESET; |
shaorui | 0:571a1835428e | 1404 | |
shaorui | 0:571a1835428e | 1405 | if ((*(__IO uint8_t*)(OPTCR_BYTE1_ADDRESS) != (uint8_t)OB_RDP_Level_0)) |
shaorui | 0:571a1835428e | 1406 | { |
shaorui | 0:571a1835428e | 1407 | readstatus = SET; |
shaorui | 0:571a1835428e | 1408 | } |
shaorui | 0:571a1835428e | 1409 | else |
shaorui | 0:571a1835428e | 1410 | { |
shaorui | 0:571a1835428e | 1411 | readstatus = RESET; |
shaorui | 0:571a1835428e | 1412 | } |
shaorui | 0:571a1835428e | 1413 | return readstatus; |
shaorui | 0:571a1835428e | 1414 | } |
shaorui | 0:571a1835428e | 1415 | |
shaorui | 0:571a1835428e | 1416 | /** |
shaorui | 0:571a1835428e | 1417 | * @brief Returns the FLASH BOR level. |
shaorui | 0:571a1835428e | 1418 | * @param None |
shaorui | 0:571a1835428e | 1419 | * @retval The FLASH BOR level: |
shaorui | 0:571a1835428e | 1420 | * - OB_BOR_LEVEL3: Supply voltage ranges from 2.7 to 3.6 V |
shaorui | 0:571a1835428e | 1421 | * - OB_BOR_LEVEL2: Supply voltage ranges from 2.4 to 2.7 V |
shaorui | 0:571a1835428e | 1422 | * - OB_BOR_LEVEL1: Supply voltage ranges from 2.1 to 2.4 V |
shaorui | 0:571a1835428e | 1423 | * - OB_BOR_OFF : Supply voltage ranges from 1.62 to 2.1 V |
shaorui | 0:571a1835428e | 1424 | */ |
shaorui | 0:571a1835428e | 1425 | uint8_t FLASH_OB_GetBOR(void) |
shaorui | 0:571a1835428e | 1426 | { |
shaorui | 0:571a1835428e | 1427 | /* Return the FLASH BOR level */ |
shaorui | 0:571a1835428e | 1428 | return (uint8_t)(*(__IO uint8_t *)(OPTCR_BYTE0_ADDRESS) & (uint8_t)0x0C); |
shaorui | 0:571a1835428e | 1429 | } |
shaorui | 0:571a1835428e | 1430 | |
shaorui | 0:571a1835428e | 1431 | /** |
shaorui | 0:571a1835428e | 1432 | * @} |
shaorui | 0:571a1835428e | 1433 | */ |
shaorui | 0:571a1835428e | 1434 | |
shaorui | 0:571a1835428e | 1435 | /** @defgroup FLASH_Group4 Interrupts and flags management functions |
shaorui | 0:571a1835428e | 1436 | * @brief Interrupts and flags management functions |
shaorui | 0:571a1835428e | 1437 | * |
shaorui | 0:571a1835428e | 1438 | @verbatim |
shaorui | 0:571a1835428e | 1439 | =============================================================================== |
shaorui | 0:571a1835428e | 1440 | ##### Interrupts and flags management functions ##### |
shaorui | 0:571a1835428e | 1441 | =============================================================================== |
shaorui | 0:571a1835428e | 1442 | @endverbatim |
shaorui | 0:571a1835428e | 1443 | * @{ |
shaorui | 0:571a1835428e | 1444 | */ |
shaorui | 0:571a1835428e | 1445 | |
shaorui | 0:571a1835428e | 1446 | /** |
shaorui | 0:571a1835428e | 1447 | * @brief Enables or disables the specified FLASH interrupts. |
shaorui | 0:571a1835428e | 1448 | * @param FLASH_IT: specifies the FLASH interrupt sources to be enabled or disabled. |
shaorui | 0:571a1835428e | 1449 | * This parameter can be any combination of the following values: |
shaorui | 0:571a1835428e | 1450 | * @arg FLASH_IT_ERR: FLASH Error Interrupt |
shaorui | 0:571a1835428e | 1451 | * @arg FLASH_IT_EOP: FLASH end of operation Interrupt |
shaorui | 0:571a1835428e | 1452 | * @retval None |
shaorui | 0:571a1835428e | 1453 | */ |
shaorui | 0:571a1835428e | 1454 | void FLASH_ITConfig(uint32_t FLASH_IT, FunctionalState NewState) |
shaorui | 0:571a1835428e | 1455 | { |
shaorui | 0:571a1835428e | 1456 | /* Check the parameters */ |
shaorui | 0:571a1835428e | 1457 | assert_param(IS_FLASH_IT(FLASH_IT)); |
shaorui | 0:571a1835428e | 1458 | assert_param(IS_FUNCTIONAL_STATE(NewState)); |
shaorui | 0:571a1835428e | 1459 | |
shaorui | 0:571a1835428e | 1460 | if(NewState != DISABLE) |
shaorui | 0:571a1835428e | 1461 | { |
shaorui | 0:571a1835428e | 1462 | /* Enable the interrupt sources */ |
shaorui | 0:571a1835428e | 1463 | FLASH->CR |= FLASH_IT; |
shaorui | 0:571a1835428e | 1464 | } |
shaorui | 0:571a1835428e | 1465 | else |
shaorui | 0:571a1835428e | 1466 | { |
shaorui | 0:571a1835428e | 1467 | /* Disable the interrupt sources */ |
shaorui | 0:571a1835428e | 1468 | FLASH->CR &= ~(uint32_t)FLASH_IT; |
shaorui | 0:571a1835428e | 1469 | } |
shaorui | 0:571a1835428e | 1470 | } |
shaorui | 0:571a1835428e | 1471 | |
shaorui | 0:571a1835428e | 1472 | /** |
shaorui | 0:571a1835428e | 1473 | * @brief Checks whether the specified FLASH flag is set or not. |
shaorui | 0:571a1835428e | 1474 | * @param FLASH_FLAG: specifies the FLASH flag to check. |
shaorui | 0:571a1835428e | 1475 | * This parameter can be one of the following values: |
shaorui | 0:571a1835428e | 1476 | * @arg FLASH_FLAG_EOP: FLASH End of Operation flag |
shaorui | 0:571a1835428e | 1477 | * @arg FLASH_FLAG_OPERR: FLASH operation Error flag |
shaorui | 0:571a1835428e | 1478 | * @arg FLASH_FLAG_WRPERR: FLASH Write protected error flag |
shaorui | 0:571a1835428e | 1479 | * @arg FLASH_FLAG_PGAERR: FLASH Programming Alignment error flag |
shaorui | 0:571a1835428e | 1480 | * @arg FLASH_FLAG_PGPERR: FLASH Programming Parallelism error flag |
shaorui | 0:571a1835428e | 1481 | * @arg FLASH_FLAG_PGSERR: FLASH Programming Sequence error flag |
shaorui | 0:571a1835428e | 1482 | * @arg FLASH_FLAG_RDERR: FLASH (PCROP) Read Protection error flag (STM32F42xx/43xxx and STM32F401xx/411xE devices) |
shaorui | 0:571a1835428e | 1483 | * @arg FLASH_FLAG_BSY: FLASH Busy flag |
shaorui | 0:571a1835428e | 1484 | * @retval The new state of FLASH_FLAG (SET or RESET). |
shaorui | 0:571a1835428e | 1485 | */ |
shaorui | 0:571a1835428e | 1486 | FlagStatus FLASH_GetFlagStatus(uint32_t FLASH_FLAG) |
shaorui | 0:571a1835428e | 1487 | { |
shaorui | 0:571a1835428e | 1488 | FlagStatus bitstatus = RESET; |
shaorui | 0:571a1835428e | 1489 | /* Check the parameters */ |
shaorui | 0:571a1835428e | 1490 | assert_param(IS_FLASH_GET_FLAG(FLASH_FLAG)); |
shaorui | 0:571a1835428e | 1491 | |
shaorui | 0:571a1835428e | 1492 | if((FLASH->SR & FLASH_FLAG) != (uint32_t)RESET) |
shaorui | 0:571a1835428e | 1493 | { |
shaorui | 0:571a1835428e | 1494 | bitstatus = SET; |
shaorui | 0:571a1835428e | 1495 | } |
shaorui | 0:571a1835428e | 1496 | else |
shaorui | 0:571a1835428e | 1497 | { |
shaorui | 0:571a1835428e | 1498 | bitstatus = RESET; |
shaorui | 0:571a1835428e | 1499 | } |
shaorui | 0:571a1835428e | 1500 | /* Return the new state of FLASH_FLAG (SET or RESET) */ |
shaorui | 0:571a1835428e | 1501 | return bitstatus; |
shaorui | 0:571a1835428e | 1502 | } |
shaorui | 0:571a1835428e | 1503 | |
shaorui | 0:571a1835428e | 1504 | /** |
shaorui | 0:571a1835428e | 1505 | * @brief Clears the FLASH's pending flags. |
shaorui | 0:571a1835428e | 1506 | * @param FLASH_FLAG: specifies the FLASH flags to clear. |
shaorui | 0:571a1835428e | 1507 | * This parameter can be any combination of the following values: |
shaorui | 0:571a1835428e | 1508 | * @arg FLASH_FLAG_EOP: FLASH End of Operation flag |
shaorui | 0:571a1835428e | 1509 | * @arg FLASH_FLAG_OPERR: FLASH operation Error flag |
shaorui | 0:571a1835428e | 1510 | * @arg FLASH_FLAG_WRPERR: FLASH Write protected error flag |
shaorui | 0:571a1835428e | 1511 | * @arg FLASH_FLAG_PGAERR: FLASH Programming Alignment error flag |
shaorui | 0:571a1835428e | 1512 | * @arg FLASH_FLAG_PGPERR: FLASH Programming Parallelism error flag |
shaorui | 0:571a1835428e | 1513 | * @arg FLASH_FLAG_PGSERR: FLASH Programming Sequence error flag |
shaorui | 0:571a1835428e | 1514 | * @arg FLASH_FLAG_RDERR: FLASH Read Protection error flag (STM32F42xx/43xxx and STM32F401xx/411xE devices) |
shaorui | 0:571a1835428e | 1515 | * @retval None |
shaorui | 0:571a1835428e | 1516 | */ |
shaorui | 0:571a1835428e | 1517 | void FLASH_ClearFlag(uint32_t FLASH_FLAG) |
shaorui | 0:571a1835428e | 1518 | { |
shaorui | 0:571a1835428e | 1519 | /* Check the parameters */ |
shaorui | 0:571a1835428e | 1520 | assert_param(IS_FLASH_CLEAR_FLAG(FLASH_FLAG)); |
shaorui | 0:571a1835428e | 1521 | |
shaorui | 0:571a1835428e | 1522 | /* Clear the flags */ |
shaorui | 0:571a1835428e | 1523 | FLASH->SR = FLASH_FLAG; |
shaorui | 0:571a1835428e | 1524 | } |
shaorui | 0:571a1835428e | 1525 | |
shaorui | 0:571a1835428e | 1526 | /** |
shaorui | 0:571a1835428e | 1527 | * @brief Returns the FLASH Status. |
shaorui | 0:571a1835428e | 1528 | * @param None |
shaorui | 0:571a1835428e | 1529 | * @retval FLASH Status: The returned value can be: FLASH_BUSY2, FLASH_ERROR_PROGRAM2, |
shaorui | 0:571a1835428e | 1530 | * FLASH_ERROR_WRP2, FLASH_ERROR_RD2, FLASH_ERROR_OPERATION2 or FLASH_COMPLETE2. |
shaorui | 0:571a1835428e | 1531 | */ |
shaorui | 0:571a1835428e | 1532 | FLASH_Status FLASH_GetStatus(void) |
shaorui | 0:571a1835428e | 1533 | { |
shaorui | 0:571a1835428e | 1534 | FLASH_Status flashstatus = FLASH_COMPLETE2; |
shaorui | 0:571a1835428e | 1535 | |
shaorui | 0:571a1835428e | 1536 | if((FLASH->SR & FLASH_FLAG_BSY) == FLASH_FLAG_BSY) |
shaorui | 0:571a1835428e | 1537 | { |
shaorui | 0:571a1835428e | 1538 | flashstatus = FLASH_BUSY2; |
shaorui | 0:571a1835428e | 1539 | } |
shaorui | 0:571a1835428e | 1540 | else |
shaorui | 0:571a1835428e | 1541 | { |
shaorui | 0:571a1835428e | 1542 | if((FLASH->SR & FLASH_FLAG_WRPERR) != (uint32_t)0x00) |
shaorui | 0:571a1835428e | 1543 | { |
shaorui | 0:571a1835428e | 1544 | flashstatus = FLASH_ERROR_WRP2; |
shaorui | 0:571a1835428e | 1545 | } |
shaorui | 0:571a1835428e | 1546 | else |
shaorui | 0:571a1835428e | 1547 | { |
shaorui | 0:571a1835428e | 1548 | if((FLASH->SR & FLASH_FLAG_RDERR) != (uint32_t)0x00) |
shaorui | 0:571a1835428e | 1549 | { |
shaorui | 0:571a1835428e | 1550 | flashstatus = FLASH_ERROR_RD2; |
shaorui | 0:571a1835428e | 1551 | } |
shaorui | 0:571a1835428e | 1552 | else |
shaorui | 0:571a1835428e | 1553 | { |
shaorui | 0:571a1835428e | 1554 | if((FLASH->SR & (uint32_t)0xE0) != (uint32_t)0x00) |
shaorui | 0:571a1835428e | 1555 | { |
shaorui | 0:571a1835428e | 1556 | flashstatus = FLASH_ERROR_PROGRAM2; |
shaorui | 0:571a1835428e | 1557 | } |
shaorui | 0:571a1835428e | 1558 | else |
shaorui | 0:571a1835428e | 1559 | { |
shaorui | 0:571a1835428e | 1560 | if((FLASH->SR & FLASH_FLAG_OPERR) != (uint32_t)0x00) |
shaorui | 0:571a1835428e | 1561 | { |
shaorui | 0:571a1835428e | 1562 | flashstatus = FLASH_ERROR_OPERATION2; |
shaorui | 0:571a1835428e | 1563 | } |
shaorui | 0:571a1835428e | 1564 | else |
shaorui | 0:571a1835428e | 1565 | { |
shaorui | 0:571a1835428e | 1566 | flashstatus = FLASH_COMPLETE2; |
shaorui | 0:571a1835428e | 1567 | } |
shaorui | 0:571a1835428e | 1568 | } |
shaorui | 0:571a1835428e | 1569 | } |
shaorui | 0:571a1835428e | 1570 | } |
shaorui | 0:571a1835428e | 1571 | } |
shaorui | 0:571a1835428e | 1572 | /* Return the FLASH Status */ |
shaorui | 0:571a1835428e | 1573 | return flashstatus; |
shaorui | 0:571a1835428e | 1574 | } |
shaorui | 0:571a1835428e | 1575 | |
shaorui | 0:571a1835428e | 1576 | /** |
shaorui | 0:571a1835428e | 1577 | * @brief Waits for a FLASH operation to complete. |
shaorui | 0:571a1835428e | 1578 | * @param None |
shaorui | 0:571a1835428e | 1579 | * @retval FLASH Status: The returned value can be: FLASH_BUSY2, FLASH_ERROR_PROGRAM2, |
shaorui | 0:571a1835428e | 1580 | * FLASH_ERROR_WRP2, FLASH_ERROR_OPERATION2 or FLASH_COMPLETE2. |
shaorui | 0:571a1835428e | 1581 | */ |
shaorui | 0:571a1835428e | 1582 | FLASH_Status FLASH_WaitForLastOperation2(void) |
shaorui | 0:571a1835428e | 1583 | { |
shaorui | 0:571a1835428e | 1584 | __IO FLASH_Status status = FLASH_COMPLETE2; |
shaorui | 0:571a1835428e | 1585 | |
shaorui | 0:571a1835428e | 1586 | /* Check for the FLASH Status */ |
shaorui | 0:571a1835428e | 1587 | status = FLASH_GetStatus(); |
shaorui | 0:571a1835428e | 1588 | |
shaorui | 0:571a1835428e | 1589 | /* Wait for the FLASH operation to complete by polling on BUSY flag to be reset. |
shaorui | 0:571a1835428e | 1590 | Even if the FLASH operation fails, the BUSY flag will be reset and an error |
shaorui | 0:571a1835428e | 1591 | flag will be set */ |
shaorui | 0:571a1835428e | 1592 | while(status == FLASH_BUSY2) |
shaorui | 0:571a1835428e | 1593 | { |
shaorui | 0:571a1835428e | 1594 | status = FLASH_GetStatus(); |
shaorui | 0:571a1835428e | 1595 | } |
shaorui | 0:571a1835428e | 1596 | /* Return the operation status */ |
shaorui | 0:571a1835428e | 1597 | return status; |
shaorui | 0:571a1835428e | 1598 | } |
shaorui | 0:571a1835428e | 1599 | |
shaorui | 0:571a1835428e | 1600 | /** |
shaorui | 0:571a1835428e | 1601 | * @} |
shaorui | 0:571a1835428e | 1602 | */ |
shaorui | 0:571a1835428e | 1603 | |
shaorui | 0:571a1835428e | 1604 | /** |
shaorui | 0:571a1835428e | 1605 | * @} |
shaorui | 0:571a1835428e | 1606 | */ |
shaorui | 0:571a1835428e | 1607 | |
shaorui | 0:571a1835428e | 1608 | /** |
shaorui | 0:571a1835428e | 1609 | * @} |
shaorui | 0:571a1835428e | 1610 | */ |
shaorui | 0:571a1835428e | 1611 | |
shaorui | 0:571a1835428e | 1612 | /** |
shaorui | 0:571a1835428e | 1613 | * @} |
shaorui | 0:571a1835428e | 1614 | */ |
shaorui | 0:571a1835428e | 1615 | |
shaorui | 0:571a1835428e | 1616 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |